diff options
author | Olivier Galibert <galibert@pobox.com> | 2021-05-10 09:14:49 +0200 |
---|---|---|
committer | Olivier Galibert <galibert@pobox.com> | 2021-05-10 09:14:54 +0200 |
commit | 7ff6ed667f9f5f9ab9e6cda2a8661153212b2804 (patch) | |
tree | 9db8fa0649a9a76097009c3f726be2c5cf213670 | |
parent | 41a77f06d06af07c1d232de21458d709de6e4ec0 (diff) |
cdr-254sh: Skeleton
-rw-r--r-- | scripts/src/bus.lua | 2 | ||||
-rw-r--r-- | scripts/src/cpu.lua | 2 | ||||
-rw-r--r-- | src/devices/bus/nscsi/crd254sh.cpp | 68 | ||||
-rw-r--r-- | src/devices/bus/nscsi/crd254sh.h | 36 | ||||
-rw-r--r-- | src/devices/bus/nscsi/devices.cpp | 2 | ||||
-rw-r--r-- | src/devices/cpu/h8/h83042.cpp | 263 | ||||
-rw-r--r-- | src/devices/cpu/h8/h83042.h | 95 |
7 files changed, 468 insertions, 0 deletions
diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 4cbf0266db2..a996034185a 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -2511,6 +2511,8 @@ if (BUSES["NSCSI"]~=null) then MAME_DIR .. "src/devices/bus/nscsi/cdu415.h", MAME_DIR .. "src/devices/bus/nscsi/cdu561.cpp", MAME_DIR .. "src/devices/bus/nscsi/cdu561.h", + MAME_DIR .. "src/devices/bus/nscsi/crd254sh.cpp", + MAME_DIR .. "src/devices/bus/nscsi/crd254sh.h", MAME_DIR .. "src/devices/bus/nscsi/cw7501.cpp", MAME_DIR .. "src/devices/bus/nscsi/cw7501.h", MAME_DIR .. "src/devices/bus/nscsi/devices.cpp", diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 8564d702a6d..4ddf33406ed 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -668,6 +668,8 @@ if CPUS["H8"] then MAME_DIR .. "src/devices/cpu/h8/h83008.h", MAME_DIR .. "src/devices/cpu/h8/h83032.cpp", MAME_DIR .. "src/devices/cpu/h8/h83032.h", + MAME_DIR .. "src/devices/cpu/h8/h83042.cpp", + MAME_DIR .. "src/devices/cpu/h8/h83042.h", MAME_DIR .. "src/devices/cpu/h8/h83048.cpp", MAME_DIR .. "src/devices/cpu/h8/h83048.h", MAME_DIR .. "src/devices/cpu/h8/h8s2245.cpp", diff --git a/src/devices/bus/nscsi/crd254sh.cpp b/src/devices/bus/nscsi/crd254sh.cpp new file mode 100644 index 00000000000..80fc5fae740 --- /dev/null +++ b/src/devices/bus/nscsi/crd254sh.cpp @@ -0,0 +1,68 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert +/******************************************************************************* + + Skeleton device for Sony/Apple CRD-254SH 4x cdrom reader + +*******************************************************************************/ + +// Chips: +// - Hitachi H8/3040 : CPU, external rom mode +// - Sanyo LC89512W : CD-ROM error correction + SCSI +// - Sanyo LC7868K : DSP for CD players +// - Sanyo LC98200 : ? +// - Sanyo LA9220 : Analog signal processing and servo control +// - Sanyo LC78816W : ? +// - Sanyo LA6531 : 2-Channel BTL-USE driver +// - 2x NPN NN514256J-45 : 256Kx4 DRAM +// +// The LC89512W combines a LC89517 (cdrom) upgraded for 4x and a LC8945 (scsi) +// The LC89517 is a LC89515 upgraded for x2 capability +// The LC89515 is an enhanced LC8951, and is documented + + +#include "emu.h" +#include "crd254sh.h" + +DEFINE_DEVICE_TYPE(CRD254SH, crd254sh_device, "crd254sh", "Sanyo CRD-254SH CD-ROM") + +crd254sh_device::crd254sh_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, CRD254SH, tag, owner, clock) + , nscsi_slot_card_interface(mconfig, *this, "dummy_scsi") + , m_mcu(*this, "mcu") + , m_scsi(*this, "dummy_scsi") + , m_rom(*this, "mcu") +{ +} + +void crd254sh_device::device_start() +{ +} + +void crd254sh_device::mem_map(address_map &map) +{ + map(0x00000, 0x0ffff).rom().region("mcu", 0); +} + +void crd254sh_device::io_map(address_map &map) +{ +} + +void crd254sh_device::device_add_mconfig(machine_config &config) +{ + H83040(config, m_mcu, 20_MHz_XTAL); + m_mcu->set_addrmap(AS_PROGRAM, &crd254sh_device::mem_map); + m_mcu->set_addrmap(AS_IO, &crd254sh_device::io_map); + + NCR53C94(config, m_scsi, 25_MHz_XTAL); // Placeholder until we implement the real chip +} + +ROM_START(crd254sh) + ROM_REGION(0x10000, "mcu", 0) + ROM_LOAD("crd-254s_1.02.bin", 0x00000, 0x10000, CRC(539df5f0) SHA1(edb1f7d96f351ef70b8ade03449fb63e0e0a652b)) +ROM_END + +const tiny_rom_entry *crd254sh_device::device_rom_region() const +{ + return ROM_NAME(crd254sh); +} diff --git a/src/devices/bus/nscsi/crd254sh.h b/src/devices/bus/nscsi/crd254sh.h new file mode 100644 index 00000000000..c1ac2e4123d --- /dev/null +++ b/src/devices/bus/nscsi/crd254sh.h @@ -0,0 +1,36 @@ +// license:BSD-3-Clause +// copyright-holders:O. Galibert + +#ifndef MAME_BUS_NSCSI_CRD254SH_H +#define MAME_BUS_NSCSI_CRD254SH_H + +#pragma once + +#include "machine/nscsi_bus.h" +#include "cpu/h8/h83042.h" +#include "machine/ncr5390.h" + +class crd254sh_device : public device_t, public nscsi_slot_card_interface +{ +public: + crd254sh_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + + static constexpr feature_type unemulated_features() { return feature::DISK; } + +protected: + virtual void device_start() override; + virtual void device_add_mconfig(machine_config &config) override; + virtual const tiny_rom_entry *device_rom_region() const override; + +private: + void mem_map(address_map &map); + void io_map(address_map &map); + + required_device<h83040_device> m_mcu; + required_device<ncr53c94_device> m_scsi; + required_region_ptr<u16> m_rom; +}; + +DECLARE_DEVICE_TYPE(CRD254SH, crd254sh_device) + +#endif // MAME_BUS_NSCSI_CRD254SH_H diff --git a/src/devices/bus/nscsi/devices.cpp b/src/devices/bus/nscsi/devices.cpp index 7a422c648f2..5c051762053 100644 --- a/src/devices/bus/nscsi/devices.cpp +++ b/src/devices/bus/nscsi/devices.cpp @@ -10,6 +10,7 @@ #include "bus/nscsi/cdu75s.h" #include "bus/nscsi/cdu415.h" #include "bus/nscsi/cdu561.h" +#include "bus/nscsi/crd254sh.h" #include "bus/nscsi/cw7501.h" #include "bus/nscsi/hd.h" #include "bus/nscsi/s1410.h" @@ -27,6 +28,7 @@ void default_scsi_devices(device_slot_interface &device) device.option_add("cdu75s", CDU75S); device.option_add("cdu415", CDU415); device.option_add("cdu561_25", CDU561_25); + device.option_add("crd254sh", CRD254SH); device.option_add("smoc501", SMOC501); device.option_add("aplcd150", APPLECD150); } diff --git a/src/devices/cpu/h8/h83042.cpp b/src/devices/cpu/h8/h83042.cpp new file mode 100644 index 00000000000..2b0631d201e --- /dev/null +++ b/src/devices/cpu/h8/h83042.cpp @@ -0,0 +1,263 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert +#include "emu.h" +#include "h83042.h" + +DEFINE_DEVICE_TYPE(H83040, h83040_device, "h83040", "Hitachi H8/3040") +DEFINE_DEVICE_TYPE(H83041, h83041_device, "h83041", "Hitachi H8/3041") +DEFINE_DEVICE_TYPE(H83042, h83042_device, "h83042", "Hitachi H8/3042") + +h83042_device::h83042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : + h8h_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h83042_device::map), this)), + intc(*this, "intc"), + adc(*this, "adc"), + port1(*this, "port1"), + port2(*this, "port2"), + port3(*this, "port3"), + port4(*this, "port4"), + port5(*this, "port5"), + port6(*this, "port6"), + port7(*this, "port7"), + port8(*this, "port8"), + port9(*this, "port9"), + porta(*this, "porta"), + portb(*this, "portb"), + timer16(*this, "timer16"), + timer16_0(*this, "timer16:0"), + timer16_1(*this, "timer16:1"), + timer16_2(*this, "timer16:2"), + timer16_3(*this, "timer16:3"), + timer16_4(*this, "timer16:4"), + sci0(*this, "sci0"), + sci1(*this, "sci1"), + watchdog(*this, "watchdog"), + syscr(0) +{ + mode_a20 = true; +} + +h83040_device::h83040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + h83042_device(mconfig, H83040, tag, owner, clock) +{ +} + +h83041_device::h83041_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + h83042_device(mconfig, H83041, tag, owner, clock) +{ +} + +h83042_device::h83042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + h83042_device(mconfig, H83042, tag, owner, clock) +{ +} + + +void h83042_device::map(address_map &map) +{ + const offs_t base = 0xf0000; + + map(base | 0xf710, base | 0xff0f).ram(); + + map(base | 0xff60, base | 0xff60).rw("timer16", FUNC(h8_timer16_device::tstr_r), FUNC(h8_timer16_device::tstr_w)); + map(base | 0xff61, base | 0xff61).rw("timer16", FUNC(h8_timer16_device::tsyr_r), FUNC(h8_timer16_device::tsyr_w)); + map(base | 0xff62, base | 0xff62).rw("timer16", FUNC(h8_timer16_device::tmdr_r), FUNC(h8_timer16_device::tmdr_w)); + map(base | 0xff63, base | 0xff63).rw("timer16", FUNC(h8_timer16_device::tfcr_r), FUNC(h8_timer16_device::tfcr_w)); + map(base | 0xff64, base | 0xff64).rw("timer16:0", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w)); + map(base | 0xff65, base | 0xff65).rw("timer16:0", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w)); + map(base | 0xff66, base | 0xff66).rw("timer16:0", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w)); + map(base | 0xff67, base | 0xff67).rw("timer16:0", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w)); + map(base | 0xff68, base | 0xff69).rw("timer16:0", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w)); + map(base | 0xff6a, base | 0xff6d).rw("timer16:0", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w)); + map(base | 0xff6e, base | 0xff6e).rw("timer16:1", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w)); + map(base | 0xff6f, base | 0xff6f).rw("timer16:1", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w)); + map(base | 0xff70, base | 0xff70).rw("timer16:1", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w)); + map(base | 0xff71, base | 0xff71).rw("timer16:1", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w)); + map(base | 0xff72, base | 0xff73).rw("timer16:1", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w)); + map(base | 0xff74, base | 0xff77).rw("timer16:1", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w)); + map(base | 0xff78, base | 0xff78).rw("timer16:2", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w)); + map(base | 0xff79, base | 0xff79).rw("timer16:2", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w)); + map(base | 0xff7a, base | 0xff7a).rw("timer16:2", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w)); + map(base | 0xff7b, base | 0xff7b).rw("timer16:2", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w)); + map(base | 0xff7c, base | 0xff7d).rw("timer16:2", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w)); + map(base | 0xff7e, base | 0xff81).rw("timer16:2", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w)); + map(base | 0xff82, base | 0xff82).rw("timer16:3", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w)); + map(base | 0xff83, base | 0xff83).rw("timer16:3", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w)); + map(base | 0xff84, base | 0xff84).rw("timer16:3", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w)); + map(base | 0xff85, base | 0xff85).rw("timer16:3", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w)); + map(base | 0xff86, base | 0xff87).rw("timer16:3", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w)); + map(base | 0xff88, base | 0xff8b).rw("timer16:3", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w)); + map(base | 0xff8c, base | 0xff8f).rw("timer16:3", FUNC(h8_timer16_channel_device::tbr_r), FUNC(h8_timer16_channel_device::tbr_w)); + map(base | 0xff90, base | 0xff90).rw("timer16", FUNC(h8_timer16_device::toer_r), FUNC(h8_timer16_device::toer_w)); + map(base | 0xff91, base | 0xff91).rw("timer16", FUNC(h8_timer16_device::tocr_r), FUNC(h8_timer16_device::tocr_w)); + map(base | 0xff92, base | 0xff92).rw("timer16:4", FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w)); + map(base | 0xff93, base | 0xff93).rw("timer16:4", FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w)); + map(base | 0xff94, base | 0xff94).rw("timer16:4", FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w)); + map(base | 0xff95, base | 0xff95).rw("timer16:4", FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w)); + map(base | 0xff96, base | 0xff97).rw("timer16:4", FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w)); + map(base | 0xff98, base | 0xff9b).rw("timer16:4", FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w)); + map(base | 0xff9c, base | 0xff9f).rw("timer16:4", FUNC(h8_timer16_channel_device::tbr_r), FUNC(h8_timer16_channel_device::tbr_w)); + + map(base | 0xffa8, base | 0xffa9).rw("watchdog", FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w)); + map(base | 0xffaa, base | 0xffab).rw("watchdog", FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w)); + + map(base | 0xffb0, base | 0xffb0).rw("sci0", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w)); + map(base | 0xffb1, base | 0xffb1).rw("sci0", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w)); + map(base | 0xffb2, base | 0xffb2).rw("sci0", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w)); + map(base | 0xffb3, base | 0xffb3).rw("sci0", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w)); + map(base | 0xffb4, base | 0xffb4).rw("sci0", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w)); + map(base | 0xffb5, base | 0xffb5).r("sci0", FUNC(h8_sci_device::rdr_r)); + map(base | 0xffb8, base | 0xffb8).rw("sci1", FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w)); + map(base | 0xffb9, base | 0xffb9).rw("sci1", FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w)); + map(base | 0xffba, base | 0xffba).rw("sci1", FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w)); + map(base | 0xffbb, base | 0xffbb).rw("sci1", FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w)); + map(base | 0xffbc, base | 0xffbc).rw("sci1", FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w)); + map(base | 0xffbd, base | 0xffbd).r("sci1", FUNC(h8_sci_device::rdr_r)); + map(base | 0xffc0, base | 0xffc0).w("port1", FUNC(h8_port_device::ddr_w)); + map(base | 0xffc1, base | 0xffc1).w("port2", FUNC(h8_port_device::ddr_w)); + map(base | 0xffc2, base | 0xffc2).rw("port1", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); + map(base | 0xffc3, base | 0xffc3).rw("port2", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); + map(base | 0xffc4, base | 0xffc4).w("port3", FUNC(h8_port_device::ddr_w)); + map(base | 0xffc5, base | 0xffc5).w("port4", FUNC(h8_port_device::ddr_w)); + map(base | 0xffc6, base | 0xffc6).rw("port3", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); + map(base | 0xffc7, base | 0xffc7).rw("port4", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); + map(base | 0xffc8, base | 0xffc8).w("port5", FUNC(h8_port_device::ddr_w)); + map(base | 0xffc9, base | 0xffc9).w("port6", FUNC(h8_port_device::ddr_w)); + map(base | 0xffca, base | 0xffca).rw("port5", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); + map(base | 0xffcb, base | 0xffcb).rw("port6", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); + map(base | 0xffcd, base | 0xffcd).w("port8", FUNC(h8_port_device::ddr_w)); + map(base | 0xffce, base | 0xffce).rw("port7", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); + map(base | 0xffcf, base | 0xffcf).rw("port8", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); + map(base | 0xffd0, base | 0xffd0).w("port9", FUNC(h8_port_device::ddr_w)); + map(base | 0xffd1, base | 0xffd1).w("porta", FUNC(h8_port_device::ddr_w)); + map(base | 0xffd2, base | 0xffd2).rw("port9", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); + map(base | 0xffd3, base | 0xffd3).rw("porta", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); + map(base | 0xffd4, base | 0xffd4).w("portb", FUNC(h8_port_device::ddr_w)); + map(base | 0xffd6, base | 0xffd6).rw("portb", FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w)); + map(base | 0xffd8, base | 0xffd8).rw("port2", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w)); + map(base | 0xffda, base | 0xffda).rw("port4", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w)); + map(base | 0xffdb, base | 0xffdb).rw("port5", FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w)); + + map(base | 0xffe0, base | 0xffe7).r("adc", FUNC(h8_adc_device::addr8_r)); + map(base | 0xffe8, base | 0xffe8).rw("adc", FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w)); + map(base | 0xffe9, base | 0xffe9).rw("adc", FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w)); + + map(base | 0xfff2, base | 0xfff2).rw(FUNC(h83042_device::syscr_r), FUNC(h83042_device::syscr_w)); + + map(base | 0xfff4, base | 0xfff4).rw("intc", FUNC(h8h_intc_device::iscr_r), FUNC(h8h_intc_device::iscr_w)); + map(base | 0xfff5, base | 0xfff5).rw("intc", FUNC(h8h_intc_device::ier_r), FUNC(h8h_intc_device::ier_w)); + map(base | 0xfff6, base | 0xfff6).rw("intc", FUNC(h8h_intc_device::isr_r), FUNC(h8h_intc_device::isr_w)); + map(base | 0xfff8, base | 0xfff9).rw("intc", FUNC(h8h_intc_device::icr_r), FUNC(h8h_intc_device::icr_w)); +} + +void h83042_device::device_add_mconfig(machine_config &config) +{ + H8H_INTC(config, "intc"); + H8_ADC_3337(config, "adc", "intc", 60); + H8_PORT(config, "port1", h8_device::PORT_1, 0x00, 0x00); + H8_PORT(config, "port2", h8_device::PORT_2, 0x00, 0x00); + H8_PORT(config, "port3", h8_device::PORT_3, 0x00, 0x00); + H8_PORT(config, "port4", h8_device::PORT_4, 0x00, 0x00); + H8_PORT(config, "port5", h8_device::PORT_5, 0xf0, 0xf0); + H8_PORT(config, "port6", h8_device::PORT_6, 0x80, 0x80); + H8_PORT(config, "port7", h8_device::PORT_7, 0x00, 0x00); + H8_PORT(config, "port8", h8_device::PORT_8, 0xe0, 0xe0); + H8_PORT(config, "port9", h8_device::PORT_9, 0xc0, 0xc0); + H8_PORT(config, "porta", h8_device::PORT_A, 0x00, 0x00); + H8_PORT(config, "portb", h8_device::PORT_B, 0x00, 0x00); + H8_TIMER16(config, "timer16", 5, 0xe0); + H8H_TIMER16_CHANNEL(config, "timer16:0", 2, 2, "intc", 24); + H8H_TIMER16_CHANNEL(config, "timer16:1", 2, 2, "intc", 28); + H8H_TIMER16_CHANNEL(config, "timer16:2", 2, 2, "intc", 32); + H8H_TIMER16_CHANNEL(config, "timer16:3", 2, 2, "intc", 36); + H8H_TIMER16_CHANNEL(config, "timer16:4", 2, 2, "intc", 40); + H8_SCI(config, "sci0", "intc", 52, 53, 54, 55); + H8_SCI(config, "sci1", "intc", 56, 57, 58, 59); + H8_WATCHDOG(config, "watchdog", "intc", 20, h8_watchdog_device::H); +} + +void h83042_device::execute_set_input(int inputnum, int state) +{ + intc->set_input(inputnum, state); +} + +int h83042_device::trapa_setup() +{ + if(syscr & 0x08) + CCR |= F_I; + else + CCR |= F_I|F_UI; + return 8; +} + +void h83042_device::irq_setup() +{ + if(syscr & 0x08) + CCR |= F_I; + else + CCR |= F_I|F_UI; +} + +void h83042_device::update_irq_filter() +{ + switch(syscr & 0x08) { + case 0x00: + if((CCR & (F_I|F_UI)) == (F_I|F_UI)) + intc->set_filter(2, -1); + else if(CCR & F_I) + intc->set_filter(1, -1); + else + intc->set_filter(0, -1); + break; + case 0x08: + if(CCR & F_I) + intc->set_filter(2, -1); + else + intc->set_filter(0, -1); + break; + } +} + +void h83042_device::interrupt_taken() +{ + standard_irq_callback(intc->interrupt_taken(taken_irq_vector)); +} + +void h83042_device::internal_update(uint64_t current_time) +{ + uint64_t event_time = 0; + + add_event(event_time, adc->internal_update(current_time)); + add_event(event_time, sci0->internal_update(current_time)); + add_event(event_time, sci1->internal_update(current_time)); + add_event(event_time, timer16_0->internal_update(current_time)); + add_event(event_time, timer16_1->internal_update(current_time)); + add_event(event_time, timer16_2->internal_update(current_time)); + add_event(event_time, timer16_3->internal_update(current_time)); + add_event(event_time, timer16_4->internal_update(current_time)); + add_event(event_time, watchdog->internal_update(current_time)); + + recompute_bcount(event_time); +} + +void h83042_device::device_start() +{ + h8h_device::device_start(); +} + +void h83042_device::device_reset() +{ + h8h_device::device_reset(); + syscr = 0x0b; +} + +uint8_t h83042_device::syscr_r() +{ + return syscr; +} + +void h83042_device::syscr_w(uint8_t data) +{ + syscr = data; + update_irq_filter(); + logerror("syscr = %02x\n", data); +} diff --git a/src/devices/cpu/h8/h83042.h b/src/devices/cpu/h8/h83042.h new file mode 100644 index 00000000000..8caa5a4e690 --- /dev/null +++ b/src/devices/cpu/h8/h83042.h @@ -0,0 +1,95 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert +/*************************************************************************** + + h83042.h + + H8-3042 family emulation + + H8-300H-based mcus. + + Variant ROM RAM + H8/3044 32K 2K + H8/3045 64K 2K + H8/3047 96K 4K + H8/3042 192K 4K + + The 3394, 3396, and 3997 variants are the mask-rom versions. + + +***************************************************************************/ + +#ifndef MAME_CPU_H8_H83042_H +#define MAME_CPU_H8_H83042_H + +#include "h8h.h" +#include "h8_adc.h" +#include "h8_port.h" +#include "h8_intc.h" +#include "h8_timer16.h" +#include "h8_sci.h" +#include "h8_watchdog.h" + +class h83042_device : public h8h_device { +public: + h83042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + uint8_t syscr_r(); + void syscr_w(uint8_t data); + +protected: + h83042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + required_device<h8h_intc_device> intc; + required_device<h8_adc_device> adc; + required_device<h8_port_device> port1; + required_device<h8_port_device> port2; + required_device<h8_port_device> port3; + required_device<h8_port_device> port4; + required_device<h8_port_device> port5; + required_device<h8_port_device> port6; + required_device<h8_port_device> port7; + required_device<h8_port_device> port8; + required_device<h8_port_device> port9; + required_device<h8_port_device> porta; + required_device<h8_port_device> portb; + required_device<h8_timer16_device> timer16; + required_device<h8h_timer16_channel_device> timer16_0; + required_device<h8h_timer16_channel_device> timer16_1; + required_device<h8h_timer16_channel_device> timer16_2; + required_device<h8h_timer16_channel_device> timer16_3; + required_device<h8h_timer16_channel_device> timer16_4; + required_device<h8_sci_device> sci0; + required_device<h8_sci_device> sci1; + required_device<h8_watchdog_device> watchdog; + + uint8_t syscr; + + virtual void update_irq_filter() override; + virtual void interrupt_taken() override; + virtual int trapa_setup() override; + virtual void irq_setup() override; + virtual void internal_update(uint64_t current_time) override; + virtual void device_add_mconfig(machine_config &config) override; + void map(address_map &map); + + virtual void device_start() override; + virtual void device_reset() override; + virtual void execute_set_input(int inputnum, int state) override; +}; + +class h83040_device : public h83042_device { +public: + h83040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + +class h83041_device : public h83042_device { +public: + h83041_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); +}; + +DECLARE_DEVICE_TYPE(H83040, h83040_device) +DECLARE_DEVICE_TYPE(H83041, h83041_device) +DECLARE_DEVICE_TYPE(H83042, h83042_device) + +#endif // MAME_CPU_H8_H83042_H |