diff options
author | Sergey Svishchev <shattered@users.noreply.github.com> | 2017-02-26 22:52:53 +0300 |
---|---|---|
committer | Vas Crabb <cuavas@users.noreply.github.com> | 2017-03-02 01:24:43 +1100 |
commit | 7fb8176ac6c596047142fe2550f5449ddd5d6081 (patch) | |
tree | 8cd6ef5ed2db5ad9a50ca583ac853abc8e90fa05 | |
parent | 73e2a3f542e868149f3b0be6c1bf395283711f33 (diff) |
apply clang-format, remove obsolete comments. no code changes.
-rw-r--r-- | src/devices/bus/isa/mc1502_fdc.cpp | 77 | ||||
-rw-r--r-- | src/devices/bus/isa/mc1502_fdc.h | 9 | ||||
-rw-r--r-- | src/devices/bus/isa/mc1502_rom.cpp | 10 | ||||
-rw-r--r-- | src/devices/bus/isa/mc1502_rom.h | 2 | ||||
-rw-r--r-- | src/devices/bus/isa/p1_fdc.cpp | 51 | ||||
-rw-r--r-- | src/devices/bus/isa/p1_fdc.h | 7 | ||||
-rw-r--r-- | src/devices/bus/isa/p1_hdc.cpp | 30 | ||||
-rw-r--r-- | src/devices/bus/isa/p1_hdc.h | 4 | ||||
-rw-r--r-- | src/devices/bus/isa/p1_rom.cpp | 10 | ||||
-rw-r--r-- | src/devices/bus/isa/p1_rom.h | 2 | ||||
-rw-r--r-- | src/devices/bus/isa/p1_sound.cpp | 70 | ||||
-rw-r--r-- | src/devices/bus/isa/p1_sound.h | 16 | ||||
-rw-r--r-- | src/lib/formats/asst128_dsk.cpp | 4 | ||||
-rw-r--r-- | src/lib/formats/asst128_dsk.h | 4 | ||||
-rw-r--r-- | src/mame/drivers/asst128.cpp | 8 | ||||
-rw-r--r-- | src/mame/drivers/bitgraph.cpp | 269 | ||||
-rw-r--r-- | src/mame/drivers/dvk_ksm.cpp | 161 | ||||
-rw-r--r-- | src/mame/drivers/ec184x.cpp | 80 | ||||
-rw-r--r-- | src/mame/drivers/iskr103x.cpp | 19 | ||||
-rw-r--r-- | src/mame/drivers/mc1502.cpp | 60 | ||||
-rw-r--r-- | src/mame/drivers/poisk1.cpp | 272 |
21 files changed, 616 insertions, 549 deletions
diff --git a/src/devices/bus/isa/mc1502_fdc.cpp b/src/devices/bus/isa/mc1502_fdc.cpp index 6f514c7e3f3..e904b44bdb1 100644 --- a/src/devices/bus/isa/mc1502_fdc.cpp +++ b/src/devices/bus/isa/mc1502_fdc.cpp @@ -2,7 +2,7 @@ // copyright-holders:Sergey Svishchev /********************************************************************** - Electronika MC 1502 FDC device + Electronika MC 1502 FDC device **********************************************************************/ @@ -62,7 +62,7 @@ ROM_END machine_config_constructor mc1502_fdc_device::device_mconfig_additions() const { - return MACHINE_CONFIG_NAME( mc1502_fdc ); + return MACHINE_CONFIG_NAME(mc1502_fdc); } //------------------------------------------------- @@ -71,7 +71,7 @@ machine_config_constructor mc1502_fdc_device::device_mconfig_additions() const const tiny_rom_entry *mc1502_fdc_device::device_rom_region() const { - return ROM_NAME( mc1502_fdc ); + return ROM_NAME(mc1502_fdc); } @@ -99,26 +99,25 @@ void mc1502_fdc_device::mc1502_wd17xx_aux_w(uint8_t data) { floppy_image_device *floppy0 = m_fdc->subdevice<floppy_connector>("0")->get_device(); floppy_image_device *floppy1 = m_fdc->subdevice<floppy_connector>("1")->get_device(); - floppy_image_device *floppy = ((data & 0x10)?floppy1:floppy0); + floppy_image_device *floppy = ((data & 0x10) ? floppy1 : floppy0); // master reset - if((data & 1) == 0) - m_fdc->reset(); + if ((data & 1) == 0) m_fdc->reset(); m_fdc->set_floppy(floppy); // SIDE ONE - floppy->ss_w((data & 2)?1:0); + floppy->ss_w((data & 2) ? 1 : 0); // bits 2, 3 -- motor on (drive 0, 1) floppy0->mon_w(!(data & 4)); floppy1->mon_w(!(data & 8)); - if (data & 12) { - motor_timer->adjust(attotime::from_msec( 3000 )); + if (data & 12) + { + motor_timer->adjust(attotime::from_msec(3000)); motor_on = 1; } - } /* @@ -128,7 +127,8 @@ uint8_t mc1502_fdc_device::mc1502_wd17xx_drq_r() { cpu_device *maincpu = machine().device<cpu_device>("maincpu"); - if (!m_fdc->drq_r() && !m_fdc->intrq_r()) { + if (!m_fdc->drq_r() && !m_fdc->intrq_r()) + { // fake cpu wait by resetting PC one insn back maincpu->set_state_int(I8086_IP, maincpu->state_int(I8086_IP) - 1); maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); @@ -142,47 +142,60 @@ uint8_t mc1502_fdc_device::mc1502_wd17xx_motor_r() return motor_on; } -WRITE_LINE_MEMBER( mc1502_fdc_device::mc1502_fdc_irq_drq ) +WRITE_LINE_MEMBER(mc1502_fdc_device::mc1502_fdc_irq_drq) { cpu_device *maincpu = machine().device<cpu_device>("maincpu"); - if(state) - maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); + if (state) maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); } -READ8_MEMBER( mc1502_fdc_device::mc1502_fdc_r ) +READ8_MEMBER(mc1502_fdc_device::mc1502_fdc_r) { uint8_t data = 0xff; - switch( offset ) + switch (offset) { - case 0: data = mc1502_wd17xx_aux_r(); break; - case 8: data = mc1502_wd17xx_drq_r(); break; - case 10: data = mc1502_wd17xx_motor_r(); break; + case 0: + data = mc1502_wd17xx_aux_r(); + break; + case 8: + data = mc1502_wd17xx_drq_r(); + break; + case 10: + data = mc1502_wd17xx_motor_r(); + break; } return data; } -READ8_MEMBER( mc1502_fdc_device::mc1502_fdcv2_r ) +READ8_MEMBER(mc1502_fdc_device::mc1502_fdcv2_r) { uint8_t data = 0xff; - switch( offset ) + switch (offset) { - case 0: data = mc1502_wd17xx_aux_r(); break; - case 1: data = mc1502_wd17xx_motor_r(); break; - case 2: data = mc1502_wd17xx_drq_r(); break; + case 0: + data = mc1502_wd17xx_aux_r(); + break; + case 1: + data = mc1502_wd17xx_motor_r(); + break; + case 2: + data = mc1502_wd17xx_drq_r(); + break; } return data; } -WRITE8_MEMBER( mc1502_fdc_device::mc1502_fdc_w ) +WRITE8_MEMBER(mc1502_fdc_device::mc1502_fdc_w) { - switch( offset ) + switch (offset) { - case 0: mc1502_wd17xx_aux_w(data); break; + case 0: + mc1502_wd17xx_aux_w(data); + break; } } @@ -190,10 +203,12 @@ WRITE8_MEMBER( mc1502_fdc_device::mc1502_fdc_w ) // mc1502_fdc_device - constructor //------------------------------------------------- -mc1502_fdc_device::mc1502_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, MC1502_FDC, "MC-1502 floppy", tag, owner, clock, "mc1502_fdc", __FILE__), - device_isa8_card_interface( mconfig, *this ), - m_fdc(*this, "fdc"), motor_on(0), motor_timer(nullptr) +mc1502_fdc_device::mc1502_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, MC1502_FDC, "MC-1502 floppy", tag, owner, clock, "mc1502_fdc", __FILE__) + , device_isa8_card_interface(mconfig, *this) + , m_fdc(*this, "fdc") + , motor_on(0) + , motor_timer(nullptr) { } diff --git a/src/devices/bus/isa/mc1502_fdc.h b/src/devices/bus/isa/mc1502_fdc.h index 976bc8d4a3c..350dcde39c2 100644 --- a/src/devices/bus/isa/mc1502_fdc.h +++ b/src/devices/bus/isa/mc1502_fdc.h @@ -2,7 +2,7 @@ // copyright-holders:Sergey Svishchev /********************************************************************** - Electronika MC 1502 FDC device + Electronika MC 1502 FDC device **********************************************************************/ @@ -31,13 +31,13 @@ public: virtual machine_config_constructor device_mconfig_additions() const override; virtual const tiny_rom_entry *device_rom_region() const override; - DECLARE_FLOPPY_FORMATS( floppy_formats ); - TIMER_CALLBACK_MEMBER( motor_callback ); + DECLARE_FLOPPY_FORMATS(floppy_formats); + TIMER_CALLBACK_MEMBER(motor_callback); DECLARE_READ8_MEMBER(mc1502_fdc_r); DECLARE_READ8_MEMBER(mc1502_fdcv2_r); DECLARE_WRITE8_MEMBER(mc1502_fdc_w); - DECLARE_WRITE_LINE_MEMBER( mc1502_fdc_irq_drq ); + DECLARE_WRITE_LINE_MEMBER(mc1502_fdc_irq_drq); protected: // device-level overrides @@ -53,7 +53,6 @@ public: uint8_t mc1502_wd17xx_aux_r(); uint8_t mc1502_wd17xx_drq_r(); uint8_t mc1502_wd17xx_motor_r(); - }; diff --git a/src/devices/bus/isa/mc1502_rom.cpp b/src/devices/bus/isa/mc1502_rom.cpp index cbc36c38e18..c2d3ed81bc5 100644 --- a/src/devices/bus/isa/mc1502_rom.cpp +++ b/src/devices/bus/isa/mc1502_rom.cpp @@ -2,7 +2,7 @@ // copyright-holders:Sergey Svishchev /********************************************************************** - MC-1502 ROM cartridge device + MC-1502 ROM cartridge device **********************************************************************/ @@ -33,7 +33,7 @@ ROM_END const tiny_rom_entry *mc1502_rom_device::device_rom_region() const { - return ROM_NAME( mc1502_rom ); + return ROM_NAME(mc1502_rom); } @@ -45,9 +45,9 @@ const tiny_rom_entry *mc1502_rom_device::device_rom_region() const // mc1502_rom_device - constructor //------------------------------------------------- -mc1502_rom_device::mc1502_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, MC1502_ROM, "MC-1502 ROM cart", tag, owner, clock, "mc1502_rom", __FILE__), - device_isa8_card_interface( mconfig, *this ) +mc1502_rom_device::mc1502_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, MC1502_ROM, "MC-1502 ROM cart", tag, owner, clock, "mc1502_rom", __FILE__) + , device_isa8_card_interface(mconfig, *this) { } diff --git a/src/devices/bus/isa/mc1502_rom.h b/src/devices/bus/isa/mc1502_rom.h index 193a9bf3274..f5874075e2b 100644 --- a/src/devices/bus/isa/mc1502_rom.h +++ b/src/devices/bus/isa/mc1502_rom.h @@ -2,7 +2,7 @@ // copyright-holders:Sergey Svishchev /********************************************************************** - MC-1502 ROM cartridge device + MC-1502 ROM cartridge device **********************************************************************/ diff --git a/src/devices/bus/isa/p1_fdc.cpp b/src/devices/bus/isa/p1_fdc.cpp index 4cca541298a..6617f6c3fae 100644 --- a/src/devices/bus/isa/p1_fdc.cpp +++ b/src/devices/bus/isa/p1_fdc.cpp @@ -2,7 +2,7 @@ // copyright-holders:Sergey Svishchev /********************************************************************** - Poisk-1 FDC device (model B504) + Poisk-1 FDC device (model B504) **********************************************************************/ @@ -72,7 +72,7 @@ ROM_END machine_config_constructor p1_fdc_device::device_mconfig_additions() const { - return MACHINE_CONFIG_NAME( fdc_b504 ); + return MACHINE_CONFIG_NAME(fdc_b504); } //------------------------------------------------- @@ -81,7 +81,7 @@ machine_config_constructor p1_fdc_device::device_mconfig_additions() const const tiny_rom_entry *p1_fdc_device::device_rom_region() const { - return ROM_NAME( p1_fdc ); + return ROM_NAME(p1_fdc); } @@ -91,7 +91,7 @@ const tiny_rom_entry *p1_fdc_device::device_rom_region() const uint8_t p1_fdc_device::p1_wd17xx_motor_r() { - DBG_LOG(1,"p1_fdc_motor_r",("R = $%02x\n", 0)); + DBG_LOG(1, "p1_fdc_motor_r", ("R = $%02x\n", 0)); // XXX always on for now return 0; } @@ -100,7 +100,8 @@ uint8_t p1_fdc_device::p1_wd17xx_aux_r() { cpu_device *maincpu = machine().device<cpu_device>("maincpu"); - if (!m_fdc->drq_r() && !m_fdc->intrq_r()) { + if (!m_fdc->drq_r() && !m_fdc->intrq_r()) + { // fake cpu wait by resetting PC one insn back maincpu->set_state_int(I8086_IP, maincpu->state_int(I8086_IP) - 2); maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); @@ -121,14 +122,13 @@ uint8_t p1_fdc_device::p1_wd17xx_aux_r() */ void p1_fdc_device::p1_wd17xx_aux_w(int data) { - DBG_LOG(1,"p1_fdc_aux_w",("W $%02x\n", data)); + DBG_LOG(1, "p1_fdc_aux_w", ("W $%02x\n", data)); floppy_image_device *floppy0 = m_fdc->subdevice<floppy_connector>("0")->get_device(); floppy_image_device *floppy1 = m_fdc->subdevice<floppy_connector>("1")->get_device(); - floppy_image_device *floppy = ((data & 2)?floppy1:floppy0); + floppy_image_device *floppy = ((data & 2) ? floppy1 : floppy0); - if(!BIT(data, 6)) - m_fdc->reset(); + if (!BIT(data, 6)) m_fdc->reset(); m_fdc->set_floppy(floppy); @@ -139,32 +139,37 @@ void p1_fdc_device::p1_wd17xx_aux_w(int data) floppy1->mon_w(!(data & 8)); } -WRITE_LINE_MEMBER( p1_fdc_device::p1_fdc_irq_drq ) +WRITE_LINE_MEMBER(p1_fdc_device::p1_fdc_irq_drq) { cpu_device *maincpu = machine().device<cpu_device>("maincpu"); - if(state) - maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); + if (state) maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); } -READ8_MEMBER( p1_fdc_device::p1_fdc_r ) +READ8_MEMBER(p1_fdc_device::p1_fdc_r) { uint8_t data = 0xff; - switch( offset ) + switch (offset) { - case 0: data = p1_wd17xx_aux_r(); break; - case 2: data = p1_wd17xx_motor_r(); break; + case 0: + data = p1_wd17xx_aux_r(); + break; + case 2: + data = p1_wd17xx_motor_r(); + break; } return data; } -WRITE8_MEMBER( p1_fdc_device::p1_fdc_w ) +WRITE8_MEMBER(p1_fdc_device::p1_fdc_w) { - switch( offset ) + switch (offset) { - case 0: p1_wd17xx_aux_w(data); break; + case 0: + p1_wd17xx_aux_w(data); + break; } } @@ -172,10 +177,10 @@ WRITE8_MEMBER( p1_fdc_device::p1_fdc_w ) // p1_fdc_device - constructor //------------------------------------------------- -p1_fdc_device::p1_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, P1_FDC, "Poisk-1 floppy B504", tag, owner, clock, "p1_fdc", __FILE__), - device_isa8_card_interface( mconfig, *this ), - m_fdc(*this, "fdc") +p1_fdc_device::p1_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, P1_FDC, "Poisk-1 floppy B504", tag, owner, clock, "p1_fdc", __FILE__) + , device_isa8_card_interface(mconfig, *this) + , m_fdc(*this, "fdc") { } diff --git a/src/devices/bus/isa/p1_fdc.h b/src/devices/bus/isa/p1_fdc.h index ed6d4f809d4..6e0afa62c93 100644 --- a/src/devices/bus/isa/p1_fdc.h +++ b/src/devices/bus/isa/p1_fdc.h @@ -2,7 +2,7 @@ // copyright-holders:Sergey Svishchev /********************************************************************** - Poisk-1 FDC device (model B504) + Poisk-1 FDC device (model B504) **********************************************************************/ @@ -31,10 +31,11 @@ public: virtual machine_config_constructor device_mconfig_additions() const override; virtual const tiny_rom_entry *device_rom_region() const override; - DECLARE_FLOPPY_FORMATS( floppy_formats ); + DECLARE_FLOPPY_FORMATS(floppy_formats); DECLARE_READ8_MEMBER(p1_fdc_r); DECLARE_WRITE8_MEMBER(p1_fdc_w); - DECLARE_WRITE_LINE_MEMBER( p1_fdc_irq_drq ); + DECLARE_WRITE_LINE_MEMBER(p1_fdc_irq_drq); + protected: // device-level overrides virtual void device_start() override; diff --git a/src/devices/bus/isa/p1_hdc.cpp b/src/devices/bus/isa/p1_hdc.cpp index 47ab6ed6853..60a2696328e 100644 --- a/src/devices/bus/isa/p1_hdc.cpp +++ b/src/devices/bus/isa/p1_hdc.cpp @@ -2,7 +2,7 @@ // copyright-holders:Sergey Svishchev /********************************************************************** - Poisk-1 HDC device (model B942) + Poisk-1 HDC device (model B942) **********************************************************************/ @@ -73,7 +73,7 @@ ROM_END machine_config_constructor p1_hdc_device::device_mconfig_additions() const { - return MACHINE_CONFIG_NAME( hdc_b942 ); + return MACHINE_CONFIG_NAME(hdc_b942); } @@ -83,7 +83,7 @@ machine_config_constructor p1_hdc_device::device_mconfig_additions() const const tiny_rom_entry *p1_hdc_device::device_rom_region() const { - return ROM_NAME( p1_hdc ); + return ROM_NAME(p1_hdc); } @@ -96,19 +96,23 @@ READ8_MEMBER(p1_hdc_device::p1_HDC_r) { uint8_t data = 0x00; - switch (offset >> 8) { - case 8: data = m_hdc->read(space, offset & 255); + switch (offset >> 8) + { + case 8: + data = m_hdc->read(space, offset & 255); } - DBG_LOG(1,"hdc",("R $%04x == $%02x\n", offset, data)); + DBG_LOG(1, "hdc", ("R $%04x == $%02x\n", offset, data)); return data; } WRITE8_MEMBER(p1_hdc_device::p1_HDC_w) { - DBG_LOG(1,"hdc",("W $%04x <- $%02x\n", offset, data)); - switch (offset >> 8) { - case 8: m_hdc->write(space, offset & 255, data, 0); + DBG_LOG(1, "hdc", ("W $%04x <- $%02x\n", offset, data)); + switch (offset >> 8) + { + case 8: + m_hdc->write(space, offset & 255, data, 0); } } @@ -116,10 +120,10 @@ WRITE8_MEMBER(p1_hdc_device::p1_HDC_w) // p1_hdc_device - constructor //------------------------------------------------- -p1_hdc_device::p1_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, P1_HDC, "Poisk-1 MFM disk B942", tag, owner, clock, "p1_hdc", __FILE__), - device_isa8_card_interface( mconfig, *this ), - m_hdc(*this, KM1809VG7_TAG) +p1_hdc_device::p1_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, P1_HDC, "Poisk-1 MFM disk B942", tag, owner, clock, "p1_hdc", __FILE__) + , device_isa8_card_interface(mconfig, *this) + , m_hdc(*this, KM1809VG7_TAG) { } diff --git a/src/devices/bus/isa/p1_hdc.h b/src/devices/bus/isa/p1_hdc.h index 6e809c17f6b..9574da126f9 100644 --- a/src/devices/bus/isa/p1_hdc.h +++ b/src/devices/bus/isa/p1_hdc.h @@ -2,7 +2,7 @@ // copyright-holders:Sergey Svishchev /********************************************************************** - Poisk-1 HDC device (model B942) + Poisk-1 HDC device (model B942) **********************************************************************/ @@ -39,7 +39,7 @@ protected: private: required_device<wd2010_device> m_hdc; - //uint8_t m_ram[0x800]; + // uint8_t m_ram[0x800]; public: DECLARE_READ8_MEMBER(p1_HDC_r); diff --git a/src/devices/bus/isa/p1_rom.cpp b/src/devices/bus/isa/p1_rom.cpp index 48d61233895..0a57aa1a9af 100644 --- a/src/devices/bus/isa/p1_rom.cpp +++ b/src/devices/bus/isa/p1_rom.cpp @@ -2,7 +2,7 @@ // copyright-holders:Sergey Svishchev /********************************************************************** - Poisk-1 ROM cartridge device + Poisk-1 ROM cartridge device **********************************************************************/ @@ -38,7 +38,7 @@ ROM_END const tiny_rom_entry *p1_rom_device::device_rom_region() const { - return ROM_NAME( p1_rom ); + return ROM_NAME(p1_rom); } @@ -50,9 +50,9 @@ const tiny_rom_entry *p1_rom_device::device_rom_region() const // p1_rom_device - constructor //------------------------------------------------- -p1_rom_device::p1_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, P1_ROM, "Poisk-1 ROM cart", tag, owner, clock, "p1_rom", __FILE__), - device_isa8_card_interface( mconfig, *this ) +p1_rom_device::p1_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, P1_ROM, "Poisk-1 ROM cart", tag, owner, clock, "p1_rom", __FILE__) + , device_isa8_card_interface(mconfig, *this) { } diff --git a/src/devices/bus/isa/p1_rom.h b/src/devices/bus/isa/p1_rom.h index fc88dd08222..079cbdedc5b 100644 --- a/src/devices/bus/isa/p1_rom.h +++ b/src/devices/bus/isa/p1_rom.h @@ -2,7 +2,7 @@ // copyright-holders:Sergey Svishchev /********************************************************************** - Poisk-1 ROM cartridge device + Poisk-1 ROM cartridge device **********************************************************************/ diff --git a/src/devices/bus/isa/p1_sound.cpp b/src/devices/bus/isa/p1_sound.cpp index 4a173a8db47..593774a1f81 100644 --- a/src/devices/bus/isa/p1_sound.cpp +++ b/src/devices/bus/isa/p1_sound.cpp @@ -2,12 +2,12 @@ // copyright-holders:Sergey Svishchev /********************************************************************** - Poisk-1 sound card. DAC, ADC, MIDI in/out and 6 music channels. + Poisk-1 sound card. DAC, ADC, MIDI in/out and 6 music channels. - Memory-mapped, uses IRQ3 and IRQ7, no DMA. + Memory-mapped, uses IRQ3 and IRQ7, no DMA. - Copyright MESS Team. - Visit http://mamedev.org for licensing and usage restrictions. + Copyright MESS Team. + Visit http://mamedev.org for licensing and usage restrictions. **********************************************************************/ @@ -80,7 +80,7 @@ MACHINE_CONFIG_END machine_config_constructor p1_sound_device::device_mconfig_additions() const { - return MACHINE_CONFIG_NAME( p1_sound ); + return MACHINE_CONFIG_NAME(p1_sound); } @@ -92,66 +92,68 @@ machine_config_constructor p1_sound_device::device_mconfig_additions() const // p1_sound_device - constructor //------------------------------------------------- -p1_sound_device::p1_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, P1_SOUND, "Poisk-1 sound card (B623)", tag, owner, clock, "p1_sound", __FILE__), - device_isa8_card_interface( mconfig, *this ), - m_dac(*this, "dac"), - m_filter(*this, "filter"), - m_midi(*this, "midi"), - m_d14(*this, "d14"), - m_d16(*this, "d16"), - m_d17(*this, "d17") +p1_sound_device::p1_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, P1_SOUND, "Poisk-1 sound card (B623)", tag, owner, clock, "p1_sound", __FILE__) + , device_isa8_card_interface(mconfig, *this) + , m_dac(*this, "dac") + , m_filter(*this, "filter") + , m_midi(*this, "midi") + , m_d14(*this, "d14") + , m_d16(*this, "d16") + , m_d17(*this, "d17") { } -READ8_MEMBER( p1_sound_device::d14_r ) +READ8_MEMBER(p1_sound_device::d14_r) { - return m_d14->read(space, offset>>1); + return m_d14->read(space, offset >> 1); } -WRITE8_MEMBER( p1_sound_device::d14_w ) +WRITE8_MEMBER(p1_sound_device::d14_w) { - m_d14->write(space, offset>>1, data); + m_d14->write(space, offset >> 1, data); } -READ8_MEMBER( p1_sound_device::d16_r ) +READ8_MEMBER(p1_sound_device::d16_r) { - return m_d16->read(space, offset>>1); + return m_d16->read(space, offset >> 1); } -WRITE8_MEMBER( p1_sound_device::d16_w ) +WRITE8_MEMBER(p1_sound_device::d16_w) { - m_d16->write(space, offset>>1, data); + m_d16->write(space, offset >> 1, data); } -READ8_MEMBER( p1_sound_device::d17_r ) +READ8_MEMBER(p1_sound_device::d17_r) { - return m_d17->read(space, offset>>1); + return m_d17->read(space, offset >> 1); } -WRITE8_MEMBER( p1_sound_device::d17_w ) +WRITE8_MEMBER(p1_sound_device::d17_w) { - m_d17->write(space, offset>>1, data); + m_d17->write(space, offset >> 1, data); } -READ8_MEMBER( p1_sound_device::adc_r ) +READ8_MEMBER(p1_sound_device::adc_r) { return 0; } -WRITE8_MEMBER( p1_sound_device::dac_w ) +WRITE8_MEMBER(p1_sound_device::dac_w) { -// logerror("DAC write: %02x <- %02x\n", offset>>1, data); - m_dac_data[offset>>1] = data; +// logerror("DAC write: %02x <- %02x\n", offset>>1, data); + m_dac_data[offset >> 1] = data; m_isa->irq7_w(CLEAR_LINE); } -WRITE_LINE_MEMBER( p1_sound_device::sampler_sync ) +WRITE_LINE_MEMBER(p1_sound_device::sampler_sync) { - if (state) { + if (state) + { m_dac->write(m_dac_data[m_dac_ptr++]); m_dac_ptr &= 7; - if ((m_dac_ptr % 8) == 0) { + if ((m_dac_ptr % 8) == 0) + { m_isa->irq7_w(state); } } @@ -205,5 +207,5 @@ void p1_sound_device::device_reset() m_dac_ptr = 0; // 5 kHz lowpass filter. XXX check schematics - m_filter->filter_rc_set_RC(FLT_RC_LOWPASS, 330, 0, 0, CAP_N(100) ); + m_filter->filter_rc_set_RC(FLT_RC_LOWPASS, 330, 0, 0, CAP_N(100)); } diff --git a/src/devices/bus/isa/p1_sound.h b/src/devices/bus/isa/p1_sound.h index 86dee02454a..c130db813e6 100644 --- a/src/devices/bus/isa/p1_sound.h +++ b/src/devices/bus/isa/p1_sound.h @@ -2,10 +2,10 @@ // copyright-holders:Sergey Svishchev /********************************************************************** - Poisk-1 sound card + Poisk-1 sound card - Copyright MESS Team. - Visit http://mamedev.org for licensing and usage restrictions. + Copyright MESS Team. + Visit http://mamedev.org for licensing and usage restrictions. **********************************************************************/ @@ -34,7 +34,7 @@ public: p1_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // Optional information overrides - virtual machine_config_constructor device_mconfig_additions() const override; + virtual machine_config_constructor device_mconfig_additions() const override; DECLARE_READ8_MEMBER(d14_r); DECLARE_READ8_MEMBER(d16_r); @@ -53,12 +53,12 @@ protected: virtual void device_reset() override; private: - uint8_t m_dac_data[16]; - int m_dac_ptr; + uint8_t m_dac_data[16]; + int m_dac_ptr; required_device<dac_byte_interface> m_dac; - optional_device<filter_rc_device> m_filter; - required_device<i8251_device> m_midi; + optional_device<filter_rc_device> m_filter; + required_device<i8251_device> m_midi; required_device<pit8253_device> m_d14; required_device<pit8253_device> m_d16; required_device<pit8253_device> m_d17; diff --git a/src/lib/formats/asst128_dsk.cpp b/src/lib/formats/asst128_dsk.cpp index fe64cc725ee..9cc0fb8fd71 100644 --- a/src/lib/formats/asst128_dsk.cpp +++ b/src/lib/formats/asst128_dsk.cpp @@ -2,9 +2,9 @@ // copyright-holders:Olivier Galibert /********************************************************************* - formats/asst128_dsk.c + formats/asst128_dsk.c - asst128 format + asst128 format *********************************************************************/ diff --git a/src/lib/formats/asst128_dsk.h b/src/lib/formats/asst128_dsk.h index b19aab50f27..5d839f78b3d 100644 --- a/src/lib/formats/asst128_dsk.h +++ b/src/lib/formats/asst128_dsk.h @@ -2,9 +2,9 @@ // copyright-holders:Olivier Galibert /********************************************************************* - formats/asst128_dsk.h + formats/asst128_dsk.h - asst128 format + asst128 format *********************************************************************/ diff --git a/src/mame/drivers/asst128.cpp b/src/mame/drivers/asst128.cpp index 78062f8b173..4af137fe625 100644 --- a/src/mame/drivers/asst128.cpp +++ b/src/mame/drivers/asst128.cpp @@ -39,7 +39,7 @@ public: required_device<cpu_device> m_maincpu; required_device<pc_fdc_xt_device> m_fdc; - DECLARE_FLOPPY_FORMATS( asst128_formats ); + DECLARE_FLOPPY_FORMATS(asst128_formats); DECLARE_WRITE8_MEMBER(asst128_fdc_dor_w); void machine_start() override; @@ -47,9 +47,9 @@ public: void asst128_state::machine_start() { - memory_region* font = memregion(":board0:cga_mc1502:gfx1"); - memcpy(font->base(), memregion("bios")->base()+0xfa6e, 0x0400); - memcpy(font->base()+0x0400, memregion("bios")->base()+0x4000, 0x0400); + memory_region *font = memregion(":board0:cga_mc1502:gfx1"); + memcpy(font->base(), memregion("bios")->base() + 0xfa6e, 0x0400); + memcpy(font->base() + 0x0400, memregion("bios")->base() + 0x4000, 0x0400); } WRITE8_MEMBER(asst128_state::asst128_fdc_dor_w) diff --git a/src/mame/drivers/bitgraph.cpp b/src/mame/drivers/bitgraph.cpp index e2ce9502253..99d9b5e7e3d 100644 --- a/src/mame/drivers/bitgraph.cpp +++ b/src/mame/drivers/bitgraph.cpp @@ -2,40 +2,40 @@ // copyright-holders:Sergey Svishchev /*************************************************************************** - BBN BitGraph -- monochrome, raster graphics (768x1024), serial terminal. - - Apparently had at least four hardware revisions, A-D, but which ROM - revisions support which hardware is unclear. A Versabus slot, and - various hardware and software options are mentioned in the docs. Best - guesses follow. - - Onboard hardware (common to all revisions) is - - 32K ROM - - 128K RAM (includes frame buffer) - - 3 serial ports, each driven by 6850 ACIA - - some kind of baud rate generator, possibly COM8016 - - sync serial port, driven by 6854 but apparently never supported by ROM - - 682x PIA - - AY-3-891x PSG - - ER2055 EAROM - - DEC VT100 keyboard interface - - Rev A has additional 4th serial port for mouse (not supported by ROM 1.25). - Rev A has 40 hz realtime clock, the rest use 1040 hz. - Rev A-C use AY-3-8912 (with one external PIO port, to connect the EAROM). - Rev D uses AY-3-8913 (no external ports; EAROM is wired to TBD). - Rev B-D have onboard 8035 to talk to parallel printer and mouse. - Rev B-D have more memory (at least up to 512K). - - ROM 1.25 doesn't support mouse, setup mode, pixel data upload and autowrap. - - Missing/incorrect emulation: - Bidirectional keyboard interface (to drive LEDs and speaker). - 8035. - EAROM. - 1.25 only -- clksync() is dummied out -- causes watchdog resets. - Selectable memory size. - Video enable/reverse video switch. + BBN BitGraph -- monochrome, raster graphics (768x1024), serial terminal. + + Apparently had at least four hardware revisions, A-D, but which ROM + revisions support which hardware is unclear. A Versabus slot, and + various hardware and software options are mentioned in the docs. Best + guesses follow. + + Onboard hardware (common to all revisions) is + - 32K ROM + - 128K RAM (includes frame buffer) + - 3 serial ports, each driven by 6850 ACIA + - some kind of baud rate generator, possibly COM8016 + - sync serial port, driven by 6854 but apparently never supported by ROM + - 682x PIA + - AY-3-891x PSG + - ER2055 EAROM + - DEC VT100 keyboard interface + + Rev A has additional 4th serial port for mouse (not supported by ROM 1.25). + Rev A has 40 hz realtime clock, the rest use 1040 hz. + Rev A-C use AY-3-8912 (with one external PIO port, to connect the EAROM). + Rev D uses AY-3-8913 (no external ports; EAROM is wired to TBD). + Rev B-D have onboard 8035 to talk to parallel printer and mouse. + Rev B-D have more memory (at least up to 512K). + + ROM 1.25 doesn't support mouse, setup mode, pixel data upload and autowrap. + + Missing/incorrect emulation: + Bidirectional keyboard interface (to drive LEDs and speaker). + 8035. + EAROM. + 1.25 only -- clksync() is dummied out -- causes watchdog resets. + Selectable memory size. + Video enable/reverse video switch. ****************************************************************************/ @@ -112,33 +112,33 @@ public: , m_screen(*this, "screen") { } - DECLARE_READ8_MEMBER( pia_r ); - DECLARE_WRITE8_MEMBER( pia_w ); - DECLARE_READ8_MEMBER( pia_pa_r ); - DECLARE_READ8_MEMBER( pia_pb_r ); - DECLARE_WRITE8_MEMBER( pia_pa_w ); - DECLARE_WRITE8_MEMBER( pia_pb_w ); - DECLARE_READ_LINE_MEMBER( pia_ca1_r ); - DECLARE_WRITE_LINE_MEMBER( pia_cb2_w ); + DECLARE_READ8_MEMBER(pia_r); + DECLARE_WRITE8_MEMBER(pia_w); + DECLARE_READ8_MEMBER(pia_pa_r); + DECLARE_READ8_MEMBER(pia_pb_r); + DECLARE_WRITE8_MEMBER(pia_pa_w); + DECLARE_WRITE8_MEMBER(pia_pb_w); + DECLARE_READ_LINE_MEMBER(pia_ca1_r); + DECLARE_WRITE_LINE_MEMBER(pia_cb2_w); - DECLARE_WRITE16_MEMBER( baud_write ); - DECLARE_WRITE_LINE_MEMBER( com8116_a_fr_w ); - DECLARE_WRITE_LINE_MEMBER( com8116_a_ft_w ); - DECLARE_WRITE_LINE_MEMBER( com8116_b_fr_w ); - DECLARE_WRITE_LINE_MEMBER( com8116_b_ft_w ); + DECLARE_WRITE16_MEMBER(baud_write); + DECLARE_WRITE_LINE_MEMBER(com8116_a_fr_w); + DECLARE_WRITE_LINE_MEMBER(com8116_a_ft_w); + DECLARE_WRITE_LINE_MEMBER(com8116_b_fr_w); + DECLARE_WRITE_LINE_MEMBER(com8116_b_ft_w); - DECLARE_READ8_MEMBER( adlc_r ); - DECLARE_WRITE8_MEMBER( adlc_w ); + DECLARE_READ8_MEMBER(adlc_r); + DECLARE_WRITE8_MEMBER(adlc_w); - DECLARE_WRITE8_MEMBER( earom_write ); - DECLARE_WRITE8_MEMBER( misccr_write ); - DECLARE_WRITE_LINE_MEMBER( system_clock_write ); + DECLARE_WRITE8_MEMBER(earom_write); + DECLARE_WRITE8_MEMBER(misccr_write); + DECLARE_WRITE_LINE_MEMBER(system_clock_write); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - DECLARE_READ8_MEMBER( ppu_read ); - DECLARE_WRITE8_MEMBER( ppu_write ); - DECLARE_WRITE8_MEMBER( ppu_i8243_w ); + DECLARE_READ8_MEMBER(ppu_read); + DECLARE_WRITE8_MEMBER(ppu_write); + DECLARE_WRITE8_MEMBER(ppu_i8243_w); private: virtual void machine_start() override; @@ -195,8 +195,8 @@ static ADDRESS_MAP_START(bitgraphb_mem, AS_PROGRAM, 16, bitgraph_state) AM_RANGE(0x010020, 0x010027) AM_READWRITE8(adlc_r, adlc_w, 0xff00) AM_RANGE(0x010028, 0x01002f) AM_READWRITE8(pia_r, pia_w, 0xff00) // EAROM, PSG AM_RANGE(0x010030, 0x010031) AM_WRITE(baud_write) -// AM_RANGE(0x010030, 0x010037) AM_READ8(ppu_read, 0x00ff) -// AM_RANGE(0x010038, 0x01003f) AM_WRITE8(ppu_write, 0x00ff) +// AM_RANGE(0x010030, 0x010037) AM_READ8(ppu_read, 0x00ff) +// AM_RANGE(0x010038, 0x01003f) AM_WRITE8(ppu_write, 0x00ff) AM_RANGE(0x380000, 0x3fffff) AM_RAM ADDRESS_MAP_END @@ -205,14 +205,14 @@ INPUT_PORTS_END READ8_MEMBER(bitgraph_state::pia_r) { - DBG_LOG(3,"PIA", ("R %d\n", offset)); - return m_pia->read(space, 3-offset); + DBG_LOG(3, "PIA", ("R %d\n", offset)); + return m_pia->read(space, 3 - offset); } WRITE8_MEMBER(bitgraph_state::pia_w) { - DBG_LOG(3,"PIA", ("W %d < %02X\n", offset, data)); - return m_pia->write(space, 3-offset, data); + DBG_LOG(3, "PIA", ("W %d < %02X\n", offset, data)); + return m_pia->write(space, 3 - offset, data); } READ_LINE_MEMBER(bitgraph_state::pia_ca1_r) @@ -228,76 +228,87 @@ WRITE_LINE_MEMBER(bitgraph_state::pia_cb2_w) READ8_MEMBER(bitgraph_state::pia_pa_r) { uint8_t data = BIT(m_pia_b, 3) ? m_earom->data() : m_pia_a; - DBG_LOG(2,"PIA", ("A == %02X (%s)\n", data, BIT(m_pia_b, 3) ? "earom" : "pia")); + DBG_LOG(2, "PIA", ("A == %02X (%s)\n", data, BIT(m_pia_b, 3) ? "earom" : "pia")); return data; } WRITE8_MEMBER(bitgraph_state::pia_pa_w) { - DBG_LOG(2,"PIA", ("A <- %02X\n", data)); + DBG_LOG(2, "PIA", ("A <- %02X\n", data)); m_pia_a = data; } /* - B0 O: BC1 to noisemaker. - B1 O: BDIR to noisemaker. - B2 O: Clock for EAROM. - B3 O: CS1 for EAROM. - B4 O: Enable HDLC Xmt interrupt. - B5 O: Enable HDLC Rcv interrupt. - B6 O: Clear Clock interrupt. Must write a 0 [clear interrupt], then a 1. - B7 I: EVEN field ?? + B0 O: BC1 to noisemaker. + B1 O: BDIR to noisemaker. + B2 O: Clock for EAROM. + B3 O: CS1 for EAROM. + B4 O: Enable HDLC Xmt interrupt. + B5 O: Enable HDLC Rcv interrupt. + B6 O: Clear Clock interrupt. Must write a 0 [clear interrupt], then a 1. + B7 I: EVEN field ?? */ READ8_MEMBER(bitgraph_state::pia_pb_r) { - DBG_LOG(2,"PIA", ("B == %02X\n", m_pia_b)); + DBG_LOG(2, "PIA", ("B == %02X\n", m_pia_b)); return m_pia_b; } WRITE8_MEMBER(bitgraph_state::pia_pb_w) { - DBG_LOG(2,"PIA", ("B <- %02X\n", data)); + DBG_LOG(2, "PIA", ("B <- %02X\n", data)); m_pia_b = data; - switch (m_pia_b & 0x03) { - case 2: m_psg->data_w(space, 0, m_pia_a); break; - case 3: m_psg->address_w(space, 0, m_pia_a); break; + switch (m_pia_b & 0x03) + { + case 2: + m_psg->data_w(space, 0, m_pia_a); + break; + case 3: + m_psg->address_w(space, 0, m_pia_a); + break; } - if (BIT(m_pia_b, 3)) { - DBG_LOG(2,"EAROM", ("data <- %02X\n", m_pia_a)); + if (BIT(m_pia_b, 3)) + { + DBG_LOG(2, "EAROM", ("data <- %02X\n", m_pia_a)); m_earom->set_data(m_pia_a); } // CS1, ~CS2, C1, C2, CK m_earom->set_control(BIT(m_pia_b, 3), BIT(m_pia_b, 3), BIT(m_pia_a, 6), BIT(m_pia_a, 7), BIT(m_pia_b, 2)); - if (!BIT(m_pia_b, 6)) { + if (!BIT(m_pia_b, 6)) + { m_maincpu->set_input_line(M68K_IRQ_6, CLEAR_LINE); } } WRITE8_MEMBER(bitgraph_state::earom_write) { - DBG_LOG(2,"EAROM", ("addr <- %02X (%02X)\n", data & 0x3f, data)); + DBG_LOG(2, "EAROM", ("addr <- %02X (%02X)\n", data & 0x3f, data)); m_earom->set_address(data & 0x3f); } // written once and never changed WRITE8_MEMBER(bitgraph_state::misccr_write) { - DBG_LOG(1,"MISCCR", ("<- %02X (DTR %d MAP %d)\n", data, BIT(data, 3), (data & 3))); + DBG_LOG(1, "MISCCR", ("<- %02X (DTR %d MAP %d)\n", data, BIT(data, 3), (data & 3))); m_misccr = data; } WRITE_LINE_MEMBER(bitgraph_state::system_clock_write) { - if (!BIT(m_pia_b, 6)) { + if (!BIT(m_pia_b, 6)) + { m_maincpu->set_input_line(M68K_IRQ_6, CLEAR_LINE); return; } - if (state) { + if (state) + { m_maincpu->set_input_line_and_vector(M68K_IRQ_6, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR); - } else { + } + else + { m_maincpu->set_input_line(M68K_IRQ_6, CLEAR_LINE); } } @@ -331,7 +342,8 @@ WRITE_LINE_MEMBER(bitgraph_state::com8116_b_fr_w) WRITE_LINE_MEMBER(bitgraph_state::com8116_b_ft_w) { - if (m_acia3) { + if (m_acia3) + { m_acia3->write_txc(state); m_acia3->write_rxc(state); } @@ -339,28 +351,28 @@ WRITE_LINE_MEMBER(bitgraph_state::com8116_b_ft_w) READ8_MEMBER(bitgraph_state::adlc_r) { - DBG_LOG(1,"ADLC", ("R %d\n", offset)); - return m_adlc ? m_adlc->read(space, 3-offset) : 0xff; + DBG_LOG(1, "ADLC", ("R %d\n", offset)); + return m_adlc ? m_adlc->read(space, 3 - offset) : 0xff; } WRITE8_MEMBER(bitgraph_state::adlc_w) { - DBG_LOG(1,"ADLC", ("W %d < %02X\n", offset, data)); - if (m_adlc) return m_adlc->write(space, 3-offset, data); + DBG_LOG(1, "ADLC", ("W %d < %02X\n", offset, data)); + if (m_adlc) return m_adlc->write(space, 3 - offset, data); } uint32_t bitgraph_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - uint8_t gfx=0; - int x,y; + uint8_t gfx = 0; + int x, y; for (y = 0; y < 768; y++) { uint16_t *p = &bitmap.pix16(y); - for (x = 0; x < 1024/8; x+=2) + for (x = 0; x < 1024 / 8; x += 2) { - gfx = m_videoram[ (x+1) | (y<<7)]; + gfx = m_videoram[(x + 1) | (y << 7)]; *p++ = BIT(gfx, 7); *p++ = BIT(gfx, 6); @@ -371,7 +383,7 @@ uint32_t bitgraph_state::screen_update(screen_device &screen, bitmap_ind16 &bitm *p++ = BIT(gfx, 1); *p++ = BIT(gfx, 0); - gfx = m_videoram[ x | (y<<7)]; + gfx = m_videoram[x | (y << 7)]; *p++ = BIT(gfx, 7); *p++ = BIT(gfx, 6); @@ -389,58 +401,59 @@ uint32_t bitgraph_state::screen_update(screen_device &screen, bitmap_ind16 &bitm READ8_MEMBER(bitgraph_state::ppu_read) { uint8_t data = m_ppu[offset]; - DBG_LOG(1,"PPU", ("%d == %02X\n", offset, data)); + DBG_LOG(1, "PPU", ("%d == %02X\n", offset, data)); return data; } WRITE8_MEMBER(bitgraph_state::ppu_write) { - DBG_LOG(1,"PPU", ("%d <- %02X\n", offset, data)); + DBG_LOG(1, "PPU", ("%d <- %02X\n", offset, data)); m_ppu[offset] = data; } #ifdef UNUSED_FUNCTION static ADDRESS_MAP_START(ppu_io, AS_IO, 8, bitgraph_state) -// AM_RANGE(0x00, 0x00) AM_READ(ppu_irq) -// AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) -// AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(ppu_t0_r) +// AM_RANGE(0x00, 0x00) AM_READ(ppu_irq) +// AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) +// AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_READ(ppu_t0_r) AM_RANGE(MCS48_PORT_PROG, MCS48_PORT_PROG) AM_DEVWRITE("i8243", i8243_device, i8243_prog_w) ADDRESS_MAP_END #endif /* - p4 O: Centronics data 3..0 - p5 O: Centronics data 7..4 - p6 O: Centronics control - p7 I: Centronics status + p4 O: Centronics data 3..0 + p5 O: Centronics data 7..4 + p6 O: Centronics control + p7 I: Centronics status */ WRITE8_MEMBER(bitgraph_state::ppu_i8243_w) { - DBG_LOG(1,"PPU", ("8243 %d <- %02X\n", offset + 4, data)); - switch (offset) { - case 0: - m_centronics->write_data0(BIT(data, 0)); - m_centronics->write_data1(BIT(data, 1)); - m_centronics->write_data2(BIT(data, 2)); - m_centronics->write_data3(BIT(data, 3)); - break; - case 1: - m_centronics->write_data4(BIT(data, 0)); - m_centronics->write_data5(BIT(data, 1)); - m_centronics->write_data6(BIT(data, 2)); - m_centronics->write_data7(BIT(data, 3)); - break; - case 2: - m_centronics->write_strobe(BIT(data, 0)); - // 1: Paper instruction - m_centronics->write_init(BIT(data, 2)); - break; - case 3: - m_centronics->write_ack(BIT(data, 0)); - m_centronics->write_busy(BIT(data, 1)); - m_centronics->write_perror(BIT(data, 2)); - m_centronics->write_select(BIT(data, 3)); - break; + DBG_LOG(1, "PPU", ("8243 %d <- %02X\n", offset + 4, data)); + switch (offset) + { + case 0: + m_centronics->write_data0(BIT(data, 0)); + m_centronics->write_data1(BIT(data, 1)); + m_centronics->write_data2(BIT(data, 2)); + m_centronics->write_data3(BIT(data, 3)); + break; + case 1: + m_centronics->write_data4(BIT(data, 0)); + m_centronics->write_data5(BIT(data, 1)); + m_centronics->write_data6(BIT(data, 2)); + m_centronics->write_data7(BIT(data, 3)); + break; + case 2: + m_centronics->write_strobe(BIT(data, 0)); + // 1: Paper instruction + m_centronics->write_init(BIT(data, 2)); + break; + case 3: + m_centronics->write_ack(BIT(data, 0)); + m_centronics->write_busy(BIT(data, 1)); + m_centronics->write_perror(BIT(data, 2)); + m_centronics->write_select(BIT(data, 3)); + break; } } diff --git a/src/mame/drivers/dvk_ksm.cpp b/src/mame/drivers/dvk_ksm.cpp index d4d7cfec0a7..39853d47e42 100644 --- a/src/mame/drivers/dvk_ksm.cpp +++ b/src/mame/drivers/dvk_ksm.cpp @@ -2,60 +2,60 @@ // copyright-holders:Sergey Svishchev /*************************************************************************** - KSM (Kontroller Simvolnogo Monitora = Character Display Controller), - a single-board replacement for standalone 15IE-00-013 terminal (ie15.c) - in later-model DVK desktops. - - MPI (Q-Bus clone) board, consumes only power from the bus. - Interfaces with MS7004 (DEC LK201 workalike) keyboard and monochrome CRT. - - Hardware revisions (XXX verify everything): - - 7.102.076 -- has DIP switches, SRAM at 0x2000, model name "KSM" - - 7.102.228 -- no DIP switches, ?? SRAM at 0x2100, model name "KSM-01" - - Two sets of dumps exist: - - one puts SRAM at 0x2000, which is where technical manual puts it, - but chargen has 1 missing pixel in 'G' character. - - another puts SRAM at 0x2100, but has no missing pixel. - Merge them for now into one (SRAM at 0x2000 and no missing pixel). - - Emulates a VT52 without copier (ESC Z response is ESC / M), with - Hold Screen mode and Graphics character set (but it is unique and - mapped to a different range -- 100..137). - - F4 + 0..9 on numeric keypad = setup mode. 0 changes serial port speed, - 1..9 toggle one of mode bits: - - 1 XON/XOFF 0: Off 1: On - 2 Character set 0: N0/N1 2: N2 - 3 Auto LF 0: Off 1: On - 4 Auto repeat 0: On 1: Off - 5 Auto wraparound 0: On 1: Off - 6 Interpret controls 0: Interpret 1: Display - 7 Parity check 0: Off 1: On - 8 Parity bits 0: None 1: Even - 9 Stop bits - - N0/N1 charset has regular ASCII in C0 page and Cyrillic in C1 page, - switching between them via SI/SO. N2 charset has uppercase Cyrillic - chars in place of lowercase Latin ones. - - ESC toggles Cyrillic/Latin mode (depends in the host's terminal driver) - F1 toggles Hold Screen mode (also depends in the host's terminal driver) - F9 resets terminal (clears memory). - F20 toggles on/off-line mode. - - Terminfo description: + KSM (Kontroller Simvolnogo Monitora = Character Display Controller), + a single-board replacement for standalone 15IE-00-013 terminal (ie15.c) + in later-model DVK desktops. + + MPI (Q-Bus clone) board, consumes only power from the bus. + Interfaces with MS7004 (DEC LK201 workalike) keyboard and monochrome CRT. + + Hardware revisions (XXX verify everything): + - 7.102.076 -- has DIP switches, SRAM at 0x2000, model name "KSM" + - 7.102.228 -- no DIP switches, ?? SRAM at 0x2100, model name "KSM-01" + + Two sets of dumps exist: + - one puts SRAM at 0x2000, which is where technical manual puts it, + but chargen has 1 missing pixel in 'G' character. + - another puts SRAM at 0x2100, but has no missing pixel. + Merge them for now into one (SRAM at 0x2000 and no missing pixel). + + Emulates a VT52 without copier (ESC Z response is ESC / M), with + Hold Screen mode and Graphics character set (but it is unique and + mapped to a different range -- 100..137). + + F4 + 0..9 on numeric keypad = setup mode. 0 changes serial port speed, + 1..9 toggle one of mode bits: + + 1 XON/XOFF 0: Off 1: On + 2 Character set 0: N0/N1 2: N2 + 3 Auto LF 0: Off 1: On + 4 Auto repeat 0: On 1: Off + 5 Auto wraparound 0: On 1: Off + 6 Interpret controls 0: Interpret 1: Display + 7 Parity check 0: Off 1: On + 8 Parity bits 0: None 1: Even + 9 Stop bits + + N0/N1 charset has regular ASCII in C0 page and Cyrillic in C1 page, + switching between them via SI/SO. N2 charset has uppercase Cyrillic + chars in place of lowercase Latin ones. + + ESC toggles Cyrillic/Latin mode (depends in the host's terminal driver) + F1 toggles Hold Screen mode (also depends in the host's terminal driver) + F9 resets terminal (clears memory). + F20 toggles on/off-line mode. + + Terminfo description: ksm|DVK KSM, - am, bw, dch1=\EP, ich1=\EQ, - acsc=hRiTjXkClJmFnNqUtEuPv\174wKxW.M\054Q\055S\053\136~_{@}Z0\177, - use=vt52, + am, bw, dch1=\EP, ich1=\EQ, + acsc=hRiTjXkClJmFnNqUtEuPv\174wKxW.M\054Q\055S\053\136~_{@}Z0\177, + use=vt52, - To do: - - verify if pixel stretching is done by hw - - verify details of hw revisions (memory map, DIP presence...) - - baud rate selection + To do: + - verify if pixel stretching is done by hw + - verify details of hw revisions (memory map, DIP presence...) + - baud rate selection ****************************************************************************/ @@ -115,28 +115,30 @@ public: TIMER_DEVICE_CALLBACK_MEMBER( scanline_callback ); + virtual void machine_reset() override; + virtual void video_start() override; + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + DECLARE_WRITE_LINE_MEMBER(write_keyboard_clock); DECLARE_WRITE_LINE_MEMBER(write_line_clock); DECLARE_WRITE8_MEMBER(ksm_ppi_porta_w); DECLARE_WRITE8_MEMBER(ksm_ppi_portc_w); - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); private: uint32_t draw_scanline(uint16_t *p, uint16_t offset, uint8_t scanline); rectangle m_tmpclip; bitmap_ind16 m_tmpbmp; - struct { + struct + { uint8_t line; uint16_t ptr; } m_video; - virtual void machine_reset() override; - virtual void video_start() override; required_shared_ptr<uint8_t> m_p_videoram; required_device<cpu_device> m_maincpu; - required_device<pic8259_device> m_pic8259; + required_device<pic8259_device> m_pic8259; required_device<i8251_device> m_i8251line; required_device<rs232_port_device> m_rs232; required_device<i8251_device> m_i8251kbd; @@ -211,19 +213,19 @@ void ksm_state::machine_reset() void ksm_state::video_start() { - m_tmpclip = rectangle(0, KSM_DISP_HORZ-1, 0, KSM_DISP_VERT-1); + m_tmpclip = rectangle(0, KSM_DISP_HORZ - 1, 0, KSM_DISP_VERT - 1); m_tmpbmp.allocate(KSM_DISP_HORZ, KSM_DISP_VERT); } WRITE8_MEMBER(ksm_state::ksm_ppi_porta_w) { - DBG_LOG(1,"PPI port A", ("line %d\n", data)); + DBG_LOG(1, "PPI port A", ("line %d\n", data)); m_video.line = data; } WRITE8_MEMBER(ksm_state::ksm_ppi_portc_w) { - DBG_LOG(1,"PPI port C", ("blink %d speed %d\n", BIT(data, 7), ((data >> 4) & 7) )); + DBG_LOG(1, "PPI port C", ("blink %d speed %d\n", BIT(data, 7), ((data >> 4) & 7))); } WRITE_LINE_MEMBER(ksm_state::write_keyboard_clock) @@ -239,19 +241,19 @@ WRITE_LINE_MEMBER(ksm_state::write_line_clock) } /* - Raster size is 28x11 scan lines. - XXX VBlank is active for 2 topmost on-screen rows and 1 at the bottom. + Raster size is 28x11 scan lines. + XXX VBlank is active for 2 topmost on-screen rows and 1 at the bottom. - Usable raster is 800 x 275 pixels (80 x 25 characters). 24 lines are - available to the user and 25th (topmost) line is the status line. - Status line displays current serial port speed and 9 setup bits. + Usable raster is 800 x 275 pixels (80 x 25 characters). 24 lines are + available to the user and 25th (topmost) line is the status line. + Status line displays current serial port speed and 9 setup bits. - No character attributes are available, but in 'display controls' mode - control characters stored in memory are shown as blinking chars. + No character attributes are available, but in 'display controls' mode + control characters stored in memory are shown as blinking chars. - Character cell is 10 x 11; character generator provides 7 x 8 of that. - 3 extra horizontal pixels are always XXX blank. Blinking XXX cursor may be - displayed on 3 extra scan lines. + Character cell is 10 x 11; character generator provides 7 x 8 of that. + 3 extra horizontal pixels are always XXX blank. Blinking XXX cursor may be + displayed on 3 extra scan lines. */ uint32_t ksm_state::draw_scanline(uint16_t *p, uint16_t offset, uint8_t scanline) @@ -259,9 +261,12 @@ uint32_t ksm_state::draw_scanline(uint16_t *p, uint16_t offset, uint8_t scanline uint8_t gfx, fg, bg, ra, blink; uint16_t x, chr; - bg = 0; fg = 1; ra = scanline % 8; + bg = 0; + fg = 1; + ra = scanline % 8; blink = (m_screen->frame_number() % 10) > 4; - if (scanline > 7) { + if (scanline > 7) + { offset -= 0x2000; } @@ -270,8 +275,7 @@ uint32_t ksm_state::draw_scanline(uint16_t *p, uint16_t offset, uint8_t scanline chr = m_p_videoram[x] << 3; gfx = m_p_chargen[chr | ra]; - if ((scanline > 7 && blink) || ((chr < (0x20<<3)) && !blink)) - gfx = 0; + if ((scanline > 7 && blink) || ((chr < (0x20 << 3)) && !blink)) gfx = 0; *p++ = BIT(gfx, 6) ? fg : bg; *p++ = BIT(gfx, 5) ? fg : bg; @@ -300,13 +304,16 @@ TIMER_DEVICE_CALLBACK_MEMBER(ksm_state::scanline_callback) y -= KSM_VERT_START; if (y >= KSM_DISP_VERT) return; - if (y < KSM_STATUSLINE_TOTAL) { + if (y < KSM_STATUSLINE_TOTAL) + { offset = KSM_STATUSLINE_VRAM - 0xC000; - } else { - offset = 0x2000 + 0x30 + (((m_video.line + y/11 - 1) % 48) << 7); + } + else + { + offset = 0x2000 + 0x30 + (((m_video.line + y / 11 - 1) % 48) << 7); } - draw_scanline(&m_tmpbmp.pix16(y), offset, y%11); + draw_scanline(&m_tmpbmp.pix16(y), offset, y % 11); } uint32_t ksm_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) diff --git a/src/mame/drivers/ec184x.cpp b/src/mame/drivers/ec184x.cpp index c72b309928b..0f959b713b2 100644 --- a/src/mame/drivers/ec184x.cpp +++ b/src/mame/drivers/ec184x.cpp @@ -2,9 +2,9 @@ // copyright-holders:Sergey Svishchev /*************************************************************************** - drivers/ec184x.c + drivers/ec184x.c - Driver file for EC-184x series + Driver file for EC-184x series ***************************************************************************/ @@ -33,20 +33,21 @@ } while (0) - class ec184x_state : public driver_device { public: ec184x_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) , - m_maincpu(*this, "maincpu") { } + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { } required_device<cpu_device> m_maincpu; DECLARE_MACHINE_RESET(ec1841); DECLARE_DRIVER_INIT(ec1841); - struct { + struct + { uint8_t enable[4]; int boards; } m_memory; @@ -83,7 +84,7 @@ READ8_MEMBER(ec184x_state::memboard_r) data = 0xff; else data = m_memory.enable[data]; - DBG_LOG(1,"ec1841_memboard",("R (%d of %d) == %02X\n", offset+1, m_memory.boards, data )); + DBG_LOG(1, "ec1841_memboard", ("R (%d of %d) == %02X\n", offset + 1, m_memory.boards, data)); return data; } @@ -96,71 +97,76 @@ WRITE8_MEMBER(ec184x_state::memboard_w) current = m_memory.enable[offset]; - DBG_LOG(1,"ec1841_memboard",("W (%d of %d) <- %02X (%02X)\n", offset+1, m_memory.boards, data, current)); + DBG_LOG(1, "ec1841_memboard", ("W (%d of %d) <- %02X (%02X)\n", offset + 1, m_memory.boards, data, current)); - if (offset >= m_memory.boards) { + if (offset >= m_memory.boards) + { return; } - if (BIT(current, 2) && !BIT(data, 2)) { + if (BIT(current, 2) && !BIT(data, 2)) + { // disable read access - program.unmap_read(0, EC1841_MEMBOARD_SIZE-1); - DBG_LOG(1,"ec1841_memboard_w",("unmap_read(%d)\n", offset)); + program.unmap_read(0, EC1841_MEMBOARD_SIZE - 1); + DBG_LOG(1, "ec1841_memboard_w", ("unmap_read(%d)\n", offset)); } - if (BIT(current, 3) && !BIT(data, 3)) { + if (BIT(current, 3) && !BIT(data, 3)) + { // disable write access - program.unmap_write(0, EC1841_MEMBOARD_SIZE-1); - DBG_LOG(1,"ec1841_memboard_w",("unmap_write(%d)\n", offset)); + program.unmap_write(0, EC1841_MEMBOARD_SIZE - 1); + DBG_LOG(1, "ec1841_memboard_w", ("unmap_write(%d)\n", offset)); } - if (!BIT(current, 2) && BIT(data, 2)) { - for(int i=0; i<4; i++) + if (!BIT(current, 2) && BIT(data, 2)) + { + for (int i = 0; i < 4; i++) m_memory.enable[i] &= 0xfb; // enable read access - membank("bank10")->set_base(m_ram->pointer() + offset*EC1841_MEMBOARD_SIZE); - program.install_read_bank(0, EC1841_MEMBOARD_SIZE-1, "bank10"); - DBG_LOG(1,"ec1841_memboard_w",("map_read(%d)\n", offset)); + membank("bank10")->set_base(m_ram->pointer() + offset * EC1841_MEMBOARD_SIZE); + program.install_read_bank(0, EC1841_MEMBOARD_SIZE - 1, "bank10"); + DBG_LOG(1, "ec1841_memboard_w", ("map_read(%d)\n", offset)); } - if (!BIT(current, 3) && BIT(data, 3)) { - for(int i=0; i<4; i++) + if (!BIT(current, 3) && BIT(data, 3)) + { + for (int i = 0; i < 4; i++) m_memory.enable[i] &= 0xf7; // enable write access - membank("bank20")->set_base(m_ram->pointer() + offset*EC1841_MEMBOARD_SIZE); - program.install_write_bank(0, EC1841_MEMBOARD_SIZE-1, "bank20"); - DBG_LOG(1,"ec1841_memboard_w",("map_write(%d)\n", offset)); + membank("bank20")->set_base(m_ram->pointer() + offset * EC1841_MEMBOARD_SIZE); + program.install_write_bank(0, EC1841_MEMBOARD_SIZE - 1, "bank20"); + DBG_LOG(1, "ec1841_memboard_w", ("map_write(%d)\n", offset)); } m_memory.enable[offset] = data; } -DRIVER_INIT_MEMBER( ec184x_state, ec1841 ) +DRIVER_INIT_MEMBER(ec184x_state, ec1841) { address_space &program = m_maincpu->space(AS_PROGRAM); ram_device *m_ram = machine().device<ram_device>(RAM_TAG); - m_memory.boards = m_ram->size()/EC1841_MEMBOARD_SIZE; - if (m_memory.boards > 4) - m_memory.boards = 4; + m_memory.boards = m_ram->size() / EC1841_MEMBOARD_SIZE; + if (m_memory.boards > 4) m_memory.boards = 4; program.install_read_bank(0, EC1841_MEMBOARD_SIZE-1, "bank10"); program.install_write_bank(0, EC1841_MEMBOARD_SIZE-1, "bank20"); - membank( "bank10" )->set_base( m_ram->pointer() ); - membank( "bank20" )->set_base( m_ram->pointer() ); + membank("bank10")->set_base(m_ram->pointer()); + membank("bank20")->set_base(m_ram->pointer()); // 640K configuration is special -- 512K board mapped at 0 + 128K board mapped at 512K // XXX verify this was actually the case - if (m_ram->size() == 640*1024) { - program.install_read_bank(EC1841_MEMBOARD_SIZE, m_ram->size()-1, "bank11"); - program.install_write_bank(EC1841_MEMBOARD_SIZE, m_ram->size()-1, "bank21"); - membank( "bank11" )->set_base( m_ram->pointer() + EC1841_MEMBOARD_SIZE ); - membank( "bank21" )->set_base( m_ram->pointer() + EC1841_MEMBOARD_SIZE ); + if (m_ram->size() == 640 * 1024) + { + program.install_read_bank(EC1841_MEMBOARD_SIZE, m_ram->size() - 1, "bank11"); + program.install_write_bank(EC1841_MEMBOARD_SIZE, m_ram->size() - 1, "bank21"); + membank("bank11")->set_base(m_ram->pointer() + EC1841_MEMBOARD_SIZE); + membank("bank21")->set_base(m_ram->pointer() + EC1841_MEMBOARD_SIZE); } } -MACHINE_RESET_MEMBER( ec184x_state, ec1841 ) +MACHINE_RESET_MEMBER(ec184x_state, ec1841) { memset(m_memory.enable, 0, sizeof(m_memory.enable)); // mark 1st board enabled diff --git a/src/mame/drivers/iskr103x.cpp b/src/mame/drivers/iskr103x.cpp index 75749b27656..3edef43c13d 100644 --- a/src/mame/drivers/iskr103x.cpp +++ b/src/mame/drivers/iskr103x.cpp @@ -2,15 +2,15 @@ // copyright-holders:Sergey Svishchev /*************************************************************************** - drivers/iskr103x.c + drivers/iskr103x.c - Driver file for Iskra-1030, 1031 + Driver file for Iskra-1030, 1031 - TODO - - fix cyrillic chargen upload for CGA and MDA - - replace DIP switch definition - - keyboard test is not passing (code 301) - - hard disk is connected but untested + TODO + - fix cyrillic chargen upload for CGA and MDA + - replace DIP switch definition + - keyboard test is not passing (code 301) + - hard disk is connected but untested ***************************************************************************/ @@ -31,8 +31,9 @@ class iskr103x_state : public driver_device { public: iskr103x_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) , - m_maincpu(*this, "maincpu") { } + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { } required_device<cpu_device> m_maincpu; }; diff --git a/src/mame/drivers/mc1502.cpp b/src/mame/drivers/mc1502.cpp index b62b15481ae..abb22a65c03 100644 --- a/src/mame/drivers/mc1502.cpp +++ b/src/mame/drivers/mc1502.cpp @@ -2,9 +2,9 @@ // copyright-holders:Sergey Svishchev /*************************************************************************** - drivers/mc1502.c + drivers/mc1502.c - Driver file for Electronika MC 1502 + Driver file for Elektronika MS 1502 ***************************************************************************/ @@ -64,13 +64,16 @@ TIMER_CALLBACK_MEMBER(mc1502_state::keyb_signal_callback) keep pulsing while any key is pressed, and pulse one time after all keys are released. */ - if (key) { - if (m_kbd.pulsing < 2) { + if (key) + { + if (m_kbd.pulsing < 2) + { m_kbd.pulsing += 2; } } - if (m_kbd.pulsing) { + if (m_kbd.pulsing) + { m_pic8259->ir1_w(m_kbd.pulsing & 1); m_kbd.pulsing--; } @@ -105,9 +108,9 @@ READ8_MEMBER(mc1502_state::mc1502_ppi_portc_r) int data = 0xff; double tap_val = m_cassette->input(); - data = ( data & ~0x40 ) | ( tap_val < 0 ? 0x40 : 0x00 ) | ( (BIT(m_ppi_portb, 7) && m_pit_out2) ? 0x40 : 0x00 ); - data = ( data & ~0x20 ) | ( m_pit_out2 ? 0x20 : 0x00 ); - data = ( data & ~0x10 ) | ( (BIT(m_ppi_portb, 1) && m_pit_out2) ? 0x10 : 0x00 ); + data = (data & ~0x40) | (tap_val < 0 ? 0x40 : 0x00) | ((BIT(m_ppi_portb, 7) && m_pit_out2) ? 0x40 : 0x00); + data = (data & ~0x20) | (m_pit_out2 ? 0x20 : 0x00); + data = (data & ~0x10) | ((BIT(m_ppi_portb, 1) && m_pit_out2) ? 0x10 : 0x00); // DBG_LOG(2,"mc1502_ppi_portc_r",("= %02X (tap_val %f t2out %d) at %s\n", // data, tap_val, m_pit_out2, machine().describe_context())); @@ -155,7 +158,7 @@ WRITE8_MEMBER(mc1502_state::mc1502_kppi_portc_w) WRITE_LINE_MEMBER(mc1502_state::mc1502_i8251_syndet) { - if (!BIT(m_ppi_portc,3)) + if (!BIT(m_ppi_portc, 3)) m_maincpu->set_input_line(INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE); } @@ -178,35 +181,36 @@ WRITE_LINE_MEMBER(mc1502_state::mc1502_speaker_set_spkrdata) m_speaker->level_w(m_spkrdata & m_pit_out2); } -DRIVER_INIT_MEMBER( mc1502_state, mc1502 ) +DRIVER_INIT_MEMBER(mc1502_state, mc1502) { address_space &program = m_maincpu->space(AS_PROGRAM); - DBG_LOG(0,"init",("driver_init()\n")); + DBG_LOG(0, "init", ("driver_init()\n")); - program.install_readwrite_bank(0, m_ram->size()-1, "bank10"); - membank( "bank10" )->set_base( m_ram->pointer() ); + program.install_readwrite_bank(0, m_ram->size() - 1, "bank10"); + membank("bank10")->set_base(m_ram->pointer()); } -MACHINE_START_MEMBER( mc1502_state, mc1502 ) +MACHINE_START_MEMBER(mc1502_state, mc1502) { - DBG_LOG(0,"init",("machine_start()\n")); + DBG_LOG(0, "init", ("machine_start()\n")); /* - Keyboard polling circuit holds IRQ1 high until a key is - pressed, then it starts a timer that pulses IRQ1 low each - 40ms (check) for 20ms (check) until all keys are released. - Last pulse causes BIOS to write a 'break' scancode into port 60h. + Keyboard polling circuit holds IRQ1 high until a key is + pressed, then it starts a timer that pulses IRQ1 low each + 40ms (check) for 20ms (check) until all keys are released. + Last pulse causes BIOS to write a 'break' scancode into port 60h. */ m_pic8259->ir1_w(1); memset(&m_kbd, 0, sizeof(m_kbd)); - m_kbd.keyb_signal_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mc1502_state::keyb_signal_callback),this)); - m_kbd.keyb_signal_timer->adjust( attotime::from_msec(20), 0, attotime::from_msec(20) ); + m_kbd.keyb_signal_timer = + machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mc1502_state::keyb_signal_callback), this)); + m_kbd.keyb_signal_timer->adjust(attotime::from_msec(20), 0, attotime::from_msec(20)); } -MACHINE_RESET_MEMBER( mc1502_state, mc1502 ) +MACHINE_RESET_MEMBER(mc1502_state, mc1502) { - DBG_LOG(0,"init",("machine_reset()\n")); + DBG_LOG(0, "init", ("machine_reset()\n")); m_spkrdata = 0; m_pit_out2 = 1; @@ -254,7 +258,7 @@ static MACHINE_CONFIG_START( mc1502, mc1502_state ) MCFG_PIT8253_CLK2(XTAL_16MHz/12) /* pio port c pin 4, and speaker polling enough */ MCFG_PIT8253_OUT2_HANDLER(WRITELINE(mc1502_state, mc1502_pit8253_out2_changed)) - MCFG_PIC8259_ADD( "pic8259", INPUTLINE("maincpu", 0), VCC, NOOP) + MCFG_PIC8259_ADD("pic8259", INPUTLINE("maincpu", 0), VCC, NOOP) MCFG_DEVICE_ADD("ppi8255n1", I8255, 0) MCFG_I8255_OUT_PORTA_CB(DEVWRITE8("cent_data_out", output_latch_device, write)) @@ -268,7 +272,7 @@ static MACHINE_CONFIG_START( mc1502, mc1502_state ) MCFG_I8255_IN_PORTC_CB(DEVREAD8("cent_status_in", input_buffer_device, read)) MCFG_I8255_OUT_PORTC_CB(WRITE8(mc1502_state, mc1502_kppi_portc_w)) - MCFG_DEVICE_ADD( "upd8251", I8251, 0) + MCFG_DEVICE_ADD("upd8251", I8251, 0) MCFG_I8251_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd)) MCFG_I8251_DTR_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_dtr)) MCFG_I8251_RTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts)) @@ -314,7 +318,7 @@ static MACHINE_CONFIG_START( mc1502, mc1502_state ) MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_ENABLED) MCFG_SOFTWARE_LIST_ADD("flop_list","mc1502_flop") -// MCFG_SOFTWARE_LIST_ADD("cass_list","mc1502_cass") +// MCFG_SOFTWARE_LIST_ADD("cass_list","mc1502_cass") MCFG_RAM_ADD(RAM_TAG) MCFG_RAM_DEFAULT_SIZE("608K") /* 96 base + 512 on expansion card */ @@ -395,5 +399,5 @@ ROM_END ***************************************************************************/ /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */ -COMP ( 1989, mc1502, ibm5150, 0, mc1502, mc1502, mc1502_state, mc1502, "NPO Microprocessor", "Elektronika MC-1502", 0) -COMP ( 1988, pk88, ibm5150, 0, mc1502, mc1502, mc1502_state, mc1502, "NPO Microprocessor", "Elektronika PK-88", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) +COMP ( 1989, mc1502, 0, 0, mc1502, mc1502, mc1502_state, mc1502, "NPO Microprocessor", "Elektronika MS 1502", 0) +COMP ( 1988, pk88, 0, 0, mc1502, mc1502, mc1502_state, mc1502, "NPO Microprocessor", "Elektronika PK-88", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) diff --git a/src/mame/drivers/poisk1.cpp b/src/mame/drivers/poisk1.cpp index 7fd8d30d95c..b55015e01db 100644 --- a/src/mame/drivers/poisk1.cpp +++ b/src/mame/drivers/poisk1.cpp @@ -2,9 +2,9 @@ // copyright-holders:Sergey Svishchev /*************************************************************************** - drivers/poisk1.c + drivers/poisk1.c - Driver file for Poisk-1 + Driver file for Poisk-1 ***************************************************************************/ @@ -29,7 +29,7 @@ #define CGA_PALETTE_SETS 83 /* one for colour, one for mono, 81 for colour composite */ -#define BG_COLOR(x) (((x) & 7)|(((x) & 0x10) >> 1)) +#define BG_COLOR(x) (((x)&7) | (((x)&0x10) >> 1)) #define VERBOSE_DBG 0 @@ -50,26 +50,27 @@ class p1_state : public driver_device { public: p1_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_pic8259(*this, "pic8259"), - m_pit8253(*this, "pit8253"), - m_ppi8255n1(*this, "ppi8255n1"), - m_ppi8255n2(*this, "ppi8255n2"), - m_isabus(*this, "isa"), - m_speaker(*this, "speaker"), - m_cassette(*this, "cassette"), - m_ram(*this, RAM_TAG), - m_palette(*this, "palette") { } - - required_device<cpu_device> m_maincpu; - required_device<pic8259_device> m_pic8259; - required_device<pit8253_device> m_pit8253; - required_device<i8255_device> m_ppi8255n1; - required_device<i8255_device> m_ppi8255n2; - required_device<isa8_device> m_isabus; - required_device<speaker_sound_device> m_speaker; - required_device<cassette_image_device> m_cassette; + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_pic8259(*this, "pic8259") + , m_pit8253(*this, "pit8253") + , m_ppi8255n1(*this, "ppi8255n1") + , m_ppi8255n2(*this, "ppi8255n2") + , m_isabus(*this, "isa") + , m_speaker(*this, "speaker") + , m_cassette(*this, "cassette") + , m_ram(*this, RAM_TAG) + , m_palette(*this, "palette") + { } + + required_device<cpu_device> m_maincpu; + required_device<pic8259_device> m_pic8259; + required_device<pit8253_device> m_pit8253; + required_device<i8255_device> m_ppi8255n1; + required_device<i8255_device> m_ppi8255n2; + required_device<isa8_device> m_isabus; + required_device<speaker_sound_device> m_speaker; + required_device<cassette_image_device> m_cassette; required_device<ram_device> m_ram; required_device<palette_device> m_palette; @@ -139,22 +140,21 @@ public: READ8_MEMBER(p1_state::p1_trap_r) { uint8_t data = m_video.trap[offset]; - DBG_LOG(1,"trap",("R %.2x $%02x\n", 0x28+offset, data)); - if (offset == 0) - m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE); + DBG_LOG(1, "trap", ("R %.2x $%02x\n", 0x28 + offset, data)); + if (offset == 0) m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE); return data; } WRITE8_MEMBER(p1_state::p1_trap_w) { - DBG_LOG(1,"trap",("W %.2x $%02x\n", 0x28+offset, data)); + DBG_LOG(1, "trap", ("W %.2x $%02x\n", 0x28 + offset, data)); } READ8_MEMBER(p1_state::p1_cga_r) { uint16_t port = offset + 0x3d0; - DBG_LOG(1,"cga",("R %.4x\n", port)); + DBG_LOG(1, "cga", ("R %.4x\n", port)); m_video.trap[1] = 0x40 | ((port >> 8) & 0x3f); m_video.trap[0] = port & 255; m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); @@ -165,7 +165,7 @@ WRITE8_MEMBER(p1_state::p1_cga_w) { uint16_t port = offset + 0x3d0; - DBG_LOG(1,"cga",("W %.4x $%02x\n", port, data)); + DBG_LOG(1, "cga", ("W %.4x $%02x\n", port, data)); m_video.trap[2] = data; m_video.trap[1] = 0xC0 | ((port >> 8) & 0x3f); m_video.trap[0] = port & 255; @@ -174,9 +174,8 @@ WRITE8_MEMBER(p1_state::p1_cga_w) WRITE8_MEMBER(p1_state::p1_vram_w) { - DBG_LOG(1,"vram",("W %.4x $%02x\n", offset, data)); - if (m_video.videoram_base) - m_video.videoram_base[offset] = data; + DBG_LOG(1, "vram", ("W %.4x $%02x\n", offset, data)); + if (m_video.videoram_base) m_video.videoram_base[offset] = data; m_video.trap[2] = data; m_video.trap[1] = 0x80 | ((offset >> 8) & 0x3f); m_video.trap[0] = offset & 255; @@ -197,31 +196,37 @@ WRITE8_MEMBER(p1_state::p1_ppi2_porta_w) { address_space &program = m_maincpu->space(AS_PROGRAM); - DBG_LOG(1,"color_select_68",("W $%02x\n", data)); + DBG_LOG(1, "color_select_68", ("W $%02x\n", data)); // NMI DISABLE - if (BIT((data ^ m_video.color_select_68), 3)) { - program.unmap_readwrite( 0xb8000, 0xbbfff, 0 ); - if (BIT(data, 3)) { - program.install_readwrite_bank( 0xb8000, 0xbbfff, "bank11" ); - } else { - program.install_read_bank( 0xb8000, 0xbbfff, "bank11" ); - program.install_write_handler( 0xb8000, 0xbbfff, WRITE8_DELEGATE(p1_state, p1_vram_w) ); + if (BIT((data ^ m_video.color_select_68), 3)) + { + program.unmap_readwrite(0xb8000, 0xbbfff, 0); + if (BIT(data, 3)) + { + program.install_readwrite_bank(0xb8000, 0xbbfff, "bank11"); + } + else + { + program.install_read_bank(0xb8000, 0xbbfff, "bank11"); + program.install_write_handler(0xb8000, 0xbbfff, WRITE8_DELEGATE(p1_state, p1_vram_w)); } } // DISPLAY BANK - if (BIT((data ^ m_video.color_select_68), 6)) { + if (BIT((data ^ m_video.color_select_68), 6)) + { if (BIT(data, 6)) m_video.videoram = m_video.videoram_base.get() + 0x4000; else m_video.videoram = m_video.videoram_base.get(); } // HIRES -- XXX - if (BIT((data ^ m_video.color_select_68), 7)) { + if (BIT((data ^ m_video.color_select_68), 7)) + { if (BIT(data, 7)) - machine().first_screen()->set_visible_area(0, 640-1, 0, 200-1); + machine().first_screen()->set_visible_area(0, 640 - 1, 0, 200 - 1); else - machine().first_screen()->set_visible_area(0, 320-1, 0, 200-1); + machine().first_screen()->set_visible_area(0, 320 - 1, 0, 200 - 1); } m_video.color_select_68 = data; set_palette_luts(); @@ -229,12 +234,12 @@ WRITE8_MEMBER(p1_state::p1_ppi2_porta_w) /* 06Ah Dxx 6 Enable/Disable color burst (?) - 7 Enable/Disable D7H/D7L + 7 Enable/Disable D7H/D7L */ WRITE8_MEMBER(p1_state::p1_ppi_portc_w) { - DBG_LOG(1,"mode_control_6a",("W $%02x\n", data)); + DBG_LOG(1, "mode_control_6a", ("W $%02x\n", data)); m_video.mode_control_6a = data; set_palette_luts(); @@ -244,7 +249,7 @@ void p1_state::set_palette_luts(void) { /* Setup 2bpp palette lookup table */ // HIRES - if ( m_video.color_select_68 & 0x80 ) + if (m_video.color_select_68 & 0x80) { m_video.palette_lut_2bpp[0] = 0; } @@ -285,17 +290,17 @@ void p1_state::set_palette_luts(void) cga fetches 2 byte per mc6845 access. ***************************************************************************/ -POISK1_UPDATE_ROW( p1_state::cga_gfx_2bpp_update_row ) +POISK1_UPDATE_ROW(p1_state::cga_gfx_2bpp_update_row) { const rgb_t *palette = m_palette->palette()->entry_list_raw(); - uint32_t *p = &bitmap.pix32(ra); - uint16_t odd, offset; + uint32_t *p = &bitmap.pix32(ra); + uint16_t odd, offset; int i; - if ( ra == 0 ) DBG_LOG(1,"cga_gfx_2bpp_update_row",("\n")); - odd = ( ra & 1 ) << 13; - offset = ( ma & 0x1fff ) | odd; - for ( i = 0; i < stride; i++ ) + if (ra == 0) DBG_LOG(1, "cga_gfx_2bpp_update_row", ("\n")); + odd = (ra & 1) << 13; + offset = (ma & 0x1fff) | odd; + for (i = 0; i < stride; i++) { uint8_t data = videoram[ offset++ ]; @@ -312,18 +317,18 @@ POISK1_UPDATE_ROW( p1_state::cga_gfx_2bpp_update_row ) Even scanlines are from CGA_base + 0x0000, odd from CGA_base + 0x2000 ***************************************************************************/ -POISK1_UPDATE_ROW( p1_state::cga_gfx_1bpp_update_row ) +POISK1_UPDATE_ROW(p1_state::cga_gfx_1bpp_update_row) { const rgb_t *palette = m_palette->palette()->entry_list_raw(); - uint32_t *p = &bitmap.pix32(ra); - uint8_t fg = 15, bg = BG_COLOR(m_video.color_select_68); - uint16_t odd, offset; + uint32_t *p = &bitmap.pix32(ra); + uint8_t fg = 15, bg = BG_COLOR(m_video.color_select_68); + uint16_t odd, offset; int i; - if ( ra == 0 ) DBG_LOG(1,"cga_gfx_1bpp_update_row",("bg %d\n", bg)); - odd = ( ra & 1 ) << 13; - offset = ( ma & 0x1fff ) | odd; - for ( i = 0; i < stride; i++ ) + if (ra == 0) DBG_LOG(1, "cga_gfx_1bpp_update_row", ("bg %d\n", bg)); + odd = (ra & 1) << 13; + offset = (ma & 0x1fff) | odd; + for (i = 0; i < stride; i++) { uint8_t data = videoram[ offset++ ]; @@ -344,18 +349,18 @@ POISK1_UPDATE_ROW( p1_state::cga_gfx_1bpp_update_row ) Even scanlines are from CGA_base + 0x0000, odd from CGA_base + 0x2000 ***************************************************************************/ -POISK1_UPDATE_ROW( p1_state::poisk1_gfx_1bpp_update_row ) +POISK1_UPDATE_ROW(p1_state::poisk1_gfx_1bpp_update_row) { const rgb_t *palette = m_palette->palette()->entry_list_raw(); - uint32_t *p = &bitmap.pix32(ra); - uint8_t fg, bg = BG_COLOR(m_video.color_select_68); - uint16_t odd, offset; + uint32_t *p = &bitmap.pix32(ra); + uint8_t fg, bg = BG_COLOR(m_video.color_select_68); + uint16_t odd, offset; int i; - if ( ra == 0 ) DBG_LOG(1,"poisk1_gfx_1bpp_update_row",("bg %d\n", bg)); - odd = ( ra & 1 ) << 13; - offset = ( ma & 0x1fff ) | odd; - for ( i = 0; i < stride; i++ ) + if (ra == 0) DBG_LOG(1, "poisk1_gfx_1bpp_update_row", ("bg %d\n", bg)); + odd = (ra & 1) << 13; + offset = (ma & 0x1fff) | odd; + for (i = 0; i < stride; i++) { uint8_t data = videoram[ offset++ ]; @@ -376,28 +381,28 @@ PALETTE_INIT_MEMBER(p1_state, p1) { int i; - DBG_LOG(0,"init",("palette_init()\n")); + DBG_LOG(0, "init", ("palette_init()\n")); - for ( i = 0; i < CGA_PALETTE_SETS * 16; i++ ) + for (i = 0; i < CGA_PALETTE_SETS * 16; i++) { - palette.set_pen_color(i, cga_palette[i][0], cga_palette[i][1], cga_palette[i][2] ); + palette.set_pen_color(i, cga_palette[i][0], cga_palette[i][1], cga_palette[i][2]); } } void p1_state::video_start() { - address_space &space = m_maincpu->space( AS_PROGRAM ); + address_space &space = m_maincpu->space(AS_PROGRAM); - DBG_LOG(0,"init",("video_start()\n")); + DBG_LOG(0, "init", ("video_start()\n")); memset(&m_video, 0, sizeof(m_video)); m_video.videoram_base = std::make_unique<uint8_t[]>(0x8000); m_video.videoram = m_video.videoram_base.get(); m_video.stride = 80; - space.install_readwrite_bank(0xb8000, 0xbbfff, "bank11" ); + space.install_readwrite_bank(0xb8000, 0xbbfff, "bank11"); machine().root_device().membank("bank11")->set_base(m_video.videoram); - space.install_readwrite_bank(0xbc000, 0xbffff, "bank12" ); + space.install_readwrite_bank(0xbc000, 0xbffff, "bank12"); machine().root_device().membank("bank12")->set_base(m_video.videoram + 0x4000); } @@ -410,13 +415,19 @@ uint32_t p1_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, co // bit 6 of 6Ah disables color burst -- not implemented for (ra = cliprect.min_y; ra <= cliprect.max_y; ra++) { - if (BIT(m_video.color_select_68, 7)) { - if (BIT(m_video.mode_control_6a, 7)) { + if (BIT(m_video.color_select_68, 7)) + { + if (BIT(m_video.mode_control_6a, 7)) + { cga_gfx_1bpp_update_row(bitmap, cliprect, m_video.videoram, ma, ra, m_video.stride); - } else { + } + else + { poisk1_gfx_1bpp_update_row(bitmap, cliprect, m_video.videoram, ma, ra, m_video.stride); } - } else { + } + else + { cga_gfx_2bpp_update_row(bitmap, cliprect, m_video.videoram, ma, ra, m_video.stride); } if (ra & 1) ma += m_video.stride; @@ -427,13 +438,13 @@ uint32_t p1_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, co // Timer. Poisk-1 uses single XTAL for everything? -- check -WRITE_LINE_MEMBER( p1_state::p1_speaker_set_spkrdata ) +WRITE_LINE_MEMBER(p1_state::p1_speaker_set_spkrdata) { m_p1_spkrdata = state ? 1 : 0; m_speaker->level_w(m_p1_spkrdata & m_p1_input); } -WRITE_LINE_MEMBER( p1_state::p1_pit8253_out2_changed ) +WRITE_LINE_MEMBER(p1_state::p1_pit8253_out2_changed) { m_p1_input = state ? 1 : 0; m_speaker->level_w(m_p1_spkrdata & m_p1_input); @@ -444,7 +455,7 @@ WRITE_LINE_MEMBER( p1_state::p1_pit8253_out2_changed ) WRITE8_MEMBER(p1_state::p1_ppi_porta_w) { m_kbpoll_mask = data; - DBG_LOG(2,"p1_ppi_porta_w",("( %02X -> %02X )\n", data, m_kbpoll_mask)); + DBG_LOG(2, "p1_ppi_porta_w", ("( %02X -> %02X )\n", data, m_kbpoll_mask)); } READ8_MEMBER(p1_state::p1_ppi_porta_r) @@ -452,7 +463,7 @@ READ8_MEMBER(p1_state::p1_ppi_porta_r) uint8_t ret; ret = m_kbpoll_mask; - DBG_LOG(1,"p1_ppi_porta_r",("= %02X\n", ret)); + DBG_LOG(1, "p1_ppi_porta_r", ("= %02X\n", ret)); return ret; } @@ -499,60 +510,59 @@ READ8_MEMBER(p1_state::p1_ppi2_portc_r) int data = 0xff; double tap_val = m_cassette->input(); - data = ( data & ~0x10 ) | ( tap_val < 0 ? 0x10 : 0x00 ); + data = (data & ~0x10) | (tap_val < 0 ? 0x10 : 0x00); - DBG_LOG(2,"p1_ppi_portc_r",("= %02X (tap_val %f) at %s\n", - data, tap_val, machine().describe_context())); + DBG_LOG(2, "p1_ppi_portc_r", ("= %02X (tap_val %f) at %s\n", data, tap_val, machine().describe_context())); return data; } WRITE8_MEMBER(p1_state::p1_ppi2_portb_w) { m_pit8253->write_gate2(BIT(data, 0)); - p1_speaker_set_spkrdata( data & 0x02 ); + p1_speaker_set_spkrdata(data & 0x02); } READ8_MEMBER(p1_state::p1_ppi_r) { -// DBG_LOG(1,"p1ppi",("R %.2x\n", 0x60+offset)); - switch (offset) { - case 0: - return m_ppi8255n1->read(space, 0); - case 9: - case 10: - case 11: - return m_ppi8255n1->read(space, offset - 8); - case 8: - return m_ppi8255n2->read(space, 0); - case 1: - case 2: - case 3: - return m_ppi8255n2->read(space, offset); - default: - DBG_LOG(1,"p1ppi",("R %.2x (unimp)\n", 0x60+offset)); - return 0xff; + switch (offset) + { + case 0: + return m_ppi8255n1->read(space, 0); + case 9: + case 10: + case 11: + return m_ppi8255n1->read(space, offset - 8); + case 8: + return m_ppi8255n2->read(space, 0); + case 1: + case 2: + case 3: + return m_ppi8255n2->read(space, offset); + default: + DBG_LOG(1, "p1ppi", ("R %.2x (unimp)\n", 0x60 + offset)); + return 0xff; } } WRITE8_MEMBER(p1_state::p1_ppi_w) { -// DBG_LOG(1,"p1ppi",("W %.2x $%02x\n", 0x60+offset, data)); - switch (offset) { - case 0: - return m_ppi8255n1->write(space, 0, data); - case 9: - case 10: - case 11: - return m_ppi8255n1->write(space, offset - 8, data); - case 8: - return m_ppi8255n2->write(space, 0, data); - case 1: - case 2: - case 3: - return m_ppi8255n2->write(space, offset, data); - default: - DBG_LOG(1,"p1ppi",("W %.2x $%02x (unimp)\n", 0x60+offset, data)); - return; + switch (offset) + { + case 0: + return m_ppi8255n1->write(space, 0, data); + case 9: + case 10: + case 11: + return m_ppi8255n1->write(space, offset - 8, data); + case 8: + return m_ppi8255n2->write(space, 0, data); + case 1: + case 2: + case 3: + return m_ppi8255n2->write(space, offset, data); + default: + DBG_LOG(1, "p1ppi", ("W %.2x $%02x (unimp)\n", 0x60 + offset, data)); + return; } } @@ -562,24 +572,24 @@ WRITE8_MEMBER(p1_state::p1_ppi_w) * **********************************************************/ -DRIVER_INIT_MEMBER( p1_state, poisk1 ) +DRIVER_INIT_MEMBER(p1_state, poisk1) { address_space &program = m_maincpu->space(AS_PROGRAM); - DBG_LOG(0,"init",("driver_init()\n")); + DBG_LOG(0, "init", ("driver_init()\n")); - program.install_readwrite_bank(0, m_ram->size()-1, "bank10"); - membank( "bank10" )->set_base( m_ram->pointer() ); + program.install_readwrite_bank(0, m_ram->size() - 1, "bank10"); + membank("bank10")->set_base(m_ram->pointer()); } -MACHINE_START_MEMBER( p1_state, poisk1 ) +MACHINE_START_MEMBER(p1_state, poisk1) { - DBG_LOG(0,"init",("machine_start()\n")); + DBG_LOG(0, "init", ("machine_start()\n")); } -MACHINE_RESET_MEMBER( p1_state, poisk1 ) +MACHINE_RESET_MEMBER(p1_state, poisk1) { - DBG_LOG(0,"init",("machine_reset()\n")); + DBG_LOG(0, "init", ("machine_reset()\n")); m_kbpoll_mask = 0; } |