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author AJR <ajrhacker@users.noreply.github.com>2019-03-31 13:17:59 -0400
committer AJR <ajrhacker@users.noreply.github.com>2019-03-31 13:17:59 -0400
commit7d2a98b25b8966df437a1c881818ffd095aa3a9f (patch)
tree6dedf3b1a2c7138b48d57d9341fa311db16b8ccc
parentbd598d6ca550a3cdd42378f812863daa2c77b806 (diff)
aic6250: Invert Port A outputs; misc. small fixes (nw)
-rw-r--r--src/devices/machine/aic6250.cpp11
1 files changed, 6 insertions, 5 deletions
diff --git a/src/devices/machine/aic6250.cpp b/src/devices/machine/aic6250.cpp
index 1e85bd571a4..7c2ec140618 100644
--- a/src/devices/machine/aic6250.cpp
+++ b/src/devices/machine/aic6250.cpp
@@ -230,7 +230,7 @@ void aic6250_device::device_reset()
m_offset_cntrl = 0;
m_dma_cntrl = 0;
m_port_a_latch = 0;
- m_port_a_latch = 0;
+ m_port_b_latch = 0;
// registers 05, 09
m_offset_count_zero = true;
@@ -551,9 +551,9 @@ void aic6250_device::memory_data_w(u8 data)
u8 aic6250_device::port_a_r()
{
- // FIXME: not sure if port A can be read in differential mode
+ // FIXME: not sure if port A bits 2 and 7 can be read as GPIO in 8-bit differential mode
u8 const data = (m_control_reg_0 & R07W_SCSI_INTERFACE_MODE)
- || (m_control_reg_0 & R07W_EN_PORT_A_INP_OR_OUT) ? m_port_a_latch : m_port_a_r_cb();
+ || (m_control_reg_0 & R07W_EN_PORT_A_INP_OR_OUT) ? (m_port_a_latch ^ 0xff) : m_port_a_r_cb();
LOGMASKED(LOG_REG, "port_a_r 0x%02x\n", data);
@@ -564,8 +564,9 @@ void aic6250_device::port_a_w(u8 data)
{
LOGMASKED(LOG_REG, "port_a_w 0x%02x\n", data);
+ // Port A outputs are the inverse of data written to this register
if (!(m_control_reg_0 & R07W_SCSI_INTERFACE_MODE) && (m_control_reg_0 & R07W_EN_PORT_A_INP_OR_OUT))
- m_port_a_w_cb(data);
+ m_port_a_w_cb(data ^ 0xff);
m_port_a_latch = data;
}
@@ -1078,7 +1079,7 @@ u16 aic6250_device::dma16_r()
data |= u16(m_fifo.dequeue()) << 8;
- LOGMASKED(LOG_DMA, "dma16_r 0x%04x\n", data);
+ LOGMASKED(LOG_DMA, "DMA 0x%04x from FIFO\n", data);
return data;
}