diff options
author | 2024-12-01 12:15:38 -0500 | |
---|---|---|
committer | 2024-12-01 12:16:47 -0500 | |
commit | 7a5fcb5ac946e2d696a87cba2962aee368c675f7 (patch) | |
tree | a25ea13f487e0156d4c1fd30af5145734135493f | |
parent | 442a9852bc24e47893795194b45c7f01e31153d1 (diff) |
cpu/m6805: Split off HD6305/63705 emulation to a separate source file
-rw-r--r-- | scripts/src/cpu.lua | 2 | ||||
-rw-r--r-- | src/devices/cpu/m6805/hd6305.cpp | 546 | ||||
-rw-r--r-- | src/devices/cpu/m6805/hd6305.h | 189 | ||||
-rw-r--r-- | src/devices/cpu/m6805/m6805.cpp | 557 | ||||
-rw-r--r-- | src/devices/cpu/m6805/m6805.h | 169 | ||||
-rw-r--r-- | src/mame/namco/namco65.h | 2 | ||||
-rw-r--r-- | src/mame/skeleton/antonelli_hd6305.cpp | 2 | ||||
-rw-r--r-- | src/mame/yamaha/mks3.h | 2 | ||||
-rw-r--r-- | src/mame/yamaha/yman1x.cpp | 2 | ||||
-rw-r--r-- | src/mame/yamaha/ympsr400.cpp | 2 | ||||
-rw-r--r-- | src/mame/yamaha/ymsy35.cpp | 2 |
11 files changed, 748 insertions, 727 deletions
diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 302d4ff83f5..f94f56dc077 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -2000,6 +2000,8 @@ if CPUS["M6805"] then MAME_DIR .. "src/devices/cpu/m6805/m6805.h", MAME_DIR .. "src/devices/cpu/m6805/m6805defs.h", MAME_DIR .. "src/devices/cpu/m6805/6805ops.hxx", + MAME_DIR .. "src/devices/cpu/m6805/hd6305.cpp", + MAME_DIR .. "src/devices/cpu/m6805/hd6305.h", MAME_DIR .. "src/devices/cpu/m6805/m68705.cpp", MAME_DIR .. "src/devices/cpu/m6805/m68705.h", MAME_DIR .. "src/devices/cpu/m6805/m68hc05.cpp", diff --git a/src/devices/cpu/m6805/hd6305.cpp b/src/devices/cpu/m6805/hd6305.cpp new file mode 100644 index 00000000000..2fab40f86c6 --- /dev/null +++ b/src/devices/cpu/m6805/hd6305.cpp @@ -0,0 +1,546 @@ +// license:BSD-3-Clause +// copyright-holders:Aaron Giles, Vas Crabb + +#include "emu.h" +#include "hd6305.h" +#include "m6805defs.h" + +/**************************************************************************** + * HD6305 section + ****************************************************************************/ + +hd6305_device::hd6305_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + uint32_t clock, + device_type const type, + configuration_params const ¶ms, + address_map_constructor internal_map) + : m6805_base_device(mconfig, tag, owner, clock, type, params, internal_map) +{ +} + +hd6305v0_device::hd6305v0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : hd6305_device( + mconfig, + tag, + owner, + clock, + HD6305V0, + { s_hmos_s_ops, s_hmos_cycles, 14, 0x00ff, 0x00c0, 0x1fff, 0x1ffc }, + address_map_constructor(FUNC(hd6305v0_device::internal_map), this)), + m_read_port(*this, 0xff), + m_write_port(*this), + m_sci_clk(*this), + m_sci_tx(*this) +{ +} + +void hd6305v0_device::internal_map(address_map &map) +{ + map(0x0000, 0x0003).rw(FUNC(hd6305v0_device::port_r), FUNC(hd6305v0_device::port_w)); + map(0x0004, 0x0007).rw(FUNC(hd6305v0_device::port_ddr_r), FUNC(hd6305v0_device::port_ddr_w)); + map(0x0008, 0x0008).rw(FUNC(hd6305v0_device::timer_data_r), FUNC(hd6305v0_device::timer_data_w)); + map(0x0009, 0x0009).rw(FUNC(hd6305v0_device::timer_ctrl_r), FUNC(hd6305v0_device::timer_ctrl_w)); + map(0x000a, 0x000a).rw(FUNC(hd6305v0_device::misc_r), FUNC(hd6305v0_device::misc_w)); + map(0x0010, 0x0010).rw(FUNC(hd6305v0_device::sci_ctrl_r), FUNC(hd6305v0_device::sci_ctrl_w)); + map(0x0011, 0x0011).rw(FUNC(hd6305v0_device::sci_ssr_r), FUNC(hd6305v0_device::sci_ssr_w)); + map(0x0012, 0x0012).rw(FUNC(hd6305v0_device::sci_data_r), FUNC(hd6305v0_device::sci_data_w)); + map(0x0040, 0x00ff).ram(); + map(0x1000, 0x1fff).rom().region(DEVICE_SELF, 0); +} + +void hd6305v0_device::device_start() +{ + hd6305_device::device_start(); + save_item(NAME(m_port_data)); + save_item(NAME(m_port_ddr)); + save_item(NAME(m_tdr)); + save_item(NAME(m_prescaler)); + save_item(NAME(m_tcr)); + save_item(NAME(m_ssr)); + save_item(NAME(m_scr)); + save_item(NAME(m_mr)); + save_item(NAME(m_timer_last_update)); + save_item(NAME(m_sci_tx_data)); + save_item(NAME(m_sci_tx_filled)); + save_item(NAME(m_sci_tx_byte)); + save_item(NAME(m_sci_tx_step)); + + m_timer_timer = timer_alloc(FUNC(hd6305v0_device::timer_cb), this); + m_timer_sci = timer_alloc(FUNC(hd6305v0_device::sci_cb), this); +} + +void hd6305v0_device::device_reset() +{ + hd6305_device::device_reset(); + + std::fill(m_port_data.begin(), m_port_data.end(), 0x00); + std::fill(m_port_ddr.begin(), m_port_ddr.end(), 0x00); + + m_tdr = 0xf0; + m_prescaler = 0x7f; + m_tcr = 0x50; + m_ssr = 0x3f; + m_scr = 0x00; + m_mr = 0x5f; + + m_timer_last_update = total_cycles(); + + m_sci_tx_data = 0; + + m_sci_tx_filled = false; + m_sci_tx_byte = 0; + m_sci_tx_step = 0; + + m_sci_clk(1); + m_sci_tx(1); +} + +u8 hd6305v0_device::port_r(offs_t port) +{ + if(m_port_ddr[port] == 0xff) + return m_port_data[port]; + + return (m_port_ddr[port] & m_port_data[port]) | (m_read_port[port]() & ~m_port_ddr[port]); +} + +void hd6305v0_device::port_w(offs_t port, u8 data) +{ + m_port_data[port] = data; + if(m_port_ddr[port] != 0x00) + m_write_port[port](data | ~m_port_ddr[port]); +} + +u8 hd6305v0_device::port_ddr_r(offs_t port) +{ + return m_port_ddr[port]; +} + +void hd6305v0_device::port_ddr_w(offs_t port, u8 data) +{ + logerror("port %d ddr %c%c%c%c%c%c%c%c\n", + port, + BIT(data, 7) ? 'o': 'i', + BIT(data, 6) ? 'o': 'i', + BIT(data, 5) ? 'o': 'i', + BIT(data, 4) ? 'o': 'i', + BIT(data, 3) ? 'o': 'i', + BIT(data, 2) ? 'o': 'i', + BIT(data, 1) ? 'o': 'i', + BIT(data, 0) ? 'o': 'i'); + m_port_ddr[port] = data; +} + +void hd6305v0_device::timer_update_regs() +{ + u32 counter = m_prescaler; + u64 tc = machine().time().as_ticks(clock())/4; + u32 cycles = tc - m_timer_last_update; + + u32 next_counter = counter + cycles; + u32 shift = BIT(m_tcr, 0, 3); + u32 steps = shift ? (((next_counter >> (shift-1)) + 1) >> 1) - (((counter >> (shift-1)) + 1) >> 1): cycles; + + m_tdr -= steps; + m_prescaler = next_counter & 0x7f; + m_timer_last_update = tc; + if(!m_tdr && steps) { + m_tcr |= 0x80; + if(!BIT(m_tcr, 6)) + m_pending_interrupts |= 1 << M6805V0_INT_TIMER1; + } +} + +void hd6305v0_device::timer_wait_next_timeout() +{ + u32 shift = BIT(m_tcr, 0, 3); + u32 cycles; + if(shift == 0) + cycles = 1; + else { + u32 masked_prescaler = ((1 << shift) - 1) & m_prescaler; + if(masked_prescaler >= (1 << (shift-1))) + cycles = (3 << (shift-1)) - masked_prescaler; + else + cycles = (1 << (shift-1)) - masked_prescaler; + } + if(m_tdr != 1) + cycles += (m_tdr ? m_tdr - 1 : 0xff) << shift; + m_timer_timer->adjust(attotime::from_ticks(cycles*4, clock())); +} + +u8 hd6305v0_device::timer_data_r() +{ + timer_update_regs(); + return m_tdr; +} + +void hd6305v0_device::timer_data_w(u8 data) +{ + timer_update_regs(); + m_tdr = data; + timer_wait_next_timeout(); +} + +u8 hd6305v0_device::timer_ctrl_r() +{ + timer_update_regs(); + return m_tcr; +} + +void hd6305v0_device::timer_ctrl_w(u8 data) +{ + timer_update_regs(); + u8 old = m_tcr; + m_tcr = (m_tcr & data & 0x80) | (data & 0x7f); + if((old ^ m_tcr) & 0x7f) { + logerror("timer ctrl %02x irq=%s, %s clock=%s%s prescale=%d\n", data, + BIT(m_tcr, 7) ? "on" : "off", + BIT(m_tcr, 6) ? "disabled" : "enabled", + BIT(m_tcr, 4, 2) == 0 ? "e" : BIT(m_tcr, 4, 2) == 1 ? "e&timer" : BIT(m_tcr, 4, 2) == 2 ? "off" : "timer", + BIT(m_tcr, 3) ? " reset prescaler" : "", + 1 << BIT(m_tcr, 0, 3) + ); + if(BIT(m_tcr, 4, 2) != 0) + logerror("WARNING: timer mode not implemented\n"); + } + if((m_tcr & 0xc0) == 0x80) + m_pending_interrupts |= 1 << M6805V0_INT_TIMER1; + else + m_pending_interrupts &= ~(1 << M6805V0_INT_TIMER1); + if(BIT(m_tcr, 3)) { + m_prescaler = 0x7f; + m_tcr &= ~0x08; + } + + timer_wait_next_timeout(); +} + + +TIMER_CALLBACK_MEMBER(hd6305v0_device::timer_cb) +{ + timer_update_regs(); + timer_wait_next_timeout(); +} + +u8 hd6305v0_device::misc_r() +{ + return m_mr; +} + +void hd6305v0_device::misc_w(u8 data) +{ + m_mr = (m_mr & data & 0x80) | (data & 0x60) | 0x1f; + logerror("misc %02x int2=%s, %s int=%s\n", data, + BIT(m_mr, 7) ? "on" : "off", + BIT(m_mr, 6) ? "disabled" : "enabled", + BIT(m_mr, 5) ? "edge" : "level"); +} + +void hd6305v0_device::sci_timer_step() +{ + m_timer_sci->adjust(attotime::from_ticks(1 << (BIT(m_scr, 0, 4) + 2), clock())); +} + +TIMER_CALLBACK_MEMBER(hd6305v0_device::sci_cb) +{ + if(m_sci_tx_step == 16) { + m_ssr |= 0x80; + if(!BIT(m_ssr, 5)) + m_pending_interrupts |= 1 << M6805V0_INT_SCI; + + if(m_sci_tx_filled) { + m_sci_tx_filled = false; + m_sci_clk(0); + m_sci_tx_byte = m_sci_tx_data; + logerror("transmit %02x\n", m_sci_tx_byte); + m_sci_tx(m_sci_tx_byte & 0x01); + m_sci_tx_step = 1; + } else { + m_sci_tx_step = 0; + return; + } + } else { + if(m_sci_tx_step & 1) + m_sci_clk(1); + else { + m_sci_clk(0); + m_sci_tx((m_sci_tx_byte >> (m_sci_tx_step >> 1)) & 0x01); + } + m_sci_tx_step++; + } + + sci_timer_step(); +} + +u8 hd6305v0_device::sci_ctrl_r() +{ + return m_scr; +} + +void hd6305v0_device::sci_ctrl_w(u8 data) +{ + m_scr = data; + logerror("sci ctrl %02x d3=%s d4=%s d5=%s rate=%d\n", data, + BIT(data, 7) ? "data_out" : "gpio", + BIT(data, 6) ? "data_in" : "gpio", + BIT(data, 5) == 0 ? "gpio" : BIT(data, 4) ? "clock_in" : "clock_out", + clock()/(1 << (BIT(data, 0, 4) + 3)) + ); +} + +u8 hd6305v0_device::sci_ssr_r() +{ + return m_ssr; +} + +void hd6305v0_device::sci_ssr_w(u8 data) +{ + m_ssr = ((m_ssr & data) & 0xc0) | (data & 0x38) | 7; + logerror("sci ssr w %02x sci irq=%s, %s timer2 irq=%s, %s%s\n", data, + BIT(m_ssr, 7) ? "on" : "off", + BIT(m_ssr, 5) ? "disabled" : "enabled", + BIT(m_ssr, 6) ? "on" : "off", + BIT(m_ssr, 4) ? "disabled" : "enabled", + BIT(m_ssr, 3) ? "reset sci prescaler" : ""); + + if((m_ssr & 0xa0) == 0x80) + m_pending_interrupts |= 1 << M6805V0_INT_SCI; + else + m_pending_interrupts &= ~(1 << M6805V0_INT_SCI); +} + +u8 hd6305v0_device::sci_data_r() +{ + logerror("sci data r\n");\ + return 0x00; +} + +void hd6305v0_device::sci_data_w(u8 data) +{ + m_sci_tx_data = data; + if(m_sci_tx_step == 0) { + m_sci_tx_filled = false; + m_sci_clk(0); + m_sci_tx_byte = m_sci_tx_data; + logerror("transmit %02x\n", m_sci_tx_byte); + m_sci_tx(m_sci_tx_byte & 0x01); + m_sci_tx_step = 1; + sci_timer_step(); + } else + m_sci_tx_filled = true; +} + +void hd6305v0_device::execute_set_input(int inputnum, int state) +{ + // TODO: edge vs. level on int1 + if (inputnum == M6805V0_INT_IRQ1 || inputnum == M6805V0_INT_IRQ2) + { + if (m_irq_state[inputnum] != state) + { + m_irq_state[inputnum] = state; + + if (state != CLEAR_LINE) + { + m_pending_interrupts |= 1 << inputnum; + } + } + } +} + +void hd6305v0_device::interrupt_vector() +{ + if ((m_pending_interrupts & (1 << M6805V0_INT_IRQ1)) != 0) + { + m_pending_interrupts &= ~(1 << M6805V0_INT_IRQ1); + rm16<false>(0x1ffa, m_pc); + } + else if ((m_pending_interrupts & (1 << M6805V0_INT_IRQ2)) != 0) + { + m_pending_interrupts &= ~(1 << M6805V0_INT_IRQ2); + rm16<false>(0x1ff8, m_pc); + } + else if ((m_pending_interrupts & (1 << M6805V0_INT_TIMER1)) != 0) + { + // TODO: 1ff6 when in wait... + m_pending_interrupts &= ~(1 << M6805V0_INT_TIMER1); + rm16<false>(0x1ff8, m_pc); + } + else if ((m_pending_interrupts & (1 << M6805V0_INT_TIMER2)) != 0) + { + m_pending_interrupts &= ~(1 << M6805V0_INT_TIMER2); + rm16<false>(0x1ff4, m_pc); + } + else if ((m_pending_interrupts & (1 << M6805V0_INT_SCI)) != 0) + { + m_pending_interrupts &= ~(1 << M6805V0_INT_SCI); + rm16<false>(0x1ff4, m_pc); + } +} + + +hd6305y2_device::hd6305y2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : hd6305_device( + mconfig, + tag, + owner, + clock, + HD6305Y2, + { s_hmos_s_ops, s_hmos_cycles, 14, 0x00ff, 0x00c0, 0x1fff, 0x1ffc }, + address_map_constructor(FUNC(hd6305y2_device::internal_map), this)) +{ +} + +void hd6305y2_device::internal_map(address_map &map) +{ + // TODO: ports, timer, SCI + map(0x0040, 0x013f).ram(); +} + +hd63705z0_device::hd63705z0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : hd6305_device( + mconfig, + tag, + owner, + clock, + HD63705Z0, + { s_hmos_b_ops, s_hmos_cycles, 16, 0x017f, 0x0100, 0x1fff, 0x1ffa }, + address_map_constructor(FUNC(hd63705z0_device::internal_map), this)) +{ +} + +void hd63705z0_device::internal_map(address_map &map) +{ + // TODO: ports, timer, SCI + map(0x0040, 0x01bf).ram(); + map(0x01c0, 0x1fff).rom().region(DEVICE_SELF, 0x01c0); +} + +void hd63705z0_device::execute_set_input(int inputnum, int state) +{ + if (inputnum == INPUT_LINE_NMI) + { + if (m_nmi_state != state) + { + m_nmi_state = state; + + if (state != CLEAR_LINE) + { + m_pending_interrupts |= 1 << HD63705_INT_NMI; + } + } + } + else if (inputnum <= HD63705_INT_ADCONV) + { + if (m_irq_state[inputnum] != state) + { + m_irq_state[inputnum] = state; + + if (state != CLEAR_LINE) + { + m_pending_interrupts |= 1 << inputnum; + } + } + } +} + +void hd63705z0_device::interrupt_vector() +{ + // Need to add emulation of other interrupt sources here KW-2/4/99 + // This is just a quick patch for Namco System 2 operation + + if ((m_pending_interrupts & (1 << HD63705_INT_IRQ1)) != 0) + { + m_pending_interrupts &= ~(1 << HD63705_INT_IRQ1); + rm16<true>(0x1ff8, m_pc); + } + else if ((m_pending_interrupts & (1 << HD63705_INT_IRQ2)) != 0) + { + m_pending_interrupts &= ~(1 << HD63705_INT_IRQ2); + rm16<true>(0x1fec, m_pc); + } + else if ((m_pending_interrupts & (1 << HD63705_INT_ADCONV)) != 0) + { + m_pending_interrupts &= ~(1 << HD63705_INT_ADCONV); + rm16<true>(0x1fea, m_pc); + } + else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER1)) != 0) + { + m_pending_interrupts &= ~(1 << HD63705_INT_TIMER1); + rm16<true>(0x1ff6, m_pc); + } + else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER2)) != 0) + { + m_pending_interrupts &= ~(1 << HD63705_INT_TIMER2); + rm16<true>(0x1ff4, m_pc); + } + else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER3)) != 0) + { + m_pending_interrupts &= ~(1<<HD63705_INT_TIMER3); + rm16<true>(0x1ff2, m_pc); + } + else if ((m_pending_interrupts & (1 << HD63705_INT_PCI)) != 0) + { + m_pending_interrupts &= ~(1 << HD63705_INT_PCI); + rm16<true>(0x1ff0, m_pc); + } + else if ((m_pending_interrupts & (1 << HD63705_INT_SCI)) != 0) + { + m_pending_interrupts &= ~(1 << HD63705_INT_SCI); + rm16<true>(0x1fee, m_pc); + } +} + +void hd63705z0_device::interrupt() +{ + // the 6805 latches interrupt requests internally, so we don't clear + // pending_interrupts until the interrupt is taken, no matter what the + // external IRQ pin does. + + if (BIT(m_pending_interrupts, HD63705_INT_NMI)) + { + pushword<true>(m_pc); + pushbyte<true>(m_x); + pushbyte<true>(m_a); + pushbyte<true>(m_cc); + SEI; + + // no vectors supported, just do the callback to clear irq_state if needed + standard_irq_callback(0, m_pc.w.l); + + rm16<true>(0x1ffc, m_pc); + m_pending_interrupts &= ~(1 << HD63705_INT_NMI); + + m_icount -= 11; + burn_cycles(11); + } + else if ((m_pending_interrupts & ((1 << M6805_IRQ_LINE) | HD63705_INT_MASK)) != 0) + { + if ((CC & IFLAG) == 0) + { + // standard IRQ + pushword<true>(m_pc); + pushbyte<true>(m_x); + pushbyte<true>(m_a); + pushbyte<true>(m_cc); + SEI; + + // no vectors supported, just do the callback to clear irq_state if needed + standard_irq_callback(0, m_pc.w.l); + + interrupt_vector(); + + m_pending_interrupts &= ~(1 << M6805_IRQ_LINE); + + m_icount -= 11; + burn_cycles(11); + } + } +} + + +DEFINE_DEVICE_TYPE(HD6305V0, hd6305v0_device, "hd6305v0", "Hitachi HD6305V0") +DEFINE_DEVICE_TYPE(HD6305Y2, hd6305y2_device, "hd6305y2", "Hitachi HD6305Y2") +DEFINE_DEVICE_TYPE(HD63705Z0, hd63705z0_device, "hd63705z0", "Hitachi HD63705Z0") diff --git a/src/devices/cpu/m6805/hd6305.h b/src/devices/cpu/m6805/hd6305.h new file mode 100644 index 00000000000..33122f8e4a9 --- /dev/null +++ b/src/devices/cpu/m6805/hd6305.h @@ -0,0 +1,189 @@ +// license:BSD-3-Clause +// copyright-holders:Aaron Giles + +#ifndef MAME_CPU_M6805_HD6305_H +#define MAME_CPU_M6805_HD6305_H + +#pragma once + +#include "m6805.h" + + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// device type declarations +DECLARE_DEVICE_TYPE(HD6305V0, hd6305v0_device) +DECLARE_DEVICE_TYPE(HD6305Y2, hd6305y2_device) +DECLARE_DEVICE_TYPE(HD63705Z0, hd63705z0_device) + + + +// ======================> hd6305_device + +class hd6305_device : public m6805_base_device +{ +protected: + // construction/destruction + hd6305_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + uint32_t clock, + device_type const type, + configuration_params const ¶ms, + address_map_constructor internal_map); + + virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; } + + virtual bool test_il() override { return m_nmi_state != CLEAR_LINE; } +}; + +// ======================> hd6305v0_device + +class hd6305v0_device : public hd6305_device +{ +public: + // construction/destruction + hd6305v0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + auto write_sci_tx() { return m_sci_tx.bind(); } + auto write_sci_clk() { return m_sci_clk.bind(); } + + auto read_porta() { return m_read_port [0].bind(); } + auto write_porta() { return m_write_port[0].bind(); } + auto read_portb() { return m_read_port [1].bind(); } + auto write_portb() { return m_write_port[1].bind(); } + auto read_portc() { return m_read_port [2].bind(); } + auto write_portc() { return m_write_port[2].bind(); } + auto read_portd() { return m_read_port [3].bind(); } + auto write_portd() { return m_write_port[3].bind(); } + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + virtual void execute_set_input(int inputnum, int state) override; + virtual void interrupt_vector() override; + +private: + devcb_read8::array<4> m_read_port; + devcb_write8::array<4> m_write_port; + devcb_write_line m_sci_clk; + devcb_write_line m_sci_tx; + + emu_timer *m_timer_timer; + emu_timer *m_timer_sci; + + std::array<u8, 4> m_port_data; + std::array<u8, 4> m_port_ddr; + + u64 m_timer_last_update; + + u8 m_tdr; + u8 m_prescaler; + u8 m_tcr; + u8 m_ssr; + u8 m_scr; + u8 m_mr; + u8 m_sci_tx_data; + + bool m_sci_tx_filled; + u8 m_sci_tx_byte; + u8 m_sci_tx_step; + + void internal_map(address_map &map) ATTR_COLD; + + u8 port_r(offs_t port); + void port_w(offs_t port, u8 data); + u8 port_ddr_r(offs_t port); + void port_ddr_w(offs_t port, u8 data); + + u8 timer_data_r(); + void timer_data_w(u8 data); + u8 timer_ctrl_r(); + void timer_ctrl_w(u8 data); + void timer_update_regs(); + void timer_wait_next_timeout(); + + u8 misc_r(); + void misc_w(u8 data); + + u8 sci_ctrl_r(); + void sci_ctrl_w(u8 data); + u8 sci_ssr_r(); + void sci_ssr_w(u8 data); + u8 sci_data_r(); + void sci_data_w(u8 data); + + void sci_timer_step(); + + TIMER_CALLBACK_MEMBER(timer_cb); + TIMER_CALLBACK_MEMBER(sci_cb); +}; + +// ======================> hd6305y2_device + +class hd6305y2_device : public hd6305_device +{ +public: + // construction/destruction + hd6305y2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +private: + void internal_map(address_map &map) ATTR_COLD; +}; + +// ======================> hd63705z0_device + +class hd63705z0_device : public hd6305_device +{ +public: + // construction/destruction + hd63705z0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void execute_set_input(int inputnum, int state) override; + virtual void interrupt_vector() override; + virtual void interrupt() override; + +private: + void internal_map(address_map &map) ATTR_COLD; +}; + +/**************************************************************************** + * 6805V0 section + ****************************************************************************/ +#define M6805V0_INT_IRQ1 0x00 +#define M6805V0_INT_IRQ2 0x01 +#define M6805V0_INT_TIMER1 0x02 +#define M6805V0_INT_TIMER2 0x03 +#define M6805V0_INT_SCI 0x04 + +/**************************************************************************** + * HD63705 section + ****************************************************************************/ + +#define HD63705_A M6805_A +#define HD63705_PC M6805_PC +#define HD63705_S M6805_S +#define HD63705_X M6805_X +#define HD63705_CC M6805_CC +#define HD63705_NMI_STATE M6805_IRQ_STATE +#define HD63705_IRQ1_STATE M6805_IRQ_STATE+1 +#define HD63705_IRQ2_STATE M6805_IRQ_STATE+2 +#define HD63705_ADCONV_STATE M6805_IRQ_STATE+3 + +#define HD63705_INT_MASK 0x1ff + +#define HD63705_INT_IRQ1 0x00 +#define HD63705_INT_IRQ2 0x01 +#define HD63705_INT_TIMER1 0x02 +#define HD63705_INT_TIMER2 0x03 +#define HD63705_INT_TIMER3 0x04 +#define HD63705_INT_PCI 0x05 +#define HD63705_INT_SCI 0x06 +#define HD63705_INT_ADCONV 0x07 +#define HD63705_INT_NMI 0x08 + +#endif // MAME_CPU_M6805_HD6305_H diff --git a/src/devices/cpu/m6805/m6805.cpp b/src/devices/cpu/m6805/m6805.cpp index 50a6abd1d69..a5d854c776b 100644 --- a/src/devices/cpu/m6805/m6805.cpp +++ b/src/devices/cpu/m6805/m6805.cpp @@ -450,6 +450,7 @@ bool m6805_base_device::test_il() void m6805_base_device::interrupt_vector() { + m_pending_interrupts &= ~(1 << M6805_IRQ_LINE); if (m_params.m_addr_width > 14) rm16<true>(0xfffa & m_params.m_vector_mask, m_pc); else @@ -463,8 +464,9 @@ void m6805_base_device::interrupt() // pending_interrupts until the interrupt is taken, no matter what the // external IRQ pin does. - if (BIT(m_pending_interrupts, HD63705_INT_NMI)) + if (m_pending_interrupts != 0 && (CC & IFLAG) == 0) { + // standard IRQ if (m_params.m_addr_width > 14) { pushword<true>(m_pc); pushbyte<true>(m_x); @@ -479,49 +481,15 @@ void m6805_base_device::interrupt() pushbyte<false>(m_cc); } SEI; + // no vectors supported, just do the callback to clear irq_state if needed standard_irq_callback(0, m_pc.w.l); - if (m_params.m_addr_width > 14) - rm16<true>(0x1ffc, m_pc); - else - rm16<false>(0x1ffc, m_pc); - m_pending_interrupts &= ~(1 << HD63705_INT_NMI); + interrupt_vector(); m_icount -= 11; burn_cycles(11); } - else if ((m_pending_interrupts & ((1 << M6805_IRQ_LINE) | HD63705_INT_MASK)) != 0) - { - if ((CC & IFLAG) == 0) - { - // standard IRQ - if (m_params.m_addr_width > 14) { - pushword<true>(m_pc); - pushbyte<true>(m_x); - pushbyte<true>(m_a); - pushbyte<true>(m_cc); - } - else - { - pushword<false>(m_pc); - pushbyte<false>(m_x); - pushbyte<false>(m_a); - pushbyte<false>(m_cc); - } - SEI; - - // no vectors supported, just do the callback to clear irq_state if needed - standard_irq_callback(0, m_pc.w.l); - - interrupt_vector(); - - m_pending_interrupts &= ~(1 << M6805_IRQ_LINE); - - m_icount -= 11; - burn_cycles(11); - } - } } @@ -675,520 +643,5 @@ std::unique_ptr<util::disasm_interface> m68hc05eg_device::create_disassembler() return std::make_unique<m68hc05_disassembler>(); } -/**************************************************************************** - * HD6305 section - ****************************************************************************/ - -hd6305_device::hd6305_device( - machine_config const &mconfig, - char const *tag, - device_t *owner, - uint32_t clock, - device_type const type, - configuration_params const ¶ms, - address_map_constructor internal_map) - : m6805_base_device(mconfig, tag, owner, clock, type, params, internal_map) -{ -} - -hd6305v0_device::hd6305v0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hd6305_device( - mconfig, - tag, - owner, - clock, - HD6305V0, - { s_hmos_s_ops, s_hmos_cycles, 14, 0x00ff, 0x00c0, 0x1fff, 0x1ffc }, - address_map_constructor(FUNC(hd6305v0_device::internal_map), this)), - m_read_port(*this, 0xff), - m_write_port(*this), - m_sci_clk(*this), - m_sci_tx(*this) -{ -} - -void hd6305v0_device::internal_map(address_map &map) -{ - map(0x0000, 0x0003).rw(FUNC(hd6305v0_device::port_r), FUNC(hd6305v0_device::port_w)); - map(0x0004, 0x0007).rw(FUNC(hd6305v0_device::port_ddr_r), FUNC(hd6305v0_device::port_ddr_w)); - map(0x0008, 0x0008).rw(FUNC(hd6305v0_device::timer_data_r), FUNC(hd6305v0_device::timer_data_w)); - map(0x0009, 0x0009).rw(FUNC(hd6305v0_device::timer_ctrl_r), FUNC(hd6305v0_device::timer_ctrl_w)); - map(0x000a, 0x000a).rw(FUNC(hd6305v0_device::misc_r), FUNC(hd6305v0_device::misc_w)); - map(0x0010, 0x0010).rw(FUNC(hd6305v0_device::sci_ctrl_r), FUNC(hd6305v0_device::sci_ctrl_w)); - map(0x0011, 0x0011).rw(FUNC(hd6305v0_device::sci_ssr_r), FUNC(hd6305v0_device::sci_ssr_w)); - map(0x0012, 0x0012).rw(FUNC(hd6305v0_device::sci_data_r), FUNC(hd6305v0_device::sci_data_w)); - map(0x0040, 0x00ff).ram(); - map(0x1000, 0x1fff).rom().region(DEVICE_SELF, 0); -} - -void hd6305v0_device::device_start() -{ - hd6305_device::device_start(); - save_item(NAME(m_port_data)); - save_item(NAME(m_port_ddr)); - save_item(NAME(m_tdr)); - save_item(NAME(m_prescaler)); - save_item(NAME(m_tcr)); - save_item(NAME(m_ssr)); - save_item(NAME(m_scr)); - save_item(NAME(m_mr)); - save_item(NAME(m_timer_last_update)); - save_item(NAME(m_sci_tx_data)); - save_item(NAME(m_sci_tx_filled)); - save_item(NAME(m_sci_tx_byte)); - save_item(NAME(m_sci_tx_step)); - - m_timer_timer = timer_alloc(FUNC(hd6305v0_device::timer_cb), this); - m_timer_sci = timer_alloc(FUNC(hd6305v0_device::sci_cb), this); -} - -void hd6305v0_device::device_reset() -{ - hd6305_device::device_reset(); - - std::fill(m_port_data.begin(), m_port_data.end(), 0x00); - std::fill(m_port_ddr.begin(), m_port_ddr.end(), 0x00); - - m_tdr = 0xf0; - m_prescaler = 0x7f; - m_tcr = 0x50; - m_ssr = 0x3f; - m_scr = 0x00; - m_mr = 0x5f; - - m_timer_last_update = total_cycles(); - - m_sci_tx_data = 0; - - m_sci_tx_filled = false; - m_sci_tx_byte = 0; - m_sci_tx_step = 0; - - m_sci_clk(1); - m_sci_tx(1); -} - -u8 hd6305v0_device::port_r(offs_t port) -{ - if(m_port_ddr[port] == 0xff) - return m_port_data[port]; - - return (m_port_ddr[port] & m_port_data[port]) | (m_read_port[port]() & ~m_port_ddr[port]); -} - -void hd6305v0_device::port_w(offs_t port, u8 data) -{ - m_port_data[port] = data; - if(m_port_ddr[port] != 0x00) - m_write_port[port](data | ~m_port_ddr[port]); -} - -u8 hd6305v0_device::port_ddr_r(offs_t port) -{ - return m_port_ddr[port]; -} - -void hd6305v0_device::port_ddr_w(offs_t port, u8 data) -{ - logerror("port %d ddr %c%c%c%c%c%c%c%c\n", - port, - BIT(data, 7) ? 'o': 'i', - BIT(data, 6) ? 'o': 'i', - BIT(data, 5) ? 'o': 'i', - BIT(data, 4) ? 'o': 'i', - BIT(data, 3) ? 'o': 'i', - BIT(data, 2) ? 'o': 'i', - BIT(data, 1) ? 'o': 'i', - BIT(data, 0) ? 'o': 'i'); - m_port_ddr[port] = data; -} - -void hd6305v0_device::timer_update_regs() -{ - u32 counter = m_prescaler; - u64 tc = machine().time().as_ticks(clock())/4; - u32 cycles = tc - m_timer_last_update; - - u32 next_counter = counter + cycles; - u32 shift = BIT(m_tcr, 0, 3); - u32 steps = shift ? (((next_counter >> (shift-1)) + 1) >> 1) - (((counter >> (shift-1)) + 1) >> 1): cycles; - - m_tdr -= steps; - m_prescaler = next_counter & 0x7f; - m_timer_last_update = tc; - if(!m_tdr && steps) { - m_tcr |= 0x80; - if(!BIT(m_tcr, 6)) - m_pending_interrupts |= 1 << M6805V0_INT_TIMER1; - } -} - -void hd6305v0_device::timer_wait_next_timeout() -{ - u32 shift = BIT(m_tcr, 0, 3); - u32 cycles; - if(shift == 0) - cycles = 1; - else { - u32 masked_prescaler = ((1 << shift) - 1) & m_prescaler; - if(masked_prescaler >= (1 << (shift-1))) - cycles = (3 << (shift-1)) - masked_prescaler; - else - cycles = (1 << (shift-1)) - masked_prescaler; - } - if(m_tdr != 1) - cycles += (m_tdr ? m_tdr - 1 : 0xff) << shift; - m_timer_timer->adjust(attotime::from_ticks(cycles*4, clock())); -} - -u8 hd6305v0_device::timer_data_r() -{ - timer_update_regs(); - return m_tdr; -} - -void hd6305v0_device::timer_data_w(u8 data) -{ - timer_update_regs(); - m_tdr = data; - timer_wait_next_timeout(); -} - -u8 hd6305v0_device::timer_ctrl_r() -{ - timer_update_regs(); - return m_tcr; -} - -void hd6305v0_device::timer_ctrl_w(u8 data) -{ - timer_update_regs(); - u8 old = m_tcr; - m_tcr = (m_tcr & data & 0x80) | (data & 0x7f); - if((old ^ m_tcr) & 0x7f) { - logerror("timer ctrl %02x irq=%s, %s clock=%s%s prescale=%d\n", data, - BIT(m_tcr, 7) ? "on" : "off", - BIT(m_tcr, 6) ? "disabled" : "enabled", - BIT(m_tcr, 4, 2) == 0 ? "e" : BIT(m_tcr, 4, 2) == 1 ? "e&timer" : BIT(m_tcr, 4, 2) == 2 ? "off" : "timer", - BIT(m_tcr, 3) ? " reset prescaler" : "", - 1 << BIT(m_tcr, 0, 3) - ); - if(BIT(m_tcr, 4, 2) != 0) - logerror("WARNING: timer mode not implemented\n"); - } - if((m_tcr & 0xc0) == 0x80) - m_pending_interrupts |= 1 << M6805V0_INT_TIMER1; - else - m_pending_interrupts &= ~(1 << M6805V0_INT_TIMER1); - if(BIT(m_tcr, 3)) { - m_prescaler = 0x7f; - m_tcr &= ~0x08; - } - - timer_wait_next_timeout(); -} - - -TIMER_CALLBACK_MEMBER(hd6305v0_device::timer_cb) -{ - timer_update_regs(); - timer_wait_next_timeout(); -} - -u8 hd6305v0_device::misc_r() -{ - return m_mr; -} - -void hd6305v0_device::misc_w(u8 data) -{ - m_mr = (m_mr & data & 0x80) | (data & 0x60) | 0x1f; - logerror("misc %02x int2=%s, %s int=%s\n", data, - BIT(m_mr, 7) ? "on" : "off", - BIT(m_mr, 6) ? "disabled" : "enabled", - BIT(m_mr, 5) ? "edge" : "level"); -} - -void hd6305v0_device::sci_timer_step() -{ - m_timer_sci->adjust(attotime::from_ticks(1 << (BIT(m_scr, 0, 4) + 2), clock())); -} - -TIMER_CALLBACK_MEMBER(hd6305v0_device::sci_cb) -{ - if(m_sci_tx_step == 16) { - m_ssr |= 0x80; - if(!BIT(m_ssr, 5)) - m_pending_interrupts |= 1 << M6805V0_INT_SCI; - - if(m_sci_tx_filled) { - m_sci_tx_filled = false; - m_sci_clk(0); - m_sci_tx_byte = m_sci_tx_data; - logerror("transmit %02x\n", m_sci_tx_byte); - m_sci_tx(m_sci_tx_byte & 0x01); - m_sci_tx_step = 1; - } else { - m_sci_tx_step = 0; - return; - } - } else { - if(m_sci_tx_step & 1) - m_sci_clk(1); - else { - m_sci_clk(0); - m_sci_tx((m_sci_tx_byte >> (m_sci_tx_step >> 1)) & 0x01); - } - m_sci_tx_step++; - } - - sci_timer_step(); -} - -u8 hd6305v0_device::sci_ctrl_r() -{ - return m_scr; -} - -void hd6305v0_device::sci_ctrl_w(u8 data) -{ - m_scr = data; - logerror("sci ctrl %02x d3=%s d4=%s d5=%s rate=%d\n", data, - BIT(data, 7) ? "data_out" : "gpio", - BIT(data, 6) ? "data_in" : "gpio", - BIT(data, 5) == 0 ? "gpio" : BIT(data, 4) ? "clock_in" : "clock_out", - clock()/(1 << (BIT(data, 0, 4) + 3)) - ); -} - -u8 hd6305v0_device::sci_ssr_r() -{ - return m_ssr; -} - -void hd6305v0_device::sci_ssr_w(u8 data) -{ - m_ssr = ((m_ssr & data) & 0xc0) | (data & 0x38) | 7; - logerror("sci ssr w %02x sci irq=%s, %s timer2 irq=%s, %s%s\n", data, - BIT(m_ssr, 7) ? "on" : "off", - BIT(m_ssr, 5) ? "disabled" : "enabled", - BIT(m_ssr, 6) ? "on" : "off", - BIT(m_ssr, 4) ? "disabled" : "enabled", - BIT(m_ssr, 3) ? "reset sci prescaler" : ""); - - if((m_ssr & 0xa0) == 0x80) - m_pending_interrupts |= 1 << M6805V0_INT_SCI; - else - m_pending_interrupts &= ~(1 << M6805V0_INT_SCI); -} - -u8 hd6305v0_device::sci_data_r() -{ - logerror("sci data r\n");\ - return 0x00; -} - -void hd6305v0_device::sci_data_w(u8 data) -{ - m_sci_tx_data = data; - if(m_sci_tx_step == 0) { - m_sci_tx_filled = false; - m_sci_clk(0); - m_sci_tx_byte = m_sci_tx_data; - logerror("transmit %02x\n", m_sci_tx_byte); - m_sci_tx(m_sci_tx_byte & 0x01); - m_sci_tx_step = 1; - sci_timer_step(); - } else - m_sci_tx_filled = true; -} - -void hd6305v0_device::execute_set_input(int inputnum, int state) -{ - // TODO: edge vs. level on int1 - if (inputnum == M6805V0_INT_IRQ1 || inputnum == M6805V0_INT_IRQ2) - { - if (m_irq_state[inputnum] != state) - { - m_irq_state[inputnum] = state; - - if (state != CLEAR_LINE) - { - m_pending_interrupts |= 1 << inputnum; - } - } - } -} - -void hd6305v0_device::interrupt_vector() -{ - if ((m_pending_interrupts & (1 << M6805V0_INT_IRQ1)) != 0) - { - m_pending_interrupts &= ~(1 << M6805V0_INT_IRQ1); - rm16<false>(0x1ffa, m_pc); - } - else if ((m_pending_interrupts & (1 << M6805V0_INT_IRQ2)) != 0) - { - m_pending_interrupts &= ~(1 << M6805V0_INT_IRQ2); - rm16<false>(0x1ff8, m_pc); - } - else if ((m_pending_interrupts & (1 << M6805V0_INT_TIMER1)) != 0) - { - // TODO: 1ff6 when in wait... - m_pending_interrupts &= ~(1 << M6805V0_INT_TIMER1); - rm16<false>(0x1ff8, m_pc); - } - else if ((m_pending_interrupts & (1 << M6805V0_INT_TIMER2)) != 0) - { - m_pending_interrupts &= ~(1 << M6805V0_INT_TIMER2); - rm16<false>(0x1ff4, m_pc); - } - else if ((m_pending_interrupts & (1 << M6805V0_INT_SCI)) != 0) - { - m_pending_interrupts &= ~(1 << M6805V0_INT_SCI); - rm16<false>(0x1ff4, m_pc); - } -} - - -hd6305y2_device::hd6305y2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hd6305_device( - mconfig, - tag, - owner, - clock, - HD6305Y2, - { s_hmos_s_ops, s_hmos_cycles, 14, 0x00ff, 0x00c0, 0x1fff, 0x1ffc }, - address_map_constructor(FUNC(hd6305y2_device::internal_map), this)) -{ -} - -void hd6305y2_device::internal_map(address_map &map) -{ - // TODO: ports, timer, SCI - map(0x0040, 0x013f).ram(); -} - -hd63705z0_device::hd63705z0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : hd6305_device( - mconfig, - tag, - owner, - clock, - HD63705Z0, - { s_hmos_b_ops, s_hmos_cycles, 16, 0x017f, 0x0100, 0x1fff, 0x1ffa }, - address_map_constructor(FUNC(hd63705z0_device::internal_map), this)) -{ -} - -void hd63705z0_device::internal_map(address_map &map) -{ - // TODO: ports, timer, SCI - map(0x0040, 0x01bf).ram(); - map(0x01c0, 0x1fff).rom().region(DEVICE_SELF, 0x01c0); -} - -void hd63705z0_device::execute_set_input(int inputnum, int state) -{ - if (inputnum == INPUT_LINE_NMI) - { - if (m_nmi_state != state) - { - m_nmi_state = state; - - if (state != CLEAR_LINE) - { - m_pending_interrupts |= 1 << HD63705_INT_NMI; - } - } - } - else if (inputnum <= HD63705_INT_ADCONV) - { - if (m_irq_state[inputnum] != state) - { - m_irq_state[inputnum] = state; - - if (state != CLEAR_LINE) - { - m_pending_interrupts |= 1 << inputnum; - } - } - } -} - -void hd63705z0_device::interrupt_vector() -{ - // Need to add emulation of other interrupt sources here KW-2/4/99 - // This is just a quick patch for Namco System 2 operation - - if ((m_pending_interrupts & (1 << HD63705_INT_IRQ1)) != 0) - { - m_pending_interrupts &= ~(1 << HD63705_INT_IRQ1); - if (m_params.m_addr_width > 14) - rm16<true>(0x1ff8, m_pc); - else - rm16<false>(0x1ff8, m_pc); - } - else if ((m_pending_interrupts & (1 << HD63705_INT_IRQ2)) != 0) - { - m_pending_interrupts &= ~(1 << HD63705_INT_IRQ2); - if (m_params.m_addr_width > 14) - rm16<true>(0x1fec, m_pc); - else - rm16<false>(0x1fec, m_pc); - } - else if ((m_pending_interrupts & (1 << HD63705_INT_ADCONV)) != 0) - { - m_pending_interrupts &= ~(1 << HD63705_INT_ADCONV); - if (m_params.m_addr_width > 14) - rm16<true>(0x1fea, m_pc); - else - rm16<false>(0x1fea, m_pc); - } - else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER1)) != 0) - { - m_pending_interrupts &= ~(1 << HD63705_INT_TIMER1); - if (m_params.m_addr_width > 14) - rm16<true>(0x1ff6, m_pc); - else - rm16<false>(0x1ff6, m_pc); - } - else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER2)) != 0) - { - m_pending_interrupts &= ~(1 << HD63705_INT_TIMER2); - if (m_params.m_addr_width > 14) - rm16<true>(0x1ff4, m_pc); - else - rm16<false>(0x1ff4, m_pc); - } - else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER3)) != 0) - { - m_pending_interrupts &= ~(1<<HD63705_INT_TIMER3); - if (m_params.m_addr_width > 14) - rm16<true>(0x1ff2, m_pc); - else - rm16<false>(0x1ff2, m_pc); - } - else if ((m_pending_interrupts & (1 << HD63705_INT_PCI)) != 0) - { - m_pending_interrupts &= ~(1 << HD63705_INT_PCI); - if (m_params.m_addr_width > 14) - rm16<true>(0x1ff0, m_pc); - else - rm16<false>(0x1ff0, m_pc); - } - else if ((m_pending_interrupts & (1 << HD63705_INT_SCI)) != 0) - { - m_pending_interrupts &= ~(1 << HD63705_INT_SCI); - if (m_params.m_addr_width > 14) - rm16<true>(0x1fee, m_pc); - else - rm16<false>(0x1fee, m_pc); - } -} - DEFINE_DEVICE_TYPE(M68HC05EG, m68hc05eg_device, "m68hc05eg", "Motorola MC68HC05EG") -DEFINE_DEVICE_TYPE(HD6305V0, hd6305v0_device, "hd6305v0", "Hitachi HD6305V0") -DEFINE_DEVICE_TYPE(HD6305Y2, hd6305y2_device, "hd6305y2", "Hitachi HD6305Y2") -DEFINE_DEVICE_TYPE(HD63705Z0, hd63705z0_device, "hd63705z0", "Hitachi HD63705Z0") diff --git a/src/devices/cpu/m6805/m6805.h b/src/devices/cpu/m6805/m6805.h index 4fefe663819..6e7780d661d 100644 --- a/src/devices/cpu/m6805/m6805.h +++ b/src/devices/cpu/m6805/m6805.h @@ -11,11 +11,7 @@ // TYPE DEFINITIONS //************************************************************************** -// device type definition DECLARE_DEVICE_TYPE(M68HC05EG, m68hc05eg_device) -DECLARE_DEVICE_TYPE(HD6305V0, hd6305v0_device) -DECLARE_DEVICE_TYPE(HD6305Y2, hd6305y2_device) -DECLARE_DEVICE_TYPE(HD63705Z0, hd63705z0_device) // ======================> m6805_base_device @@ -327,136 +323,6 @@ protected: virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; }; -// ======================> hd6305_device - -class hd6305_device : public m6805_base_device -{ -protected: - // construction/destruction - hd6305_device( - machine_config const &mconfig, - char const *tag, - device_t *owner, - uint32_t clock, - device_type const type, - configuration_params const ¶ms, - address_map_constructor internal_map); - - virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; } - - virtual bool test_il() override { return m_nmi_state != CLEAR_LINE; } -}; - -// ======================> hd6305v0_device - -class hd6305v0_device : public hd6305_device -{ -public: - // construction/destruction - hd6305v0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - auto write_sci_tx() { return m_sci_tx.bind(); } - auto write_sci_clk() { return m_sci_clk.bind(); } - - auto read_porta() { return m_read_port [0].bind(); } - auto write_porta() { return m_write_port[0].bind(); } - auto read_portb() { return m_read_port [1].bind(); } - auto write_portb() { return m_write_port[1].bind(); } - auto read_portc() { return m_read_port [2].bind(); } - auto write_portc() { return m_write_port[2].bind(); } - auto read_portd() { return m_read_port [3].bind(); } - auto write_portd() { return m_write_port[3].bind(); } - -protected: - virtual void device_start() override ATTR_COLD; - virtual void device_reset() override ATTR_COLD; - virtual void execute_set_input(int inputnum, int state) override; - virtual void interrupt_vector() override; - -private: - devcb_read8::array<4> m_read_port; - devcb_write8::array<4> m_write_port; - devcb_write_line m_sci_clk; - devcb_write_line m_sci_tx; - - emu_timer *m_timer_timer; - emu_timer *m_timer_sci; - - std::array<u8, 4> m_port_data; - std::array<u8, 4> m_port_ddr; - - u64 m_timer_last_update; - - u8 m_tdr; - u8 m_prescaler; - u8 m_tcr; - u8 m_ssr; - u8 m_scr; - u8 m_mr; - u8 m_sci_tx_data; - - bool m_sci_tx_filled; - u8 m_sci_tx_byte; - u8 m_sci_tx_step; - - void internal_map(address_map &map) ATTR_COLD; - - u8 port_r(offs_t port); - void port_w(offs_t port, u8 data); - u8 port_ddr_r(offs_t port); - void port_ddr_w(offs_t port, u8 data); - - u8 timer_data_r(); - void timer_data_w(u8 data); - u8 timer_ctrl_r(); - void timer_ctrl_w(u8 data); - void timer_update_regs(); - void timer_wait_next_timeout(); - - u8 misc_r(); - void misc_w(u8 data); - - u8 sci_ctrl_r(); - void sci_ctrl_w(u8 data); - u8 sci_ssr_r(); - void sci_ssr_w(u8 data); - u8 sci_data_r(); - void sci_data_w(u8 data); - - void sci_timer_step(); - - TIMER_CALLBACK_MEMBER(timer_cb); - TIMER_CALLBACK_MEMBER(sci_cb); -}; - -// ======================> hd6305y2_device - -class hd6305y2_device : public hd6305_device -{ -public: - // construction/destruction - hd6305y2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - -private: - void internal_map(address_map &map) ATTR_COLD; -}; - -// ======================> hd63705z0_device - -class hd63705z0_device : public hd6305_device -{ -public: - // construction/destruction - hd63705z0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - -protected: - virtual void execute_set_input(int inputnum, int state) override; - virtual void interrupt_vector() override; - -private: - void internal_map(address_map &map) ATTR_COLD; -}; - #define M6805_IRQ_LINE 0 /**************************************************************************** @@ -467,39 +333,4 @@ private: #define M68HC05EG_INT_TIMER (M6805_IRQ_LINE+1) #define M68HC05EG_INT_CPI (M6805_IRQ_LINE+2) -/**************************************************************************** - * 6805V0 section - ****************************************************************************/ -#define M6805V0_INT_IRQ1 0x00 -#define M6805V0_INT_IRQ2 0x01 -#define M6805V0_INT_TIMER1 0x02 -#define M6805V0_INT_TIMER2 0x03 -#define M6805V0_INT_SCI 0x04 - -/**************************************************************************** - * HD63705 section - ****************************************************************************/ - -#define HD63705_A M6805_A -#define HD63705_PC M6805_PC -#define HD63705_S M6805_S -#define HD63705_X M6805_X -#define HD63705_CC M6805_CC -#define HD63705_NMI_STATE M6805_IRQ_STATE -#define HD63705_IRQ1_STATE M6805_IRQ_STATE+1 -#define HD63705_IRQ2_STATE M6805_IRQ_STATE+2 -#define HD63705_ADCONV_STATE M6805_IRQ_STATE+3 - -#define HD63705_INT_MASK 0x1ff - -#define HD63705_INT_IRQ1 0x00 -#define HD63705_INT_IRQ2 0x01 -#define HD63705_INT_TIMER1 0x02 -#define HD63705_INT_TIMER2 0x03 -#define HD63705_INT_TIMER3 0x04 -#define HD63705_INT_PCI 0x05 -#define HD63705_INT_SCI 0x06 -#define HD63705_INT_ADCONV 0x07 -#define HD63705_INT_NMI 0x08 - #endif // MAME_CPU_M6805_M6805_H diff --git a/src/mame/namco/namco65.h b/src/mame/namco/namco65.h index 9526018e3f1..b2caca762d4 100644 --- a/src/mame/namco/namco65.h +++ b/src/mame/namco/namco65.h @@ -5,7 +5,7 @@ #pragma once -#include "cpu/m6805/m6805.h" +#include "cpu/m6805/hd6305.h" DECLARE_DEVICE_TYPE(NAMCOC65, namcoc65_device) diff --git a/src/mame/skeleton/antonelli_hd6305.cpp b/src/mame/skeleton/antonelli_hd6305.cpp index b2755ccb857..b6785e07d6e 100644 --- a/src/mame/skeleton/antonelli_hd6305.cpp +++ b/src/mame/skeleton/antonelli_hd6305.cpp @@ -7,7 +7,7 @@ ****************************************************************************/ #include "emu.h" -#include "cpu/m6805/m6805.h" +#include "cpu/m6805/hd6305.h" #include "machine/6850acia.h" namespace { diff --git a/src/mame/yamaha/mks3.h b/src/mame/yamaha/mks3.h index c5a98068360..9583c98c7b8 100644 --- a/src/mame/yamaha/mks3.h +++ b/src/mame/yamaha/mks3.h @@ -9,7 +9,7 @@ #pragma once -#include "cpu/m6805/m6805.h" +#include "cpu/m6805/hd6305.h" DECLARE_DEVICE_TYPE(MKS3, mks3_device) diff --git a/src/mame/yamaha/yman1x.cpp b/src/mame/yamaha/yman1x.cpp index bb1afbe23f2..0467d8ccf83 100644 --- a/src/mame/yamaha/yman1x.cpp +++ b/src/mame/yamaha/yman1x.cpp @@ -13,7 +13,7 @@ #include "emu.h" //#include "bus/midi/midi.h" #include "cpu/h8/h83002.h" -#include "cpu/m6805/m6805.h" +#include "cpu/m6805/hd6305.h" #include "mulcd.h" #include "machine/nvram.h" #include "sound/meg.h" diff --git a/src/mame/yamaha/ympsr400.cpp b/src/mame/yamaha/ympsr400.cpp index 501ca143e9a..05a477ccc8c 100644 --- a/src/mame/yamaha/ympsr400.cpp +++ b/src/mame/yamaha/ympsr400.cpp @@ -7,7 +7,7 @@ *******************************************************************************/ #include "emu.h" -#include "cpu/m6805/m6805.h" +#include "cpu/m6805/hd6305.h" #include "cpu/mn1880/mn1880.h" #include "sound/multipcm.h" #include "speaker.h" diff --git a/src/mame/yamaha/ymsy35.cpp b/src/mame/yamaha/ymsy35.cpp index 0b560c182de..54ac2611dc9 100644 --- a/src/mame/yamaha/ymsy35.cpp +++ b/src/mame/yamaha/ymsy35.cpp @@ -9,7 +9,7 @@ #include "emu.h" //#include "bus/midi/midi.h" #include "cpu/h8500/h8520.h" -#include "cpu/m6805/m6805.h" +#include "cpu/m6805/hd6305.h" namespace { |