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authorGravatarGravatar Aaron Giles <aaron@aarongiles.com>2010-12-23 09:50:42 +0000
committerGravatarGravatar Aaron Giles <aaron@aarongiles.com>2010-12-23 09:50:42 +0000
commit6f16e976232e6800788186d6828899bcbdd99d06 (patch)
tree7a5e0853e1257d5966cae97fc0f891f5ebae480f
parent42bc091d003dfea435ac95c0b68573c1a15688ba (diff)
Cleanups and version bump.mame0140u3
-rw-r--r--src/emu/cpu/nec/necpriv.h2
-rw-r--r--src/emu/cpu/nec/v25priv.h2
-rw-r--r--src/emu/machine/6850acia.c4
-rw-r--r--src/emu/machine/s3c2410.h12
-rw-r--r--src/emu/machine/s3c2440.h32
-rw-r--r--src/emu/machine/s3c24xx.c128
-rw-r--r--src/emu/machine/z80ctc.h4
-rw-r--r--src/emu/video/mc6845.c2
-rw-r--r--src/mame/drivers/atarisy1.c14
-rw-r--r--src/mame/drivers/bigfghtr.c58
-rw-r--r--src/mame/drivers/dai3wksi.c2
-rw-r--r--src/mame/drivers/flstory.c50
-rw-r--r--src/mame/drivers/galpani2.c2
-rw-r--r--src/mame/drivers/ghosteo.c78
-rw-r--r--src/mame/drivers/m107.c6
-rw-r--r--src/mame/drivers/midqslvr.c12
-rw-r--r--src/mame/drivers/multfish.c26
-rw-r--r--src/mame/drivers/namcops2.c4
-rw-r--r--src/mame/drivers/namcos23.c98
-rw-r--r--src/mame/drivers/naomi.c6
-rw-r--r--src/mame/drivers/pandoras.c2
-rw-r--r--src/mame/drivers/pgm.c6
-rw-r--r--src/mame/drivers/r2dx_v33.c30
-rw-r--r--src/mame/drivers/raiden2.c2
-rw-r--r--src/mame/drivers/tankbust.c2
-rw-r--r--src/mame/machine/seicop.c12
-rw-r--r--src/mame/mamedriv.c2
-rw-r--r--src/mame/video/m107.c46
-rw-r--r--src/version.c2
29 files changed, 323 insertions, 323 deletions
diff --git a/src/emu/cpu/nec/necpriv.h b/src/emu/cpu/nec/necpriv.h
index aa7e52a0220..c1fb4f7caef 100644
--- a/src/emu/cpu/nec/necpriv.h
+++ b/src/emu/cpu/nec/necpriv.h
@@ -279,7 +279,7 @@ typedef enum {
#define XchgAWReg(Reg) \
WORD tmp; \
tmp = Wreg(Reg); \
- Wreg(Reg) = Wreg(AW); \
+ Wreg(Reg) = Wreg(AW); \
Wreg(AW) = tmp
#define ROL_BYTE nec_state->CarryVal = dst & 0x80; dst = (dst << 1)+CF
diff --git a/src/emu/cpu/nec/v25priv.h b/src/emu/cpu/nec/v25priv.h
index fbf292ade41..50ac646754e 100644
--- a/src/emu/cpu/nec/v25priv.h
+++ b/src/emu/cpu/nec/v25priv.h
@@ -312,7 +312,7 @@ void v25_write_word(v25_state_t *nec_state, unsigned a, unsigned d);
#define XchgAWReg(Reg) \
WORD tmp; \
tmp = Wreg(Reg); \
- Wreg(Reg) = Wreg(AW); \
+ Wreg(Reg) = Wreg(AW); \
Wreg(AW) = tmp
#define ROL_BYTE nec_state->CarryVal = dst & 0x80; dst = (dst << 1)+CF
diff --git a/src/emu/machine/6850acia.c b/src/emu/machine/6850acia.c
index ffe77dddbad..5721109cf8c 100644
--- a/src/emu/machine/6850acia.c
+++ b/src/emu/machine/6850acia.c
@@ -736,7 +736,7 @@ void acia6850_device::rx_clock_in()
/*-------------------------------------------------
- set_rx_clock - set receiver clock
+ set_rx_clock - set receiver clock
-------------------------------------------------*/
void acia6850_device::set_rx_clock(int clock)
@@ -763,7 +763,7 @@ void acia6850_set_rx_clock(running_device *device, int clock)
/*-------------------------------------------------
- set_tx_clock - set receiver clock
+ set_tx_clock - set receiver clock
-------------------------------------------------*/
void acia6850_device::set_tx_clock(int clock)
diff --git a/src/emu/machine/s3c2410.h b/src/emu/machine/s3c2410.h
index fc745340b12..76cacf1a20b 100644
--- a/src/emu/machine/s3c2410.h
+++ b/src/emu/machine/s3c2410.h
@@ -527,12 +527,12 @@ typedef struct
typedef struct
{
- UINT32 nfconf;
- UINT32 nfcmd;
- UINT32 nfaddr;
- UINT32 nfdata;
- UINT32 nfstat;
- UINT32 nfecc;
+ UINT32 nfconf;
+ UINT32 nfcmd;
+ UINT32 nfaddr;
+ UINT32 nfdata;
+ UINT32 nfstat;
+ UINT32 nfecc;
} s3c24xx_nand_regs_t;
typedef struct
diff --git a/src/emu/machine/s3c2440.h b/src/emu/machine/s3c2440.h
index 3aa520f6d15..85a44bb4dfe 100644
--- a/src/emu/machine/s3c2440.h
+++ b/src/emu/machine/s3c2440.h
@@ -557,22 +557,22 @@ typedef struct
typedef struct
{
- UINT32 nfconf;
- UINT32 nfcont;
- UINT32 nfcmd;
- UINT32 nfaddr;
- UINT32 nfdata;
- UINT32 nfmeccd0;
- UINT32 nfmeccd1;
- UINT32 nfseccd;
- UINT32 nfstat;
- UINT32 nfestat0;
- UINT32 nfestat1;
- UINT32 nfmecc0;
- UINT32 nfmecc1;
- UINT32 nfsecc;
- UINT32 nfsblk;
- UINT32 nfeblk;
+ UINT32 nfconf;
+ UINT32 nfcont;
+ UINT32 nfcmd;
+ UINT32 nfaddr;
+ UINT32 nfdata;
+ UINT32 nfmeccd0;
+ UINT32 nfmeccd1;
+ UINT32 nfseccd;
+ UINT32 nfstat;
+ UINT32 nfestat0;
+ UINT32 nfestat1;
+ UINT32 nfmecc0;
+ UINT32 nfmecc1;
+ UINT32 nfsecc;
+ UINT32 nfsblk;
+ UINT32 nfeblk;
} s3c24xx_nand_regs_t;
typedef struct
diff --git a/src/emu/machine/s3c24xx.c b/src/emu/machine/s3c24xx.c
index b807e6da052..5386e668ecf 100644
--- a/src/emu/machine/s3c24xx.c
+++ b/src/emu/machine/s3c24xx.c
@@ -246,45 +246,45 @@ static void s3c24xx_lcd_dma_init( running_device *device)
/*
static UINT32 s3c24xx_lcd_dma_read( running_device *device)
{
- s3c24xx_t *s3c24xx = get_token( device);
- address_space* space = cputag_get_address_space( device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
- UINT8 *vram, data[4];
- vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
- for (int i = 0; i < 2; i++)
- {
- data[i*2+0] = *vram++;
- data[i*2+1] = *vram++;
- s3c24xx->lcd.vramaddr_cur += 2;
- s3c24xx->lcd.pagewidth_cur++;
- if (s3c24xx->lcd.pagewidth_cur >= s3c24xx->lcd.pagewidth_max)
- {
- s3c24xx->lcd.vramaddr_cur += s3c24xx->lcd.offsize << 1;
- s3c24xx->lcd.pagewidth_cur = 0;
- vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
- }
- }
- if (s3c24xx->lcd.hwswp == 0)
- {
- if (s3c24xx->lcd.bswp == 0)
- {
- return (data[3] << 24) | (data[2] << 16) | (data[1] << 8) | (data[0] << 0);
- }
- else
- {
- return (data[0] << 24) | (data[1] << 16) | (data[2] << 8) | (data[3] << 0);
- }
- }
- else
- {
- if (s3c24xx->lcd.bswp == 0)
- {
- return (data[1] << 24) | (data[0] << 16) | (data[3] << 8) | (data[2] << 0);
- }
- else
- {
- return (data[2] << 24) | (data[3] << 16) | (data[0] << 8) | (data[1] << 0);
- }
- }
+ s3c24xx_t *s3c24xx = get_token( device);
+ address_space* space = cputag_get_address_space( device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
+ UINT8 *vram, data[4];
+ vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
+ for (int i = 0; i < 2; i++)
+ {
+ data[i*2+0] = *vram++;
+ data[i*2+1] = *vram++;
+ s3c24xx->lcd.vramaddr_cur += 2;
+ s3c24xx->lcd.pagewidth_cur++;
+ if (s3c24xx->lcd.pagewidth_cur >= s3c24xx->lcd.pagewidth_max)
+ {
+ s3c24xx->lcd.vramaddr_cur += s3c24xx->lcd.offsize << 1;
+ s3c24xx->lcd.pagewidth_cur = 0;
+ vram = (UINT8 *)space->get_read_ptr( s3c24xx->lcd.vramaddr_cur);
+ }
+ }
+ if (s3c24xx->lcd.hwswp == 0)
+ {
+ if (s3c24xx->lcd.bswp == 0)
+ {
+ return (data[3] << 24) | (data[2] << 16) | (data[1] << 8) | (data[0] << 0);
+ }
+ else
+ {
+ return (data[0] << 24) | (data[1] << 16) | (data[2] << 8) | (data[3] << 0);
+ }
+ }
+ else
+ {
+ if (s3c24xx->lcd.bswp == 0)
+ {
+ return (data[1] << 24) | (data[0] << 16) | (data[3] << 8) | (data[2] << 0);
+ }
+ else
+ {
+ return (data[2] << 24) | (data[3] << 16) | (data[0] << 8) | (data[1] << 0);
+ }
+ }
}
*/
@@ -1154,12 +1154,12 @@ static UINT16 s3c24xx_pwm_calc_observation( running_device *device, int ch)
double timeleft, x1, x2;
UINT32 cnto;
timeleft = attotime_to_double( timer_timeleft( s3c24xx->pwm.timer[ch]));
-// printf( "timeleft %f freq %d cntb %d cmpb %d\n", timeleft, s3c24xx->pwm.freq[ch], s3c24xx->pwm.cnt[ch], s3c24xx->pwm.cmp[ch]);
+// printf( "timeleft %f freq %d cntb %d cmpb %d\n", timeleft, s3c24xx->pwm.freq[ch], s3c24xx->pwm.cnt[ch], s3c24xx->pwm.cmp[ch]);
x1 = 1 / ((double)s3c24xx->pwm.freq[ch] / (s3c24xx->pwm.cnt[ch]- s3c24xx->pwm.cmp[ch] + 1));
x2 = x1 / timeleft;
-// printf( "x1 %f\n", x1);
+// printf( "x1 %f\n", x1);
cnto = s3c24xx->pwm.cmp[ch] + ((s3c24xx->pwm.cnt[ch]- s3c24xx->pwm.cmp[ch]) / x2);
-// printf( "cnto %d\n", cnto);
+// printf( "cnto %d\n", cnto);
return cnto;
}
@@ -1219,7 +1219,7 @@ static void s3c24xx_pwm_start( running_device *device, int timer)
{
// todo
freq = (double)pclk / (prescaler + 1) / 1;
- }
+ }
switch (timer)
{
case 0 :
@@ -1263,7 +1263,7 @@ static void s3c24xx_pwm_start( running_device *device, int timer)
}
break;
}
-// hz = freq / (cnt - cmp + 1);
+// hz = freq / (cnt - cmp + 1);
if (cnt < 2)
{
hz = freq;
@@ -1384,7 +1384,7 @@ static void s3c24xx_dma_trigger( running_device *device, int ch)
curr_src = S3C24XX_DCSRC_GET_CURR_SRC( regs->dcsrc);
curr_dst = S3C24XX_DCDST_GET_CURR_DST( regs->dcdst);
servmode = S3C24XX_DCON_GET_SERVMODE( regs->dcon);
- tsz = S3C24XX_DCON_GET_TSZ( regs->dcon);
+ tsz = S3C24XX_DCON_GET_TSZ( regs->dcon);
#if defined(DEVICE_S3C2400)
inc_src = BIT( regs->disrc, 29);
inc_dst = BIT( regs->didst, 29);
@@ -1525,12 +1525,12 @@ static void s3c24xx_dma_w( running_device *device, UINT32 ch, UINT32 offset, UIN
case S3C24XX_DCON :
{
/* --- is this code necessary ???
- if ((data & (1 << 22)) != 0) // reload
- {
- s3c24xx_dma_regs_t *regs = &s3c24xx->dma[ch].regs;
- regs->dmasktrig &= ~(1 << 1); // clear on/off
- }
- */
+ if ((data & (1 << 22)) != 0) // reload
+ {
+ s3c24xx_dma_regs_t *regs = &s3c24xx->dma[ch].regs;
+ regs->dmasktrig &= ~(1 << 1); // clear on/off
+ }
+ */
}
break;
case S3C24XX_DMASKTRIG :
@@ -1847,14 +1847,14 @@ static void s3c24xx_uart_w( running_device *device, UINT32 ch, UINT32 offset, UI
static READ32_DEVICE_HANDLER( s3c24xx_uart_0_r )
{
UINT32 data = s3c24xx_uart_r( device, 0, offset);
-// verboselog( device->machine, 9, "(UART 0) %08X -> %08X\n", S3C24XX_BASE_UART_0 + (offset << 2), data);
+// verboselog( device->machine, 9, "(UART 0) %08X -> %08X\n", S3C24XX_BASE_UART_0 + (offset << 2), data);
return data;
}
static READ32_DEVICE_HANDLER( s3c24xx_uart_1_r )
{
UINT32 data = s3c24xx_uart_r( device, 1, offset);
-// verboselog( device->machine, 9, "(UART 1) %08X -> %08X\n", S3C24XX_BASE_UART_1 + (offset << 2), data);
+// verboselog( device->machine, 9, "(UART 1) %08X -> %08X\n", S3C24XX_BASE_UART_1 + (offset << 2), data);
return data;
}
@@ -1863,7 +1863,7 @@ static READ32_DEVICE_HANDLER( s3c24xx_uart_1_r )
static READ32_DEVICE_HANDLER( s3c24xx_uart_2_r )
{
UINT32 data = s3c24xx_uart_r( device, 2, offset);
-// verboselog( device->machine, 9, "(UART 2) %08X -> %08X\n", S3C24XX_BASE_UART_2 + (offset << 2), data);
+// verboselog( device->machine, 9, "(UART 2) %08X -> %08X\n", S3C24XX_BASE_UART_2 + (offset << 2), data);
return data;
}
@@ -1871,13 +1871,13 @@ static READ32_DEVICE_HANDLER( s3c24xx_uart_2_r )
static WRITE32_DEVICE_HANDLER( s3c24xx_uart_0_w )
{
-// verboselog( device->machine, 9, "(UART 0) %08X <- %08X\n", S3C24XX_BASE_UART_0 + (offset << 2), data);
+// verboselog( device->machine, 9, "(UART 0) %08X <- %08X\n", S3C24XX_BASE_UART_0 + (offset << 2), data);
s3c24xx_uart_w( device, 0, offset, data, mem_mask);
}
static WRITE32_DEVICE_HANDLER( s3c24xx_uart_1_w )
{
-// verboselog( device->machine, 9, "(UART 1) %08X <- %08X\n", S3C24XX_BASE_UART_1 + (offset << 2), data);
+// verboselog( device->machine, 9, "(UART 1) %08X <- %08X\n", S3C24XX_BASE_UART_1 + (offset << 2), data);
s3c24xx_uart_w( device, 1, offset, data, mem_mask);
}
@@ -1885,7 +1885,7 @@ static WRITE32_DEVICE_HANDLER( s3c24xx_uart_1_w )
static WRITE32_DEVICE_HANDLER( s3c24xx_uart_2_w )
{
-// verboselog( device->machine, 9, "(UART 2) %08X <- %08X\n", S3C24XX_BASE_UART_2 + (offset << 2), data);
+// verboselog( device->machine, 9, "(UART 2) %08X <- %08X\n", S3C24XX_BASE_UART_2 + (offset << 2), data);
s3c24xx_uart_w( device, 2, offset, data, mem_mask);
}
@@ -1893,7 +1893,7 @@ static WRITE32_DEVICE_HANDLER( s3c24xx_uart_2_w )
static void s3c24xx_uart_fifo_w( running_device *device, int uart, UINT8 data)
{
-// printf( "s3c24xx_uart_fifo_w (%c)\n", data);
+// printf( "s3c24xx_uart_fifo_w (%c)\n", data);
s3c24xx_t *s3c24xx = get_token( device);
s3c24xx->uart[uart].regs.urxh = data;
s3c24xx->uart[uart].regs.utrstat |= 1; // [bit 0] Receive buffer data ready
@@ -2183,7 +2183,7 @@ static WRITE32_DEVICE_HANDLER( s3c24xx_iic_w )
if (s3c24xx->iic.count == 0)
{
iic_start( device);
-
+
}
else
{
@@ -2212,7 +2212,7 @@ static WRITE32_DEVICE_HANDLER( s3c24xx_iic_w )
if (s3c24xx->iic.count == 0)
{
iic_start( device);
-
+
}
else
{
@@ -2385,7 +2385,7 @@ static void s3c24xx_rtc_recalc( running_device *device)
double freq;
ttc = BITS( s3c24xx->rtc.regs.ticnt, 6, 0);
freq = 128 / (ttc + 1);
-// printf( "ttc %d freq %f\n", ttc, freq);
+// printf( "ttc %d freq %f\n", ttc, freq);
timer_adjust_periodic( s3c24xx->rtc.timer_tick_count, ATTOTIME_IN_HZ( freq), 0, ATTOTIME_IN_HZ( freq));
}
else
@@ -2866,7 +2866,7 @@ static READ32_DEVICE_HANDLER( s3c24xx_nand_r )
#if defined(DEVICE_S3C2440)
case S3C24XX_NFMECC0 :
{
-
+
data = (s3c24xx->nand.mecc[3] << 24) | (s3c24xx->nand.mecc[2] << 16) | (s3c24xx->nand.mecc[1] << 8) | (s3c24xx->nand.mecc[0] << 0);
}
break;
@@ -3043,7 +3043,7 @@ static DEVICE_RESET( s3c24xx )
{
s3c24xx_t *s3c24xx = get_token( device);
s3c24xx->iis.fifo_index = 0;
-// s3c24xx->iic.data_index = 0;
+// s3c24xx->iic.data_index = 0;
}
static DEVICE_START( s3c24xx )
@@ -3069,7 +3069,7 @@ static DEVICE_GET_INFO( s3c24xx )
/* --- the following bits of info are returned as 64-bit signed integers --- */
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(s3c24xx_t); break;
case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = 0; break;
-// case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
+// case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(s3c24xx); break;
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(s3c24xx); break;
diff --git a/src/emu/machine/z80ctc.h b/src/emu/machine/z80ctc.h
index 32cef797e01..405ddd0ed02 100644
--- a/src/emu/machine/z80ctc.h
+++ b/src/emu/machine/z80ctc.h
@@ -4,7 +4,7 @@
Copyright Nicola Salmoria and the MAME Team.
Visit http://mamedev.org for licensing and usage restrictions.
-
+
****************************************************************************
_____ _____
D4 1 |* \_/ | 28 D3
@@ -21,7 +21,7 @@
_INT 12 | | 17 _RESET
IEI 13 | | 16 _CE
_M1 14 |_____________| 15 CLK
-
+
***************************************************************************/
#ifndef __Z80CTC_H__
diff --git a/src/emu/video/mc6845.c b/src/emu/video/mc6845.c
index 88e33cd2904..5d42795d214 100644
--- a/src/emu/video/mc6845.c
+++ b/src/emu/video/mc6845.c
@@ -54,7 +54,7 @@ enum
#define MODE_DISPLAY_ENABLE_SKEW(d) (((d)->mode_control & 0x10) != 0)
#define MODE_ROW_COLUMN_ADDRESSING(d) (((d)->mode_control & 0x04) != 0)
-/* capabilities */ /* MC6845 MC6845-1 C6545-1 R6545-1 H46505 HD6845 SY6545-1 SY6845E */
+/* capabilities */ /* MC6845 MC6845-1 C6545-1 R6545-1 H46505 HD6845 SY6545-1 SY6845E */
static const int supports_disp_start_addr_r[NUM_TYPES] = { TRUE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE };
static const int supports_vert_sync_width[NUM_TYPES] = { FALSE, TRUE, TRUE, TRUE, FALSE, TRUE, TRUE, TRUE };
static const int supports_status_reg_d5[NUM_TYPES] = { FALSE, FALSE, TRUE, TRUE, FALSE, FALSE, TRUE, TRUE };
diff --git a/src/mame/drivers/atarisy1.c b/src/mame/drivers/atarisy1.c
index 59e4592bbfb..35eaf7e6727 100644
--- a/src/mame/drivers/atarisy1.c
+++ b/src/mame/drivers/atarisy1.c
@@ -175,13 +175,13 @@ and clears the EEROM accordingly.
Here is the list, which includes confirmed (*) and unconfirmed values:
-Diagnostic Cartridge: 255
-Peter Packrat: 000*
-Marble Madness: 001*
-Indiana Jones - Temple of Doom: 002*
-Road Runner: 003*
-Relief Pitcher (unreleased): 004
-Off-Road (unreleased): 004
+Diagnostic Cartridge: 255
+Peter Packrat: 000*
+Marble Madness: 001*
+Indiana Jones - Temple of Doom: 002*
+Road Runner: 003*
+Relief Pitcher (unreleased): 004
+Off-Road (unreleased): 004
RoadBlasters (aka Future Vette):005*
diff --git a/src/mame/drivers/bigfghtr.c b/src/mame/drivers/bigfghtr.c
index 982b36eb473..1d36eecceb8 100644
--- a/src/mame/drivers/bigfghtr.c
+++ b/src/mame/drivers/bigfghtr.c
@@ -396,34 +396,34 @@ static READ16_HANDLER(sharedram_r)
return (input_port_read(space->machine, "P2") & 0xffff) ^ 0xffff;
/*
- protection controls where the program code should jump to.
+ protection controls where the program code should jump to.
- example snippet:
- 00DB2A: 41FA FE86 lea (-$17a,PC), A0; ($d9b2) ;base program vector
- 00DB2E: 4DF9 0008 0E2A lea $80e2a.l, A6 ;base RAM vector, used by the i8751 to send the value, this value is added to the above A0
- 00DB34: 3039 0008 0E62 move.w $80e62.l, D0 ;number of snippets to execute
- 00DB3A: 6100 00F0 bsr $dc2c
- */
+ example snippet:
+ 00DB2A: 41FA FE86 lea (-$17a,PC), A0; ($d9b2) ;base program vector
+ 00DB2E: 4DF9 0008 0E2A lea $80e2a.l, A6 ;base RAM vector, used by the i8751 to send the value, this value is added to the above A0
+ 00DB34: 3039 0008 0E62 move.w $80e62.l, D0 ;number of snippets to execute
+ 00DB3A: 6100 00F0 bsr $dc2c
+ */
/* bp daee, A0 = 0xdd02, A6 = 0x808ca, D0 = 0x80902 */
//case 0x902/2:
- // return 0x0001;
+ // return 0x0001;
//case (0x90a+0x24)/2:
- // return 0x0001;
+ // return 0x0001;
//case (0x902+8)/2:
- // return 0x0004; // 0xf86a
+ // return 0x0004; // 0xf86a
/* bp db02, A0 = 0xdc2e, A6 = 0x80912, D0 = 0x8094a */
//case 0x94a/2:
- // return 1;
+ // return 1;
//case (0x94a+8)/2:
- // return 0x00dc; // 0xd62e
+ // return 0x00dc; // 0xd62e
/* bp db16, A0 = 0xda86, A6 = 0x80c22, D0 = 0x80c5a */
//case 0xc5a/2:
- // return 1;
+ // return 1;
//case (0xc5a+8)/2:
- // return 0x0288; // 0x345f4
+ // return 0x0288; // 0x345f4
/* bp db2a, A0 = 0xd9b2, A6 = 0x80e2a, D0 = 0x80e62 */
@@ -452,21 +452,21 @@ static READ16_HANDLER(sharedram_r)
/*case 0x
- case 0x94a/2:
- return 0x0002*4;
- case (0x90a+2*0x40)/2:
- case (0x90a+3*0x40)/2:
- return 0x0003*4;
- case (0x90a+4*0x40)/2:
- return 0x000c*4; // 0x13d74
- case (0x90a+5*0x40)/2:
- return 0x000d*4; // 0x130f6
- case (0x90a+6*0x40)/2:
- return 0x000e*4; // 0x1817e
- case (0x90a+7*0x40)/2:
- return 0x0010*4; // 0x15924
- //case (0x90a+0x25)/2:
- // return 2;*/
+ case 0x94a/2:
+ return 0x0002*4;
+ case (0x90a+2*0x40)/2:
+ case (0x90a+3*0x40)/2:
+ return 0x0003*4;
+ case (0x90a+4*0x40)/2:
+ return 0x000c*4; // 0x13d74
+ case (0x90a+5*0x40)/2:
+ return 0x000d*4; // 0x130f6
+ case (0x90a+6*0x40)/2:
+ return 0x000e*4; // 0x1817e
+ case (0x90a+7*0x40)/2:
+ return 0x0010*4; // 0x15924
+ //case (0x90a+0x25)/2:
+ // return 2;*/
}
}
diff --git a/src/mame/drivers/dai3wksi.c b/src/mame/drivers/dai3wksi.c
index cc766744a69..88d3b0be571 100644
--- a/src/mame/drivers/dai3wksi.c
+++ b/src/mame/drivers/dai3wksi.c
@@ -388,7 +388,7 @@ static MACHINE_CONFIG_START( dai3wksi, dai3wksi_state )
MDRV_MACHINE_START(dai3wksi)
MDRV_MACHINE_RESET(dai3wksi)
-
+
/* video hardware */
MDRV_VIDEO_UPDATE(dai3wksi)
diff --git a/src/mame/drivers/flstory.c b/src/mame/drivers/flstory.c
index ae703585f4b..73038df0b46 100644
--- a/src/mame/drivers/flstory.c
+++ b/src/mame/drivers/flstory.c
@@ -186,15 +186,15 @@ static READ8_HANDLER( rumba_mcu_r )
case 0x42:
{
/* TODO: subtle behaviour for transitioning from level 16 to level 17 (loop clear?). Command is:
- 0xc0 -> param -> 0xc1 -> param -> ... 0xc7 -> param -> 0x0e (end of packet) then reads at 0x40 -> 0x41 and 0x42
+ 0xc0 -> param -> 0xc1 -> param -> ... 0xc7 -> param -> 0x0e (end of packet) then reads at 0x40 -> 0x41 and 0x42
- Params written doesn't make any sense, they are copies from RAM addresses at 0xe450-7 and they looks like ... garbage.
- It's possible that all of this it just increments by one an internal RAM address in the MCU and then it sends a six when this counter
- has bits 0-3 == 0 (BCD operation?), but then the question is ... how it determines game over?
+ Params written doesn't make any sense, they are copies from RAM addresses at 0xe450-7 and they looks like ... garbage.
+ It's possible that all of this it just increments by one an internal RAM address in the MCU and then it sends a six when this counter
+ has bits 0-3 == 0 (BCD operation?), but then the question is ... how it determines game over?
- According to a PCB test, game should roll back to level 1 layout but level counter should say "17" instead of current "11". Some of these ports also appears to control
- game-play speed and who is playing between player 1 and 2.
- */
+ According to a PCB test, game should roll back to level 1 layout but level counter should say "17" instead of current "11". Some of these ports also appears to control
+ game-play speed and who is playing between player 1 and 2.
+ */
//static UINT8 level_val;
//level_val = space->read_byte(0xe247);
@@ -202,12 +202,12 @@ static READ8_HANDLER( rumba_mcu_r )
//popmessage("%02x",level_val);
//if((level_val & 0x0f) == 0x00)
- // return 0; //6
+ // return 0; //6
return 0;
}
//case 0x42: return 0x06;
- //default: printf("PC=%04x R %02x\n",cpu_get_pc(space->cpu),mcu_cmd); break;
+ //default: printf("PC=%04x R %02x\n",cpu_get_pc(space->cpu),mcu_cmd); break;
}
return 0;
@@ -216,10 +216,10 @@ static READ8_HANDLER( rumba_mcu_r )
static WRITE8_HANDLER( rumba_mcu_w )
{
//if((mcu_cmd & 0xf0) == 0xc0)
- // printf("%02x ",data);
+ // printf("%02x ",data);
//if(mcu_cmd == 0x42)
- // printf("\n");
+ // printf("\n");
if(mcu_param)
{
@@ -232,8 +232,8 @@ static WRITE8_HANDLER( rumba_mcu_w )
case 0xb0: // counter, used by command 0xb1 (and something else?
{
/*
- sends 0xb0 -> param then 0xb1 -> param -> 0x01 (end of cmd packet?) finally 0x31 for reply
- */
+ sends 0xb0 -> param then 0xb1 -> param -> 0x01 (end of cmd packet?) finally 0x31 for reply
+ */
mcu_counter = data;
@@ -256,8 +256,8 @@ static WRITE8_HANDLER( rumba_mcu_w )
case 0xb2: // player sprite hook-up param when he throws the wheel
{
/*
- sends 0xb2 -> param -> 0x02 (end of cmd packet?) then 0x33 for reply
- */
+ sends 0xb2 -> param -> 0x02 (end of cmd packet?) then 0x33 for reply
+ */
switch(data)
{
@@ -271,8 +271,8 @@ static WRITE8_HANDLER( rumba_mcu_w )
case 0xbb: // when you start a level, lives
{
/*
- sends 0xbb -> param -> 0x04 (end of cmd packet?) then 0x3b for reply
- */
+ sends 0xbb -> param -> 0x04 (end of cmd packet?) then 0x3b for reply
+ */
mcu_bb_res = data;
//printf("PC=%04x W %02x -> %02x\n",cpu_get_pc(space->cpu),mcu_cmd,data);
@@ -285,8 +285,8 @@ static WRITE8_HANDLER( rumba_mcu_w )
//popmessage("%02x",mcu_b4_cmd);
/*
- sends 0xb4 -> param -> 0xb5 -> param (bird X coord) -> 0xb6 -> param (bird Y coord) ->
- */
+ sends 0xb4 -> param -> 0xb5 -> param (bird X coord) -> 0xb6 -> param (bird Y coord) ->
+ */
#if 0
switch(data)
@@ -327,10 +327,10 @@ static WRITE8_HANDLER( rumba_mcu_w )
}
//if((mcu_cmd & 0xf0) == 0xc0)
- // printf("%02x ",data);
+ // printf("%02x ",data);
//if(mcu_cmd == 0xc7)
- // printf("\n");
+ // printf("\n");
return;
}
@@ -344,13 +344,13 @@ static WRITE8_HANDLER( rumba_mcu_w )
static ADDRESS_MAP_START( rumba_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0xbfff) AM_ROM
AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(flstory_videoram_w) AM_BASE_SIZE_MEMBER(flstory_state, videoram, videoram_size)
-// AM_RANGE(0xc800, 0xcfff) AM_RAM /* unknown */
+// AM_RANGE(0xc800, 0xcfff) AM_RAM /* unknown */
AM_RANGE(0xd000, 0xd000) AM_READWRITE(rumba_mcu_r, rumba_mcu_w)
AM_RANGE(0xd001, 0xd001) AM_WRITENOP /* watchdog? */
-// AM_RANGE(0xd002, 0xd002) AM_NOP /* unknown read & coin lock out? */
+// AM_RANGE(0xd002, 0xd002) AM_NOP /* unknown read & coin lock out? */
AM_RANGE(0xd400, 0xd400) AM_READWRITE(from_snd_r, sound_command_w)
AM_RANGE(0xd401, 0xd401) AM_READ(snd_flag_r)
-// AM_RANGE(0xd403, 0xd403) AM_READNOP /* unknown */
+// AM_RANGE(0xd403, 0xd403) AM_READNOP /* unknown */
AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
@@ -363,7 +363,7 @@ static ADDRESS_MAP_START( rumba_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xdc00, 0xdc9f) AM_RAM AM_BASE_SIZE_MEMBER(flstory_state, spriteram, spriteram_size)
AM_RANGE(0xdca0, 0xdcbf) AM_RAM_WRITE(flstory_scrlram_w) AM_BASE_MEMBER(flstory_state, scrlram)
AM_RANGE(0xdce0, 0xdce0) AM_READWRITE(victnine_gfxctrl_r, victnine_gfxctrl_w)
-// AM_RANGE(0xdce1, 0xdce1) AM_WRITENOP /* unknown */
+// AM_RANGE(0xdce1, 0xdce1) AM_WRITENOP /* unknown */
AM_RANGE(0xdd00, 0xdeff) AM_READWRITE(flstory_palette_r, flstory_palette_w)
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_MEMBER(flstory_state, workram) /* work RAM */
ADDRESS_MAP_END
diff --git a/src/mame/drivers/galpani2.c b/src/mame/drivers/galpani2.c
index 71259fa5dcd..aeda63c948d 100644
--- a/src/mame/drivers/galpani2.c
+++ b/src/mame/drivers/galpani2.c
@@ -610,7 +610,7 @@ static MACHINE_CONFIG_START( galpani2, driver_device )
MDRV_OKIM6295_ADD("oki1", XTAL_20MHz/10, OKIM6295_PIN7_HIGH) /* Confirmed on galpani2i PCB */
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
- MDRV_OKIM6295_ADD("oki2", XTAL_20MHz/10, OKIM6295_PIN7_HIGH) /* Confirmed on galpani2i PCB */
+ MDRV_OKIM6295_ADD("oki2", XTAL_20MHz/10, OKIM6295_PIN7_HIGH) /* Confirmed on galpani2i PCB */
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/ghosteo.c b/src/mame/drivers/ghosteo.c
index cb711916b3d..28ebcf6916c 100644
--- a/src/mame/drivers/ghosteo.c
+++ b/src/mame/drivers/ghosteo.c
@@ -155,7 +155,7 @@ static void s3c2410_gpio_port_w( running_device *device, int port, UINT32 data)
static WRITE8_DEVICE_HANDLER( s3c2410_nand_command_w )
{
-// running_device *nand = device->machine->device( "nand");
+// running_device *nand = device->machine->device( "nand");
logerror( "s3c2410_nand_command_w %02X\n", data);
switch (data)
{
@@ -177,7 +177,7 @@ static WRITE8_DEVICE_HANDLER( s3c2410_nand_command_w )
static WRITE8_DEVICE_HANDLER( s3c2410_nand_address_w )
{
-// running_device *nand = device->machine->device( "nand");
+// running_device *nand = device->machine->device( "nand");
logerror( "s3c2410_nand_address_w %02X\n", data);
switch (nand.mode)
{
@@ -209,7 +209,7 @@ static WRITE8_DEVICE_HANDLER( s3c2410_nand_address_w )
static READ8_DEVICE_HANDLER( s3c2410_nand_data_r )
{
-// running_device *nand = device->machine->device( "nand");
+// running_device *nand = device->machine->device( "nand");
UINT8 data = 0;
switch (nand.mode)
{
@@ -254,14 +254,14 @@ static READ8_DEVICE_HANDLER( s3c2410_nand_data_r )
static WRITE8_DEVICE_HANDLER( s3c2410_nand_data_w )
{
-// running_device *nand = device->machine->device( "nand");
+// running_device *nand = device->machine->device( "nand");
logerror( "s3c2410_nand_data_w %02X\n", data);
}
static WRITE_LINE_DEVICE_HANDLER( s3c2410_i2c_scl_w )
{
running_device *i2cmem = device->machine->device( "i2cmem");
-// logerror( "s3c2410_i2c_scl_w %d\n", state ? 1 : 0);
+// logerror( "s3c2410_i2c_scl_w %d\n", state ? 1 : 0);
i2cmem_scl_write( i2cmem, state);
}
@@ -270,14 +270,14 @@ static READ_LINE_DEVICE_HANDLER( s3c2410_i2c_sda_r )
running_device *i2cmem = device->machine->device( "i2cmem");
int state;
state = i2cmem_sda_read( i2cmem);
-// logerror( "s3c2410_i2c_sda_r %d\n", state ? 1 : 0);
+// logerror( "s3c2410_i2c_sda_r %d\n", state ? 1 : 0);
return state;
}
static WRITE_LINE_DEVICE_HANDLER( s3c2410_i2c_sda_w )
{
running_device *i2cmem = device->machine->device( "i2cmem");
-// logerror( "s3c2410_i2c_sda_w %d\n", state ? 1 : 0);
+// logerror( "s3c2410_i2c_sda_w %d\n", state ? 1 : 0);
i2cmem_sda_write( i2cmem, state);
}
@@ -308,32 +308,32 @@ ADDRESS_MAP_END
/*
static INPUT_PORTS_START( bballoon )
- PORT_START("10000000")
- PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
- PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
- PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
- PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
- PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
- PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
- PORT_BIT( 0xFFFFFFC0, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
- PORT_START("10100000")
- PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
- PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
- PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
- PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
- PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
- PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
- PORT_BIT( 0xFFFFFFC0, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
- PORT_START("10200000")
- PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 )
- PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_COIN2 )
- PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_START1 )
- PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_START2 )
- PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_START3 )
- PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_SERVICE1 ) // "test button"
- PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_START4 )
- PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_SERVICE2 ) // "service button"
- PORT_BIT( 0xFFFFFF00, IP_ACTIVE_LOW, IPT_START5 )
+ PORT_START("10000000")
+ PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
+ PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
+ PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
+ PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
+ PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
+ PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
+ PORT_BIT( 0xFFFFFFC0, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
+ PORT_START("10100000")
+ PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
+ PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
+ PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
+ PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
+ PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
+ PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
+ PORT_BIT( 0xFFFFFFC0, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
+ PORT_START("10200000")
+ PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 )
+ PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_COIN2 )
+ PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_START1 )
+ PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_START2 )
+ PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_START3 )
+ PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_SERVICE1 ) // "test button"
+ PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_START4 )
+ PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_SERVICE2 ) // "service button"
+ PORT_BIT( 0xFFFFFF00, IP_ACTIVE_LOW, IPT_START5 )
INPUT_PORTS_END
*/
@@ -367,7 +367,7 @@ INPUT_PORTS_END
/*
static NAND_INTERFACE( bballoon_nand_intf )
{
- DEVCB_DEVICE_LINE("s3c2410", s3c2410_pin_frnb_w)
+ DEVCB_DEVICE_LINE("s3c2410", s3c2410_pin_frnb_w)
};
*/
@@ -399,7 +399,7 @@ static READ32_HANDLER( bballoon_speedup_r )
int pc = cpu_get_pc(space->cpu);
-
+
// these are vblank waits
if (pc == 0x3001c0e4 || pc == 0x3001c0d8)
{
@@ -412,7 +412,7 @@ static READ32_HANDLER( bballoon_speedup_r )
cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(20));
}
//else
- // printf("speedup %08x %08x\n", pc, ret);
+ // printf("speedup %08x %08x\n", pc, ret);
return ret;
}
@@ -445,10 +445,10 @@ static MACHINE_CONFIG_START( bballoon, driver_device )
MDRV_S3C2410_ADD("s3c2410", 12000000, bballoon_s3c2410_intf)
-// MDRV_NAND_ADD("nand", 0xEC, 0x75)
-// MDRV_DEVICE_CONFIG(bballoon_nand_intf)
+// MDRV_NAND_ADD("nand", 0xEC, 0x75)
+// MDRV_DEVICE_CONFIG(bballoon_nand_intf)
-// MDRV_I2CMEM_ADD("i2cmem", 0xA0, 0, 0x100, NULL)
+// MDRV_I2CMEM_ADD("i2cmem", 0xA0, 0, 0x100, NULL)
MDRV_I2CMEM_ADD("i2cmem", i2cmem_interface)
/* sound hardware */
diff --git a/src/mame/drivers/m107.c b/src/mame/drivers/m107.c
index 0697aee19af..c13e992fd1d 100644
--- a/src/mame/drivers/m107.c
+++ b/src/mame/drivers/m107.c
@@ -197,9 +197,9 @@ ADDRESS_MAP_END
static WRITE16_HANDLER( wpksoc_output_w )
{
/*
- x--- ---- ?
- ---- --xx lamps
- */
+ x--- ---- ?
+ ---- --xx lamps
+ */
if(data & 0x7c)
popmessage("%04x",data);
}
diff --git a/src/mame/drivers/midqslvr.c b/src/mame/drivers/midqslvr.c
index 2240ff60836..5e242a19a10 100644
--- a/src/mame/drivers/midqslvr.c
+++ b/src/mame/drivers/midqslvr.c
@@ -1,12 +1,12 @@
/***************************************************************************
- Midway Quicksilver skeleton driver
+ Midway Quicksilver skeleton driver
- Main CPU : Intel Celeron 333/366MHz
- Motherboard : Intel SE44BX-2
- RAM : 64MB
- Graphics Chips : Quantum Obsidian 3DFX
- Storage : Hard Drive
+ Main CPU : Intel Celeron 333/366MHz
+ Motherboard : Intel SE44BX-2
+ RAM : 64MB
+ Graphics Chips : Quantum Obsidian 3DFX
+ Storage : Hard Drive
***************************************************************************/
#include "emu.h"
diff --git a/src/mame/drivers/multfish.c b/src/mame/drivers/multfish.c
index 2e3fda766e2..42d56b32d64 100644
--- a/src/mame/drivers/multfish.c
+++ b/src/mame/drivers/multfish.c
@@ -1079,16 +1079,16 @@ The GFX ROMs do not have labels, for clarity we name
them as on Igrosoft web-site hash tables.
code roms:
-xx_m_xxxxxx.rom - world relase
-xx_xxxxxx.rom - release for Russia (or for all, if the game does not have different roms for different regions)
-xx_l_xxxxxx.rom - lottery game
-xx_e_xxxxxx.rom - entertainment game
+xx_m_xxxxxx.rom - world relase
+xx_xxxxxx.rom - release for Russia (or for all, if the game does not have different roms for different regions)
+xx_l_xxxxxx.rom - lottery game
+xx_e_xxxxxx.rom - entertainment game
graphics roms:
-xxxxxxxx_m.00x - roms for world relase
-xxxxxxxx.00x - release for Russia (or for all, if the game does not have special gfx-sets for different regions)
-xxxxxxxx_loto.00x - lottery sets
-xxxxxxxx_ent.00x - entertainment sets
+xxxxxxxx_m.00x - roms for world relase
+xxxxxxxx.00x - release for Russia (or for all, if the game does not have special gfx-sets for different regions)
+xxxxxxxx_loto.00x - lottery sets
+xxxxxxxx_ent.00x - entertainment sets
*/
@@ -1130,7 +1130,7 @@ ROM_END
ROM_START( mfish_3 ) // 021124
ROM_REGION( 0x40000, "maincpu", 0 )
ROM_LOAD( "mf021124.rom", 0x00000, 0x40000, CRC(59fd16f5) SHA1(ea132f68e9c09c40369d4cc02c670ee6e26bdcbe) )
-
+
ROM_REGION( 0x400000, "gfx", 0 )
ROM_LOAD( "multi_fish.001", 0x000000, 0x80000, CRC(2f2a7367) SHA1(ce7ee9ca4f374ec61edc3b89d4752f0edb64a910) )
ROM_LOAD( "multi_fish.002", 0x100000, 0x80000, CRC(606acd73) SHA1(ce5f7b1366dbb16d57fe4b7f395f08725e3cf756) )
@@ -1599,7 +1599,7 @@ ROM_END
ROM_START( fcockt_11 ) // 070822
ROM_REGION( 0x40000, "maincpu", 0 ) // z80 code, banked
ROM_LOAD( "fc_070822.rom", 0x00000, 0x40000, CRC(f156657d) SHA1(bd538e714a87461bdf84df18ae3f8caeee876747) )
-
+
ROM_REGION( 0x400000, "gfx", 0 )
ROM_LOAD( "fruitcocktail.001", 0x000000, 0x80000, CRC(735FBE79) SHA1(6ab590e00043dcb6648fd942e11747486d497df1) ) /* Only this set is listed as official hashes */
ROM_LOAD( "fruitcocktail.002", 0x100000, 0x80000, CRC(28fc888e) SHA1(2b8c55675bf61203682d560c9b3f29568719113f) )
@@ -1756,10 +1756,10 @@ ROM_START( lhaunt_8 ) // 070604
ROM_END
-
+
/*********************************************************
Garage
-
+
"Russia" sets use different gfx roms 1-4.
The official list of hashes shows only updated roms.
@@ -2138,7 +2138,7 @@ ROM_START( island_2 ) // 070409
ROM_LOAD( "island.008", 0x380000, 0x80000, CRC(ac6fba48) SHA1(64dd03d624f16da52bc7fa0702246e91ae39a806) )
ROM_END
-
+
/*********************************************************
Island 2
**********************************************************/
diff --git a/src/mame/drivers/namcops2.c b/src/mame/drivers/namcops2.c
index 2fb56dcf3f8..4bd74b7004d 100644
--- a/src/mame/drivers/namcops2.c
+++ b/src/mame/drivers/namcops2.c
@@ -332,8 +332,8 @@ ROM_START( scptour )
SYSTEM246_BIOS
ROM_REGION(0x840000, "key", ROMREGION_ERASE00)
- ROM_LOAD( "scp1vera.ic002", 0x000000, 0x800000, CRC(4743a999) SHA1(97ae15d75dd9b80411d101b97dd215e31de56390) )
- ROM_LOAD( "scp1vera_spr.ic002", 0x800000, 0x040000, CRC(b7094978) SHA1(1e4903cd5f594c13dad2fd74666ba35c62550044) )
+ ROM_LOAD( "scp1vera.ic002", 0x000000, 0x800000, CRC(4743a999) SHA1(97ae15d75dd9b80411d101b97dd215e31de56390) )
+ ROM_LOAD( "scp1vera_spr.ic002", 0x800000, 0x040000, CRC(b7094978) SHA1(1e4903cd5f594c13dad2fd74666ba35c62550044) )
DISK_REGION("dvd")
DISK_IMAGE_READONLY( "scp1cd0", 0, SHA1(19fa70ba22787704c40f0a8f27bc841218bbc99b) )
diff --git a/src/mame/drivers/namcos23.c b/src/mame/drivers/namcos23.c
index 31e9790325e..2b78df8b5e8 100644
--- a/src/mame/drivers/namcos23.c
+++ b/src/mame/drivers/namcos23.c
@@ -107,15 +107,15 @@ Crisis Zone Namco, 2000 System 23 Evolution 2
If you can help with the remaining undumped S22.5/S23/SS23 games, please contact me at http://guru.mameworld.info/
A System 23 unit is comprised of some of the following pieces....
-- V185B EMI PCB Small PCB bolted to the metal box with several connectors including power in, video out, network in/out, sound out
+- V185B EMI PCB Small PCB bolted to the metal box with several connectors including power in, video out, network in/out, sound out
(to AMP PCB) used with most of the S23/SS23 games that use a single main PCB and no other control PCBs.
-- V198 EMI PCB Small PCB bolted to the metal box with several connectors (power/video/sound etc) plus a couple of extra
- ones for the CCD camera and feedback board. It is connected to the main and GMEN boards on the other side via
+- V198 EMI PCB Small PCB bolted to the metal box with several connectors (power/video/sound etc) plus a couple of extra
+ ones for the CCD camera and feedback board. It is connected to the main and GMEN boards on the other side via
2 multi-pin connectors (used only with games that use the GMEN board)
- BASS AMP PCB Power AMP PCB for general sounds and bass
- SYSTEM23 MAIN PCB Main PCB for System 23 \
or SystemSuper23 MAIN(1) PCB Main PCB for Super System 23 / Note the 3 main boards are similar, but not exactly the same.
- or System23Evolution2 PCB Main PCB for System 23 Evolution 2 /
+ or System23Evolution2 PCB Main PCB for System 23 Evolution 2 /
- MSPM(FR*) PCB A small plug-in daughterboard that holds FLASHROMs containing Main CPU and Sound CPU programs
- FCA PCB Controls & I/O interface board used with a few Super System 23 games only. Contains mostly transistors,
caps, resistors, several connectors, an MCU and a PIC16F84.
@@ -129,12 +129,12 @@ A System 23 unit is comprised of some of the following pieces....
Note that in Super System23, the MEM(M) PCB is re-used from System23.
On Super System23, there is a sticker over the System23 part labelled 'SystemSuper23' and one
PAL is not populated.
-- GMEN PCB A large board that sits on top of the main board containing a SH2 CPU, some RAM and a few CPLDs/FPGAs.
+- GMEN PCB A large board that sits on top of the main board containing a SH2 CPU, some RAM and a few CPLDs/FPGAs.
This controls the video overlay from the CCD camera in Gunmen Wars, Race On! and Final Furlong 2.
The ROM board plugs in on top of this board.
-- V194 STR PCB Used with Race On! to control the steering feed-back. An identical re-labelled PCB (V257) with
+- V194 STR PCB Used with Race On! to control the steering feed-back. An identical re-labelled PCB (V257) with
different SOP44 ROMs is used with Wangan Midnight (Chihiro) and Ridge Racer V (System 246)
-
+
The metal box housing these PCB's is approximately the same size as Super System 22. However, the box is mostly
empty. All of the CPU/Video/DSP hardware is located on the main PCB which is the same size as the
Super System 22 CPU board. The ROM PCB is half the size of the Super System22 ROM PCB. The ROM positions on it
@@ -169,8 +169,8 @@ On bootup, the following happens (on GP500)...
When the SUB-CPU connects there are numerous POST screens that test almost all of the main components.
-On System23, the bootup sequence is shorter. The screen remains blank while the SDRAM is being checked (i.e. 1st screen mentioned above is not shown).
-LEDS 1-8 turn off in sequence 8-1. The bank of 8 LEDs on the main board cycles from left to right to left repeatedly (almost all S23/SS23 games seem
+On System23, the bootup sequence is shorter. The screen remains blank while the SDRAM is being checked (i.e. 1st screen mentioned above is not shown).
+LEDS 1-8 turn off in sequence 8-1. The bank of 8 LEDs on the main board cycles from left to right to left repeatedly (almost all S23/SS23 games seem
to do this in fact). After that, the bootup sequence is mostly the same as SS23.
When the game is running some games just cycle the 8 LEDs left/right/left etc. Others cycle the LEDs in pairs just one LED position
left/right/left etc. Those crazy Namco guys *really* like LEDs.
@@ -567,11 +567,11 @@ Sticker: Gmen (GTR) PCB
|----------------------------------------------------------------------------|
Notes:
This board controls the video overlay from the CCD camera in Gunmen Wars, Race ON! and Final Furlong 2.
- The main board does it's usual POST then the board fires up, LED1 lights red and the LEDs 5-12 go crazy pulsing left to right from
+ The main board does it's usual POST then the board fires up, LED1 lights red and the LEDs 5-12 go crazy pulsing left to right from
the middle outwards. The main board uploads a loader program, then the Main SH2 program. After completion LED 3 lights green and then
LED 2 lights orange for a second then extinguishes then the main board resets :-/
It doesn't boot up for unknown reasons but likely another PCB is missing from somewhere in the cabinet or the GMEN PCB is faulty.
-
+
SH2 - Hitachi HD6417604 SH2 CPU (QFP144, clock input 28.7MHz)
N341024 - NKK 128k x8 SRAM (x4, SOP32)
N341256 - NKK 32k x8 SRAM (x2, SOP28)
@@ -822,7 +822,7 @@ Notes:
62256 - 32k x8 SRAM (SOP28)
EPM7096 - Altera EPM7096 CPLD with sticker 'ASCA,DR1' (PLCC68)
ADM485 - Analog Devices ADM485 +5V Low Power EIA RS-485 Transceiver (SOIC8)
- J102/J103- Standard USB A and B connectors. These are not populated on most games, but are populated for
+ J102/J103- Standard USB A and B connectors. These are not populated on most games, but are populated for
use with Motocross Go! on the ASCA-3A PCB.
@@ -946,13 +946,13 @@ V194 STR PCB
| J102 J106 |
|----------------------------------------------------------|
Notes:
- This board is used with Race On! (and Wangan Midnight on Chihiro and Ridge Racer V on System 246) to control the
- steering feed-back motor. It may be used with other System 23/Super System 23 driving/racing games too but no
+ This board is used with Race On! (and Wangan Midnight on Chihiro and Ridge Racer V on System 246) to control the
+ steering feed-back motor. It may be used with other System 23/Super System 23 driving/racing games too but no
other games are confirmed at the moment.
-
+
RO1_STR-0A.IC16 - Fujitsu MB29F400TC 512k x8 flash ROM (SOP44)
- - Labelled 'RO1 STR-0A' for Race On!
- - Labelled 'RR3 STR-0A' for Ridge Racer V (on System 246)
+ - Labelled 'RO1 STR-0A' for Race On!
+ - Labelled 'RR3 STR-0A' for Ridge Racer V (on System 246)
EPM7064 - Altera EPM7064 CPLD labelled 'STR-DR1' (PLCC44)
N341256 - NKK 32k x8 SRAM (SOP28)
K2682 - 2SK2682 N-Channel Silicon MOSFET
@@ -971,7 +971,7 @@ Notes:
J104 - 6 pin connector joined with a cable to J6 on the V198 EMI PCB. This cable is the I/O connection to/from the main board.
J105 - 110VAC power input
J106 - DC variable power output to feed-back motor
-
+
*/
#include "emu.h"
@@ -3262,55 +3262,55 @@ ROM_END
ROM_START( raceon )
ROM_REGION32_BE( 0x400000, "user1", 0 ) /* 4 megs for main R4650 code */
- ROM_LOAD16_BYTE( "ro2vera.ic2", 0x000000, 0x200000, CRC(08b94548) SHA1(6363f1724540c2671555bc5bb11e22611614baf5) )
- ROM_LOAD16_BYTE( "ro2vera.ic1", 0x000001, 0x200000, CRC(4270884b) SHA1(82e4d4376907ee5dbabe047b9d2279f08cff5f71) )
-
+ ROM_LOAD16_BYTE( "ro2vera.ic2", 0x000000, 0x200000, CRC(08b94548) SHA1(6363f1724540c2671555bc5bb11e22611614baf5) )
+ ROM_LOAD16_BYTE( "ro2vera.ic1", 0x000001, 0x200000, CRC(4270884b) SHA1(82e4d4376907ee5dbabe047b9d2279f08cff5f71) )
+
ROM_REGION( 0x80000, "audiocpu", 0 ) /* Hitachi H8/3002 MCU code */
- ROM_LOAD16_WORD_SWAP( "ro2vera.ic3", 0x000000, 0x080000, CRC(a763ecb7) SHA1(6b1ab63bb56342abbf7ddd7d17d413779fbafce1) )
-
+ ROM_LOAD16_WORD_SWAP( "ro2vera.ic3", 0x000000, 0x080000, CRC(a763ecb7) SHA1(6b1ab63bb56342abbf7ddd7d17d413779fbafce1) )
+
ROM_REGION( 0x40000, "ioboard", 0 ) /* I/O board HD643334 H8/3334 MCU code */
ROM_LOAD( "asc5_io-a.ic14", 0x000000, 0x020000, CRC(5964767f) SHA1(320db5e78ae23c5f94e368432d51573b409995db) )
ROM_REGION( 0x80000, "ffb", 0 ) /* STR steering force-feedback board code */
- ROM_LOAD( "ro1_str-0a.ic16", 0x000000, 0x080000, CRC(27d39e1f) SHA1(6161cbb27c964ffab1db3b3c1f073ec514876e61) )
+ ROM_LOAD( "ro1_str-0a.ic16", 0x000000, 0x080000, CRC(27d39e1f) SHA1(6161cbb27c964ffab1db3b3c1f073ec514876e61) )
ROM_REGION32_BE( 0x2000000, "data", 0 ) /* data roms */
- ROM_LOAD16_BYTE( "ro1mtah.2j", 0x000000, 0x800000, CRC(216abfb1) SHA1(8db7b17dc6441adc7a4ec8b941d5a84d73c735d6) )
- ROM_LOAD16_BYTE( "ro1mtal.2h", 0x000001, 0x800000, CRC(17646306) SHA1(8d1af777f8e884b650efee8e4c26e032e1c088b7) )
+ ROM_LOAD16_BYTE( "ro1mtah.2j", 0x000000, 0x800000, CRC(216abfb1) SHA1(8db7b17dc6441adc7a4ec8b941d5a84d73c735d6) )
+ ROM_LOAD16_BYTE( "ro1mtal.2h", 0x000001, 0x800000, CRC(17646306) SHA1(8d1af777f8e884b650efee8e4c26e032e1c088b7) )
ROM_REGION( 0x2000000, "textile", 0 ) /* texture tiles */
- ROM_LOAD( "ro1cgll.4m", 0x0000000, 0x800000, CRC(12c64936) SHA1(14a0d3d336f2fbe7992eedb3900748763368bc6b) )
- ROM_LOAD( "ro1cglm.4k", 0x0800000, 0x800000, CRC(7e8bb4fc) SHA1(46a7940989576239a720fde8ec4e4b623b0b6fe6) )
- ROM_LOAD( "ro1cgum.4j", 0x1000000, 0x800000, CRC(b9767735) SHA1(87fec452998a782db2cf00d369149b200a00d163) )
- ROM_LOAD( "ro1cguu.4f", 0x1800000, 0x800000, CRC(8fef8bd4) SHA1(6870590f585dc8d87ebe5181da870715c9c4fee3) )
+ ROM_LOAD( "ro1cgll.4m", 0x0000000, 0x800000, CRC(12c64936) SHA1(14a0d3d336f2fbe7992eedb3900748763368bc6b) )
+ ROM_LOAD( "ro1cglm.4k", 0x0800000, 0x800000, CRC(7e8bb4fc) SHA1(46a7940989576239a720fde8ec4e4b623b0b6fe6) )
+ ROM_LOAD( "ro1cgum.4j", 0x1000000, 0x800000, CRC(b9767735) SHA1(87fec452998a782db2cf00d369149b200a00d163) )
+ ROM_LOAD( "ro1cguu.4f", 0x1800000, 0x800000, CRC(8fef8bd4) SHA1(6870590f585dc8d87ebe5181da870715c9c4fee3) )
ROM_REGION16_LE( 0x400000, "textilemapl", 0 ) /* texture tilemap 0-15*/
- ROM_LOAD( "ro1ccrl.7f", 0x000000, 0x400000, CRC(fe50e424) SHA1(8317c998db687e1c40398e0005a037dcded19c25) )
+ ROM_LOAD( "ro1ccrl.7f", 0x000000, 0x400000, CRC(fe50e424) SHA1(8317c998db687e1c40398e0005a037dcded19c25) )
ROM_REGION( 0x200000, "textilemaph", 0 ) /* texture tilemap 16-17 + attr */
- ROM_LOAD( "ro1ccrh.7e", 0x000000, 0x200000, CRC(1c958de2) SHA1(4893350999d5d377e68b9577187828de7a4c77c2) )
+ ROM_LOAD( "ro1ccrh.7e", 0x000000, 0x200000, CRC(1c958de2) SHA1(4893350999d5d377e68b9577187828de7a4c77c2) )
ROM_REGION32_LE( 0x2000000, "pointrom", 0 ) /* 3D model data */
- ROM_LOAD32_WORD_SWAP( "ro1pt0h.7a", 0x0000000, 0x400000, CRC(6ef742ab) SHA1(500ce413b2463a555237de7bcc9627d1082c9b52) )
- ROM_LOAD32_WORD_SWAP( "ro1pt0l.7c", 0x0000002, 0x400000, CRC(f4b88bd0) SHA1(cc642d959645730b03ef01e6dbb5d0077bce7163) )
- ROM_LOAD32_WORD_SWAP( "ro1pt1h.5a", 0x0800000, 0x400000, CRC(428bf573) SHA1(6be159e1cf7ef38639610c347fd2322ab9911a70) )
- ROM_LOAD32_WORD_SWAP( "ro1pt1l.5c", 0x0800002, 0x400000, CRC(f3df1d13) SHA1(9f96c99bd3537940a532d3dccb69a1c7d8c6be63) )
- ROM_LOAD32_WORD_SWAP( "ro1pt2h.4a", 0x1000000, 0x400000, CRC(e1abdbc9) SHA1(91827af01cb83f4422d7329c8eea52bb57d7d57e) )
- ROM_LOAD32_WORD_SWAP( "ro1pt2l.4c", 0x1000002, 0x400000, CRC(c64f5cdc) SHA1(e7261f3a56718f304127cc85c08d0b32525dc1cd) )
- ROM_LOAD32_WORD_SWAP( "ro1pt3h.3a", 0x1800000, 0x400000, CRC(ef4685f6) SHA1(930037cac4aae9892278aa322844d03c773c70f7) )
- ROM_LOAD32_WORD_SWAP( "ro1pt3l.3c", 0x1800002, 0x400000, CRC(07d27009) SHA1(770001bee9d7ace337db8a42bf377678b2b5d5fb) )
+ ROM_LOAD32_WORD_SWAP( "ro1pt0h.7a", 0x0000000, 0x400000, CRC(6ef742ab) SHA1(500ce413b2463a555237de7bcc9627d1082c9b52) )
+ ROM_LOAD32_WORD_SWAP( "ro1pt0l.7c", 0x0000002, 0x400000, CRC(f4b88bd0) SHA1(cc642d959645730b03ef01e6dbb5d0077bce7163) )
+ ROM_LOAD32_WORD_SWAP( "ro1pt1h.5a", 0x0800000, 0x400000, CRC(428bf573) SHA1(6be159e1cf7ef38639610c347fd2322ab9911a70) )
+ ROM_LOAD32_WORD_SWAP( "ro1pt1l.5c", 0x0800002, 0x400000, CRC(f3df1d13) SHA1(9f96c99bd3537940a532d3dccb69a1c7d8c6be63) )
+ ROM_LOAD32_WORD_SWAP( "ro1pt2h.4a", 0x1000000, 0x400000, CRC(e1abdbc9) SHA1(91827af01cb83f4422d7329c8eea52bb57d7d57e) )
+ ROM_LOAD32_WORD_SWAP( "ro1pt2l.4c", 0x1000002, 0x400000, CRC(c64f5cdc) SHA1(e7261f3a56718f304127cc85c08d0b32525dc1cd) )
+ ROM_LOAD32_WORD_SWAP( "ro1pt3h.3a", 0x1800000, 0x400000, CRC(ef4685f6) SHA1(930037cac4aae9892278aa322844d03c773c70f7) )
+ ROM_LOAD32_WORD_SWAP( "ro1pt3l.3c", 0x1800002, 0x400000, CRC(07d27009) SHA1(770001bee9d7ace337db8a42bf377678b2b5d5fb) )
ROM_REGION( 0x1000000, "c352", 0 ) /* C352 PCM samples */
- ROM_LOAD( "ro1wavel.2c", 0x000000, 0x800000, CRC(c6aca840) SHA1(09a021459b6326fe161ffcee36376648a5bf0e00) )
- ROM_LOAD( "ro2waveh.2a", 0x800000, 0x800000, CRC(ceecbf0d) SHA1(f0a5e57c04b661685833b209bd5e072666068391) )
+ ROM_LOAD( "ro1wavel.2c", 0x000000, 0x800000, CRC(c6aca840) SHA1(09a021459b6326fe161ffcee36376648a5bf0e00) )
+ ROM_LOAD( "ro2waveh.2a", 0x800000, 0x800000, CRC(ceecbf0d) SHA1(f0a5e57c04b661685833b209bd5e072666068391) )
ROM_REGION( 0x800000, "spares", 0 ) /* duplicate ROMs for the second texel pipeline on the PCB, not used for emulation */
- ROM_LOAD( "ro1ccrl.7m", 0x000000, 0x400000, CRC(fe50e424) SHA1(8317c998db687e1c40398e0005a037dcded19c25) )
- ROM_LOAD( "ro1ccrh.7k", 0x000000, 0x200000, CRC(1c958de2) SHA1(4893350999d5d377e68b9577187828de7a4c77c2) )
- ROM_LOAD( "ro1cgll.5m", 0x000000, 0x800000, CRC(12c64936) SHA1(14a0d3d336f2fbe7992eedb3900748763368bc6b) )
- ROM_LOAD( "ro1cglm.5k", 0x000000, 0x800000, CRC(7e8bb4fc) SHA1(46a7940989576239a720fde8ec4e4b623b0b6fe6) )
- ROM_LOAD( "ro1cgum.5j", 0x000000, 0x800000, CRC(b9767735) SHA1(87fec452998a782db2cf00d369149b200a00d163) )
- ROM_LOAD( "ro1cguu.5f", 0x000000, 0x800000, CRC(8fef8bd4) SHA1(6870590f585dc8d87ebe5181da870715c9c4fee3) )
+ ROM_LOAD( "ro1ccrl.7m", 0x000000, 0x400000, CRC(fe50e424) SHA1(8317c998db687e1c40398e0005a037dcded19c25) )
+ ROM_LOAD( "ro1ccrh.7k", 0x000000, 0x200000, CRC(1c958de2) SHA1(4893350999d5d377e68b9577187828de7a4c77c2) )
+ ROM_LOAD( "ro1cgll.5m", 0x000000, 0x800000, CRC(12c64936) SHA1(14a0d3d336f2fbe7992eedb3900748763368bc6b) )
+ ROM_LOAD( "ro1cglm.5k", 0x000000, 0x800000, CRC(7e8bb4fc) SHA1(46a7940989576239a720fde8ec4e4b623b0b6fe6) )
+ ROM_LOAD( "ro1cgum.5j", 0x000000, 0x800000, CRC(b9767735) SHA1(87fec452998a782db2cf00d369149b200a00d163) )
+ ROM_LOAD( "ro1cguu.5f", 0x000000, 0x800000, CRC(8fef8bd4) SHA1(6870590f585dc8d87ebe5181da870715c9c4fee3) )
ROM_END
ROM_START( finfurl2 )
@@ -3594,7 +3594,7 @@ ROM_END
ROM_START( crszoneb )
ROM_REGION32_BE( 0x800000, "user1", 0 ) /* 4 megs for main R4650 code */
- ROM_LOAD16_WORD_SWAP( "cszo4verb.ic4", 0x400000, 0x400000, CRC(6192533d) SHA1(d102b91fe193bf255ea4e57a2bd964aa1cdfd21d) )
+ ROM_LOAD16_WORD_SWAP( "cszo4verb.ic4", 0x400000, 0x400000, CRC(6192533d) SHA1(d102b91fe193bf255ea4e57a2bd964aa1cdfd21d) )
ROM_CONTINUE( 0x000000, 0x400000 )
ROM_REGION( 0x80000, "audiocpu", 0 ) /* Hitachi H8/3002 MCU code */
diff --git a/src/mame/drivers/naomi.c b/src/mame/drivers/naomi.c
index 57f369ea69f..386aac74158 100644
--- a/src/mame/drivers/naomi.c
+++ b/src/mame/drivers/naomi.c
@@ -2710,14 +2710,14 @@ ROM_START( derbyocw )
NAOMI_DEFAULT_EEPROM
ROM_REGION( 0x7800000, "user1", ROMREGION_ERASEFF)
- ROM_LOAD( "epr-22336d.ic22",0x000000, 0x0400000, CRC(e6c0cb0c) SHA1(b8c7fe62cb370793fd5ed0af27c18d36e9c0ce54) )
+ ROM_LOAD( "epr-22336d.ic22",0x000000, 0x0400000, CRC(e6c0cb0c) SHA1(b8c7fe62cb370793fd5ed0af27c18d36e9c0ce54) )
ROM_LOAD( "mpr-22328.ic1", 0x0800000, 0x1000000, CRC(179cec02) SHA1(cbaba86082370a082d2e9f18427691d5cfa0e4f0) )
ROM_LOAD( "mpr-22329.ic2", 0x1800000, 0x1000000, CRC(e0d5b98c) SHA1(5bf1ac0d895fd7725d170a54f01cd717a5e54110) )
ROM_LOAD( "mpr-22330.ic3", 0x2800000, 0x1000000, CRC(6737cd62) SHA1(08429ca39fef3b36cb491813ddcd0feef3b24372) )
ROM_LOAD( "mpr-22331.ic4", 0x3800000, 0x1000000, CRC(8fb5cbcf) SHA1(c4e6cbbe7d3549e1841654b41b1946b9bc356e74) )
ROM_LOAD( "mpr-22332.ic5", 0x4800000, 0x1000000, CRC(c5e365a8) SHA1(5839ea24b8fd02552931175d35e2ceca75fca089) )
- ROM_LOAD( "mpr-22337.ic6", 0x5800000, 0x1000000, CRC(87ca3a2f) SHA1(2ffc01597107eb60dfa7aa49d51f203b51a44334) )
- ROM_LOAD( "mpr-22338.ic7", 0x6800000, 0x1000000, CRC(4bda7303) SHA1(db27d91ef811d741cfdb5c0196e61be722c2f5bd) )
+ ROM_LOAD( "mpr-22337.ic6", 0x5800000, 0x1000000, CRC(87ca3a2f) SHA1(2ffc01597107eb60dfa7aa49d51f203b51a44334) )
+ ROM_LOAD( "mpr-22338.ic7", 0x6800000, 0x1000000, CRC(4bda7303) SHA1(db27d91ef811d741cfdb5c0196e61be722c2f5bd) )
ROM_END
ROM_START( drbyocwc )
diff --git a/src/mame/drivers/pandoras.c b/src/mame/drivers/pandoras.c
index ec7d11cc37a..80dc594340d 100644
--- a/src/mame/drivers/pandoras.c
+++ b/src/mame/drivers/pandoras.c
@@ -160,7 +160,7 @@ static ADDRESS_MAP_START( pandoras_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x1a02, 0x1a02) AM_READ_PORT("P2")
AM_RANGE(0x1a03, 0x1a03) AM_READ_PORT("DSW3")
AM_RANGE(0x1c00, 0x1c00) AM_READ_PORT("DSW2")
-// AM_RANGE(0x1e00, 0x1e00) AM_READNOP /* ??? seems to be important */
+// AM_RANGE(0x1e00, 0x1e00) AM_READNOP /* ??? seems to be important */
AM_RANGE(0x8000, 0x8000) AM_WRITE(watchdog_reset_w) /* watchdog reset */
AM_RANGE(0xa000, 0xa000) AM_WRITE(pandoras_cpua_irqtrigger_w) /* cause FIRQ on CPU A */
AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_SHARE("share4") /* Shared RAM with the CPU A */
diff --git a/src/mame/drivers/pgm.c b/src/mame/drivers/pgm.c
index 39d2b5a615f..1060fb9d022 100644
--- a/src/mame/drivers/pgm.c
+++ b/src/mame/drivers/pgm.c
@@ -5696,21 +5696,21 @@ static WRITE16_HANDLER( ddp3_asic_w )
break;
case 0x67: // set high bits
- // printf("%06x command %02x | %04x\n", cpu_get_pc(space->cpu), state->ddp3lastcommand, state->value0);
+ // printf("%06x command %02x | %04x\n", cpu_get_pc(space->cpu), state->ddp3lastcommand, state->value0);
state->valueresponse = 0x880000;
state->ddp3internal_slot = (state->value0 & 0xff00)>>8;
state->ddp3slots[state->ddp3internal_slot] = (state->value0 & 0x00ff) << 16;
break;
case 0xe5: // set low bits for operation?
- // printf("%06x command %02x | %04x\n", cpu_get_pc(space->cpu), state->ddp3lastcommand, state->value0);
+ // printf("%06x command %02x | %04x\n", cpu_get_pc(space->cpu), state->ddp3lastcommand, state->value0);
state->valueresponse = 0x880000;
state->ddp3slots[state->ddp3internal_slot] |= (state->value0 & 0xffff);
break;
case 0x8e: // read back result of operations
- // printf("%06x command %02x | %04x\n", cpu_get_pc(space->cpu), state->ddp3lastcommand, state->value0);
+ // printf("%06x command %02x | %04x\n", cpu_get_pc(space->cpu), state->ddp3lastcommand, state->value0);
state->valueresponse = state->ddp3slots[state->value0&0xff];
break;
diff --git a/src/mame/drivers/r2dx_v33.c b/src/mame/drivers/r2dx_v33.c
index 7ccdcb3fd05..5f2c34e4c7a 100644
--- a/src/mame/drivers/r2dx_v33.c
+++ b/src/mame/drivers/r2dx_v33.c
@@ -73,7 +73,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectan
{
UINT16 *spriteram16 = machine->generic.spriteram.u16;
int offs,fx,fy,x,y,color,sprite;
-// int cur_pri;
+// int cur_pri;
int dx,dy,ax,ay;
for (offs = 0x400-4;offs >= 0;offs -= 4)
@@ -187,10 +187,10 @@ static VIDEO_UPDATE( rdx_v33 )
address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
//if(input_code_pressed_once(screen->machine,KEYCODE_A))
- // src_addr+=0x800;
+ // src_addr+=0x800;
//if(input_code_pressed_once(screen->machine,KEYCODE_S))
- // src_addr-=0x800;
+ // src_addr-=0x800;
frame++;
@@ -353,17 +353,17 @@ static ADDRESS_MAP_START( rdx_v33_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0068e, 0x0068f) AM_WRITENOP // synch for the MCU?
AM_RANGE(0x006b0, 0x006b1) AM_WRITE(mcu_prog_w)
AM_RANGE(0x006b2, 0x006b3) AM_WRITE(mcu_prog_w2)
-// AM_RANGE(0x006b4, 0x006b5) AM_WRITENOP
-// AM_RANGE(0x006b6, 0x006b7) AM_WRITENOP
+// AM_RANGE(0x006b4, 0x006b5) AM_WRITENOP
+// AM_RANGE(0x006b6, 0x006b7) AM_WRITENOP
AM_RANGE(0x006bc, 0x006bd) AM_WRITE(mcu_prog_offs_w)
AM_RANGE(0x006be, 0x006bf) AM_WRITENOP // MCU program related
AM_RANGE(0x006d8, 0x006d9) AM_WRITE(mcu_xval_w)
AM_RANGE(0x006da, 0x006db) AM_WRITE(mcu_yval_w)
-// AM_RANGE(0x006dc, 0x006dd) AM_READ(rdx_v33_unknown2_r)
+// AM_RANGE(0x006dc, 0x006dd) AM_READ(rdx_v33_unknown2_r)
// AM_RANGE(0x006de, 0x006df) AM_WRITE(mcu_unkaa_w) // mcu command related?
AM_RANGE(0x00700, 0x00701) AM_DEVWRITE("eeprom", rdx_v33_eeprom_w)
-// AM_RANGE(0x00740, 0x00741) AM_READ(rdx_v33_unknown2_r)
+// AM_RANGE(0x00740, 0x00741) AM_READ(rdx_v33_unknown2_r)
AM_RANGE(0x00744, 0x00745) AM_READ_PORT("INPUT")
AM_RANGE(0x0074c, 0x0074d) AM_READ_PORT("SYSTEM")
AM_RANGE(0x00762, 0x00763) AM_READNOP
@@ -429,17 +429,17 @@ static ADDRESS_MAP_START( nzerotea_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x0068e, 0x0068f) AM_WRITENOP // synch for the MCU?
AM_RANGE(0x006b0, 0x006b1) AM_WRITE(mcu_prog_w)
AM_RANGE(0x006b2, 0x006b3) AM_WRITE(mcu_prog_w2)
-// AM_RANGE(0x006b4, 0x006b5) AM_WRITENOP
-// AM_RANGE(0x006b6, 0x006b7) AM_WRITENOP
+// AM_RANGE(0x006b4, 0x006b5) AM_WRITENOP
+// AM_RANGE(0x006b6, 0x006b7) AM_WRITENOP
AM_RANGE(0x006bc, 0x006bd) AM_WRITE(mcu_prog_offs_w)
// AM_RANGE(0x006d8, 0x006d9) AM_WRITE(bbbbll_w) // scroll?
-// AM_RANGE(0x006dc, 0x006dd) AM_READ(nzerotea_unknown_r)
+// AM_RANGE(0x006dc, 0x006dd) AM_READ(nzerotea_unknown_r)
// AM_RANGE(0x006de, 0x006df) AM_WRITE(mcu_unkaa_w) // mcu command related?
//AM_RANGE(0x00700, 0x00701) AM_DEVWRITE("eeprom", rdx_v33_eeprom_w)
AM_RANGE(0x00740, 0x00741) AM_READ_PORT("DSW")
AM_RANGE(0x00744, 0x00745) AM_READ_PORT("INPUT")
AM_RANGE(0x0074c, 0x0074d) AM_READ_PORT("SYSTEM")
-// AM_RANGE(0x00762, 0x00763) AM_READ(nzerotea_unknown_r)
+// AM_RANGE(0x00762, 0x00763) AM_READ(nzerotea_unknown_r)
AM_RANGE(0x00780, 0x0079f) AM_READWRITE(nzerotea_sound_comms_r,nzerotea_sound_comms_w)
@@ -680,7 +680,7 @@ static MACHINE_CONFIG_START( nzerotea, driver_device )
MDRV_MACHINE_RESET(seibu_sound)
-// SEIBU2_RAIDEN2_SOUND_SYSTEM_CPU(14318180/4)
+// SEIBU2_RAIDEN2_SOUND_SYSTEM_CPU(14318180/4)
SEIBU_NEWZEROTEAM_SOUND_SYSTEM_CPU(14318180/4)
/* video hardware */
@@ -699,7 +699,7 @@ static MACHINE_CONFIG_START( nzerotea, driver_device )
MDRV_VIDEO_UPDATE(rdx_v33)
/* sound hardware */
-// SEIBU_SOUND_SYSTEM_YM2151_RAIDEN2_INTERFACE(28636360/8,28636360/28,1,2)
+// SEIBU_SOUND_SYSTEM_YM2151_RAIDEN2_INTERFACE(28636360/8,28636360/28,1,2)
SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(14318180/4,1320000)
MACHINE_CONFIG_END
@@ -795,7 +795,7 @@ ROM_START( r2dx_v33 )
ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF ) /* v33 main cpu */
-// ROM_REGION( 0x20000, "cpu1", ROMREGION_ERASE00 ) /* 64k code for sound Z80 */
+// ROM_REGION( 0x20000, "cpu1", ROMREGION_ERASE00 ) /* 64k code for sound Z80 */
/* nothing? no z80*/
ROM_REGION( 0x040000, "gfx1", 0 ) /* chars */
@@ -852,7 +852,7 @@ ROM_START( nzerotea )
ROM_END
// newer PCB, with V33 CPU and COPD3 protection, but weak sound hardware. - was marked as Raiden DX New in the rom dump, but boots as Raiden 2 New version, is it switchable?
-GAME( 1996, r2dx_v33, 0, rdx_v33, rdx_v33, rdx_v33, ROT270, "Seibu Kaihatsu", "Raiden II / DX (newer V33 PCB)", GAME_NOT_WORKING|GAME_NO_SOUND)
+GAME( 1996, r2dx_v33, 0, rdx_v33, rdx_v33, rdx_v33, ROT270, "Seibu Kaihatsu", "Raiden II / DX (newer V33 PCB)", GAME_NOT_WORKING|GAME_NO_SOUND)
// 'V33 system type_b' - uses V33 CPU, COPX-D3 external protection rom, but still has the proper sound system
GAME( 1997, nzerotea, zeroteam, nzerotea, nzerotea, nzerotea, ROT0, "Seibu Kaihatsu", "New Zero Team", GAME_NOT_WORKING|GAME_NO_SOUND) // this uses a v33 and COPD3
diff --git a/src/mame/drivers/raiden2.c b/src/mame/drivers/raiden2.c
index 05973bec004..0ca2bf636ea 100644
--- a/src/mame/drivers/raiden2.c
+++ b/src/mame/drivers/raiden2.c
@@ -266,7 +266,7 @@ WRITE16_MEMBER(raiden2_state::cop_dma_trigger_w)
dst = (cop_dma_v3 << 6);
size = ((cop_dma_size << 5) - (cop_dma_v3 << 6) + 0x20)/2;
-// printf("%08x %08x %08x\n",src,dst,size);
+// printf("%08x %08x %08x\n",src,dst,size);
for(i = 0;i < size;i++)
{
diff --git a/src/mame/drivers/tankbust.c b/src/mame/drivers/tankbust.c
index 6f0c0141392..589ede1dd25 100644
--- a/src/mame/drivers/tankbust.c
+++ b/src/mame/drivers/tankbust.c
@@ -330,7 +330,7 @@ static MACHINE_CONFIG_START( tankbust, driver_device )
MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
MDRV_CPU_ADD("sub", Z80, XTAL_14_31818MHz/4) /* Verified on PCB */
-// MDRV_CPU_ADD("sub", Z80, XTAL_14_31818MHz/3) /* Accurate to audio recording, but apparently incorrect clock */
+// MDRV_CPU_ADD("sub", Z80, XTAL_14_31818MHz/3) /* Accurate to audio recording, but apparently incorrect clock */
MDRV_CPU_PROGRAM_MAP(map_cpu2)
MDRV_CPU_IO_MAP(port_map_cpu2)
diff --git a/src/mame/machine/seicop.c b/src/mame/machine/seicop.c
index 83a377cefe2..f6be8ffbdfe 100644
--- a/src/mame/machine/seicop.c
+++ b/src/mame/machine/seicop.c
@@ -2580,14 +2580,14 @@ static WRITE16_HANDLER( generic_cop_w )
static UINT32 src,dst,size,i;
/* TODO: understand all the differences between triggers!
- 0x80 is used by Legionnaire (plain DMA)
- 0x81 is used by SD Gundam and Godzilla (unknown purpose)
- 0x86 is used by Seibu Cup Soccer (doesn't yet work)
- 0x87 is used by Denjin Makai (DMA with inverted word endianess)
- */
+ 0x80 is used by Legionnaire (plain DMA)
+ 0x81 is used by SD Gundam and Godzilla (unknown purpose)
+ 0x86 is used by Seibu Cup Soccer (doesn't yet work)
+ 0x87 is used by Denjin Makai (DMA with inverted word endianess)
+ */
//if(dma_trigger != 0x87)
- // printf("SRC: %08x %08x DST:%08x SIZE:%08x TRIGGER: %08x\n",dma_src,dma_src_param,dma_dst,dma_size,dma_trigger);
+ // printf("SRC: %08x %08x DST:%08x SIZE:%08x TRIGGER: %08x\n",dma_src,dma_src_param,dma_dst,dma_size,dma_trigger);
if(dma_trigger == 0x81)
return;
diff --git a/src/mame/mamedriv.c b/src/mame/mamedriv.c
index df5edf26f5a..02c68e15fa6 100644
--- a/src/mame/mamedriv.c
+++ b/src/mame/mamedriv.c
@@ -10296,7 +10296,7 @@ Other Sun games
DRIVER( sweetl_2 ) /* (c) 2004 */
/* Resident */
- DRIVER( resdnt ) /* (c) 2004 */
+ DRIVER( resdnt ) /* (c) 2004 */
DRIVER( resdnt_2 ) /* (c) 2004 */
DRIVER( resdnt_3 ) /* (c) 2004 */
diff --git a/src/mame/video/m107.c b/src/mame/video/m107.c
index 02bba9a16ab..1d7fa86e260 100644
--- a/src/mame/video/m107.c
+++ b/src/mame/video/m107.c
@@ -227,24 +227,24 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta
while (rom_offs < 0x40000) /* safety check */
{
/*
- [1]
- x--- ---- end of block marker
- ---- --x- Flip Y
- ---- ---x Flip X
- [2]
- xxxx xxxx Y offs lo byte
- [3]
- ---- xxx- height (1/2/4/8)
- ---- ---x Y offs hi byte
- [4]
- xxxx xxxx sprite number lo byte
- [5]
- xxxx xxxx sprite number hi byte
- [6]
- xxxx xxxx X offs lo byte
- [7]
- ---- ---x X offs hi byte
- */
+ [1]
+ x--- ---- end of block marker
+ ---- --x- Flip Y
+ ---- ---x Flip X
+ [2]
+ xxxx xxxx Y offs lo byte
+ [3]
+ ---- xxx- height (1/2/4/8)
+ ---- ---x Y offs hi byte
+ [4]
+ xxxx xxxx sprite number lo byte
+ [5]
+ xxxx xxxx sprite number hi byte
+ [6]
+ xxxx xxxx X offs lo byte
+ [7]
+ ---- ---x X offs hi byte
+ */
int xdisp = rom[rom_offs+6]+256*rom[rom_offs+7];
int ydisp = rom[rom_offs+2]+256*rom[rom_offs+3];
@@ -290,9 +290,9 @@ static void m107_update_scroll_positions(void)
int i;
/*
- rowscroll is at 0xde000 - 0xde7ff, every layer has dedicated 0x200 bytes inside this area, enabled with bit 0 of the layer video register
- rowselect is at 0xde800 - 0xdefff, every layer has dedicated 0x200 bytes inside this area, enabled with bit 1 of the layer video register
- Perhaps 0xdf000 - 0xdffff and bit 2-3 are respectively colscroll and colselect?
+ rowscroll is at 0xde000 - 0xde7ff, every layer has dedicated 0x200 bytes inside this area, enabled with bit 0 of the layer video register
+ rowselect is at 0xde800 - 0xdefff, every layer has dedicated 0x200 bytes inside this area, enabled with bit 1 of the layer video register
+ Perhaps 0xdf000 - 0xdffff and bit 2-3 are respectively colscroll and colselect?
*/
for (laynum = 0; laynum < 4; laynum++)
@@ -384,8 +384,8 @@ WRITE16_HANDLER( m107_spritebuffer_w )
{
if (ACCESSING_BITS_0_7) {
/*
- TODO: this register looks a lot more complex than how the game uses it. All of them seems to test various bit combinations during POST.
- */
+ TODO: this register looks a lot more complex than how the game uses it. All of them seems to test various bit combinations during POST.
+ */
// logerror("%04x: buffered spriteram\n",cpu_get_pc(space->cpu));
m107_sprite_display = (!(data & 0x1000));
diff --git a/src/version.c b/src/version.c
index 5dcbb267462..5b4e366480b 100644
--- a/src/version.c
+++ b/src/version.c
@@ -10,4 +10,4 @@
***************************************************************************/
extern const char build_version[];
-const char build_version[] = "0.140u2 ("__DATE__")";
+const char build_version[] = "0.140u3 ("__DATE__")";