diff options
author | arbee <rb6502@users.noreply.github.com> | 2019-11-27 21:37:24 -0500 |
---|---|---|
committer | arbee <rb6502@users.noreply.github.com> | 2019-11-27 21:37:24 -0500 |
commit | 6b049e33d6aea32d9d9f9c46fe84257c2d82fe48 (patch) | |
tree | 4abd769fa13aaebba28b0def74a63d7a2b991f1d | |
parent | abc4dadd53fd5696774cc7067411135d960c13fe (diff) |
m68kmmu: Fixed issues with Domain/OS and its installer crashing [Hans Ostermeyer]
apollo: Fixed failures in DEX DISP7C tests 170 and 210 and selftest TE [Hans Ostermeyer]
-rw-r--r-- | src/devices/cpu/m68000/m68kmmu.h | 3 | ||||
-rw-r--r-- | src/mame/drivers/apollo.cpp | 1 | ||||
-rw-r--r-- | src/mame/video/apollo.cpp | 3 |
3 files changed, 4 insertions, 3 deletions
diff --git a/src/devices/cpu/m68000/m68kmmu.h b/src/devices/cpu/m68000/m68kmmu.h index c36aa94a749..3e55f51ec39 100644 --- a/src/devices/cpu/m68000/m68kmmu.h +++ b/src/devices/cpu/m68000/m68kmmu.h @@ -229,7 +229,8 @@ void pmmu_atc_flush_fc_ea(const u16 modes) { if ((e & M68K_MMU_ATC_VALID) && (((e >> 24) & fcmask) == fc) && - (((e >> ps) << (ps - 8)) == ((ea >> ps) << (ps - 8)))) +// (((e >> ps) << (ps - 8)) == ((ea >> ps) << (ps - 8)))) + ( (e << ps) == (ea >> 8 << ps) )) { MMULOG("flushing entry %08x\n", e); e = 0; diff --git a/src/mame/drivers/apollo.cpp b/src/mame/drivers/apollo.cpp index c5516e030f4..6f1f0302514 100644 --- a/src/mame/drivers/apollo.cpp +++ b/src/mame/drivers/apollo.cpp @@ -907,7 +907,6 @@ void apollo_state::machine_reset() #ifdef APOLLO_XXL // set configuration omti8621_device::set_verbose(apollo_config(APOLLO_CONF_DISK_TRACE)); - threecom3c505_device::set_verbose(apollo_config(APOLLO_CONF_NET_TRACE)); #endif if (apollo_config(APOLLO_CONF_NODE_ID)) diff --git a/src/mame/video/apollo.cpp b/src/mame/video/apollo.cpp index 42a07982712..5a24cda3962 100644 --- a/src/mame/video/apollo.cpp +++ b/src/mame/video/apollo.cpp @@ -1473,7 +1473,8 @@ WRITE8_MEMBER( apollo_graphics_15i::apollo_ccr_w ) { MLOG1(("apollo_graphics_15i::apollo_ccr_w: writing LUT data register with RW = 1 in LUT Control register")); } - else if ((m_lut_control & LUT_AD_CS) == 0) + + if ((m_lut_control & LUT_AD_CS) == 0) { m_ad_result = c8p_read_adc(data); m_ad_pending = 1; |