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author AJR <ajrhacker@users.noreply.github.com>2018-07-27 21:10:44 -0400
committer AJR <ajrhacker@users.noreply.github.com>2018-07-27 21:10:44 -0400
commit688ee5064609cfc06ffc66e587e36827ed0fb432 (patch)
tree77b65313a0c34ef795f46f228f7168f4d54631aa
parenta4cc8c9af4817f0706a7a926e5bbaee5f2381131 (diff)
notetaker: Add UART interrupts (nw)
-rw-r--r--src/mame/drivers/notetaker.cpp16
1 files changed, 9 insertions, 7 deletions
diff --git a/src/mame/drivers/notetaker.cpp b/src/mame/drivers/notetaker.cpp
index fea32461bd9..34a0ba61357 100644
--- a/src/mame/drivers/notetaker.cpp
+++ b/src/mame/drivers/notetaker.cpp
@@ -846,13 +846,15 @@ MACHINE_CONFIG_START(notetaker_state::notetakr)
MCFG_TMS9927_VSYN_CALLBACK(WRITELINE("iop_pic8259", pic8259_device, ir4_w)) // note this triggers interrupts on both the iop (ir7) and emulatorcpu (ir4)
MCFG_VIDEO_SET_SCREEN("screen")
- MCFG_DEVICE_ADD( "kbduart", AY31015, 0 ) // HD6402, == AY-3-1015D
- MCFG_AY31015_RX_CLOCK(960_kHz_XTAL) // hard-wired to 960KHz xtal #f11 (60000 baud, 16 clocks per baud)
- MCFG_AY31015_TX_CLOCK(960_kHz_XTAL) // hard-wired to 960KHz xtal #f11 (60000 baud, 16 clocks per baud)
-
- MCFG_DEVICE_ADD( "eiauart", AY31015, 0 ) // HD6402, == AY-3-1015D
- MCFG_AY31015_RX_CLOCK(((960_kHz_XTAL/10)/4)/5) // hard-wired through an mc14568b divider set to divide by 4, the result set to divide by 5; this resulting 4800hz signal being 300 baud (16 clocks per baud)
- MCFG_AY31015_TX_CLOCK(((960_kHz_XTAL/10)/4)/5) // hard-wired through an mc14568b divider set to divide by 4, the result set to divide by 5; this resulting 4800hz signal being 300 baud (16 clocks per baud)
+ AY31015(config, m_kbduart, 0); // HD6402, == AY-3-1015D
+ m_kbduart->set_rx_clock(960_kHz_XTAL); // hard-wired to 960KHz xtal #f11 (60000 baud, 16 clocks per baud)
+ m_kbduart->set_tx_clock(960_kHz_XTAL); // hard-wired to 960KHz xtal #f11 (60000 baud, 16 clocks per baud)
+ m_kbduart->write_dav_callback().set("iop_pic8259", FUNC(pic8259_device::ir6_w)); // DataRecvd = KbdInt
+
+ AY31015(config, m_eiauart, 0); // HD6402, == AY-3-1015D
+ m_eiauart->set_rx_clock(((960_kHz_XTAL/10)/4)/5); // hard-wired through an mc14568b divider set to divide by 4, the result set to divide by 5; this resulting 4800hz signal being 300 baud (16 clocks per baud)
+ m_eiauart->set_tx_clock(((960_kHz_XTAL/10)/4)/5); // hard-wired through an mc14568b divider set to divide by 4, the result set to divide by 5; this resulting 4800hz signal being 300 baud (16 clocks per baud)
+ m_eiauart->write_dav_callback().set("iop_pic8259", FUNC(pic8259_device::ir3_w)); // EIADataReady = EIAInt
/* Floppy */
MCFG_DEVICE_ADD("wd1791", FD1791, (((24_MHz_XTAL/3)/2)/2)) // 2mhz, from 24mhz ip clock divided by 6 via 8284, an additional 2 by LS161 at #e1 on display/floppy board