diff options
author | Ted Green <tedgreen99@protonmail.com> | 2017-10-29 14:55:52 -0600 |
---|---|---|
committer | Ted Green <tedgreen99@protonmail.com> | 2017-10-29 14:55:52 -0600 |
commit | 62718818afecdbd5ed6b715cea13c9f27eafbc2c (patch) | |
tree | bfd0a0a4cff8a67ca29a11b8f5fa728ae936ee58 | |
parent | e8bb513015aae7a4b0ad282bcf14607e842f4239 (diff) |
mips3: Minor MIPS DRC fastram optimization and simplification. (nw)
-rw-r--r-- | src/devices/cpu/mips/mips3drc.cpp | 26 |
1 files changed, 8 insertions, 18 deletions
diff --git a/src/devices/cpu/mips/mips3drc.cpp b/src/devices/cpu/mips/mips3drc.cpp index a3bd2e1469c..1aef0942668 100644 --- a/src/devices/cpu/mips/mips3drc.cpp +++ b/src/devices/cpu/mips/mips3drc.cpp @@ -161,12 +161,6 @@ void mips3_device::mips3drc_set_options(uint32_t options) -------------------------------------------------*/ void mips3_device::clear_fastram(uint32_t select_start) { - for (int i=select_start; i<MIPS3_MAX_FASTRAM; i++) { - m_fastram[i].start = 0; - m_fastram[i].end = 0; - m_fastram[i].readonly = false; - m_fastram[i].base = nullptr; - } m_fastram_select=select_start; // Set cache to dirty so that re-mapping occurs m_cache_dirty = true; @@ -189,6 +183,8 @@ void mips3_device::add_fastram(offs_t start, offs_t end, uint8_t readonly, void m_fastram[m_fastram_select].offset_base16 = (uint16_t*)((uint8_t*)base - start); m_fastram[m_fastram_select].offset_base32 = (uint32_t*)((uint8_t*)base - start); m_fastram_select++; + // Set cache to dirty so that re-mapping occurs + m_cache_dirty = true; } } @@ -911,21 +907,15 @@ void mips3_device::static_generate_memory_accessor(int mode, int size, int iswri UML_ROLINS(block, I0, I3, 0, 0xfffff000); // rolins i0,i3,0,0xfffff000 if ((machine().debug_flags & DEBUG_FLAG_ENABLED) == 0) - for (ramnum = 0; ramnum < MIPS3_MAX_FASTRAM; ramnum++) - if (m_fastram[ramnum].base != nullptr && (!iswrite || !m_fastram[ramnum].readonly)) + for (ramnum = 0; ramnum < m_fastram_select; ramnum++) + if (!(iswrite && m_fastram[ramnum].readonly)) { void *fastbase = (uint8_t *)m_fastram[ramnum].base - m_fastram[ramnum].start; uint32_t skip = label++; - if (m_fastram[ramnum].end != 0xffffffff) - { - UML_CMP(block, I0, m_fastram[ramnum].end); // cmp i0,end - UML_JMPc(block, COND_A, skip); // ja skip - } - if (m_fastram[ramnum].start != 0x00000000) - { - UML_CMP(block, I0, m_fastram[ramnum].start);// cmp i0,fastram_start - UML_JMPc(block, COND_B, skip); // jb skip - } + UML_CMP(block, I0, m_fastram[ramnum].end); // cmp i0,end + UML_JMPc(block, COND_A, skip); // ja skip + UML_CMP(block, I0, m_fastram[ramnum].start);// cmp i0,fastram_start + UML_JMPc(block, COND_B, skip); // jb skip if (!iswrite) { |