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author Robbbert <Robbbert@users.noreply.github.com>2018-08-11 01:09:42 +1000
committer Robbbert <Robbbert@users.noreply.github.com>2018-08-11 01:09:42 +1000
commit6168192b53a9bbea7fef02f3305aad5e8862d472 (patch)
tree4566e4ffe14356c6f24cdaffa69f927d87b2b30b
parent455950ec24807a3fb1830baee74bfc345a5b042b (diff)
Z80SCC : fixed zbus access ; c900 : used Z80SCC for the terminal
-rw-r--r--src/devices/machine/z80scc.cpp76
-rw-r--r--src/mame/drivers/c900.cpp68
2 files changed, 72 insertions, 72 deletions
diff --git a/src/devices/machine/z80scc.cpp b/src/devices/machine/z80scc.cpp
index 66c3e0b1af6..ed7ed56a56e 100644
--- a/src/devices/machine/z80scc.cpp
+++ b/src/devices/machine/z80scc.cpp
@@ -69,6 +69,26 @@ DONE (x) (p=partly) NMOS CMOS ESCC EMSCC
Improved reg handl Y Y Y Y
-------------------------------------------------------------------------
x/p = Features that has been implemented n/a = features that will not
+
+
+
+How to calculate the required clock, given the wr contents and the needed
+baud rate:
+
+- let's say B = baud rate (usually 9600).
+- Check wr11
+-- for RX, bits D6,D5 = 1,0
+-- for TX, bits D4,D3 = 1,0
+-- for TRxC, bits D1,D0 = 1,0
+-- let's say T = time constant (wr13 * 256 + wr12) +2. (don't forget the +2)
+-- in the unlikely case of T == 0, pretend T = 1.
+- If the required wr11 bits are set:
+-- let's say M = wr4 D7,D6 if 1,1 M = 64; if 1,0 M = 32; if 0,1 M = 16 else M = 1
+-- so, the required clock on the MCFG_DEVICE_ADD line = 2*T*B*M.
+- If the required wr11 bits are not set:
+-- add a line: MCFG_Z80SCC_OFFSETS(X, 0, Y, 0), where X = channel-A-baud * T,
+ and Y = channel-B-baud * T.
+
***************************************************************************/
#include "emu.h"
@@ -834,31 +854,28 @@ int z80scc_device::m1_r()
//-------------------------------------------------
READ8_MEMBER( z80scc_device::zbus_r )
{
- int ba = 0;
- int reg = 0x20; // Default point to a non register number
+ offset &= 31;
+ bool ba = BIT(offset, 4);
+ u8 reg = offset & 15;
uint8_t data = 0;
- /* Expell non- Z-Bus variants */
+ /* Expel non- Z-Bus variants */
if ( !(m_variant & SET_Z80X30))
{
logerror(" zbus_r not supported by this device variant, you should probably use the universal bus variants c*_r/w and d*_r/w (see z80scc.h)\n");
return data;
}
- switch ((m_chanB->m_wr0) & 7)
+ if ((m_chanB->m_wr0 & 7) == WR0_Z_SEL_SHFT_RIGHT)
{
- case WR0_Z_SEL_SHFT_LEFT: ba = offset & 0x01; reg = (offset >> 1) & 0x0f; break; /* Shift Left mode */
- case WR0_Z_SEL_SHFT_RIGHT: ba = offset & 0x10; reg = (offset >> 1) & 0x0f; break; /* Shift Right mode */
- default:
- logerror("Malformed Z-bus SCC read: offset %02x WR0 bits %02x\n", offset, m_chanB->m_wr0);
- LOG("Malformed Z-bus SCC read: offset %02x WR0 bits %02x\n", offset, m_chanB->m_wr0);
- return data;
+ ba = BIT(offset, 0);
+ reg = offset >> 1;
}
- if (ba == 0)
- data = m_chanB->scc_register_read(reg);
- else
+ if (ba)
data = m_chanA->scc_register_read(reg);
+ else
+ data = m_chanB->scc_register_read(reg);
return data;
}
@@ -868,29 +885,36 @@ READ8_MEMBER( z80scc_device::zbus_r )
//-------------------------------------------------
WRITE8_MEMBER( z80scc_device::zbus_w )
{
- int ba = 0;
- int reg = 0x20; // Default point to a non register number
+ offset &= 31;
+ bool ba = BIT(offset, 4);
+ u8 reg = offset & 15;
- /* Expell non- Z-Bus variants */
+ /* Expel non- Z-Bus variants */
if ( !(m_variant & SET_Z80X30))
{
logerror(" zbus_w not supported by this device variant, you should probably use the universal bus variants c*_r/w and d*_r/w (see z80scc.h)\n");
return;
}
- switch ((m_chanB->m_wr0) & 7)
+ if ((m_chanB->m_wr0 & 7) == WR0_Z_SEL_SHFT_RIGHT)
{
- case WR0_Z_SEL_SHFT_LEFT: ba = offset & 0x01; reg = (offset >> 1) & 0x0f; break; /* Shift Left mode */
- case WR0_Z_SEL_SHFT_RIGHT: ba = offset & 0x10; reg = (offset >> 1) & 0x0f; break; /* Shift Right mode */
- default:
- logerror("Malformed Z-bus SCC write: offset %02x WR0 bits %02x\n", offset, m_chanB->m_wr0);
- LOG("Malformed Z-bus SCC write: offset %02x WR0 bits %02x\n", offset, m_chanB->m_wr0);
+ ba = BIT(offset, 0);
+ reg = offset >> 1;
}
- if (ba == 0)
- m_chanB->scc_register_write(reg, data);
- else
- m_chanA->scc_register_write(reg, data);
+ switch (reg)
+ {
+ case 2:
+ case 9:
+ m_chanA->scc_register_write(reg, data);
+ m_chanB->scc_register_write(reg, data);
+ break;
+ default:
+ if (ba)
+ m_chanA->scc_register_write(reg, data);
+ else
+ m_chanB->scc_register_write(reg, data);
+ }
return;
}
diff --git a/src/mame/drivers/c900.cpp b/src/mame/drivers/c900.cpp
index 3832685fd5c..4862b652741 100644
--- a/src/mame/drivers/c900.cpp
+++ b/src/mame/drivers/c900.cpp
@@ -17,18 +17,23 @@ It has a 6508 CPU.
Disk drive is a Matsushita JA-560-012
-Our implementation of z80scc is currently incomplete and therefore unusable.
-
Increasing the amount of RAM stops the error message, however it still keeps running
-into the weeds (jumps to 00000).
+into the weeds (jumps to 00000). Due to lack of banking, the stack is pointing at rom.
+
+To Do:
+- Banking
+- Pretty much everything
+- Need schematics, technical manuals and so on.
+- Eventually, will need software.
+- Disassembler needs fixing
*******************************************************************************************/
#include "emu.h"
#include "cpu/z8000/z8000.h"
-//#include "machine/z80scc.h"
-//#include "bus/rs232/rs232.h"
+#include "machine/z80scc.h"
+#include "bus/rs232/rs232.h"
#include "machine/terminal.h"
#include "machine/z8536.h"
#include "emupal.h"
@@ -40,21 +45,14 @@ public:
c900_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
- , m_terminal(*this, "terminal")
{ }
- DECLARE_READ16_MEMBER(key_r);
- DECLARE_READ16_MEMBER(stat_r);
- void kbd_put(u8 data);
-
void c900(machine_config &config);
void data_map(address_map &map);
void io_map(address_map &map);
void mem_map(address_map &map);
private:
- uint8_t m_term_data;
required_device<cpu_device> m_maincpu;
- required_device<generic_terminal_device> m_terminal;
};
void c900_state::mem_map(address_map &map)
@@ -71,32 +69,13 @@ void c900_state::data_map(address_map &map)
void c900_state::io_map(address_map &map)
{
map(0x0000, 0x007f).rw("cio", FUNC(z8036_device::read), FUNC(z8036_device::write)).umask16(0x00ff);
- //AM_RANGE(0x0100, 0x011f) AM_DEVREADWRITE8("scc", scc8030_device, zbus_r, zbus_w, 0x00ff) // range for one channel
- map(0x0100, 0x0101).r(FUNC(c900_state::stat_r));
- map(0x0110, 0x0111).r(FUNC(c900_state::key_r));
- map(0x0111, 0x0111).w(m_terminal, FUNC(generic_terminal_device::write));
+ map(0x0100, 0x013f).rw("scc", FUNC(scc8030_device::zbus_r), FUNC(scc8030_device::zbus_w)).umask16(0x00ff);
+ map(0x0ff8, 0x0ff9).nopw();
}
static INPUT_PORTS_START( c900 )
INPUT_PORTS_END
-READ16_MEMBER( c900_state::key_r )
-{
- uint8_t ret = m_term_data;
- m_term_data = 0;
- return ret;
-}
-
-READ16_MEMBER( c900_state::stat_r )
-{
- return (m_term_data) ? 5 : 4;
-}
-
-void c900_state::kbd_put(u8 data)
-{
- m_term_data = data;
-}
-
/* F4 Character Displayer */
static const gfx_layout c900_charlayout =
{
@@ -122,24 +101,21 @@ MACHINE_CONFIG_START(c900_state::c900)
MCFG_DEVICE_DATA_MAP(data_map)
MCFG_DEVICE_IO_MAP(io_map)
- MCFG_DEVICE_ADD("terminal", GENERIC_TERMINAL, 0)
- MCFG_GENERIC_TERMINAL_KEYBOARD_CB(PUT(c900_state, kbd_put))
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_c900)
MCFG_PALETTE_ADD_MONOCHROME("palette")
MCFG_DEVICE_ADD("cio", Z8036, 6'000'000)
- //MCFG_DEVICE_ADD("scc", SCC8030, 6'000'000)
- //MCFG_Z80SCC_OFFSETS(326400, 0, 326400, 0)
- /* Port A */
- //MCFG_Z80SCC_OUT_TXDA_CB(WRITELINE("rs232a", rs232_port_device, write_txd))
- //MCFG_Z80SCC_OUT_DTRA_CB(WRITELINE("rs232a", rs232_port_device, write_dtr))
- //MCFG_Z80SCC_OUT_RTSA_CB(WRITELINE("rs232a", rs232_port_device, write_rts))
- //MCFG_Z80SCC_OUT_INT_CB(WRITELINE(*this, lwriter_state, scc_int))
-
- //MCFG_RS232_PORT_ADD ("rs232a", default_rs232_devices, "terminal")
- //MCFG_RS232_RXD_HANDLER (WRITELINE ("scc", scc8030_device, rxa_w))
- //MCFG_RS232_CTS_HANDLER (WRITELINE ("scc", scc8030_device, ctsa_w))
+ MCFG_DEVICE_ADD("scc", SCC8030, 6'000'000) // 5'850'000 is the ideal figure
+ /* Port B */
+ MCFG_Z80SCC_OUT_TXDB_CB(WRITELINE("rs232", rs232_port_device, write_txd))
+ MCFG_Z80SCC_OUT_DTRB_CB(WRITELINE("rs232", rs232_port_device, write_dtr))
+ MCFG_Z80SCC_OUT_RTSB_CB(WRITELINE("rs232", rs232_port_device, write_rts))
+ //MCFG_Z80SCC_OUT_INT_CB(WRITELINE(*this, c900_state, scc_int))
+
+ MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, "terminal")
+ MCFG_RS232_RXD_HANDLER (WRITELINE ("scc", scc8030_device, rxb_w))
+ MCFG_RS232_CTS_HANDLER (WRITELINE ("scc", scc8030_device, ctsb_w))
MACHINE_CONFIG_END
ROM_START( c900 )