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author AJR <ajrhacker@users.noreply.github.com>2022-09-25 22:28:50 -0400
committer AJR <ajrhacker@users.noreply.github.com>2022-09-25 22:37:29 -0400
commit5dc22ca8fd325315c5d24b6ed6a037cc38e86527 (patch)
tree3b0810f803ef2e9dff52c203510825f7c0b79a9b
parenta61cb4cb61c544241712dfb039817e7c7b72e3c0 (diff)
eminline.h: Additions
- Add mul_16x16 inline function to perform a signed 16x16-bit multiplication with 32-bit result. This was moved from cpu/e132xs to unite it with the analogous 32x32 operations. - Add rotl_32, rotr_32, rotl_64 and rotr_64 inline functions to perform 32-bit and 64-bit circular shifts in either direction by the specified number of places, modulo 32 or 64. It is anticipated that these will eventually be replaced by standard functions in C++20's <bit> header, and so they have been given similar signatures and semantics (which are also validity-checked). - Remove LSL, LSR, ROL and ROR macros from cpu/arm and cpu/arm7 to ameliorate unnecessary obfuscation.
-rw-r--r--src/devices/cpu/arm/arm.cpp19
-rw-r--r--src/devices/cpu/arm/armdasm.cpp2
-rw-r--r--src/devices/cpu/arm7/arm7.cpp12
-rw-r--r--src/devices/cpu/arm7/arm7dasm.cpp2
-rw-r--r--src/devices/cpu/arm7/arm7help.h5
-rw-r--r--src/devices/cpu/arm7/arm7ops.cpp16
-rw-r--r--src/devices/cpu/arm7/arm7thmb.cpp3
-rw-r--r--src/devices/cpu/asap/asap.cpp12
-rw-r--r--src/devices/cpu/clipper/clipper.cpp43
-rw-r--r--src/devices/cpu/drcbec.cpp44
-rw-r--r--src/devices/cpu/e132xs/e132xsop.hxx8
-rw-r--r--src/devices/cpu/i386/i386op32.hxx6
-rw-r--r--src/devices/cpu/jaguar/jaguar.cpp4
-rw-r--r--src/devices/cpu/m68000/m68kcpu.cpp4
-rw-r--r--src/devices/cpu/m88000/m88000.cpp8
-rw-r--r--src/devices/cpu/scudsp/scudsp.cpp2
-rw-r--r--src/devices/cpu/tms32082/mp_ops.cpp43
-rw-r--r--src/devices/cpu/uml.cpp39
-rw-r--r--src/devices/video/voodoo_render.cpp16
-rw-r--r--src/devices/video/voodoo_render.h3
-rw-r--r--src/emu/validity.cpp28
-rw-r--r--src/lib/util/hashing.cpp29
-rw-r--r--src/mame/gaelco/gaelco2_m.cpp7
-rw-r--r--src/mame/seibu/r2crypt.cpp7
-rw-r--r--src/osd/eivc.h41
-rw-r--r--src/osd/eminline.h81
26 files changed, 257 insertions, 227 deletions
diff --git a/src/devices/cpu/arm/arm.cpp b/src/devices/cpu/arm/arm.cpp
index 8a33692fcaf..749b14d9bf8 100644
--- a/src/devices/cpu/arm/arm.cpp
+++ b/src/devices/cpu/arm/arm.cpp
@@ -212,11 +212,6 @@ enum
COND_NV /* never */
};
-#define LSL(v,s) ((v) << (s))
-#define LSR(v,s) ((v) >> (s))
-#define ROL(v,s) (LSL((v),(s)) | (LSR((v),32u - (s))))
-#define ROR(v,s) (LSR((v),(s)) | (LSL((v),32u - (s))))
-
/***************************************************************************/
@@ -796,7 +791,7 @@ void arm_cpu_device::HandleALU( uint32_t insn )
by = (insn & INSN_OP2_ROTATE) >> INSN_OP2_ROTATE_SHIFT;
if (by)
{
- op2 = ROR(insn & INSN_OP2_IMM, by << 1);
+ op2 = rotr_32(insn & INSN_OP2_IMM, by << 1);
sc = op2 & SIGN_BIT;
}
else
@@ -1312,7 +1307,7 @@ uint32_t arm_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
{
*pCarry = k ? (rm & (1 << (32 - k))) : (R15 & C_MASK);
}
- return k ? LSL(rm, k) : rm;
+ return rm << k;
case 1: /* LSR */
if (k == 0 || k == 32)
@@ -1328,7 +1323,7 @@ uint32_t arm_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
else
{
if (pCarry) *pCarry = (rm & (1 << (k - 1)));
- return LSR(rm, k);
+ return rm >> k;
}
case 2: /* ASR */
@@ -1340,9 +1335,9 @@ uint32_t arm_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
else
{
if (rm & SIGN_BIT)
- return LSR(rm, k) | (0xffffffffu << (32 - k));
+ return (rm >> k) | (0xffffffffu << (32 - k));
else
- return LSR(rm, k);
+ return (rm >> k);
}
case 3: /* ROR and RRX */
@@ -1350,12 +1345,12 @@ uint32_t arm_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
{
while (k > 32) k -= 32;
if (pCarry) *pCarry = rm & (1 << (k - 1));
- return ROR(rm, k);
+ return rotr_32(rm, k);
}
else
{
if (pCarry) *pCarry = (rm & 1);
- return LSR(rm, 1) | ((R15 & C_MASK) << 2);
+ return (rm >> 1) | ((R15 & C_MASK) << 2);
}
}
diff --git a/src/devices/cpu/arm/armdasm.cpp b/src/devices/cpu/arm/armdasm.cpp
index 9034d3ac6f3..8da32648630 100644
--- a/src/devices/cpu/arm/armdasm.cpp
+++ b/src/devices/cpu/arm/armdasm.cpp
@@ -14,7 +14,7 @@ uint32_t arm_disassembler::ExtractImmediateOperand(uint32_t opcode) const
// rrrrbbbbbbbb
uint32_t imm = opcode & 0xff;
uint8_t r = ((opcode >> 8) & 0xf) * 2;
- return (imm >> r) | (r ? (imm << (32 - r)) : 0);
+ return rotr_32(imm, r);
}
void arm_disassembler::WriteDataProcessingOperand(std::ostream &stream, uint32_t opcode, bool printOp0, bool printOp1, offs_t pc) const
diff --git a/src/devices/cpu/arm7/arm7.cpp b/src/devices/cpu/arm7/arm7.cpp
index 45f2a6eb67a..abdf3d98b58 100644
--- a/src/devices/cpu/arm7/arm7.cpp
+++ b/src/devices/cpu/arm7/arm7.cpp
@@ -2132,8 +2132,7 @@ uint32_t arm946es_cpu_device::arm7_cpu_read32(uint32_t addr)
if (addr & 3)
{
uint32_t *wp = (uint32_t *)&ITCM[(addr & ~3)&0x7fff];
- result = *wp;
- result = (result >> (8 * (addr & 3))) | (result << (32 - (8 * (addr & 3))));
+ result = rotr_32(*wp, 8 * (addr & 3));
}
else
{
@@ -2146,8 +2145,7 @@ uint32_t arm946es_cpu_device::arm7_cpu_read32(uint32_t addr)
if (addr & 3)
{
uint32_t *wp = (uint32_t *)&DTCM[(addr & ~3)&0x3fff];
- result = *wp;
- result = (result >> (8 * (addr & 3))) | (result << (32 - (8 * (addr & 3))));
+ result = rotr_32(*wp, 8 * (addr & 3));
}
else
{
@@ -2159,8 +2157,7 @@ uint32_t arm946es_cpu_device::arm7_cpu_read32(uint32_t addr)
{
if (addr & 3)
{
- result = m_program->read_dword(addr & ~3);
- result = (result >> (8 * (addr & 3))) | (result << (32 - (8 * (addr & 3))));
+ result = rotr_32(m_program->read_dword(addr & ~3), 8 * (addr & 3));
}
else
{
@@ -2330,8 +2327,7 @@ uint32_t arm7_cpu_device::arm7_cpu_read32(uint32_t addr)
if (addr & 3)
{
- result = m_program->read_dword(addr & ~3);
- result = (result >> (8 * (addr & 3))) | (result << (32 - (8 * (addr & 3))));
+ result = rotr_32(m_program->read_dword(addr & ~3), 8 * (addr & 3));
}
else
{
diff --git a/src/devices/cpu/arm7/arm7dasm.cpp b/src/devices/cpu/arm7/arm7dasm.cpp
index 3a5ec37a7f7..7de800bb9c8 100644
--- a/src/devices/cpu/arm7/arm7dasm.cpp
+++ b/src/devices/cpu/arm7/arm7dasm.cpp
@@ -96,7 +96,7 @@ uint32_t arm7_disassembler::ExtractImmediateOperand( uint32_t opcode )
/* rrrrbbbbbbbb */
uint32_t imm = opcode&0xff;
int r = ((opcode>>8)&0xf)*2;
- return (imm>>r)|(r?(imm<<(32-r)):0);
+ return rotr_32(imm, r);
}
void arm7_disassembler::WriteShiftCount( std::ostream &stream, uint32_t opcode )
diff --git a/src/devices/cpu/arm7/arm7help.h b/src/devices/cpu/arm7/arm7help.h
index a62722accfa..544cbbbd269 100644
--- a/src/devices/cpu/arm7/arm7help.h
+++ b/src/devices/cpu/arm7/arm7help.h
@@ -160,8 +160,3 @@
#define WRITE32(addr,data) arm7_cpu_write32(addr,data)
#define PTR_READ32 &arm7_cpu_read32
#define PTR_WRITE32 &arm7_cpu_write32
-
-#define LSL(v, s) ((v) << (s))
-#define LSR(v, s) ((v) >> (s))
-#define ROL(v, s) (LSL((v), (s)) | (LSR((v), 32u - (s))))
-#define ROR(v, s) (LSR((v), (s)) | (LSL((v), 32u - (s))))
diff --git a/src/devices/cpu/arm7/arm7ops.cpp b/src/devices/cpu/arm7/arm7ops.cpp
index 9737ce8bede..b1e7d2b2400 100644
--- a/src/devices/cpu/arm7/arm7ops.cpp
+++ b/src/devices/cpu/arm7/arm7ops.cpp
@@ -102,7 +102,7 @@ uint32_t arm7_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
// LSL (0,31) = Result shifted, least significant bit is in carry out
*pCarry = k ? (rm & (1 << (32 - k))) : (GET_CPSR & C_MASK);
}
- return k ? LSL(rm, k) : rm;
+ return k ? (rm << k) : rm;
}
case 1: /* LSR */
@@ -122,7 +122,7 @@ uint32_t arm7_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
{
if (pCarry)
*pCarry = (rm & (1 << (k - 1)));
- return LSR(rm, k);
+ return rm >> k;
}
case 2: /* ASR */
@@ -136,9 +136,9 @@ uint32_t arm7_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
else
{
if (rm & SIGN_BIT)
- return LSR(rm, k) | (0xffffffffu << (32 - k));
+ return (rm >> k) | (0xffffffffu << (32 - k));
else
- return LSR(rm, k);
+ return rm >> k;
}
case 3: /* ROR and RRX */
@@ -149,7 +149,7 @@ uint32_t arm7_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
{
if (pCarry)
*pCarry = rm & (1 << (k - 1));
- return ROR(rm, k);
+ return rotr_32(rm, k);
}
else
{
@@ -163,7 +163,7 @@ uint32_t arm7_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
/* RRX */
if (pCarry)
*pCarry = (rm & 1);
- return LSR(rm, 1) | ((GET_CPSR & C_MASK) << 2);
+ return (rm >> 1) | ((GET_CPSR & C_MASK) << 2);
}
}
@@ -857,7 +857,7 @@ void arm7_cpu_device::HandlePSRTransfer(uint32_t insn)
// Value can be specified for a Right Rotate, 2x the value specified.
int by = (insn & INSN_OP2_ROTATE) >> INSN_OP2_ROTATE_SHIFT;
if (by)
- val = ROR(insn & INSN_OP2_IMM, by << 1);
+ val = rotr_32(insn & INSN_OP2_IMM, by << 1);
else
val = insn & INSN_OP2_IMM;
}
@@ -967,7 +967,7 @@ void arm7_cpu_device::HandleALU(uint32_t insn)
by = (insn & INSN_OP2_ROTATE) >> INSN_OP2_ROTATE_SHIFT;
if (by)
{
- op2 = ROR(insn & INSN_OP2_IMM, by << 1);
+ op2 = rotr_32(insn & INSN_OP2_IMM, by << 1);
sc = op2 & SIGN_BIT;
}
else
diff --git a/src/devices/cpu/arm7/arm7thmb.cpp b/src/devices/cpu/arm7/arm7thmb.cpp
index a916e767868..47a0bcfe2d1 100644
--- a/src/devices/cpu/arm7/arm7thmb.cpp
+++ b/src/devices/cpu/arm7/arm7thmb.cpp
@@ -658,10 +658,9 @@ void arm7_cpu_device::tg04_00_07(uint32_t pc, uint32_t op) /* ROR Rd, Rs */
const uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
const uint32_t rrd = GetRegister(rd);
const uint32_t imm = GetRegister(rs) & 0xff;
- const uint32_t imm_masked = imm & 0x1f;
if (imm > 0)
{
- SetRegister(rd, (rrd >> imm_masked) | (rrd << (32 - imm_masked)));
+ SetRegister(rd, rotr_32(rrd, imm));
if (rrd & (1 << ((imm - 1) & 0x1f)))
{
set_cpsr(GET_CPSR | C_MASK);
diff --git a/src/devices/cpu/asap/asap.cpp b/src/devices/cpu/asap/asap.cpp
index 43e4008b85f..045819aa4ae 100644
--- a/src/devices/cpu/asap/asap.cpp
+++ b/src/devices/cpu/asap/asap.cpp
@@ -1557,25 +1557,19 @@ void asap_device::ashl_c0()
void asap_device::rotl()
{
- uint32_t src1 = SRC1VAL;
- uint32_t src2 = SRC2VAL & 31;
- DSTVAL = (src1 << src2) | (src1 >> (32 - src2));
+ DSTVAL = rotl_32(SRC1VAL, SRC2VAL);
}
void asap_device::rotl_c()
{
- uint32_t src1 = SRC1VAL;
- uint32_t src2 = SRC2VAL & 31;
- uint32_t dst = (src1 << src2) | (src1 >> (32 - src2));
+ uint32_t dst = rotl_32(SRC1VAL, SRC2VAL);
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::rotl_c0()
{
- uint32_t src1 = SRC1VAL;
- uint32_t src2 = SRC2VAL & 31;
- uint32_t dst = (src1 << src2) | (src1 >> (32 - src2));
+ uint32_t dst = rotl_32(SRC1VAL, SRC2VAL);
SET_ZN(dst);
}
diff --git a/src/devices/cpu/clipper/clipper.cpp b/src/devices/cpu/clipper/clipper.cpp
index e59a20ffc45..e310b66ea62 100644
--- a/src/devices/cpu/clipper/clipper.cpp
+++ b/src/devices/cpu/clipper/clipper.cpp
@@ -90,31 +90,6 @@ clipper_device::clipper_device(const machine_config &mconfig, device_type type,
{
}
-// rotate helpers to replace MSVC intrinsics
-inline u32 rotl32(u32 x, u8 shift)
-{
- shift &= 31;
- return (x << shift) | (x >> ((32 - shift) & 31));
-}
-
-inline u32 rotr32(u32 x, u8 shift)
-{
- shift &= 31;
- return (x >> shift) | (x << ((32 - shift) & 31));
-}
-
-inline u64 rotl64(u64 x, u8 shift)
-{
- shift &= 63;
- return (x << shift) | (x >> ((64 - shift) & 63));
-}
-
-inline u64 rotr64(u64 x, u8 shift)
-{
- shift &= 63;
- return (x >> shift) | (x << ((64 - shift) & 63));
-}
-
void clipper_device::device_start()
{
// configure the cammu address spaces
@@ -693,18 +668,18 @@ void clipper_device::execute_instruction()
case 0x34:
// rotw: rotate word
if (!BIT31(m_r[R1]))
- m_r[R2] = rotl32(m_r[R2], m_r[R1]);
+ m_r[R2] = rotl_32(m_r[R2], m_r[R1]);
else
- m_r[R2] = rotr32(m_r[R2], -m_r[R1]);
+ m_r[R2] = rotr_32(m_r[R2], -m_r[R1]);
// FLAGS: 00ZN
FLAGS(0, 0, m_r[R2] == 0, BIT31(m_r[R2]));
break;
case 0x35:
// rotl: rotate longword
if (!BIT31(m_r[R1]))
- set_64(R2, rotl64(get_64(R2), m_r[R1]));
+ set_64(R2, rotl_64(get_64(R2), m_r[R1]));
else
- set_64(R2, rotr64(get_64(R2), -m_r[R1]));
+ set_64(R2, rotr_64(get_64(R2), -m_r[R1]));
// FLAGS: 00ZN
FLAGS(0, 0, get_64(R2) == 0, BIT63(get_64(R2)));
break;
@@ -772,9 +747,9 @@ void clipper_device::execute_instruction()
case 0x3c:
// roti: rotate immediate
if (!BIT31(m_info.imm))
- m_r[R2] = rotl32(m_r[R2], m_info.imm);
+ m_r[R2] = rotl_32(m_r[R2], m_info.imm);
else
- m_r[R2] = rotr32(m_r[R2], -m_info.imm);
+ m_r[R2] = rotr_32(m_r[R2], -m_info.imm);
FLAGS(0, 0, m_r[R2] == 0, BIT31(m_r[R2]));
// FLAGS: 00ZN
// TRAPS: I
@@ -782,9 +757,9 @@ void clipper_device::execute_instruction()
case 0x3d:
// rotli: rotate longword immediate
if (!BIT31(m_info.imm))
- set_64(R2, rotl64(get_64(R2), m_info.imm));
+ set_64(R2, rotl_64(get_64(R2), m_info.imm));
else
- set_64(R2, rotr64(get_64(R2), -m_info.imm));
+ set_64(R2, rotr_64(get_64(R2), -m_info.imm));
FLAGS(0, 0, get_64(R2) == 0, BIT63(get_64(R2)));
// FLAGS: 00ZN
// TRAPS: I
@@ -1268,7 +1243,7 @@ void clipper_device::execute_instruction()
m_r[0]--;
m_r[1]++;
- m_r[2] = rotr32(m_r[2], 8);
+ m_r[2] = rotr_32(m_r[2], 8);
}
// TRAPS: P,W
break;
diff --git a/src/devices/cpu/drcbec.cpp b/src/devices/cpu/drcbec.cpp
index e6cb5e533e5..0421693b5dc 100644
--- a/src/devices/cpu/drcbec.cpp
+++ b/src/devices/cpu/drcbec.cpp
@@ -864,25 +864,21 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_ROLAND, 4, 0): // ROLAND dst,src,count,mask[,f]
- shift = PARAM2 & 31;
- PARAM0 = ((PARAM1 << shift) | (PARAM1 >> (32 - shift))) & PARAM3;
+ PARAM0 = rotl_32(PARAM1, PARAM2) & PARAM3;
break;
case MAKE_OPCODE_SHORT(OP_ROLAND, 4, 1):
- shift = PARAM2 & 31;
- temp32 = ((PARAM1 << shift) | (PARAM1 >> (32 - shift))) & PARAM3;
+ temp32 = rotl_32(PARAM1, PARAM2) & PARAM3;
flags = FLAGS32_NZ(temp32);
PARAM0 = temp32;
break;
case MAKE_OPCODE_SHORT(OP_ROLINS, 4, 0): // ROLINS dst,src,count,mask[,f]
- shift = PARAM2 & 31;
- PARAM0 = (PARAM0 & ~PARAM3) | (((PARAM1 << shift) | (PARAM1 >> (32 - shift))) & PARAM3);
+ PARAM0 = (PARAM0 & ~PARAM3) | (rotl_32(PARAM1, PARAM2) & PARAM3);
break;
case MAKE_OPCODE_SHORT(OP_ROLINS, 4, 1):
- shift = PARAM2 & 31;
- temp32 = (PARAM0 & ~PARAM3) | (((PARAM1 << shift) | (PARAM1 >> (32 - shift))) & PARAM3);
+ temp32 = (PARAM0 & ~PARAM3) | (rotl_32(PARAM1, PARAM2) & PARAM3);
flags = FLAGS32_NZ(temp32);
PARAM0 = temp32;
break;
@@ -1138,13 +1134,12 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_ROL, 4, 0): // ROL dst,src,count[,f]
- shift = PARAM2 & 31;
- PARAM0 = (PARAM1 << shift) | (PARAM1 >> ((32 - shift) & 31));
+ PARAM0 = rotl_32(PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(OP_ROL, 4, 1):
shift = PARAM2 & 31;
- temp32 = (PARAM1 << shift) | (PARAM1 >> ((32 - shift) & 31));
+ temp32 = rotl_32(PARAM1, shift);
if (shift != 0)
{
flags = FLAGS32_NZ(temp32);
@@ -1175,13 +1170,12 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_ROR, 4, 0): // ROR dst,src,count[,f]
- shift = PARAM2 & 31;
- PARAM0 = (PARAM1 >> shift) | (PARAM1 << ((32 - shift) & 31));
+ PARAM0 = rotr_32(PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(OP_ROR, 4, 1):
shift = PARAM2 & 31;
- temp32 = (PARAM1 >> shift) | (PARAM1 << ((32 - shift) & 31));
+ temp32 = rotr_32(PARAM1, shift);
flags = FLAGS32_NZ(temp32);
if (shift != 0) flags |= (PARAM1 >> (shift - 1)) & FLAG_C;
PARAM0 = temp32;
@@ -1507,25 +1501,21 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_ROLAND, 8, 0): // DROLAND dst,src,count,mask[,f]
- shift = DPARAM2 & 63;
- DPARAM0 = ((DPARAM1 << shift) | (DPARAM1 >> (64 - shift))) & DPARAM3;
+ DPARAM0 = rotl_64(DPARAM1, DPARAM2) & DPARAM3;
break;
case MAKE_OPCODE_SHORT(OP_ROLAND, 8, 1):
- shift = DPARAM2 & 63;
- temp64 = ((DPARAM1 << shift) | (DPARAM1 >> (64 - shift))) & DPARAM3;
+ temp64 = rotl_64(DPARAM1, DPARAM2) & DPARAM3;
flags = FLAGS64_NZ(temp64);
DPARAM0 = temp64;
break;
case MAKE_OPCODE_SHORT(OP_ROLINS, 8, 0): // DROLINS dst,src,count,mask[,f]
- shift = DPARAM2 & 63;
- DPARAM0 = (DPARAM0 & ~DPARAM3) | (((DPARAM1 << shift) | (DPARAM1 >> (64 - shift))) & DPARAM3);
+ DPARAM0 = (DPARAM0 & ~DPARAM3) | (rotl_64(DPARAM1, DPARAM2) & DPARAM3);
break;
case MAKE_OPCODE_SHORT(OP_ROLINS, 8, 1):
- shift = DPARAM2 & 63;
- temp64 = (DPARAM0 & ~DPARAM3) | (((DPARAM1 << shift) | (DPARAM1 >> (64 - shift))) & DPARAM3);
+ temp64 = (DPARAM0 & ~DPARAM3) | (rotl_64(DPARAM1, DPARAM2) & DPARAM3);
flags = FLAGS64_NZ(temp64);
DPARAM0 = temp64;
break;
@@ -1742,13 +1732,12 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_ROL, 8, 0): // DROL dst,src,count[,f]
- shift = DPARAM2 & 63;
- DPARAM0 = (DPARAM1 << shift) | (DPARAM1 >> ((64 - shift) & 63));
+ DPARAM0 = rotl_64(DPARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(OP_ROL, 8, 1):
shift = DPARAM2 & 63;
- temp64 = (DPARAM1 << shift) | (DPARAM1 >> ((64 - shift) & 63));
+ temp64 = rotl_64(DPARAM1, shift);
flags = FLAGS64_NZ(temp64);
if (shift != 0) flags |= ((DPARAM1 << (shift - 1)) >> 63) & FLAG_C;
DPARAM0 = temp64;
@@ -1776,13 +1765,12 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_ROR, 8, 0): // DROR dst,src,count[,f]
- shift = DPARAM2 & 63;
- DPARAM0 = (DPARAM1 >> shift) | (DPARAM1 << ((64 - shift) & 63));
+ DPARAM0 = rotr_64(DPARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(OP_ROR, 8, 1):
shift = DPARAM2 & 63;
- temp64 = (DPARAM1 >> shift) | (DPARAM1 << ((64 - shift) & 63));
+ temp64 = rotr_64(DPARAM1, shift);
flags = FLAGS64_NZ(temp64);
if (shift != 0) flags |= (DPARAM1 >> (shift - 1)) & FLAG_C;
DPARAM0 = temp64;
diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx
index e99f86d3ec3..953e82f4150 100644
--- a/src/devices/cpu/e132xs/e132xsop.hxx
+++ b/src/devices/cpu/e132xs/e132xsop.hxx
@@ -1513,8 +1513,7 @@ void hyperstone_device::hyperstone_rol()
const uint32_t mask = (uint32_t)(0xffffffff00000000ULL >> n);
#endif
- if (n)
- val = (val << n) | (val >> (32 - n));
+ val = rotl_32(val, n);
#ifdef MISSIONCRAFT_FLAGS
SR &= ~(V_MASK | Z_MASK | C_MASK | N_MASK);
@@ -2213,11 +2212,6 @@ void hyperstone_device::hyperstone_mul()
m_core->icount -= 3 << m_core->clck_scale;
}
-static inline int32_t mul_16x16(int16_t halfd, int16_t halfs)
-{
- return (int32_t)halfd * (int32_t)halfs;
-}
-
void hyperstone_device::hyperstone_extend()
{
m_instruction_length = (2<<19);
diff --git a/src/devices/cpu/i386/i386op32.hxx b/src/devices/cpu/i386/i386op32.hxx
index b81545ced81..4b101012ec8 100644
--- a/src/devices/cpu/i386/i386op32.hxx
+++ b/src/devices/cpu/i386/i386op32.hxx
@@ -64,15 +64,13 @@ uint32_t i386_device::i386_shift_rotate32(uint8_t modrm, uint32_t value, uint8_t
switch( (modrm >> 3) & 0x7 )
{
case 0: /* ROL rm32, i8 */
- dst = ((src & ((uint32_t)0xffffffff >> shift)) << shift) |
- ((src & ((uint32_t)0xffffffff << (32-shift))) >> (32-shift));
+ dst = rotl_32(src, shift);
m_CF = dst & 0x1;
m_OF = (dst & 1) ^ (dst >> 31);
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
case 1: /* ROR rm32, i8 */
- dst = ((src & ((uint32_t)0xffffffff << shift)) >> shift) |
- ((src & ((uint32_t)0xffffffff >> (32-shift))) << (32-shift));
+ dst = rotr_32(src, shift);
m_CF = (dst >> 31) & 0x1;
m_OF = ((dst >> 31) ^ (dst >> 30)) & 1;
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
diff --git a/src/devices/cpu/jaguar/jaguar.cpp b/src/devices/cpu/jaguar/jaguar.cpp
index ade6aea525c..84d5a999dbb 100644
--- a/src/devices/cpu/jaguar/jaguar.cpp
+++ b/src/devices/cpu/jaguar/jaguar.cpp
@@ -1014,7 +1014,7 @@ void jaguar_cpu_device::ror_rn_rn(u16 op)
const u8 dreg = op & 31;
const u32 r1 = m_r[(op >> 5) & 31] & 31;
const u32 r2 = m_r[dreg];
- const u32 res = (r2 >> r1) | (r2 << (32 - r1));
+ const u32 res = rotr_32(r2, r1);
m_r[dreg] = res;
CLR_ZNC(); SET_ZN(res); m_flags |= (r2 >> 30) & 2;
}
@@ -1024,7 +1024,7 @@ void jaguar_cpu_device::rorq_n_rn(u16 op)
const u8 dreg = op & 31;
const u32 r1 = convert_zero[(op >> 5) & 31];
const u32 r2 = m_r[dreg];
- const u32 res = (r2 >> r1) | (r2 << (32 - r1));
+ const u32 res = rotr_32(r2, r1);
m_r[dreg] = res;
CLR_ZNC(); SET_ZN(res); m_flags |= (r2 >> 30) & 2;
}
diff --git a/src/devices/cpu/m68000/m68kcpu.cpp b/src/devices/cpu/m68000/m68kcpu.cpp
index de6a2dd391f..ce5e2db86e9 100644
--- a/src/devices/cpu/m68000/m68kcpu.cpp
+++ b/src/devices/cpu/m68000/m68kcpu.cpp
@@ -1415,7 +1415,7 @@ void m68000_base_device::init32(address_space &space, address_space &ospace)
case 3:
m_program32.write_dword(address - 3, dword_from_unaligned_word((data & 0xffff0000U) >> 16), 0x000000ff);
- m_program32.write_dword(address + 1, (data & 0x00ffffff) << 8 | (data & 0xff000000U) >> 24, 0xffffff00U);
+ m_program32.write_dword(address + 1, rotl_32(data, 8), 0xffffff00U);
break;
}
};
@@ -1585,7 +1585,7 @@ void m68000_base_device::init32mmu(address_space &space, address_space &ospace)
return;
}
m_program32.write_dword(address0 - 3, dword_from_unaligned_word((data & 0xffff0000U) >> 16), 0x000000ff);
- m_program32.write_dword(address1, (data & 0x00ffffff) << 8 | (data & 0xff000000U) >> 24, 0xffffff00U);
+ m_program32.write_dword(address1, rotl_32(data, 8), 0xffffff00U);
break;
}
}
diff --git a/src/devices/cpu/m88000/m88000.cpp b/src/devices/cpu/m88000/m88000.cpp
index 57cdfa6fbb2..f3921bc8667 100644
--- a/src/devices/cpu/m88000/m88000.cpp
+++ b/src/devices/cpu/m88000/m88000.cpp
@@ -615,7 +615,7 @@ void mc88100_device::execute(u32 const inst)
{
unsigned const offset = inst & 31;
- m_r[D] = (m_r[S1] << (32 - offset)) | (m_r[S1] >> offset);
+ m_r[D] = rotr_32(m_r[S1], offset);
}
break;
@@ -988,11 +988,7 @@ void mc88100_device::execute(u32 const inst)
}
break;
case 0x540: // rot: rotate (register)
- {
- unsigned const offset = m_r[S2] & 31;
-
- m_r[D] = (m_r[S1] << (32 - offset)) | (m_r[S1] >> offset);
- }
+ m_r[D] = rotr_32(m_r[S1], m_r[S2]);
break;
case 0x740: // ff1: find first bit set
{
diff --git a/src/devices/cpu/scudsp/scudsp.cpp b/src/devices/cpu/scudsp/scudsp.cpp
index 517688c226b..4f4d697a900 100644
--- a/src/devices/cpu/scudsp/scudsp.cpp
+++ b/src/devices/cpu/scudsp/scudsp.cpp
@@ -498,7 +498,7 @@ void scudsp_cpu_device::scudsp_operation(uint32_t opcode)
/* Unrecognized opcode */
break;
case 0xF: /* RL8 */
- i3 = ((m_acl.si << 8) & 0xffffff00) | ((m_acl.si >> 24) & 0xff);
+ i3 = rotl_32(m_acl.si, 8);
m_alu = i3;
SET_Z( i3 == 0 );
SET_S( i3 < 0 );
diff --git a/src/devices/cpu/tms32082/mp_ops.cpp b/src/devices/cpu/tms32082/mp_ops.cpp
index 867a5ecf54b..5a81b500b13 100644
--- a/src/devices/cpu/tms32082/mp_ops.cpp
+++ b/src/devices/cpu/tms32082/mp_ops.cpp
@@ -21,9 +21,6 @@
#define OP_P2() ((m_ir >> 7) & 0x3)
#define OP_ACC() ((m_ir >> 15) & 0x2) | ((m_ir >> 11) & 1)
-#define ROTATE_L(x, r) ((x << r) | (x >> (32-r)))
-#define ROTATE_R(x, r) ((x >> r) | (x << (32-r)))
-
bool tms32082_mp_device::test_condition(int condition, uint32_t value)
@@ -246,11 +243,11 @@ void tms32082_mp_device::execute_short_imm()
uint32_t res;
if (r) // right
{
- res = ROTATE_R(source, rot) & compmask;
+ res = rotr_32(source, rot) & compmask;
}
else // left
{
- res = ROTATE_L(source, rot) & compmask;
+ res = rotl_32(source, rot) & compmask;
}
if (rd)
@@ -275,14 +272,14 @@ void tms32082_mp_device::execute_short_imm()
uint32_t res;
if (r) // right
{
- res = ROTATE_R(source, rot) & compmask;
+ res = rotr_32(source, rot) & compmask;
// sign extend
if (res & (1 << (end - 1)))
res |= 0xffffffff << end;
}
else // left
{
- res = ROTATE_L(source, rot) & compmask;
+ res = rotl_32(source, rot) & compmask;
// sign extend makes no sense to left..
}
@@ -309,11 +306,11 @@ void tms32082_mp_device::execute_short_imm()
uint32_t res;
if (r) // right
{
- res = ROTATE_R(source, rot) & compmask;
+ res = rotr_32(source, rot) & compmask;
}
else // left
{
- res = ROTATE_L(source, rot) & compmask;
+ res = rotl_32(source, rot) & compmask;
}
if (rd)
@@ -339,11 +336,11 @@ void tms32082_mp_device::execute_short_imm()
uint32_t res;
if (r) // right
{
- res = (ROTATE_R(source, rot) & compmask) | (m_reg[rd] & ~compmask);
+ res = (rotr_32(source, rot) & compmask) | (m_reg[rd] & ~compmask);
}
else // left
{
- res = (ROTATE_L(source, rot) & compmask) | (m_reg[rd] & ~compmask);
+ res = (rotl_32(source, rot) & compmask) | (m_reg[rd] & ~compmask);
}
if (rd)
@@ -369,14 +366,14 @@ void tms32082_mp_device::execute_short_imm()
uint32_t res;
if (r) // right
{
- res = ROTATE_R(source, rot) & compmask;
+ res = rotr_32(source, rot) & compmask;
// sign extend
if (res & (1 << (31 - rot)))
res |= 0xffffffff << (31 - rot);
}
else // left
{
- res = ROTATE_L(source, rot) & compmask;
+ res = rotl_32(source, rot) & compmask;
// sign extend makes no sense to left..
}
@@ -403,11 +400,11 @@ void tms32082_mp_device::execute_short_imm()
uint32_t res;
if (r) // right
{
- res = ROTATE_R(source, rot) & compmask;
+ res = rotr_32(source, rot) & compmask;
}
else // left
{
- res = ROTATE_L(source, rot) & compmask;
+ res = rotl_32(source, rot) & compmask;
}
if (rd)
@@ -433,11 +430,11 @@ void tms32082_mp_device::execute_short_imm()
uint32_t res;
if (r) // right
{
- res = (ROTATE_R(source, rot) & compmask) | (m_reg[rd] & ~compmask);
+ res = (rotr_32(source, rot) & compmask) | (m_reg[rd] & ~compmask);
}
else // left
{
- res = (ROTATE_L(source, rot) & compmask) | (m_reg[rd] & ~compmask);
+ res = (rotl_32(source, rot) & compmask) | (m_reg[rd] & ~compmask);
}
if (rd)
@@ -890,11 +887,11 @@ void tms32082_mp_device::execute_reg_long_imm()
uint32_t res;
if (r) // right
{
- res = ROTATE_R(source, rot) & compmask;
+ res = rotr_32(source, rot) & compmask;
}
else // left
{
- res = ROTATE_L(source, rot) & compmask;
+ res = rotl_32(source, rot) & compmask;
}
if (rd)
@@ -920,14 +917,14 @@ void tms32082_mp_device::execute_reg_long_imm()
uint32_t res;
if (r) // right
{
- res = ROTATE_R(source, rot) & compmask;
+ res = rotr_32(source, rot) & compmask;
// sign extend
if (res & (1 << (31 - rot)))
res |= 0xffffffff << (31 - rot);
}
else // left
{
- res = ROTATE_L(source, rot) & compmask;
+ res = rotl_32(source, rot) & compmask;
}
if (rd)
@@ -953,11 +950,11 @@ void tms32082_mp_device::execute_reg_long_imm()
uint32_t res;
if (r) // right
{
- res = ROTATE_R(source, rot) & compmask;
+ res = rotr_32(source, rot) & compmask;
}
else // left
{
- res = ROTATE_L(source, rot) & compmask;
+ res = rotl_32(source, rot) & compmask;
}
if (rd)
diff --git a/src/devices/cpu/uml.cpp b/src/devices/cpu/uml.cpp
index 6a81d63400e..30dea00f6b2 100644
--- a/src/devices/cpu/uml.cpp
+++ b/src/devices/cpu/uml.cpp
@@ -220,33 +220,6 @@ opcode_info const instruction::s_opcode_info_table[OP_MAX] =
//**************************************************************************
-// INLINE FUNCTIONS
-//**************************************************************************
-
-//-------------------------------------------------
-// rol32 - perform a 32-bit left rotate
-//-------------------------------------------------
-
-inline u32 rol32(u32 source, u8 count)
-{
- count &= 31;
- return (source << count) | (source >> (32 - count));
-}
-
-
-//-------------------------------------------------
-// rol64 - perform a 64-bit left rotate
-//-------------------------------------------------
-
-inline u64 rol64(u64 source, u8 count)
-{
- count &= 63;
- return (source << count) | (source >> (64 - count));
-}
-
-
-
-//**************************************************************************
// UML CODE HANDLE
//**************************************************************************
@@ -462,9 +435,9 @@ void uml::instruction::simplify()
{
assert(m_size == 4 || m_size == 8);
if (m_size == 4)
- convert_to_mov_immediate(rol32(m_param[1].immediate(), m_param[2].immediate()) & m_param[3].immediate());
+ convert_to_mov_immediate(rotl_32(m_param[1].immediate(), m_param[2].immediate()) & m_param[3].immediate());
else
- convert_to_mov_immediate(rol64(m_param[1].immediate(), m_param[2].immediate()) & m_param[3].immediate());
+ convert_to_mov_immediate(rotl_64(m_param[1].immediate(), m_param[2].immediate()) & m_param[3].immediate());
}
else if (m_param[2].is_immediate_value(0))
{
@@ -687,9 +660,9 @@ void uml::instruction::simplify()
if (m_param[1].is_immediate() && m_param[2].is_immediate())
{
if (m_size == 4)
- convert_to_mov_immediate(rol32(m_param[1].immediate(), m_param[2].immediate()));
+ convert_to_mov_immediate(rotl_32(m_param[1].immediate(), m_param[2].immediate()));
else if (m_size == 8)
- convert_to_mov_immediate(rol64(m_param[1].immediate(), m_param[2].immediate()));
+ convert_to_mov_immediate(rotl_64(m_param[1].immediate(), m_param[2].immediate()));
}
else if (m_param[2].is_immediate_value(0))
convert_to_mov_param(1);
@@ -700,9 +673,9 @@ void uml::instruction::simplify()
if (m_param[1].is_immediate() && m_param[2].is_immediate())
{
if (m_size == 4)
- convert_to_mov_immediate(rol32(m_param[1].immediate(), 32 - m_param[2].immediate()));
+ convert_to_mov_immediate(rotr_32(m_param[1].immediate(), m_param[2].immediate()));
else if (m_size == 8)
- convert_to_mov_immediate(rol64(m_param[1].immediate(), 64 - m_param[2].immediate()));
+ convert_to_mov_immediate(rotr_64(m_param[1].immediate(), m_param[2].immediate()));
}
else if (m_param[2].is_immediate_value(0))
convert_to_mov_param(1);
diff --git a/src/devices/video/voodoo_render.cpp b/src/devices/video/voodoo_render.cpp
index 7a698a9b028..93615abb1e4 100644
--- a/src/devices/video/voodoo_render.cpp
+++ b/src/devices/video/voodoo_render.cpp
@@ -331,19 +331,15 @@ void rasterizer_params::compute_equations()
}
-//-------------------------------------------------
-// hash - return a hash of the current values
-//-------------------------------------------------
-
u32 rasterizer_params::hash() const
{
return m_generic ^
- rotate(m_alphamode, 0) ^
- rotate(m_fbzmode, 6) ^
- rotate(m_fbzcp, 12) ^
- rotate(m_fogmode, 18) ^
- rotate(m_texmode0, 24) ^
- rotate(m_texmode1, 30);
+ rotl_32(m_alphamode, 0) ^
+ rotl_32(m_fbzmode, 6) ^
+ rotl_32(m_fbzcp, 12) ^
+ rotl_32(m_fogmode, 18) ^
+ rotl_32(m_texmode0, 24) ^
+ rotl_32(m_texmode1, 30);
}
diff --git a/src/devices/video/voodoo_render.h b/src/devices/video/voodoo_render.h
index 9eafef87f98..038948730be 100644
--- a/src/devices/video/voodoo_render.h
+++ b/src/devices/video/voodoo_render.h
@@ -321,9 +321,6 @@ public:
color_equation const &tex1_equation() const { return m_tex1_equation; }
private:
- // internal helpers
- static constexpr u32 rotate(u32 value, int count) { return (value << count) | (value >> (32 - count)); }
-
// internal state
u32 m_generic; // 4 bits
u32 m_fbzcp; // 30 bits
diff --git a/src/emu/validity.cpp b/src/emu/validity.cpp
index 1d0db1c421c..8fed2d6def0 100644
--- a/src/emu/validity.cpp
+++ b/src/emu/validity.cpp
@@ -322,6 +322,34 @@ void validate_inlines()
if (resultu8 != i)
osd_printf_error("Error testing count_leading_ones_32 %08x=%02x (expected %02x)\n", t, resultu8, i);
}
+
+ u32 expected32 = testu32a << 1 | testu32a >> 31;
+ for (int i = -33; i <= 33; i++)
+ {
+ u32 resultu32r = rotr_32(testu32a, i);
+ u32 resultu32l = rotl_32(testu32a, -i);
+
+ if (resultu32r != expected32)
+ osd_printf_error("Error testing rotr_32 %08x, %d=%08x (expected %08x)\n", u32(testu32a), i, resultu32r, expected32);
+ if (resultu32l != expected32)
+ osd_printf_error("Error testing rotl_32 %08x, %d=%08x (expected %08x)\n", u32(testu32a), -i, resultu32l, expected32);
+
+ expected32 = expected32 >> 1 | expected32 << 31;
+ }
+
+ u64 expected64 = testu64a << 1 | testu64a >> 63;
+ for (int i = -65; i <= 65; i++)
+ {
+ u64 resultu64r = rotr_64(testu64a, i);
+ u64 resultu64l = rotl_64(testu64a, -i);
+
+ if (resultu64r != expected64)
+ osd_printf_error("Error testing rotr_64 %016x, %d=%016x (expected %016x)\n", u64(testu64a), i, resultu64r, expected64);
+ if (resultu64l != expected64)
+ osd_printf_error("Error testing rotl_64 %016x, %d=%016x (expected %016x)\n", u64(testu64a), -i, resultu64l, expected64);
+
+ expected64 = expected64 >> 1 | expected64 << 63;
+ }
}
diff --git a/src/lib/util/hashing.cpp b/src/lib/util/hashing.cpp
index e90c128a8a2..62447c7b6c0 100644
--- a/src/lib/util/hashing.cpp
+++ b/src/lib/util/hashing.cpp
@@ -11,6 +11,8 @@
#include "hashing.h"
#include "strformat.h"
+#include "eminline.h"
+
#include <zlib.h>
#include <iomanip>
@@ -40,50 +42,45 @@ constexpr int char_to_hex(char c)
}
-constexpr uint32_t sha1_rol(uint32_t x, unsigned n)
-{
- return (x << n) | (x >> (32 - n));
-}
-
inline uint32_t sha1_b(uint32_t *data, unsigned i)
{
uint32_t r = data[(i + 13) & 15U];
r ^= data[(i + 8) & 15U];
r ^= data[(i + 2) & 15U];
r ^= data[i & 15U];
- r = sha1_rol(r, 1);
+ r = rotl_32(r, 1);
data[i & 15U] = r;
return r;
}
inline void sha1_r0(const uint32_t *data, std::array<uint32_t, 5> &d, unsigned i)
{
- d[i % 5] = d[i % 5] + ((d[(i + 3) % 5] & (d[(i + 2) % 5] ^ d[(i + 1) % 5])) ^ d[(i + 1) % 5]) + data[i] + 0x5a827999U + sha1_rol(d[(i + 4) % 5], 5);
- d[(i + 3) % 5] = sha1_rol(d[(i + 3) % 5], 30);
+ d[i % 5] = d[i % 5] + ((d[(i + 3) % 5] & (d[(i + 2) % 5] ^ d[(i + 1) % 5])) ^ d[(i + 1) % 5]) + data[i] + 0x5a827999U + rotl_32(d[(i + 4) % 5], 5);
+ d[(i + 3) % 5] = rotl_32(d[(i + 3) % 5], 30);
}
inline void sha1_r1(uint32_t *data, std::array<uint32_t, 5> &d, unsigned i)
{
- d[i % 5] = d[i % 5] + ((d[(i + 3) % 5] & (d[(i + 2) % 5] ^ d[(i + 1) % 5])) ^ d[(i + 1) % 5])+ sha1_b(data, i) + 0x5a827999U + sha1_rol(d[(i + 4) % 5], 5);
- d[(i + 3) % 5] = sha1_rol(d[(i + 3) % 5], 30);
+ d[i % 5] = d[i % 5] + ((d[(i + 3) % 5] & (d[(i + 2) % 5] ^ d[(i + 1) % 5])) ^ d[(i + 1) % 5])+ sha1_b(data, i) + 0x5a827999U + rotl_32(d[(i + 4) % 5], 5);
+ d[(i + 3) % 5] = rotl_32(d[(i + 3) % 5], 30);
}
inline void sha1_r2(uint32_t *data, std::array<uint32_t, 5> &d, unsigned i)
{
- d[i % 5] = d[i % 5] + (d[(i + 3) % 5] ^ d[(i + 2) % 5] ^ d[(i + 1) % 5]) + sha1_b(data, i) + 0x6ed9eba1U + sha1_rol(d[(i + 4) % 5], 5);
- d[(i + 3) % 5] = sha1_rol(d[(i + 3) % 5], 30);
+ d[i % 5] = d[i % 5] + (d[(i + 3) % 5] ^ d[(i + 2) % 5] ^ d[(i + 1) % 5]) + sha1_b(data, i) + 0x6ed9eba1U + rotl_32(d[(i + 4) % 5], 5);
+ d[(i + 3) % 5] = rotl_32(d[(i + 3) % 5], 30);
}
inline void sha1_r3(uint32_t *data, std::array<uint32_t, 5> &d, unsigned i)
{
- d[i % 5] = d[i % 5] + (((d[(i + 3) % 5] | d[(i + 2) % 5]) & d[(i + 1) % 5]) | (d[(i + 3) % 5] & d[(i + 2) % 5])) + sha1_b(data, i) + 0x8f1bbcdcU + sha1_rol(d[(i + 4) % 5], 5);
- d[(i + 3) % 5] = sha1_rol(d[(i + 3) % 5], 30);
+ d[i % 5] = d[i % 5] + (((d[(i + 3) % 5] | d[(i + 2) % 5]) & d[(i + 1) % 5]) | (d[(i + 3) % 5] & d[(i + 2) % 5])) + sha1_b(data, i) + 0x8f1bbcdcU + rotl_32(d[(i + 4) % 5], 5);
+ d[(i + 3) % 5] = rotl_32(d[(i + 3) % 5], 30);
}
inline void sha1_r4(uint32_t *data, std::array<uint32_t, 5> &d, unsigned i)
{
- d[i % 5] = d[i % 5] + (d[(i + 3) % 5] ^ d[(i + 2) % 5] ^ d[(i + 1) % 5]) + sha1_b(data, i) + 0xca62c1d6U + sha1_rol(d[(i + 4) % 5], 5);
- d[(i + 3) % 5] = sha1_rol(d[(i + 3) % 5], 30);
+ d[i % 5] = d[i % 5] + (d[(i + 3) % 5] ^ d[(i + 2) % 5] ^ d[(i + 1) % 5]) + sha1_b(data, i) + 0xca62c1d6U + rotl_32(d[(i + 4) % 5], 5);
+ d[(i + 3) % 5] = rotl_32(d[(i + 3) % 5], 30);
}
inline void sha1_process(std::array<uint32_t, 5> &st, uint32_t *data)
diff --git a/src/mame/gaelco/gaelco2_m.cpp b/src/mame/gaelco/gaelco2_m.cpp
index 86010953b73..cb2223358ca 100644
--- a/src/mame/gaelco/gaelco2_m.cpp
+++ b/src/mame/gaelco/gaelco2_m.cpp
@@ -261,11 +261,6 @@ void gaelco2_state::init_snowboar()
save_item(NAME(m_snowboard_latch));
}
-static u32 rol(u32 x, u8 c)
-{
- return (x << c) | (x >> (32 - c));
-}
-
static u16 get_lo(u32 x)
{
return ((x & 0x00000010) << 1) |
@@ -273,7 +268,7 @@ static u16 get_lo(u32 x)
((x & 0x40000000) >> 27) |
((x & 0x00000005) << 6) |
((x & 0x00000008) << 8) |
- rol(x & 0x00800040, 9) |
+ rotl_32(x & 0x00800040, 9) |
((x & 0x04000000) >> 16) |
((x & 0x00008000) >> 14) |
((x & 0x00002000) >> 11) |
diff --git a/src/mame/seibu/r2crypt.cpp b/src/mame/seibu/r2crypt.cpp
index dbf40ce8439..23f434c8fa7 100644
--- a/src/mame/seibu/r2crypt.cpp
+++ b/src/mame/seibu/r2crypt.cpp
@@ -191,11 +191,6 @@ static const uint16_t x11_zt[512] = {
};
-static uint32_t yrot(uint32_t v, int r)
-{
- return (v << r) | (v >> (32-r));
-}
-
static uint16_t gm(int i4)
{
uint16_t x=0;
@@ -212,7 +207,7 @@ static uint16_t gm(int i4)
static uint32_t core_decrypt(uint32_t ciphertext, int i1, int i2, int i3, int i4,
const uint8_t *rotate, const uint8_t *x5, const uint16_t *x11, uint32_t preXor, uint32_t carryMask, uint32_t postXor)
{
- uint32_t v1 = bitswap<32>(yrot(ciphertext, rotate[i1]), 25,28,15,19, 6,0,3,24, 11,1,2,30, 16,7,22,17, 31,14,23,9, 27,18,4,10, 13,20,5,12, 8,29,26,21);
+ uint32_t v1 = bitswap<32>(rotl_32(ciphertext, rotate[i1]), 25,28,15,19, 6,0,3,24, 11,1,2,30, 16,7,22,17, 31,14,23,9, 27,18,4,10, 13,20,5,12, 8,29,26,21);
uint16_t x1Low = (x5[i2]<<11) ^ x11[i3] ^ gm(i4);
uint32_t x1 = x1Low | (bitswap<16>(x1Low, 0,8,1,9, 2,10,3,11, 4,12,5,13, 6,14,7,15)<<16);
diff --git a/src/osd/eivc.h b/src/osd/eivc.h
index 2ffd0e7633b..d17fbc2d0c4 100644
--- a/src/osd/eivc.h
+++ b/src/osd/eivc.h
@@ -14,6 +14,7 @@
#pragma once
#include <intrin.h>
+#include <stdlib.h>
#pragma intrinsic(_BitScanReverse)
#ifdef PTR64
#pragma intrinsic(_BitScanReverse64)
@@ -91,4 +92,44 @@ __forceinline uint8_t _count_leading_ones_64(uint64_t value)
}
#endif
+
+/*-------------------------------------------------
+ rotl_32 - circularly shift a 32-bit value left
+ by the specified number of bits (modulo 32)
+-------------------------------------------------*/
+
+#ifndef rotl_32
+#define rotl_32 _rotl
+#endif
+
+
+/*-------------------------------------------------
+ rotr_32 - circularly shift a 32-bit value right
+ by the specified number of bits (modulo 32)
+-------------------------------------------------*/
+
+#ifndef rotr_32
+#define rotr_32 _rotr
+#endif
+
+
+/*-------------------------------------------------
+ rotl_64 - circularly shift a 64-bit value left
+ by the specified number of bits (modulo 64)
+-------------------------------------------------*/
+
+#ifndef rotl_64
+#define rotl_64 _rotl64
+#endif
+
+
+/*-------------------------------------------------
+ rotr_64 - circularly shift a 64-bit value right
+ by the specified number of bits (modulo 64)
+-------------------------------------------------*/
+
+#ifndef rotr_64
+#define rotr_64 _rotr64
+#endif
+
#endif // MAME_OSD_EIVC_H
diff --git a/src/osd/eminline.h b/src/osd/eminline.h
index 02bd22b3fdb..685025416b9 100644
--- a/src/osd/eminline.h
+++ b/src/osd/eminline.h
@@ -51,6 +51,19 @@
***************************************************************************/
/*-------------------------------------------------
+ mul_16x16 - perform a signed 16 bit x 16 bit
+ multiply and return the full 32 bit result
+-------------------------------------------------*/
+
+#ifndef mul_16x16
+constexpr int32_t mul_16x16(int16_t a, int16_t b)
+{
+ return int32_t(a) * int32_t(b);
+}
+#endif
+
+
+/*-------------------------------------------------
mul_32x32 - perform a signed 32 bit x 32 bit
multiply and return the full 64 bit result
-------------------------------------------------*/
@@ -474,6 +487,74 @@ inline unsigned population_count_64(uint64_t val)
#endif
+/*-------------------------------------------------
+ rotl_32 - circularly shift a 32-bit value left
+ by the specified number of bits (modulo 32)
+-------------------------------------------------*/
+
+#ifndef rotl_32
+constexpr uint32_t rotl_32(uint32_t val, int shift)
+{
+ shift &= 31;
+ if (shift)
+ return val << shift | val >> (32 - shift);
+ else
+ return val;
+}
+#endif
+
+
+/*-------------------------------------------------
+ rotr_32 - circularly shift a 32-bit value right
+ by the specified number of bits (modulo 32)
+-------------------------------------------------*/
+
+#ifndef rotr_32
+constexpr uint32_t rotr_32(uint32_t val, int shift)
+{
+ shift &= 31;
+ if (shift)
+ return val >> shift | val << (32 - shift);
+ else
+ return val;
+}
+#endif
+
+
+/*-------------------------------------------------
+ rotl_64 - circularly shift a 64-bit value left
+ by the specified number of bits (modulo 64)
+-------------------------------------------------*/
+
+#ifndef rotl_64
+constexpr uint64_t rotl_64(uint64_t val, int shift)
+{
+ shift &= 63;
+ if (shift)
+ return val << shift | val >> (64 - shift);
+ else
+ return val;
+}
+#endif
+
+
+/*-------------------------------------------------
+ rotr_64 - circularly shift a 64-bit value right
+ by the specified number of bits (modulo 64)
+-------------------------------------------------*/
+
+#ifndef rotr_64
+constexpr uint64_t rotr_64(uint64_t val, int shift)
+{
+ shift &= 63;
+ if (shift)
+ return val >> shift | val << (64 - shift);
+ else
+ return val;
+}
+#endif
+
+
/***************************************************************************
INLINE TIMING FUNCTIONS
***************************************************************************/