summaryrefslogtreecommitdiffstatshomepage
diff options
context:
space:
mode:
author Vas Crabb <cuavas@users.noreply.github.com>2016-11-19 08:37:00 +1100
committer GitHub <noreply@github.com>2016-11-19 08:37:00 +1100
commit539196cd977a37ff43c93eaeda3acf91455018a7 (patch)
tree2f163975cf92f6fe5a7bce9e4dbc4a43d5a0f370
parent197feb0ecddd660ae62ef2547e1887087f122048 (diff)
parent75b2632fa8d17701de4d7846f095a1b423219227 (diff)
Merge pull request #1743 from Happy-yappH/master
n64: Revert AI / VI timing changes. Redo change to AI length register.
-rw-r--r--src/mame/drivers/n64.cpp2
-rw-r--r--src/mame/machine/n64.cpp20
2 files changed, 6 insertions, 16 deletions
diff --git a/src/mame/drivers/n64.cpp b/src/mame/drivers/n64.cpp
index 4be88ddb49a..53b0bfcf0f0 100644
--- a/src/mame/drivers/n64.cpp
+++ b/src/mame/drivers/n64.cpp
@@ -441,7 +441,7 @@ static MACHINE_CONFIG_START( n64, n64_mess_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
/* Video DACRATE is for quarter pixels, so the horizontal is also given in quarter pixels. However, the horizontal and vertical timing and sizing is adjustable by register and will be reset when the registers are written. */
- MCFG_SCREEN_RAW_PARAMS(DACRATE_NTSC,3093,0,3093,525,0,525)
+ MCFG_SCREEN_RAW_PARAMS(DACRATE_NTSC*2,3093,0,3093,525,0,525)
//MCFG_SCREEN_REFRESH_RATE(60)
//MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
//MCFG_SCREEN_SIZE(640, 525)
diff --git a/src/mame/machine/n64.cpp b/src/mame/machine/n64.cpp
index 57fca3a602d..2e38a7e2815 100644
--- a/src/mame/machine/n64.cpp
+++ b/src/mame/machine/n64.cpp
@@ -215,8 +215,6 @@ void n64_periphs::device_reset()
si_dma_dir = 0;
si_dma_timer->adjust(attotime::never);
- //memset(m_save_data.eeprom, 0, 2048);
-
dp_clock = 0;
cic_status = 0;
@@ -995,7 +993,7 @@ void n64_periphs::vi_recalculate_resolution()
rectangle visarea = m_screen->visible_area();
// DACRATE is the quarter pixel clock and period will be for a field, not a frame
- attoseconds_t period = (vi_hsync & 0xfff) * (vi_vsync & 0xfff) * HZ_TO_ATTOSECONDS(DACRATE_NTSC);
+ attoseconds_t period = (vi_hsync & 0xfff) * (vi_vsync & 0xfff) * HZ_TO_ATTOSECONDS(DACRATE_NTSC) / 2;
if (width == 0 || height == 0 || (vi_control & 3) == 0)
{
@@ -1205,7 +1203,6 @@ void n64_periphs::ai_fifo_push(uint32_t address, uint32_t length)
if (! (ai_status & 0x40000000))
{
- //signal_rcp_interrupt(AI_INTERRUPT);
ai_dma();
}
}
@@ -1228,7 +1225,6 @@ void n64_periphs::ai_fifo_pop()
if (ai_fifo_num < AUDIO_DMA_DEPTH)
{
ai_status &= ~0x80000001; // FIFO not full
- //signal_rcp_interrupt(AI_INTERRUPT);
}
}
@@ -1268,7 +1264,7 @@ void n64_periphs::ai_dma()
ai_status |= 0x40000000;
// adjust the timer
- period = attotime::from_hz(DACRATE_NTSC) * (ai_dacrate + 1) * (current->length / 2);
+ period = attotime::from_hz(DACRATE_NTSC) * (ai_dacrate + 1) * (current->length / 4);
ai_timer->adjust(period);
}
@@ -1302,14 +1298,12 @@ READ32_MEMBER( n64_periphs::ai_reg_r )
{
if (ai_status & 0x40000000)
{
- double secs_left = (ai_timer->expire() - machine().time()).as_double();
- ret = 2 * (uint32_t)(secs_left * (double)DACRATE_NTSC / (double)(ai_dacrate + 1));
+ ret = 4 * (uint32_t)(ai_timer->remaining().as_double() * (double)DACRATE_NTSC / (double)(ai_dacrate + 1));
}
else if (ai_status & 0x80000001)
{
ret = ai_len;
}
-
else
{
ret = 0;
@@ -1340,12 +1334,12 @@ WRITE32_MEMBER( n64_periphs::ai_reg_w )
break;
case 0x04/4: // AI_LEN_REG
- ai_len = data & 0x3fff8; // Hardware v2.0 has 18 bits, v1.0 has 15 bits
+ ai_len = data & 0x3ffff; // Hardware v2.0 has 18 bits, v1.0 has 15 bits
ai_fifo_push(ai_dram_addr, ai_len);
break;
case 0x08/4: // AI_CONTROL_REG
- ai_control = data & 1;
+ ai_control = data;
break;
case 0x0c/4:
@@ -1374,7 +1368,6 @@ WRITE32_MEMBER( n64_periphs::ai_reg_w )
TIMER_CALLBACK_MEMBER(n64_periphs::pi_dma_callback)
{
pi_dma_tick();
- //m_rsp->yield();
}
void n64_periphs::pi_dma_tick()
@@ -1554,7 +1547,6 @@ WRITE32_MEMBER( n64_periphs::pi_reg_w )
attotime dma_period = attotime::from_hz(93750000) * (int)((float)(pi_rd_len + 1) * 5.08f); // Measured as between 2.53 cycles per byte and 2.55 cycles per byte
pi_dma_timer->adjust(dma_period);
- //pi_dma_tick();
break;
}
@@ -1567,8 +1559,6 @@ WRITE32_MEMBER( n64_periphs::pi_reg_w )
attotime dma_period = attotime::from_hz(93750000) * (int)((float)(pi_wr_len + 1) * 5.08f); // Measured as between 2.53 cycles per byte and 2.55 cycles per byte
pi_dma_timer->adjust(dma_period);
-
- //pi_dma_tick();
break;
}