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authorGravatarGravatar Vas Crabb <vas@vastheman.com>2019-09-22 13:34:40 +1000
committerGravatarGravatar Vas Crabb <vas@vastheman.com>2019-09-22 13:34:40 +1000
commit5036387ab45d9ecf499074dd5157542f3f100881 (patch)
treec78dcaeb2f06983dc85a1f800b88e62b8a4291f4
parent1b7b678f402475f574af6da081c464806d7e012e (diff)
srcclean (nw)
-rw-r--r--hash/archimedes.xml14
-rw-r--r--hash/vgmplay.xml2
-rw-r--r--hash/vsmile_cart.xml2
-rw-r--r--scripts/src/osd/mac.lua2
-rw-r--r--scripts/src/osd/mac_cfg.lua2
-rw-r--r--src/devices/bus/spectrum/beta.cpp138
-rw-r--r--src/devices/bus/spectrum/beta.h2
-rw-r--r--src/devices/bus/spectrum/beta128.cpp38
-rw-r--r--src/devices/bus/ti99/internal/genkbd.cpp70
-rw-r--r--src/devices/bus/ti99/internal/genkbd.h20
-rw-r--r--src/devices/cpu/tms34010/34010ops.hxx6
-rw-r--r--src/devices/machine/68561mpcc.cpp2
-rw-r--r--src/devices/machine/acorn_vidc.cpp90
-rw-r--r--src/devices/machine/acorn_vidc.h16
-rw-r--r--src/devices/machine/i8251.cpp2
-rw-r--r--src/devices/machine/vr0uart.cpp20
-rw-r--r--src/devices/machine/vrender0.cpp20
-rw-r--r--src/devices/machine/vrender0.h22
-rw-r--r--src/devices/machine/wd1000.cpp2
-rw-r--r--src/devices/video/imagetek_i4100.cpp2
-rw-r--r--src/devices/video/mc6845.cpp4
-rw-r--r--src/devices/video/vrender0.cpp18
-rw-r--r--src/devices/video/vrender0.h20
-rw-r--r--src/emu/emupal.cpp2
-rw-r--r--src/emu/natkeyboard.h4
-rw-r--r--src/emu/video/generic.cpp12
-rw-r--r--src/lib/netlist/plib/pfmtlog.h12
-rw-r--r--src/lib/netlist/plib/pparser.h44
-rw-r--r--src/lib/netlist/plib/pstring.h10
-rw-r--r--src/lib/netlist/prg/nltool.cpp2
-rw-r--r--src/mame/drivers/aa310.cpp10
-rw-r--r--src/mame/drivers/aristmk5.cpp456
-rw-r--r--src/mame/drivers/at.cpp42
-rw-r--r--src/mame/drivers/cps1.cpp14
-rw-r--r--src/mame/drivers/cps3.cpp226
-rw-r--r--src/mame/drivers/crospuzl.cpp70
-rw-r--r--src/mame/drivers/crystal.cpp32
-rw-r--r--src/mame/drivers/h01x.cpp28
-rw-r--r--src/mame/drivers/hh_sm510.cpp2
-rw-r--r--src/mame/drivers/ibmpc.cpp4
-rw-r--r--src/mame/drivers/icebox.cpp4
-rw-r--r--src/mame/drivers/igspoker.cpp6
-rw-r--r--src/mame/drivers/marineb.cpp16
-rw-r--r--src/mame/drivers/menghong.cpp38
-rw-r--r--src/mame/drivers/midvunit.cpp4
-rw-r--r--src/mame/drivers/namcos2.cpp2
-rw-r--r--src/mame/drivers/pc.cpp8
-rw-r--r--src/mame/drivers/pmd85.cpp8
-rw-r--r--src/mame/drivers/psattack.cpp10
-rw-r--r--src/mame/drivers/saitek_mark5.cpp2
-rw-r--r--src/mame/drivers/segac2.cpp8
-rw-r--r--src/mame/drivers/sm7238.cpp2
-rw-r--r--src/mame/drivers/trivrus.cpp10
-rw-r--r--src/mame/includes/archimds.h2
-rw-r--r--src/mame/machine/archimds.cpp22
-rw-r--r--src/mame/machine/saa7191.cpp8
-rw-r--r--src/mame/machine/saa7191.h6
-rw-r--r--src/mame/machine/segabill.cpp24
-rw-r--r--src/mame/machine/segacrp2_device.cpp2
-rw-r--r--src/mame/machine/vino.cpp18
-rw-r--r--src/mame/machine/vino.h2
-rw-r--r--src/mame/mame.lst90
-rw-r--r--src/mame/video/deco_mlc.cpp2
-rw-r--r--src/mame/video/segaic24.cpp2
-rw-r--r--src/osd/modules/lib/osdlib.h2
-rw-r--r--src/osd/modules/monitor/monitor_mac.cpp6
66 files changed, 894 insertions, 894 deletions
diff --git a/hash/archimedes.xml b/hash/archimedes.xml
index db823474f83..76e51fb923d 100644
--- a/hash/archimedes.xml
+++ b/hash/archimedes.xml
@@ -4,8 +4,8 @@
<softwarelist name="archimedes" description="Acorn Archimedes floppy images">
<!-- Notes of interest -->
-<!--
- - "Missing SWI $401c0" means that it needs RISCOS 3.10
+<!--
+ - "Missing SWI $401c0" means that it needs RISCOS 3.10
-->
<!-- Games -->
@@ -494,7 +494,7 @@ Zelanites: The Onslaught by Micro Power (RiscOS2)
</dataarea>
</part>
</software>
-
+
<!-- boot OK -->
<software name="bigbang" supported="yes">
<description>Big Bang</description>
@@ -1351,7 +1351,7 @@ Zelanites: The Onslaught by Micro Power (RiscOS2)
</part>
</software>
- <!-- "Disc error", launcher has no icon? -->
+ <!-- "Disc error", launcher has no icon? -->
<software name="ftt" supported="no">
<description>FTT</description>
<year>1994</year>
@@ -2359,7 +2359,7 @@ Zelanites: The Onslaught by Micro Power (RiscOS2)
</dataarea>
</part>
</software>
-
+
<!-- reports 0 bytes of applications workspace, title screen is blackened, gameplay has flickering vertical scroll (mid-frame raster?) -->
<software name="quazer" supported="no">
<description>Quazer (v2.00)</description>
@@ -2443,7 +2443,7 @@ Zelanites: The Onslaught by Micro Power (RiscOS2)
</part>
</software>
- <!-- boot OK but flickers like mad due of incorrect raster effects, also seems very slow with timing on gameplay even on A5000 class machine -->
+ <!-- boot OK but flickers like mad due of incorrect raster effects, also seems very slow with timing on gameplay even on A5000 class machine -->
<software name="rotoros3" cloneof="rotor" supported="no">
<description>Rotor (Patched RiscOS3)</description>
<year>1989</year>
@@ -3106,7 +3106,7 @@ Zelanites: The Onslaught by Micro Power (RiscOS2)
</dataarea>
</part>
</software>
-
+
<!-- Has trainer and copy protection? -->
<software name="zool">
<description>Zool</description>
diff --git a/hash/vgmplay.xml b/hash/vgmplay.xml
index 915b28c1080..02fe83368bc 100644
--- a/hash/vgmplay.xml
+++ b/hash/vgmplay.xml
@@ -233405,7 +233405,7 @@
</dataarea>
</part>
</software>
-
+
<!-- Project.org 2612 VGM Archives located at http://project2612.org/list.php
Also https://archive.org/details/Project2612CompleteArchive20180623681Sets.7z -->
diff --git a/hash/vsmile_cart.xml b/hash/vsmile_cart.xml
index fdb8782926b..132efb95017 100644
--- a/hash/vsmile_cart.xml
+++ b/hash/vsmile_cart.xml
@@ -1799,7 +1799,7 @@ V.Smile Smartbook Smartidges (need a Smartbook touch tablet connected to a regul
</dataarea>
</part>
</software>
-
+
<!-- No inputs, uses a dance mat controller -->
<software name="jamgymg" supported="no"> <!-- Will be clone of "jamgym" once found and dumped. -->
<description>V.Smile Tanz Mit Center (Germany)</description>
diff --git a/scripts/src/osd/mac.lua b/scripts/src/osd/mac.lua
index 5a732cbc825..1110dbda9f1 100644
--- a/scripts/src/osd/mac.lua
+++ b/scripts/src/osd/mac.lua
@@ -171,5 +171,5 @@ project ("ocore_" .. _OPTIONS["osd"])
MAME_DIR .. "src/osd/modules/file/posixptty.cpp",
MAME_DIR .. "src/osd/modules/file/posixsocket.cpp",
}
-
+
diff --git a/scripts/src/osd/mac_cfg.lua b/scripts/src/osd/mac_cfg.lua
index f16763089ee..76f0ac4ac1b 100644
--- a/scripts/src/osd/mac_cfg.lua
+++ b/scripts/src/osd/mac_cfg.lua
@@ -4,7 +4,7 @@
dofile('modules.lua')
forcedincludes {
--- MAME_DIR .. "src/osd/sdl/sdlprefix.h"
+-- MAME_DIR .. "src/osd/sdl/sdlprefix.h"
}
if not _OPTIONS["DONT_USE_NETWORK"] then
diff --git a/src/devices/bus/spectrum/beta.cpp b/src/devices/bus/spectrum/beta.cpp
index e713b548a0e..c171f54cd33 100644
--- a/src/devices/bus/spectrum/beta.cpp
+++ b/src/devices/bus/spectrum/beta.cpp
@@ -3,79 +3,79 @@
/*********************************************************************
Technology Research Beta Disk interface & clones
- these are designed for the 48k Spectrum models
+ these are designed for the 48k Spectrum models
- There are multiple versions of this
+ There are multiple versions of this
- 'hand made' PCB with V2 ROM:
- - possible prototype / low production run
- - 4k ROM
- - FORMAT, COPY etc. must be loaded from a disk to be used
- - disks are password protected
- - uses 1771 disk controller
- https://www.youtube.com/watch?v=gSJIuZjbFYs
+ 'hand made' PCB with V2 ROM:
+ - possible prototype / low production run
+ - 4k ROM
+ - FORMAT, COPY etc. must be loaded from a disk to be used
+ - disks are password protected
+ - uses 1771 disk controller
+ https://www.youtube.com/watch?v=gSJIuZjbFYs
- Original Beta Disk release with V3 ROM:
- - same features as above
- - uses a 1793 controller
+ Original Beta Disk release with V3 ROM:
+ - same features as above
+ - uses a 1793 controller
- Re-release dubbed "Beta Disk plus" with V4 ROM:
- - many operations moved into a larger capacity (8k) ROM rather
- than requiring a utility disk
- - uses a 1793 controller
- - adds 'magic button' to dump the running state of the machine
- to disk
- - disk password system removed
+ Re-release dubbed "Beta Disk plus" with V4 ROM:
+ - many operations moved into a larger capacity (8k) ROM rather
+ than requiring a utility disk
+ - uses a 1793 controller
+ - adds 'magic button' to dump the running state of the machine
+ to disk
+ - disk password system removed
- Many clones exist, some specific to the various Spectrum clones.
- (not yet added)
+ Many clones exist, some specific to the various Spectrum clones.
+ (not yet added)
- Original Beta Disk (V3) clones
- - Sandy FDD2 SP-DOS
- - AC DOS P.Z.APINA
+ Original Beta Disk (V3) clones
+ - Sandy FDD2 SP-DOS
+ - AC DOS P.Z.APINA
- Beta Disk plus (V4) clones
- - CAS DOS Cheyenne Advanced System
- - CBI-95
- - SYNCHRON IDS91
- - SYNCHRON IDS2001ne
- - ARCADE AR-20
- - Vision Desktop Betadisk
+ Beta Disk plus (V4) clones
+ - CAS DOS Cheyenne Advanced System
+ - CBI-95
+ - SYNCHRON IDS91
+ - SYNCHRON IDS2001ne
+ - ARCADE AR-20
+ - Vision Desktop Betadisk
- Some units also exist that allow population of both V3 and V4
- ROM types with a switch (unofficial, for compatibility?)
+ Some units also exist that allow population of both V3 and V4
+ ROM types with a switch (unofficial, for compatibility?)
- ---
+ ---
- NOTE:
+ NOTE:
- ROMs really need verifying, real dumps appear to be bitswapped
- on original boards, so we're using those ones where possible,
- however sizes are unconfirmed (some sources state that the data
- is duplicated across the 16k in ROM, others state it just mirrors
- in memory) and some might be modified or bad.
+ ROMs really need verifying, real dumps appear to be bitswapped
+ on original boards, so we're using those ones where possible,
+ however sizes are unconfirmed (some sources state that the data
+ is duplicated across the 16k in ROM, others state it just mirrors
+ in memory) and some might be modified or bad.
- beta128.cpp could be modified to expand on this, as it builds
- on the features of the betaplus, but for now I've kept them
- separate as the enable / disable mechanisms are different and
- remaining mappings of devices unconfirmed
+ beta128.cpp could be modified to expand on this, as it builds
+ on the features of the betaplus, but for now I've kept them
+ separate as the enable / disable mechanisms are different and
+ remaining mappings of devices unconfirmed
- ---
+ ---
- Based on older BDI schematics, it seems the logic is like:
+ Based on older BDI schematics, it seems the logic is like:
- memory access 0x3CXX (any type of access: code or data, read or write) -> temporary use BDI ROM (NOT permanent latch/switch like in beta128)
- memory access <0x4000 area and BDI ROM_latch==true -> use BDI ROM
-
- IO write to port 0bxxxxxx00 -> D7 master_latch, 0=enable, 1=disable
+ memory access 0x3CXX (any type of access: code or data, read or write) -> temporary use BDI ROM (NOT permanent latch/switch like in beta128)
+ memory access <0x4000 area and BDI ROM_latch==true -> use BDI ROM
- while master_latch is enabled access to regular Spectrum IO is blocked (output /IORQ forced to 1) but enabled BDI ports:
+ IO write to port 0bxxxxxx00 -> D7 master_latch, 0=enable, 1=disable
- IO write to port 0b1xxxx111 -> D7 BDI ROM_latch (0=enable, 1=disble), D6 - FDC DDEN, D4 - SIDE, D3 - FDC HLT, D2 - FDC /MR (reset), D0-1 - floppy drive select.
- IO read port 0b1xxxx111 <- D7 - FDC INTRQ, D6 - FDC DRQ
- IO read/write ports 0b0YYxx111 - access FDC ports YY
+ while master_latch is enabled access to regular Spectrum IO is blocked (output /IORQ forced to 1) but enabled BDI ports:
- So mostly the same as beta128, except for new BDI ROM_latch bit
+ IO write to port 0b1xxxx111 -> D7 BDI ROM_latch (0=enable, 1=disble), D6 - FDC DDEN, D4 - SIDE, D3 - FDC HLT, D2 - FDC /MR (reset), D0-1 - floppy drive select.
+ IO read port 0b1xxxx111 <- D7 - FDC INTRQ, D6 - FDC DRQ
+ IO read/write ports 0b0YYxx111 - access FDC ports YY
+
+ So mostly the same as beta128, except for new BDI ROM_latch bit
*********************************************************************/
@@ -140,11 +140,11 @@ ROM_START(betav3)
ROM_RELOAD(0x1000,0x1000)
ROM_RELOAD(0x2000,0x1000)
ROM_RELOAD(0x3000,0x1000)
-// ROM_SYSTEM_BIOS(1, "trd30a", "TR-DOS v3.0 (set 2)")
-// ROMX_LOAD("trd30_alt.bin", 0x0000, 0x1000, CRC(48f9149f) SHA1(52774757096fdc93ea94c55306481f6f41204e96), ROM_BIOS(1))
-// ROM_RELOAD(0x1000,0x1000)
-// ROM_RELOAD(0x2000,0x1000)
-// ROM_RELOAD(0x3000,0x1000)
+// ROM_SYSTEM_BIOS(1, "trd30a", "TR-DOS v3.0 (set 2)")
+// ROMX_LOAD("trd30_alt.bin", 0x0000, 0x1000, CRC(48f9149f) SHA1(52774757096fdc93ea94c55306481f6f41204e96), ROM_BIOS(1))
+// ROM_RELOAD(0x1000,0x1000)
+// ROM_RELOAD(0x2000,0x1000)
+// ROM_RELOAD(0x3000,0x1000)
ROM_SYSTEM_BIOS(1, "trd30p", "TR-DOS v3.0 (set 2, Profisoft)") // is this a clone device?
ROMX_LOAD("trd30ps.bin", 0x0000, 0x1000, CRC(b0f175a3) SHA1(ac95bb4d89072224deef58a1655e8029f811a7fa), ROM_BIOS(1))
ROM_RELOAD(0x1000,0x1000)
@@ -282,7 +282,7 @@ void spectrum_betav2_device::device_reset()
// always paged in on boot? (no mode switch like beta128)
m_romcs = 1;
m_romlatch = 0;
-// m_masterportdisable = 1;
+// m_masterportdisable = 1;
}
//**************************************************************************
@@ -302,7 +302,7 @@ void spectrum_betav2_device::fetch(offs_t offset)
m_romcs = 1;
else
m_romcs = 0;
-
+
if (!m_romlatch)
{
if (offset < 0x4000)
@@ -327,9 +327,9 @@ uint8_t spectrum_betav2_device::iorq_r(offs_t offset)
{
uint8_t data = m_exp->iorq_r(offset);
-// if (!m_masterportdisable)
+// if (!m_masterportdisable)
if (m_romcs)
- {
+ {
switch (offset & 0xff)
{
case 0x1f: case 0x3f: case 0x5f: case 0x7f:
@@ -349,12 +349,12 @@ uint8_t spectrum_betav2_device::iorq_r(offs_t offset)
void spectrum_betav2_device::iorq_w(offs_t offset, uint8_t data)
{
-// if ((offset & 0x03) == 0x00)
-// {
-// m_masterportdisable = data & 0x80;
-// }
+// if ((offset & 0x03) == 0x00)
+// {
+// m_masterportdisable = data & 0x80;
+// }
-// if (!m_masterportdisable)
+// if (!m_masterportdisable)
if (m_romcs)
{
switch (offset & 0xff)
diff --git a/src/devices/bus/spectrum/beta.h b/src/devices/bus/spectrum/beta.h
index d9b1d8e914e..f713b408095 100644
--- a/src/devices/bus/spectrum/beta.h
+++ b/src/devices/bus/spectrum/beta.h
@@ -55,7 +55,7 @@ protected:
int m_romcs;
int m_romlatch;
-// int m_masterportdisable;
+// int m_masterportdisable;
void fetch(offs_t offset);
};
diff --git a/src/devices/bus/spectrum/beta128.cpp b/src/devices/bus/spectrum/beta128.cpp
index f034016a85e..a2240da737c 100644
--- a/src/devices/bus/spectrum/beta128.cpp
+++ b/src/devices/bus/spectrum/beta128.cpp
@@ -4,31 +4,31 @@
Technology Research Beta 128 Disk interface
- This hardware type runs TR-DOS 5.xx (official) and newer
- unofficial updates. It was designed to work properly with
- the 128k machines that had issues with the original Beta Disk
- due to changes in the 128k ROM structure etc. (enable address
- is moved from 3cxx to 3dxx for example)
+ This hardware type runs TR-DOS 5.xx (official) and newer
+ unofficial updates. It was designed to work properly with
+ the 128k machines that had issues with the original Beta Disk
+ due to changes in the 128k ROM structure etc. (enable address
+ is moved from 3cxx to 3dxx for example)
- Issues:
+ Issues:
- Using the FD1793 device a 'CAT' operation in the 'spectrum' driver
- will always report 'No Disk' but using the Soviet clone KR1818VG93
- it properly gives the disk catalogue. Despite this files can still
- be loaded from disk.
+ Using the FD1793 device a 'CAT' operation in the 'spectrum' driver
+ will always report 'No Disk' but using the Soviet clone KR1818VG93
+ it properly gives the disk catalogue. Despite this files can still
+ be loaded from disk.
- The 128k Spectrum drivers have a similar issues, although even if
- you replace the controller doing a 'CAT' operation seems to have
- an adverse effect on the system memory setup as things become
- corrupt (LOADing or MERGEing a program afterwards can cause a reset)
+ The 128k Spectrum drivers have a similar issues, although even if
+ you replace the controller doing a 'CAT' operation seems to have
+ an adverse effect on the system memory setup as things become
+ corrupt (LOADing or MERGEing a program afterwards can cause a reset)
- Neither of these issues occur in other Spectrum emulators using
- the same ROMs and floppy images.
+ Neither of these issues occur in other Spectrum emulators using
+ the same ROMs and floppy images.
- TODO:
+ TODO:
- there were many unofficial ROMs available for this, make them
- available for use.
+ there were many unofficial ROMs available for this, make them
+ available for use.
*********************************************************************/
diff --git a/src/devices/bus/ti99/internal/genkbd.cpp b/src/devices/bus/ti99/internal/genkbd.cpp
index 072ad1f6cb6..92f0e34b66b 100644
--- a/src/devices/bus/ti99/internal/genkbd.cpp
+++ b/src/devices/bus/ti99/internal/genkbd.cpp
@@ -3,27 +3,27 @@
/**********************************************************************
Geneve 9640 101-key XT/AT keyboard (High-level emulation)
-
+
Geneves may use any XT keyboard; some were delivered with a 101-key XT/AT
keyboard.
This is a high-level emulation in the sense that it is only emulated
from its behavior, not from its actual chipset. This will be done as
- soon as we have a ROM dump.
-
+ soon as we have a ROM dump.
+
Although the keyboard is switchable between XT and AT mode, we will
only emulate the XT mode here.
-
+
The code is copied from the previous implementation in genboard.cpp
and appropriately adapted to use the pc_kbd interface.
The XT keyboard interface is described in various places on the internet.
- It does not comply with the PS2 protocol. The keyboard transmits 8-bit
- scancodes serially with one (1) or two (0,1) start bits, LSB to MSB,
- no parity and no stop bits. Each bit is read into the shift register
+ It does not comply with the PS2 protocol. The keyboard transmits 8-bit
+ scancodes serially with one (1) or two (0,1) start bits, LSB to MSB,
+ no parity and no stop bits. Each bit is read into the shift register
when the clock line is pulled low by the keyboard.
-
- MZ, August 2019
+
+ MZ, August 2019
****************************************************************************/
@@ -204,7 +204,7 @@ geneve_xt_101_hle_keyboard_device::geneve_xt_101_hle_keyboard_device(const machi
}
/*
- Called by the poll timer
+ Called by the poll timer
*/
void geneve_xt_101_hle_keyboard_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
@@ -218,14 +218,14 @@ void geneve_xt_101_hle_keyboard_device::device_timer(emu_timer &timer, device_ti
if (id==1)
{
// Send timer
- if (m_shift_count==10)
+ if (m_shift_count==10)
{
// Done, all sent
m_pc_kbdc->clock_write_from_kb(1);
m_pc_kbdc->data_write_from_kb(1);
m_send_timer->reset();
m_shift_count = 0;
-
+
// Adjust the queue
m_queue_head = (m_queue_head + 1) % KEYQUEUESIZE;
m_queue_length--;
@@ -244,7 +244,7 @@ void geneve_xt_101_hle_keyboard_device::device_timer(emu_timer &timer, device_ti
/*
- Translations
+ Translations
*/
static const uint8_t MF1_CODE[0xe] =
{
@@ -252,19 +252,19 @@ static const uint8_t MF1_CODE[0xe] =
0x1c, // KP Enter -> Return
0x1d, // RCtrl -> LCtrl
0x38, // AltGr -> LAlt
-
+
// Extended key that is equivalent to a non-extended key with shift off
0x35, // KP / -> /
// Extended keys that are equivalent to non-extended keys with numlock off
0x47, // Home -> KP 7 (Home)
0x48, // Up -> KP 8 (Up)
- 0x49, // Page up -> KP 9 (PgUp)
+ 0x49, // Page up -> KP 9 (PgUp)
0x4b, // Left -> KP 4 (Left)
0x4d, // Right -> KP 6 (Right)
0x4f, // End -> KP 1 (End)
0x50, // Down -> KP 2 (Down)
- 0x51, // Page dn -> KP 3 (PgDn)
+ 0x51, // Page dn -> KP 3 (PgDn)
0x52, // Insert -> KP 0 (Ins)
0x53 // Delete -> KP . (Del)
};
@@ -314,7 +314,7 @@ void geneve_xt_101_hle_keyboard_device::poll()
// We are here because the set of pressed keys has changed
// In the case that we have a fake shift/unshift,
// we have to release it.
-
+
if (m_fake_shift_state)
{
/* Fake shift release */
@@ -329,7 +329,7 @@ void geneve_xt_101_hle_keyboard_device::poll()
post_in_key_queue(0x2a);
m_fake_unshift_state = false;
}
-
+
switch (keycode)
{
case 0x2a:
@@ -356,7 +356,7 @@ void geneve_xt_101_hle_keyboard_device::poll()
default:
break;
}
-
+
// Extended keycodes
if ((keycode >= 0x60) && (keycode < 0x6e))
{
@@ -364,14 +364,14 @@ void geneve_xt_101_hle_keyboard_device::poll()
{
// Handle shift state
if (keycode == 0x63) // Slash
- {
+ {
if (m_left_shift || m_right_shift)
{
// Fake shift unpress
m_fake_unshift_state = true;
}
}
- else
+ else
{ // Key function with NumLock=0
if (m_numlock && (!m_left_shift) && (!m_right_shift))
{
@@ -381,7 +381,7 @@ void geneve_xt_101_hle_keyboard_device::poll()
else
{
if ((!m_numlock) && (m_left_shift || m_right_shift))
- {
+ {
// Fake shift unpress if shift is down
m_fake_unshift_state = true;
}
@@ -411,7 +411,7 @@ void geneve_xt_101_hle_keyboard_device::poll()
{
// Emulate Print Screen / System Request (F13) key
// this is a bit complex, as Alt+PrtScr -> SysRq
- // Additionally, Ctrl+PrtScr involves no fake shift press
+ // Additionally, Ctrl+PrtScr involves no fake shift press
if (m_left_alt || m_altgr)
{
// SysRq
@@ -428,7 +428,7 @@ void geneve_xt_101_hle_keyboard_device::poll()
post_in_key_queue(0x2a);
m_fake_shift_state = true;
}
-
+
keycode = 0x37;
if (!pressed) keycode |= 0x80;
post_in_key_queue(0xe0);
@@ -437,11 +437,11 @@ void geneve_xt_101_hle_keyboard_device::poll()
}
else
{
- if (keycode == 0x6f)
+ if (keycode == 0x6f)
{
// Emulate pause (F15) key
// This is a bit complex, as Pause -> Ctrl+NumLock and
- // Ctrl+Pause -> Ctrl+ScrLock.
+ // Ctrl+Pause -> Ctrl+ScrLock.
// Furthermore, there is no repeat or release.
if (pressed)
{
@@ -470,26 +470,26 @@ void geneve_xt_101_hle_keyboard_device::poll()
}
}
}
-
+
}
mask <<= 1;
}
}
}
-
+
// Implement auto repeat
if (m_autorepeat_code != 0)
{
m_autorepeat_timer--;
if ((m_autorepeat_timer == 0) && (m_queue_length <= (KEYQUEUESIZE-MAXKEYMSGLENGTH)))
- {
+ {
// Extended code
if ((m_autorepeat_code >= 0x60) && (m_autorepeat_code < 0x6e))
{
post_in_key_queue(0xe0);
post_in_key_queue(MF1_CODE[m_autorepeat_code-0x60]);
}
- else
+ else
{
if (m_autorepeat_code == 0x6e)
{
@@ -503,7 +503,7 @@ void geneve_xt_101_hle_keyboard_device::poll()
post_in_key_queue(0x37); // PrtScr
}
}
- else
+ else
{
if (m_autorepeat_code != 0x6f) // Pause cannot do an auto-repeat
{
@@ -537,8 +537,8 @@ void geneve_xt_101_hle_keyboard_device::send_key()
{
LOGMASKED(LOG_TRANSFER, "Send keycode %02x\n", m_queue[m_queue_head]);
// Get the next key, add the two start bits to the right (0,1)
- m_shift_reg = (m_queue[m_queue_head] << 2) | 0x02;
- m_send_timer->adjust(attotime::from_usec(1), 0, attotime::from_hz(10000));
+ m_shift_reg = (m_queue[m_queue_head] << 2) | 0x02;
+ m_send_timer->adjust(attotime::from_usec(1), 0, attotime::from_hz(10000));
}
}
else
@@ -637,10 +637,10 @@ WRITE_LINE_MEMBER( geneve_xt_101_hle_keyboard_device::reset_line )
m_fake_shift_state = false;
m_fake_unshift_state = false;
m_autorepeat_code = 0;
-
+
m_shift_reg = 0;
m_shift_count = 0;
-
+
// Send the BAT (Basic assurance test) OK value (AA)
post_in_key_queue(0xaa);
}
diff --git a/src/devices/bus/ti99/internal/genkbd.h b/src/devices/bus/ti99/internal/genkbd.h
index 76ebb02ed40..78d985a6160 100644
--- a/src/devices/bus/ti99/internal/genkbd.h
+++ b/src/devices/bus/ti99/internal/genkbd.h
@@ -2,7 +2,7 @@
// copyright-holders:Michael Zapf
/**********************************************************************
- Geneve 9640 101-key XT/AT keyboard (High-level emulation)
+ Geneve 9640 101-key XT/AT keyboard (High-level emulation)
*********************************************************************/
@@ -27,7 +27,7 @@ public:
// construction/destruction
geneve_xt_101_hle_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE_LINE_MEMBER( reset_line );
-
+
protected:
// device-level overrides
void device_start() override;
@@ -37,11 +37,11 @@ protected:
// device_pc_kbd_interface overrides
DECLARE_WRITE_LINE_MEMBER( clock_write ) override;
DECLARE_WRITE_LINE_MEMBER( data_write ) override;
-
+
private:
emu_timer *m_poll_timer;
emu_timer *m_send_timer;
-
+
void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
static constexpr unsigned KEYQUEUESIZE = 256;
@@ -52,9 +52,9 @@ private:
void poll();
void send_key();
void post_in_key_queue(int key);
-
+
required_ioport_array<8> m_keys;
-
+
int m_queue_length;
int m_queue_head;
uint8_t m_queue[KEYQUEUESIZE];
@@ -63,7 +63,7 @@ private:
int m_autorepeat_timer;
bool m_fake_shift_state;
bool m_fake_unshift_state;
-
+
bool m_left_shift;
bool m_right_shift;
bool m_left_ctrl;
@@ -71,13 +71,13 @@ private:
bool m_left_alt;
bool m_altgr;
bool m_numlock;
-
+
bool m_resetting;
-
+
line_state m_clock_line;
line_state m_data_line;
int m_reset_timer;
-
+
int m_shift_reg;
int m_shift_count;
};
diff --git a/src/devices/cpu/tms34010/34010ops.hxx b/src/devices/cpu/tms34010/34010ops.hxx
index f0dbd7994fb..8483e1891fb 100644
--- a/src/devices/cpu/tms34010/34010ops.hxx
+++ b/src/devices/cpu/tms34010/34010ops.hxx
@@ -2076,9 +2076,9 @@ void tms340x0_device::blmove(uint16_t op)
}
/*
- TODO: We do not currently emulate precisely how B0 and B2 are modified during the operation:
- if D == 0, then B0 and B2 remain fixed during execution and are only incremented after operation completes.
- if D == 1, then B2 is incremented during move, B0 remains fixed until operation completes.
+ TODO: We do not currently emulate precisely how B0 and B2 are modified during the operation:
+ if D == 0, then B0 and B2 remain fixed during execution and are only incremented after operation completes.
+ if D == 1, then B2 is incremented during move, B0 remains fixed until operation completes.
*/
BREG(0) = src;
diff --git a/src/devices/machine/68561mpcc.cpp b/src/devices/machine/68561mpcc.cpp
index 364d9038bcb..3bbd73ac990 100644
--- a/src/devices/machine/68561mpcc.cpp
+++ b/src/devices/machine/68561mpcc.cpp
@@ -1,4 +1,4 @@
-// license:BSD-3-Clause
+// license:BSD-3-Clause
// copyright-holders: Joakim Larsson Edstrom
/***************************************************************************
diff --git a/src/devices/machine/acorn_vidc.cpp b/src/devices/machine/acorn_vidc.cpp
index 97056c0b5a9..012ed9f9819 100644
--- a/src/devices/machine/acorn_vidc.cpp
+++ b/src/devices/machine/acorn_vidc.cpp
@@ -2,19 +2,19 @@
// copyright-holders:Angelo Salese, R. Belmont, Juergen Buchmueller
/**********************************************************************************************
- Acorn VIDC10 (VIDeo Controller) device chip
-
- based off legacy AA VIDC implementation by Angelo Salese, R. Belmont, Juergen Buchmueller
-
- TODO:
- - subclass screen_device, derive h/vsync signals out there;
- - improve timings for raster effects:
- * nebulus: 20 lines off with aa310;
- * lotustc2: abuses color flipping;
- * quazer: needs in-flight DMA;
- - improve sound DAC writes;
- - subclass this for VIDC20 emulation (RiscPC);
- - Are CRTC values correct? VGA modes have a +1 in display line;
+ Acorn VIDC10 (VIDeo Controller) device chip
+
+ based off legacy AA VIDC implementation by Angelo Salese, R. Belmont, Juergen Buchmueller
+
+ TODO:
+ - subclass screen_device, derive h/vsync signals out there;
+ - improve timings for raster effects:
+ * nebulus: 20 lines off with aa310;
+ * lotustc2: abuses color flipping;
+ * quazer: needs in-flight DMA;
+ - improve sound DAC writes;
+ - subclass this for VIDC20 emulation (RiscPC);
+ - Are CRTC values correct? VGA modes have a +1 in display line;
**********************************************************************************************/
@@ -56,7 +56,7 @@ acorn_vidc10_device::acorn_vidc10_device(const machine_config &mconfig, device_t
, device_memory_interface(mconfig, *this)
, device_palette_interface(mconfig, *this)
, device_video_interface(mconfig, *this)
- , m_space_config("regs_space", ENDIANNESS_LITTLE, 32, 8, 0, address_map_constructor(FUNC(acorn_vidc10_device::regs_map), this))
+ , m_space_config("regs_space", ENDIANNESS_LITTLE, 32, 8, 0, address_map_constructor(FUNC(acorn_vidc10_device::regs_map), this))
, m_lspeaker(*this, "lspeaker")
, m_rspeaker(*this, "rspeaker")
, m_dac(*this, "dac%u", 0)
@@ -97,7 +97,7 @@ void acorn_vidc10_device::device_add_mconfig(machine_config &config)
for (int i = 0; i < m_sound_max_channels; i++)
{
// custom DAC
- DAC_16BIT_R2R_TWOS_COMPLEMENT(config, m_dac[i], 0).add_route(0, m_lspeaker, m_sound_input_gain).add_route(0, m_rspeaker, m_sound_input_gain);
+ DAC_16BIT_R2R_TWOS_COMPLEMENT(config, m_dac[i], 0).add_route(0, m_lspeaker, m_sound_input_gain).add_route(0, m_rspeaker, m_sound_input_gain);
vref.add_route(0, m_dac[i], 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, m_dac[i], -1.0, DAC_VREF_NEG_INPUT);
}
}
@@ -155,10 +155,10 @@ void acorn_vidc10_device::device_start()
save_pointer(NAME(m_data_vram), m_data_vram_size);
save_pointer(NAME(m_cursor_vram), m_cursor_vram_size);
save_pointer(NAME(m_stereo_image), m_sound_max_channels);
-
+
m_video_timer = timer_alloc(TIMER_VIDEO);
m_sound_timer = timer_alloc(TIMER_SOUND);
-
+
// generate u255 law lookup table
// cfr. page 48 of the VIDC20 manual, page 33 of the VIDC manual
// TODO: manual mentions a format difference between VIDC10 revisions
@@ -229,11 +229,11 @@ void acorn_vidc10_device::screen_dynamic_res_change()
// sanity checks
if (m_crtc_regs[CRTC_HCR] <= 1 || m_crtc_regs[CRTC_VCR] <= 1)
return;
-
+
if (m_crtc_regs[CRTC_HBER] <= 1 || m_crtc_regs[CRTC_VBER] <= 1)
return;
- // total cycles >= border end >= border start
+ // total cycles >= border end >= border start
if (m_crtc_regs[CRTC_HCR] < m_crtc_regs[CRTC_HBER])
return;
@@ -271,7 +271,7 @@ WRITE32_MEMBER( acorn_vidc10_device::write )
// TODO: check against mem_mask not 32-bit wide
uint8_t reg = data >> 24;
uint32_t val = data & 0xffffff;
-
+
this->space(AS_IO).write_dword(reg, val);
}
@@ -280,7 +280,7 @@ inline void acorn_vidc10_device::update_4bpp_palette(uint16_t index, uint32_t pa
int r,g,b;
// TODO: for TV Tuner we need to output this, also check if cursor mode actually sets this up for offset = 0
-// i = (paldata & 0x1000) >> 12; //supremacy bit
+// i = (paldata & 0x1000) >> 12; //supremacy bit
b = (paldata & 0x0f00) >> 8;
g = (paldata & 0x00f0) >> 4;
r = (paldata & 0x000f) >> 0;
@@ -293,7 +293,7 @@ WRITE32_MEMBER( acorn_vidc10_device::pal_data_display_w )
{
update_4bpp_palette(offset+0x100, data);
//printf("%02x: %01x %01x %01x [%d]\n",offset,r,g,b,screen().vpos());
-
+
// 8bpp
for(int idx=0;idx<0x100;idx+=0x10)
{
@@ -319,7 +319,7 @@ WRITE32_MEMBER( acorn_vidc10_device::control_w )
m_crtc_interlace = ((data & 0x40) >> 6);
//m_composite_sync = BIT(data, 7);
//m_test_mode = (data & 0xc100) != 0xc100;
-
+
//todo: vga/svga modes sets 0x1000?
screen_vblank_line_update();
screen_dynamic_res_change();
@@ -329,52 +329,52 @@ WRITE32_MEMBER( acorn_vidc10_device::crtc_w )
{
switch(offset)
{
- case CRTC_HCR: m_crtc_regs[CRTC_HCR] = ((data >> 14)<<1)+2; break;
-// case CRTC_HSWR: m_crtc_regs[CRTC_HSWR] = (data >> 14)+1; break;
- case CRTC_HBSR: m_crtc_regs[CRTC_HBSR] = ((data >> 14)<<1)+1; break;
- case CRTC_HDSR: m_crtc_regs[CRTC_HDSR] = (data >> 14); break;
- case CRTC_HDER: m_crtc_regs[CRTC_HDER] = (data >> 14); break;
- case CRTC_HBER: m_crtc_regs[CRTC_HBER] = ((data >> 14)<<1)+1; break;
+ case CRTC_HCR: m_crtc_regs[CRTC_HCR] = ((data >> 14)<<1)+2; break;
+// case CRTC_HSWR: m_crtc_regs[CRTC_HSWR] = (data >> 14)+1; break;
+ case CRTC_HBSR: m_crtc_regs[CRTC_HBSR] = ((data >> 14)<<1)+1; break;
+ case CRTC_HDSR: m_crtc_regs[CRTC_HDSR] = (data >> 14); break;
+ case CRTC_HDER: m_crtc_regs[CRTC_HDER] = (data >> 14); break;
+ case CRTC_HBER: m_crtc_regs[CRTC_HBER] = ((data >> 14)<<1)+1; break;
case CRTC_HCSR: m_crtc_regs[CRTC_HCSR] = ((data >> 13) & 0x7ff) + 6; return;
// case CRTC_HIR: // ...
- case CRTC_VCR: m_crtc_regs[CRTC_VCR] = (data >> 14)+1; break;
+ case CRTC_VCR: m_crtc_regs[CRTC_VCR] = (data >> 14)+1; break;
case CRTC_VSWR: m_crtc_regs[CRTC_VSWR] = (data >> 14)+1; break;
- case CRTC_VBSR:
+ case CRTC_VBSR:
m_crtc_regs[CRTC_VBSR] = (data >> 14)+1;
break;
- case CRTC_VDSR:
+ case CRTC_VDSR:
m_crtc_regs[CRTC_VDSR] = (data >> 14)+1;
break;
case CRTC_VDER:
m_crtc_regs[CRTC_VDER] = (data >> 14)+1;
screen_vblank_line_update();
break;
- case CRTC_VBER:
+ case CRTC_VBER:
m_crtc_regs[CRTC_VBER] = (data >> 14)+1;
break;
case CRTC_VCSR: m_crtc_regs[CRTC_VCSR] = ((data >> 14) & 0x3ff) + 1; return;
case CRTC_VCER: m_crtc_regs[CRTC_VCER] = ((data >> 14) & 0x3ff) + 1; return;
}
-
+
screen_dynamic_res_change();
}
inline void acorn_vidc10_device::refresh_stereo_image(uint8_t channel)
{
/*
- -111 full right
- -110 83% right, 17% left
- -101 67% right, 33% left
- -100 center
- -011 67% left, 33% right
- -010 83% left, 17% right
- -001 full left
- -000 "undefined" TODO: verify what it actually means
+ -111 full right
+ -110 83% right, 17% left
+ -101 67% right, 33% left
+ -100 center
+ -011 67% left, 33% right
+ -010 83% left, 17% right
+ -001 full left
+ -000 "undefined" TODO: verify what it actually means
*/
const float left_gain[8] = { 1.0, 2.0, 1.66, 1.34, 1.0, 0.66, 0.34, 0.0 };
const float right_gain[8] = { 1.0, 0.0, 0.34, 0.66, 1.0, 1.34, 1.66, 2.0 };
-
+
m_lspeaker->set_input_gain(channel,left_gain[m_stereo_image[channel]]*m_sound_input_gain);
m_rspeaker->set_input_gain(channel,right_gain[m_stereo_image[channel]]*m_sound_input_gain);
//printf("%d %f %f\n",channel,m_lspeaker->input_gain(channel),m_rspeaker->input_gain(channel));
@@ -401,7 +401,7 @@ WRITE32_MEMBER( acorn_vidc10_device::sound_frequency_w )
//**************************************************************************
void acorn_vidc10_device::write_dac(uint8_t channel, uint8_t data)
-{
+{
int16_t res;
res = m_ulaw_lookup[data];
m_dac[channel & 7]->write(res);
@@ -446,7 +446,7 @@ void acorn_vidc10_device::draw(bitmap_rgb32 &bitmap, const rectangle &cliprect,
{
u8 pen = vram[srcx + srcy * xsize];
int dstx = (srcx*xchar_size) + xstart;
-
+
for (int xi=0;xi<xchar_size;xi++)
{
u16 dot = ((pen>>(xi*pen_byte_size)) & pen_mask);
diff --git a/src/devices/machine/acorn_vidc.h b/src/devices/machine/acorn_vidc.h
index ff6cf0ecf11..7a73e6c277c 100644
--- a/src/devices/machine/acorn_vidc.h
+++ b/src/devices/machine/acorn_vidc.h
@@ -2,7 +2,7 @@
// copyright-holders:Angelo Salese, R. Belmont, Juergen Buchmueller
/***************************************************************************
- Acorn VIDC10 (VIDeo Controller) device chip
+ Acorn VIDC10 (VIDeo Controller) device chip
***************************************************************************/
@@ -49,7 +49,7 @@ public:
void update_sound_mode(bool state) { m_sound_mode = state; refresh_sound_frequency(); }
void set_cursor_enable(bool state) { m_cursor_enable = state; }
uint32_t get_cursor_size() { return (m_crtc_regs[CRTC_VCER] - m_crtc_regs[CRTC_VCSR]) * (32/4); }
-
+
protected:
acorn_vidc10_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
@@ -66,7 +66,7 @@ protected:
private:
const address_space_config m_space_config;
-
+
void regs_map(address_map &map);
required_device<speaker_device> m_lspeaker;
@@ -81,7 +81,7 @@ private:
DECLARE_WRITE32_MEMBER( crtc_w );
DECLARE_WRITE32_MEMBER( sound_frequency_w );
DECLARE_WRITE32_MEMBER( control_w );
-
+
uint8_t m_pixel_clock, m_bpp_mode, m_crtc_interlace;
//bool m_flyback;
enum {
@@ -90,19 +90,19 @@ private:
};
emu_timer *m_video_timer;
emu_timer *m_sound_timer;
-
+
inline void screen_vblank_line_update();
void screen_dynamic_res_change();
-
+
enum {
CRTC_HCR = 0, CRTC_HSWR, CRTC_HBSR, CRTC_HDSR, CRTC_HDER, CRTC_HBER, CRTC_HCSR, CRTC_HIR,
CRTC_VCR, CRTC_VSWR, CRTC_VBSR, CRTC_VDSR, CRTC_VDER, CRTC_VBER, CRTC_VCSR, CRTC_VCER
};
uint32_t m_crtc_regs[16];
- u8 *m_data_vram;
+ u8 *m_data_vram;
u8 *m_cursor_vram;
// TODO: correct data vram size
- const u32 m_data_vram_mask = 0x1fffff;
+ const u32 m_data_vram_mask = 0x1fffff;
const u32 m_cursor_vram_mask = 0x7fff;
const u32 m_data_vram_size = m_data_vram_mask+1;
const u32 m_cursor_vram_size = m_cursor_vram_mask+1;
diff --git a/src/devices/machine/i8251.cpp b/src/devices/machine/i8251.cpp
index b78ee829cb9..1712796e64d 100644
--- a/src/devices/machine/i8251.cpp
+++ b/src/devices/machine/i8251.cpp
@@ -594,7 +594,7 @@ void i8251_device::mode_w(uint8_t data)
1 = x1
2 = x16
3 = x64
-
+
Synchronous
bit 7: Number of sync characters
diff --git a/src/devices/machine/vr0uart.cpp b/src/devices/machine/vr0uart.cpp
index cfaf69e8863..eaf62aa1073 100644
--- a/src/devices/machine/vr0uart.cpp
+++ b/src/devices/machine/vr0uart.cpp
@@ -7,9 +7,9 @@
Device by Angelo Salese
TODO:
- - The only current example (Trivia R Us touchscreen) expects to read
- stuff before transmitting anything, except for loopback test and a
- signal break enabling at POST (!?).
+ - The only current example (Trivia R Us touchscreen) expects to read
+ stuff before transmitting anything, except for loopback test and a
+ signal break enabling at POST (!?).
***************************************************************************/
@@ -67,7 +67,7 @@ void vr0uart_device::device_reset()
m_ucon = 0x001;
m_ubdr = 1;
m_urxb_fifo.clear();
-
+
update_serial_config();
}
@@ -87,11 +87,11 @@ inline uint32_t vr0uart_device::calculate_baud_rate()
void vr0uart_device::update_serial_config()
{
const parity_t parity_modes[4] = { PARITY_NONE, PARITY_NONE, PARITY_EVEN, PARITY_ODD };
-
+
uint8_t word_length = m_ucon & 1 ? 8 : 7;
- parity_t parity_mode = parity_modes[(m_ucon & 0xc) >> 2];
+ parity_t parity_mode = parity_modes[(m_ucon & 0xc) >> 2];
stop_bits_t stop_bits = m_ucon & 2 ? STOP_BITS_2 : STOP_BITS_1;
-
+
set_data_frame(1, word_length, parity_mode, stop_bits);
if (m_ucon & 0x100) // UART Enable
@@ -135,7 +135,7 @@ void vr0uart_device::rcv_complete()
}
else
m_ustat |= 1; // overrun
-
+
if (m_ucon & 0x20 && m_ustat & 0xf)
m_parent->IntReq(m_channel_num ? 16 : 13);
else
@@ -182,7 +182,7 @@ READ32_MEMBER( vr0uart_device::status_r )
{
uint32_t res = m_ustat;
if (!m_urxb_fifo.empty())
- {
+ {
res |= 0x10;
res |= (m_urxb_fifo.queue_length() << 8);
}
@@ -201,7 +201,7 @@ READ32_MEMBER( vr0uart_device::receive_buffer_r )
{
// TODO: unknown value & behaviour attempting to read this on empty FIFO (stall?)
uint8_t res = 0;
-
+
if (ACCESSING_BITS_0_7 && !m_urxb_fifo.empty())
res = m_urxb_fifo.dequeue();
diff --git a/src/devices/machine/vrender0.cpp b/src/devices/machine/vrender0.cpp
index a1fdeedf536..c60a8908207 100644
--- a/src/devices/machine/vrender0.cpp
+++ b/src/devices/machine/vrender0.cpp
@@ -114,12 +114,12 @@ void vrender0soc_device::device_add_mconfig(machine_config &config)
VRENDER0_UART(config, uart, 3579500);
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
- // evolution soccer defaults
+ // evolution soccer defaults
m_screen->set_raw((XTAL(14'318'180)*2)/4, 455, 0, 320, 262, 0, 240);
- m_screen->set_screen_update(FUNC(vrender0soc_device::screen_update));
- m_screen->screen_vblank().set(FUNC(vrender0soc_device::screen_vblank));
- m_screen->set_palette(m_palette);
-
+ m_screen->set_screen_update(FUNC(vrender0soc_device::screen_update));
+ m_screen->screen_vblank().set(FUNC(vrender0soc_device::screen_vblank));
+ m_screen->set_palette(m_palette);
+
VIDEO_VRENDER0(config, m_vr0vid, 14318180);
#ifdef IDLE_LOOP_SPEEDUP
m_vr0vid->idleskip_cb().set(FUNC(vrender0soc_device::idle_skip_speedup_w));
@@ -145,7 +145,7 @@ void vrender0soc_device::device_start()
int i;
m_textureram = auto_alloc_array_clear(machine(), uint16_t, 0x00800000/2);
m_frameram = auto_alloc_array_clear(machine(), uint16_t, 0x00800000/2);
-
+
m_vr0vid->set_areas(m_textureram, m_frameram);
m_vr0snd->set_areas(m_textureram, m_frameram);
m_host_space = &m_host_cpu->space(AS_PROGRAM);
@@ -164,7 +164,7 @@ void vrender0soc_device::device_start()
m_uart[i]->set_channel_num(i);
m_uart[i]->set_parent(this);
}
-
+
save_item(NAME(m_inten));
save_item(NAME(m_intst));
save_item(NAME(m_IntHigh));
@@ -180,7 +180,7 @@ void vrender0soc_device::device_start()
save_item(NAME(m_dma[1].src));
save_item(NAME(m_dma[1].dst));
save_item(NAME(m_dma[1].size));
-
+
#ifdef IDLE_LOOP_SPEEDUP
save_item(NAME(m_FlipCntRead));
#endif
@@ -634,7 +634,7 @@ void vrender0soc_device::crtc_update()
uint32_t pixel_clock = (BIT(m_crtcregs[0x04 / 4], 3)) ? 14318180 : m_ext_vclk;
if (pixel_clock == 0)
fatalerror("%s: Accessing external vclk in CRTC parameters, please set it up via setter in config\n",this->tag());
-
+
if (BIT(m_crtcregs[0x04 / 4], 7))
pixel_clock *= 2;
// TODO: divider setting = 0 is reserved, guess it just desyncs the signal?
@@ -673,7 +673,7 @@ READ32_MEMBER(vrender0soc_device::sysid_r)
READ32_MEMBER(vrender0soc_device::cfgr_r)
{
- // TODO: this truly needs real HW verification,
+ // TODO: this truly needs real HW verification,
// only Cross Puzzle reads this so far so leaving a logerror
// -x-- ---- Main Clock select (0 -> External Clock)
// --xx x--- Reserved for Chip Test Mode
diff --git a/src/devices/machine/vrender0.h b/src/devices/machine/vrender0.h
index 5d2843d74f8..3efb859938b 100644
--- a/src/devices/machine/vrender0.h
+++ b/src/devices/machine/vrender0.h
@@ -62,25 +62,25 @@ private:
DECLARE_WRITE32_MEMBER( control_w );
DECLARE_READ32_MEMBER( baud_rate_div_r );
DECLARE_WRITE32_MEMBER( baud_rate_div_w );
- DECLARE_READ32_MEMBER( status_r );
+ DECLARE_READ32_MEMBER( status_r );
DECLARE_WRITE32_MEMBER( transmit_buffer_w );
DECLARE_READ32_MEMBER( receive_buffer_r );
TIMER_CALLBACK_MEMBER( break_timer_cb );
-
+
uint32_t m_ucon; // control
uint32_t m_ubdr; // baud rate
uint32_t m_ustat; // status
util::fifo<uint8_t, 16> m_urxb_fifo; // receive FIFO
-
+
void update_serial_config();
inline uint32_t calculate_baud_rate();
-
+
virtual void tra_callback() override;
virtual void tra_complete() override;
virtual void rcv_complete() override;
inline void tx_send_byte(uint8_t val);
- int m_channel_num;
+ int m_channel_num;
vrender0soc_device *m_parent;
};
@@ -98,8 +98,8 @@ public:
void regs_map(address_map &map);
void audiovideo_map(address_map &map);
template<class T> void set_host_cpu_tag(T &&tag) { m_host_cpu.set_tag(std::forward<T>(tag)); }
- void set_external_vclk(const uint32_t vclk) { m_ext_vclk = vclk; }
- void set_external_vclk(const XTAL vclk) { m_ext_vclk = vclk.value(); }
+ void set_external_vclk(const uint32_t vclk) { m_ext_vclk = vclk; }
+ void set_external_vclk(const XTAL vclk) { m_ext_vclk = vclk.value(); }
bool crt_is_blanked() { return ((m_crtcregs[0] & 0x0200) == 0x0200); }
bool crt_active_vblank_irq();
void IntReq( int num );
@@ -108,7 +108,7 @@ public:
void write_line_tx(int port, uint8_t value);
template <int Port> auto tx_callback() { return write_tx[Port].bind(); }
template <int Port> DECLARE_WRITE_LINE_MEMBER(rx_w) { m_uart[Port]->rx_w((uint8_t)state); }
-
+
protected:
// device-level overrides
//virtual void device_validity_check(validity_checker &valid) const override;
@@ -128,7 +128,7 @@ private:
required_shared_ptr <uint32_t> m_crtcregs;
uint16_t *m_textureram;
uint16_t *m_frameram;
-
+
address_space *m_host_space;
uint32_t m_ext_vclk;
@@ -185,10 +185,10 @@ private:
// Misc
DECLARE_READ32_MEMBER( sysid_r );
DECLARE_READ32_MEMBER( cfgr_r );
-
+
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_WRITE_LINE_MEMBER(screen_vblank);
-
+
DECLARE_READ16_MEMBER( textureram_r );
DECLARE_WRITE16_MEMBER( textureram_w );
DECLARE_READ16_MEMBER( frameram_r );
diff --git a/src/devices/machine/wd1000.cpp b/src/devices/machine/wd1000.cpp
index 1b573fe0af9..e9ac75bad49 100644
--- a/src/devices/machine/wd1000.cpp
+++ b/src/devices/machine/wd1000.cpp
@@ -407,7 +407,7 @@ void wd1000_device::data_w(uint8_t data)
{
// Tranfer completed.
if ((m_command >> 4) == CMD_WRITE_SECTOR ||
- (m_command >> 4) == CMD_WRITE_FORMAT)
+ (m_command >> 4) == CMD_WRITE_FORMAT)
{
m_status |= S_BSY;
set_error(0);
diff --git a/src/devices/video/imagetek_i4100.cpp b/src/devices/video/imagetek_i4100.cpp
index e0686f75f2e..1bb7c5fde56 100644
--- a/src/devices/video/imagetek_i4100.cpp
+++ b/src/devices/video/imagetek_i4100.cpp
@@ -22,7 +22,7 @@
- Some gfx problems in ladykill, 3kokushi, puzzli, gakusai, seem related to how we handle
windows, wrapping, read-modify-write areas;
- puzzli: emulate hblank irq and fix video routines here (water effect not emulated?);
- - Fix flipped screen behavior
+ - Fix flipped screen behavior
============================================================================
diff --git a/src/devices/video/mc6845.cpp b/src/devices/video/mc6845.cpp
index 68ac2ee0af9..1c0862f1564 100644
--- a/src/devices/video/mc6845.cpp
+++ b/src/devices/video/mc6845.cpp
@@ -698,7 +698,7 @@ bool mc6845_device::check_cursor_visible(uint16_t ra, uint16_t line_addr)
return false;
if ((m_cursor_addr < line_addr) ||
- (m_cursor_addr >= (line_addr + m_horiz_disp)))
+ (m_cursor_addr >= (line_addr + m_horiz_disp)))
{
// Not a cursor character line.
return false;
@@ -737,7 +737,7 @@ bool hd6845s_device::check_cursor_visible(uint16_t ra, uint16_t line_addr)
return false;
if ((m_cursor_addr < line_addr) ||
- (m_cursor_addr >= (line_addr + m_horiz_disp)))
+ (m_cursor_addr >= (line_addr + m_horiz_disp)))
{
// Not a cursor character line.
return false;
diff --git a/src/devices/video/vrender0.cpp b/src/devices/video/vrender0.cpp
index b505e69a7e1..e67675888f0 100644
--- a/src/devices/video/vrender0.cpp
+++ b/src/devices/video/vrender0.cpp
@@ -12,12 +12,12 @@
It supports alphablend with programmable factors per channel and for source and dest
color.
- TODO:
- - Dither Mode;
- - Draw select to Front buffer is untested, speculatively gonna be used for raster
- effects;
- - screen_update doesn't honor CRT Display Start registers,
- so far only psattack changes it on-the-fly, for unknown reasons;
+ TODO:
+ - Dither Mode;
+ - Draw select to Front buffer is untested, speculatively gonna be used for raster
+ effects;
+ - screen_update doesn't honor CRT Display Start registers,
+ so far only psattack changes it on-the-fly, for unknown reasons;
*****************************************************************************************/
@@ -177,7 +177,7 @@ void vr0video_device::device_reset()
{
memset(m_InternalPalette, 0, sizeof(m_InternalPalette));
m_LastPalUpdate = 0xffffffff;
-
+
m_DisplayDest = m_DrawDest = m_frameram;
}
@@ -551,7 +551,7 @@ int vr0video_device::vrender0_ProcessPacket(uint32_t PacketPtr)
if (Packet0 & 0x800)
{
m_RenderState.SrcAlphaColor = Packet[17] | ((Packet[18] & 0xff) << 16);
- m_RenderState.SrcBlend = (Packet[18] >> 8) & 0x3f;
+ m_RenderState.SrcBlend = (Packet[18] >> 8) & 0x3f;
m_RenderState.DstAlphaColor = Packet[19] | ((Packet[20] & 0xff) << 16);
m_RenderState.DstBlend = (Packet[20] >> 8) & 0x3f;
}
@@ -655,7 +655,7 @@ int vr0video_device::vrender0_ProcessPacket(uint32_t PacketPtr)
Quad.Pal = m_InternalPalette + (m_RenderState.PaletteBank * 16);
else
Quad.Pal = m_InternalPalette;
-
+
if (m_RenderState.TextureMode) //Tiled
DrawTile[m_RenderState.PixelFormat + 4 * Mode](&Quad);
else
diff --git a/src/devices/video/vrender0.h b/src/devices/video/vrender0.h
index b68b0a47f0e..809f0167ca0 100644
--- a/src/devices/video/vrender0.h
+++ b/src/devices/video/vrender0.h
@@ -77,22 +77,22 @@ private:
DECLARE_READ16_MEMBER( bank1_select_r );
DECLARE_WRITE16_MEMBER( bank1_select_w );
- bool m_bank1_select; //!< Select framebuffer bank1 address
+ bool m_bank1_select; //!< Select framebuffer bank1 address
DECLARE_READ16_MEMBER( display_bank_r );
- uint8_t m_display_bank; //!< Current display bank
+ uint8_t m_display_bank; //!< Current display bank
DECLARE_READ16_MEMBER( render_control_r );
DECLARE_WRITE16_MEMBER( render_control_w );
- bool m_draw_select; //!< If true, device draws to Front buffer instead of Back
- bool m_render_reset; //!< Reset pipeline FIFO
- bool m_render_start; //!< Enable pipeline processing
- uint8_t m_dither_mode; //!< applied on RGB888 to RGB565 conversions (00: 2x2, 01:4x4, 1x disable)
- uint8_t m_flip_count; //!< number of framebuffer "syncs" loaded in the parameter RAM,
+ bool m_draw_select; //!< If true, device draws to Front buffer instead of Back
+ bool m_render_reset; //!< Reset pipeline FIFO
+ bool m_render_start; //!< Enable pipeline processing
+ uint8_t m_dither_mode; //!< applied on RGB888 to RGB565 conversions (00: 2x2, 01:4x4, 1x disable)
+ uint8_t m_flip_count; //!< number of framebuffer "syncs" loaded in the parameter RAM,
//!< a.k.a. how many full (vblank) buffers are ready for the device to parse.
-
- uint16_t *m_DrawDest; //!< frameram pointer to draw buffer area
- uint16_t *m_DisplayDest; //!< frameram pointer to display buffer area
+
+ uint16_t *m_DrawDest; //!< frameram pointer to draw buffer area
+ uint16_t *m_DisplayDest; //!< frameram pointer to display buffer area
};
DECLARE_DEVICE_TYPE(VIDEO_VRENDER0, vr0video_device)
diff --git a/src/emu/emupal.cpp b/src/emu/emupal.cpp
index d4c8818419c..e1db3882525 100644
--- a/src/emu/emupal.cpp
+++ b/src/emu/emupal.cpp
@@ -535,7 +535,7 @@ void palette_device::device_start()
{
// forcing endianness only makes sense when the RAM is narrower than the palette format and not split
if (share_ext || (m_paletteram.membits() / 8) >= bytes_per_entry)
- throw emu_fatalerror("palette_device(%s): Improper use of MCFG_PALETTE_ENDIANNESS", tag());
+ throw emu_fatalerror("palette_device(%s): Improper use of MCFG_PALETTE_ENDIANNESS", tag());
m_paletteram.set_endianness(m_endianness);
}
}
diff --git a/src/emu/natkeyboard.h b/src/emu/natkeyboard.h
index d8cc9cfb8ff..41b33ace105 100644
--- a/src/emu/natkeyboard.h
+++ b/src/emu/natkeyboard.h
@@ -72,8 +72,8 @@ private:
// internal keyboard code information
struct keycode_map_entry
{
- std::array<ioport_field *, SHIFT_COUNT + 1> field;
- unsigned shift;
+ std::array<ioport_field *, SHIFT_COUNT + 1> field;
+ unsigned shift;
};
typedef std::unordered_map<char32_t, keycode_map_entry> keycode_map;
diff --git a/src/emu/video/generic.cpp b/src/emu/video/generic.cpp
index 44d8f124a38..b43c9d8fa9d 100644
--- a/src/emu/video/generic.cpp
+++ b/src/emu/video/generic.cpp
@@ -143,9 +143,9 @@ const gfx_layout gfx_16x16x4_packed_lsb =
GFXLAYOUT_RAW(gfx_16x16x8_raw, 16, 16, 16*8, 16*16*8);
/*
- 16x16; grouped of 4 8x8 tiles (row align)
- 0 1
- 2 3
+ 16x16; grouped of 4 8x8 tiles (row align)
+ 0 1
+ 2 3
*/
const gfx_layout gfx_8x8x4_row_2x2_group_packed_msb =
{
@@ -173,9 +173,9 @@ const gfx_layout gfx_8x8x4_row_2x2_group_packed_lsb =
};
/*
- 16x16; grouped of 4 8x8 tiles (col align)
- 0 2
- 1 3
+ 16x16; grouped of 4 8x8 tiles (col align)
+ 0 2
+ 1 3
*/
const gfx_layout gfx_8x8x4_col_2x2_group_packed_msb =
{
diff --git a/src/lib/netlist/plib/pfmtlog.h b/src/lib/netlist/plib/pfmtlog.h
index 88bceb97e43..531b76fafe7 100644
--- a/src/lib/netlist/plib/pfmtlog.h
+++ b/src/lib/netlist/plib/pfmtlog.h
@@ -212,18 +212,18 @@ public:
return format_element('o', x);
}
- friend std::ostream& operator<<(std::ostream &ostrm, const pfmt &fmt)
- {
- ostrm << fmt.m_str;
- return ostrm;
- }
+ friend std::ostream& operator<<(std::ostream &ostrm, const pfmt &fmt)
+ {
+ ostrm << fmt.m_str;
+ return ostrm;
+ }
protected:
struct rtype
{
rtype() : ret(0), p(0), sl(0), pend(0), width(0) {}
- int ret;
+ int ret;
pstring::size_type p;
pstring::size_type sl;
char32_t pend;
diff --git a/src/lib/netlist/plib/pparser.h b/src/lib/netlist/plib/pparser.h
index 2d0aa861328..12dc4183ad0 100644
--- a/src/lib/netlist/plib/pparser.h
+++ b/src/lib/netlist/plib/pparser.h
@@ -239,29 +239,29 @@ protected:
public:
st(ppreprocessor *strm) : m_strm(strm) { setg(nullptr, nullptr, nullptr); }
st(st &&rhs) noexcept : m_strm(rhs.m_strm) {}
- int_type underflow() override
- {
- //printf("here\n");
- if (this->gptr() == this->egptr())
- {
- /* clang reports sign error - weird */
- std::size_t bytes = pstring_mem_t_size(m_strm->m_buf) - static_cast<std::size_t>(m_strm->m_pos);
-
- if (bytes > m_buf.size())
- bytes = m_buf.size();
- std::copy(m_strm->m_buf.c_str() + m_strm->m_pos, m_strm->m_buf.c_str() + m_strm->m_pos + bytes, m_buf.data());
- //printf("%ld\n", (long int)bytes);
- this->setg(m_buf.data(), m_buf.data(), m_buf.data() + bytes);
-
- m_strm->m_pos += static_cast</*pos_type*/long>(bytes);
- }
- return this->gptr() == this->egptr()
- ? std::char_traits<char>::eof()
- : std::char_traits<char>::to_int_type(*this->gptr());
- }
+ int_type underflow() override
+ {
+ //printf("here\n");
+ if (this->gptr() == this->egptr())
+ {
+ /* clang reports sign error - weird */
+ std::size_t bytes = pstring_mem_t_size(m_strm->m_buf) - static_cast<std::size_t>(m_strm->m_pos);
+
+ if (bytes > m_buf.size())
+ bytes = m_buf.size();
+ std::copy(m_strm->m_buf.c_str() + m_strm->m_pos, m_strm->m_buf.c_str() + m_strm->m_pos + bytes, m_buf.data());
+ //printf("%ld\n", (long int)bytes);
+ this->setg(m_buf.data(), m_buf.data(), m_buf.data() + bytes);
+
+ m_strm->m_pos += static_cast</*pos_type*/long>(bytes);
+ }
+ return this->gptr() == this->egptr()
+ ? std::char_traits<char>::eof()
+ : std::char_traits<char>::to_int_type(*this->gptr());
+ }
private:
- ppreprocessor *m_strm;
- std::array<char_type, 1024> m_buf;
+ ppreprocessor *m_strm;
+ std::array<char_type, 1024> m_buf;
};
//friend class st;
#endif
diff --git a/src/lib/netlist/plib/pstring.h b/src/lib/netlist/plib/pstring.h
index bbbe48147d2..96ab0bd0fa5 100644
--- a/src/lib/netlist/plib/pstring.h
+++ b/src/lib/netlist/plib/pstring.h
@@ -197,11 +197,11 @@ public:
bool operator>(const pstring_t &string) const { return (compare(string) > 0); }
bool operator>=(const pstring_t &string) const { return (compare(string) >= 0); }
- friend std::ostream& operator<<(std::ostream &ostrm, const pstring_t &str)
- {
- ostrm << str.m_str;
- return ostrm;
- }
+ friend std::ostream& operator<<(std::ostream &ostrm, const pstring_t &str)
+ {
+ ostrm << str.m_str;
+ return ostrm;
+ }
const_reference at(const size_type pos) const { return *reinterpret_cast<const ref_value_type *>(F::nthcode(m_str.c_str(),pos)); }
diff --git a/src/lib/netlist/prg/nltool.cpp b/src/lib/netlist/prg/nltool.cpp
index 3933299d06d..b450757d931 100644
--- a/src/lib/netlist/prg/nltool.cpp
+++ b/src/lib/netlist/prg/nltool.cpp
@@ -874,7 +874,7 @@ int tool_app_t::execute()
std::cout << plib::pfmt("{:20}")("Общая ком") << "|" << "\n";
//char x = 'a';
- auto b= U'щ';
+ auto b= U'\U0449';
std::cout << "b: <" << b << ">";
#endif
return 0;
diff --git a/src/mame/drivers/aa310.cpp b/src/mame/drivers/aa310.cpp
index 25ce84211b8..824f15bcb41 100644
--- a/src/mame/drivers/aa310.cpp
+++ b/src/mame/drivers/aa310.cpp
@@ -610,7 +610,7 @@ ROM_START( aa305 )
ROMX_LOAD( "0276,148-01.ic26", 0x000002, 0x10000, CRC(1ab02f2d) SHA1(dd7d216967524e64d1a03076a6081461ec8528c3), ROM_BIOS(8) | ROM_SKIP(3) )
ROMX_LOAD( "0276,149-01.ic27", 0x000003, 0x10000, CRC(5fd6a406) SHA1(790af8a4c74d0f6714d528f7502443ce5898a618), ROM_BIOS(8) | ROM_SKIP(3) )
-
+
ROM_REGION( 0x400000, "extension", ROMREGION_ERASE00 )
ROM_REGION( 0x100, "i2cmem", ROMREGION_ERASE00 )
@@ -654,7 +654,7 @@ ROM_START( aa3000 )
ROM_SYSTEM_BIOS( 5, "319", "RISC OS 3.19 (09 Jun 1993)" ) // Parts 0296,241-01, 0296,242-01, 0296,243-01, 0296,244-01,
ROMX_LOAD( "riscos319.bin", 0x000000, 0x200000, CRC(00c7a3d3) SHA1(be7a8cba5d6c6c0e1c4838712524056cf4b8c8cb), ROM_BIOS(5) )
-
+
ROM_REGION( 0x400000, "extension", ROMREGION_ERASE00 )
ROM_REGION( 0x100, "i2cmem", ROMREGION_ERASE00 )
@@ -691,7 +691,7 @@ ROM_START( aa5000 )
ROM_SYSTEM_BIOS( 3, "319", "RISC OS 3.19 (09 Jun 1993)" ) // Parts 0296,241-01, 0296,242-01, 0296,243-01, 0296,244-01,
ROMX_LOAD( "riscos319.bin", 0x000000, 0x200000, CRC(00c7a3d3) SHA1(be7a8cba5d6c6c0e1c4838712524056cf4b8c8cb), ROM_BIOS(3) )
-
+
ROM_REGION( 0x400000, "extension", ROMREGION_ERASE00 )
ROM_REGION( 0x100, "i2cmem", ROMREGION_ERASE00 )
@@ -705,7 +705,7 @@ ROM_START( aa4 )
ROM_LOAD32_WORD( "0296,061-01.ic4", 0x000000, 0x100000, CRC(b77fe215) SHA1(57b19ea4b97a9b6a240aa61211c2c134cb295aa0) )
ROM_LOAD32_WORD( "0296,062-01.ic15", 0x000002, 0x100000, CRC(d42e196e) SHA1(64243d39d1bca38b10761f66a8042c883bde87a4) )
-
+
ROM_REGION( 0x400000, "extension", ROMREGION_ERASE00 )
/* Power Management */
ROM_LOAD32_BYTE( "0296,063-01.ic38", 0x000003, 0x010000, CRC(9ca3a6be) SHA1(75905b031f49960605d55c3e7350d309559ed440) )
@@ -719,7 +719,7 @@ ROM_START( aa3010 )
ROM_LOAD32_WORD( "0296,061-02.ic17", 0x000000, 0x100000, CRC(552fc3aa) SHA1(b2f1911e53d7377f2e69e1a870139745d3df494b) )
ROM_LOAD32_WORD( "0296,062-02.ic18", 0x000002, 0x100000, CRC(308d5a4a) SHA1(b309e1dd85670a06d77ec504dbbec6c42336329f) )
-
+
ROM_REGION( 0x400000, "extension", ROMREGION_ERASE00 )
ROM_REGION( 0x100, "i2cmem", ROMREGION_ERASE00 )
diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp
index 92aa610addd..dca98b1d51e 100644
--- a/src/mame/drivers/aristmk5.cpp
+++ b/src/mame/drivers/aristmk5.cpp
@@ -2403,7 +2403,7 @@ ROM_START( aristmk5 )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 )
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2429,7 +2429,7 @@ ROM_START( adonis )
ROM_LOAD32_WORD( "0200751v.u12", 0x100002, 0x80000, CRC(443a7b6d) SHA1(c19a1c50fb8774826a1e12adacba8bbfce320891) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2454,7 +2454,7 @@ ROM_START( adonisa )
ROM_LOAD32_WORD( "0100751v.u12", 0x100002, 0x80000, CRC(77090858) SHA1(76ebc15b26f378ac95276f0aa26d077e3646a6f1) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2481,7 +2481,7 @@ ROM_START( adonisu )
ROM_LOAD32_WORD( "bhg1508.u12", 0x100002, 0x80000, CRC(b8995b25) SHA1(ad39ad11dc02dbbe8be99d81c96e9fc3191726ad) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2509,7 +2509,7 @@ ROM_START( adonisce )
ROM_LOAD32_WORD( "0201005v.u13", 0x200002, 0x80000, CRC(e005a7e8) SHA1(cbb313f5d1d04c5a441b3f92b7a90a281ddb4885) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2539,7 +2539,7 @@ ROM_START( alchemst )
ROM_LOAD32_WORD( "01j02046.u13", 0x200002, 0x80000, CRC(6b791adf) SHA1(f00923101f926034603243a3c63e1010b044829e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2566,7 +2566,7 @@ ROM_START( baddog )
ROM_LOAD32_WORD( "0200428v.u13", 0x200002, 0x80000, CRC(883b2ec3) SHA1(5b431d8c9c8eabca65ab22dcf2bdb22d49445bb1) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2592,7 +2592,7 @@ ROM_START( blackpnt )
ROM_LOAD32_WORD( "0200818v.u12", 0x100002, 0x80000, BAD_DUMP CRC(bb2bf7bb) SHA1(f88208238a69fc79e33af17f39e25cd2857d7172) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2620,7 +2620,7 @@ ROM_START( bootsctn )
ROM_LOAD32_WORD( "0100812v.u14", 0x300002, 0x80000, CRC(75b9b89e) SHA1(08d487b3722f2ea5d2d18c78f571a44c78616dbe) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2653,7 +2653,7 @@ ROM_START( bootsctnu )
ROM_LOAD32_WORD( "ghg101202.u14", 0x300002, 0x80000, CRC(18934c51) SHA1(f7c9c95c687dbfe89747e7877157fde37bc1119e) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2682,7 +2682,7 @@ ROM_START( bootsctnua )
ROM_LOAD32_WORD( "ghg100803.u14", 0x300002, 0x80000, CRC(9759692e) SHA1(7666027e21af27329720127367a780776973c515) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2712,7 +2712,7 @@ ROM_START( bootsctnub )
ROM_LOAD32_WORD( "ahg1547.u14", 0x300002, 0x80000, CRC(de2888e2) SHA1(f614d68c0e09912e9126cb024f54ed32ee50b57e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2744,7 +2744,7 @@ ROM_START( bparty )
ROM_LOAD32_WORD( "bhg1248.u14", 0x300002, 0x80000, CRC(b276d61a) SHA1(8bee7fa551caec3da03afa061612c153f7b48cdb) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2768,7 +2768,7 @@ ROM_START( bpartya )
ROM_LOAD32_WORD( "bhg1579.u14", 0x300002, 0x7ff94, BAD_DUMP CRC(34ffe312) SHA1(34432e57e2e3dd90c15dd3ff7cb16d8381343be8) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2790,7 +2790,7 @@ ROM_START( bumblbug )
ROM_LOAD32_WORD( "0200510v.u11", 0x000002, 0x80000, CRC(5d888245) SHA1(bbbe61e09bebd5fcb79f060d5caee15100c9a685) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2815,7 +2815,7 @@ ROM_START( bumblbugql )
ROM_LOAD32_WORD( "0200456v.u12", 0x100002, 0x80000, CRC(9f0d7615) SHA1(1453b1476510e1dd68bc14feba72dc59b9dfe676) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2844,7 +2844,7 @@ ROM_START( bumblbugu )
ROM_LOAD32_WORD( "chg047903.u12", 0x100002, 0x80000, CRC(7dbb634b) SHA1(f7a752240989032af142f4cd6e4260a12a5b4c0a) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2874,7 +2874,7 @@ ROM_START( bumblbugua )
ROM_LOAD32_WORD( "chg047999.u12", 0x100002, 0x80000, CRC(7dbb634b) SHA1(f7a752240989032af142f4cd6e4260a12a5b4c0a) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2899,7 +2899,7 @@ ROM_START( buttdeli )
ROM_LOAD32_WORD( "0200143v.u12", 0x100002, 0x80000, CRC(0d58cf28) SHA1(aa65b7ee88b5bc872008a46e60bd49d9e5eda153) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2918,7 +2918,7 @@ ROM_START( canrose )
ROM_LOAD32_WORD( "ahg1463.u12", 0x100002, 0x7f4fc, CRC(5fe736c2) SHA1(d7c1a3f003085848e413aa499d9eaecca74773da) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2943,7 +2943,7 @@ ROM_START( cashcat )
ROM_LOAD32_WORD( "0100676v.u12", 0x100002, 0x80000, CRC(a7199f5f) SHA1(6a46935c095b1d89307921e3a53b48032e6f45fa) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2968,7 +2968,7 @@ ROM_START( cashcata )
ROM_LOAD32_WORD( "0100557v.u12", 0x100002, 0x80000, CRC(bdeeafd3) SHA1(a95a44ff8534bb030d696a37821f3e53072f2947) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -2986,7 +2986,7 @@ ROM_START( cashcatnz )
ROM_LOAD32_WORD( "0300863v.u12", 0x100002, 0x80000, CRC(f930fc07) SHA1(cb3fdbd5b87af7b14067f7999740470d3cf434df) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3011,7 +3011,7 @@ ROM_START( cashcham )
ROM_LOAD32_WORD( "0100438v.u12", 0x100002, 0x80000, CRC(7ae3b5db) SHA1(238698b72f529ac4fb292d08267069d1da01b43b) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3036,7 +3036,7 @@ ROM_START( cashchama )
ROM_LOAD32_WORD( "0200437v.u12", 0x100002, 0x80000, CRC(571aab82) SHA1(03895d1a08d2dd868fd594db1aaeb29b295f0d98) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3054,7 +3054,7 @@ ROM_START( cashchamnz )
ROM_LOAD32_WORD( "0300781v.u12", 0x100002, 0x80000, CRC(2aeb0265) SHA1(50e526ecccfdd35f7e156e1873cf4c81fb117069) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3082,7 +3082,7 @@ ROM_START( cashchamu )
ROM_LOAD32_WORD( "dhg407899.u12", 0x100002, 0x80000, CRC(2fd087f8) SHA1(f16414abf58e1a7a8ca08380993bdeca6f9c7317) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3107,7 +3107,7 @@ ROM_START( cashcra5 )
ROM_LOAD32_WORD( "0300467v.u12", 0x100002, 0x80000, CRC(570c7f8a) SHA1(7c9527e0b37970b7960c723727c3c650a48e8125) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3125,7 +3125,7 @@ ROM_START( cashcra5a )
ROM_LOAD32_WORD( "0300447v.u12", 0x100002, 0x7fe36, BAD_DUMP CRC(ef641efa) SHA1(52e54ed933352cde0f280ba2b3e9bae01c4aae7e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3150,7 +3150,7 @@ ROM_START( chariotc )
ROM_LOAD32_WORD( "0100787v.u12", 0x100002, 0x80000, CRC(b44cf571) SHA1(04447820e015425493cade5611b3eb2f21e48c2e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3177,7 +3177,7 @@ ROM_START( chariotcv )
ROM_LOAD32_WORD( "04j00714.u12", 0x100002, 0x80000, CRC(b8d4a5ec) SHA1(097e44cdb30b9aafd7f5358c8f0cdd130ec0615e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3205,7 +3205,7 @@ ROM_START( checkma5 )
ROM_LOAD32_WORD( "01j00681.u13", 0x200002, 0x80000, CRC(ad12a718) SHA1(0c36729cb8da800668f533f65fcc870f5dfc0f6a) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3231,7 +3231,7 @@ ROM_START( chickna5 )
ROM_LOAD32_WORD( "0100351v.u13", 0x200002, 0x80000, CRC(88a1ccae) SHA1(e242f48f99044b4fdf1bf36d8e105df09f94aa50) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3260,7 +3260,7 @@ ROM_START( chickna5ql )
ROM_LOAD32_WORD( "0200530v.u14", 0x300002, 0x80000, CRC(e87cf6c9) SHA1(a330644658da6100d7231b1c47260dc7f2e88448) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3295,7 +3295,7 @@ ROM_START( chickna5u )
ROM_LOAD32_WORD( "rhg073003.u14", 0x300002, 0x80000, CRC(240f7759) SHA1(1fa5ba0185b027101dae207ec5d28b07d3d73fc2) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3328,7 +3328,7 @@ ROM_START( chickna5ua )
ROM_LOAD32_WORD( "rhg073099.u14", 0x300002, 0x80000, CRC(240f7759) SHA1(1fa5ba0185b027101dae207ec5d28b07d3d73fc2) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3357,7 +3357,7 @@ ROM_START( chickna5v )
ROM_LOAD32_WORD( "01j01886.u13", 0x200002, 0x80000, BAD_DUMP CRC(231ca698) SHA1(eb237652974228994e793f0dc87de93095db3c9c) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3382,7 +3382,7 @@ ROM_START( coralrc2 )
ROM_LOAD32_WORD( "0100919v.u12", 0x100002, 0x80000, CRC(9ea140b5) SHA1(11f6b9ab60117f236b464c9dbc939dfb8f240359) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3407,7 +3407,7 @@ ROM_START( cuckoo )
ROM_LOAD32_WORD( "0200753v.u12", 0x100002, 0x80000, CRC(cb706eb7) SHA1(cbd6235ca7a29c78ef2cb659d9c21466ed39b360) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3435,7 +3435,7 @@ ROM_START( cuckoou )
ROM_LOAD32_WORD( "chg1195.u12", 0x100002, 0x80000, CRC(00bb7597) SHA1(f4d6b21091e320a82d59477469340633b001ed0d) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
@@ -3472,7 +3472,7 @@ ROM_START( dstbloom )
ROM_LOAD32_WORD( "0300111v.u12", 0x100002, 0x80000, CRC(10cf45b3) SHA1(3f47682ed95f65bdb267f911e113e329ad448167) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3498,7 +3498,7 @@ ROM_START( dstblooma )
ROM_LOAD32_WORD( "0200111v.u12", 0x100002, 0x80000, CRC(0ad41815) SHA1(131efc6ed45d8f44a667bd30380c9e37c64f2c42) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3519,7 +3519,7 @@ ROM_START( diamdest )
ROM_LOAD32_WORD( "ahg1533.u13", 0x200002, 0x7ffeb, BAD_DUMP CRC(612a6bf2) SHA1(01ee8854204da0610aa4ab3a36c3e517906d2ab4) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3547,7 +3547,7 @@ ROM_START( diamdove )
ROM_LOAD32_WORD( "0101018v.u13", 0x200002, 0x80000, CRC(952a850f) SHA1(66da391af532f9ef531d10995c96a90eb71cd09a) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3569,7 +3569,7 @@ ROM_START( dmdfever )
ROM_LOAD32_WORD( "0200302v.u11", 0x000002, 0x80000, CRC(29620f05) SHA1(172b6226c443931f0c4ddc44a63c8fc0e6be3824) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASEFF )
ROM_END
@@ -3588,7 +3588,7 @@ ROM_START( dimtouch )
ROM_LOAD32_WORD( "0400433v.u12", 0x100002, 0x80000, CRC(9e0d08e2) SHA1(38b10f7c37f1cefe9271549073dc0a4fed409aec) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASEFF )
ROM_END
@@ -3610,7 +3610,7 @@ ROM_START( dolphntr )
ROM_LOAD32_WORD( "0200424v.u11", 0x000002, 0x80000, CRC(bcb732ea) SHA1(838300914846c6e740780e5a24b9db7304a8a88d) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3636,7 +3636,7 @@ ROM_START( dolphntra )
ROM_LOAD32_WORD( "0100424v.u12", 0x100002, 0x80000, CRC(6abd9309) SHA1(c405a13f5bfe447c1ab20d92e140e4fb145920d4) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3661,7 +3661,7 @@ ROM_START( dolphntrb )
ROM_LOAD32_WORD( "0100388v.u12", 0x100002, 0x80000, CRC(1a1fbbcf) SHA1(6e3772dcccd9b5958bec3bfac9af22b2eabca32e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3693,7 +3693,7 @@ ROM_START( dolphntrce )
ROM_LOAD32_WORD( "ahg1607.u14", 0x300002, 0x80000, CRC(6f522ffb) SHA1(0fbba6b8df15631e4361daf505469f2214ad8695) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3725,7 +3725,7 @@ ROM_START( dolphntrcea )
ROM_LOAD32_WORD( "ahg1606.u14", 0x300002, 0x80000, CRC(c6c59ed6) SHA1(0ce8e5824c5937ffe2eeb34320db9dc568bca7cb) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3757,7 +3757,7 @@ ROM_START( dolphntrceb )
ROM_LOAD32_WORD( "ahg1519.u14", 0x300002, 0x80000, CRC(f2da081c) SHA1(5202741719d72a9290bda2c646d37e8c8ad41c04) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3782,7 +3782,7 @@ ROM_START( dolphntrql )
ROM_LOAD32_WORD( "0101250v.u12", 0x100002, 0x80000, CRC(35236e6f) SHA1(f196f12a1761a235ad66f4e181ca249b1df7e245) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3809,7 +3809,7 @@ ROM_START( dolphntru )
ROM_LOAD32_WORD( "fhg407702.u12", 0x100002, 0x80000, CRC(8ee1c2d3) SHA1(e6ecaaac0cb4518ecc0d36532ab532f46e3e628b) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
@@ -3844,7 +3844,7 @@ ROM_START( drgneye )
ROM_LOAD32_WORD( "0100521v.u11", 0x000002, 0x80000, CRC(2bb47749) SHA1(796f610e5202b5eb26a6e901d43ee5d9e3f95332) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3863,7 +3863,7 @@ ROM_START( dreamwv )
ROM_LOAD32_WORD( "0200586v.u12", 0x100002, 0x80000, CRC(0b3e03d3) SHA1(966ec84aff686ad360d440995b81ae469539a5b5) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3890,7 +3890,7 @@ ROM_START( dynajack )
ROM_LOAD32_WORD( "01j00081.u13", 0x200002, 0x80000, CRC(d204ff9c) SHA1(8ac5533928fb3ca247dc85cea67da45a6743f732) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3911,7 +3911,7 @@ ROM_START( dynajacku )
ROM_LOAD32_WORD( "chg1562.u13", 0x200002, 0x80000, CRC(5a2220d7) SHA1(aca5fefb60af93ba776cc695e9a7ea406f527937) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3933,7 +3933,7 @@ ROM_START( eldorda5 )
ROM_LOAD32_WORD( "0100652v.u11", 0x000002, 0x80000, CRC(35233cf8) SHA1(e02477526f2f9e2663c1876f543d138b2caf28df) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3955,7 +3955,7 @@ ROM_START( eforsta5 )
ROM_LOAD32_WORD( "0400122v.u11", 0x000002, 0x80000, CRC(7a97adc8) SHA1(b52f7fdc7edf9ad92351154c01b8003c0576ed94) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -3979,7 +3979,7 @@ ROM_START( eforsta5ce )
ROM_LOAD32_WORD( "chg1536.u14", 0x300002, 0x80000, CRC(113238a6) SHA1(145467e1f015543d23bb4a377d71949693f21c34) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4012,7 +4012,7 @@ ROM_START( eforsta5cea )
ROM_LOAD32_WORD( "ahg1615.u14", 0x300002, 0x80000, CRC(961fd1b3) SHA1(59c2280258b98bc0153b6dc08d1af026de5b3ed3) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4041,7 +4041,7 @@ ROM_START( eforsta5u )
ROM_LOAD32_WORD( "jhg041503.u12", 0x100002, 0x80000, CRC(c968471f) SHA1(9d54a5c396e6f83690db2fcb7ddcc8a47a7dd777) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4070,7 +4070,7 @@ ROM_START( eforsta5ua )
ROM_LOAD32_WORD( "jhg041599.u12", 0x100002, 0x80000, CRC(c968471f) SHA1(9d54a5c396e6f83690db2fcb7ddcc8a47a7dd777) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4095,7 +4095,7 @@ ROM_START( fastfort )
ROM_LOAD32_WORD( "0100651v.u12", 0x100002, 0x80000, CRC(d591dfb6) SHA1(9a1c1070b7e8774928d684c45481d72ce5108bf1) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4124,7 +4124,7 @@ ROM_START( fortellr )
ROM_LOAD32_WORD( "01j00131.u14", 0x300002, 0x80000, CRC(507bbe10) SHA1(01b1982c02a00b60aa39ee1b408d653365f728d4) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4147,7 +4147,7 @@ ROM_START( fortfvr )
ROM_LOAD32_WORD( "bhg1566.u14", 0x300002, 0x7ffff, BAD_DUMP CRC(4fba6570) SHA1(46bb22ba10dc69c70241dfbb00e86ffa5b28fd1c) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4176,7 +4176,7 @@ ROM_START( gambler )
ROM_LOAD32_WORD( "ehg091602.u12", 0x100002, 0x80000, CRC(ebe957f9) SHA1(539945ec9beafe2c83051208370588fce2334f16) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4197,7 +4197,7 @@ ROM_START( geisha )
ROM_LOAD32_WORD( "0101408v.u13", 0x200002, 0x80000, CRC(5ef6323e) SHA1(82a720d814ca06c6d286c59bbf325d9a1034375a) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4220,7 +4220,7 @@ ROM_START( genmagi )
ROM_LOAD32_WORD( "0200894v.u14", 0x300002, 0x80000, CRC(52092ffb) SHA1(6ed591a510e9186588470ec745caf8001712012e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4251,7 +4251,7 @@ ROM_START( glizrdce )
ROM_LOAD32_WORD( "ahg1623.u14", 0x300002, 0x80000, CRC(5ceb871c) SHA1(42b8a087fa39261818dd333ea3d8c1ef269671bf) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4276,7 +4276,7 @@ ROM_START( gnomeatw )
ROM_LOAD32_WORD( "0100767v.u12", 0x100002, 0x80000, CRC(49eb3869) SHA1(d98fe385c667872f26d656a3240f557a70ba924f) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4305,7 +4305,7 @@ ROM_START( goldpyr )
ROM_LOAD32_WORD( "ahg120503.u12", 0x100002, 0x80000, CRC(8bbf45d0) SHA1(f58f28e7cc4ac225197959566d81973b5aa0e836) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4334,7 +4334,7 @@ ROM_START( goldpyra )
ROM_LOAD32_WORD( "ahg120699.u12", 0x100002, 0x80000, CRC(13021157) SHA1(6beb8dea66659b5ec9cbb8dcd921c30a621049a9) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4366,7 +4366,7 @@ ROM_START( goldpyrb )
ROM_LOAD32_WORD( "0100878v.u13", 0x200002, 0x80000, CRC(0df660be) SHA1(73d370d90655dada34f2b5b2209652632c34a22e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4393,7 +4393,7 @@ ROM_START( goldenra )
ROM_LOAD32_WORD( "0101164v.u13", 0x200002, 0x80000, CRC(8f62ccc5) SHA1(5105313192ab8dfd522b921c70b8b03a8a61ac63) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4420,7 +4420,7 @@ ROM_START( honeypot )
ROM_LOAD32_WORD( "03j00241.u13", 0x200002, 0x80000, CRC(d98e20eb) SHA1(6274ceee7ad49a9052b354d9dfc7e3cfa4e61017) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4451,7 +4451,7 @@ ROM_START( hnktonku )
ROM_LOAD32_WORD( "bhg1455.u13", 0x200002, 0x80000, CRC(18dd37fe) SHA1(432a4959886fad4f4a55de31b7cc42c51d7f2792) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4477,7 +4477,7 @@ ROM_START( incasun )
ROM_LOAD32_WORD( "0100872v.u13", 0x200002, 0x80000, CRC(00407593) SHA1(4c759fe3267b1782ae84d8ed9134295dfaa0faaf) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4504,7 +4504,7 @@ ROM_START( incasunsp )
ROM_LOAD32_WORD( "sp__0100872v.u13", 0x200002, 0x80000, CRC(6d66c6b4) SHA1(2106f2ede58bd4d09334e32a1553f02a154bb767) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4524,7 +4524,7 @@ ROM_START( incasunnz )
ROM_LOAD32_WORD( "0101108v.u13", 0x200002, 0x80000, CRC(472f4097) SHA1(5ebe72b138cdc67989db17c82979eeddc60a081e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4551,7 +4551,7 @@ ROM_START( incasunu )
ROM_LOAD32_WORD( "chg1458.u13", 0x200002, 0x80000, CRC(2e573a8d) SHA1(aa8ac4f4a427829f0a5929273c618edb4ecf7b36) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
@@ -4592,7 +4592,7 @@ ROM_START( incasunua )
ROM_LOAD32_WORD( "dhg1577.u13", 0x200002, 0x80000, CRC(f7c30ef9) SHA1(44d7213e1220d6b89715408d009ef1484de2696f) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4619,7 +4619,7 @@ ROM_START( incasunv )
ROM_LOAD32_WORD( "01j01946.u13", 0x200002, 0x80000, CRC(0efdd830) SHA1(de0be1cd3f691299f48d7a184df6bb59fef22de2) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4644,7 +4644,7 @@ ROM_START( indrema5 )
ROM_LOAD32_WORD( "0100845v.u12", 0x100002, 0x80000, CRC(4bbe67f6) SHA1(928f88387da66697f1de54f086531f600f80a15e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4670,7 +4670,7 @@ ROM_START( indrema5ql )
ROM_LOAD32_WORD( "0101340v.u13", 0x200002, 0x80000, CRC(7ec9557e) SHA1(8f143c1ee1c82d822ff66ec5b3dac03b0c911223) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4688,7 +4688,7 @@ ROM_START( jumpbean )
ROM_LOAD32_WORD( "0100161v.u12", 0x100002, 0x7fa54, BAD_DUMP CRC(d1d6cfba) SHA1(8c8ee5a97bc3c8cd21cd291701cebf214ca388f3) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4713,7 +4713,7 @@ ROM_START( jumpjoey )
ROM_LOAD32_WORD( "0100383v.u12", 0x100002, 0x80000, CRC(defce2e9) SHA1(95f88f8647c52f99dceb4920780696d7f7c1c24b) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4742,7 +4742,7 @@ ROM_START( jungjuic )
ROM_LOAD32_WORD( "0200240v.u12", 0x100002, 0x80000, CRC(ffa3d0ba) SHA1(e60e01d4d425aea483387fa2f9ae5bb69b80f829) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4768,7 +4768,7 @@ ROM_START( kgalah )
ROM_LOAD32_WORD( "0200536v.u12", 0x100002, 0x80000, CRC(15d5bfb4) SHA1(7c48dabfd83cc30fe2ffd0b4de63fbc9dc56ee2f) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4794,7 +4794,7 @@ ROM_START( kgalaha )
ROM_LOAD32_WORD( "0100536v.u12", 0x100002, 0x80000, CRC(ddde1739) SHA1(d2dec30baef8b43b2f3bc1d572353b5afe01be4b) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4826,7 +4826,7 @@ ROM_START( kgalahce )
ROM_LOAD32_WORD( "ahg1625.u14", 0x300002, 0x80000, CRC(499419db) SHA1(6df8c7a9a69d60e746eb266127647327d4b88919) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4851,7 +4851,7 @@ ROM_START( kgbirda5 )
ROM_LOAD32_WORD( "0200024v.u12", 0x100002, 0x80000, CRC(df176c5a) SHA1(dcaecdefb7c880b9425a6445dbed969968fe3d1c) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4881,7 +4881,7 @@ ROM_START( koalamnt )
ROM_LOAD32_WORD( "chg1573.u14", 0x300002, 0x80000, CRC(5e4776e9) SHA1(d44851cbfaa054cd5675a841a3089a8f4fdc8421) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4906,7 +4906,7 @@ ROM_START( kookabuk )
ROM_LOAD32_WORD( "0100677v.u12", 0x100002, 0x80000, CRC(b2f2fd15) SHA1(9614f3ae6e82a40ecf44090d0b8d7bd8b6b1f830) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4938,7 +4938,7 @@ ROM_START( kyhatonu )
ROM_LOAD32_WORD( "bhg1204.u14", 0x300002, 0x80000, CRC(490a9eb5) SHA1(30df13960614f82deac5426ff754885ffb429603) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4960,7 +4960,7 @@ ROM_START( locoloot )
ROM_LOAD32_WORD( "0100473v.u11", 0x000002, 0x80000, CRC(0c0c2697) SHA1(0fc1dec8fba488a4b59c81b5bab7a11d62be2599) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -4982,7 +4982,7 @@ ROM_START( locoloota )
ROM_LOAD32_WORD( "0100472v.u11", 0x000002, 0x80000, CRC(21332a1a) SHA1(76a4c30d1c9624984175e9bd117c68c9204f01df) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5000,7 +5000,7 @@ ROM_START( locolootnz )
ROM_LOAD32_WORD( "0600725v.u12", 0x100002, 0x80000, CRC(29f03505) SHA1(c173167f43cc2eef0e063118e03bc37a87188391) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5027,7 +5027,7 @@ ROM_START( locolootu )
ROM_LOAD32_WORD( "ahg1513.u12", 0x100002, 0x80000, CRC(5bf7b4b1) SHA1(2282ec8d0ddd1aea715005fba2171468831513f4) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5049,7 +5049,7 @@ ROM_START( lonewolf )
ROM_LOAD32_WORD( "0100587v.u11", 0x000002, 0x80000, CRC(0ed6fb6b) SHA1(a2baa4154fe762e2c1b40a97b2d27265df8b5dab) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5071,7 +5071,7 @@ ROM_START( luckyclo )
ROM_LOAD32_WORD( "0300109v.u11", 0x000002, 0x80000, CRC(4be1cdef) SHA1(8633077a6ddde80b2e7a3c4439ccb5a3f2b83695) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5099,7 +5099,7 @@ ROM_START( mgarden )
ROM_LOAD32_WORD( "ahg121199.u12", 0x100002, 0x80000, CRC(4b252c2c) SHA1(8be41fb2b8f8d2829c18ea123a02f3e61c136206) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5127,7 +5127,7 @@ ROM_START( magimask )
ROM_LOAD32_WORD( "ahg1549.u12", 0x100002, 0x80000, CRC(d008deab) SHA1(fd544767356bfdf44ec4af7218c9f2990581e620) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5154,7 +5154,7 @@ ROM_START( magimaska )
ROM_LOAD32_WORD( "ahg1548.u12", 0x100002, 0x80000, CRC(cf4cd569) SHA1(408edcd746587d249c4286f7a99f33ad94214f7c) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
@@ -5195,7 +5195,7 @@ ROM_START( magimaskb )
ROM_LOAD32_WORD( "dhg1309.u12", 0x100002, 0x80000, CRC(6829a7bf) SHA1(97eed83763d0ec5e753d6ad194e906b1307c4940) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
@@ -5228,7 +5228,7 @@ ROM_START( magtcha5 )
ROM_LOAD32_WORD( "0300455v.u13", 0x200002, 0x80000, CRC(5e54ed88) SHA1(5fe9a74e210bc2c1b158e7a3bb01fdcc96ea0075) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5250,7 +5250,7 @@ ROM_START( magtcha5a )
ROM_LOAD32_WORD( "0200455v.u13", 0x200002, 0x80000, CRC(cfd2a86e) SHA1(66891a1b0e85ad7146b733f4b5d806db789d8821) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5275,7 +5275,7 @@ ROM_START( mammothm )
ROM_LOAD32_WORD( "0100425v.u12", 0x100002, 0x80000, CRC(58171e9b) SHA1(7f375aeb8cabe22fcc6f61cac5ef6f72f0c99899) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5302,7 +5302,7 @@ ROM_START( marmagic )
ROM_LOAD32_WORD( "01j00101.u13", 0x200002, 0x80000, CRC(3f702945) SHA1(a6c9a848d059c1e564fdc5a65bf8c9600853edfa) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5333,7 +5333,7 @@ ROM_START( marmagicu )
ROM_LOAD32_WORD( "ehg1558.u14", 0x300002, 0x80000, CRC(a2096cb3) SHA1(c2bba35396f9c83b17d692a384b6406f3441c8f5) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5365,7 +5365,7 @@ ROM_START( marmagicua )
ROM_LOAD32_WORD( "ehg1559.u14", 0x300002, 0x80000, CRC(bdfdc0e4) SHA1(0e56f08abc0cdd9dfa5d8e51bb6fe06fa356b3b3) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5390,7 +5390,7 @@ ROM_START( minemine )
ROM_LOAD32_WORD( "0400115v.u12", 0x100002, 0x80000, CRC(b0607ccf) SHA1(f7b35d02170620060c8cdf90b9cb6aac86e26a52) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5417,7 +5417,7 @@ ROM_START( minemineu )
ROM_LOAD32_WORD( "vhg041699.u12", 0x100002, 0x80000, CRC(26c01532) SHA1(ec68ad44b703609c7bc27275f8d9250a16d9067c) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
@@ -5458,7 +5458,7 @@ ROM_START( minemineua )
ROM_LOAD32_WORD( "nhg0416.u12", 0x100002, 0x80000, CRC(fc3f18ff) SHA1(f2afc6bdd7a702e4ac4037749613ac4a40446511) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5483,7 +5483,7 @@ ROM_START( monmouse )
ROM_LOAD32_WORD( "0400469v.u12", 0x100002, 0x80000, CRC(72d992ed) SHA1(94560305dacbe776ddc95114ad5e5ffaa234937c) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5509,7 +5509,7 @@ ROM_START( monmousea )
ROM_LOAD32_WORD( "0300469v.u12", 0x100002, 0x80000, CRC(2be9bce0) SHA1(3768e616e4f03f253074e1f06aa628181db9dce8) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5529,7 +5529,7 @@ ROM_START( montree )
ROM_LOAD32_WORD( "0201397v.u13", 0x200002, 0x80000, CRC(e1f23c3f) SHA1(fe74c219c738625257fb62806e271a60075aaa07) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5551,7 +5551,7 @@ ROM_START( mountmon )
ROM_LOAD32_WORD( "0100294v.u11", 0x000002, 0x80000, CRC(4fb2a4dc) SHA1(23895b701387f7442a31969989d21cefe2a25efd) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5573,7 +5573,7 @@ ROM_START( mountmona )
ROM_LOAD32_WORD( "0100289v.u11", 0x000002, 0x80000, CRC(565b76ff) SHA1(559d4ec4f1a727cd293d842b7f777c99dcf488bc) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5597,7 +5597,7 @@ ROM_START( mountmonce )
ROM_LOAD32_WORD( "ahg1629.u14", 0x300002, 0x7ffff, BAD_DUMP CRC(57f31de5) SHA1(aceb1d700c3b41e29e0abd613d59008d7dc259c9) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5620,7 +5620,7 @@ ROM_START( mountmonu )
ROM_LOAD32_WORD( "bhg1465.u14", 0x300002, 0x80000, CRC(62f9b2af) SHA1(bddf24c7a412e911cf75316723f3139be99acbdd) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5651,7 +5651,7 @@ ROM_START( mountmonua )
ROM_LOAD32_WORD( "bhg1464.u14", 0x300002, 0x80000, CRC(5b1e5888) SHA1(4cfb0a7af2553037fed650085bbe11e3d043797b) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5678,7 +5678,7 @@ ROM_START( multidrw )
ROM_LOAD32_WORD( "0200956v.u13", 0x200002, 0x80000, CRC(0d6f7ec5) SHA1(0a80257eb464e50292554f45583f3d7b85de2bc3) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5700,7 +5700,7 @@ ROM_START( mystgard )
ROM_LOAD32_WORD( "0100275v.u11", 0x000002, 0x80000, CRC(6e618fc5) SHA1(a02e7ca2433cf8128d74792833d9708a3ba5df4b) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5720,7 +5720,7 @@ ROM_START( one4all )
ROM_LOAD32_WORD( "0101503v.u13", 0x200002, 0x80000, CRC(3b116e0d) SHA1(5df873c00c1103304c2cb77cedf05a5db83ece29) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5746,7 +5746,7 @@ ROM_START( orchidms )
ROM_LOAD32_WORD( "0200849v.u12", 0x100002, 0x80000, CRC(165a762d) SHA1(8487d2e32bd2fab5a9114380ba2be6d34b097b11) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5773,7 +5773,7 @@ ROM_START( orchidmsa )
ROM_LOAD32_WORD( "0100849v.u12", 0x100002, 0x80000, CRC(4b5baf9d) SHA1(2fd13cbb22aff14936cbe2da582a0aa3984ab4a2) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5791,7 +5791,7 @@ ROM_START( orchidmsnz )
ROM_LOAD32_WORD( "0101241v.u12", 0x100002, 0x80000, CRC(141e2b47) SHA1(e311693d730bfff99ad75995e47606e9822ba722) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5813,7 +5813,7 @@ ROM_START( oscara5 )
ROM_LOAD32_WORD( "0200348v.u11", 0x000002, 0x80000, CRC(11394e80) SHA1(1c6e7e954a6118e04da9d761fef8ec00c46d2af8) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5839,7 +5839,7 @@ ROM_START( oscara5a )
ROM_LOAD32_WORD( "0100348v.u12", 0x100002, 0x80000, CRC(fd1c5c7b) SHA1(61b29459e39912ea3c2bf290e1f3061ce13ea648) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5864,7 +5864,7 @@ ROM_START( pantmag )
ROM_LOAD32_WORD( "0101046v.u12", 0x100002, 0x80000, CRC(eae75fa9) SHA1(576c8cf98ad4032bbdde12162e2c1bdd10056762) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5889,7 +5889,7 @@ ROM_START( pantmaga )
ROM_LOAD32_WORD( "0100716v.u12", 0x100002, 0x80000, CRC(6adfd0ab) SHA1(3b6479bcd95812f5678a27adc7decbc881cd6caa) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5918,7 +5918,7 @@ ROM_START( partygrs )
ROM_LOAD32_WORD( "ahg1567.u12", 0x100002, 0x80000, CRC(00d1395c) SHA1(d9a66d6cdb5aa4f583d8c23306b1416646cbde93) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
@@ -5958,7 +5958,7 @@ ROM_START( partygrsa )
ROM_LOAD32_WORD( "bhg1284.u12", 0x100002, 0x80000, CRC(090ce72f) SHA1(a4783ca84aabd365613357a53a19a3dd48f4df0c) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -5978,7 +5978,7 @@ ROM_START( partygrsb )
ROM_LOAD32_WORD( "ahg1568.u12", 0x100002, 0x7f7da, BAD_DUMP CRC(43764888) SHA1(cfd59692f17e9ca70dc882423238f6de59dafbed) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6003,7 +6003,7 @@ ROM_START( peaflut )
ROM_LOAD32_WORD( "02j00011.u12", 0x100002, 0x80000, CRC(2d96c449) SHA1(af98a864b9ed3f95227fd0d6edc6a38c0544c93f) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6028,7 +6028,7 @@ ROM_START( pengpay )
ROM_LOAD32_WORD( "0200460v.u12", 0x100002, 0x80000, CRC(90864742) SHA1(f6491e4fbce5d642b9d0224118923b56625338b1) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6053,7 +6053,7 @@ ROM_START( pengpaya )
ROM_LOAD32_WORD( "0200357v.u12", 0x100002, 0x80000, CRC(123cbe90) SHA1(b51b84f79e0822a1be71485bbad514ab9fa55622) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6079,7 +6079,7 @@ ROM_START( pengpayb )
ROM_LOAD32_WORD( "0200359v.u12", 0x100002, 0x80000, CRC(d2882682) SHA1(dd42edca8ef9d28dd5b16fe8132f8e0fb3c85979) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6104,7 +6104,7 @@ ROM_START( pengpayc )
ROM_LOAD32_WORD( "0200113v.u12", 0x100002, 0x80000, CRC(a1865467) SHA1(572558bab639145c8260884a95646fc424687b47) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6122,7 +6122,7 @@ ROM_START( pengpayd )
ROM_LOAD32_WORD( "0300113v.u12", 0x100002, 0x7fb27, BAD_DUMP CRC(7206dc37) SHA1(4d2f8551daeb4be13e73e3123e158dc1e1e4e067) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6150,7 +6150,7 @@ ROM_START( pengpayu )
ROM_LOAD32_WORD( "bhi041703.u12", 0x100002, 0x80000, CRC(d959a048) SHA1(92f69090d599f95b48e79213e5b7d486e083d8f4) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
@@ -6190,7 +6190,7 @@ ROM_START( pengpayua )
ROM_LOAD32_WORD( "ohg041703.u12", 0x100002, 0x80000, CRC(9eae7f7b) SHA1(23bd952de1d6d5d69e5565cc2bc241c2cd775453) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6218,7 +6218,7 @@ ROM_START( pengpayub )
ROM_LOAD32_WORD( "ohg041702.u12", 0x100002, 0x80000, CRC(9eae7f7b) SHA1(23bd952de1d6d5d69e5565cc2bc241c2cd775453) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6251,7 +6251,7 @@ ROM_START( pengpayce )
ROM_LOAD32_WORD( "ahg1544.u14", 0x300002, 0x80000, CRC(4ef4f063) SHA1(d6e9928f80f19d3fdd0e7acb0bfb6f9b2ae5724b) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6282,7 +6282,7 @@ ROM_START( pengpuck )
ROM_LOAD32_WORD( "ehg1257.u14", 0x300002, 0x80000, CRC(b6cb5809) SHA1(84288a41d2a3980bf68e9a32b9402652ac6a16d6) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6307,7 +6307,7 @@ ROM_START( penpir )
ROM_LOAD32_WORD( "0100674v.u12", 0x100002, 0x80000, CRC(acdbbbe6) SHA1(5909135163af18c3ecd84934612e3751ca62ae74) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6332,7 +6332,7 @@ ROM_START( penpira )
ROM_LOAD32_WORD( "0200578v.u12", 0x100002, 0x80000, CRC(7ea30a52) SHA1(70d7640ea237197be4b2b8c64c2a97ad7b608cc0) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6365,7 +6365,7 @@ ROM_START( penpir2 )
ROM_LOAD32_WORD( "0100869v.u13", 0x200002, 0x80000, CRC(e1dbfd58) SHA1(687b7254279734e1835e1713d032b5aa2cf70812) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6390,7 +6390,7 @@ ROM_START( petshop )
ROM_LOAD32_WORD( "0100731v.u12", 0x100002, 0x80000, CRC(6e74cd57) SHA1(9092e656cbd8627b208b81ca0d737483a779bce1) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6407,7 +6407,7 @@ ROM_START( petshopa )
ROM_LOAD32_WORD( "0100679v.u12", 0x100002, 0x80000, BAD_DUMP CRC(2cd12986) SHA1(b6b0bd6dd8c964498edc3763cb5c450795042a8d) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6432,7 +6432,7 @@ ROM_START( phantpay )
ROM_LOAD32_WORD( "0500005v.u12", 0x100002, 0x80000, CRC(d43a092a) SHA1(5f851bd179b14ef3983b460ed932810f3713d3e5) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6459,7 +6459,7 @@ ROM_START( przfight )
ROM_LOAD32_WORD( "0100299v.u13", 0x200002, 0x80000, CRC(c16197d5) SHA1(716c4afdf2acde10ff09ad90b03bc5e689f0a737) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6484,7 +6484,7 @@ ROM_START( qcash )
ROM_LOAD32_WORD( "0100706v.u12", 0x100002, 0x80000, CRC(bfedb3fc) SHA1(e115db94b8ee7babb29e31e64b96d181f5c6491b) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6510,7 +6510,7 @@ ROM_START( qnile )
ROM_LOAD32_WORD( "0300439v.u12", 0x100002, 0x80000, CRC(eec01bb4) SHA1(146fdce6b32a21659dc775e4a5f3bb027bd09825) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6536,7 +6536,7 @@ ROM_START( qnilea )
ROM_LOAD32_WORD( "0200439v.u12", 0x100002, 0x80000, CRC(2a0f7feb) SHA1(27c89dadf759e6c892121650758c44ec50990cb6) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6562,7 +6562,7 @@ ROM_START( qnileb )
ROM_LOAD32_WORD( "0100439v.u12", 0x100002, 0x80000, CRC(bdcec4eb) SHA1(ef3658460263cd2e68e10015efdc016ad705213e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6596,7 +6596,7 @@ ROM_START( qnilebr )
ROM_LOAD32_WORD( "0101707v.u13", 0x200002, 0x80000, CRC(1b5da8ca) SHA1(9a6cfbadba24677a0d82a61ffdc25772ecbac287) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6621,7 +6621,7 @@ ROM_START( qnilec )
ROM_LOAD32_WORD( "0300440v.u12", 0x100002, 0x80000, CRC(52bd3694) SHA1(bcfa3054c7577f7a1653b756828d048a5f1776e7) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6652,7 +6652,7 @@ ROM_START( qnilece )
ROM_LOAD32_WORD( "ahg1609.u14", 0x300002, 0x80000, CRC(fe7817f3) SHA1(a3579ed7ce6d999b0f71482f2a2e3ade693668fb) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6684,7 +6684,7 @@ ROM_START( qnilecea )
ROM_LOAD32_WORD( "ahg1525.u14", 0x300002, 0x80000, CRC(520452d4) SHA1(6d501b82a7b35a6e53a0991cbc384b752a295edf) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6717,7 +6717,7 @@ ROM_START( qnileceb )
ROM_LOAD32_WORD( "ahg1608.u14", 0x300002, 0x80000, CRC(4d0f1d12) SHA1(980775e628e9508398cb5227af10ed9ff0555b8a) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6744,7 +6744,7 @@ ROM_START( qniled )
ROM_LOAD32_WORD( "0101139v.u13", 0x200002, 0x80000, CRC(160fbbb5) SHA1(fe2ce9b915b0dfcbc60deed30a95550a21a18127) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6771,7 +6771,7 @@ ROM_START( qnilefl )
ROM_LOAD32_WORD( "0101670v.u13", 0x200002, 0x80000, CRC(715e7789) SHA1(b734aa88e7e65fba988e7fffd711039c4f554b2c) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6800,7 +6800,7 @@ ROM_START( qnilemax )
ROM_LOAD32_WORD( "0401072v.u14", 0x300002, 0x80000, CRC(4fbccf72) SHA1(97d6bb400caf78cb673a324d48d2580f1bbb1acd) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6825,7 +6825,7 @@ ROM_START( qnilenl )
ROM_LOAD32_WORD( "0301059v.u12", 0x100002, 0x80000, CRC(e505912a) SHA1(ae71aa6d56d424383add3b9cbc17473ab0a13bdc) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6846,7 +6846,7 @@ ROM_START( qnilenz )
ROM_LOAD32_WORD( "0300785v.u13", 0x200002, 0x80000, CRC(b267d25a) SHA1(8065601190540e5f0b4a91fed1deffcdb2606f94) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6871,7 +6871,7 @@ ROM_START( qnileql )
ROM_LOAD32_WORD( "0201200v.u12", 0x100002, 0x80000, CRC(38332f4e) SHA1(53c90103df06e5a28bbaf32504a0984b7c65bec7) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6899,7 +6899,7 @@ ROM_START( qnileu )
ROM_LOAD32_WORD( "ghg409102.u12", 0x100002, 0x80000, CRC(7871a846) SHA1(ac1d741092afda842e1864f1a7a14137a9ee46d9) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
@@ -6942,7 +6942,7 @@ ROM_START( qnileua )
ROM_LOAD32_WORD( "ghg4091.u12", 0x100002, 0x80000, CRC(7871a846) SHA1(ac1d741092afda842e1864f1a7a14137a9ee46d9) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6969,7 +6969,7 @@ ROM_START( qnilev )
ROM_LOAD32_WORD( "04j00784.u12", 0x100002, 0x80000, CRC(621adc77) SHA1(2fecef64139c502b0baee5c945fe5671532aacab) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -6994,7 +6994,7 @@ ROM_START( qtbird )
ROM_LOAD32_WORD( "0500009v.u12", 0x100002, 0x80000, CRC(bb8344a9) SHA1(8b0e904b937c7f34470ad946076240b0c54bf434) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7024,7 +7024,7 @@ ROM_START( rainwrce )
ROM_LOAD32_WORD( "0101332v.u14", 0x300002, 0x80000, CRC(92274626) SHA1(fae8d89efba9bf3d171bfe484015d009786ce40d) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7049,7 +7049,7 @@ ROM_START( reelpwr )
ROM_LOAD32_WORD( "0100400v.u12", 0x100002, 0x80000, CRC(e6033756) SHA1(82603f02fcec2b01f5a1cfc13d50129669e84dc7) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7075,7 +7075,7 @@ ROM_START( reelrock )
ROM_LOAD32_WORD( "0100779v.u12", 0x100002, 0x80000, CRC(4ac20679) SHA1(0ac732ffe6a33806e4a06e87ec875a3e1314e06b) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7102,7 +7102,7 @@ ROM_START( reelrockql )
ROM_LOAD32_WORD( "0101460v.u13", 0x200002, 0x80000, NO_DUMP )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7127,7 +7127,7 @@ ROM_START( retrsam )
ROM_LOAD32_WORD( "0400549v.u12", 0x100002, 0x80000, CRC(fdf22d5b) SHA1(664fa003a350c0a3b515b7c384d32176158c2d3e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7150,7 +7150,7 @@ ROM_START( retrsama )
ROM_LOAD32_WORD( "0200549v.u11", 0x000002, 0x80000, CRC(99f61822) SHA1(88a726a5c9cae3a7d3120cb9013ca4d38ef8c560) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7172,7 +7172,7 @@ ROM_START( retrsamb )
ROM_LOAD32_WORD( "0200506v.u11", 0x000002, 0x80000, CRC(e662404b) SHA1(f0da3384c81d01ec17d24b2191d3a0b0eaf48d12) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7199,7 +7199,7 @@ ROM_START( rushrst )
ROM_LOAD32_WORD( "0200534v.u13", 0x200002, 0x80000, CRC(dfe02424) SHA1(798ce31ef23cf5bd7d5b04dc21ffd99b2f6243b3) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7225,7 +7225,7 @@ ROM_START( sbuk2 )
ROM_LOAD32_WORD( "0400501v.u12", 0x100002, 0x80000, CRC(f9b65d2b) SHA1(f519fc284aaa08d3619e4d88e92e690320cf5432) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7244,7 +7244,7 @@ ROM_START( sbuk2a )
ROM_LOAD32_WORD( "0300006v.u12", 0x100002, 0x80000, NO_DUMP )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7269,7 +7269,7 @@ ROM_START( sbuk3 )
ROM_LOAD32_WORD( "0200711v.u12", 0x100002, 0x80000, CRC(a585172d) SHA1(3c74efb11285ff78ce76a7e8af2f936d3dc31290) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7295,7 +7295,7 @@ ROM_START( sbuk3a )
ROM_LOAD32_WORD( "0100711v.u12", 0x100002, 0x80000, CRC(0ce0ba8d) SHA1(7fc6ee6281bb3c474fa0cf4d879e735ae03bb1ed) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7325,7 +7325,7 @@ ROM_START( sldeluxe )
ROM_LOAD32_WORD( "ahg1575.u14", 0x300002, 0x80000, CRC(bd890100) SHA1(c82b2891287429a3e77ccaf9b66139f0548f1902) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7350,7 +7350,7 @@ ROM_START( slvrwolf )
ROM_LOAD32_WORD( "0100673v.u12", 0x100002, 0x80000, CRC(122816dd) SHA1(5c37b29179262a79d8c68c92035ff14fc2885150) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7372,7 +7372,7 @@ ROM_START( snowcat )
ROM_LOAD32_WORD( "0100405v.u11", 0x000002, 0x80000, CRC(9f9e2637) SHA1(3d4992cec760360931bc5de400c7a27329f8b953) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7397,7 +7397,7 @@ ROM_START( sumospin )
ROM_LOAD32_WORD( "0200606v.u12", 0x100002, 0x80000, CRC(ba3eede2) SHA1(708a25af0908a1aa874b3ca4897816c65b0c9178) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7419,7 +7419,7 @@ ROM_START( swhr2 )
ROM_LOAD32_WORD( "0200465v.u11", 0x000002, 0x80000, CRC(dcf51719) SHA1(1ea07091ce22245f77b6de5dcd994efb94c4ba58) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7442,7 +7442,7 @@ ROM_START( swhr2a )
ROM_LOAD32_WORD( "0200004v.u11", 0x000002, 0x80000, CRC(bde067d7) SHA1(cbf2cbd0644f1daeb5c3cd08d72f3d7aafe521ec) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7471,7 +7471,7 @@ ROM_START( swhr2u )
ROM_LOAD32_WORD( "phg074202.u12", 0x100002, 0x80000, CRC(885cde6c) SHA1(a6ccf94ecdae2092a703075c9917d0b4004efa52) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7494,7 +7494,7 @@ ROM_START( swhr2v )
ROM_LOAD32_WORD( "01j01986.u11", 0x000002, 0x80000, CRC(bd7ead91) SHA1(9f775428a4aa0b0a8ee17aed9be620edc2020c5e) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7519,7 +7519,7 @@ ROM_START( thor )
ROM_LOAD32_WORD( "0200319v.u12", 0x100002, 0x80000, CRC(a4b27820) SHA1(75bb554300372c8bccea79ab55aa60688b7597fa) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7544,7 +7544,7 @@ ROM_START( thndh )
ROM_LOAD32_WORD( "0200333v.u12", 0x100002, 0x80000, CRC(522b0459) SHA1(d9f0e94223897ef8935558593b1d261ad953a3ec) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7569,7 +7569,7 @@ ROM_START( thndha )
ROM_LOAD32_WORD( "0200334v.u12", 0x100002, 0x80000, CRC(77c0d46d) SHA1(a183eca1ebdc305dce75caa311635ec98477909d) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7591,7 +7591,7 @@ ROM_START( topbana )
ROM_LOAD32_WORD( "0100550v.u11", 0x000002, 0x80000, CRC(1c64b3b6) SHA1(80bbc6e3f47ab932e9c07e0c6063197a2d8e81f7) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7620,7 +7620,7 @@ ROM_START( toutango )
ROM_LOAD32_WORD( "0100782v.u14", 0x300002, 0x80000, CRC(69f2acde) SHA1(cda52548e675a06677a2d9fee89b33f9abb96f64) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7648,7 +7648,7 @@ ROM_START( toutangonl )
ROM_LOAD32_WORD( "0301388v.u14", 0x300002, 0x80000, CRC(fbb37975) SHA1(648b56df5047b8ae60b41bdf29f35f8bf8fe2d29) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7673,7 +7673,7 @@ ROM_START( trstrove )
ROM_LOAD32_WORD( "01j00161.u12", 0x100002, 0x80000, CRC(715f53cb) SHA1(364c35fc2d36180c13127c8004a8729126f68db1) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7700,7 +7700,7 @@ ROM_START( tritreat )
ROM_LOAD32_WORD( "0201692v.u13", 0x200002, 0x80000, CRC(0a0b0ce1) SHA1(41a4d613cf1828df1832c087f0bc18d31076f056) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7727,7 +7727,7 @@ ROM_START( trojhors )
ROM_LOAD32_WORD( "01j00851.u13", 0x200002, 0x80000, CRC(b6d1ceb6) SHA1(b41200620aaa905697ac73b4c86496a53f070ed3) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7752,7 +7752,7 @@ ROM_START( trpdlght )
ROM_LOAD32_WORD( "0100269v.u12", 0x100002, 0x80000, CRC(88978d4e) SHA1(cd2b747fd858f7d84b889bf87865c4fbb349e1b7) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7781,7 +7781,7 @@ ROM_START( trpdlghtu )
ROM_LOAD32_WORD( "phg062502.u12", 0x100002, 0x80000, CRC(0190804b) SHA1(7acb29fb7f77e78bb2afeb74d341475cd089dafb) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7806,7 +7806,7 @@ ROM_START( unicornd )
ROM_LOAD32_WORD( "0100791v.u12", 0x100002, 0x80000, CRC(14afdeda) SHA1(1eb2a297e903dc1a0683425b37669e0af4ae4218) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7831,7 +7831,7 @@ ROM_START( unicornda )
ROM_LOAD32_WORD( "0100813v.u12", 0x100002, 0x80000, CRC(b712dcd1) SHA1(f4080185f909d385e93edc73954d05de1dc6aa65) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7849,7 +7849,7 @@ ROM_START( unicorndnz )
ROM_LOAD32_WORD( "0101228v.u12", 0x100002, 0x80000, CRC(00d4cd6e) SHA1(eb941164cf421f22bcc9864f198348c4f30d904c) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7876,7 +7876,7 @@ ROM_START( unicorndu )
ROM_LOAD32_WORD( "bhg1584.u12", 0x100002, 0x80000, CRC(c1e878b5) SHA1(4e4e9dee4d85fbb77dc6f7d39c2dc5b0bf438aef) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7903,7 +7903,7 @@ ROM_START( venicea5 )
ROM_LOAD32_WORD( "02j02056.u14", 0x300002, 0x80000, CRC(7b695bf3) SHA1(89ea3252c9915aab81a85c6c028b21911bf8b4c4) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7931,7 +7931,7 @@ ROM_START( wafricau )
ROM_LOAD32_WORD( "ahg1535.u12", 0x100002, 0x80000, CRC(f569843c) SHA1(ccf1b727ad1dc49bca609ee0887b36a29223cace) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7953,7 +7953,7 @@ ROM_START( wamazon )
ROM_LOAD32_WORD( "0200507v.u11", 0x000002, 0x80000, CRC(2e24756a) SHA1(247db8316e7815be7524aefc43a5756fad84779a) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -7978,7 +7978,7 @@ ROM_START( wamazona )
ROM_LOAD32_WORD( "0200285v.u12", 0x100002, 0x80000, CRC(fdb10dd3) SHA1(cbf4fe97c75652f83b8ddb929b06941a70b36388) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8004,7 +8004,7 @@ ROM_START( wamazonv )
ROM_LOAD32_WORD( "01j01996.u12", 0x100002, 0x80000, CRC(945e0a05) SHA1(db7580b39c537a7b50898ee99cfceb5eb71be19a) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8029,7 +8029,7 @@ ROM_START( wikwin )
ROM_LOAD32_WORD( "0100553v.u12", 0x100002, 0x80000, CRC(06cf5d68) SHA1(5469e8087371f8b59fd9b2b413682efe2ea0f279) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8051,7 +8051,7 @@ ROM_START( wildbill )
ROM_LOAD32_WORD( "0100297v.u11", 0x000002, 0x80000, CRC(57b3c340) SHA1(4f95ed7fed697cf2bfbde8215f6e35768cf20334) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8076,7 +8076,7 @@ ROM_START( wcougar )
ROM_LOAD32_WORD( "0100167v.u12", 0x100002, 0x80000, CRC(85bb41a7) SHA1(335f29f10f216e202b93b46a376958c3f5271461) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8103,7 +8103,7 @@ ROM_START( wcougaru )
ROM_LOAD32_WORD( "nhg029604.u12", 0x100002, 0x80000, CRC(fe2bafdc) SHA1(e8b454db44a532d75b3aff323855340695688f0f) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
@@ -8144,7 +8144,7 @@ ROM_START( wcougarua )
ROM_LOAD32_WORD( "nhg029607.u12", 0x100002, 0x80000, CRC(fe2bafdc) SHA1(e8b454db44a532d75b3aff323855340695688f0f) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8172,7 +8172,7 @@ ROM_START( wcougarub )
ROM_LOAD32_WORD( "nhg029699.u12", 0x100002, 0x80000, CRC(fe2bafdc) SHA1(e8b454db44a532d75b3aff323855340695688f0f) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8201,7 +8201,7 @@ ROM_START( wcougaruc )
ROM_LOAD32_WORD( "ahg1531.u12", 0x100002, 0x80000, CRC(5aac8336) SHA1(d1bfd21579bdcf5b46e0f4db1181d10159f0b643) ) // base
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8220,7 +8220,7 @@ ROM_START( wcoyote )
ROM_LOAD32_WORD( "ahg1515.u12", 0x100002, 0x7ff14, BAD_DUMP CRC(0068bce4) SHA1(37517f6bd53660deab471f41a4d63c4b03bf22b3) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8246,7 +8246,7 @@ ROM_START( wizways )
ROM_LOAD32_WORD( "0200396v.u12", 0x100002, 0x80000, CRC(934d7286) SHA1(205f72b62d83667e9068141346bda3bcb9742a83) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8271,7 +8271,7 @@ ROM_START( wldangel )
ROM_LOAD32_WORD( "0100337v.u12", 0x100002, 0x80000, CRC(81f0d1c8) SHA1(1e91c9457593f592c0ca4a186a49b00b2cfe256f) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8298,7 +8298,7 @@ ROM_START( wnpost )
ROM_LOAD32_WORD( "rhg041804.u12", 0x100002, 0x80000, CRC(ff70b305) SHA1(3c832ed20b1d00318fd3d2428bb469735f68965b) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8323,7 +8323,7 @@ ROM_START( wthing )
ROM_LOAD32_WORD( "0101158v.u12", 0x100002, 0x80000, CRC(450a4f4f) SHA1(e59fb3260755a125c47ff6c1a042a48b0eace72d) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8343,7 +8343,7 @@ ROM_START( wthinga )
ROM_LOAD32_WORD( "0201176v.u13", 0x200002, 0x7ffdb, BAD_DUMP CRC(026317bc) SHA1(94a48b33ddc60d6271ac0a89fc86b9f1be68f9a6) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8365,7 +8365,7 @@ ROM_START( wtiger )
ROM_LOAD32_WORD( "0200954v.u11", 0x000002, 0x80000, CRC(38e888b1) SHA1(acc857eb2be19140bbb58d70583e08f24807b9f2) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
@@ -8392,7 +8392,7 @@ ROM_START( yukongl5 )
ROM_LOAD32_WORD( "03j00191.u13", 0x200002, 0x80000, CRC(e514b87f) SHA1(5423215bc03ab8468d5ebec0dba6ba7820cdcd50) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
-
+
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_END
diff --git a/src/mame/drivers/at.cpp b/src/mame/drivers/at.cpp
index 8ce15314ea9..486005b882e 100644
--- a/src/mame/drivers/at.cpp
+++ b/src/mame/drivers/at.cpp
@@ -905,7 +905,7 @@ ROM_START( ibm5170 )
ROM_SYSTEM_BIOS( 2, "landmark", "Landmark/Supersoft diagnostic ROMs") // use Hercules or MDA
ROMX_LOAD( "5170_even_u27_ 27256.bin", 0x10000, 0x8000, CRC(6790392d) SHA1(c4a5310341f346dd072d096152060ef5e4430a7f), ROM_SKIP(1) | ROM_BIOS(2))
- ROMX_LOAD( "5170_odd_u47_ 27256.bin", 0x10001, 0x8000, CRC(4c0f3db4) SHA1(97a0cf589b93551ed1d03bd622cbc8fd5634512f), ROM_SKIP(1) | ROM_BIOS(2))
+ ROMX_LOAD( "5170_odd_u47_ 27256.bin", 0x10001, 0x8000, CRC(4c0f3db4) SHA1(97a0cf589b93551ed1d03bd622cbc8fd5634512f), ROM_SKIP(1) | ROM_BIOS(2))
// ROM_SYSTEM_BIOS( 3, "atdiag", "IBM PC/AT 5170 w/Super Diagnostics")
// ROMX_LOAD( "atdiage.bin", 0xf8000, 0x4000, CRC(e8855d0c) SHA1(c9d53e61c08da0a64f43d691bf6cadae5393843a), ROM_SKIP(1) | ROM_BIOS(3))
@@ -1512,8 +1512,8 @@ ROM_START( at )
// 28: CDTEK - BIOS-String: DSUN-1202-042088-K0 286-BIOS AMI for CDTEK - ISA8:2, ISA16:6 - Chipset ICs plus SN76LS612N, RTC MC146818P
ROM_SYSTEM_BIOS(28, "cdtekchips", "CDTEK 286") // ISA8:2, ISA16: 6 - OSC: 12.000, 14.31818, 16000.00KHz
ROMX_LOAD( "286-cdtek2-even_32k.bin", 0x10000, 0x8000, CRC(94867e8d) SHA1(12e61cc8b875b57324c93276c9f6093f2bd0e277), ROM_SKIP(1) | ROM_BIOS(28) )
- ROMX_LOAD( "286-cdtek2-odd_32k.bin", 0x10001, 0x8000, CRC(153ed3bd) SHA1(10b711e0f0d79e0b6d181f24fe66544d2d72a310), ROM_SKIP(1) | ROM_BIOS(28) )
- // 29: This board looks identical to #2 but has different chips fitted: SN76LS612N = Zymos HCT612, Chips P82A204 = TACT80204FN, P82A203 = STK-5134, P82A205 = STK-5135,
+ ROMX_LOAD( "286-cdtek2-odd_32k.bin", 0x10001, 0x8000, CRC(153ed3bd) SHA1(10b711e0f0d79e0b6d181f24fe66544d2d72a310), ROM_SKIP(1) | ROM_BIOS(28) )
+ // 29: This board looks identical to #2 but has different chips fitted: SN76LS612N = Zymos HCT612, Chips P82A204 = TACT80204FN, P82A203 = STK-5134, P82A205 = STK-5135,
// P82C201 = STK-5132, P82C202 = STK-5133 - BIOS-String: Phoenix 80286 ROM BIOS Version 3.06
ROM_SYSTEM_BIOS(29, "286tact", "286 TACT") // OSC: 20.0000MHz, 14.31818 - 24.000MHz
ROMX_LOAD( "286-tact-320548-1_32k.bin", 0x10000, 0x8000, CRC(0b528d19) SHA1(15f5a94d89461655c0f74681bbae5745db009ac2), ROM_SKIP(1) | ROM_BIOS(29) )
@@ -1583,11 +1583,11 @@ ROM_START( atvga )
ROMX_LOAD( "286-at system 6m8m10m-l_32k.bin", 0x10000, 0x8000, CRC(37e0e1c1) SHA1(f5cd17658554a73bb86c5c8e630dac3e34b38e51), ROM_SKIP(1) | ROM_BIOS(15) )
ROMX_LOAD( "286-at system 6m8m10m-r_32k.bin", 0x10001, 0x8000, CRC(c672efff) SHA1(7224bb6b4d25ef34bc0aa9d7c450baf9b47fd917), ROM_SKIP(1) | ROM_BIOS(15) )
// 16: same as BIOS '28' in VGA
- ROM_SYSTEM_BIOS(16, "cdtekchips", "CDTEK 286")
+ ROM_SYSTEM_BIOS(16, "cdtekchips", "CDTEK 286")
ROMX_LOAD( "286-cdtek2-even_32k.bin", 0x10000, 0x8000, CRC(94867e8d) SHA1(12e61cc8b875b57324c93276c9f6093f2bd0e277), ROM_SKIP(1) | ROM_BIOS(16) )
- ROMX_LOAD( "286-cdtek2-odd_32k.bin", 0x10001, 0x8000, CRC(153ed3bd) SHA1(10b711e0f0d79e0b6d181f24fe66544d2d72a310), ROM_SKIP(1) | ROM_BIOS(16) )
+ ROMX_LOAD( "286-cdtek2-odd_32k.bin", 0x10001, 0x8000, CRC(153ed3bd) SHA1(10b711e0f0d79e0b6d181f24fe66544d2d72a310), ROM_SKIP(1) | ROM_BIOS(16) )
// 17: same as BIOS '29' in VGA
- ROM_SYSTEM_BIOS(17, "286tact", "286 TACT")
+ ROM_SYSTEM_BIOS(17, "286tact", "286 TACT")
ROMX_LOAD( "286-tact-320548-1_32k.bin", 0x10000, 0x8000, CRC(0b528d19) SHA1(15f5a94d89461655c0f74681bbae5745db009ac2), ROM_SKIP(1) | ROM_BIOS(17) )
ROMX_LOAD( "286-tact-320548-2_32k.bin", 0x10001, 0x8000, CRC(418aa2d0) SHA1(b6af0b8aa595d8f8de6c0fc851bf1c226dcc7ca7), ROM_SKIP(1) | ROM_BIOS(17) )
ROM_END
@@ -1619,7 +1619,7 @@ ROM_START( neat )
ROM_SYSTEM_BIOS(5, "bam1611", "VIP BAM/16-11") // OSC: 18.432 - 14.318 - 32.000MHz
ROMX_LOAD( "286-vip bam-6-11 m215100-lo_32k.bin", 0x10000, 0x8000, CRC(b51b8bc1) SHA1(a7ebbced98aca32a7f0cdf80d1b832dfeb92d5e7), ROM_SKIP(1) | ROM_BIOS(5) )
ROMX_LOAD( "286-vip bam-6-11 m215100-hi_32k.bin", 0x10001, 0x8000, CRC(46ddd5a6) SHA1(fd4267af298c7f70e062a7c4e023caf852bbf082), ROM_SKIP(1) | ROM_BIOS(5) )
- // 6: CP-805 - BIOS-String: ENET-1138-030390-K0
+ // 6: CP-805 - BIOS-String: ENET-1138-030390-K0
ROM_SYSTEM_BIOS(6, "cp805", "CP-805")
ROMX_LOAD( "286-chips ami78384 even.bin", 0x10000, 0x8000, CRC(5280fee0) SHA1(25051ad6bbccddc0738861b614dbafbca5c3bff5), ROM_SKIP(1) | ROM_BIOS(6) )
ROMX_LOAD( "286-chips ami78384 odd.bin", 0x10001, 0x8000, CRC(24526bf3) SHA1(8f8b46fe2e708fa53d0eeb44a16924cd878bdd33), ROM_SKIP(1) | ROM_BIOS(6) )
@@ -1795,7 +1795,7 @@ ROM_END
ROM_START( headg2 )
ROM_REGION( 0x20000, "bios", 0)
- // 0: 286 board with Headland GC101A-PC; GC102-PC chipset and Phoenix BIOS 2493119, ISA8: 2, ISA16: 5
+ // 0: 286 board with Headland GC101A-PC; GC102-PC chipset and Phoenix BIOS 2493119, ISA8: 2, ISA16: 5
ROM_SYSTEM_BIOS(0, "head_ph_1", "Headland/Phoenix #1") // Phoenix 80286 ROM BIOS PLUS Version 3.10.21 ((BIOS release date:: 15-01-1988)
ROMX_LOAD( "286-headland-lo_32k.bin", 0x10000, 0x8000, CRC(21b68bed) SHA1(1e4acda50b12ad463c169ba615805f5dcf257b18), ROM_SKIP(1) | ROM_BIOS(0) )
ROMX_LOAD( "286-headland-hi_32k.bin", 0x10001, 0x8000, CRC(04c8ab12) SHA1(b46c14528aca15464e4050b423c2f621a4313a85), ROM_SKIP(1) | ROM_BIOS(0) )
@@ -1823,7 +1823,7 @@ ROM_START( kma202f )
ROM_REGION(0x20000, "bios", 0)
ROMX_LOAD( "286_lo.bin", 0x10000, 0x8000, CRC(0ce69691) SHA1(6904ac54f30f2244058653aaa623804dd02b4332), ROM_SKIP(1) )
ROMX_LOAD( "286_hi.bin", 0x10001, 0x8000, CRC(1330b6f2) SHA1(691bb4a51ce3d9a026ee33c3fd02fc4e13b4a184), ROM_SKIP(1) )
-ROM_END
+ROM_END
// ***** Motherboards using the 5 chip VLSI chipset
@@ -1833,11 +1833,11 @@ ROM_START( vlsi5 )
// 0: MG Products (Japanese) - Chipset: VLSI VL82C102A; VLSI VL82C101B; VLSI VL82C104; VLSI VL82C103A; VLSI VL82C100; (VLSI 8908BT; 8906BT; 8852BT; 8907BT; 8906BT)
// BIOS: AMI 286 BIOS+ - BIOS-String: D286-9987-092588-K0 - ISA8: 2, ISA16: 8
// (BIOS release date:: 25-09-1988) (ISA8: 3, ISA16: 5)
- ROM_SYSTEM_BIOS(0, "286vlsij", "Japanese 286 VLSI")
+ ROM_SYSTEM_BIOS(0, "286vlsij", "Japanese 286 VLSI")
ROMX_LOAD( "286-vlsi_japan-2-even_32k.bin", 0x10000, 0x8000, CRC(e3e64cbc) SHA1(5259e3c8686f2239a5fb0dc38aa80380ef9ec5fa), ROM_SKIP(1) | ROM_BIOS(0) )
ROMX_LOAD( "286-vlsi_japan-2-odd_32k.bin", 0x10001, 0x8000, CRC(aa533f39) SHA1(d88c7d4029a283b94b99e2017d29fbf9eb9105b1), ROM_SKIP(1) | ROM_BIOS(0) )
// 1: BIOS-String: D286-1223-121589-K0 - 286-BIOS AMI for MBVLSI-168 - ISA8: 3, ISA16: 5
- ROM_SYSTEM_BIOS(1, "mbvlsi168", "MBVLSI-168")
+ ROM_SYSTEM_BIOS(1, "mbvlsi168", "MBVLSI-168")
ROMX_LOAD( "286-vlsi-002350-041_32k.bin", 0x10000, 0x8000, CRC(0e0e2bc9) SHA1(0af05b15ea8141ece84fb4420e6a21720f01c7a6), ROM_SKIP(1) | ROM_BIOS(1) )
ROMX_LOAD( "286-vlsi-002350-042_32k.bin", 0x10001, 0x8000, CRC(5ef7b91d) SHA1(d57c7f4c8d28708f128c5f0b1251d5943c7cdf76), ROM_SKIP(1) | ROM_BIOS(1) )
ROM_END
@@ -1866,7 +1866,7 @@ ROM_END
// SUNTAC Chipset, http://toastytech.com/manuals/Magitronic%20B233%20Manual.pdf
// SUNTAC ST62BC002-B, ST62BC005-B, ST62BC003-B, ST62BC001-B, ST62C00B, ST62BC004-B1
ROM_START( magb233 )
- ROM_REGION(0x20000, "bios", 0) // BIOS-String: DSUN-1105-043089-K0
+ ROM_REGION(0x20000, "bios", 0) // BIOS-String: DSUN-1105-043089-K0
ROMX_LOAD( "magitronic_b233_ami_1986_286_bios_plus_even_sa027343.bin", 0x10000, 0x8000, CRC(d4a18444) SHA1(d95242104fc9b51cf26de72ef5b6c52d99ccce30), ROM_SKIP(1) )
ROMX_LOAD( "magitronic_b233_ami_1986_286_bios_plus_odd_sa027343.bin", 0x10001, 0x8000, CRC(7ac3db56) SHA1(4340140450c4f8b4f6a19eae50a5dc5449edfdf6), ROM_SKIP(1) )
// ROM_LOAD("magitronic_b233_ami_1986_keyboard_bios_plus_a025352.bin", 0x0000, 0x1000), CRC(84fd28fd) SHA1(43da0f49e52c921844e60b6f3d22f2a316d865cc) )
@@ -1930,13 +1930,13 @@ ROM_START( ht12a )
// Headland HT12/A; HM6818A RTC; AMI K053770 keyboard BIOS
// Jumpers at right edge of board are labeled "KEYLOCK" (J6), "SPEAKER" (J7), "TURBO LED" (J8), "TURBO S.W." (J9), "RESET" (J10)
// XTALs X3 and X4 in top right corner (behind 80C287) are both unpopulated
- ROM_SYSTEM_BIOS(0, "dh12-k0", "AMI DH12-K0")
+ ROM_SYSTEM_BIOS(0, "dh12-k0", "AMI DH12-K0")
ROMX_LOAD( "286_headland_even.bin", 0x10000, 0x8000, CRC(a2530914) SHA1(1aca289240caa6d4bf811d301c338c157b6902a1), ROM_SKIP(1) | ROM_BIOS(0) )
ROMX_LOAD( "286_headland_odd.bin", 0x10001, 0x8000, CRC(b5f69002) SHA1(ee9ceef1fc7a328ee82006cd504e72e16f21b3c8), ROM_SKIP(1) | ROM_BIOS(0) )
// 1: 286 board with Headland Headland HT12/A chipset, one ROM market IQS, Phoenix BIOS 3479808 - ISA8: 1, ISA16: 6
ROM_SYSTEM_BIOS(1, "head_ph_2", "Headland/Phoenix #2") // Phoenix BIOS A286 Version 1.01 - BIOS ID JLI01101 - IT9109 - Reference ID 01 - (BIOS release date:: 19-04-1990)
ROMX_LOAD( "286-headland-iqs-lo_32k.bin", 0x10000, 0x8000, CRC(60424e9d) SHA1(aa813bf48939fe7fcbbfec3133e702bfdff6234e), ROM_SKIP(1) | ROM_BIOS(1) )
- ROMX_LOAD( "286-headland-iqs-hi_32k.bin", 0x10001, 0x8000, CRC(e56212e0) SHA1(2441845d632d19adc0592e094beb5ec1fbe074f6), ROM_SKIP(1) | ROM_BIOS(1) )
+ ROMX_LOAD( "286-headland-iqs-hi_32k.bin", 0x10001, 0x8000, CRC(e56212e0) SHA1(2441845d632d19adc0592e094beb5ec1fbe074f6), ROM_SKIP(1) | ROM_BIOS(1) )
ROM_END
@@ -2112,7 +2112,7 @@ ROM_START( n8810m16c )
ROM_END
// Nixdorf 8810 M16 Laptop - PC17 - VGA version - boot from harddisk doesn't work
-// Chipset: MX8945G/MX16C4520C, Chps P82C212B-12, P82C215, P82C206, WD37C65BJM, P82C211-12, Chips F82C455,
+// Chipset: MX8945G/MX16C4520C, Chps P82C212B-12, P82C215, P82C206, WD37C65BJM, P82C211-12, Chips F82C455,
ROM_START( n8810m16v )
// ROM_LOAD("8810m16vga_27c256_221vb_123g1.bin", 0x00000, 0x4000, CRC(3bc80739) SHA1(3d6d7fb01681eccbc0b560818654d5aa1e3c5230)) // C&T VGA BIOS for 82C455
ROM_REGION(0x20000, "bios", 0 )
@@ -2167,7 +2167,7 @@ ROM_START( at386 )
ROM_SYSTEM_BIOS(2, "amicg", "AMI CG")
ROMX_LOAD( "amicg.1", 0x10000, 0x10000,CRC(8408965a) SHA1(9893d3ac851e01b06a68a67d3721df36ca2c96f5), ROM_BIOS(2))
// 3:
- ROM_SYSTEM_BIOS(3, "msi386", "MSI 386") // MSI 386 mainboard, initializes graphics card, then hangs - Chipset: Chips P82A304, P82A303, P82A302C, 2xP82B305, P82C301C, P82A306A,
+ ROM_SYSTEM_BIOS(3, "msi386", "MSI 386") // MSI 386 mainboard, initializes graphics card, then hangs - Chipset: Chips P82A304, P82A303, P82A302C, 2xP82B305, P82C301C, P82A306A,
ROMX_LOAD( "ami_386_msi_02297_even.bin", 0x10000, 0x8000, CRC(768590a0) SHA1(90c5203d78591a093fd4f54ceb8d9827f1e64f39), ROM_SKIP(1) | ROM_BIOS(3) )
ROMX_LOAD( "ami_386_msi_02297_odd.bin", 0x10001, 0x8000, CRC(7b1360dc) SHA1(552ccda9f90826621e88d9abdc47306b9c2b2b15), ROM_SKIP(1) | ROM_BIOS(3) )
// 4: BIOS-String: EC&T-1332-040990-K0
@@ -2224,7 +2224,7 @@ ROM_END
// CPU: AMD 386DX-40, FPU socket provided - OSC: 80.000MHz, 14.31818
ROM_START( ocjagv )
ROM_REGION(0x20000, "bios", 0)
- // 0: MR BIOS (r) V1.40
+ // 0: MR BIOS (r) V1.40
ROM_SYSTEM_BIOS(0, "jagvmr14", "Jaguar V MR-BIOS 1.40")
ROMX_LOAD( "bios.bin", 0x10000, 0x10000, CRC(a552d6ad) SHA1(91bae14c3ec7edbc9ef240fec1be17f3582d7ec2), ROM_BIOS(0))
//1: AMI BIOS// BIOS: AMI 386DX ISA BIOS AA0797325 - BIOS-String: 31-0100-426069-00101111-121291-MXIC-0 MX-DIR_001
@@ -2249,7 +2249,7 @@ ROM_START( isa386u30 )
ROM_LOAD( "386-isa-386u30.bin", 0x10000, 0x10000, CRC(6d45a044) SHA1(63c06568f9db5ce12dc8dd0fb1ad1009a9fb24f6))
ROM_END
-// Shuttle HOT-304 - Chipset: Opti F82C382, Opti (erased), UMC UM82C206L - OSC: 14.31818MHz, 50.000MHz
+// Shuttle HOT-304 - Chipset: Opti F82C382, Opti (erased), UMC UM82C206L - OSC: 14.31818MHz, 50.000MHz
// BIOS: AMI, Ser.Nr. 150796 - BIOS-String: 30-0101-DK1343-00001111-050591-OPBC-0 - Keyboard BIOS: AMI Ser.Nr. 209210 - ISA8: 1, ISA16: 6, ISA16/Memory: 1
ROM_START( hot304 )
ROM_REGION(0x20000, "bios", 0)
@@ -2385,7 +2385,7 @@ ROM_END
ROM_START( alim1429 )
ROM_REGION(0x20000, "bios", 0)
- // 0:
+ // 0:
ROM_SYSTEM_BIOS(0, "386ali", "386 board with Ali chipset")
ROMX_LOAD( "386_ali_ami_511767.bin", 0x10000, 0x10000, CRC(3c218db4) SHA1(785ea7c36e8be5e7410524e90170d4985cbc9c24), ROM_BIOS(0))
// 1: SER-386AD III (written on the underside of the board) - CPU: AMD Am386DX-40 - ISA16: 5
@@ -2433,7 +2433,7 @@ ROM_START( ecs38632 )
ROMX_LOAD( "ami_ecs-386_32_hi.bin", 0x10001, 0x8000, CRC(e3072bf8) SHA1(74eec72e190f682cfd5ae5425ebdc854e0ba7bc9), ROM_SKIP(1) )
ROM_END
-// SY-012 16/25 386MB VER: 5.2 - Chipset: Chips P82C301C; P82A306; P82A303; P82C206; P82A304; P82C302; P82B305
+// SY-012 16/25 386MB VER: 5.2 - Chipset: Chips P82C301C; P82A306; P82A303; P82C206; P82A304; P82C302; P82B305
// BIOS: AMI 386 BIOS 10084 - BIOS-String: DC&T-1102-082588-K0 - CPU: i386DX-33, ISA8: 2, ISA16: 5, Memory: 1
// OSC: 14.31818 - 20.000 MHz - 50.000 MHz - 32.000 MHz
ROM_START( sy012 )
@@ -2442,7 +2442,7 @@ ROM_START( sy012 )
ROMX_LOAD( "386-sy-012-h_32k.bin", 0x10001, 0x8000, CRC(61aedfdb) SHA1(0f492dc8102386a1c475c5637fb7853d81d3efb6), ROM_SKIP(1) )
ROM_END
-// Goldstar 611-606A - Chipset: CHIPS P82C206 P82C301 P82A303 P82C302 P82A304 2xP82A305 -
+// Goldstar 611-606A - Chipset: CHIPS P82C206 P82C301 P82A303 P82C302 P82A304 2xP82A305 -
// OSC: 14.318 - 9.6000000 MHz - 40.000000 MHz - 16.000000 MHz
// BIOS: TI CMC3000 - BIOS-String: Phoenix 80386 ROM BIOS PLUS Version 1.10 01 - release 2.7B
ROM_START( gs611606a )
diff --git a/src/mame/drivers/cps1.cpp b/src/mame/drivers/cps1.cpp
index 757b21f0b1b..d43b0e56a96 100644
--- a/src/mame/drivers/cps1.cpp
+++ b/src/mame/drivers/cps1.cpp
@@ -10647,10 +10647,10 @@ ROM_END
Sets b and c:
Turbo mode on SW(C):1.
Press start to change character mid-game. (bug: screen goes dark when changing character, happens in attract mode as well).
-
- MSTREET-6 repair info:
- Frequent cause of dead board is u104 (gal/palce20v8) becoming corrupted somehow. Luckily a working unsecured chip was found and dumped :)
- May also work for other bootlegs (there are many very similar bootlegs out there), in that case the reference (u104) may vary.
+
+ MSTREET-6 repair info:
+ Frequent cause of dead board is u104 (gal/palce20v8) becoming corrupted somehow. Luckily a working unsecured chip was found and dumped :)
+ May also work for other bootlegs (there are many very similar bootlegs out there), in that case the reference (u104) may vary.
*/
ROM_START( sf2cems6a ) /* 920313 USA (this set matches "sf2ceuab4" in FBA) */
@@ -10687,7 +10687,7 @@ ROM_START( sf2cems6a ) /* 920313 USA (this set matches "sf2ceuab4" in FBA) */
ROM_REGION( 0x10000, "user1", 0 ) /* unknown, priority? */
ROM_LOAD( "ms6.u133", 0x00000, 0x10000, CRC(13ea1c44) SHA1(5b05fe4c3920e33d94fac5f59e09ff14b3e427fe) ) // == loads other bootleg sets
-
+
ROM_REGION( 0x0200, "plds", 0 ) /* pld devices */
ROM_LOAD( "ms6_gal20v8a.u104", 0x0000, 0x0157, CRC(67b56d29) SHA1(261ae6e968100d5a9c1ee68ea684bb2b1eef3cf8) )
ROM_END
@@ -10734,7 +10734,7 @@ ROM_START( sf2cems6b ) /* 920322 USA */
ROM_REGION( 0x10000, "user1", 0 ) /* unknown, priority? */
ROM_LOAD( "ms6.u133", 0x00000, 0x10000, CRC(13ea1c44) SHA1(5b05fe4c3920e33d94fac5f59e09ff14b3e427fe) )
-
+
ROM_REGION( 0x0200, "plds", 0 ) /* pld devices */
ROM_LOAD( "ms6_gal20v8a.u104", 0x0000, 0x0157, CRC(67b56d29) SHA1(261ae6e968100d5a9c1ee68ea684bb2b1eef3cf8) )
ROM_END
@@ -10781,7 +10781,7 @@ ROM_START( sf2cems6c ) /* 920322 USA */
ROM_REGION( 0x10000, "user1", 0 ) /* unknown, priority? */
ROM_LOAD( "ms6.u133", 0x00000, 0x10000, CRC(13ea1c44) SHA1(5b05fe4c3920e33d94fac5f59e09ff14b3e427fe) )
-
+
ROM_REGION( 0x0200, "plds", 0 ) /* pld devices */
ROM_LOAD( "ms6_gal20v8a.u104", 0x0000, 0x0157, CRC(67b56d29) SHA1(261ae6e968100d5a9c1ee68ea684bb2b1eef3cf8) )
ROM_END
diff --git a/src/mame/drivers/cps3.cpp b/src/mame/drivers/cps3.cpp
index b65785a47de..9ca25a9d0e7 100644
--- a/src/mame/drivers/cps3.cpp
+++ b/src/mame/drivers/cps3.cpp
@@ -454,111 +454,111 @@ hardware modification to the security cart.....
Hardware registers info
----------------------
- PPU registers (read only)
- 0x040C0000 - 0x040C000D
-
- Offset: Bits: Desc:
- 0C ---- ---- ---- -2-- Palette DMA active |
- ---- ---- ---- --1- Character DMA active | several parts of game code assume only 1 of these might be active at the same time
- ---- ---- ---- ---0 Sprite list DMA/copy active, see register 82 description
-
- PPU registers (write only)
- 0x040C0000 - 0x040C00AF
-
- Offset: Bits: Desc:
- 00 ---- --xx xxxx xxxx Global Scroll 0 X
- 02 ---- --xx xxxx xxxx Global Scroll 0 Y
- 04-1F Global Scrolls 1-7
- 20 xxxx xxxx xxxx xxxx Tilemap 0 Scroll X
- 22 xxxx xxxx xxxx xxxx Tilemap 0 Scroll Y
- 24 ---- -a98 76-- ---- Tilemap 0 ?? always 0
- ---- ---- ---4 3210 Tilemap 0 Width (in tiles)
- 26 f--- ---- ---- ---- Tilemap 0 Enable
- -e-- ---- ---- ---- Tilemap 0 Line Scroll Enable
- --d- ---- ---- ---- Tilemap 0 Line Zoom Enable (seems unused in games, but might be enabled in jojo dev.menu BG test)
- ---c ---- ---- ---- Tilemap 0 ?? set together with Zoom
- ---- b--- ---- ---- Tilemap 0 Flip X (not implemented, Warzard demo fights during special moves)
- ---- -a-- ---- ---- Tilemap 0 Flip Y (not implemented, Capcom logos background during sfiii2 flashing)
- ---- --98 7654 3210 Tilemap 0 ?? always 0
- 28 -edc ba98 ---- ---- Tilemap 0 Line Scroll and Zoom Base address (1st word is scroll, 2nd word is zoom)
- ---- ---- -654 3210 Tilemap 0 Tiles Base address
- 2A-2F unused
- 30-5F Tilemaps 1-3
- Values: 384 495 "wide"
- 60 xxxx xxxx xxxx xxxx H Sync end* 42 35
- 62 xxxx xxxx xxxx xxxx H Blank end 111 118
- 64 xxxx xxxx xxxx xxxx H Screen end 495 613
- 66 xxxx xxxx xxxx xxxx H Total end* 454 454
- 68 ---- --xx xxxx xxxx H ?? Zoom Master? 0 0 +128 if flip screen, might be not zoom-related but global H scroll
- 6A xxxx xxxx xxxx xxxx H ?? Zoom Offset? 0 0
- 6C xxxx xxxx xxxx xxxx H ?? Zoom Size? 1023 1023 (511 at BIOS init)
- 6E xxxx xxxx xxxx xxxx H Zoom Scale 64 64
- 70 xxxx xxxx xxxx xxxx V Sync end 3 3
- 72 xxxx xxxx xxxx xxxx V Blank end 21 21
- 74 xxxx xxxx xxxx xxxx V Screen end 245 245
- 76 xxxx xxxx xxxx xxxx V Total end 262 262
- 78 ---- --xx xxxx xxxx V ?? Zoom Master? 0 0 might be not zoom-related but global V scroll
- 7A xxxx xxxx xxxx xxxx V ?? Zoom Offset? 0 0
- 7C xxxx xxxx xxxx xxxx V ?? Zoom Size? 1023 1023 (261 at BIOS init)
- 7E xxxx xxxx xxxx xxxx V Zoom Scale 64 64
- 80 ---- ---- ---- -210 Pixel clock 3 5 base clock is 42.954545MHz, 3 = /5 divider, 5 = /4 divider.
- ---- ---- ---4 3--- Flip screen X/Y (or Y/X)
- ---- ---- --5- ---- ?? always set to 1, 0 in unused 24KHz mode (pixel clock divider?)
- ---- ---- -6-- ---- ?? set to 0 by BIOS init, then set to 1 after video mode selection, 0 in unused 24KHz mode (pixel clock divider?)
- f--- ---- ---- ---- ?? always 0, but there is code which may set it
- 82 ---- ---- ---- 3--0 Sprite list DMA/copy to onchip RAM ? after new list upload to sprite RAM games write here 8/9/8/9 pattern, then wait until register 0C bit 0 became 0, then write 0.
- 84 ---- b--- ---- ---- ?? always set to 0x0800
- 86 ---- ---- ---- 3210 Character RAM bank
- 88 ---- ---- --54 3210 Gfx flash ROM bank
- 8A ---- ---- ---- ---- ?? set to 0 by BIOS init, never writen later
- 8E ---- ---- 7-5- ---- ?? set to 0x00A0 by BIOS init after Pal/Char DMA registers, never writen later (Char/Pal DMA IRQ enable ?)
- 96 xxxx xxxx xxxx xxxx Character DMA Source low bits
- 98 ---- ---- --54 3210 Character DMA Source high bits
- ---- ---- -6-- ---- Character DMA Start
- A0 ---- -a98 7654 3210 Palette DMA Source high bits
- A2 xxxx xxxx xxxx xxxx Palette DMA Source low bits
- A4 ---- ---- ---- ---0 Palette DMA Destination high bit
- A6 xxxx xxxx xxxx xxxx Palette DMA Destination low bits
- A8 -edc ba98 -654 3210 Palette DMA Fade low bits
- AA ---- ---- -654 3210 Palette DMA Fade high bits
- AC xxxx xxxx xxxx xxxx Palette DMA Lenght low bits
- AE ---- ---- ---- ---0 Palette DMA Lenght high bit
- ---- ---- ---- --1- Palette DMA Start
-
- All CRTC-related values is last clock/line of given area, i.e. actual sizes is +1 to value.
-
- (*) H Total value is same for all 15KHz modes, uses fixed clock (not affected by pixel clock modifier) -
- 42.954545MHz/6 (similar to SSV) /(454+1) = 15734.25Hz /(262+1) = 59.826Hz
- unused 24KHz 512x384 mode uses H Total 293 V Total 424 (42.954545MHz/6 /(293+1) = 24350.62Hz /(424+1) = 57.29Hz)
-
-
- 'SS' foreground tilemap layer generator (presumable located in 'SSU' chip) registers (write only?)
- 0x05050000 - 0x05050029 area, even bytes only.
-
- Offset: Bits: Desc: Values: 384 495 "wide"
- 00 xxxx xxxx H Sync* 42 35 same as PPU
- 01 xxxx xxxx H Start L
- 02 xxxx xxxx H Start H 62 64
- 03 xxxx xxxx H Blank L
- 04 xxxx xxxx H Blank H 534 671
- 05 xxxx xxxx H Total L*
- 06 xxxx xxxx H Total H* 454 454* same as PPU
- 07 xxxx xxxx H Scroll L
- 08 xxxx xxxx H Scroll H -101 -107 +128 if flip screen
- 09 xxxx xxxx V Sync 3 3 same as PPU
- 0a xxxx xxxx V Start L
- 0b xxxx xxxx V Start H 21 21 same as PPU
- 0c xxxx xxxx V Blank L
- 0d xxxx xxxx V Blank H 247 247 PPU value +2
- 0e xxxx xxxx V Total L
- 0f xxxx xxxx V Total H 262 262 same as PPU
- 10 xxxx xxxx V Scroll L
- 11 xxxx xxxx V Scroll H -24 -24 +288 if flip screen
- 12 xxxx xxxx Palette base
- 13 ---- -210 Pixel clock 3 5 not clear how it works
- 14 ---- --10 Flip screen X/Y (or Y/X?)
-
- (*) H Total value is same for all 15KHz modes, same as PPU.
+ PPU registers (read only)
+ 0x040C0000 - 0x040C000D
+
+ Offset: Bits: Desc:
+ 0C ---- ---- ---- -2-- Palette DMA active |
+ ---- ---- ---- --1- Character DMA active | several parts of game code assume only 1 of these might be active at the same time
+ ---- ---- ---- ---0 Sprite list DMA/copy active, see register 82 description
+
+ PPU registers (write only)
+ 0x040C0000 - 0x040C00AF
+
+ Offset: Bits: Desc:
+ 00 ---- --xx xxxx xxxx Global Scroll 0 X
+ 02 ---- --xx xxxx xxxx Global Scroll 0 Y
+ 04-1F Global Scrolls 1-7
+ 20 xxxx xxxx xxxx xxxx Tilemap 0 Scroll X
+ 22 xxxx xxxx xxxx xxxx Tilemap 0 Scroll Y
+ 24 ---- -a98 76-- ---- Tilemap 0 ?? always 0
+ ---- ---- ---4 3210 Tilemap 0 Width (in tiles)
+ 26 f--- ---- ---- ---- Tilemap 0 Enable
+ -e-- ---- ---- ---- Tilemap 0 Line Scroll Enable
+ --d- ---- ---- ---- Tilemap 0 Line Zoom Enable (seems unused in games, but might be enabled in jojo dev.menu BG test)
+ ---c ---- ---- ---- Tilemap 0 ?? set together with Zoom
+ ---- b--- ---- ---- Tilemap 0 Flip X (not implemented, Warzard demo fights during special moves)
+ ---- -a-- ---- ---- Tilemap 0 Flip Y (not implemented, Capcom logos background during sfiii2 flashing)
+ ---- --98 7654 3210 Tilemap 0 ?? always 0
+ 28 -edc ba98 ---- ---- Tilemap 0 Line Scroll and Zoom Base address (1st word is scroll, 2nd word is zoom)
+ ---- ---- -654 3210 Tilemap 0 Tiles Base address
+ 2A-2F unused
+ 30-5F Tilemaps 1-3
+ Values: 384 495 "wide"
+ 60 xxxx xxxx xxxx xxxx H Sync end* 42 35
+ 62 xxxx xxxx xxxx xxxx H Blank end 111 118
+ 64 xxxx xxxx xxxx xxxx H Screen end 495 613
+ 66 xxxx xxxx xxxx xxxx H Total end* 454 454
+ 68 ---- --xx xxxx xxxx H ?? Zoom Master? 0 0 +128 if flip screen, might be not zoom-related but global H scroll
+ 6A xxxx xxxx xxxx xxxx H ?? Zoom Offset? 0 0
+ 6C xxxx xxxx xxxx xxxx H ?? Zoom Size? 1023 1023 (511 at BIOS init)
+ 6E xxxx xxxx xxxx xxxx H Zoom Scale 64 64
+ 70 xxxx xxxx xxxx xxxx V Sync end 3 3
+ 72 xxxx xxxx xxxx xxxx V Blank end 21 21
+ 74 xxxx xxxx xxxx xxxx V Screen end 245 245
+ 76 xxxx xxxx xxxx xxxx V Total end 262 262
+ 78 ---- --xx xxxx xxxx V ?? Zoom Master? 0 0 might be not zoom-related but global V scroll
+ 7A xxxx xxxx xxxx xxxx V ?? Zoom Offset? 0 0
+ 7C xxxx xxxx xxxx xxxx V ?? Zoom Size? 1023 1023 (261 at BIOS init)
+ 7E xxxx xxxx xxxx xxxx V Zoom Scale 64 64
+ 80 ---- ---- ---- -210 Pixel clock 3 5 base clock is 42.954545MHz, 3 = /5 divider, 5 = /4 divider.
+ ---- ---- ---4 3--- Flip screen X/Y (or Y/X)
+ ---- ---- --5- ---- ?? always set to 1, 0 in unused 24KHz mode (pixel clock divider?)
+ ---- ---- -6-- ---- ?? set to 0 by BIOS init, then set to 1 after video mode selection, 0 in unused 24KHz mode (pixel clock divider?)
+ f--- ---- ---- ---- ?? always 0, but there is code which may set it
+ 82 ---- ---- ---- 3--0 Sprite list DMA/copy to onchip RAM ? after new list upload to sprite RAM games write here 8/9/8/9 pattern, then wait until register 0C bit 0 became 0, then write 0.
+ 84 ---- b--- ---- ---- ?? always set to 0x0800
+ 86 ---- ---- ---- 3210 Character RAM bank
+ 88 ---- ---- --54 3210 Gfx flash ROM bank
+ 8A ---- ---- ---- ---- ?? set to 0 by BIOS init, never writen later
+ 8E ---- ---- 7-5- ---- ?? set to 0x00A0 by BIOS init after Pal/Char DMA registers, never writen later (Char/Pal DMA IRQ enable ?)
+ 96 xxxx xxxx xxxx xxxx Character DMA Source low bits
+ 98 ---- ---- --54 3210 Character DMA Source high bits
+ ---- ---- -6-- ---- Character DMA Start
+ A0 ---- -a98 7654 3210 Palette DMA Source high bits
+ A2 xxxx xxxx xxxx xxxx Palette DMA Source low bits
+ A4 ---- ---- ---- ---0 Palette DMA Destination high bit
+ A6 xxxx xxxx xxxx xxxx Palette DMA Destination low bits
+ A8 -edc ba98 -654 3210 Palette DMA Fade low bits
+ AA ---- ---- -654 3210 Palette DMA Fade high bits
+ AC xxxx xxxx xxxx xxxx Palette DMA Lenght low bits
+ AE ---- ---- ---- ---0 Palette DMA Lenght high bit
+ ---- ---- ---- --1- Palette DMA Start
+
+ All CRTC-related values is last clock/line of given area, i.e. actual sizes is +1 to value.
+
+ (*) H Total value is same for all 15KHz modes, uses fixed clock (not affected by pixel clock modifier) -
+ 42.954545MHz/6 (similar to SSV) /(454+1) = 15734.25Hz /(262+1) = 59.826Hz
+ unused 24KHz 512x384 mode uses H Total 293 V Total 424 (42.954545MHz/6 /(293+1) = 24350.62Hz /(424+1) = 57.29Hz)
+
+
+ 'SS' foreground tilemap layer generator (presumable located in 'SSU' chip) registers (write only?)
+ 0x05050000 - 0x05050029 area, even bytes only.
+
+ Offset: Bits: Desc: Values: 384 495 "wide"
+ 00 xxxx xxxx H Sync* 42 35 same as PPU
+ 01 xxxx xxxx H Start L
+ 02 xxxx xxxx H Start H 62 64
+ 03 xxxx xxxx H Blank L
+ 04 xxxx xxxx H Blank H 534 671
+ 05 xxxx xxxx H Total L*
+ 06 xxxx xxxx H Total H* 454 454* same as PPU
+ 07 xxxx xxxx H Scroll L
+ 08 xxxx xxxx H Scroll H -101 -107 +128 if flip screen
+ 09 xxxx xxxx V Sync 3 3 same as PPU
+ 0a xxxx xxxx V Start L
+ 0b xxxx xxxx V Start H 21 21 same as PPU
+ 0c xxxx xxxx V Blank L
+ 0d xxxx xxxx V Blank H 247 247 PPU value +2
+ 0e xxxx xxxx V Total L
+ 0f xxxx xxxx V Total H 262 262 same as PPU
+ 10 xxxx xxxx V Scroll L
+ 11 xxxx xxxx V Scroll H -24 -24 +288 if flip screen
+ 12 xxxx xxxx Palette base
+ 13 ---- -210 Pixel clock 3 5 not clear how it works
+ 14 ---- --10 Flip screen X/Y (or Y/X?)
+
+ (*) H Total value is same for all 15KHz modes, same as PPU.
*/
#include "emu.h"
@@ -1019,7 +1019,7 @@ void cps3_state::draw_tilemapsprite_line(u32 *regs, int drawline, bitmap_rgb32 &
int line = drawline + scrolly;
line &= 0x3ff;
- if (global_flip_y) line ^= 0x3ff; // these probably needs compensation of our scrolly and tileline tweaks, but it's fine for sfiii2.
+ if (global_flip_y) line ^= 0x3ff; // these probably needs compensation of our scrolly and tileline tweaks, but it's fine for sfiii2.
int xflip_mask = (global_flip_x) ? 0x3f : 0;
int tileline = (line / 16) + 1;
@@ -1054,7 +1054,7 @@ void cps3_state::draw_tilemapsprite_line(u32 *regs, int drawline, bitmap_rgb32 &
// fg layer (TODO: this could be handled with an actual tilemap)
void cps3_state::draw_fg_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
- int scrolly = (-m_ss_vscroll) & 0x100; // TODO properly handle scroll value
+ int scrolly = (-m_ss_vscroll) & 0x100; // TODO properly handle scroll value
for (int line = cliprect.top(); line <= cliprect.bottom(); line++)
{
@@ -1129,7 +1129,7 @@ u32 cps3_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const
u8 const gscroll = (m_spritelist[i + 0] & 0x70000000) >> 28;
u32 const length = (m_spritelist[i + 0] & 0x01ff0000) >> 16; // how many entries in the sprite table
u32 start = (m_spritelist[i + 0] & 0x00007ff0) >> 4;
-
+
int const xpos = (m_spritelist[i + 1] & 0x03ff0000) >> 16;
int const ypos = m_spritelist[i + 1] & 0x000003ff;
@@ -2029,16 +2029,16 @@ void cps3_state::process_character_dma(u32 address)
switch ((dat1 >> 21) & 7)
{
- case 4: /* Sets a table used by the decompression routines */
+ case 4: /* Sets a table used by the decompression routines */
/* We should probably copy this, but a pointer to it is fine for our purposes as the data doesn't change */
m_current_table_address = real_source;
break;
- case 2: /* 6bpp DMA decompression
- - this is used for the majority of sprites and backgrounds */
+ case 2: /* 6bpp DMA decompression
+ - this is used for the majority of sprites and backgrounds */
do_char_dma(real_source, real_destination, real_length);
break;
- case 3: /* 8bpp DMA decompression
- - this is used on SFIII NG Sean's Stage ONLY */
+ case 3: /* 8bpp DMA decompression
+ - this is used on SFIII NG Sean's Stage ONLY */
do_alt_char_dma(real_source, real_destination, real_length);
break;
default:
diff --git a/src/mame/drivers/crospuzl.cpp b/src/mame/drivers/crospuzl.cpp
index e0117567235..6f3e3a4abaf 100644
--- a/src/mame/drivers/crospuzl.cpp
+++ b/src/mame/drivers/crospuzl.cpp
@@ -1,33 +1,33 @@
// license:BSD-3-Clause
// copyright-holders:Angelo Salese
/****************************************************************************
-
- Cross Puzzle
-
- driver by Angelo Salese, based off original crystal.cpp by ElSemi
-
- TODO:
- - Dies at POST with a SPU error,
- supposedly it should print a "running system." instead of "Ok" at the
- end of the POST routine.
- Update: it tries to load a "sdata.bin" file, which is nowhere to be found in the dump.
- Considering also that first $20000 block is empty and loading the flash linearly gives
- the reference memory size but then game isn't detected at all.
- - Hooking up nand_device instead of the custom implementation here
- makes the game to print having all memory available and no game
- detected, fun
- - I2C RTC interface should be correct but still doesn't work, sending
+
+ Cross Puzzle
+
+ driver by Angelo Salese, based off original crystal.cpp by ElSemi
+
+ TODO:
+ - Dies at POST with a SPU error,
+ supposedly it should print a "running system." instead of "Ok" at the
+ end of the POST routine.
+ Update: it tries to load a "sdata.bin" file, which is nowhere to be found in the dump.
+ Considering also that first $20000 block is empty and loading the flash linearly gives
+ the reference memory size but then game isn't detected at all.
+ - Hooking up nand_device instead of the custom implementation here
+ makes the game to print having all memory available and no game
+ detected, fun
+ - I2C RTC interface should be correct but still doesn't work, sending
unrecognized slave address 0x30 (device type might be wrong as well)
- Notes:
- - Game enables UART1 receive irq, if that irq is enable it just prints
- "___sysUART1_ISR<LF>___sysUART1_ISR_END<LF>"
-
+ Notes:
+ - Game enables UART1 receive irq, if that irq is enable it just prints
+ "___sysUART1_ISR<LF>___sysUART1_ISR_END<LF>"
+
=============================================================================
- This PCB uses ADC 'Amazon-LF' SoC, EISC CPU core - However PCBs have been
+ This PCB uses ADC 'Amazon-LF' SoC, EISC CPU core - However PCBs have been
seen with a standard VRenderZERO+ MagicEyes EISC chip
-
+
****************************************************************************/
#include "emu.h"
@@ -71,7 +71,7 @@ private:
uint32_t m_FlashAddr;
uint8_t m_FlashShift;
-// DECLARE_WRITE32_MEMBER(Banksw_w);
+// DECLARE_WRITE32_MEMBER(Banksw_w);
DECLARE_READ8_MEMBER(FlashCmd_r);
DECLARE_WRITE8_MEMBER(FlashCmd_w);
DECLARE_WRITE8_MEMBER(FlashAddr_w);
@@ -81,7 +81,7 @@ private:
virtual void machine_start() override;
virtual void machine_reset() override;
void crospuzl_mem(address_map &map);
-
+
// PIO
uint32_t m_PIO;
uint32_t m_ddr;
@@ -100,7 +100,7 @@ IRQ_CALLBACK_MEMBER(crospuzl_state::icallback)
READ32_MEMBER(crospuzl_state::PIOedat_r)
{
- // TODO: this needs fixing in serflash_device
+ // TODO: this needs fixing in serflash_device
// (has a laconic constant for the ready line)
return (m_rtc->sda_r() << 19)
| (machine().rand() & 0x04000000); // serial ready line
@@ -114,12 +114,12 @@ READ8_MEMBER(crospuzl_state::FlashCmd_r)
}
if ((m_FlashCmd & 0xff) == 0x90)
{
- // Service Mode has the first two bytes of the ID printed,
+ // Service Mode has the first two bytes of the ID printed,
// in format ****/ee81
- // ee81 has no correspondence in the JEDEC flash vendor ID list,
+ // ee81 has no correspondence in the JEDEC flash vendor ID list,
// and the standard claims that the ID is 7 + 1 parity bit.
// TODO: Retrieve ID from actual HW service mode screen.
-// const uint8_t id[5] = { 0xee, 0x81, 0x00, 0x15, 0x00 };
+// const uint8_t id[5] = { 0xee, 0x81, 0x00, 0x15, 0x00 };
const uint8_t id[5] = { 0xec, 0xf1, 0x00, 0x95, 0x40 };
uint8_t res = id[m_FlashAddr];
m_FlashAddr ++;
@@ -136,7 +136,7 @@ READ8_MEMBER(crospuzl_state::FlashCmd_r)
}
WRITE8_MEMBER(crospuzl_state::FlashCmd_w)
-{
+{
m_FlashPrevCommand = m_FlashCmd;
m_FlashCmd = data;
m_FlashShift = 0;
@@ -207,13 +207,13 @@ void crospuzl_state::crospuzl_mem(address_map &map)
map(0x03000000, 0x04ffffff).m(m_vr0soc, FUNC(vrender0soc_device::audiovideo_map));
-// map(0x05000000, 0x05ffffff).bankr("mainbank");
-// map(0x05000000, 0x05000003).rw(FUNC(crospuzl_state::FlashCmd_r), FUNC(crospuzl_state::FlashCmd_w));
+// map(0x05000000, 0x05ffffff).bankr("mainbank");
+// map(0x05000000, 0x05000003).rw(FUNC(crospuzl_state::FlashCmd_r), FUNC(crospuzl_state::FlashCmd_w));
}
void crospuzl_state::machine_start()
{
-// save_item(NAME(m_Bank));
+// save_item(NAME(m_Bank));
save_item(NAME(m_FlashCmd));
save_item(NAME(m_PIO));
save_item(NAME(m_ddr));
@@ -374,13 +374,13 @@ void crospuzl_state::crospuzl(machine_config &config)
// ROM strings have references to a K9FXX08 device
// TODO: use this device, in machine/smartmed.h (has issues with is_busy() emulation)
-// NAND(config, m_nand, 0);
-// m_nand->set_nand_type(nand_device::chip::K9F1G08U0B); // TODO: exact flavor
+// NAND(config, m_nand, 0);
+// m_nand->set_nand_type(nand_device::chip::K9F1G08U0B); // TODO: exact flavor
PCF8583(config, m_rtc, 32.768_kHz_XTAL);
}
-ROM_START( crospuzl )
+ROM_START( crospuzl )
ROM_REGION( 0x80010, "maincpu", 0 )
ROM_LOAD("en29lv040a.u5", 0x000000, 0x80010, CRC(d50e8500) SHA1(d681cd18cd0e48854c24291d417d2d6d28fe35c1) )
diff --git a/src/mame/drivers/crystal.cpp b/src/mame/drivers/crystal.cpp
index 848a7ceb790..49633034fa0 100644
--- a/src/mame/drivers/crystal.cpp
+++ b/src/mame/drivers/crystal.cpp
@@ -21,21 +21,21 @@
program with the correct data
MAME driver by ElSemi
- Additional work and refactoring by Angelo Salese
-
- TODO:
- - provide NVRAM defaults where applicable;
- - add an actual reset button (helps with inp record/playback);
- - donghaer: needs "raster effect" for 2 players mode split screen, but no
- interrupt is actually provided for the task so apparently not a timer
- related effect;
- - wulybuly: strips off main RAM to texture transfers except for text after
- the first couple of frames;
- - maldaiza: PIC protection.
- - urachamu: some animation timings seems off, like bat hit animation before starting a given game.
- They were actually too fast before adding 30 Hz vblank for interlace mode, even if the game don't
- really read crtc blanking reg or use any other interrupt but the coin ones;
- - urachamu: investigate what CDMA in test mode really do, assuming it's not a dud;
+ Additional work and refactoring by Angelo Salese
+
+ TODO:
+ - provide NVRAM defaults where applicable;
+ - add an actual reset button (helps with inp record/playback);
+ - donghaer: needs "raster effect" for 2 players mode split screen, but no
+ interrupt is actually provided for the task so apparently not a timer
+ related effect;
+ - wulybuly: strips off main RAM to texture transfers except for text after
+ the first couple of frames;
+ - maldaiza: PIC protection.
+ - urachamu: some animation timings seems off, like bat hit animation before starting a given game.
+ They were actually too fast before adding 30 Hz vblank for interlace mode, even if the game don't
+ really read crtc blanking reg or use any other interrupt but the coin ones;
+ - urachamu: investigate what CDMA in test mode really do, assuming it's not a dud;
========================================================================================================
@@ -559,7 +559,7 @@ void crystal_state::crystal(machine_config &config)
VRENDER0_SOC(config, m_vr0soc, 14318180 * 3);
m_vr0soc->set_host_cpu_tag(m_maincpu);
-
+
DS1302(config, m_ds1302, 32.768_kHz_XTAL);
}
diff --git a/src/mame/drivers/h01x.cpp b/src/mame/drivers/h01x.cpp
index 33d68b72313..c1902d57304 100644
--- a/src/mame/drivers/h01x.cpp
+++ b/src/mame/drivers/h01x.cpp
@@ -229,7 +229,7 @@ void h01x_state::machine_start()
void h01x_state::machine_reset()
{
- m_bank = 0x00;
+ m_bank = 0x00;
m_rom_ptr = m_rom->base();
m_hzrom_ptr = m_hzrom->base();
@@ -251,7 +251,7 @@ void h01x_state::init_h01x()
/*
uint32_t h01x_state::screen_update_h01x(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
- return 0;
+ return 0;
}
*/
@@ -268,7 +268,7 @@ WRITE8_MEMBER( h01x_state::port_64_w )
WRITE8_MEMBER( h01x_state::port_70_w )
{
- m_bank = data&0xC0;
+ m_bank = data&0xC0;
// bit5, speaker
m_speaker->level_w(BIT(data,5));
@@ -400,23 +400,23 @@ ROM_END
// H-01B中文教育电脑
// 普乐电器公司
-// cpu Z-80A 2MHz
+// cpu Z-80A 2MHz
// NF500A教学电脑
// 国营八三〇厂制造
-// cpu Z-80A 4MHz
-// video MC6845P
-// sysrom 16KB EPROM
-// hzrom 32KB EPROM
-// ram 32KB SRAM
-// vram 16Kx4bit DRAM
+// cpu Z-80A 4MHz
+// video MC6845P
+// sysrom 16KB EPROM
+// hzrom 32KB EPROM
+// ram 32KB SRAM
+// vram 16Kx4bit DRAM
// JCE
// 广东江门计算机应用设备厂
-// video HD6845SP
-// sysrom 16KB EPROM
-// hzrom 32KB EPROM
-// extrom 16KB EPROM
+// video HD6845SP
+// sysrom 16KB EPROM
+// hzrom 32KB EPROM
+// extrom 16KB EPROM
// 开机画面
// H-01B : H-01型中文教育电脑 普乐电器公司制造
diff --git a/src/mame/drivers/hh_sm510.cpp b/src/mame/drivers/hh_sm510.cpp
index 6891d0435ec..b6aa76f16c2 100644
--- a/src/mame/drivers/hh_sm510.cpp
+++ b/src/mame/drivers/hh_sm510.cpp
@@ -698,7 +698,7 @@ public:
// config
static INPUT_PORTS_START( gnw_judge )
- PORT_START("IN.0") // R2
+ PORT_START("IN.0") // R2
PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("IN.1") // R3
diff --git a/src/mame/drivers/ibmpc.cpp b/src/mame/drivers/ibmpc.cpp
index 419048e3470..91a04c69439 100644
--- a/src/mame/drivers/ibmpc.cpp
+++ b/src/mame/drivers/ibmpc.cpp
@@ -400,7 +400,7 @@ ROM_START( ibm5150 )
ROMX_LOAD("5700035.u31", 0xa000, 0x2000, CRC(9fe4ec11) SHA1(89af8138185938c3da3386f97d3b0549a51de5ef), ROM_BIOS(2)) /* ROM Basic 1.0 FA000-FBFFF */
ROMX_LOAD("5700043.u32", 0xc000, 0x2000, CRC(ea2794e6) SHA1(22fe58bc853ffd393d5e2f98defda7456924b04f), ROM_BIOS(2)) /* ROM Basic 1.0 FC000-FDFFF */
ROMX_LOAD("5700671.u33", 0xe000, 0x2000, CRC(b7d4ec46) SHA1(bdb06f846c4768f39eeff7e16b6dbff8cd2117d2), ROM_BIOS(2))
-
+
/* Landmark/Supersoft Diagnostics ROM */
ROM_SYSTEM_BIOS( 3, "pclandmark", "Landmark/Supersoft Diagnostics" )
ROMX_LOAD("5000019.u29", 0x6000, 0x2000, CRC(80d3cf5d) SHA1(64769b7a8b60ffeefa04e4afbec778069a2840c9), ROM_BIOS(3)) /* ROM Basic 1.1 F6000-F7FFF; IBM P/N: 5000019, FRU: 6359109 */
@@ -495,7 +495,7 @@ ROM_START( ibm5160 )
ROMX_LOAD("68x4370.u19", 0x0000, 0x8000, CRC(758ff036) SHA1(045e27a70407d89b7956ecae4d275bd2f6b0f8e2), ROM_BIOS(3))
ROMX_LOAD("62x0890.u18", 0x8000, 0x8000, CRC(4f417635) SHA1(daa61762d3afdd7262e34edf1a3d2df9a05bcebb), ROM_BIOS(3))
- ROM_SYSTEM_BIOS( 4, "xtlandmark", "Landmark/Supersoft Diagnostics" )
+ ROM_SYSTEM_BIOS( 4, "xtlandmark", "Landmark/Supersoft Diagnostics" )
ROMX_LOAD("62x0854.u19", 0x0000, 0x8000, CRC(b5fb0e83) SHA1(937b43759ffd472da4fb0fe775b3842f5fb4c3b3), ROM_BIOS(4) ) /* instructions say to leave this ROM in place */
ROMX_LOAD("5150_or_5160_27256_32kb.bin", 0x8000, 0x8000, CRC(d3603216) SHA1(6691d33f43eddd3b0a6269ef985f5be8705ba55f), ROM_BIOS(4) )
diff --git a/src/mame/drivers/icebox.cpp b/src/mame/drivers/icebox.cpp
index 7ebd68045ae..3a1c7599cd7 100644
--- a/src/mame/drivers/icebox.cpp
+++ b/src/mame/drivers/icebox.cpp
@@ -108,8 +108,8 @@ on the boards to say which of the four selects it responds to.
The three byte fifo and a register jams a zero onto the data bus (when?), and we have the source for the CP/M version
of the debugger/boot prom to see how interrupt handling occurs.
-When the floppy controller generates a DRQ or INTRQ it also generates a Z80 INT, which uses IM 0
-and forces a NOP (00) onto the bus. This allows firmware and/or disk routines to resume after a HALT.
+When the floppy controller generates a DRQ or INTRQ it also generates a Z80 INT, which uses IM 0
+and forces a NOP (00) onto the bus. This allows firmware and/or disk routines to resume after a HALT.
I can sort of piece together what Terse implements and what it evolved from. I think it started as the Caltech FORTH
implemented for the PDP-10 and 11 with a lot of words stripped out, and others added. This was submitted to DECUS as
diff --git a/src/mame/drivers/igspoker.cpp b/src/mame/drivers/igspoker.cpp
index d6efd79ba4a..375103f79d0 100644
--- a/src/mame/drivers/igspoker.cpp
+++ b/src/mame/drivers/igspoker.cpp
@@ -66,7 +66,7 @@ TODO:
- Sets cpoker & cpokert spit 660K of whatever they have in the hopper when keyout...
- Check if the cpoker sets still lock at some point due to protection.
-- Fix lamps to cpoker101.
+- Fix lamps to cpoker101.
*****************************************************************************/
@@ -2215,10 +2215,10 @@ void igspoker_state::init_cpoker101() // same decryption as cpokert
/* Patch to avoid traps at $0ec5 (cpoker101),
$0ef0 (cpoker201f), $0f20 (cpoker210ks) and
- $206e (cpoker101, cpoker201f & cpoker210ks),
+ $206e (cpoker101, cpoker201f & cpoker210ks),
that run subs in RAM, operate registers,
and finally lock the game at $732e (cpoker101),
- $72c2 (cpoker201f) & $72c6 (cpoker210ks).
+ $72c2 (cpoker201f) & $72c6 (cpoker210ks).
All these are triggered if RAM contents of $ff18
matches the $ff19 (normally 0x20 due to an AND
diff --git a/src/mame/drivers/marineb.cpp b/src/mame/drivers/marineb.cpp
index fe0328c9441..4ed3ad76276 100644
--- a/src/mame/drivers/marineb.cpp
+++ b/src/mame/drivers/marineb.cpp
@@ -129,12 +129,12 @@ static INPUT_PORTS_START( marineb )
PORT_DIPSETTING( 0x03, "6" )
PORT_DIPNAME( 0x1c, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3,4,5") /* coinage doesn't work?? - always 1C / 1C or Free Play?? */
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
-// PORT_DIPSETTING( 0x14, DEF_STR( 2C_1C ) ) /* This is the correct Coinage according to manual */
-// PORT_DIPSETTING( 0x18, DEF_STR( 3C_2C ) )
-// PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
-// PORT_DIPSETTING( 0x08, DEF_STR( 1C_3C ) )
-// PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
-// PORT_DIPSETTING( 0x10, DEF_STR( 1C_6C ) )
+// PORT_DIPSETTING( 0x14, DEF_STR( 2C_1C ) ) /* This is the correct Coinage according to manual */
+// PORT_DIPSETTING( 0x18, DEF_STR( 3C_2C ) )
+// PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
+// PORT_DIPSETTING( 0x08, DEF_STR( 1C_3C ) )
+// PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
+// PORT_DIPSETTING( 0x10, DEF_STR( 1C_6C ) )
PORT_DIPSETTING( 0x1c, DEF_STR( Free_Play ) )
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, "20000 50000" )
@@ -178,9 +178,9 @@ static INPUT_PORTS_START( changes )
PORT_DIPSETTING( 0x02, "5" )
PORT_DIPSETTING( 0x03, "6" )
PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3,4") /* coinage doesn't work?? - always 1C / 1C or Free Play?? */
-// PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) ) /* This is the correct Coinage according to manual */
+// PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) ) /* This is the correct Coinage according to manual */
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
-// PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
+// PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( Free_Play ) )
PORT_DIPNAME( 0x10, 0x00, "1st Bonus Life" ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x00, "20000" )
diff --git a/src/mame/drivers/menghong.cpp b/src/mame/drivers/menghong.cpp
index 63d0e306d52..b60bede8fa8 100644
--- a/src/mame/drivers/menghong.cpp
+++ b/src/mame/drivers/menghong.cpp
@@ -9,11 +9,11 @@
TODO:
- HY04 protection (controls tile RNG, 8bpp colors, a few program flow bits)
- 8bpp colors are washed, data from flash ROMs is XORed with contents
- of NVRAM area 0x1400070b-80f in menghong, might be shared with
- HY04 as well.
+ of NVRAM area 0x1400070b-80f in menghong, might be shared with
+ HY04 as well.
- EEPROM hookup;
- - extract password code when entering test mode in-game (assuming the
- 0x485 workaround isn't enough);
+ - extract password code when entering test mode in-game (assuming the
+ 0x485 workaround isn't enough);
=============================================================================
@@ -88,7 +88,7 @@ public:
m_mainbank(*this, "mainbank"),
m_maincpu(*this, "maincpu"),
m_vr0soc(*this, "vr0soc"),
-// m_nvram(*this, "nvram"),
+// m_nvram(*this, "nvram"),
m_ds1302(*this, "rtc"),
m_eeprom(*this, "eeprom"),
m_prot_data(*this, "pic_data")
@@ -107,7 +107,7 @@ private:
/* devices */
required_device<se3208_device> m_maincpu;
required_device<vrender0soc_device> m_vr0soc;
-// required_device<nvram_device> m_nvram;
+// required_device<nvram_device> m_nvram;
required_device<ds1302_device> m_ds1302;
optional_device<eeprom_serial_93cxx_device> m_eeprom;
required_region_ptr <uint8_t> m_prot_data;
@@ -135,7 +135,7 @@ private:
DECLARE_WRITE32_MEMBER(crzyddz2_PIOldat_w);
DECLARE_READ32_MEMBER(crzyddz2_PIOedat_r);
uint8_t m_crzyddz2_prot;
-
+
DECLARE_READ8_MEMBER(menghong_shared_r);
DECLARE_WRITE8_MEMBER(menghong_shared_w);
DECLARE_READ8_MEMBER(crzyddz2_shared_r);
@@ -189,23 +189,23 @@ WRITE32_MEMBER(menghong_state::FlashCmd_w)
// To do: HY04 (pic?) protection, 93C46 hookup
READ8_MEMBER(menghong_state::menghong_shared_r)
-{
+{
return m_sharedram[offset];
}
WRITE8_MEMBER(menghong_state::menghong_shared_w)
{
m_sharedram[offset] = data;
-
+
if (offset == 0x2a0)
{
if (data == 0x09)
{
// enables game settings by pressing start on password screen
m_sharedram[0x485] = 0x02;
-
+
// start at 0x140071b, up to 0x806, rolls back at 0x70c
- // we conveniently use an handcrafted ROM here, created by guessing colors from
+ // we conveniently use an handcrafted ROM here, created by guessing colors from
// transparencies and shading.
// This will be useful for comparison when the actual PIC data will be extracted.
for (int i=0;i<0x100;i++)
@@ -230,7 +230,7 @@ READ8_MEMBER(menghong_state::crzyddz2_shared_r)
WRITE8_MEMBER(menghong_state::crzyddz2_shared_w)
{
m_sharedram[offset] = data;
-
+
// State machine is unconfirmed
if (offset == 0x7e3)
{
@@ -242,8 +242,8 @@ WRITE8_MEMBER(menghong_state::crzyddz2_shared_w)
break;
case 0xbb:
// this actually affects color again, game checksums the NVRAM contents
- // at PC=0x2011f9a, expecting a value of 0x7ebe otherwise locks up
- // after Sealy logo. Every single value is added to the routine and left
+ // at PC=0x2011f9a, expecting a value of 0x7ebe otherwise locks up
+ // after Sealy logo. Every single value is added to the routine and left
// shifted by 1 (including the two values above)
for(int i=0;i<0x3f;i++)
m_sharedram[i+0x652] = 0xff;
@@ -316,7 +316,7 @@ void menghong_state::menghong_mem(address_map &map)
map(0x00000000, 0x003fffff).rom().nopw();
map(0x01280000, 0x01280003).w(FUNC(menghong_state::Banksw_w));
-// map(0x01400000, 0x0140ffff).ram().share("nvram");
+// map(0x01400000, 0x0140ffff).ram().share("nvram");
map(0x01400000, 0x0140ffff).rw(FUNC(menghong_state::menghong_shared_r), FUNC(menghong_state::menghong_shared_w));
map(0x01500000, 0x01500003).portr("P1_P2");
map(0x01500004, 0x01500007).r(FUNC(menghong_state::crzyddz2_key_r));
@@ -343,7 +343,7 @@ void menghong_state::crzyddz2_mem(address_map &map)
void menghong_state::machine_start()
{
m_sharedram = auto_alloc_array_clear(machine(), uint8_t, 0x10000);
-
+
if (m_mainbank)
{
m_maxbank = (m_flash) ? m_flash.bytes() / 0x1000000 : 0;
@@ -473,7 +473,7 @@ void menghong_state::menghong(machine_config &config)
// HY04 running at 8 MHz
-// NVRAM(config, m_nvram, nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, m_nvram, nvram_device::DEFAULT_ALL_0);
VRENDER0_SOC(config, m_vr0soc, 14318180 * 3);
m_vr0soc->set_host_cpu_tag(m_maincpu);
@@ -499,7 +499,7 @@ ROM_START( menghong )
ROM_REGION( 0x4280, "pic", 0 ) // hy04
ROM_LOAD("menghong_hy04", 0x000000, 0x4280, NO_DUMP )
-
+
ROM_REGION( 0x0100, "pic_data", ROMREGION_ERASEFF )
ROM_LOAD("hy04_fake_data.bin", 0, 0x100, BAD_DUMP CRC(73cc964b) SHA1(39d223c550e38c97135322e43ccabb70f04964b9) )
ROM_END
@@ -513,7 +513,7 @@ ROM_START( crzyddz2 )
ROM_REGION( 0x4280, "pic", 0 ) // hy04
ROM_LOAD("hy04", 0x000000, 0x4280, NO_DUMP )
-
+
ROM_REGION( 0x0100, "pic_data", ROMREGION_ERASEFF )
ROM_END
diff --git a/src/mame/drivers/midvunit.cpp b/src/mame/drivers/midvunit.cpp
index 319eff9f656..76467a1099b 100644
--- a/src/mame/drivers/midvunit.cpp
+++ b/src/mame/drivers/midvunit.cpp
@@ -1341,7 +1341,7 @@ ROM_START( crusnusa40 ) /* Version 4.0, Wed Feb 08 1995 - 10:45:14 */
ROM_LOAD32_BYTE( "cusa.u27", 0x800001, 0x80000, CRC(2d977a8e) SHA1(8f4d511bfd6c3bee18daa7253be1a27d079aec8f) )
ROM_LOAD32_BYTE( "cusa.u28", 0x800002, 0x80000, CRC(cffa5fb1) SHA1(fb73bc8f65b604c374f88d0ecf06c50ef52f0547) )
ROM_LOAD32_BYTE( "cusa.u29", 0x800003, 0x80000, CRC(cbe52c60) SHA1(3f309ce8ef1784c830f4160cfe76dc3a0b438cac) )
-
+
ROM_REGION( 0x0b33, "pals", 0 ) // all protected
ROM_LOAD("a-19993.u38", 0x0000, 0x02e5, BAD_DUMP CRC(7e8b7b0d) SHA1(f9af19da171f949a11c5548da7b4277aecb6f2a8) ) /* TIBPAL22V10-15BCNT */
ROM_LOAD("a-19670.u43", 0x0000, 0x0144, BAD_DUMP CRC(acafcc97) SHA1(b6f916838d08590a536fe925ec62d66e6ea3dcbc) ) /* TIBPAL20L8-10CNT */
@@ -1384,7 +1384,7 @@ ROM_START( crusnusa21 ) /* Version 2.1, Wed Nov 09 1994 - 16:28:10 */
ROM_LOAD32_BYTE( "cusa.u27", 0x800001, 0x80000, CRC(2d977a8e) SHA1(8f4d511bfd6c3bee18daa7253be1a27d079aec8f) )
ROM_LOAD32_BYTE( "cusa.u28", 0x800002, 0x80000, CRC(cffa5fb1) SHA1(fb73bc8f65b604c374f88d0ecf06c50ef52f0547) )
ROM_LOAD32_BYTE( "cusa.u29", 0x800003, 0x80000, CRC(cbe52c60) SHA1(3f309ce8ef1784c830f4160cfe76dc3a0b438cac) )
-
+
ROM_REGION( 0x0b33, "pals", 0 ) // all protected
ROM_LOAD("a-19669.u38", 0x0000, 0x02dd, NO_DUMP ) /* TIBPAL22V10-15BCNT */
ROM_LOAD("a-19670.u43", 0x0000, 0x0144, BAD_DUMP CRC(acafcc97) SHA1(b6f916838d08590a536fe925ec62d66e6ea3dcbc) ) /* TIBPAL20L8-10CNT */
diff --git a/src/mame/drivers/namcos2.cpp b/src/mame/drivers/namcos2.cpp
index e0c504fa220..adf6dc37661 100644
--- a/src/mame/drivers/namcos2.cpp
+++ b/src/mame/drivers/namcos2.cpp
@@ -5827,7 +5827,7 @@ GAMEL( 1987, finallapjb, finallap, finallap, finallap, namcos2_state, init_final
GAME( 1988, assault, 0, base2, assault, namcos2_state, init_assault, ROT90, "Namco", "Assault (Rev B)", 0 )
GAME( 1988, assaultj, assault, base2, assault, namcos2_state, init_assaultj, ROT90, "Namco", "Assault (Japan)", 0 )
GAME( 1988, assaultp, assault, assaultp, assault, namcos2_state, init_assaultp, ROT90, "Namco", "Assault Plus (Japan)", 0)
-
+
GAME( 1988, metlhawk, 0, metlhawk, metlhawk, namcos2_state, init_metlhawk, ROT90, "Namco", "Metal Hawk (Rev C)", 0 )
GAME( 1988, metlhawkj, metlhawk, metlhawk, metlhawk, namcos2_state, init_metlhawk, ROT90, "Namco", "Metal Hawk (Japan, Rev F)", 0 )
diff --git a/src/mame/drivers/pc.cpp b/src/mame/drivers/pc.cpp
index b9d188eddcc..5402f35320a 100644
--- a/src/mame/drivers/pc.cpp
+++ b/src/mame/drivers/pc.cpp
@@ -70,7 +70,7 @@ public:
void juko16(machine_config &config);
void hyo88t(machine_config &config);
void kyoxt(machine_config &config);
-
+
void init_bondwell();
DECLARE_INPUT_CHANGED_MEMBER(pc_turbo_callback);
@@ -1392,6 +1392,6 @@ COMP( 198?, hyo88t, ibm5150, 0, pccga, pccga, pc_state,
COMP( 198?, kyoxt, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Kyocera", "XT", MACHINE_NOT_WORKING )
COMP( 198?, kaypropc, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Kaypro Corporation", "PC", MACHINE_NOT_WORKING )
COMP( 198?, ledgmodm, ibm5150, 0, siemens, pccga, pc_state, empty_init, "Leading Edge", "Model M", MACHINE_NOT_WORKING )
-COMP( 198?, eaglepc2, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Eagle", "PC-2", MACHINE_NOT_WORKING )
-COMP( 198?, mpx16, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Micromint", "MPX-16", MACHINE_NOT_WORKING )
-COMP( 198?, hstrtpls, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Vendex", "HeadStart Plus", MACHINE_NOT_WORKING )
+COMP( 198?, eaglepc2, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Eagle", "PC-2", MACHINE_NOT_WORKING )
+COMP( 198?, mpx16, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Micromint", "MPX-16", MACHINE_NOT_WORKING )
+COMP( 198?, hstrtpls, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Vendex", "HeadStart Plus", MACHINE_NOT_WORKING )
diff --git a/src/mame/drivers/pmd85.cpp b/src/mame/drivers/pmd85.cpp
index e5a3a2e8748..d2d9b5a4bf8 100644
--- a/src/mame/drivers/pmd85.cpp
+++ b/src/mame/drivers/pmd85.cpp
@@ -612,9 +612,9 @@ INPUT_PORTS_END
//static const struct CassetteOptions pmd85_cassette_options =
//{
-// 1, /* channels */
-// 16, /* bits per sample */
-// 7200 /* sample frequency */
+// 1, /* channels */
+// 16, /* bits per sample */
+// 7200 /* sample frequency */
//};
/* machine definition */
@@ -670,7 +670,7 @@ void pmd85_state::pmd85(machine_config &config, bool with_uart)
/* cassette */
CASSETTE(config, m_cassette);
m_cassette->set_formats(pmd85_cassette_formats);
-// m_cassette->set_create_opts(&pmd85_cassette_options);
+// m_cassette->set_create_opts(&pmd85_cassette_options);
m_cassette->set_default_state(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED);
m_cassette->add_route(ALL_OUTPUTS, "mono", 0.05);
m_cassette->set_interface("pmd85_cass");
diff --git a/src/mame/drivers/psattack.cpp b/src/mame/drivers/psattack.cpp
index 965592abd9d..98a4e8fe4f3 100644
--- a/src/mame/drivers/psattack.cpp
+++ b/src/mame/drivers/psattack.cpp
@@ -8,10 +8,10 @@
TODO:
- Compact Flash hookup;
- - Requires timed based FIFO renderer, loops until both rear and front
- are equal.
+ - Requires timed based FIFO renderer, loops until both rear and front
+ are equal.
- Enables wavetable IRQ, even if so far no channel enables the submask;
- - Unemulated 93C86 EEPROM device;
+ - Unemulated 93C86 EEPROM device;
=============================================================================
@@ -164,7 +164,7 @@ private:
virtual void machine_start() override;
virtual void machine_reset() override;
void psattack_mem(address_map &map);
-
+
DECLARE_READ16_MEMBER(cfcard_data_r);
DECLARE_READ8_MEMBER(cfcard_regs_r);
DECLARE_WRITE8_MEMBER(cfcard_regs_w);
@@ -212,7 +212,7 @@ void psattack_state::psattack_mem(address_map &map)
map(0x01500000, 0x01500003).portr("IN0").w(FUNC(psattack_state::output_w));
map(0x01500004, 0x01500007).portr("IN1");
map(0x01500008, 0x0150000b).portr("IN2");
-// 0x0150000c is prolly eeprom
+// 0x0150000c is prolly eeprom
map(0x01800000, 0x01ffffff).m(m_vr0soc, FUNC(vrender0soc_device::regs_map));
// map(0x01802410, 0x01802413) peripheral chip select for cf?
diff --git a/src/mame/drivers/saitek_mark5.cpp b/src/mame/drivers/saitek_mark5.cpp
index 6cfb006b121..a232a9545e8 100644
--- a/src/mame/drivers/saitek_mark5.cpp
+++ b/src/mame/drivers/saitek_mark5.cpp
@@ -14,7 +14,7 @@ Mark VI/Philidor was released a year later, it was a plug-in module for the Mark
It's not much stronger than Mark V(retroactively called Mark V/Travemunde).
When using the MAME sensorboard interface with MK VI, reset the board by pressing
-CLEAR before RESET, needed on 1st power-on or when starting a new game.
+CLEAR before RESET, needed on 1st power-on or when starting a new game.
Hardware notes:
- SY6502A @ ~2MHz (19.6608MHz XTAL, bunch of 74113 dividers)
diff --git a/src/mame/drivers/segac2.cpp b/src/mame/drivers/segac2.cpp
index aa3c42fb2c1..a194c4d37d0 100644
--- a/src/mame/drivers/segac2.cpp
+++ b/src/mame/drivers/segac2.cpp
@@ -1542,10 +1542,10 @@ WRITE_LINE_MEMBER(segac2_state::vdp_lv4irqline_callback_c2)
}
/*
- sound output balance (tfrceac)
- reference : https://youtu.be/AOmeWp9qe5E
- reference 2 : https://youtu.be/Tq8VkJYmij8
- reference 3: https://youtu.be/VId_HWdNuyA
+ sound output balance (tfrceac)
+ reference : https://youtu.be/AOmeWp9qe5E
+ reference 2 : https://youtu.be/Tq8VkJYmij8
+ reference 3: https://youtu.be/VId_HWdNuyA
*/
void segac2_state::segac(machine_config &config)
{
diff --git a/src/mame/drivers/sm7238.cpp b/src/mame/drivers/sm7238.cpp
index 97d84ae8f5d..bf48ae3fcb2 100644
--- a/src/mame/drivers/sm7238.cpp
+++ b/src/mame/drivers/sm7238.cpp
@@ -141,7 +141,7 @@ void sm7238_state::videobank_map(address_map &map)
void sm7238_state::sm7238_io(address_map &map)
{
map.unmap_value_high();
-// map(0x40, 0x4f).ram() // LUT
+// map(0x40, 0x4f).ram() // LUT
map(0xa0, 0xa1).rw(m_i8251line, FUNC(i8251_device::read), FUNC(i8251_device::write));
map(0xa4, 0xa5).rw(m_i8251kbd, FUNC(i8251_device::read), FUNC(i8251_device::write));
map(0xa8, 0xab).rw(m_t_color, FUNC(pit8253_device::read), FUNC(pit8253_device::write));
diff --git a/src/mame/drivers/trivrus.cpp b/src/mame/drivers/trivrus.cpp
index 0f1c293fecf..485e77b1331 100644
--- a/src/mame/drivers/trivrus.cpp
+++ b/src/mame/drivers/trivrus.cpp
@@ -5,13 +5,13 @@
Trivia R Us (c) 2009 AGT
driver by Angelo Salese, based off original crystal.cpp by ElSemi
- original mods on this driver by Luca Elia
+ original mods on this driver by Luca Elia
TODO:
- - touch panel, according to service mode can be generic, atouch or 3M
- (microtouch?). It interfaces thru UART0 port;
+ - touch panel, according to service mode can be generic, atouch or 3M
+ (microtouch?). It interfaces thru UART0 port;
- RTC (unknown type);
- - Split romset or add a slot option supporting debug terminal mode;
+ - Split romset or add a slot option supporting debug terminal mode;
=============================================================================
@@ -303,7 +303,7 @@ void trivrus_state::trivrus(machine_config &config)
m_vr0soc->set_host_cpu_tag(m_maincpu);
m_vr0soc->set_external_vclk(28636360);
m_vr0soc->tx_callback<0>().set(m_microtouch, FUNC(microtouch_device::rx));
-
+
// TODO: 3M from service mode, most likely wrong?
MICROTOUCH(config, m_microtouch, 9600).stx().set(m_vr0soc, FUNC(vrender0soc_device::rx_w<0>));
}
diff --git a/src/mame/includes/archimds.h b/src/mame/includes/archimds.h
index e6080400cfb..e545d01f476 100644
--- a/src/mame/includes/archimds.h
+++ b/src/mame/includes/archimds.h
@@ -105,7 +105,7 @@ private:
static const device_timer_id TIMER_IOC = 3;
-// void vidc_vblank();
+// void vidc_vblank();
void vidc_video_tick();
void vidc_audio_tick();
void ioc_timer(int param);
diff --git a/src/mame/machine/archimds.cpp b/src/mame/machine/archimds.cpp
index c7624291993..031f27fb196 100644
--- a/src/mame/machine/archimds.cpp
+++ b/src/mame/machine/archimds.cpp
@@ -147,7 +147,7 @@ void archimedes_state::vidc_video_tick()
if(m_cursor_enabled == true)
{
uint32_t ccur_size = m_vidc->get_cursor_size();
-
+
for(uint32_t ccur = 0; ccur < ccur_size; ccur++)
m_vidc->write_cram(ccur, space.read_byte(m_vidc_cinit+ccur));
}
@@ -545,7 +545,7 @@ WRITE32_MEMBER( archimedes_state::ioc_ctrl_w )
---- --x- I2C clock
---- ---x I2C data
*/
-
+
//m_ioc_regs[CONTROL] = data & 0x38;
//if(data & 0x40)
// popmessage("Muting sound, contact MAME/MESSdev");
@@ -562,7 +562,7 @@ WRITE32_MEMBER( archimedes_state::ioc_ctrl_w )
archimedes_request_irq_a((data & 0x80) ? ARCHIMEDES_IRQA_FORCE : 0);
//if(data & 0x08) //set up the VBLANK timer
- // m_vbl_timer->adjust(m_screen->time_until_pos(m_vidc_vblank_time));
+ // m_vbl_timer->adjust(m_screen->time_until_pos(m_vidc_vblank_time));
break;
@@ -687,12 +687,12 @@ READ32_MEMBER(archimedes_state::archimedes_ioc_r)
return 0xed; // ID for econet
case 0x3a0004:
return m_joy[0].read_safe(0xff);
- case 0x3a0008:
+ case 0x3a0008:
// Top Banana reads there and do various checks,
// disallowing player 1 joy use if they fails (?)
return m_joy[1].read_safe(0xff);
}
-
+
logerror("IOC: Econet Read %08x at PC=%08x\n",ioc_addr, m_maincpu->pc());
return 0xffff;
case 3:
@@ -716,7 +716,7 @@ READ32_MEMBER(archimedes_state::archimedes_ioc_r)
case 0x7c:
logerror("FDC: reading Joystick port %04x at PC=%08x\n",ioc_addr, m_maincpu->pc());
return 0xff;
-
+
}
}
@@ -784,16 +784,16 @@ WRITE32_MEMBER(archimedes_state::archimedes_ioc_w)
// TODO: understand how player 2 inputs routes, related somehow to CONTROL bit 6 (cfr. blitz in SW list)
// TODO: paradr2k polls here with bit 7 and fails detection (Vertical Twist)
uint8_t cur_joy_in = bitswap<8>(m_joy[0].read_safe(0xff),7,6,5,4,0,1,2,3);
-
+
m_joy_serial_data = (data & 0xff) ^ 0xff;
bool serial_on = false;
-
+
if (m_joy_serial_data == 0x20)
serial_on = true;
else if (m_joy_serial_data & cur_joy_in)
serial_on = true;
-
-
+
+
// wants printer irq for some reason (connected on parallel?)
if (serial_on == true)
{
@@ -805,7 +805,7 @@ WRITE32_MEMBER(archimedes_state::archimedes_ioc_w)
archimedes_clear_irq_a(ARCHIMEDES_IRQA_PRINTER_BUSY);
//m_ioc_regs[CONTROL] &= ~0x40;
}
-
+
return;
}
case 0x18: // latch B
diff --git a/src/mame/machine/saa7191.cpp b/src/mame/machine/saa7191.cpp
index 58adc913ebf..865b3a5da25 100644
--- a/src/mame/machine/saa7191.cpp
+++ b/src/mame/machine/saa7191.cpp
@@ -6,8 +6,8 @@
Philips SAA7191B Digital Multistandard Colour Decoder (DMSD)
- TODO:
- - Actual functionality
+ TODO:
+ - Actual functionality
*********************************************************************/
@@ -17,8 +17,8 @@
#define LOG_UNKNOWN (1 << 0)
#define LOG_READS (1 << 1)
#define LOG_WRITES (1 << 2)
-#define LOG_ERRORS (1 << 3)
-#define LOG_I2C_IGNORES (1 << 4)
+#define LOG_ERRORS (1 << 3)
+#define LOG_I2C_IGNORES (1 << 4)
#define LOG_DEFAULT (LOG_READS | LOG_WRITES | LOG_ERRORS | LOG_I2C_IGNORES | LOG_UNKNOWN)
#define VERBOSE (LOG_DEFAULT)
diff --git a/src/mame/machine/saa7191.h b/src/mame/machine/saa7191.h
index b641aa46190..42a5170b162 100644
--- a/src/mame/machine/saa7191.h
+++ b/src/mame/machine/saa7191.h
@@ -6,8 +6,8 @@
Philips SAA7191B Digital Multistandard Colour Decoder (DMSD)
- TODO:
- - Actual functionality
+ TODO:
+ - Actual functionality
*********************************************************************/
@@ -174,4 +174,4 @@ private:
DECLARE_DEVICE_TYPE(SAA7191, saa7191_device)
-#endif // MAME_MACHINE_SAA7191_H \ No newline at end of file
+#endif // MAME_MACHINE_SAA7191_H
diff --git a/src/mame/machine/segabill.cpp b/src/mame/machine/segabill.cpp
index 501e72edf52..554c35965e3 100644
--- a/src/mame/machine/segabill.cpp
+++ b/src/mame/machine/segabill.cpp
@@ -5,10 +5,10 @@
Sega Billboard
- TODO: Timing, vs298 needs a higher interrupt frequency, but then
- the animations seem to fast?
- Document and add support for Blast City Billboard with EPR-19158.IC3
- ( https://www.arcade-projects.com/forums/index.php?attachment/1477-blast-city-billboard-pcb-jpg/ )
+ TODO: Timing, vs298 needs a higher interrupt frequency, but then
+ the animations seem to fast?
+ Document and add support for Blast City Billboard with EPR-19158.IC3
+ ( https://www.arcade-projects.com/forums/index.php?attachment/1477-blast-city-billboard-pcb-jpg/ )
***************************************************************************/
@@ -49,14 +49,14 @@ Sega VERSUS CITY BILLBOARD CONTROL BD 837-11854 (C) 1991
EEPROM:
EPR-18022.IC2 Sega VERSUS CITY BILLBOARD
Notes:
- SW1 8-DIP switch
- CN2 10 pin connector for power input (5v)
- CN3 J50 pin connector for two 7-SEG UNITs (VSC-0220, connects at VSC-0221 7SEG BASE)
- CN4 J20 pin connector to BLUE(U-P) PANEL
- (600-6770-005 WIRE HARN BILLBOARD FLT BD, CN7(?) and CN11 for Model3, CN6 and CN12 for Model2)
- CN5 has no connector soldered and as such is unused and has two silkscreened PS2501-4 ICs below,
- similar to the ICs under CN4
- 171-6218B is printed to right of (C) SEGA 1991 on bottom of board
+ SW1 8-DIP switch
+ CN2 10 pin connector for power input (5v)
+ CN3 J50 pin connector for two 7-SEG UNITs (VSC-0220, connects at VSC-0221 7SEG BASE)
+ CN4 J20 pin connector to BLUE(U-P) PANEL
+ (600-6770-005 WIRE HARN BILLBOARD FLT BD, CN7(?) and CN11 for Model3, CN6 and CN12 for Model2)
+ CN5 has no connector soldered and as such is unused and has two silkscreened PS2501-4 ICs below,
+ similar to the ICs under CN4
+ 171-6218B is printed to right of (C) SEGA 1991 on bottom of board
*/
#include "emu.h"
#include "segabill.h"
diff --git a/src/mame/machine/segacrp2_device.cpp b/src/mame/machine/segacrp2_device.cpp
index 09573756add..8fd7b4f5729 100644
--- a/src/mame/machine/segacrp2_device.cpp
+++ b/src/mame/machine/segacrp2_device.cpp
@@ -142,7 +142,7 @@ void nec_315_5136_device::decrypt()
0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,
0x03,0x03,0x03,0x03,0x03,0x03,0x04,0x04
};
-
+
decode(memregion(tag())->base(), m_decrypted, xor_table, swap_table);
}
diff --git a/src/mame/machine/vino.cpp b/src/mame/machine/vino.cpp
index cb1126cb97e..5b0c8e0f74c 100644
--- a/src/mame/machine/vino.cpp
+++ b/src/mame/machine/vino.cpp
@@ -14,15 +14,15 @@
#define LOG_UNKNOWN (1 << 0)
#define LOG_READS (1 << 1)
#define LOG_WRITES (1 << 2)
-#define LOG_DESCS (1 << 3)
-#define LOG_DMA (1 << 4)
-#define LOG_DMA_DATA (1 << 5)
-#define LOG_FIFO (1 << 6)
-#define LOG_FIELDS (1 << 7)
-#define LOG_COORDS (1 << 8)
-#define LOG_INPUTS (1 << 9)
-#define LOG_INTERRUPTS (1 << 10)
-#define LOG_INDICES (1 << 11)
+#define LOG_DESCS (1 << 3)
+#define LOG_DMA (1 << 4)
+#define LOG_DMA_DATA (1 << 5)
+#define LOG_FIFO (1 << 6)
+#define LOG_FIELDS (1 << 7)
+#define LOG_COORDS (1 << 8)
+#define LOG_INPUTS (1 << 9)
+#define LOG_INTERRUPTS (1 << 10)
+#define LOG_INDICES (1 << 11)
#define LOG_DEFAULT (LOG_WRITES | LOG_FIELDS | LOG_DMA | LOG_DESCS | LOG_READS | LOG_INTERRUPTS | LOG_INDICES | LOG_COORDS)
#define VERBOSE (0)
diff --git a/src/mame/machine/vino.h b/src/mame/machine/vino.h
index ca96b50f25c..3214f1f9d48 100644
--- a/src/mame/machine/vino.h
+++ b/src/mame/machine/vino.h
@@ -98,7 +98,7 @@ private:
ISR_CHB_EOF = (1 << 3),
ISR_CHB_FIFO = (1 << 4),
ISR_CHB_DESC = (1 << 5),
- ISR_MASK = 0x3f,
+ ISR_MASK = 0x3f,
ALPHA_MASK = 0xff,
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index fe9ce11629d..27ea28ede61 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -2453,62 +2453,62 @@ pcd4x // Siemens-Nixdorf PCD-4H and other 486 desktops
pcd4nl // 1995 Siemens-Nixdorf PCD-4NL 486 subnotebook
pcd4nd // 1993 Siemens-Nixdorf 486 notebook
ct386sx //
-wy220001 // WYSEpc
+wy220001 // WYSEpc
cxsxd //
ec1842 //
ec1849 //
ev1806 // Everex EV-1806
-ev1815 // Everex EV-1815
+ev1815 // Everex EV-1815
ews286 // 1986 Ericsson WS286
ficpio2 // 1995 FIC 486-PIO-2
ficvipio // FIC 486-VIP-IO
ficvipio2 // FIC 486-VIP-IO2
ftsserv // 1991 Apricot FTs (Scorpion)
-aubam12s2 // AUVA COMPUTER, INC. BAM/12-S2 motherboard (286)
-bi025c // BI-025C HT 12 286 motherboard (286)
-kma202f // KMA-202F-12R motherboard (286)
-cdtekg2 // CDTEK motherboard with Headland G2 chipset (286)
-octekg2 // Octek motherboard with Headland G2 chipset (286)
-olim203 // Olivetti 286 motherboard
-headg2 // 286 motherboards with Headland G2 chipset
-mb1212c // Biostar MB-1212C motherboard (286)
-bam16a0 // VIP-M21502A BAM16-A0 motherboard (286)
-cmpa286 // CMP enterprise CO.LTD. motherboard (286)
-suntac5 // 286 motherboards using the 5-chip SUNTAC chipset
+aubam12s2 // AUVA COMPUTER, INC. BAM/12-S2 motherboard (286)
+bi025c // BI-025C HT 12 286 motherboard (286)
+kma202f // KMA-202F-12R motherboard (286)
+cdtekg2 // CDTEK motherboard with Headland G2 chipset (286)
+octekg2 // Octek motherboard with Headland G2 chipset (286)
+olim203 // Olivetti 286 motherboard
+headg2 // 286 motherboards with Headland G2 chipset
+mb1212c // Biostar MB-1212C motherboard (286)
+bam16a0 // VIP-M21502A BAM16-A0 motherboard (286)
+cmpa286 // CMP enterprise CO.LTD. motherboard (286)
+suntac5 // 286 motherboards using the 5-chip SUNTAC chipset
ht12a // 286 motherboards using the Headland HT12/A chipset
-vlsi5 // 286 motherboards using the 5-chip VLSI chipset
-sy012 // SY-012 16/25 386MB VER: 5.2 motherboard (386)
-frxc402 // 386 motherboards using FOREX FRX46C402/FRX36C300/SIS85C206 chips
-gs611606a // Goldstar P/N 611-606A Rev 1.0A motherboard (386)
-dfi386 // DFI 386-20.REV0 motherboard (386)
-386sc // 386 SC Rev A2 motherboard
-386sc2c //
-opti495xlc // Motherboards using the OPTi 82C495XLC chipset (386)
-isa386u30 // Asus ISA-386U30 REV.2.2 motherboard (386)
-isa386c // Asus ISA-386C motherboard (386)
-pt581392 // Motherboard using the Forex FRX46C402 + FRX46C411 + SiS 85C206 chipset (386)
-pem2530 // DTK PEM 2530 motherboard (386)
-tam3340ma0 // TAM/33/40-MA0 (CM318R00,M31-R00)
-alim1429 // Motherboards using the ALi M1429 A1 and M1431 A2 chipset (386)
-u3911v3 // Uniron U3911-V3 motherboard (286)
-mkp286 // Morse KP-286 motherboard (286)
-mba009 // HLB-286 MBA-009 motherboard (286)
-pccm205 // PC-Chips M205 motherboard (286)
-pccm321 // PC-Chips M321 motherboard (386)
-pccm326 // PC-Chips M326 motherboard (386)
-pccm919 // PC-Chips M919 motherboard (486)
-snomi286 // Snobol Mini 286 motherboard (286)
-sy019hi // Soyo SY-019H and SY-019I motherboards (386)
-sm38640f // SM 386-40F motherboard (386)
-4nd04a // 386-4N-D04A motherboard (386)
-hot304 // Shuttle HOT-304
+vlsi5 // 286 motherboards using the 5-chip VLSI chipset
+sy012 // SY-012 16/25 386MB VER: 5.2 motherboard (386)
+frxc402 // 386 motherboards using FOREX FRX46C402/FRX36C300/SIS85C206 chips
+gs611606a // Goldstar P/N 611-606A Rev 1.0A motherboard (386)
+dfi386 // DFI 386-20.REV0 motherboard (386)
+386sc // 386 SC Rev A2 motherboard
+386sc2c //
+opti495xlc // Motherboards using the OPTi 82C495XLC chipset (386)
+isa386u30 // Asus ISA-386U30 REV.2.2 motherboard (386)
+isa386c // Asus ISA-386C motherboard (386)
+pt581392 // Motherboard using the Forex FRX46C402 + FRX46C411 + SiS 85C206 chipset (386)
+pem2530 // DTK PEM 2530 motherboard (386)
+tam3340ma0 // TAM/33/40-MA0 (CM318R00,M31-R00)
+alim1429 // Motherboards using the ALi M1429 A1 and M1431 A2 chipset (386)
+u3911v3 // Uniron U3911-V3 motherboard (286)
+mkp286 // Morse KP-286 motherboard (286)
+mba009 // HLB-286 MBA-009 motherboard (286)
+pccm205 // PC-Chips M205 motherboard (286)
+pccm321 // PC-Chips M321 motherboard (386)
+pccm326 // PC-Chips M326 motherboard (386)
+pccm919 // PC-Chips M919 motherboard (486)
+snomi286 // Snobol Mini 286 motherboard (286)
+sy019hi // Soyo SY-019H and SY-019I motherboards (386)
+sm38640f // SM 386-40F motherboard (386)
+4nd04a // 386-4N-D04A motherboard (386)
+hot304 // Shuttle HOT-304
hot409 // Shuttle HOT-409
ibm5162 // 1986 IBM XT 5162 (XT w/80286)
ibm5170 // 1984 IBM PC/AT 5170, original 6 MHz model
ibm5170a // 1985 IBM PC/AT 5170, enhanced 8 MHz model
ibmps1es // IBM PS/1 (Spanish)
k286i // 1985 Kaypro 286i
-elanht286 // Leanord Elan High Tech 286
+elanht286 // Leanord Elan High Tech 286
kt216wb5 // KT216WB5-HI Rev.2
lm103s //
m290 // Olivetti M290
@@ -2541,7 +2541,7 @@ xb42664 // 1989 Apricot XEN-S (Venus I Motherboard 386)
xb42664a // 1990 Apricot XEN-S (Venus II Motherboard 386) (Bios:1.02.17)
lion3500 // 1993 Lion 3500C/T notebook
o286foxii // Octek Fox II motherboard (286)
-ocjagv // Octek Jaguar V motherboard (386)
+ocjagv // Octek Jaguar V motherboard (386)
@source:atari_s1.cpp
aavenger //
@@ -31684,10 +31684,10 @@ sicpc1605 // Siemens Sicomp PC16-05
ssam88s //
sx16 // Sanyo SX-16
zdsupers //
-ledgmodm // Leading Edge Model M
-eaglepc2 // Eagle PC-2
-mpx16 // Ciarcia's Circuit Cellar Micromint MPX-16
-hstrtpls // Vendex HeadStart Plus
+ledgmodm // Leading Edge Model M
+eaglepc2 // Eagle PC-2
+mpx16 // Ciarcia's Circuit Cellar Micromint MPX-16
+hstrtpls // Vendex HeadStart Plus
@source:pc100.cpp
pc100 //
diff --git a/src/mame/video/deco_mlc.cpp b/src/mame/video/deco_mlc.cpp
index d47482871fd..d97042779cf 100644
--- a/src/mame/video/deco_mlc.cpp
+++ b/src/mame/video/deco_mlc.cpp
@@ -100,7 +100,7 @@ void deco_mlc_state::drawgfxzoomline(u32* dest, u8* pri,const rectangle &clip,gf
const u8 *source2 = code_base2 + (srcline) * gfx->rowbytes();
// alphaMode & 0xc0 = 0xc0 : Shadow, 0 : Alpha or Pre-shadowed, Other bits unknown
if (shadowMode && (alphaMode & 0xc0))
- { /* TODO : 8bpp and shadow can use simultaneously? */
+ { /* TODO : 8bpp and shadow can use simultaneously? */
int x, x_index = x_index_base;
for (x = sx; x < ex; x++)
{
diff --git a/src/mame/video/segaic24.cpp b/src/mame/video/segaic24.cpp
index b006dee836e..5a5f1d76a14 100644
--- a/src/mame/video/segaic24.cpp
+++ b/src/mame/video/segaic24.cpp
@@ -665,7 +665,7 @@ void segas24_sprite_device::draw(bitmap_ind16 &bitmap, const rectangle &cliprect
cclip = clip[countspr];
if(cclip) {
- // Crackdown uses this on pre-title screen intro
+ // Crackdown uses this on pre-title screen intro
// for masking both avatars and the Sega logo itself.
clip_reverse_y = (cclip[1] & 0x2000) >> 13;
min_y = (cclip[2] & 511);
diff --git a/src/osd/modules/lib/osdlib.h b/src/osd/modules/lib/osdlib.h
index d126ed7f2ce..0095244d6fe 100644
--- a/src/osd/modules/lib/osdlib.h
+++ b/src/osd/modules/lib/osdlib.h
@@ -54,7 +54,7 @@ int osd_setenv(const char *name, const char *value, int overwrite);
/*-----------------------------------------------------------------------------
- osd_get_clipboard_text: retrieves text from the clipboard
+ osd_get_clipboard_text: retrieves text from the clipboard
-----------------------------------------------------------------------------*/
std::string osd_get_clipboard_text(void);
diff --git a/src/osd/modules/monitor/monitor_mac.cpp b/src/osd/modules/monitor/monitor_mac.cpp
index 338911cafdb..74523105cf0 100644
--- a/src/osd/modules/monitor/monitor_mac.cpp
+++ b/src/osd/modules/monitor/monitor_mac.cpp
@@ -84,11 +84,11 @@ public:
std::shared_ptr<osd_monitor_info> monitor_from_window(const osd_window& window) override
{
-// if (!m_initialized)
+// if (!m_initialized)
return nullptr;
-// std::uint64_t display = SDL_GetWindowDisplayIndex(static_cast<const mac_window_info &>(window).platform_window());
-// return monitor_from_handle(display);
+// std::uint64_t display = SDL_GetWindowDisplayIndex(static_cast<const mac_window_info &>(window).platform_window());
+// return monitor_from_handle(display);
}
protected: