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author Miodrag Milanovic <mmicko@gmail.com>2013-11-05 06:59:51 +0000
committer Miodrag Milanovic <mmicko@gmail.com>2013-11-05 06:59:51 +0000
commit44d5c1b8ab2ef3c06e831f901d0ab95262073bd7 (patch)
treebfdb73de82a28464c3b2c3098ad77a745b67759e
parent50cdc0f4ae9f07d666341cf3f60c253a71e6f016 (diff)
Cleanups and version bumpmame0151
-rw-r--r--hash/abc1600.xml2
-rw-r--r--hash/abc800.xml2
-rw-r--r--hash/c64_cart.xml10
-rw-r--r--hash/ibm5170.xml22
-rw-r--r--hash/ibm5170_cdrom.xml10
-rw-r--r--hash/megadriv.xml2
-rw-r--r--hash/nes.xml6
-rw-r--r--hash/pet_rom.xml2
-rw-r--r--src/emu/bus/a2bus/a2cffa.c2
-rw-r--r--src/emu/bus/a2bus/a2hsscsi.c14
-rw-r--r--src/emu/bus/a2bus/a2scsi.c10
-rw-r--r--src/emu/bus/abcbus/abcbus.h2
-rw-r--r--src/emu/bus/abcbus/lux10828.h2
-rw-r--r--src/emu/bus/abcbus/lux21046.c10
-rw-r--r--src/emu/bus/abcbus/lux21046.h2
-rw-r--r--src/emu/bus/abcbus/lux21056.c70
-rw-r--r--src/emu/bus/abcbus/lux21056.h4
-rw-r--r--src/emu/bus/adamnet/fdc.h2
-rw-r--r--src/emu/bus/c64/partner.c2
-rw-r--r--src/emu/bus/c64/partner.h2
-rw-r--r--src/emu/bus/c64/tdos.c62
-rw-r--r--src/emu/bus/centronics/ctronics.c4
-rw-r--r--src/emu/bus/centronics/ctronics.h4
-rw-r--r--src/emu/bus/ieee488/c2031.h2
-rw-r--r--src/emu/bus/isbx/compis_fdc.c2
-rw-r--r--src/emu/bus/isbx/compis_fdc.h2
-rw-r--r--src/emu/bus/isbx/isbx.h4
-rw-r--r--src/emu/bus/plus4/c1551.h2
-rw-r--r--src/emu/cpu/i8089/i8089.c4
-rw-r--r--src/emu/cpu/i8089/i8089.h4
-rw-r--r--src/emu/cpu/i8089/i8089_channel.c4
-rw-r--r--src/emu/cpu/i8089/i8089_channel.h4
-rw-r--r--src/emu/cpu/i8089/i8089_dasm.c4
-rw-r--r--src/emu/cpu/i8089/i8089_ops.c4
-rw-r--r--src/emu/cpu/nec/nec.c17
-rw-r--r--src/emu/cpu/nec/v25.c1
-rw-r--r--src/emu/cpu/rsp/rsp.c22
-rw-r--r--src/emu/cpu/rsp/rspdrc.c8424
-rw-r--r--src/emu/cpu/saturn/saturn.c5
-rw-r--r--src/emu/cpu/scudsp/scudsp.c1
-rw-r--r--src/emu/cpu/scudsp/scudsp.h18
-rw-r--r--src/emu/cpu/sh2/sh2drc.c2
-rw-r--r--src/emu/imagedev/serial.h2
-rw-r--r--src/emu/ioport.c4
-rw-r--r--src/emu/machine/6525tpi.h6
-rw-r--r--src/emu/machine/74145.c8
-rw-r--r--src/emu/machine/74145.h4
-rw-r--r--src/emu/machine/74181.c2
-rw-r--r--src/emu/machine/er59256.c3
-rw-r--r--src/emu/machine/er59256.h8
-rw-r--r--src/emu/machine/i80130.c16
-rw-r--r--src/emu/machine/ins8154.c4
-rw-r--r--src/emu/machine/ins8154.h4
-rw-r--r--src/emu/machine/mc146818.c6
-rw-r--r--src/emu/machine/mc146818.h2
-rw-r--r--src/emu/machine/mc6846.h8
-rw-r--r--src/emu/machine/mc6854.c6
-rw-r--r--src/emu/machine/mc6854.h6
-rw-r--r--src/emu/machine/ncr5380n.c67
-rw-r--r--src/emu/machine/pd4990a.h6
-rw-r--r--src/emu/machine/ram.c4
-rw-r--r--src/emu/machine/ram.h4
-rw-r--r--src/emu/mame.c2
-rw-r--r--src/emu/netlist/devices/net_lib.c7
-rw-r--r--src/emu/netlist/devices/net_lib.h16
-rw-r--r--src/emu/netlist/devices/nld_7400.c2
-rw-r--r--src/emu/netlist/devices/nld_7400.h6
-rw-r--r--src/emu/netlist/devices/nld_signal.h438
-rw-r--r--src/emu/netlist/devices/nld_system.h10
-rw-r--r--src/emu/netlist/netlist.mak2
-rw-r--r--src/emu/netlist/nl_base.c23
-rw-r--r--src/emu/netlist/nl_base.h54
-rw-r--r--src/emu/netlist/nl_config.h24
-rw-r--r--src/emu/netlist/nl_lists.h4
-rw-r--r--src/emu/netlist/nl_setup.c3
-rw-r--r--src/emu/netlist/nl_setup.h1
-rw-r--r--src/emu/sound/2608intf.c4
-rw-r--r--src/emu/sound/s14001a.c4
-rw-r--r--src/emu/video/dl1416.c6
-rw-r--r--src/emu/video/dl1416.h6
-rw-r--r--src/emu/video/fixfreq.c14
-rw-r--r--src/emu/video/fixfreq.h5
-rw-r--r--src/emu/video/mb_vcu.c10
-rw-r--r--src/emu/video/mb_vcu.h6
-rw-r--r--src/emu/video/vector.c4
-rw-r--r--src/emu/video/vector.h17
-rw-r--r--src/emu/webengine.c16
-rwxr-xr-xsrc/lib/softfloat/fsincos.c124
-rw-r--r--src/lib/softfloat/softfloat.h4
-rw-r--r--src/mame/audio/n8080.c8
-rw-r--r--src/mame/audio/pleiads.c6
-rw-r--r--src/mame/audio/pleiads.h14
-rw-r--r--src/mame/audio/s11c_bg.c16
-rw-r--r--src/mame/audio/segag80r.c8
-rw-r--r--src/mame/audio/segasnd.c23
-rw-r--r--src/mame/audio/segasnd.h60
-rw-r--r--src/mame/audio/wpcsnd.c16
-rw-r--r--src/mame/drivers/8080bw.c14
-rw-r--r--src/mame/drivers/cchasm.c2
-rw-r--r--src/mame/drivers/cps1.c18
-rw-r--r--src/mame/drivers/cps2.c4
-rw-r--r--src/mame/drivers/cps3.c8
-rw-r--r--src/mame/drivers/dkong.c4
-rw-r--r--src/mame/drivers/gunpey.c6
-rw-r--r--src/mame/drivers/hideseek.c6
-rw-r--r--src/mame/drivers/igs017.c22
-rw-r--r--src/mame/drivers/jaguar.c70
-rw-r--r--src/mame/drivers/jangou.c2
-rw-r--r--src/mame/drivers/jpmsys5.c7
-rw-r--r--src/mame/drivers/lethalj.c4
-rw-r--r--src/mame/drivers/m92.c6
-rw-r--r--src/mame/drivers/mazerbla.c6
-rw-r--r--src/mame/drivers/n8080.c6
-rw-r--r--src/mame/drivers/namconb1.c15
-rw-r--r--src/mame/drivers/namcops2.c6
-rw-r--r--src/mame/drivers/neogeo.c4
-rw-r--r--src/mame/drivers/peplus.c2
-rw-r--r--src/mame/drivers/pgm.c4
-rw-r--r--src/mame/drivers/pong.c6
-rw-r--r--src/mame/drivers/s11c.c52
-rw-r--r--src/mame/drivers/scramble.c2
-rw-r--r--src/mame/drivers/sderby.c4
-rw-r--r--src/mame/drivers/segag80r.c10
-rw-r--r--src/mame/drivers/segag80v.c4
-rw-r--r--src/mame/drivers/stv.c34
-rw-r--r--src/mame/drivers/taito_f2.c2
-rw-r--r--src/mame/drivers/thepit.c26
-rw-r--r--src/mame/drivers/tumbleb.c6
-rw-r--r--src/mame/drivers/twin16.c8
-rw-r--r--src/mame/drivers/wallc.c21
-rw-r--r--src/mame/drivers/wpc_dcs.c18
-rw-r--r--src/mame/etc/template_cpu.h4
-rw-r--r--src/mame/includes/1943.h2
-rw-r--r--src/mame/includes/aztarac.h2
-rw-r--r--src/mame/includes/cchasm.h2
-rw-r--r--src/mame/includes/cinemat.h2
-rw-r--r--src/mame/includes/dkong.h10
-rw-r--r--src/mame/includes/pgm.h10
-rw-r--r--src/mame/includes/segag80r.h4
-rw-r--r--src/mame/includes/segag80v.h4
-rw-r--r--src/mame/includes/wpc_pin.h2
-rw-r--r--src/mame/machine/igs022.c12
-rw-r--r--src/mame/machine/igs022.h2
-rw-r--r--src/mame/machine/igs025.c23
-rw-r--r--src/mame/machine/igs028.c12
-rw-r--r--src/mame/machine/igs028.h2
-rw-r--r--src/mame/machine/pgmprot_igs025_igs022.c32
-rw-r--r--src/mame/machine/pgmprot_igs025_igs028.c2
-rw-r--r--src/mame/machine/pgmprot_igs027a_type3.c2
-rw-r--r--src/mame/machine/wpc.c29
-rw-r--r--src/mame/mame.lst16
-rw-r--r--src/mame/video/dkong.c10
-rw-r--r--src/mame/video/lethalj.c2
-rw-r--r--src/mame/video/n64.c6
-rw-r--r--src/mame/video/rdpbhelp.h167
-rw-r--r--src/mame/video/rdpblend.c16
-rw-r--r--src/mame/video/rdpblend.h56
-rw-r--r--src/mame/video/rdpspn16.c6
-rw-r--r--src/mame/video/rdptpipe.c104
-rw-r--r--src/mame/video/rdptpipe.h8
-rw-r--r--src/mame/video/tia.c192
-rw-r--r--src/mess/drivers/a7800.c272
-rw-r--r--src/mess/drivers/apple2.c2
-rw-r--r--src/mess/drivers/apricot.c4
-rw-r--r--src/mess/drivers/astrocde.c4
-rw-r--r--src/mess/drivers/bbc.c146
-rw-r--r--src/mess/drivers/cat.c32
-rw-r--r--src/mess/drivers/compis.c24
-rw-r--r--src/mess/drivers/ct486.c4
-rw-r--r--src/mess/drivers/dectalk.c10
-rw-r--r--src/mess/drivers/einstein.c4
-rw-r--r--src/mess/drivers/esq5505.c3
-rw-r--r--src/mess/drivers/esqmr.c4
-rw-r--r--src/mess/drivers/ex800.c6
-rw-r--r--src/mess/drivers/hp48.c6
-rw-r--r--src/mess/drivers/ibmpc.c6
-rw-r--r--src/mess/drivers/instruct.c2
-rw-r--r--src/mess/drivers/lx800.c4
-rw-r--r--src/mess/drivers/mc10.c4
-rw-r--r--src/mess/drivers/modellot.c2
-rw-r--r--src/mess/drivers/molecular.c12
-rw-r--r--src/mess/drivers/mtx.c4
-rw-r--r--src/mess/drivers/nascom1.c8
-rw-r--r--src/mess/drivers/ng_aes.c2
-rw-r--r--src/mess/drivers/pc.c4
-rw-r--r--src/mess/drivers/pc1512.c2
-rw-r--r--src/mess/drivers/pt68k4.c2
-rw-r--r--src/mess/drivers/px4.c4
-rw-r--r--src/mess/drivers/rmnimbus.c8
-rw-r--r--src/mess/drivers/samcoupe.c4
-rw-r--r--src/mess/drivers/saturn.c2
-rw-r--r--src/mess/drivers/socrates.c4
-rw-r--r--src/mess/drivers/sym1.c32
-rw-r--r--src/mess/drivers/tsispch.c4
-rw-r--r--src/mess/drivers/vtech1.c4
-rw-r--r--src/mess/drivers/zexall.c4
-rw-r--r--src/mess/includes/apple2.h2
-rw-r--r--src/mess/includes/at.h6
-rw-r--r--src/mess/includes/bbc.h6
-rw-r--r--src/mess/includes/compis.h48
-rw-r--r--src/mess/includes/einstein.h6
-rw-r--r--src/mess/includes/mtx.h4
-rw-r--r--src/mess/includes/nascom1.h6
-rw-r--r--src/mess/includes/rmnimbus.h2
-rw-r--r--src/mess/includes/thomson.h6
-rw-r--r--src/mess/machine/amigacd.c4
-rw-r--r--src/mess/machine/amstrad.c2
-rw-r--r--src/mess/machine/bbc.c8
-rw-r--r--src/mess/machine/compiskb.c10
-rw-r--r--src/mess/machine/compiskb.h2
-rw-r--r--src/mess/machine/cs4031.c4
-rw-r--r--src/mess/machine/cs4031.h4
-rw-r--r--src/mess/machine/e05a03.c4
-rw-r--r--src/mess/machine/e05a03.h4
-rw-r--r--src/mess/machine/einstein.c6
-rw-r--r--src/mess/machine/epson_sio.c4
-rw-r--r--src/mess/machine/epson_sio.h4
-rw-r--r--src/mess/machine/isa_cards.c4
-rw-r--r--src/mess/machine/isa_cards.h4
-rw-r--r--src/mess/machine/kb_7007_3.h2
-rw-r--r--src/mess/machine/kb_ec1841.c2
-rw-r--r--src/mess/machine/mtx.c4
-rw-r--r--src/mess/machine/nascom1.c6
-rw-r--r--src/mess/machine/pc.c8
-rw-r--r--src/mess/machine/pf10.c4
-rw-r--r--src/mess/machine/pf10.h4
-rw-r--r--src/mess/machine/samcoupe.c4
-rw-r--r--src/mess/machine/southbridge.c4
-rw-r--r--src/mess/machine/tf20.c4
-rw-r--r--src/mess/machine/tf20.h4
-rw-r--r--src/mess/mess.lst2
-rw-r--r--src/mess/video/samcoupe.c4
-rw-r--r--src/osd/sdl/input.c2
-rw-r--r--src/osd/sdl/sdl.mak2
-rw-r--r--src/osd/sdl/sdlsync_mini.c4
-rw-r--r--src/version.c2
236 files changed, 5930 insertions, 5978 deletions
diff --git a/hash/abc1600.xml b/hash/abc1600.xml
index bdc6023dd87..11008489d99 100644
--- a/hash/abc1600.xml
+++ b/hash/abc1600.xml
@@ -168,5 +168,5 @@
</dataarea>
</part>
</software>
-
+
</softwarelist>
diff --git a/hash/abc800.xml b/hash/abc800.xml
index 7512d7546c5..70fd0cd3e6a 100644
--- a/hash/abc800.xml
+++ b/hash/abc800.xml
@@ -158,7 +158,7 @@
<year>198?</year>
<publisher>Luxor</publisher>
<info name="usage" value="RUN&quot;LIB&quot;" />
-
+
<part name="flop" interface="floppy_5_25">
<dataarea name="flop" size="119474">
<rom name="ufd619.td0" size="119474" crc="d3f9487e" sha1="ad22609421d9abb4c803899b405d087ff3b91c38" offset="0" />
diff --git a/hash/c64_cart.xml b/hash/c64_cart.xml
index 2bc71509304..5c96d8c05a5 100644
--- a/hash/c64_cart.xml
+++ b/hash/c64_cart.xml
@@ -6920,12 +6920,12 @@
<year>1985</year>
<publisher>Timeworks</publisher>
<sharedfeat name="compatibility" value="NTSC,PAL"/>
-
+
<part name="cart" interface="c64_cart">
<feature name="slot" value="partner" />
<feature name="game" value="0" />
<feature name="exrom" value="1" />
-
+
<dataarea name="romh" size="0x4000">
<rom name="timeworks c-64 ver 2-16-87" size="0x4000" crc="d40ec888" sha1="c9050ce93f9375b81800953a38450b0de3751bca" offset="0" />
</dataarea>
@@ -6937,15 +6937,15 @@
<year>1987</year>
<publisher>ICS Electronics</publisher>
<sharedfeat name="compatibility" value="NTSC,PAL"/>
-
+
<part name="cart" interface="c64_cart">
<feature name="game" value="0" />
<feature name="exrom" value="0" />
-
+
<dataarea name="roml" size="0x2000">
<rom name="2.5 v low" size="0x2000" crc="66986152" sha1="ee4ad8ec165a9a3dfad1337a530df64170ad7522" offset="0" />
</dataarea>
-
+
<dataarea name="romh" size="0x2000">
<rom name="2.5 v. high" size="0x2000" crc="bc62db7f" sha1="4a3c97174b9912588009de28b0c9040e013f020e" offset="0" />
</dataarea>
diff --git a/hash/ibm5170.xml b/hash/ibm5170.xml
index bb1f9d7bf35..46c62558e31 100644
--- a/hash/ibm5170.xml
+++ b/hash/ibm5170.xml
@@ -304,7 +304,7 @@ Missing files come here
</dataarea>
</part>
</software>
-
+
<software name="1stword">
<description>1st Word Plus 2.0</description>
<year>19??</year>
@@ -804,7 +804,7 @@ Missing files come here
</dataarea>
</part>
</software>
-
+
<software name="os2_20">
<description>OS/2 2.0</description>
<year>1992</year>
@@ -3991,7 +3991,7 @@ Missing files come here
<description>Riki Coverdisk (June 1995) (Slovak)</description>
<year>1995</year>
<publisher>Riki</publisher>
- <info name="Contents" value="Pyrotechnika" />
+ <info name="Contents" value="Pyrotechnika" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0695-10.ima" size="1474560" crc="632e1b1b" sha1="c61bc9516d7c39cf785ab5e9d496907f9b5f6e45" offset="0" status="baddump" />
@@ -4003,7 +4003,7 @@ Missing files come here
<description>Riki Coverdisk (July 1995) (Slovak)</description>
<year>1995</year>
<publisher>Riki</publisher>
- <info name="Contents" value="Super Stardust" />
+ <info name="Contents" value="Super Stardust" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0795-11.ima" size="1474560" crc="8cb11858" sha1="492d5c9df9ff4e6a85797295d4d8e5b12ed24b04" offset="0" status="baddump" />
@@ -4039,7 +4039,7 @@ Missing files come here
<description>Riki Coverdisk (November 1995) (Slovak)</description>
<year>1995</year>
<publisher>Riki</publisher>
- <info name="Contents" value="Bleifuss" />
+ <info name="Contents" value="Bleifuss" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki1195-14.ima" size="1474560" crc="bad9bdca" sha1="4425c59acb4c47fdb9f3f9b3322ef9cd5984ec5b" offset="0" status="baddump" />
@@ -4063,7 +4063,7 @@ Missing files come here
<description>Riki Coverdisk (January 1996) (Slovak)</description>
<year>1996</year>
<publisher>Riki</publisher>
- <info name="Contents" value="Jungle Book" />
+ <info name="Contents" value="Jungle Book" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0196-16.ima" size="1474560" crc="2d363851" sha1="5b1d8fc2bd16ecad559f15ada6c477241d5a4848" offset="0" status="baddump" />
@@ -4075,7 +4075,7 @@ Missing files come here
<description>Riki Coverdisk (February 1996) (Slovak)</description>
<year>1996</year>
<publisher>Riki</publisher>
- <info name="Contents" value="Turrican II" />
+ <info name="Contents" value="Turrican II" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0296-17.ima" size="1474560" crc="0397885e" sha1="fbeb23616a222a87d0d3f1e1bb01d9468ea2e2d9" offset="0" status="baddump" />
@@ -4087,7 +4087,7 @@ Missing files come here
<description>Riki Coverdisk (March 1996) (Slovak)</description>
<year>1996</year>
<publisher>Riki</publisher>
- <info name="Contents" value="Worms" />
+ <info name="Contents" value="Worms" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0396-18.ima" size="1474560" crc="1884a1a5" sha1="3a3d1c942b7bdced7a65b0a3e3f65c583abdf03f" offset="0" status="baddump" />
@@ -4099,7 +4099,7 @@ Missing files come here
<description>Riki Coverdisk (April 1996) (Slovak)</description>
<year>1996</year>
<publisher>Riki</publisher>
- <info name="Contents" value="Tempest 2000" />
+ <info name="Contents" value="Tempest 2000" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0496-19.ima" size="1474560" crc="5df023bd" sha1="684baaaa927db7102dec1872da18bc20ff4c780b" offset="0" status="baddump" />
@@ -4111,7 +4111,7 @@ Missing files come here
<description>Riki Coverdisk (May 1996) (Slovak)</description>
<year>1996</year>
<publisher>Riki</publisher>
- <info name="Contents" value="Virtual Snooker" />
+ <info name="Contents" value="Virtual Snooker" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0596-20.ima" size="1474560" crc="5704d5cd" sha1="c283c7dc070fc9cb8b90fec096a980f4c713746c" offset="0" status="baddump" />
@@ -4123,7 +4123,7 @@ Missing files come here
<description>Riki Coverdisk (June 1996) (Slovak)</description>
<year>1996</year>
<publisher>Riki</publisher>
- <info name="Contents" value="World Rally Fever" />
+ <info name="Contents" value="World Rally Fever" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1474560">
<rom name="riki0696-21.ima" size="1474560" crc="e00c21c8" sha1="b05f84ecc7b8e42528395ac5282de8bd36b986b8" offset="0" status="baddump" />
diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml
index b14f2449ba4..e7fa555e6e2 100644
--- a/hash/ibm5170_cdrom.xml
+++ b/hash/ibm5170_cdrom.xml
@@ -6,7 +6,7 @@
<description>PC DOS 2000</description>
<year>1998</year>
<publisher>IBM</publisher>
-
+
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="pcdos2k" sha1="ae69e305e82f24d908296ba9f45a1321a1c9dd58" />
@@ -18,7 +18,7 @@
<description>Windows Software Development Kit Version 3.1</description>
<year>1992</year>
<publisher>Microsoft</publisher>
-
+
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="050-151-320" sha1="4840cb3624e4032456434e099cd0362bc278e680" />
@@ -30,7 +30,7 @@
<description>Windows Device Development Kit Version 3.1</description>
<year>1992</year>
<publisher>Microsoft</publisher>
-
+
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="win31ddk" sha1="0208c3299cb206ea8b9b7d99e75131661898bae2" />
@@ -42,7 +42,7 @@
<description>Windows Resource Kit for Operating System Version 3.1</description>
<year>1992</year>
<publisher>Microsoft</publisher>
-
+
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="win31rk" sha1="0813d90cf00e296676ecd0259cd425ab50670e8a" />
@@ -54,7 +54,7 @@
<description>Windows Multimedia Extensions 1.0</description>
<year>1992</year>
<publisher>Microsoft</publisher>
-
+
<part name="cdrom" interface="cdrom">
<diskarea name="cdrom">
<disk name="win30me" sha1="0ef02709c3ed3544fc01983921eaace878cf5d80" />
diff --git a/hash/megadriv.xml b/hash/megadriv.xml
index 3555cc82fb4..ccf6d2533df 100644
--- a/hash/megadriv.xml
+++ b/hash/megadriv.xml
@@ -29474,7 +29474,7 @@ Notice that these are not working on real hardware due to bugged code with VDP i
</dataarea>
</part>
</software>
-
+
<software name="topfight">
<description>Top Fighter 2000 MK VIII</description>
<year>199?</year>
diff --git a/hash/nes.xml b/hash/nes.xml
index 78d3e3c8894..9eeae623042 100644
--- a/hash/nes.xml
+++ b/hash/nes.xml
@@ -37501,11 +37501,11 @@
<feature name="batt?" value="BATTERY" />
<dataarea name="prg" size="262144">
<!-- The PRG split ROMs have to be confirmed -->
- <rom name="8-27 0 5-20.u1" size="131072" crc="06074289" sha1="7c5b4a7f51eb79458cbe7cb7e77aae4df6eac4f3" offset="0x00000" status="baddump" /> <!-- Actual label: 8/27 0 5:20 -->
- <rom name="8-27 1 5-20.u2" size="131072" crc="937992d7" sha1="e335b4c2dc3fc21effaa8a12d47677090c8b30c4" offset="0x20000" status="baddump" /> <!-- Actual label: 8/27 1 5:20 -->
+ <rom name="8-27 0 5-20.u1" size="131072" crc="06074289" sha1="7c5b4a7f51eb79458cbe7cb7e77aae4df6eac4f3" offset="0x00000" status="baddump" /> <!-- Actual label: 8/27 0 5:20 -->
+ <rom name="8-27 1 5-20.u2" size="131072" crc="937992d7" sha1="e335b4c2dc3fc21effaa8a12d47677090c8b30c4" offset="0x20000" status="baddump" /> <!-- Actual label: 8/27 1 5:20 -->
</dataarea>
<dataarea name="chr" size="131072">
- <rom name="t.s.b. chr 8-27.u5" size="131072" crc="e5f74c77" sha1="3657693f08c66d2db84bcf62fdd4c439603778f5" offset="00000" /> <!-- Actual label: T.S.B. CHR 8/27 -->
+ <rom name="t.s.b. chr 8-27.u5" size="131072" crc="e5f74c77" sha1="3657693f08c66d2db84bcf62fdd4c439603778f5" offset="00000" /> <!-- Actual label: T.S.B. CHR 8/27 -->
</dataarea>
<!-- 8k WRAM on cartridge, battery backed up -->
<dataarea name="bwram" size="8192">
diff --git a/hash/pet_rom.xml b/hash/pet_rom.xml
index 179ef2dce8c..e5699da1be9 100644
--- a/hash/pet_rom.xml
+++ b/hash/pet_rom.xml
@@ -62,7 +62,7 @@
<publisher>Skyles Electric Works Inc.</publisher>
<part name="rom" interface="pet_9000_rom">
- <dataarea name="rom" size="0x1000">
+ <dataarea name="rom" size="0x1000">
<rom name="com80u-9000.bin" size="0x1000" crc="7699b86b" sha1="51d43d05b7a657899d471371496de36e447c3ea4" offset="0" />
</dataarea>
</part>
diff --git a/src/emu/bus/a2bus/a2cffa.c b/src/emu/bus/a2bus/a2cffa.c
index f0ccdbcd832..df1ffbddeac 100644
--- a/src/emu/bus/a2bus/a2cffa.c
+++ b/src/emu/bus/a2bus/a2cffa.c
@@ -35,7 +35,7 @@ MACHINE_CONFIG_FRAGMENT( cffa2 )
MCFG_ATA_INTERFACE_ADD(CFFA2_ATA_TAG, ata_devices, "hdd", NULL, false)
// not yet, the core explodes
-// MCFG_SOFTWARE_LIST_ADD("hdd_list", "apple2gs_hdd")
+// MCFG_SOFTWARE_LIST_ADD("hdd_list", "apple2gs_hdd")
MACHINE_CONFIG_END
ROM_START( cffa2 )
diff --git a/src/emu/bus/a2bus/a2hsscsi.c b/src/emu/bus/a2bus/a2hsscsi.c
index 3c74d555371..e42fef2da05 100644
--- a/src/emu/bus/a2bus/a2hsscsi.c
+++ b/src/emu/bus/a2bus/a2hsscsi.c
@@ -3,10 +3,10 @@
a2hsscsi.c
Implementation of the Apple II High Speed SCSI Card
-
+
This uses an ASIC called "Sandwich II"; the card itself is
sometimes known as "Cocoon".
-
+
Notes:
C0n0-C0n7 = NCR5380 registers in normal order
C0n8 = DMA address low
@@ -17,7 +17,7 @@
C0nD = Enable DMA / reset 5380
C0nE = Priority (read bits 5-7) / Fire watchdog (write bit 7) / RAM bank (write bits 0-3)
C0nF = DMA speed (bit 7 = 0 for fast, 1 for slow) / ROM bank (write bits 0-4)
-
+
DMA control register (C0nC):
0x01 = pseudo-DMA enable
0x02 = DMA enable
@@ -27,13 +27,13 @@
0x20 = 5380 IRQ enable
0x40 = system DMA status (read only)
0x80 = DMA stopped due to IRQ
-
+
Enable DMA / reset 5380 register (C0nD):
0x01 = Resume DMA after rollover or IRQ
0x02 = Reset the 5380
0x40 = Clear test mode
0x80 = Set test mode
-
+
*********************************************************************/
#include "a2hsscsi.h"
@@ -182,9 +182,9 @@ UINT8 a2bus_hsscsi_device::read_c0nx(address_space &space, UINT8 offset)
break;
case 0xc:
- return 0x00; // indicate watchdog?
+ return 0x00; // indicate watchdog?
- case 0xe: // code at cf32 wants to RMW this without killing the ROM bank
+ case 0xe: // code at cf32 wants to RMW this without killing the ROM bank
return m_c0ne;
case 0xf:
diff --git a/src/emu/bus/a2bus/a2scsi.c b/src/emu/bus/a2bus/a2scsi.c
index d27903464b4..81a88bf1fd4 100644
--- a/src/emu/bus/a2bus/a2scsi.c
+++ b/src/emu/bus/a2bus/a2scsi.c
@@ -15,18 +15,18 @@
C0na = RAM and ROM bank switching
C0nb = reset 5380
C0nc = set IIgs block mode
- C0nd = set pseudo-DMA
+ C0nd = set pseudo-DMA
C0ne = read DRQ status in bit 7
-
+
In IIgs block mode, any read from C800-CBFF window fetches
the next byte from the 5380's DMA port. This lets you use the
65816 MVN/MVP operations to burst-transfer up to 1K at a time.
(Requires a cycle-by-cycle haltable 65816 core; don't install the
- GS/OS driver right now to avoid this)
-
+ GS/OS driver right now to avoid this)
+
Pseudo-DMA works similarly to the Mac implementation; use C0n8
to read/write "DMA" bytes in that mode.
-
+
*********************************************************************/
#include "a2scsi.h"
diff --git a/src/emu/bus/abcbus/abcbus.h b/src/emu/bus/abcbus/abcbus.h
index 7374cd70209..6148e9dd36c 100644
--- a/src/emu/bus/abcbus/abcbus.h
+++ b/src/emu/bus/abcbus/abcbus.h
@@ -204,7 +204,7 @@ public:
// ======================> abcbus_slot_device
class abcbus_slot_device : public device_t,
- public device_slot_interface
+ public device_slot_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/abcbus/lux10828.h b/src/emu/bus/abcbus/lux10828.h
index 757342e54b5..4067611460b 100644
--- a/src/emu/bus/abcbus/lux10828.h
+++ b/src/emu/bus/abcbus/lux10828.h
@@ -52,7 +52,7 @@
// ======================> luxor_55_10828_device
class luxor_55_10828_device : public device_t,
- public device_abcbus_card_interface
+ public device_abcbus_card_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/abcbus/lux21046.c b/src/emu/bus/abcbus/lux21046.c
index 42dea3dc827..3eba6c4f1a0 100644
--- a/src/emu/bus/abcbus/lux21046.c
+++ b/src/emu/bus/abcbus/lux21046.c
@@ -497,9 +497,9 @@ int luxor_55_21046_device::abcbus_csb()
UINT8 luxor_55_21046_device::abcbus_stat()
{
/*
-
+
bit description
-
+
0 3A pin 8
1 4B Q1
2 4B Q2
@@ -508,7 +508,7 @@ UINT8 luxor_55_21046_device::abcbus_stat()
5 PAL16R4 pin 17
6 S1/A: PREN*, S1/B: 4B Q6
7 S5/A: PAL16R4 pin 16 inverted, S5/B: 4B Q7
-
+
*/
UINT8 data = 0;
@@ -730,11 +730,11 @@ WRITE8_MEMBER( luxor_55_21046_device::_8a_w )
/*
if (BIT(data, 2))
{
- m_fdc->set_unscaled_clock(XTAL_16MHz/16);
+ m_fdc->set_unscaled_clock(XTAL_16MHz/16);
}
else
{
- m_fdc->set_unscaled_clock(XTAL_16MHz/8);
+ m_fdc->set_unscaled_clock(XTAL_16MHz/8);
}
*/
}
diff --git a/src/emu/bus/abcbus/lux21046.h b/src/emu/bus/abcbus/lux21046.h
index 2817e155ddd..ee090926270 100644
--- a/src/emu/bus/abcbus/lux21046.h
+++ b/src/emu/bus/abcbus/lux21046.h
@@ -51,7 +51,7 @@
// ======================> luxor_55_21046_device
class luxor_55_21046_device : public device_t,
- public device_abcbus_card_interface
+ public device_abcbus_card_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/abcbus/lux21056.c b/src/emu/bus/abcbus/lux21056.c
index 5b7796ad7d8..c2717e96e25 100644
--- a/src/emu/bus/abcbus/lux21056.c
+++ b/src/emu/bus/abcbus/lux21056.c
@@ -11,47 +11,47 @@
/*
- Use the CHDMAN utility to create a 5MB image for ABC 850:
+ Use the CHDMAN utility to create a 5MB image for ABC 850:
- $ chdman createhd -o /path/to/ro202.chd -chs 321,4,17 -ss 512
- $ chdman createhd -o /path/to/basf6185.chd -chs 440,6,32 -ss 256
+ $ chdman createhd -o /path/to/ro202.chd -chs 321,4,17 -ss 512
+ $ chdman createhd -o /path/to/basf6185.chd -chs 440,6,32 -ss 256
- or a 10MB image for ABC 852:
+ or a 10MB image for ABC 852:
- $ chdman createhd -o /path/to/nec5126.chd -chs 615,4,17 -ss 512
+ $ chdman createhd -o /path/to/nec5126.chd -chs 615,4,17 -ss 512
- or a 20MB image for ABC 856:
+ or a 20MB image for ABC 856:
- $ chdman createhd -o /path/to/micr1325.chd -chs 1024,8,33 -ss 256
+ $ chdman createhd -o /path/to/micr1325.chd -chs 1024,8,33 -ss 256
- Start the abc800 emulator with the ABC 850 attached on the ABC bus,
- with the new CHD and a UFD-DOS floppy mounted:
-
- $ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=ro202 -flop1 ufd631 -hard ro202.chd
- $ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=basf6185 -flop1 ufd631 -hard basf6185.chd
- $ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=nec5126 -flop1 ufd631 -hard nec5126.chd
- $ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=micr1325 -flop1 ufd631 -hard micr1325.chd
+ Start the abc800 emulator with the ABC 850 attached on the ABC bus,
+ with the new CHD and a UFD-DOS floppy mounted:
- Configure the floppy controller for use with an ABC 850:
+ $ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=ro202 -flop1 ufd631 -hard ro202.chd
+ $ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=basf6185 -flop1 ufd631 -hard basf6185.chd
+ $ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=nec5126 -flop1 ufd631 -hard nec5126.chd
+ $ mess abc800m -bus hdd -bus:hdd:io2 xebec,bios=micr1325 -flop1 ufd631 -hard micr1325.chd
- - Drive 0 Sides: Double
- - Drive 1 Sides: Double
- - Drive 0 Tracks: 40 or 80 depending on the UFD DOS image used
- - Drive 1 Tracks: 40 or 80 depending on the UFD DOS image used
- - Card Address: 44 (ABC 832/834/850)
+ Configure the floppy controller for use with an ABC 850:
- Reset the emulated machine by pressing F3.
+ - Drive 0 Sides: Double
+ - Drive 1 Sides: Double
+ - Drive 0 Tracks: 40 or 80 depending on the UFD DOS image used
+ - Drive 1 Tracks: 40 or 80 depending on the UFD DOS image used
+ - Card Address: 44 (ABC 832/834/850)
- You should now see the following text at the top of the screen:
+ Reset the emulated machine by pressing F3.
- DOS är UFD-DOS ver. 19
- DR_: motsvarar MF_:
+ You should now see the following text at the top of the screen:
- Enter "BYE" to get into the UFD-DOS command prompt.
- Enter "DOSGEN,F HD0:" to start the formatting utility.
- Enter "J", and enter "J" to confirm the formatting.
+ DOS ??r UFD-DOS ver. 19
+ DR_: motsvarar MF_:
- To Be Continued...
+ Enter "BYE" to get into the UFD-DOS command prompt.
+ Enter "DOSGEN,F HD0:" to start the formatting utility.
+ Enter "J", and enter "J" to confirm the formatting.
+
+ To Be Continued...
*/
@@ -68,7 +68,7 @@
#define SASIBUS_TAG "sasi"
#define STAT_DIR \
- BIT(m_stat, 6)
+ BIT(m_stat, 6)
@@ -445,19 +445,19 @@ void luxor_55_21056_device::abcbus_c3(UINT8 data)
READ8_MEMBER( luxor_55_21056_device::sasi_status_r )
{
/*
-
+
bit description
-
+
0 RDY
1 REQ
2 I/O
3 C/D
4 MSG
5 BSY
- 6
- 7
-
- */
+ 6
+ 7
+
+ */
UINT8 data = 0;
diff --git a/src/emu/bus/abcbus/lux21056.h b/src/emu/bus/abcbus/lux21056.h
index c5dc78b74d8..d9b1375fa71 100644
--- a/src/emu/bus/abcbus/lux21056.h
+++ b/src/emu/bus/abcbus/lux21056.h
@@ -32,7 +32,7 @@
// ======================> luxor_55_21056_device
class luxor_55_21056_device : public device_t,
- public device_abcbus_card_interface
+ public device_abcbus_card_interface
{
public:
// construction/destruction
@@ -64,7 +64,7 @@ public:
DECLARE_WRITE_LINE_MEMBER( sasi_bsy_w );
DECLARE_WRITE_LINE_MEMBER( sasi_io_w );
DECLARE_WRITE_LINE_MEMBER( sasi_req_w );
-
+
protected:
// device-level overrides
virtual void device_start();
diff --git a/src/emu/bus/adamnet/fdc.h b/src/emu/bus/adamnet/fdc.h
index e48a93c36ba..fee37379622 100644
--- a/src/emu/bus/adamnet/fdc.h
+++ b/src/emu/bus/adamnet/fdc.h
@@ -29,7 +29,7 @@
// ======================> adam_fdc_device
class adam_fdc_device : public device_t,
- public device_adamnet_card_interface
+ public device_adamnet_card_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/c64/partner.c b/src/emu/bus/c64/partner.c
index 52f005a329f..1d1227e6256 100644
--- a/src/emu/bus/c64/partner.c
+++ b/src/emu/bus/c64/partner.c
@@ -198,7 +198,7 @@ int c64_partner_cartridge_device::c64_game_r(offs_t offset, int sphi2, int ba, i
{
switch ((offset >> 13) & 0x03)
{
- case 0: case 1: case 3:
+ case 0: case 1: case 3:
game = 0;
break;
}
diff --git a/src/emu/bus/c64/partner.h b/src/emu/bus/c64/partner.h
index fcd3f177468..64cee99de14 100644
--- a/src/emu/bus/c64/partner.h
+++ b/src/emu/bus/c64/partner.h
@@ -26,7 +26,7 @@
// ======================> c64_partner_cartridge_device
class c64_partner_cartridge_device : public device_t,
- public device_c64_expansion_card_interface
+ public device_c64_expansion_card_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/c64/tdos.c b/src/emu/bus/c64/tdos.c
index 8916416afd7..1fae5e230a9 100644
--- a/src/emu/bus/c64/tdos.c
+++ b/src/emu/bus/c64/tdos.c
@@ -92,26 +92,26 @@ Drive cable pinout
ULA pinout
----------
_____ _____
- 1 |* \_/ | 40
- 2 | | 39
- 3 | | 38
- 4 | | 37
+ 1 |* \_/ | 40
+ 2 | | 39
+ 3 | | 38
+ 4 | | 37
5 | | 36 GND
- 6 | | 35
- RD 7 | | 34
- _D5 8 | | 33
- RxC 9 | | 32
- RxD 10 | XZ-2085-1 | 31
- 11 | | 30
- WD 12 | | 29
- TxC 13 | | 28
- TxD 14 | | 27
- D7 15 | | 26
+ 6 | | 35
+ RD 7 | | 34
+ _D5 8 | | 33
+ RxC 9 | | 32
+ RxD 10 | XZ-2085-1 | 31
+ 11 | | 30
+ WD 12 | | 29
+ TxC 13 | | 28
+ TxD 14 | | 27
+ D7 15 | | 26
WG 16 | | 25 +5V
17 | | 24 XTAL2
18 | | 23 XTAL1
RS 19 | | 22 GND
- 20 |_____________| 21
+ 20 |_____________| 21
BASIC commands (SYS 32768 to activate)
@@ -281,18 +281,18 @@ UINT8 c64_tdos_cartridge_device::c64_cd_r(address_space &space, offs_t offset, U
case 2:
/*
-
+
bit description
-
- 0
- 1
- 2
- 3
- 4
+
+ 0
+ 1
+ 2
+ 3
+ 4
5 drive MS
6 drive WP
7 drive RY
-
+
*/
break;
}
@@ -320,18 +320,18 @@ void c64_tdos_cartridge_device::c64_cd_w(address_space &space, offs_t offset, UI
case 1:
/*
-
+
bit description
-
- 0
- 1
- 2
- 3
- 4
+
+ 0
+ 1
+ 2
+ 3
+ 4
5 ULA pin 8, inverted
6 drive MO
7 ULA pin 15
-
+
*/
break;
diff --git a/src/emu/bus/centronics/ctronics.c b/src/emu/bus/centronics/ctronics.c
index 68e612c1ea5..40918777b2b 100644
--- a/src/emu/bus/centronics/ctronics.c
+++ b/src/emu/bus/centronics/ctronics.c
@@ -2,8 +2,8 @@
Centronics printer interface
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
***************************************************************************/
diff --git a/src/emu/bus/centronics/ctronics.h b/src/emu/bus/centronics/ctronics.h
index acc2c68578f..52fdf1219a2 100644
--- a/src/emu/bus/centronics/ctronics.h
+++ b/src/emu/bus/centronics/ctronics.h
@@ -2,8 +2,8 @@
Centronics printer interface
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
***************************************************************************/
diff --git a/src/emu/bus/ieee488/c2031.h b/src/emu/bus/ieee488/c2031.h
index c62335f003c..14a8e4acc21 100644
--- a/src/emu/bus/ieee488/c2031.h
+++ b/src/emu/bus/ieee488/c2031.h
@@ -30,7 +30,7 @@
// ======================> c2031_device
class c2031_device : public device_t,
- public device_ieee488_interface
+ public device_ieee488_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/isbx/compis_fdc.c b/src/emu/bus/isbx/compis_fdc.c
index dac875187d8..3eacf84331a 100644
--- a/src/emu/bus/isbx/compis_fdc.c
+++ b/src/emu/bus/isbx/compis_fdc.c
@@ -16,7 +16,7 @@
// MACROS / CONSTANTS
//**************************************************************************
-#define I8272_TAG "ic13"
+#define I8272_TAG "ic13"
diff --git a/src/emu/bus/isbx/compis_fdc.h b/src/emu/bus/isbx/compis_fdc.h
index 9624e88d9fe..5e789503fd4 100644
--- a/src/emu/bus/isbx/compis_fdc.h
+++ b/src/emu/bus/isbx/compis_fdc.h
@@ -28,7 +28,7 @@
// ======================> compis_fdc_device
class compis_fdc_device : public device_t,
- public device_isbx_card_interface
+ public device_isbx_card_interface
{
public:
// construction/destruction
diff --git a/src/emu/bus/isbx/isbx.h b/src/emu/bus/isbx/isbx.h
index bb81ffb1981..738e8c509fa 100644
--- a/src/emu/bus/isbx/isbx.h
+++ b/src/emu/bus/isbx/isbx.h
@@ -99,7 +99,7 @@ protected:
// ======================> isbx_slot_device
class isbx_slot_device : public device_t,
- public device_slot_interface
+ public device_slot_interface
{
public:
// construction/destruction
@@ -109,7 +109,7 @@ public:
template<class _mintr1> void set_mintr1_callback(_mintr1 mintr1) { m_write_mintr1.set_callback(mintr1); }
template<class _mdrqt> void set_mdrqt_callback(_mdrqt mdrqt) { m_write_mdrqt.set_callback(mdrqt); }
template<class _mwait> void set_mwait_callback(_mwait mwait) { m_write_mwait.set_callback(mwait); }
-
+
// computer interface
DECLARE_READ8_MEMBER( mcs0_r ) { return m_card ? m_card->mcs0_r(space, offset) : 0xff; }
DECLARE_WRITE8_MEMBER( mcs0_w ) { if (m_card) m_card->mcs0_w(space, offset, data); }
diff --git a/src/emu/bus/plus4/c1551.h b/src/emu/bus/plus4/c1551.h
index 7090b962a68..93fda5a613b 100644
--- a/src/emu/bus/plus4/c1551.h
+++ b/src/emu/bus/plus4/c1551.h
@@ -34,7 +34,7 @@
// ======================> c1551_device
class c1551_device : public device_t,
- public device_plus4_expansion_card_interface
+ public device_plus4_expansion_card_interface
{
public:
// construction/destruction
diff --git a/src/emu/cpu/i8089/i8089.c b/src/emu/cpu/i8089/i8089.c
index 184ca4ad977..e38df3d3cca 100644
--- a/src/emu/cpu/i8089/i8089.c
+++ b/src/emu/cpu/i8089/i8089.c
@@ -2,8 +2,8 @@
Intel 8089 I/O Processor
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
***************************************************************************/
diff --git a/src/emu/cpu/i8089/i8089.h b/src/emu/cpu/i8089/i8089.h
index 44ed1c9bcc6..13590727ed9 100644
--- a/src/emu/cpu/i8089/i8089.h
+++ b/src/emu/cpu/i8089/i8089.h
@@ -2,8 +2,8 @@
Intel 8089 I/O Processor
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
***************************************************************************/
diff --git a/src/emu/cpu/i8089/i8089_channel.c b/src/emu/cpu/i8089/i8089_channel.c
index 1a0ae2e36fb..6b58e9bd24a 100644
--- a/src/emu/cpu/i8089/i8089_channel.c
+++ b/src/emu/cpu/i8089/i8089_channel.c
@@ -2,8 +2,8 @@
Intel 8089 I/O Processor
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
I/O channel
diff --git a/src/emu/cpu/i8089/i8089_channel.h b/src/emu/cpu/i8089/i8089_channel.h
index 94d0d125658..4ef021e0fa2 100644
--- a/src/emu/cpu/i8089/i8089_channel.h
+++ b/src/emu/cpu/i8089/i8089_channel.h
@@ -2,8 +2,8 @@
Intel 8089 I/O Processor
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
I/O channel
diff --git a/src/emu/cpu/i8089/i8089_dasm.c b/src/emu/cpu/i8089/i8089_dasm.c
index fb214149dab..5cabc3109f8 100644
--- a/src/emu/cpu/i8089/i8089_dasm.c
+++ b/src/emu/cpu/i8089/i8089_dasm.c
@@ -2,8 +2,8 @@
Intel 8089 I/O Processor
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
Disassembler
diff --git a/src/emu/cpu/i8089/i8089_ops.c b/src/emu/cpu/i8089/i8089_ops.c
index 2df46ec166d..3ff777845cb 100644
--- a/src/emu/cpu/i8089/i8089_ops.c
+++ b/src/emu/cpu/i8089/i8089_ops.c
@@ -2,8 +2,8 @@
Intel 8089 I/O Processor
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
Opcode implementations
diff --git a/src/emu/cpu/nec/nec.c b/src/emu/cpu/nec/nec.c
index 4d36f5223eb..a237f9c6bd2 100644
--- a/src/emu/cpu/nec/nec.c
+++ b/src/emu/cpu/nec/nec.c
@@ -364,14 +364,14 @@ void nec_common_device::device_start()
Mod_RM.RM.b[i] = breg_name[i & 7];
}
- m_no_interrupt = 0;
- m_prefetch_count = 0;
- m_prefetch_reset = 0;
- m_prefix_base = 0;
- m_seg_prefix = 0;
- m_EA = 0;
- m_EO = 0;
- m_E16 = 0;
+ m_no_interrupt = 0;
+ m_prefetch_count = 0;
+ m_prefetch_reset = 0;
+ m_prefix_base = 0;
+ m_seg_prefix = 0;
+ m_EA = 0;
+ m_EO = 0;
+ m_E16 = 0;
save_item(NAME(m_regs.w));
save_item(NAME(m_sregs));
@@ -522,4 +522,3 @@ void nec_common_device::execute_run()
do_prefetch(prev_ICount);
}
}
-
diff --git a/src/emu/cpu/nec/v25.c b/src/emu/cpu/nec/v25.c
index b6627fe3b1c..7024db9483d 100644
--- a/src/emu/cpu/nec/v25.c
+++ b/src/emu/cpu/nec/v25.c
@@ -745,4 +745,3 @@ void v25_common_device::execute_run()
do_prefetch(prev_ICount);
}
}
-
diff --git a/src/emu/cpu/rsp/rsp.c b/src/emu/cpu/rsp/rsp.c
index 801f4b608e0..ec362a16767 100644
--- a/src/emu/cpu/rsp/rsp.c
+++ b/src/emu/cpu/rsp/rsp.c
@@ -66,11 +66,11 @@ INLINE rsp_state *get_safe_token(device_t *device)
#define ACCUM_M(x) rsp->accum[((x))].w[2]
#define ACCUM_L(x) rsp->accum[((x))].w[1]
-#define CARRY 0
-#define COMPARE 1
-#define CLIP1 2
-#define ZERO 3
-#define CLIP2 4
+#define CARRY 0
+#define COMPARE 1
+#define CLIP1 2
+#define ZERO 3
+#define CLIP2 4
#define CARRY_FLAG(x) (rsp->vflag[CARRY][x & 7] != 0 ? 0xffff : 0)
#define COMPARE_FLAG(x) (rsp->vflag[COMPARE][x & 7] != 0 ? 0xffff : 0)
@@ -78,7 +78,7 @@ INLINE rsp_state *get_safe_token(device_t *device)
#define ZERO_FLAG(x) (rsp->vflag[ZERO][x & 7] != 0 ? 0xffff : 0)
#define CLIP2_FLAG(x) (rsp->vflag[CLIP2][x & 7] != 0 ? 0xffff : 0)
-#define CLEAR_CARRY_FLAGS() { memset(rsp->vflag[0], 0, 16); }
+#define CLEAR_CARRY_FLAGS() { memset(rsp->vflag[0], 0, 16); }
#define CLEAR_COMPARE_FLAGS() { memset(rsp->vflag[1], 0, 16); }
#define CLEAR_CLIP1_FLAGS() { memset(rsp->vflag[2], 0, 16); }
#define CLEAR_ZERO_FLAGS() { memset(rsp->vflag[3], 0, 16); }
@@ -309,11 +309,11 @@ static CPU_INIT( rsp )
rsp->v[regIdx].d[0] = 0;
rsp->v[regIdx].d[1] = 0;
}
- CLEAR_CARRY_FLAGS();
- CLEAR_COMPARE_FLAGS();
- CLEAR_CLIP1_FLAGS();
- CLEAR_ZERO_FLAGS();
- CLEAR_CLIP2_FLAGS();
+ CLEAR_CARRY_FLAGS();
+ CLEAR_COMPARE_FLAGS();
+ CLEAR_CLIP1_FLAGS();
+ CLEAR_ZERO_FLAGS();
+ CLEAR_CLIP2_FLAGS();
//rsp->square_root_res = 0;
//rsp->square_root_high = 0;
rsp->reciprocal_res = 0;
diff --git a/src/emu/cpu/rsp/rspdrc.c b/src/emu/cpu/rsp/rspdrc.c
index 2657ec5dab9..5d209a0990e 100644
--- a/src/emu/cpu/rsp/rspdrc.c
+++ b/src/emu/cpu/rsp/rspdrc.c
@@ -83,56 +83,56 @@ extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
/* fast RAM info */
struct fast_ram_info
{
- offs_t start; /* start of the RAM block */
- offs_t end; /* end of the RAM block */
- UINT8 readonly; /* TRUE if read-only */
- void * base; /* base in memory where the RAM lives */
+ offs_t start; /* start of the RAM block */
+ offs_t end; /* end of the RAM block */
+ UINT8 readonly; /* TRUE if read-only */
+ void * base; /* base in memory where the RAM lives */
};
/* internal compiler state */
struct compiler_state
{
- UINT32 cycles; /* accumulated cycles */
- UINT8 checkints; /* need to check interrupts before next instruction */
- UINT8 checksoftints; /* need to check software interrupts before next instruction */
- code_label labelnum; /* index for local labels */
+ UINT32 cycles; /* accumulated cycles */
+ UINT8 checkints; /* need to check interrupts before next instruction */
+ UINT8 checksoftints; /* need to check software interrupts before next instruction */
+ code_label labelnum; /* index for local labels */
};
struct rspimp_state
{
- /* core state */
- drc_cache * cache; /* pointer to the DRC code cache */
- drcuml_state * drcuml; /* DRC UML generator state */
- rsp_frontend * drcfe; /* pointer to the DRC front-end state */
- UINT32 drcoptions; /* configurable DRC options */
-
- /* internal stuff */
- UINT8 cache_dirty; /* true if we need to flush the cache */
- UINT32 jmpdest; /* destination jump target */
-
- /* parameters for subroutines */
- UINT64 numcycles; /* return value from gettotalcycles */
- const char * format; /* format string for print_debug */
- UINT32 arg0; /* print_debug argument 1 */
- UINT32 arg1; /* print_debug argument 2 */
- UINT32 arg2; /* print_debug argument 3 */
- UINT32 arg3; /* print_debug argument 4 */
- UINT32 vres[8]; /* used for temporary vector results */
-
- /* register mappings */
- parameter regmap[34]; /* parameter to register mappings for all 32 integer registers */
-
- /* subroutines */
- code_handle * entry; /* entry point */
- code_handle * nocode; /* nocode exception handler */
- code_handle * out_of_cycles; /* out of cycles exception handler */
- code_handle * read8; /* read byte */
- code_handle * write8; /* write byte */
- code_handle * read16; /* read half */
- code_handle * write16; /* write half */
- code_handle * read32; /* read word */
- code_handle * write32; /* write word */
+ /* core state */
+ drc_cache * cache; /* pointer to the DRC code cache */
+ drcuml_state * drcuml; /* DRC UML generator state */
+ rsp_frontend * drcfe; /* pointer to the DRC front-end state */
+ UINT32 drcoptions; /* configurable DRC options */
+
+ /* internal stuff */
+ UINT8 cache_dirty; /* true if we need to flush the cache */
+ UINT32 jmpdest; /* destination jump target */
+
+ /* parameters for subroutines */
+ UINT64 numcycles; /* return value from gettotalcycles */
+ const char * format; /* format string for print_debug */
+ UINT32 arg0; /* print_debug argument 1 */
+ UINT32 arg1; /* print_debug argument 2 */
+ UINT32 arg2; /* print_debug argument 3 */
+ UINT32 arg3; /* print_debug argument 4 */
+ UINT32 vres[8]; /* used for temporary vector results */
+
+ /* register mappings */
+ parameter regmap[34]; /* parameter to register mappings for all 32 integer registers */
+
+ /* subroutines */
+ code_handle * entry; /* entry point */
+ code_handle * nocode; /* nocode exception handler */
+ code_handle * out_of_cycles; /* out of cycles exception handler */
+ code_handle * read8; /* read byte */
+ code_handle * write8; /* write byte */
+ code_handle * read16; /* read half */
+ code_handle * write16; /* write half */
+ code_handle * read32; /* read word */
+ code_handle * write32; /* write word */
};
/***************************************************************************
@@ -208,31 +208,31 @@ static void log_add_disasm_comment(rsp_state *rsp, drcuml_block *block, UINT32 p
#define EL ((op >> 21) & 0xf)
#define SIMD_EXTRACT16(reg, value, element) \
- switch((element) & 7) \
- { \
- case 0: value = _mm_extract_epi16(reg, 0); break; \
- case 1: value = _mm_extract_epi16(reg, 1); break; \
- case 2: value = _mm_extract_epi16(reg, 2); break; \
- case 3: value = _mm_extract_epi16(reg, 3); break; \
- case 4: value = _mm_extract_epi16(reg, 4); break; \
- case 5: value = _mm_extract_epi16(reg, 5); break; \
- case 6: value = _mm_extract_epi16(reg, 6); break; \
- case 7: value = _mm_extract_epi16(reg, 7); break; \
- }
+ switch((element) & 7) \
+ { \
+ case 0: value = _mm_extract_epi16(reg, 0); break; \
+ case 1: value = _mm_extract_epi16(reg, 1); break; \
+ case 2: value = _mm_extract_epi16(reg, 2); break; \
+ case 3: value = _mm_extract_epi16(reg, 3); break; \
+ case 4: value = _mm_extract_epi16(reg, 4); break; \
+ case 5: value = _mm_extract_epi16(reg, 5); break; \
+ case 6: value = _mm_extract_epi16(reg, 6); break; \
+ case 7: value = _mm_extract_epi16(reg, 7); break; \
+ }
#define SIMD_INSERT16(reg, value, element) \
- switch((element) & 7) \
- { \
- case 0: reg = _mm_insert_epi16(reg, value, 0); break; \
- case 1: reg = _mm_insert_epi16(reg, value, 1); break; \
- case 2: reg = _mm_insert_epi16(reg, value, 2); break; \
- case 3: reg = _mm_insert_epi16(reg, value, 3); break; \
- case 4: reg = _mm_insert_epi16(reg, value, 4); break; \
- case 5: reg = _mm_insert_epi16(reg, value, 5); break; \
- case 6: reg = _mm_insert_epi16(reg, value, 6); break; \
- case 7: reg = _mm_insert_epi16(reg, value, 7); break; \
- }
+ switch((element) & 7) \
+ { \
+ case 0: reg = _mm_insert_epi16(reg, value, 0); break; \
+ case 1: reg = _mm_insert_epi16(reg, value, 1); break; \
+ case 2: reg = _mm_insert_epi16(reg, value, 2); break; \
+ case 3: reg = _mm_insert_epi16(reg, value, 3); break; \
+ case 4: reg = _mm_insert_epi16(reg, value, 4); break; \
+ case 5: reg = _mm_insert_epi16(reg, value, 5); break; \
+ case 6: reg = _mm_insert_epi16(reg, value, 6); break; \
+ case 7: reg = _mm_insert_epi16(reg, value, 7); break; \
+ }
#define SIMD_EXTRACT16C(reg, value, element) value = _mm_extract_epi16(reg, element);
@@ -267,33 +267,33 @@ INLINE UINT16 ACCUM_L(const rsp_state *rsp, int x)
return out;
}
-#define SET_ACCUM_H(v, x) SIMD_INSERT16(rsp->accum_h, v, x);
-#define SET_ACCUM_M(v, x) SIMD_INSERT16(rsp->accum_m, v, x);
-#define SET_ACCUM_L(v, x) SIMD_INSERT16(rsp->accum_l, v, x);
+#define SET_ACCUM_H(v, x) SIMD_INSERT16(rsp->accum_h, v, x);
+#define SET_ACCUM_M(v, x) SIMD_INSERT16(rsp->accum_m, v, x);
+#define SET_ACCUM_L(v, x) SIMD_INSERT16(rsp->accum_l, v, x);
-#define SCALAR_GET_VS1(out, i) SIMD_EXTRACT16(rsp->xv[VS1REG], out, i)
-#define SCALAR_GET_VS2(out, i) SIMD_EXTRACT16(rsp->xv[VS2REG], out, VEC_EL_2(EL, i))
+#define SCALAR_GET_VS1(out, i) SIMD_EXTRACT16(rsp->xv[VS1REG], out, i)
+#define SCALAR_GET_VS2(out, i) SIMD_EXTRACT16(rsp->xv[VS2REG], out, VEC_EL_2(EL, i))
#else
-#define ACCUM_H(v, x) (UINT16)rsp->accum[x].w[3]
-#define ACCUM_M(v, x) (UINT16)rsp->accum[x].w[2]
-#define ACCUM_L(v, x) (UINT16)rsp->accum[x].w[1]
+#define ACCUM_H(v, x) (UINT16)rsp->accum[x].w[3]
+#define ACCUM_M(v, x) (UINT16)rsp->accum[x].w[2]
+#define ACCUM_L(v, x) (UINT16)rsp->accum[x].w[1]
-#define SET_ACCUM_H(v, x) rsp->accum[x].w[3] = v;
-#define SET_ACCUM_M(v, x) rsp->accum[x].w[2] = v;
-#define SET_ACCUM_L(v, x) rsp->accum[x].w[1] = v;
+#define SET_ACCUM_H(v, x) rsp->accum[x].w[3] = v;
+#define SET_ACCUM_M(v, x) rsp->accum[x].w[2] = v;
+#define SET_ACCUM_L(v, x) rsp->accum[x].w[1] = v;
-#define SCALAR_GET_VS1(out, i) out = VREG_S(VS1REG, i)
-#define SCALAR_GET_VS2(out, i) out = VREG_S(VS2REG, VEC_EL_2(EL, i))
+#define SCALAR_GET_VS1(out, i) out = VREG_S(VS1REG, i)
+#define SCALAR_GET_VS2(out, i) out = VREG_S(VS2REG, VEC_EL_2(EL, i))
#endif // USE_SIMD
-#define CARRY 0
-#define COMPARE 1
-#define CLIP1 2
-#define ZERO 3
-#define CLIP2 4
+#define CARRY 0
+#define COMPARE 1
+#define CLIP1 2
+#define ZERO 3
+#define CLIP2 4
#if USE_SIMD
INLINE UINT16 CARRY_FLAG(rsp_state *rsp, const int x)
@@ -331,23 +331,23 @@ INLINE UINT16 CLIP2_FLAG(rsp_state *rsp, const int x)
return out;
}
-#define CLEAR_CARRY_FLAGS() { rsp->xvflag[CARRY] = _mm_setzero_si128(); }
-#define CLEAR_COMPARE_FLAGS() { rsp->xvflag[COMPARE] = _mm_setzero_si128(); }
-#define CLEAR_CLIP1_FLAGS() { rsp->xvflag[CLIP1] = _mm_setzero_si128(); }
-#define CLEAR_ZERO_FLAGS() { rsp->xvflag[ZERO] = _mm_setzero_si128(); }
-#define CLEAR_CLIP2_FLAGS() { rsp->xvflag[CLIP2] = _mm_setzero_si128(); }
+#define CLEAR_CARRY_FLAGS() { rsp->xvflag[CARRY] = _mm_setzero_si128(); }
+#define CLEAR_COMPARE_FLAGS() { rsp->xvflag[COMPARE] = _mm_setzero_si128(); }
+#define CLEAR_CLIP1_FLAGS() { rsp->xvflag[CLIP1] = _mm_setzero_si128(); }
+#define CLEAR_ZERO_FLAGS() { rsp->xvflag[ZERO] = _mm_setzero_si128(); }
+#define CLEAR_CLIP2_FLAGS() { rsp->xvflag[CLIP2] = _mm_setzero_si128(); }
-#define SET_CARRY_FLAG(x) { SIMD_INSERT16(rsp->xvflag[CARRY], 0xffff, x); }
-#define SET_COMPARE_FLAG(x) { SIMD_INSERT16(rsp->xvflag[COMPARE], 0xffff, x); }
-#define SET_CLIP1_FLAG(x) { SIMD_INSERT16(rsp->xvflag[CLIP1], 0xffff, x); }
-#define SET_ZERO_FLAG(x) { SIMD_INSERT16(rsp->xvflag[ZERO], 0xffff, x); }
-#define SET_CLIP2_FLAG(x) { SIMD_INSERT16(rsp->xvflag[CLIP2], 0xffff, x); }
+#define SET_CARRY_FLAG(x) { SIMD_INSERT16(rsp->xvflag[CARRY], 0xffff, x); }
+#define SET_COMPARE_FLAG(x) { SIMD_INSERT16(rsp->xvflag[COMPARE], 0xffff, x); }
+#define SET_CLIP1_FLAG(x) { SIMD_INSERT16(rsp->xvflag[CLIP1], 0xffff, x); }
+#define SET_ZERO_FLAG(x) { SIMD_INSERT16(rsp->xvflag[ZERO], 0xffff, x); }
+#define SET_CLIP2_FLAG(x) { SIMD_INSERT16(rsp->xvflag[CLIP2], 0xffff, x); }
-#define CLEAR_CARRY_FLAG(x) { SIMD_INSERT16(rsp->xvflag[CARRY], 0, x); }
-#define CLEAR_COMPARE_FLAG(x) { SIMD_INSERT16(rsp->xvflag[COMPARE], 0, x); }
-#define CLEAR_CLIP1_FLAG(x) { SIMD_INSERT16(rsp->xvflag[CLIP1], 0, x); }
-#define CLEAR_ZERO_FLAG(x) { SIMD_INSERT16(rsp->xvflag[ZERO], 0, x); }
-#define CLEAR_CLIP2_FLAG(x) { SIMD_INSERT16(rsp->xvflag[CLIP2], 0, x); }
+#define CLEAR_CARRY_FLAG(x) { SIMD_INSERT16(rsp->xvflag[CARRY], 0, x); }
+#define CLEAR_COMPARE_FLAG(x) { SIMD_INSERT16(rsp->xvflag[COMPARE], 0, x); }
+#define CLEAR_CLIP1_FLAG(x) { SIMD_INSERT16(rsp->xvflag[CLIP1], 0, x); }
+#define CLEAR_ZERO_FLAG(x) { SIMD_INSERT16(rsp->xvflag[ZERO], 0, x); }
+#define CLEAR_CLIP2_FLAG(x) { SIMD_INSERT16(rsp->xvflag[CLIP2], 0, x); }
#else
#define CARRY_FLAG(rsp, x) (rsp->vflag[CARRY][x & 7] != 0 ? 0xffff : 0)
@@ -358,28 +358,28 @@ INLINE UINT16 CLIP2_FLAG(rsp_state *rsp, const int x)
#define CLEAR_CARRY_FLAGS() { memset(rsp->vflag[0], 0, 16); }
#define CLEAR_COMPARE_FLAGS() { memset(rsp->vflag[1], 0, 16); }
-#define CLEAR_CLIP1_FLAGS() { memset(rsp->vflag[2], 0, 16); }
+#define CLEAR_CLIP1_FLAGS() { memset(rsp->vflag[2], 0, 16); }
#define CLEAR_ZERO_FLAGS() { memset(rsp->vflag[3], 0, 16); }
-#define CLEAR_CLIP2_FLAGS() { memset(rsp->vflag[4], 0, 16); }
+#define CLEAR_CLIP2_FLAGS() { memset(rsp->vflag[4], 0, 16); }
#define SET_CARRY_FLAG(x) { rsp->vflag[0][x & 7] = 0xffff; }
#define SET_COMPARE_FLAG(x) { rsp->vflag[1][x & 7] = 0xffff; }
-#define SET_CLIP1_FLAG(x) { rsp->vflag[2][x & 7] = 0xffff; }
+#define SET_CLIP1_FLAG(x) { rsp->vflag[2][x & 7] = 0xffff; }
#define SET_ZERO_FLAG(x) { rsp->vflag[3][x & 7] = 0xffff; }
-#define SET_CLIP2_FLAG(x) { rsp->vflag[4][x & 7] = 0xffff; }
+#define SET_CLIP2_FLAG(x) { rsp->vflag[4][x & 7] = 0xffff; }
#define CLEAR_CARRY_FLAG(x) { rsp->vflag[0][x & 7] = 0; }
#define CLEAR_COMPARE_FLAG(x) { rsp->vflag[1][x & 7] = 0; }
-#define CLEAR_CLIP1_FLAG(x) { rsp->vflag[2][x & 7] = 0; }
+#define CLEAR_CLIP1_FLAG(x) { rsp->vflag[2][x & 7] = 0; }
#define CLEAR_ZERO_FLAG(x) { rsp->vflag[3][x & 7] = 0; }
-#define CLEAR_CLIP2_FLAG(x) { rsp->vflag[4][x & 7] = 0; }
+#define CLEAR_CLIP2_FLAG(x) { rsp->vflag[4][x & 7] = 0; }
#endif
INLINE rsp_state *get_safe_token(device_t *device)
{
- assert(device != NULL);
- assert(device->type() == RSP_DRC);
- return *(rsp_state **)downcast<legacy_cpu_device *>(device)->token();
+ assert(device != NULL);
+ assert(device->type() == RSP_DRC);
+ return *(rsp_state **)downcast<legacy_cpu_device *>(device)->token();
}
/***************************************************************************
@@ -393,7 +393,7 @@ INLINE rsp_state *get_safe_token(device_t *device)
INLINE UINT32 epc(const opcode_desc *desc)
{
- return ((desc->flags & OPFLAG_IN_DELAY_SLOT) ? (desc->pc - 3) : desc->pc) | 0x1000;
+ return ((desc->flags & OPFLAG_IN_DELAY_SLOT) ? (desc->pc - 3) : desc->pc) | 0x1000;
}
@@ -404,8 +404,8 @@ INLINE UINT32 epc(const opcode_desc *desc)
INLINE void alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name)
{
- if (*handleptr == NULL)
- *handleptr = drcuml->handle_alloc(name);
+ if (*handleptr == NULL)
+ *handleptr = drcuml->handle_alloc(name);
}
@@ -416,11 +416,11 @@ INLINE void alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const ch
INLINE void load_fast_iregs(rsp_state *rsp, drcuml_block *block)
{
- int regnum;
+ int regnum;
- for (regnum = 0; regnum < ARRAY_LENGTH(rsp->impstate->regmap); regnum++)
- if (rsp->impstate->regmap[regnum].is_int_register())
- UML_MOV(block, ireg(rsp->impstate->regmap[regnum].ireg() - REG_I0), mem(&rsp->r[regnum]));
+ for (regnum = 0; regnum < ARRAY_LENGTH(rsp->impstate->regmap); regnum++)
+ if (rsp->impstate->regmap[regnum].is_int_register())
+ UML_MOV(block, ireg(rsp->impstate->regmap[regnum].ireg() - REG_I0), mem(&rsp->r[regnum]));
}
@@ -431,11 +431,11 @@ INLINE void load_fast_iregs(rsp_state *rsp, drcuml_block *block)
INLINE void save_fast_iregs(rsp_state *rsp, drcuml_block *block)
{
- int regnum;
+ int regnum;
- for (regnum = 0; regnum < ARRAY_LENGTH(rsp->impstate->regmap); regnum++)
- if (rsp->impstate->regmap[regnum].is_int_register())
- UML_MOV(block, mem(&rsp->r[regnum]), ireg(rsp->impstate->regmap[regnum].ireg() - REG_I0));
+ for (regnum = 0; regnum < ARRAY_LENGTH(rsp->impstate->regmap); regnum++)
+ if (rsp->impstate->regmap[regnum].is_int_register())
+ UML_MOV(block, mem(&rsp->r[regnum]), ireg(rsp->impstate->regmap[regnum].ireg() - REG_I0));
}
/***************************************************************************
@@ -444,104 +444,104 @@ INLINE void save_fast_iregs(rsp_state *rsp, drcuml_block *block)
void rspdrc_add_imem(device_t *device, UINT32 *base)
{
- if (!device->machine().options().drc()) return;
- rsp_state *rsp = get_safe_token(device);
- rsp->imem32 = base;
- rsp->imem16 = (UINT16*)base;
- rsp->imem8 = (UINT8*)base;
+ if (!device->machine().options().drc()) return;
+ rsp_state *rsp = get_safe_token(device);
+ rsp->imem32 = base;
+ rsp->imem16 = (UINT16*)base;
+ rsp->imem8 = (UINT8*)base;
}
void rspdrc_add_dmem(device_t *device, UINT32 *base)
{
- if (!device->machine().options().drc()) return;
- rsp_state *rsp = get_safe_token(device);
- rsp->dmem32 = base;
- rsp->dmem16 = (UINT16*)base;
- rsp->dmem8 = (UINT8*)base;
+ if (!device->machine().options().drc()) return;
+ rsp_state *rsp = get_safe_token(device);
+ rsp->dmem32 = base;
+ rsp->dmem16 = (UINT16*)base;
+ rsp->dmem8 = (UINT8*)base;
}
INLINE UINT8 READ8(rsp_state *rsp, UINT32 address)
{
- UINT8 ret = rsp->dmem8[BYTE4_XOR_BE(address & 0xfff)];
- return ret;
+ UINT8 ret = rsp->dmem8[BYTE4_XOR_BE(address & 0xfff)];
+ return ret;
}
static void cfunc_read8(void *param)
{
- rsp_state *rsp = (rsp_state *)param;
- rsp->impstate->arg0 = READ8(rsp, rsp->impstate->arg0);
+ rsp_state *rsp = (rsp_state *)param;
+ rsp->impstate->arg0 = READ8(rsp, rsp->impstate->arg0);
}
INLINE UINT16 READ16(rsp_state *rsp, UINT32 address)
{
- UINT16 ret;
- address &= 0xfff;
- ret = rsp->dmem8[BYTE4_XOR_BE(address)] << 8;
- ret |= rsp->dmem8[BYTE4_XOR_BE(address + 1)];
- return ret;
+ UINT16 ret;
+ address &= 0xfff;
+ ret = rsp->dmem8[BYTE4_XOR_BE(address)] << 8;
+ ret |= rsp->dmem8[BYTE4_XOR_BE(address + 1)];
+ return ret;
}
static void cfunc_read16(void *param)
{
- rsp_state *rsp = (rsp_state *)param;
- rsp->impstate->arg0 = READ16(rsp, rsp->impstate->arg0);
+ rsp_state *rsp = (rsp_state *)param;
+ rsp->impstate->arg0 = READ16(rsp, rsp->impstate->arg0);
}
INLINE UINT32 READ32(rsp_state *rsp, UINT32 address)
{
- UINT32 ret;
- address &= 0xfff;
- ret = rsp->dmem8[BYTE4_XOR_BE(address)] << 24;
- ret |= rsp->dmem8[BYTE4_XOR_BE(address + 1)] << 16;
- ret |= rsp->dmem8[BYTE4_XOR_BE(address + 2)] << 8;
- ret |= rsp->dmem8[BYTE4_XOR_BE(address + 3)];
- return ret;
+ UINT32 ret;
+ address &= 0xfff;
+ ret = rsp->dmem8[BYTE4_XOR_BE(address)] << 24;
+ ret |= rsp->dmem8[BYTE4_XOR_BE(address + 1)] << 16;
+ ret |= rsp->dmem8[BYTE4_XOR_BE(address + 2)] << 8;
+ ret |= rsp->dmem8[BYTE4_XOR_BE(address + 3)];
+ return ret;
}
static void cfunc_read32(void *param)
{
- rsp_state *rsp = (rsp_state *)param;
- rsp->impstate->arg0 = READ32(rsp, rsp->impstate->arg0);
+ rsp_state *rsp = (rsp_state *)param;
+ rsp->impstate->arg0 = READ32(rsp, rsp->impstate->arg0);
}
INLINE void WRITE8(rsp_state *rsp, UINT32 address, UINT8 data)
{
- address &= 0xfff;
- rsp->dmem8[BYTE4_XOR_BE(address)] = data;
+ address &= 0xfff;
+ rsp->dmem8[BYTE4_XOR_BE(address)] = data;
}
static void cfunc_write8(void *param)
{
- rsp_state *rsp = (rsp_state *)param;
- WRITE8(rsp, rsp->impstate->arg0, (UINT8)rsp->impstate->arg1);
+ rsp_state *rsp = (rsp_state *)param;
+ WRITE8(rsp, rsp->impstate->arg0, (UINT8)rsp->impstate->arg1);
}
INLINE void WRITE16(rsp_state *rsp, UINT32 address, UINT16 data)
{
- address &= 0xfff;
- rsp->dmem8[BYTE4_XOR_BE(address)] = data >> 8;
- rsp->dmem8[BYTE4_XOR_BE(address + 1)] = data & 0xff;
+ address &= 0xfff;
+ rsp->dmem8[BYTE4_XOR_BE(address)] = data >> 8;
+ rsp->dmem8[BYTE4_XOR_BE(address + 1)] = data & 0xff;
}
static void cfunc_write16(void *param)
{
- rsp_state *rsp = (rsp_state *)param;
- WRITE16(rsp, rsp->impstate->arg0, (UINT16)rsp->impstate->arg1);
+ rsp_state *rsp = (rsp_state *)param;
+ WRITE16(rsp, rsp->impstate->arg0, (UINT16)rsp->impstate->arg1);
}
INLINE void WRITE32(rsp_state *rsp, UINT32 address, UINT32 data)
{
- address &= 0xfff;
- rsp->dmem8[BYTE4_XOR_BE(address)] = data >> 24;
- rsp->dmem8[BYTE4_XOR_BE(address + 1)] = (data >> 16) & 0xff;
- rsp->dmem8[BYTE4_XOR_BE(address + 2)] = (data >> 8) & 0xff;
- rsp->dmem8[BYTE4_XOR_BE(address + 3)] = data & 0xff;
+ address &= 0xfff;
+ rsp->dmem8[BYTE4_XOR_BE(address)] = data >> 24;
+ rsp->dmem8[BYTE4_XOR_BE(address + 1)] = (data >> 16) & 0xff;
+ rsp->dmem8[BYTE4_XOR_BE(address + 2)] = (data >> 8) & 0xff;
+ rsp->dmem8[BYTE4_XOR_BE(address + 3)] = data & 0xff;
}
static void cfunc_write32(void *param)
{
- rsp_state *rsp = (rsp_state *)param;
- WRITE32(rsp, rsp->impstate->arg0, rsp->impstate->arg1);
+ rsp_state *rsp = (rsp_state *)param;
+ WRITE32(rsp, rsp->impstate->arg0, rsp->impstate->arg1);
}
/*****************************************************************************/
@@ -552,9 +552,9 @@ static void cfunc_write32(void *param)
void rspdrc_set_options(device_t *device, UINT32 options)
{
- if (!device->machine().options().drc()) return;
- rsp_state *rsp = get_safe_token(device);
- rsp->impstate->drcoptions = options;
+ if (!device->machine().options().drc()) return;
+ rsp_state *rsp = get_safe_token(device);
+ rsp->impstate->drcoptions = options;
}
@@ -566,110 +566,110 @@ void rspdrc_set_options(device_t *device, UINT32 options)
#ifdef UNUSED_CODE
static void cfunc_printf_debug(void *param)
{
- rsp_state *rsp = (rsp_state *)param;
- switch(rsp->impstate->arg2)
- {
- case 0: // WRITE8
- printf("%04x:%02x\n", rsp->impstate->arg0 & 0xffff, (UINT8)rsp->impstate->arg1);
- break;
- case 1: // WRITE16
- printf("%04x:%04x\n", rsp->impstate->arg0 & 0xffff, (UINT16)rsp->impstate->arg1);
- break;
- case 2: // WRITE32
- printf("%04x:%08x\n", rsp->impstate->arg0 & 0xffff, rsp->impstate->arg1);
- break;
- case 3: // READ8
- printf("%04xr%02x\n", rsp->impstate->arg0 & 0xffff, (UINT8)rsp->impstate->arg1);
- break;
- case 4: // READ16
- printf("%04xr%04x\n", rsp->impstate->arg0 & 0xffff, (UINT16)rsp->impstate->arg1);
- break;
- case 5: // READ32
- printf("%04xr%08x\n", rsp->impstate->arg0 & 0xffff, rsp->impstate->arg1);
- break;
- case 6: // Checksum
- printf("Sum: %08x\n", rsp->impstate->arg0);
- break;
- case 7: // Checksum
- printf("Correct Sum: %08x\n", rsp->impstate->arg0);
- break;
- default: // ???
- printf("%08x %08x\n", rsp->impstate->arg0 & 0xffff, rsp->impstate->arg1);
- break;
- }
+ rsp_state *rsp = (rsp_state *)param;
+ switch(rsp->impstate->arg2)
+ {
+ case 0: // WRITE8
+ printf("%04x:%02x\n", rsp->impstate->arg0 & 0xffff, (UINT8)rsp->impstate->arg1);
+ break;
+ case 1: // WRITE16
+ printf("%04x:%04x\n", rsp->impstate->arg0 & 0xffff, (UINT16)rsp->impstate->arg1);
+ break;
+ case 2: // WRITE32
+ printf("%04x:%08x\n", rsp->impstate->arg0 & 0xffff, rsp->impstate->arg1);
+ break;
+ case 3: // READ8
+ printf("%04xr%02x\n", rsp->impstate->arg0 & 0xffff, (UINT8)rsp->impstate->arg1);
+ break;
+ case 4: // READ16
+ printf("%04xr%04x\n", rsp->impstate->arg0 & 0xffff, (UINT16)rsp->impstate->arg1);
+ break;
+ case 5: // READ32
+ printf("%04xr%08x\n", rsp->impstate->arg0 & 0xffff, rsp->impstate->arg1);
+ break;
+ case 6: // Checksum
+ printf("Sum: %08x\n", rsp->impstate->arg0);
+ break;
+ case 7: // Checksum
+ printf("Correct Sum: %08x\n", rsp->impstate->arg0);
+ break;
+ default: // ???
+ printf("%08x %08x\n", rsp->impstate->arg0 & 0xffff, rsp->impstate->arg1);
+ break;
+ }
}
#endif
static void cfunc_get_cop0_reg(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int reg = rsp->impstate->arg0;
- int dest = rsp->impstate->arg1;
-
- if (reg >= 0 && reg < 8)
- {
- if(dest)
- {
- rsp->r[dest] = (rsp->sp_reg_r_func)(reg, 0x00000000);
- }
- }
- else if (reg >= 8 && reg < 16)
- {
- if(dest)
- {
- rsp->r[dest] = (rsp->dp_reg_r_func)(reg - 8, 0x00000000);
- }
- }
- else
- {
- fatalerror("RSP: cfunc_get_cop0_reg: %d\n", reg);
- }
+ rsp_state *rsp = (rsp_state*)param;
+ int reg = rsp->impstate->arg0;
+ int dest = rsp->impstate->arg1;
+
+ if (reg >= 0 && reg < 8)
+ {
+ if(dest)
+ {
+ rsp->r[dest] = (rsp->sp_reg_r_func)(reg, 0x00000000);
+ }
+ }
+ else if (reg >= 8 && reg < 16)
+ {
+ if(dest)
+ {
+ rsp->r[dest] = (rsp->dp_reg_r_func)(reg - 8, 0x00000000);
+ }
+ }
+ else
+ {
+ fatalerror("RSP: cfunc_get_cop0_reg: %d\n", reg);
+ }
}
static void cfunc_set_cop0_reg(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int reg = rsp->impstate->arg0;
- UINT32 data = rsp->impstate->arg1;
+ rsp_state *rsp = (rsp_state*)param;
+ int reg = rsp->impstate->arg0;
+ UINT32 data = rsp->impstate->arg1;
- if (reg >= 0 && reg < 8)
- {
- (rsp->sp_reg_w_func)(reg, data, 0x00000000);
- }
- else if (reg >= 8 && reg < 16)
- {
- (rsp->dp_reg_w_func)(reg - 8, data, 0x00000000);
- }
- else
- {
- fatalerror("RSP: set_cop0_reg: %d, %08X\n", reg, data);
- }
+ if (reg >= 0 && reg < 8)
+ {
+ (rsp->sp_reg_w_func)(reg, data, 0x00000000);
+ }
+ else if (reg >= 8 && reg < 16)
+ {
+ (rsp->dp_reg_w_func)(reg - 8, data, 0x00000000);
+ }
+ else
+ {
+ fatalerror("RSP: set_cop0_reg: %d, %08X\n", reg, data);
+ }
}
static void cfunc_unimplemented_opcode(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
- if ((rsp->device->machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
- {
- char string[200];
- rsp_dasm_one(string, rsp->ppc, op);
- mame_printf_debug("%08X: %s\n", rsp->ppc, string);
- }
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
+ if ((rsp->device->machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ {
+ char string[200];
+ rsp_dasm_one(string, rsp->ppc, op);
+ mame_printf_debug("%08X: %s\n", rsp->ppc, string);
+ }
- fatalerror("RSP: unknown opcode %02X (%08X) at %08X\n", op >> 26, op, rsp->ppc);
+ fatalerror("RSP: unknown opcode %02X (%08X) at %08X\n", op >> 26, op, rsp->ppc);
}
static void unimplemented_opcode(rsp_state *rsp, UINT32 op)
{
- if ((rsp->device->machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
- {
- char string[200];
- rsp_dasm_one(string, rsp->ppc, op);
- mame_printf_debug("%08X: %s\n", rsp->ppc, string);
- }
+ if ((rsp->device->machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ {
+ char string[200];
+ rsp_dasm_one(string, rsp->ppc, op);
+ mame_printf_debug("%08X: %s\n", rsp->ppc, string);
+ }
- fatalerror("RSP: unknown opcode %02X (%08X) at %08X\n", op >> 26, op, rsp->ppc);
+ fatalerror("RSP: unknown opcode %02X (%08X) at %08X\n", op >> 26, op, rsp->ppc);
}
/*****************************************************************************/
@@ -677,22 +677,22 @@ static void unimplemented_opcode(rsp_state *rsp, UINT32 op)
/* Legacy. Going forward, this will be transitioned into unrolled opcode decodes. */
static const int vector_elements_2[16][8] =
{
- { 0, 1, 2, 3, 4, 5, 6, 7 }, // none
- { 0, 1, 2, 3, 4, 5, 6, 7 }, // ???
- { 0, 0, 2, 2, 4, 4, 6, 6 }, // 0q
- { 1, 1, 3, 3, 5, 5, 7, 7 }, // 1q
- { 0, 0, 0, 0, 4, 4, 4, 4 }, // 0h
- { 1, 1, 1, 1, 5, 5, 5, 5 }, // 1h
- { 2, 2, 2, 2, 6, 6, 6, 6 }, // 2h
- { 3, 3, 3, 3, 7, 7, 7, 7 }, // 3h
- { 0, 0, 0, 0, 0, 0, 0, 0 }, // 0
- { 1, 1, 1, 1, 1, 1, 1, 1 }, // 1
- { 2, 2, 2, 2, 2, 2, 2, 2 }, // 2
- { 3, 3, 3, 3, 3, 3, 3, 3 }, // 3
- { 4, 4, 4, 4, 4, 4, 4, 4 }, // 4
- { 5, 5, 5, 5, 5, 5, 5, 5 }, // 5
- { 6, 6, 6, 6, 6, 6, 6, 6 }, // 6
- { 7, 7, 7, 7, 7, 7, 7, 7 }, // 7
+ { 0, 1, 2, 3, 4, 5, 6, 7 }, // none
+ { 0, 1, 2, 3, 4, 5, 6, 7 }, // ???
+ { 0, 0, 2, 2, 4, 4, 6, 6 }, // 0q
+ { 1, 1, 3, 3, 5, 5, 7, 7 }, // 1q
+ { 0, 0, 0, 0, 4, 4, 4, 4 }, // 0h
+ { 1, 1, 1, 1, 5, 5, 5, 5 }, // 1h
+ { 2, 2, 2, 2, 6, 6, 6, 6 }, // 2h
+ { 3, 3, 3, 3, 7, 7, 7, 7 }, // 3h
+ { 0, 0, 0, 0, 0, 0, 0, 0 }, // 0
+ { 1, 1, 1, 1, 1, 1, 1, 1 }, // 1
+ { 2, 2, 2, 2, 2, 2, 2, 2 }, // 2
+ { 3, 3, 3, 3, 3, 3, 3, 3 }, // 3
+ { 4, 4, 4, 4, 4, 4, 4, 4 }, // 4
+ { 5, 5, 5, 5, 5, 5, 5, 5 }, // 5
+ { 6, 6, 6, 6, 6, 6, 6, 6 }, // 6
+ { 7, 7, 7, 7, 7, 7, 7, 7 }, // 7
};
#if USE_SIMD
@@ -713,1476 +713,1476 @@ static __m128i vec_shuf_inverse[16];
static void rspcom_init(rsp_state *rsp, legacy_cpu_device *device, device_irq_acknowledge_callback irqcallback)
{
- int regIdx = 0;
- int accumIdx;
+ int regIdx = 0;
+ int accumIdx;
- memset(rsp, 0, sizeof(*rsp));
+ memset(rsp, 0, sizeof(*rsp));
- const rsp_config *config = (const rsp_config *)device->static_config();
- // resolve callbacks
- rsp->dp_reg_r_func.resolve(config->dp_reg_r_cb, *device);
- rsp->dp_reg_w_func.resolve(config->dp_reg_w_cb, *device);
- rsp->sp_reg_r_func.resolve(config->sp_reg_r_cb, *device);
- rsp->sp_reg_w_func.resolve(config->sp_reg_w_cb, *device);
- rsp->sp_set_status_func.resolve(config->sp_set_status_cb, *device);
+ const rsp_config *config = (const rsp_config *)device->static_config();
+ // resolve callbacks
+ rsp->dp_reg_r_func.resolve(config->dp_reg_r_cb, *device);
+ rsp->dp_reg_w_func.resolve(config->dp_reg_w_cb, *device);
+ rsp->sp_reg_r_func.resolve(config->sp_reg_r_cb, *device);
+ rsp->sp_reg_w_func.resolve(config->sp_reg_w_cb, *device);
+ rsp->sp_set_status_func.resolve(config->sp_set_status_cb, *device);
- rsp->irq_callback = irqcallback;
- rsp->device = device;
- rsp->program = &device->space(AS_PROGRAM);
- rsp->direct = &rsp->program->direct();
+ rsp->irq_callback = irqcallback;
+ rsp->device = device;
+ rsp->program = &device->space(AS_PROGRAM);
+ rsp->direct = &rsp->program->direct();
#if 1
- // Inaccurate. RSP registers power on to a random state...
- for(regIdx = 0; regIdx < 32; regIdx++ )
- {
- rsp->r[regIdx] = 0;
- rsp->v[regIdx].d[0] = 0;
- rsp->v[regIdx].d[1] = 0;
- }
- CLEAR_CARRY_FLAGS();
- CLEAR_COMPARE_FLAGS();
- CLEAR_CLIP1_FLAGS();
- CLEAR_ZERO_FLAGS();
- CLEAR_CLIP2_FLAGS();
- rsp->reciprocal_res = 0;
- rsp->reciprocal_high = 0;
+ // Inaccurate. RSP registers power on to a random state...
+ for(regIdx = 0; regIdx < 32; regIdx++ )
+ {
+ rsp->r[regIdx] = 0;
+ rsp->v[regIdx].d[0] = 0;
+ rsp->v[regIdx].d[1] = 0;
+ }
+ CLEAR_CARRY_FLAGS();
+ CLEAR_COMPARE_FLAGS();
+ CLEAR_CLIP1_FLAGS();
+ CLEAR_ZERO_FLAGS();
+ CLEAR_CLIP2_FLAGS();
+ rsp->reciprocal_res = 0;
+ rsp->reciprocal_high = 0;
#endif
- // ...except for the accumulators.
- for(accumIdx = 0; accumIdx < 8; accumIdx++ )
- {
- rsp->accum[accumIdx].q = 0;
- }
+ // ...except for the accumulators.
+ for(accumIdx = 0; accumIdx < 8; accumIdx++ )
+ {
+ rsp->accum[accumIdx].q = 0;
+ }
- rsp->sr = RSP_STATUS_HALT;
- rsp->step_count = 0;
+ rsp->sr = RSP_STATUS_HALT;
+ rsp->step_count = 0;
#if USE_SIMD
- vec_shuf_inverse[ 0] = _mm_set_epi16(0x0f0e, 0x0d0c, 0x0b0a, 0x0908, 0x0706, 0x0504, 0x0302, 0x0100); // none
- vec_shuf_inverse[ 1] = _mm_set_epi16(0x0f0e, 0x0d0c, 0x0b0a, 0x0908, 0x0706, 0x0504, 0x0302, 0x0100); // ???
- vec_shuf_inverse[ 2] = _mm_set_epi16(0x0d0c, 0x0d0c, 0x0908, 0x0908, 0x0504, 0x0504, 0x0100, 0x0100); // 0q
- vec_shuf_inverse[ 3] = _mm_set_epi16(0x0f0e, 0x0f0e, 0x0b0a, 0x0b0a, 0x0706, 0x0706, 0x0302, 0x0302); // 1q
- vec_shuf_inverse[ 4] = _mm_set_epi16(0x0908, 0x0908, 0x0908, 0x0908, 0x0100, 0x0100, 0x0100, 0x0100); // 0h
- vec_shuf_inverse[ 5] = _mm_set_epi16(0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0302, 0x0302, 0x0302, 0x0302); // 1h
- vec_shuf_inverse[ 6] = _mm_set_epi16(0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0504, 0x0504, 0x0504, 0x0504); // 2h
- vec_shuf_inverse[ 7] = _mm_set_epi16(0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0706, 0x0706, 0x0706, 0x0706); // 3h
- vec_shuf_inverse[ 8] = _mm_set_epi16(0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100); // 0
- vec_shuf_inverse[ 9] = _mm_set_epi16(0x0302, 0x0302, 0x0302, 0x0302, 0x0302, 0x0302, 0x0302, 0x0302); // 1
- vec_shuf_inverse[10] = _mm_set_epi16(0x0504, 0x0504, 0x0504, 0x0504, 0x0504, 0x0504, 0x0504, 0x0504); // 2
- vec_shuf_inverse[11] = _mm_set_epi16(0x0706, 0x0706, 0x0706, 0x0706, 0x0706, 0x0706, 0x0706, 0x0706); // 3
- vec_shuf_inverse[12] = _mm_set_epi16(0x0908, 0x0908, 0x0908, 0x0908, 0x0908, 0x0908, 0x0908, 0x0908); // 4
- vec_shuf_inverse[13] = _mm_set_epi16(0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a); // 5
- vec_shuf_inverse[14] = _mm_set_epi16(0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c); // 6
- vec_shuf_inverse[15] = _mm_set_epi16(0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e); // 7
-
- vec_shuf[ 0] = _mm_set_epi16(0x0100, 0x0302, 0x0504, 0x0706, 0x0908, 0x0b0a, 0x0d0c, 0x0f0e); // none
- vec_shuf[ 1] = _mm_set_epi16(0x0100, 0x0302, 0x0504, 0x0706, 0x0908, 0x0b0a, 0x0d0c, 0x0f0e); // ???
- vec_shuf[ 2] = _mm_set_epi16(0x0302, 0x0302, 0x0706, 0x0706, 0x0b0a, 0x0b0a, 0x0f0e, 0x0f0e); // 0q
- vec_shuf[ 3] = _mm_set_epi16(0x0100, 0x0100, 0x0504, 0x0706, 0x0908, 0x0908, 0x0d0c, 0x0d0c); // 1q
- vec_shuf[ 4] = _mm_set_epi16(0x0706, 0x0706, 0x0706, 0x0706, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e); // 0q
- vec_shuf[ 5] = _mm_set_epi16(0x0504, 0x0504, 0x0504, 0x0504, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c); // 1q
- vec_shuf[ 6] = _mm_set_epi16(0x0302, 0x0302, 0x0302, 0x0302, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a); // 2q
- vec_shuf[ 7] = _mm_set_epi16(0x0100, 0x0100, 0x0100, 0x0100, 0x0908, 0x0908, 0x0908, 0x0908); // 3q
- vec_shuf[ 8] = _mm_set_epi16(0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e); // 0
- vec_shuf[ 9] = _mm_set_epi16(0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c); // 1
- vec_shuf[10] = _mm_set_epi16(0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a); // 2
- vec_shuf[11] = _mm_set_epi16(0x0908, 0x0908, 0x0908, 0x0908, 0x0908, 0x0908, 0x0908, 0x0908); // 3
- vec_shuf[12] = _mm_set_epi16(0x0706, 0x0706, 0x0706, 0x0706, 0x0706, 0x0706, 0x0706, 0x0706); // 4
- vec_shuf[13] = _mm_set_epi16(0x0504, 0x0504, 0x0504, 0x0504, 0x0504, 0x0504, 0x0504, 0x0504); // 5
- vec_shuf[14] = _mm_set_epi16(0x0302, 0x0302, 0x0302, 0x0302, 0x0302, 0x0302, 0x0302, 0x0302); // 6
- vec_shuf[15] = _mm_set_epi16(0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100); // 7
- rsp->accum_h = _mm_setzero_si128();
- rsp->accum_m = _mm_setzero_si128();
- rsp->accum_l = _mm_setzero_si128();
- vec_neg1 = _mm_set_epi64x(0xffffffffffffffffL, 0xffffffffffffffffL);
- vec_himask = _mm_set_epi64x(0xffff0000ffff0000L, 0xffff0000ffff0000L);
- vec_lomask = _mm_set_epi64x(0x0000ffff0000ffffL, 0x0000ffff0000ffffL);
- vec_hibit = _mm_set_epi64x(0x0001000000010000L, 0x0001000000010000L);
- vec_lobit = _mm_set_epi64x(0x0000000100000001L, 0x0000000100000001L);
- vec_32767 = _mm_set_epi64x(0x7fff7fff7fff7fffL, 0x7fff7fff7fff7fffL);
- vec_n32768 = _mm_set_epi64x(0x8000800080008000L, 0x8000800080008000L);
- vec_flagmask = _mm_set_epi64x(0x0001000100010001L, 0x0001000100010001L);
- vec_shiftmask2 = _mm_set_epi64x(0x0000000300000003L, 0x0000000300000003L);
- vec_shiftmask4 = _mm_set_epi64x(0x000000000000000fL, 0x000000000000000fL);
- vec_flag_reverse = _mm_set_epi16(0x0100, 0x0302, 0x0504, 0x0706, 0x0908, 0x0b0a, 0x0d0c, 0x0f0e);
+ vec_shuf_inverse[ 0] = _mm_set_epi16(0x0f0e, 0x0d0c, 0x0b0a, 0x0908, 0x0706, 0x0504, 0x0302, 0x0100); // none
+ vec_shuf_inverse[ 1] = _mm_set_epi16(0x0f0e, 0x0d0c, 0x0b0a, 0x0908, 0x0706, 0x0504, 0x0302, 0x0100); // ???
+ vec_shuf_inverse[ 2] = _mm_set_epi16(0x0d0c, 0x0d0c, 0x0908, 0x0908, 0x0504, 0x0504, 0x0100, 0x0100); // 0q
+ vec_shuf_inverse[ 3] = _mm_set_epi16(0x0f0e, 0x0f0e, 0x0b0a, 0x0b0a, 0x0706, 0x0706, 0x0302, 0x0302); // 1q
+ vec_shuf_inverse[ 4] = _mm_set_epi16(0x0908, 0x0908, 0x0908, 0x0908, 0x0100, 0x0100, 0x0100, 0x0100); // 0h
+ vec_shuf_inverse[ 5] = _mm_set_epi16(0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0302, 0x0302, 0x0302, 0x0302); // 1h
+ vec_shuf_inverse[ 6] = _mm_set_epi16(0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0504, 0x0504, 0x0504, 0x0504); // 2h
+ vec_shuf_inverse[ 7] = _mm_set_epi16(0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0706, 0x0706, 0x0706, 0x0706); // 3h
+ vec_shuf_inverse[ 8] = _mm_set_epi16(0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100); // 0
+ vec_shuf_inverse[ 9] = _mm_set_epi16(0x0302, 0x0302, 0x0302, 0x0302, 0x0302, 0x0302, 0x0302, 0x0302); // 1
+ vec_shuf_inverse[10] = _mm_set_epi16(0x0504, 0x0504, 0x0504, 0x0504, 0x0504, 0x0504, 0x0504, 0x0504); // 2
+ vec_shuf_inverse[11] = _mm_set_epi16(0x0706, 0x0706, 0x0706, 0x0706, 0x0706, 0x0706, 0x0706, 0x0706); // 3
+ vec_shuf_inverse[12] = _mm_set_epi16(0x0908, 0x0908, 0x0908, 0x0908, 0x0908, 0x0908, 0x0908, 0x0908); // 4
+ vec_shuf_inverse[13] = _mm_set_epi16(0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a); // 5
+ vec_shuf_inverse[14] = _mm_set_epi16(0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c); // 6
+ vec_shuf_inverse[15] = _mm_set_epi16(0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e); // 7
+
+ vec_shuf[ 0] = _mm_set_epi16(0x0100, 0x0302, 0x0504, 0x0706, 0x0908, 0x0b0a, 0x0d0c, 0x0f0e); // none
+ vec_shuf[ 1] = _mm_set_epi16(0x0100, 0x0302, 0x0504, 0x0706, 0x0908, 0x0b0a, 0x0d0c, 0x0f0e); // ???
+ vec_shuf[ 2] = _mm_set_epi16(0x0302, 0x0302, 0x0706, 0x0706, 0x0b0a, 0x0b0a, 0x0f0e, 0x0f0e); // 0q
+ vec_shuf[ 3] = _mm_set_epi16(0x0100, 0x0100, 0x0504, 0x0706, 0x0908, 0x0908, 0x0d0c, 0x0d0c); // 1q
+ vec_shuf[ 4] = _mm_set_epi16(0x0706, 0x0706, 0x0706, 0x0706, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e); // 0q
+ vec_shuf[ 5] = _mm_set_epi16(0x0504, 0x0504, 0x0504, 0x0504, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c); // 1q
+ vec_shuf[ 6] = _mm_set_epi16(0x0302, 0x0302, 0x0302, 0x0302, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a); // 2q
+ vec_shuf[ 7] = _mm_set_epi16(0x0100, 0x0100, 0x0100, 0x0100, 0x0908, 0x0908, 0x0908, 0x0908); // 3q
+ vec_shuf[ 8] = _mm_set_epi16(0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e, 0x0f0e); // 0
+ vec_shuf[ 9] = _mm_set_epi16(0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c, 0x0d0c); // 1
+ vec_shuf[10] = _mm_set_epi16(0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a, 0x0b0a); // 2
+ vec_shuf[11] = _mm_set_epi16(0x0908, 0x0908, 0x0908, 0x0908, 0x0908, 0x0908, 0x0908, 0x0908); // 3
+ vec_shuf[12] = _mm_set_epi16(0x0706, 0x0706, 0x0706, 0x0706, 0x0706, 0x0706, 0x0706, 0x0706); // 4
+ vec_shuf[13] = _mm_set_epi16(0x0504, 0x0504, 0x0504, 0x0504, 0x0504, 0x0504, 0x0504, 0x0504); // 5
+ vec_shuf[14] = _mm_set_epi16(0x0302, 0x0302, 0x0302, 0x0302, 0x0302, 0x0302, 0x0302, 0x0302); // 6
+ vec_shuf[15] = _mm_set_epi16(0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100, 0x0100); // 7
+ rsp->accum_h = _mm_setzero_si128();
+ rsp->accum_m = _mm_setzero_si128();
+ rsp->accum_l = _mm_setzero_si128();
+ vec_neg1 = _mm_set_epi64x(0xffffffffffffffffL, 0xffffffffffffffffL);
+ vec_himask = _mm_set_epi64x(0xffff0000ffff0000L, 0xffff0000ffff0000L);
+ vec_lomask = _mm_set_epi64x(0x0000ffff0000ffffL, 0x0000ffff0000ffffL);
+ vec_hibit = _mm_set_epi64x(0x0001000000010000L, 0x0001000000010000L);
+ vec_lobit = _mm_set_epi64x(0x0000000100000001L, 0x0000000100000001L);
+ vec_32767 = _mm_set_epi64x(0x7fff7fff7fff7fffL, 0x7fff7fff7fff7fffL);
+ vec_n32768 = _mm_set_epi64x(0x8000800080008000L, 0x8000800080008000L);
+ vec_flagmask = _mm_set_epi64x(0x0001000100010001L, 0x0001000100010001L);
+ vec_shiftmask2 = _mm_set_epi64x(0x0000000300000003L, 0x0000000300000003L);
+ vec_shiftmask4 = _mm_set_epi64x(0x000000000000000fL, 0x000000000000000fL);
+ vec_flag_reverse = _mm_set_epi16(0x0100, 0x0302, 0x0504, 0x0706, 0x0908, 0x0b0a, 0x0d0c, 0x0f0e);
#endif
}
static CPU_INIT( rsp )
{
- rsp_state *rsp;
- drc_cache *cache;
- UINT32 flags = 0;
- int regnum;
- //int elnum;
-
- /* allocate enough space for the cache and the core */
- cache = auto_alloc(device->machine(), drc_cache(CACHE_SIZE + sizeof(*rsp)));
-
- /* allocate the core memory */
- *(rsp_state **)device->token() = rsp = (rsp_state *)cache->alloc_near(sizeof(*rsp));
- memset(rsp, 0, sizeof(*rsp));
-
- rspcom_init(rsp, device, irqcallback);
-
- /* allocate the implementation-specific state from the full cache */
- rsp->impstate = (rspimp_state *)cache->alloc_near(sizeof(*rsp->impstate));
- memset(rsp->impstate, 0, sizeof(*rsp->impstate));
- rsp->impstate->cache = cache;
-
- /* initialize the UML generator */
- if (LOG_UML)
- {
- flags |= DRCUML_OPTION_LOG_UML;
- }
- if (LOG_NATIVE)
- {
- flags |= DRCUML_OPTION_LOG_NATIVE;
- }
- rsp->impstate->drcuml = auto_alloc(device->machine(), drcuml_state(*device, *cache, flags, 8, 32, 2));
-
- /* add symbols for our stuff */
- rsp->impstate->drcuml->symbol_add(&rsp->pc, sizeof(rsp->pc), "pc");
- rsp->impstate->drcuml->symbol_add(&rsp->icount, sizeof(rsp->icount), "icount");
- for (regnum = 0; regnum < 32; regnum++)
- {
- char buf[10];
- sprintf(buf, "r%d", regnum);
- rsp->impstate->drcuml->symbol_add(&rsp->r[regnum], sizeof(rsp->r[regnum]), buf);
- }
- rsp->impstate->drcuml->symbol_add(&rsp->impstate->arg0, sizeof(rsp->impstate->arg0), "arg0");
- rsp->impstate->drcuml->symbol_add(&rsp->impstate->arg1, sizeof(rsp->impstate->arg1), "arg1");
- rsp->impstate->drcuml->symbol_add(&rsp->impstate->arg2, sizeof(rsp->impstate->arg2), "arg2");
- rsp->impstate->drcuml->symbol_add(&rsp->impstate->arg3, sizeof(rsp->impstate->arg3), "arg3");
- rsp->impstate->drcuml->symbol_add(&rsp->impstate->numcycles, sizeof(rsp->impstate->numcycles), "numcycles");
-
- /* initialize the front-end helper */
- rsp->impstate->drcfe = auto_alloc(device->machine(), rsp_frontend(*rsp, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE));
-
- /* compute the register parameters */
- for (regnum = 0; regnum < 32; regnum++)
- rsp->impstate->regmap[regnum] = (regnum == 0) ? parameter(0) : parameter::make_memory(&rsp->r[regnum]);
-
- /*
- drcbe_info beinfo;
- rsp->impstate->drcuml->get_backend_info(beinfo);
- if (beinfo.direct_iregs > 2)
- {
- rsp->impstate->regmap[30] = I2;
- }
- if (beinfo.direct_iregs > 3)
- {
- rsp->impstate->regmap[31] = I3;
- }
- if (beinfo.direct_iregs > 4)
- {
- rsp->impstate->regmap[2] = I4;
- }
- if (beinfo.direct_iregs > 5)
- {
- rsp->impstate->regmap[3] = I5;
- }
- if (beinfo.direct_iregs > 6)
- {
- rsp->impstate->regmap[4] = I6;
- }
- */
-
- /* mark the cache dirty so it is updated on next execute */
- rsp->impstate->cache_dirty = TRUE;
+ rsp_state *rsp;
+ drc_cache *cache;
+ UINT32 flags = 0;
+ int regnum;
+ //int elnum;
+
+ /* allocate enough space for the cache and the core */
+ cache = auto_alloc(device->machine(), drc_cache(CACHE_SIZE + sizeof(*rsp)));
+
+ /* allocate the core memory */
+ *(rsp_state **)device->token() = rsp = (rsp_state *)cache->alloc_near(sizeof(*rsp));
+ memset(rsp, 0, sizeof(*rsp));
+
+ rspcom_init(rsp, device, irqcallback);
+
+ /* allocate the implementation-specific state from the full cache */
+ rsp->impstate = (rspimp_state *)cache->alloc_near(sizeof(*rsp->impstate));
+ memset(rsp->impstate, 0, sizeof(*rsp->impstate));
+ rsp->impstate->cache = cache;
+
+ /* initialize the UML generator */
+ if (LOG_UML)
+ {
+ flags |= DRCUML_OPTION_LOG_UML;
+ }
+ if (LOG_NATIVE)
+ {
+ flags |= DRCUML_OPTION_LOG_NATIVE;
+ }
+ rsp->impstate->drcuml = auto_alloc(device->machine(), drcuml_state(*device, *cache, flags, 8, 32, 2));
+
+ /* add symbols for our stuff */
+ rsp->impstate->drcuml->symbol_add(&rsp->pc, sizeof(rsp->pc), "pc");
+ rsp->impstate->drcuml->symbol_add(&rsp->icount, sizeof(rsp->icount), "icount");
+ for (regnum = 0; regnum < 32; regnum++)
+ {
+ char buf[10];
+ sprintf(buf, "r%d", regnum);
+ rsp->impstate->drcuml->symbol_add(&rsp->r[regnum], sizeof(rsp->r[regnum]), buf);
+ }
+ rsp->impstate->drcuml->symbol_add(&rsp->impstate->arg0, sizeof(rsp->impstate->arg0), "arg0");
+ rsp->impstate->drcuml->symbol_add(&rsp->impstate->arg1, sizeof(rsp->impstate->arg1), "arg1");
+ rsp->impstate->drcuml->symbol_add(&rsp->impstate->arg2, sizeof(rsp->impstate->arg2), "arg2");
+ rsp->impstate->drcuml->symbol_add(&rsp->impstate->arg3, sizeof(rsp->impstate->arg3), "arg3");
+ rsp->impstate->drcuml->symbol_add(&rsp->impstate->numcycles, sizeof(rsp->impstate->numcycles), "numcycles");
+
+ /* initialize the front-end helper */
+ rsp->impstate->drcfe = auto_alloc(device->machine(), rsp_frontend(*rsp, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE));
+
+ /* compute the register parameters */
+ for (regnum = 0; regnum < 32; regnum++)
+ rsp->impstate->regmap[regnum] = (regnum == 0) ? parameter(0) : parameter::make_memory(&rsp->r[regnum]);
+
+ /*
+ drcbe_info beinfo;
+ rsp->impstate->drcuml->get_backend_info(beinfo);
+ if (beinfo.direct_iregs > 2)
+ {
+ rsp->impstate->regmap[30] = I2;
+ }
+ if (beinfo.direct_iregs > 3)
+ {
+ rsp->impstate->regmap[31] = I3;
+ }
+ if (beinfo.direct_iregs > 4)
+ {
+ rsp->impstate->regmap[2] = I4;
+ }
+ if (beinfo.direct_iregs > 5)
+ {
+ rsp->impstate->regmap[3] = I5;
+ }
+ if (beinfo.direct_iregs > 6)
+ {
+ rsp->impstate->regmap[4] = I6;
+ }
+ */
+
+ /* mark the cache dirty so it is updated on next execute */
+ rsp->impstate->cache_dirty = TRUE;
}
static CPU_EXIT( rsp )
{
- rsp_state *rsp = get_safe_token(device);
+ rsp_state *rsp = get_safe_token(device);
- /* clean up the DRC */
- auto_free(device->machine(), rsp->impstate->drcfe);
- auto_free(device->machine(), rsp->impstate->drcuml);
- auto_free(device->machine(), rsp->impstate->cache);
+ /* clean up the DRC */
+ auto_free(device->machine(), rsp->impstate->drcfe);
+ auto_free(device->machine(), rsp->impstate->drcuml);
+ auto_free(device->machine(), rsp->impstate->cache);
}
static CPU_RESET( rsp )
{
- rsp_state *rsp = get_safe_token(device);
- rsp->nextpc = ~0;
+ rsp_state *rsp = get_safe_token(device);
+ rsp->nextpc = ~0;
}
static void cfunc_rsp_lbv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
-
- UINT32 ea = 0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 110010 | BBBBB | TTTTT | 00000 | IIII | Offset |
- // --------------------------------------------------
- //
- // Load 1 byte to vector byte index
-
- ea = (base) ? rsp->r[base] + offset : offset;
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+
+ UINT32 ea = 0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 110010 | BBBBB | TTTTT | 00000 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Load 1 byte to vector byte index
+
+ ea = (base) ? rsp->r[base] + offset : offset;
#if USE_SIMD
- UINT16 element;
- SIMD_EXTRACT16(rsp->xv[dest], element, (index >> 1));
- element &= 0xff00 >> ((1-(index & 1)) * 8);
- element |= READ8(rsp, ea) << ((1-(index & 1)) * 8);
- SIMD_INSERT16(rsp->xv[dest], element, (index >> 1));
+ UINT16 element;
+ SIMD_EXTRACT16(rsp->xv[dest], element, (index >> 1));
+ element &= 0xff00 >> ((1-(index & 1)) * 8);
+ element |= READ8(rsp, ea) << ((1-(index & 1)) * 8);
+ SIMD_INSERT16(rsp->xv[dest], element, (index >> 1));
#else
- VREG_B(dest, index) = READ8(rsp, ea);
+ VREG_B(dest, index) = READ8(rsp, ea);
#endif
}
static void cfunc_rsp_lsv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xe;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 110010 | BBBBB | TTTTT | 00001 | IIII | Offset |
- // --------------------------------------------------
- //
- // Loads 2 bytes starting from vector byte index
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 2) : (offset * 2);
- int end = index + 2;
- for (int i = index; i < end; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xe;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 110010 | BBBBB | TTTTT | 00001 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Loads 2 bytes starting from vector byte index
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 2) : (offset * 2);
+ int end = index + 2;
+ for (int i = index; i < end; i++)
+ {
#if USE_SIMD
- UINT16 element;
- SIMD_EXTRACT16(rsp->xv[dest], element, (i >> 1));
- element &= 0xff00 >> ((1 - (i & 1)) * 8);
- element |= READ8(rsp, ea) << ((1 - (i & 1)) * 8);
- SIMD_INSERT16(rsp->xv[dest], element, (i >> 1));
+ UINT16 element;
+ SIMD_EXTRACT16(rsp->xv[dest], element, (i >> 1));
+ element &= 0xff00 >> ((1 - (i & 1)) * 8);
+ element |= READ8(rsp, ea) << ((1 - (i & 1)) * 8);
+ SIMD_INSERT16(rsp->xv[dest], element, (i >> 1));
#else
- VREG_B(dest, i) = READ8(rsp, ea);
+ VREG_B(dest, i) = READ8(rsp, ea);
#endif
- ea++;
- }
+ ea++;
+ }
}
static void cfunc_rsp_llv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- UINT32 ea = 0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xc;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 110010 | BBBBB | TTTTT | 00010 | IIII | Offset |
- // --------------------------------------------------
- //
- // Loads 4 bytes starting from vector byte index
-
- ea = (base) ? rsp->r[base] + (offset * 4) : (offset * 4);
-
- int end = index + 4;
-
- for (int i = index; i < end; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ UINT32 ea = 0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xc;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 110010 | BBBBB | TTTTT | 00010 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Loads 4 bytes starting from vector byte index
+
+ ea = (base) ? rsp->r[base] + (offset * 4) : (offset * 4);
+
+ int end = index + 4;
+
+ for (int i = index; i < end; i++)
+ {
#if USE_SIMD
- UINT16 element;
- SIMD_EXTRACT16(rsp->xv[dest], element, (i >> 1));
- element &= 0xff00 >> ((1 - (i & 1)) * 8);
- element |= READ8(rsp, ea) << ((1 - (i & 1)) * 8);
- SIMD_INSERT16(rsp->xv[dest], element, (i >> 1));
+ UINT16 element;
+ SIMD_EXTRACT16(rsp->xv[dest], element, (i >> 1));
+ element &= 0xff00 >> ((1 - (i & 1)) * 8);
+ element |= READ8(rsp, ea) << ((1 - (i & 1)) * 8);
+ SIMD_INSERT16(rsp->xv[dest], element, (i >> 1));
#else
- VREG_B(dest, i) = READ8(rsp, ea);
+ VREG_B(dest, i) = READ8(rsp, ea);
#endif
- ea++;
- }
+ ea++;
+ }
}
static void cfunc_rsp_ldv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- UINT32 ea = 0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0x8;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 110010 | BBBBB | TTTTT | 00011 | IIII | Offset |
- // --------------------------------------------------
- //
- // Loads 8 bytes starting from vector byte index
-
- ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
-
- int end = index + 8;
-
- for (int i = index; i < end; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ UINT32 ea = 0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0x8;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 110010 | BBBBB | TTTTT | 00011 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Loads 8 bytes starting from vector byte index
+
+ ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
+
+ int end = index + 8;
+
+ for (int i = index; i < end; i++)
+ {
#if USE_SIMD
- UINT16 element;
- SIMD_EXTRACT16(rsp->xv[dest], element, (i >> 1));
- element &= 0xff00 >> ((1 - (i & 1)) * 8);
- element |= READ8(rsp, ea) << ((1 - (i & 1)) * 8);
- SIMD_INSERT16(rsp->xv[dest], element, (i >> 1));
+ UINT16 element;
+ SIMD_EXTRACT16(rsp->xv[dest], element, (i >> 1));
+ element &= 0xff00 >> ((1 - (i & 1)) * 8);
+ element |= READ8(rsp, ea) << ((1 - (i & 1)) * 8);
+ SIMD_INSERT16(rsp->xv[dest], element, (i >> 1));
#else
- VREG_B(dest, i) = READ8(rsp, ea);
+ VREG_B(dest, i) = READ8(rsp, ea);
#endif
- ea++;
- }
+ ea++;
+ }
}
static void cfunc_rsp_lqv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- //int index = 0; // Just a test, it goes right back the way it was if something breaks //(op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 110010 | BBBBB | TTTTT | 00100 | IIII | Offset |
- // --------------------------------------------------
- //
- // Loads up to 16 bytes starting from vector byte index
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
-
- int end = 16 - (ea & 0xf);
- if (end > 16) end = 16;
-
- for (int i = 0; i < end; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ //int index = 0; // Just a test, it goes right back the way it was if something breaks //(op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 110010 | BBBBB | TTTTT | 00100 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Loads up to 16 bytes starting from vector byte index
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
+
+ int end = 16 - (ea & 0xf);
+ if (end > 16) end = 16;
+
+ for (int i = 0; i < end; i++)
+ {
#if USE_SIMD
- UINT16 element;
- SIMD_EXTRACT16(rsp->xv[dest], element, (i >> 1));
- element &= 0xff00 >> ((1 - (i & 1)) * 8);
- element |= READ8(rsp, ea) << ((1 - (i & 1)) * 8);
- SIMD_INSERT16(rsp->xv[dest], element, (i >> 1));
+ UINT16 element;
+ SIMD_EXTRACT16(rsp->xv[dest], element, (i >> 1));
+ element &= 0xff00 >> ((1 - (i & 1)) * 8);
+ element |= READ8(rsp, ea) << ((1 - (i & 1)) * 8);
+ SIMD_INSERT16(rsp->xv[dest], element, (i >> 1));
#else
- VREG_B(dest, i) = READ8(rsp, ea);
+ VREG_B(dest, i) = READ8(rsp, ea);
#endif
- ea++;
- }
+ ea++;
+ }
}
static void cfunc_rsp_lrv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 110010 | BBBBB | TTTTT | 00101 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores up to 16 bytes starting from right side until 16-byte boundary
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
-
- index = 16 - ((ea & 0xf) - index);
- ea &= ~0xf;
-
- for (int i = index; i < 16; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 110010 | BBBBB | TTTTT | 00101 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores up to 16 bytes starting from right side until 16-byte boundary
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
+
+ index = 16 - ((ea & 0xf) - index);
+ ea &= ~0xf;
+
+ for (int i = index; i < 16; i++)
+ {
#if USE_SIMD
- UINT16 element;
- SIMD_EXTRACT16(rsp->xv[dest], element, (i >> 1));
- element &= 0xff00 >> ((1-(i & 1)) * 8);
- element |= READ8(rsp, ea) << ((1-(i & 1)) * 8);
- SIMD_INSERT16(rsp->xv[dest], element, (i >> 1));
+ UINT16 element;
+ SIMD_EXTRACT16(rsp->xv[dest], element, (i >> 1));
+ element &= 0xff00 >> ((1-(i & 1)) * 8);
+ element |= READ8(rsp, ea) << ((1-(i & 1)) * 8);
+ SIMD_INSERT16(rsp->xv[dest], element, (i >> 1));
#else
- VREG_B(dest, i) = READ8(rsp, ea);
+ VREG_B(dest, i) = READ8(rsp, ea);
#endif
- ea++;
- }
+ ea++;
+ }
}
static void cfunc_rsp_lpv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 110010 | BBBBB | TTTTT | 00110 | IIII | Offset |
- // --------------------------------------------------
- //
- // Loads a byte as the upper 8 bits of each element
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
-
- for (int i = 0; i < 8; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 110010 | BBBBB | TTTTT | 00110 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Loads a byte as the upper 8 bits of each element
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
+
+ for (int i = 0; i < 8; i++)
+ {
#if USE_SIMD
- SIMD_INSERT16(rsp->xv[dest], READ8(rsp, ea + (((16-index) + i) & 0xf)) << 8, i);
+ SIMD_INSERT16(rsp->xv[dest], READ8(rsp, ea + (((16-index) + i) & 0xf)) << 8, i);
#else
- W_VREG_S(dest, i) = READ8(rsp, ea + (((16-index) + i) & 0xf)) << 8;
+ W_VREG_S(dest, i) = READ8(rsp, ea + (((16-index) + i) & 0xf)) << 8;
#endif
- }
+ }
}
static void cfunc_rsp_luv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 110010 | BBBBB | TTTTT | 00111 | IIII | Offset |
- // --------------------------------------------------
- //
- // Loads a byte as the bits 14-7 of each element
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
-
- for (int i = 0; i < 8; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 110010 | BBBBB | TTTTT | 00111 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Loads a byte as the bits 14-7 of each element
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
+
+ for (int i = 0; i < 8; i++)
+ {
#if USE_SIMD
- SIMD_INSERT16(rsp->xv[dest], READ8(rsp, ea + (((16-index) + i) & 0xf)) << 7, i);
+ SIMD_INSERT16(rsp->xv[dest], READ8(rsp, ea + (((16-index) + i) & 0xf)) << 7, i);
#else
- W_VREG_S(dest, i) = READ8(rsp, ea + (((16-index) + i) & 0xf)) << 7;
+ W_VREG_S(dest, i) = READ8(rsp, ea + (((16-index) + i) & 0xf)) << 7;
#endif
- }
+ }
}
static void cfunc_rsp_lhv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 110010 | BBBBB | TTTTT | 01000 | IIII | Offset |
- // --------------------------------------------------
- //
- // Loads a byte as the bits 14-7 of each element, with 2-byte stride
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
-
- for (int i = 0; i < 8; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 110010 | BBBBB | TTTTT | 01000 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Loads a byte as the bits 14-7 of each element, with 2-byte stride
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
+
+ for (int i = 0; i < 8; i++)
+ {
#if USE_SIMD
- SIMD_INSERT16(rsp->xv[dest], READ8(rsp, ea + (((16-index) + (i<<1)) & 0xf)) << 7, i);
+ SIMD_INSERT16(rsp->xv[dest], READ8(rsp, ea + (((16-index) + (i<<1)) & 0xf)) << 7, i);
#else
- W_VREG_S(dest, i) = READ8(rsp, ea + (((16-index) + (i<<1)) & 0xf)) << 7;
+ W_VREG_S(dest, i) = READ8(rsp, ea + (((16-index) + (i<<1)) & 0xf)) << 7;
#endif
- }
+ }
}
static void cfunc_rsp_lfv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 110010 | BBBBB | TTTTT | 01001 | IIII | Offset |
- // --------------------------------------------------
- //
- // Loads a byte as the bits 14-7 of upper or lower quad, with 4-byte stride
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
-
- // not sure what happens if 16-byte boundary is crossed...
-
- int end = (index >> 1) + 4;
-
- for (int i = index >> 1; i < end; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 110010 | BBBBB | TTTTT | 01001 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Loads a byte as the bits 14-7 of upper or lower quad, with 4-byte stride
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
+
+ // not sure what happens if 16-byte boundary is crossed...
+
+ int end = (index >> 1) + 4;
+
+ for (int i = index >> 1; i < end; i++)
+ {
#if USE_SIMD
- SIMD_INSERT16(rsp->xv[dest], READ8(rsp, ea) << 7, i);
+ SIMD_INSERT16(rsp->xv[dest], READ8(rsp, ea) << 7, i);
#else
- W_VREG_S(dest, i) = READ8(rsp, ea) << 7;
+ W_VREG_S(dest, i) = READ8(rsp, ea) << 7;
#endif
- ea += 4;
- }
+ ea += 4;
+ }
}
static void cfunc_rsp_lwv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 110010 | BBBBB | TTTTT | 01010 | IIII | Offset |
- // --------------------------------------------------
- //
- // Loads the full 128-bit vector starting from vector byte index and wrapping to index 0
- // after byte index 15
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
- int end = (16 - index) + 16;
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 110010 | BBBBB | TTTTT | 01010 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Loads the full 128-bit vector starting from vector byte index and wrapping to index 0
+ // after byte index 15
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
+ int end = (16 - index) + 16;
#if USE_SIMD
- UINT8 val[16];
+ UINT8 val[16];
#endif
- for (int i = (16 - index); i < end; i++)
- {
+ for (int i = (16 - index); i < end; i++)
+ {
#if USE_SIMD
- val[i & 0xf] = READ8(rsp, ea);
+ val[i & 0xf] = READ8(rsp, ea);
#else
- VREG_B(dest, i & 0xf) = READ8(rsp, ea);
+ VREG_B(dest, i & 0xf) = READ8(rsp, ea);
#endif
- ea += 4;
- }
+ ea += 4;
+ }
#if USE_SIMD
- rsp->xv[dest] = _mm_set_epi8(val[15], val[14], val[13], val[12], val[11], val[10], val[ 9], val[ 8],
- val[ 7], val[ 6], val[ 5], val[ 4], val[ 3], val[ 2], val[ 1], val[ 0]);
+ rsp->xv[dest] = _mm_set_epi8(val[15], val[14], val[13], val[12], val[11], val[10], val[ 9], val[ 8],
+ val[ 7], val[ 6], val[ 5], val[ 4], val[ 3], val[ 2], val[ 1], val[ 0]);
#endif
}
static void cfunc_rsp_ltv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
-
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 110010 | BBBBB | TTTTT | 01011 | IIII | Offset |
- // --------------------------------------------------
- //
- // Loads one element to maximum of 8 vectors, while incrementing element index
-
- // FIXME: has a small problem with odd indices
-
- int vs = dest;
- int ve = dest + 8;
- if (ve > 32)
- {
- ve = 32;
- }
-
- int element = 7 - (index >> 1);
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
-
- ea = ((ea + 8) & ~0xf) + (index & 1);
- for (int i = vs; i < ve; i++)
- {
- element = ((8 - (index >> 1) + (i - vs)) << 1);
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 110010 | BBBBB | TTTTT | 01011 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Loads one element to maximum of 8 vectors, while incrementing element index
+
+ // FIXME: has a small problem with odd indices
+
+ int vs = dest;
+ int ve = dest + 8;
+ if (ve > 32)
+ {
+ ve = 32;
+ }
+
+ int element = 7 - (index >> 1);
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
+
+ ea = ((ea + 8) & ~0xf) + (index & 1);
+ for (int i = vs; i < ve; i++)
+ {
+ element = ((8 - (index >> 1) + (i - vs)) << 1);
#if USE_SIMD
- UINT16 value = (READ8(rsp, ea) << 8) | READ8(rsp, ea + 1);
- SIMD_INSERT16(rsp->xv[i], value, (element >> 1));
+ UINT16 value = (READ8(rsp, ea) << 8) | READ8(rsp, ea + 1);
+ SIMD_INSERT16(rsp->xv[i], value, (element >> 1));
#else
- VREG_B(i, (element & 0xf)) = READ8(rsp, ea);
- VREG_B(i, ((element + 1) & 0xf)) = READ8(rsp, ea + 1);
+ VREG_B(i, (element & 0xf)) = READ8(rsp, ea);
+ VREG_B(i, ((element + 1) & 0xf)) = READ8(rsp, ea + 1);
#endif
- ea += 2;
- }
+ ea += 2;
+ }
}
static int generate_lwc2(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- //int loopdest;
- UINT32 op = desc->opptr.l[0];
- //int dest = (op >> 16) & 0x1f;
- //int base = (op >> 21) & 0x1f;
- //int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- //int skip;
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
-
- switch ((op >> 11) & 0x1f)
- {
- case 0x00: /* LBV */
- //UML_ADD(block, I0, R32(RSREG), offset);
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_lbv, rsp);
- return TRUE;
- case 0x01: /* LSV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_lsv, rsp);
- return TRUE;
- case 0x02: /* LLV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_llv, rsp);
- return TRUE;
- case 0x03: /* LDV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_ldv, rsp);
- return TRUE;
- case 0x04: /* LQV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_lqv, rsp);
- return TRUE;
- case 0x05: /* LRV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_lrv, rsp);
- return TRUE;
- case 0x06: /* LPV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_lpv, rsp);
- return TRUE;
- case 0x07: /* LUV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_luv, rsp);
- return TRUE;
- case 0x08: /* LHV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_lhv, rsp);
- return TRUE;
- case 0x09: /* LFV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_lfv, rsp);
- return TRUE;
- case 0x0a: /* LWV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_lwv, rsp);
- return TRUE;
- case 0x0b: /* LTV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_ltv, rsp);
- return TRUE;
-
- default:
- return FALSE;
- }
+ //int loopdest;
+ UINT32 op = desc->opptr.l[0];
+ //int dest = (op >> 16) & 0x1f;
+ //int base = (op >> 21) & 0x1f;
+ //int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ //int skip;
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+
+ switch ((op >> 11) & 0x1f)
+ {
+ case 0x00: /* LBV */
+ //UML_ADD(block, I0, R32(RSREG), offset);
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_lbv, rsp);
+ return TRUE;
+ case 0x01: /* LSV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_lsv, rsp);
+ return TRUE;
+ case 0x02: /* LLV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_llv, rsp);
+ return TRUE;
+ case 0x03: /* LDV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_ldv, rsp);
+ return TRUE;
+ case 0x04: /* LQV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_lqv, rsp);
+ return TRUE;
+ case 0x05: /* LRV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_lrv, rsp);
+ return TRUE;
+ case 0x06: /* LPV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_lpv, rsp);
+ return TRUE;
+ case 0x07: /* LUV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_luv, rsp);
+ return TRUE;
+ case 0x08: /* LHV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_lhv, rsp);
+ return TRUE;
+ case 0x09: /* LFV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_lfv, rsp);
+ return TRUE;
+ case 0x0a: /* LWV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_lwv, rsp);
+ return TRUE;
+ case 0x0b: /* LTV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_ltv, rsp);
+ return TRUE;
+
+ default:
+ return FALSE;
+ }
}
static void cfunc_rsp_sbv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
-
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 111010 | BBBBB | TTTTT | 00000 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores 1 byte from vector byte index
-
- UINT32 ea = (base) ? rsp->r[base] + offset : offset;
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 111010 | BBBBB | TTTTT | 00000 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores 1 byte from vector byte index
+
+ UINT32 ea = (base) ? rsp->r[base] + offset : offset;
#if USE_SIMD
- UINT16 value;
- SIMD_EXTRACT16(rsp->xv[dest], value, (index >> 1));
- value >>= (1-(index & 1)) * 8;
- WRITE8(rsp, ea, (UINT8)value);
+ UINT16 value;
+ SIMD_EXTRACT16(rsp->xv[dest], value, (index >> 1));
+ value >>= (1-(index & 1)) * 8;
+ WRITE8(rsp, ea, (UINT8)value);
#else
- WRITE8(rsp, ea, VREG_B(dest, index));
+ WRITE8(rsp, ea, VREG_B(dest, index));
#endif
}
static void cfunc_rsp_ssv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
-
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 111010 | BBBBB | TTTTT | 00001 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores 2 bytes starting from vector byte index
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 2) : (offset * 2);
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 111010 | BBBBB | TTTTT | 00001 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores 2 bytes starting from vector byte index
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 2) : (offset * 2);
#if USE_SIMD
- UINT16 value;
- SIMD_EXTRACT16(rsp->xv[dest], value, (index >> 1));
- WRITE8(rsp, ea, (UINT8)(value >> 8));
- WRITE8(rsp, ea+1, (UINT8)(value & 0x00ff));
+ UINT16 value;
+ SIMD_EXTRACT16(rsp->xv[dest], value, (index >> 1));
+ WRITE8(rsp, ea, (UINT8)(value >> 8));
+ WRITE8(rsp, ea+1, (UINT8)(value & 0x00ff));
#else
- int end = index + 2;
- for (int i = index; i < end; i++)
- {
- WRITE8(rsp, ea, VREG_B(dest, i));
- ea++;
- }
+ int end = index + 2;
+ for (int i = index; i < end; i++)
+ {
+ WRITE8(rsp, ea, VREG_B(dest, i));
+ ea++;
+ }
#endif
}
static void cfunc_rsp_slv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 111010 | BBBBB | TTTTT | 00010 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores 4 bytes starting from vector byte index
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 4) : (offset * 4);
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 111010 | BBBBB | TTTTT | 00010 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores 4 bytes starting from vector byte index
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 4) : (offset * 4);
#if USE_SIMD
- UINT16 value0, value1;
- index >>= 1;
- SIMD_EXTRACT16(rsp->xv[dest], value0, index);
- SIMD_EXTRACT16(rsp->xv[dest], value1, index+1);
- WRITE8(rsp, ea, (UINT8)(value0 >> 8));
- WRITE8(rsp, ea+1, (UINT8)(value0 & 0x00ff));
- WRITE8(rsp, ea+2, (UINT8)(value1 >> 8));
- WRITE8(rsp, ea+3, (UINT8)(value1 & 0x00ff));
+ UINT16 value0, value1;
+ index >>= 1;
+ SIMD_EXTRACT16(rsp->xv[dest], value0, index);
+ SIMD_EXTRACT16(rsp->xv[dest], value1, index+1);
+ WRITE8(rsp, ea, (UINT8)(value0 >> 8));
+ WRITE8(rsp, ea+1, (UINT8)(value0 & 0x00ff));
+ WRITE8(rsp, ea+2, (UINT8)(value1 >> 8));
+ WRITE8(rsp, ea+3, (UINT8)(value1 & 0x00ff));
#else
- int end = index + 4;
- for (int i = index; i < end; i++)
- {
- WRITE8(rsp, ea, VREG_B(dest, i));
- ea++;
- }
+ int end = index + 4;
+ for (int i = index; i < end; i++)
+ {
+ WRITE8(rsp, ea, VREG_B(dest, i));
+ ea++;
+ }
#endif
}
static void cfunc_rsp_sdv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0x8;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 111010 | BBBBB | TTTTT | 00011 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores 8 bytes starting from vector byte index
- UINT32 ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0x8;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 111010 | BBBBB | TTTTT | 00011 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores 8 bytes starting from vector byte index
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
#if USE_SIMD
- UINT16 value0, value1, value2, value3;
- index >>= 1;
- SIMD_EXTRACT16(rsp->xv[dest], value0, index);
- SIMD_EXTRACT16(rsp->xv[dest], value1, index+1);
- SIMD_EXTRACT16(rsp->xv[dest], value2, index+2);
- SIMD_EXTRACT16(rsp->xv[dest], value3, index+3);
- WRITE8(rsp, ea, (UINT8)(value0 >> 8));
- WRITE8(rsp, ea+1, (UINT8)(value0 & 0x00ff));
- WRITE8(rsp, ea+2, (UINT8)(value1 >> 8));
- WRITE8(rsp, ea+3, (UINT8)(value1 & 0x00ff));
- WRITE8(rsp, ea+4, (UINT8)(value2 >> 8));
- WRITE8(rsp, ea+5, (UINT8)(value2 & 0x00ff));
- WRITE8(rsp, ea+6, (UINT8)(value3 >> 8));
- WRITE8(rsp, ea+7, (UINT8)(value3 & 0x00ff));
+ UINT16 value0, value1, value2, value3;
+ index >>= 1;
+ SIMD_EXTRACT16(rsp->xv[dest], value0, index);
+ SIMD_EXTRACT16(rsp->xv[dest], value1, index+1);
+ SIMD_EXTRACT16(rsp->xv[dest], value2, index+2);
+ SIMD_EXTRACT16(rsp->xv[dest], value3, index+3);
+ WRITE8(rsp, ea, (UINT8)(value0 >> 8));
+ WRITE8(rsp, ea+1, (UINT8)(value0 & 0x00ff));
+ WRITE8(rsp, ea+2, (UINT8)(value1 >> 8));
+ WRITE8(rsp, ea+3, (UINT8)(value1 & 0x00ff));
+ WRITE8(rsp, ea+4, (UINT8)(value2 >> 8));
+ WRITE8(rsp, ea+5, (UINT8)(value2 & 0x00ff));
+ WRITE8(rsp, ea+6, (UINT8)(value3 >> 8));
+ WRITE8(rsp, ea+7, (UINT8)(value3 & 0x00ff));
#else
- int end = index + 8;
- for (int i = index; i < end; i++)
- {
- WRITE8(rsp, ea, VREG_B(dest, i));
- ea++;
- }
+ int end = index + 8;
+ for (int i = index; i < end; i++)
+ {
+ WRITE8(rsp, ea, VREG_B(dest, i));
+ ea++;
+ }
#endif
}
static void cfunc_rsp_sqv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 111010 | BBBBB | TTTTT | 00100 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores up to 16 bytes starting from vector byte index until 16-byte boundary
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
- int end = index + (16 - (ea & 0xf));
- for (int i=index; i < end; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 111010 | BBBBB | TTTTT | 00100 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores up to 16 bytes starting from vector byte index until 16-byte boundary
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
+ int end = index + (16 - (ea & 0xf));
+ for (int i=index; i < end; i++)
+ {
#if USE_SIMD
- UINT16 value;
- SIMD_EXTRACT16(rsp->xv[dest], value, (i >> 1));
- value >>= (1-(i & 1)) * 8;
- WRITE8(rsp, ea, (UINT8)value);
+ UINT16 value;
+ SIMD_EXTRACT16(rsp->xv[dest], value, (i >> 1));
+ value >>= (1-(i & 1)) * 8;
+ WRITE8(rsp, ea, (UINT8)value);
#else
- WRITE8(rsp, ea, VREG_B(dest, i & 0xf));
+ WRITE8(rsp, ea, VREG_B(dest, i & 0xf));
#endif
- ea++;
- }
+ ea++;
+ }
}
static void cfunc_rsp_srv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 111010 | BBBBB | TTTTT | 00101 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores up to 16 bytes starting from right side until 16-byte boundary
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
-
- int end = index + (ea & 0xf);
- int o = (16 - (ea & 0xf)) & 0xf;
- ea &= ~0xf;
-
- for (int i = index; i < end; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 111010 | BBBBB | TTTTT | 00101 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores up to 16 bytes starting from right side until 16-byte boundary
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
+
+ int end = index + (ea & 0xf);
+ int o = (16 - (ea & 0xf)) & 0xf;
+ ea &= ~0xf;
+
+ for (int i = index; i < end; i++)
+ {
#if USE_SIMD
- UINT32 bi = (i + o) & 0xf;
- UINT16 value;
- SIMD_EXTRACT16(rsp->xv[dest], value, (bi >> 1));
- value >>= (1-(bi & 1)) * 8;
- WRITE8(rsp, ea, (UINT8)value);
+ UINT32 bi = (i + o) & 0xf;
+ UINT16 value;
+ SIMD_EXTRACT16(rsp->xv[dest], value, (bi >> 1));
+ value >>= (1-(bi & 1)) * 8;
+ WRITE8(rsp, ea, (UINT8)value);
#else
- WRITE8(rsp, ea, VREG_B(dest, ((i + o) & 0xf)));
+ WRITE8(rsp, ea, VREG_B(dest, ((i + o) & 0xf)));
#endif
- ea++;
- }
+ ea++;
+ }
}
static void cfunc_rsp_spv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 111010 | BBBBB | TTTTT | 00110 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores upper 8 bits of each element
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
- int end = index + 8;
- for (int i=index; i < end; i++)
- {
- if ((i & 0xf) < 8)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 111010 | BBBBB | TTTTT | 00110 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores upper 8 bits of each element
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
+ int end = index + 8;
+ for (int i=index; i < end; i++)
+ {
+ if ((i & 0xf) < 8)
+ {
#if USE_SIMD
- UINT16 value;
- SIMD_EXTRACT16(rsp->xv[dest], value, i);
- WRITE8(rsp, ea, (UINT8)(value >> 8));
+ UINT16 value;
+ SIMD_EXTRACT16(rsp->xv[dest], value, i);
+ WRITE8(rsp, ea, (UINT8)(value >> 8));
#else
- WRITE8(rsp, ea, VREG_B(dest, (i & 0xf) << 1));
+ WRITE8(rsp, ea, VREG_B(dest, (i & 0xf) << 1));
#endif
- }
- else
- {
+ }
+ else
+ {
#if USE_SIMD
- UINT16 value;
- SIMD_EXTRACT16(rsp->xv[dest], value, i);
- value >>= 7;
- WRITE8(rsp, ea, (UINT8)value);
+ UINT16 value;
+ SIMD_EXTRACT16(rsp->xv[dest], value, i);
+ value >>= 7;
+ WRITE8(rsp, ea, (UINT8)value);
#else
- WRITE8(rsp, ea, VREG_S(dest, (i & 0x7)) >> 7);
+ WRITE8(rsp, ea, VREG_S(dest, (i & 0x7)) >> 7);
#endif
- }
- ea++;
- }
+ }
+ ea++;
+ }
}
static void cfunc_rsp_suv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 111010 | BBBBB | TTTTT | 00111 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores bits 14-7 of each element
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
- int end = index + 8;
- for (int i=index; i < end; i++)
- {
- if ((i & 0xf) < 8)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 111010 | BBBBB | TTTTT | 00111 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores bits 14-7 of each element
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 8) : (offset * 8);
+ int end = index + 8;
+ for (int i=index; i < end; i++)
+ {
+ if ((i & 0xf) < 8)
+ {
#if USE_SIMD
- UINT16 value;
- SIMD_EXTRACT16(rsp->xv[dest], value, i);
- value >>= 7;
- WRITE8(rsp, ea, (UINT8)value);
+ UINT16 value;
+ SIMD_EXTRACT16(rsp->xv[dest], value, i);
+ value >>= 7;
+ WRITE8(rsp, ea, (UINT8)value);
#else
- WRITE8(rsp, ea, VREG_S(dest, (i & 0x7)) >> 7);
+ WRITE8(rsp, ea, VREG_S(dest, (i & 0x7)) >> 7);
#endif
- }
- else
- {
+ }
+ else
+ {
#if USE_SIMD
- UINT16 value;
- SIMD_EXTRACT16(rsp->xv[dest], value, i);
- WRITE8(rsp, ea, (UINT8)value >> 8);
+ UINT16 value;
+ SIMD_EXTRACT16(rsp->xv[dest], value, i);
+ WRITE8(rsp, ea, (UINT8)value >> 8);
#else
- WRITE8(rsp, ea, VREG_B(dest, ((i & 0x7) << 1)));
+ WRITE8(rsp, ea, VREG_B(dest, ((i & 0x7) << 1)));
#endif
- }
- ea++;
- }
+ }
+ ea++;
+ }
}
static void cfunc_rsp_shv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 111010 | BBBBB | TTTTT | 01000 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores bits 14-7 of each element, with 2-byte stride
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
- for (int i=0; i < 8; i++)
- {
- int element = index + (i << 1);
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 111010 | BBBBB | TTTTT | 01000 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores bits 14-7 of each element, with 2-byte stride
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
+ for (int i=0; i < 8; i++)
+ {
+ int element = index + (i << 1);
#if USE_SIMD
- UINT16 value;
- SIMD_EXTRACT16(rsp->xv[dest], value, element >> 1);
- WRITE8(rsp, ea, (value >> 7) & 0x00ff);
+ UINT16 value;
+ SIMD_EXTRACT16(rsp->xv[dest], value, element >> 1);
+ WRITE8(rsp, ea, (value >> 7) & 0x00ff);
#else
- UINT8 d = (VREG_B(dest, (element & 0xf)) << 1) |
- (VREG_B(dest, ((element + 1) & 0xf)) >> 7);
- WRITE8(rsp, ea, d);
+ UINT8 d = (VREG_B(dest, (element & 0xf)) << 1) |
+ (VREG_B(dest, ((element + 1) & 0xf)) >> 7);
+ WRITE8(rsp, ea, d);
#endif
- ea += 2;
- }
+ ea += 2;
+ }
}
static void cfunc_rsp_sfv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 111010 | BBBBB | TTTTT | 01001 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores bits 14-7 of upper or lower quad, with 4-byte stride
-
- if (index & 0x7) printf("RSP: SFV: index = %d at %08X\n", index, rsp->ppc);
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
- int eaoffset = ea & 0xf;
- ea &= ~0xf;
-
- int end = (index >> 1) + 4;
-
- for (int i = index>>1; i < end; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 111010 | BBBBB | TTTTT | 01001 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores bits 14-7 of upper or lower quad, with 4-byte stride
+
+ if (index & 0x7) printf("RSP: SFV: index = %d at %08X\n", index, rsp->ppc);
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
+ int eaoffset = ea & 0xf;
+ ea &= ~0xf;
+
+ int end = (index >> 1) + 4;
+
+ for (int i = index>>1; i < end; i++)
+ {
#if USE_SIMD
- UINT16 value;
- SIMD_EXTRACT16(rsp->xv[dest], value, i);
- WRITE8(rsp, ea + (eaoffset & 0xf), (value >> 7) & 0x00ff);
+ UINT16 value;
+ SIMD_EXTRACT16(rsp->xv[dest], value, i);
+ WRITE8(rsp, ea + (eaoffset & 0xf), (value >> 7) & 0x00ff);
#else
- WRITE8(rsp, ea + (eaoffset & 0xf), VREG_S(dest, i) >> 7);
+ WRITE8(rsp, ea + (eaoffset & 0xf), VREG_S(dest, i) >> 7);
#endif
- eaoffset += 4;
- }
+ eaoffset += 4;
+ }
}
static void cfunc_rsp_swv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 111010 | BBBBB | TTTTT | 01010 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores the full 128-bit vector starting from vector byte index and wrapping to index 0
- // after byte index 15
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
- int eaoffset = ea & 0xf;
- ea &= ~0xf;
-
- int end = index + 16;
- for (int i = index; i < end; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 111010 | BBBBB | TTTTT | 01010 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores the full 128-bit vector starting from vector byte index and wrapping to index 0
+ // after byte index 15
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
+ int eaoffset = ea & 0xf;
+ ea &= ~0xf;
+
+ int end = index + 16;
+ for (int i = index; i < end; i++)
+ {
#if USE_SIMD
- UINT16 value;
- SIMD_EXTRACT16(rsp->xv[dest], value, i >> 1);
- WRITE8(rsp, ea + (eaoffset & 0xf), (value >> ((1-(i & 1)) * 8)) & 0xff);
+ UINT16 value;
+ SIMD_EXTRACT16(rsp->xv[dest], value, i >> 1);
+ WRITE8(rsp, ea + (eaoffset & 0xf), (value >> ((1-(i & 1)) * 8)) & 0xff);
#else
- WRITE8(rsp, ea + (eaoffset & 0xf), VREG_B(dest, i & 0xf));
+ WRITE8(rsp, ea + (eaoffset & 0xf), VREG_B(dest, i & 0xf));
#endif
- eaoffset++;
- }
+ eaoffset++;
+ }
}
static void cfunc_rsp_stv(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int dest = (op >> 16) & 0x1f;
- int base = (op >> 21) & 0x1f;
- int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
-
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
- // 31 25 20 15 10 6 0
- // --------------------------------------------------
- // | 111010 | BBBBB | TTTTT | 01011 | IIII | Offset |
- // --------------------------------------------------
- //
- // Stores one element from maximum of 8 vectors, while incrementing element index
-
- int vs = dest;
- int ve = dest + 8;
- if (ve > 32)
- {
- ve = 32;
- }
-
- int element = 8 - (index >> 1);
-
- UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
- int eaoffset = (ea & 0xf) + (element * 2);
- ea &= ~0xf;
-
- for (int i = vs; i < ve; i++)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int dest = (op >> 16) & 0x1f;
+ int base = (op >> 21) & 0x1f;
+ int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+ // 31 25 20 15 10 6 0
+ // --------------------------------------------------
+ // | 111010 | BBBBB | TTTTT | 01011 | IIII | Offset |
+ // --------------------------------------------------
+ //
+ // Stores one element from maximum of 8 vectors, while incrementing element index
+
+ int vs = dest;
+ int ve = dest + 8;
+ if (ve > 32)
+ {
+ ve = 32;
+ }
+
+ int element = 8 - (index >> 1);
+
+ UINT32 ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
+ int eaoffset = (ea & 0xf) + (element * 2);
+ ea &= ~0xf;
+
+ for (int i = vs; i < ve; i++)
+ {
#if USE_SIMD
- UINT16 value;
- SIMD_EXTRACT16(rsp->xv[dest], value, element);
- WRITE16(rsp, ea + (eaoffset & 0xf), value);
+ UINT16 value;
+ SIMD_EXTRACT16(rsp->xv[dest], value, element);
+ WRITE16(rsp, ea + (eaoffset & 0xf), value);
#else
- WRITE16(rsp, ea + (eaoffset & 0xf), VREG_S(i, element & 0x7));
+ WRITE16(rsp, ea + (eaoffset & 0xf), VREG_S(i, element & 0x7));
#endif
- eaoffset += 2;
- element++;
- }
+ eaoffset += 2;
+ element++;
+ }
}
static int generate_swc2(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
// int loopdest;
- UINT32 op = desc->opptr.l[0];
- //int dest = (op >> 16) & 0x1f;
- //int base = (op >> 21) & 0x1f;
- //int index = (op >> 7) & 0xf;
- int offset = (op & 0x7f);
- //int skip;
- if (offset & 0x40)
- {
- offset |= 0xffffffc0;
- }
-
- switch ((op >> 11) & 0x1f)
- {
- case 0x00: /* SBV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_sbv, rsp);
- return TRUE;
- case 0x01: /* SSV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_ssv, rsp);
- return TRUE;
- case 0x02: /* SLV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_slv, rsp);
- return TRUE;
- case 0x03: /* SDV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_sdv, rsp);
- return TRUE;
- case 0x04: /* SQV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_sqv, rsp);
- return TRUE;
- case 0x05: /* SRV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_srv, rsp);
- return TRUE;
- case 0x06: /* SPV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_spv, rsp);
- return TRUE;
- case 0x07: /* SUV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_suv, rsp);
- return TRUE;
- case 0x08: /* SHV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_shv, rsp);
- return TRUE;
- case 0x09: /* SFV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_sfv, rsp);
- return TRUE;
- case 0x0a: /* SWV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_swv, rsp);
- return TRUE;
- case 0x0b: /* STV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_rsp_stv, rsp);
- return TRUE;
-
- default:
- unimplemented_opcode(rsp, op);
- return FALSE;
- }
-
- return TRUE;
+ UINT32 op = desc->opptr.l[0];
+ //int dest = (op >> 16) & 0x1f;
+ //int base = (op >> 21) & 0x1f;
+ //int index = (op >> 7) & 0xf;
+ int offset = (op & 0x7f);
+ //int skip;
+ if (offset & 0x40)
+ {
+ offset |= 0xffffffc0;
+ }
+
+ switch ((op >> 11) & 0x1f)
+ {
+ case 0x00: /* SBV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_sbv, rsp);
+ return TRUE;
+ case 0x01: /* SSV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_ssv, rsp);
+ return TRUE;
+ case 0x02: /* SLV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_slv, rsp);
+ return TRUE;
+ case 0x03: /* SDV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_sdv, rsp);
+ return TRUE;
+ case 0x04: /* SQV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_sqv, rsp);
+ return TRUE;
+ case 0x05: /* SRV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_srv, rsp);
+ return TRUE;
+ case 0x06: /* SPV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_spv, rsp);
+ return TRUE;
+ case 0x07: /* SUV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_suv, rsp);
+ return TRUE;
+ case 0x08: /* SHV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_shv, rsp);
+ return TRUE;
+ case 0x09: /* SFV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_sfv, rsp);
+ return TRUE;
+ case 0x0a: /* SWV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_swv, rsp);
+ return TRUE;
+ case 0x0b: /* STV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_rsp_stv, rsp);
+ return TRUE;
+
+ default:
+ unimplemented_opcode(rsp, op);
+ return FALSE;
+ }
+
+ return TRUE;
}
INLINE UINT16 SATURATE_ACCUM(rsp_state *rsp, int accum, int slice, UINT16 negative, UINT16 positive)
{
- if ((INT16)ACCUM_H(rsp, accum) < 0)
- {
- if ((UINT16)(ACCUM_H(rsp, accum)) != 0xffff)
- {
- return negative;
- }
- else
- {
- if ((INT16)ACCUM_M(rsp, accum) >= 0)
- {
- return negative;
- }
- else
- {
- if (slice == 0)
- {
- return ACCUM_L(rsp, accum);
- }
- else if (slice == 1)
- {
- return ACCUM_M(rsp, accum);
- }
- }
- }
- }
- else
- {
- if ((UINT16)(ACCUM_H(rsp, accum)) != 0)
- {
- return positive;
- }
- else
- {
- if ((INT16)ACCUM_M(rsp, accum) < 0)
- {
- return positive;
- }
- else
- {
- if (slice == 0)
- {
- return ACCUM_L(rsp, accum);
- }
- else
- {
- return ACCUM_M(rsp, accum);
- }
- }
- }
- }
-
- return 0;
+ if ((INT16)ACCUM_H(rsp, accum) < 0)
+ {
+ if ((UINT16)(ACCUM_H(rsp, accum)) != 0xffff)
+ {
+ return negative;
+ }
+ else
+ {
+ if ((INT16)ACCUM_M(rsp, accum) >= 0)
+ {
+ return negative;
+ }
+ else
+ {
+ if (slice == 0)
+ {
+ return ACCUM_L(rsp, accum);
+ }
+ else if (slice == 1)
+ {
+ return ACCUM_M(rsp, accum);
+ }
+ }
+ }
+ }
+ else
+ {
+ if ((UINT16)(ACCUM_H(rsp, accum)) != 0)
+ {
+ return positive;
+ }
+ else
+ {
+ if ((INT16)ACCUM_M(rsp, accum) < 0)
+ {
+ return positive;
+ }
+ else
+ {
+ if (slice == 0)
+ {
+ return ACCUM_L(rsp, accum);
+ }
+ else
+ {
+ return ACCUM_M(rsp, accum);
+ }
+ }
+ }
+ }
+
+ return 0;
}
#if USE_SIMD
__m128i SATURATE_ACCUM1(__m128i accum_h, __m128i accum_m, UINT16 negative, UINT16 positive)
{
- __m128i vnegative = _mm_set_epi16(negative, negative, negative, negative, negative, negative, negative, negative);
- __m128i vpositive = _mm_set_epi16(positive, positive, positive, positive, positive, positive, positive, positive);
+ __m128i vnegative = _mm_set_epi16(negative, negative, negative, negative, negative, negative, negative, negative);
+ __m128i vpositive = _mm_set_epi16(positive, positive, positive, positive, positive, positive, positive, positive);
- // conditional masks
- __m128i accum_hlz = _mm_cmplt_epi16(accum_h, _mm_setzero_si128());
- __m128i accum_hgz = _mm_cmpgt_epi16(accum_h, _mm_setzero_si128());
- __m128i accum_hz = _mm_cmpeq_epi16(accum_h, _mm_setzero_si128());
- __m128i accum_hn1 = _mm_cmpeq_epi16(accum_h, vec_neg1);
- __m128i accum_hnn1 = _mm_xor_si128(accum_hn1, vec_neg1);
+ // conditional masks
+ __m128i accum_hlz = _mm_cmplt_epi16(accum_h, _mm_setzero_si128());
+ __m128i accum_hgz = _mm_cmpgt_epi16(accum_h, _mm_setzero_si128());
+ __m128i accum_hz = _mm_cmpeq_epi16(accum_h, _mm_setzero_si128());
+ __m128i accum_hn1 = _mm_cmpeq_epi16(accum_h, vec_neg1);
+ __m128i accum_hnn1 = _mm_xor_si128(accum_hn1, vec_neg1);
- __m128i accum_mlz = _mm_cmplt_epi16(accum_m, _mm_setzero_si128());
- __m128i accum_mgz = _mm_cmpgt_epi16(accum_m, _mm_setzero_si128());
- __m128i accum_mz = _mm_cmpeq_epi16(accum_m, _mm_setzero_si128());
- __m128i accum_mgez = _mm_or_si128(accum_mz, accum_mgz);
+ __m128i accum_mlz = _mm_cmplt_epi16(accum_m, _mm_setzero_si128());
+ __m128i accum_mgz = _mm_cmpgt_epi16(accum_m, _mm_setzero_si128());
+ __m128i accum_mz = _mm_cmpeq_epi16(accum_m, _mm_setzero_si128());
+ __m128i accum_mgez = _mm_or_si128(accum_mz, accum_mgz);
- // Return negative if H<0 && (H!=0xffff || M >= 0)
- // Return positive if H>0 || (H==0 && M<0)
- // Return medium slice if H==0xffff && M<0
- // Return medium slice if H==0 && M>=0
+ // Return negative if H<0 && (H!=0xffff || M >= 0)
+ // Return positive if H>0 || (H==0 && M<0)
+ // Return medium slice if H==0xffff && M<0
+ // Return medium slice if H==0 && M>=0
- __m128i negative_mask = _mm_and_si128(accum_hlz, _mm_or_si128(accum_hnn1, accum_mgez));
- __m128i positive_mask = _mm_or_si128(accum_hgz, _mm_and_si128(accum_hz, accum_mlz));
- __m128i accumm_mask = _mm_or_si128(_mm_and_si128(accum_hz, accum_mgez), _mm_and_si128(accum_hn1, accum_mlz));
+ __m128i negative_mask = _mm_and_si128(accum_hlz, _mm_or_si128(accum_hnn1, accum_mgez));
+ __m128i positive_mask = _mm_or_si128(accum_hgz, _mm_and_si128(accum_hz, accum_mlz));
+ __m128i accumm_mask = _mm_or_si128(_mm_and_si128(accum_hz, accum_mgez), _mm_and_si128(accum_hn1, accum_mlz));
- __m128i output = _mm_and_si128(accum_m, accumm_mask);
- output = _mm_or_si128(output, _mm_and_si128(vnegative, negative_mask));
- output = _mm_or_si128(output, _mm_and_si128(vpositive, positive_mask));
- return output;
+ __m128i output = _mm_and_si128(accum_m, accumm_mask);
+ output = _mm_or_si128(output, _mm_and_si128(vnegative, negative_mask));
+ output = _mm_or_si128(output, _mm_and_si128(vpositive, positive_mask));
+ return output;
}
#endif
INLINE UINT16 SATURATE_ACCUM1(rsp_state *rsp, int accum, UINT16 negative, UINT16 positive)
{
- // Return negative if H<0 && (H!=0xffff || M >= 0)
- // Return positive if H>0 || (H==0 && M<0)
- // Return medium slice if H==0xffff && M<0
- // Return medium slice if H==0 && M>=0
- if ((INT16)ACCUM_H(rsp, accum) < 0)
- {
- if ((UINT16)(ACCUM_H(rsp, accum)) != 0xffff)
- {
- return negative;
- }
- else
- {
- if ((INT16)ACCUM_M(rsp, accum) >= 0)
- {
- return negative;
- }
- else
- {
- return ACCUM_M(rsp, accum);
- }
- }
- }
- else
- {
- if ((UINT16)(ACCUM_H(rsp, accum)) != 0)
- {
- return positive;
- }
- else
- {
- if ((INT16)ACCUM_M(rsp, accum) < 0)
- {
- return positive;
- }
- else
- {
- return ACCUM_M(rsp, accum);
- }
- }
- }
-
- return 0;
+ // Return negative if H<0 && (H!=0xffff || M >= 0)
+ // Return positive if H>0 || (H==0 && M<0)
+ // Return medium slice if H==0xffff && M<0
+ // Return medium slice if H==0 && M>=0
+ if ((INT16)ACCUM_H(rsp, accum) < 0)
+ {
+ if ((UINT16)(ACCUM_H(rsp, accum)) != 0xffff)
+ {
+ return negative;
+ }
+ else
+ {
+ if ((INT16)ACCUM_M(rsp, accum) >= 0)
+ {
+ return negative;
+ }
+ else
+ {
+ return ACCUM_M(rsp, accum);
+ }
+ }
+ }
+ else
+ {
+ if ((UINT16)(ACCUM_H(rsp, accum)) != 0)
+ {
+ return positive;
+ }
+ else
+ {
+ if ((INT16)ACCUM_M(rsp, accum) < 0)
+ {
+ return positive;
+ }
+ else
+ {
+ return ACCUM_M(rsp, accum);
+ }
+ }
+ }
+
+ return 0;
}
INLINE UINT16 C_SATURATE_ACCUM1(UINT16 *h, UINT16 *m, int accum, UINT16 negative, UINT16 positive)
{
- // Return negative if H<0 && (H!=0xffff || M >= 0)
- // Return positive if H>0 || (H==0 && M<0)
- // Return medium slice if H==0xffff && M<0
- // Return medium slice if H==0 && M>=0
- if ((INT16)h[accum] < 0)
- {
- if ((UINT16)h[accum] != 0xffff)
- {
- return negative;
- }
- else
- {
- if ((INT16)m[accum] >= 0)
- {
- return negative;
- }
- else
- {
- return m[accum];
- }
- }
- }
- else
- {
- if ((UINT16)h[accum] != 0)
- {
- return positive;
- }
- else
- {
- if ((INT16)m[accum] < 0)
- {
- return positive;
- }
- else
- {
- return m[accum];
- }
- }
- }
-
- return 0;
+ // Return negative if H<0 && (H!=0xffff || M >= 0)
+ // Return positive if H>0 || (H==0 && M<0)
+ // Return medium slice if H==0xffff && M<0
+ // Return medium slice if H==0 && M>=0
+ if ((INT16)h[accum] < 0)
+ {
+ if ((UINT16)h[accum] != 0xffff)
+ {
+ return negative;
+ }
+ else
+ {
+ if ((INT16)m[accum] >= 0)
+ {
+ return negative;
+ }
+ else
+ {
+ return m[accum];
+ }
+ }
+ }
+ else
+ {
+ if ((UINT16)h[accum] != 0)
+ {
+ return positive;
+ }
+ else
+ {
+ if ((INT16)m[accum] < 0)
+ {
+ return positive;
+ }
+ else
+ {
+ return m[accum];
+ }
+ }
+ }
+
+ return 0;
}
#if USE_SIMD
#define WRITEBACK_RESULT() { \
- SIMD_INSERT16(rsp->xv[VDREG], vres[0], 0); \
- SIMD_INSERT16(rsp->xv[VDREG], vres[1], 1); \
- SIMD_INSERT16(rsp->xv[VDREG], vres[2], 2); \
- SIMD_INSERT16(rsp->xv[VDREG], vres[3], 3); \
- SIMD_INSERT16(rsp->xv[VDREG], vres[4], 4); \
- SIMD_INSERT16(rsp->xv[VDREG], vres[5], 5); \
- SIMD_INSERT16(rsp->xv[VDREG], vres[6], 6); \
- SIMD_INSERT16(rsp->xv[VDREG], vres[7], 7); \
+ SIMD_INSERT16(rsp->xv[VDREG], vres[0], 0); \
+ SIMD_INSERT16(rsp->xv[VDREG], vres[1], 1); \
+ SIMD_INSERT16(rsp->xv[VDREG], vres[2], 2); \
+ SIMD_INSERT16(rsp->xv[VDREG], vres[3], 3); \
+ SIMD_INSERT16(rsp->xv[VDREG], vres[4], 4); \
+ SIMD_INSERT16(rsp->xv[VDREG], vres[5], 5); \
+ SIMD_INSERT16(rsp->xv[VDREG], vres[6], 6); \
+ SIMD_INSERT16(rsp->xv[VDREG], vres[7], 7); \
}
#else
#define WRITEBACK_RESULT() { \
- W_VREG_S(VDREG, 0) = vres[0]; \
- W_VREG_S(VDREG, 1) = vres[1]; \
- W_VREG_S(VDREG, 2) = vres[2]; \
- W_VREG_S(VDREG, 3) = vres[3]; \
- W_VREG_S(VDREG, 4) = vres[4]; \
- W_VREG_S(VDREG, 5) = vres[5]; \
- W_VREG_S(VDREG, 6) = vres[6]; \
- W_VREG_S(VDREG, 7) = vres[7]; \
+ W_VREG_S(VDREG, 0) = vres[0]; \
+ W_VREG_S(VDREG, 1) = vres[1]; \
+ W_VREG_S(VDREG, 2) = vres[2]; \
+ W_VREG_S(VDREG, 3) = vres[3]; \
+ W_VREG_S(VDREG, 4) = vres[4]; \
+ W_VREG_S(VDREG, 5) = vres[5]; \
+ W_VREG_S(VDREG, 6) = vres[6]; \
+ W_VREG_S(VDREG, 7) = vres[7]; \
}
#endif
@@ -2276,101 +2276,101 @@ INLINE __m128i RSPClampLowToVal(__m128i vaccLow, __m128i vaccMid, __m128i vaccHi
#endif
INLINE void cfunc_rsp_vmulf(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
- //int i;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 000000 |
- // ------------------------------------------------------
- //
- // Multiplies signed integer by signed integer * 2
-
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 w1, w2;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
+ //int i;
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 000000 |
+ // ------------------------------------------------------
+ //
+ // Multiplies signed integer by signed integer * 2
+
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
-
- if (s1 == -32768 && s2 == -32768)
- {
- // overflow
- SET_ACCUM_H(0, i);
- SET_ACCUM_M(-32768, i);
- SET_ACCUM_L(-32768, i);
- vres[i] = 0x7fff;
- }
- else
- {
- INT64 r = s1 * s2 * 2;
- r += 0x8000; // rounding ?
- SET_ACCUM_H((r < 0) ? 0xffff : 0, i);
- SET_ACCUM_M((INT16)(r >> 16), i);
- SET_ACCUM_L((UINT16)(r), i);
- vres[i] = ACCUM_M(rsp, i);
- }
- }
- WRITEBACK_RESULT();
+ INT32 s1 = (INT32)(INT16)w1;
+ INT32 s2 = (INT32)(INT16)w2;
+
+ if (s1 == -32768 && s2 == -32768)
+ {
+ // overflow
+ SET_ACCUM_H(0, i);
+ SET_ACCUM_M(-32768, i);
+ SET_ACCUM_L(-32768, i);
+ vres[i] = 0x7fff;
+ }
+ else
+ {
+ INT64 r = s1 * s2 * 2;
+ r += 0x8000; // rounding ?
+ SET_ACCUM_H((r < 0) ? 0xffff : 0, i);
+ SET_ACCUM_M((INT16)(r >> 16), i);
+ SET_ACCUM_L((UINT16)(r), i);
+ vres[i] = ACCUM_M(rsp, i);
+ }
+ }
+ WRITEBACK_RESULT();
}
INLINE void cfunc_rsp_vmulu(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 000001 |
- // ------------------------------------------------------
- //
-
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 w1, w2;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 000001 |
+ // ------------------------------------------------------
+ //
+
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ INT32 s1 = (INT32)(INT16)w1;
+ INT32 s2 = (INT32)(INT16)w2;
- INT64 r = s1 * s2 * 2;
- r += 0x8000; // rounding ?
+ INT64 r = s1 * s2 * 2;
+ r += 0x8000; // rounding ?
SET_ACCUM_H((UINT16)(r >> 32), i);
SET_ACCUM_M((UINT16)(r >> 16), i);
SET_ACCUM_L((UINT16)(r), i);
- if (r < 0)
- {
- vres[i] = 0;
- }
- else if (((INT16)(ACCUM_H(rsp, i)) ^ (INT16)(ACCUM_M(rsp, i))) < 0)
- {
- vres[i] = -1;
- }
- else
- {
- vres[i] = ACCUM_M(rsp, i);
- }
- }
- WRITEBACK_RESULT();
+ if (r < 0)
+ {
+ vres[i] = 0;
+ }
+ else if (((INT16)(ACCUM_H(rsp, i)) ^ (INT16)(ACCUM_M(rsp, i))) < 0)
+ {
+ vres[i] = -1;
+ }
+ else
+ {
+ vres[i] = ACCUM_M(rsp, i);
+ }
+ }
+ WRITEBACK_RESULT();
}
INLINE void cfunc_rsp_vmudl(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 001101 |
- // ------------------------------------------------------
- //
- // Multiplies signed integer by unsigned fraction
- // The result is added into accumulator
- // The middle slice of accumulator is stored into destination element
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 001101 |
+ // ------------------------------------------------------
+ //
+ // Multiplies signed integer by unsigned fraction
+ // The result is added into accumulator
+ // The middle slice of accumulator is stored into destination element
#if USE_SIMD
@@ -2390,40 +2390,40 @@ INLINE void cfunc_rsp_vmudl(void *param)
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 w1, w2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- UINT32 s1 = (UINT32)(UINT16)w1;
- UINT32 s2 = (UINT32)(UINT16)w2;
+ UINT32 s1 = (UINT32)(UINT16)w1;
+ UINT32 s2 = (UINT32)(UINT16)w2;
- UINT32 r = s1 * s2;
+ UINT32 r = s1 * s2;
- SET_ACCUM_H(0, i);
- SET_ACCUM_M(0, i);
- SET_ACCUM_L((UINT16)(r >> 16), i);
+ SET_ACCUM_H(0, i);
+ SET_ACCUM_M(0, i);
+ SET_ACCUM_L((UINT16)(r >> 16), i);
- vres[i] = ACCUM_L(rsp, i);
- }
- WRITEBACK_RESULT();
+ vres[i] = ACCUM_L(rsp, i);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vmudm(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 000101 |
- // ------------------------------------------------------
- //
- // Multiplies signed integer by unsigned fraction
- // The result is stored into accumulator
- // The middle slice of accumulator is stored into destination element
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 000101 |
+ // ------------------------------------------------------
+ //
+ // Multiplies signed integer by unsigned fraction
+ // The result is stored into accumulator
+ // The middle slice of accumulator is stored into destination element
#if USE_SIMD
@@ -2448,40 +2448,40 @@ INLINE void cfunc_rsp_vmudm(void *param)
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 w1, w2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (UINT16)w2;
+ INT32 s1 = (INT32)(INT16)w1;
+ INT32 s2 = (UINT16)w2;
- INT32 r = s1 * s2;
+ INT32 r = s1 * s2;
- SET_ACCUM_H((r < 0) ? 0xffff : 0, i); // sign-extend to 48-bit
- SET_ACCUM_M((INT16)(r >> 16), i);
- SET_ACCUM_L((UINT16)r, i);
+ SET_ACCUM_H((r < 0) ? 0xffff : 0, i); // sign-extend to 48-bit
+ SET_ACCUM_M((INT16)(r >> 16), i);
+ SET_ACCUM_L((UINT16)r, i);
- vres[i] = ACCUM_M(rsp, i);
- }
- WRITEBACK_RESULT();
+ vres[i] = ACCUM_M(rsp, i);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vmudn(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 000110 |
- // ------------------------------------------------------
- //
- // Multiplies unsigned fraction by signed integer
- // The result is stored into accumulator
- // The low slice of accumulator is stored into destination element
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 000110 |
+ // ------------------------------------------------------
+ //
+ // Multiplies unsigned fraction by signed integer
+ // The result is stored into accumulator
+ // The low slice of accumulator is stored into destination element
#if USE_SIMD
@@ -2503,40 +2503,40 @@ INLINE void cfunc_rsp_vmudn(void *param)
#else
- INT16 vres[8] = { 0 };
- for (int i = 0; i < 8; i++)
- {
- UINT16 w1, w2;
+ INT16 vres[8] = { 0 };
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (UINT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ INT32 s1 = (UINT16)w1;
+ INT32 s2 = (INT32)(INT16)w2;
- INT32 r = s1 * s2;
+ INT32 r = s1 * s2;
- SET_ACCUM_H((r < 0) ? 0xffff : 0, i); // sign-extend to 48-bit
- SET_ACCUM_M((INT16)(r >> 16), i);
- SET_ACCUM_L((UINT16)(r), i);
+ SET_ACCUM_H((r < 0) ? 0xffff : 0, i); // sign-extend to 48-bit
+ SET_ACCUM_M((INT16)(r >> 16), i);
+ SET_ACCUM_L((UINT16)(r), i);
- vres[i] = (UINT16)(r);
- }
- WRITEBACK_RESULT();
+ vres[i] = (UINT16)(r);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vmudh(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 000111 |
- // ------------------------------------------------------
- //
- // Multiplies signed integer by signed integer
- // The result is stored into highest 32 bits of accumulator, the low slice is zero
- // The highest 32 bits of accumulator is saturated into destination element
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 000111 |
+ // ------------------------------------------------------
+ //
+ // Multiplies signed integer by signed integer
+ // The result is stored into highest 32 bits of accumulator, the low slice is zero
+ // The highest 32 bits of accumulator is saturated into destination element
#if USE_SIMD
@@ -2560,33 +2560,33 @@ INLINE void cfunc_rsp_vmudh(void *param)
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 w1, w2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ INT32 s1 = (INT32)(INT16)w1;
+ INT32 s2 = (INT32)(INT16)w2;
- INT32 r = s1 * s2;
+ INT32 r = s1 * s2;
- SET_ACCUM_H((INT16)(r >> 16), i);
- SET_ACCUM_M((UINT16)(r), i);
- SET_ACCUM_L(0, i);
+ SET_ACCUM_H((INT16)(r >> 16), i);
+ SET_ACCUM_M((UINT16)(r), i);
+ SET_ACCUM_L(0, i);
- if (r < -32768) r = -32768;
- if (r > 32767) r = 32767;
- vres[i] = (INT16)(r);
- }
- WRITEBACK_RESULT();
+ if (r < -32768) r = -32768;
+ if (r > 32767) r = 32767;
+ vres[i] = (INT16)(r);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vmacf(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
#if USE_SIMD
@@ -2643,45 +2643,45 @@ INLINE void cfunc_rsp_vmacf(void *param)
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 w1, w2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ INT32 s1 = (INT32)(INT16)w1;
+ INT32 s2 = (INT32)(INT16)w2;
- INT32 r = s1 * s2;
+ INT32 r = s1 * s2;
- UINT64 q = ACCUM(i) & 0x000000000000ffffL;
- q |= (((UINT64)(UINT16)ACCUM_L(rsp, i)) << 16);
- q |= (((UINT64)(UINT16)ACCUM_M(rsp, i)) << 32);
- q |= (((UINT64)(UINT16)ACCUM_H(rsp, i)) << 48);
+ UINT64 q = ACCUM(i) & 0x000000000000ffffL;
+ q |= (((UINT64)(UINT16)ACCUM_L(rsp, i)) << 16);
+ q |= (((UINT64)(UINT16)ACCUM_M(rsp, i)) << 32);
+ q |= (((UINT64)(UINT16)ACCUM_H(rsp, i)) << 48);
- q += (INT64)(r) << 17;
- ACCUM(i) = q & 0x000000000000ffffL;
+ q += (INT64)(r) << 17;
+ ACCUM(i) = q & 0x000000000000ffffL;
- SET_ACCUM_L((UINT16)(q >> 16), i);
- SET_ACCUM_M((UINT16)(q >> 32), i);
- SET_ACCUM_H((UINT16)(q >> 48), i);
+ SET_ACCUM_L((UINT16)(q >> 16), i);
+ SET_ACCUM_M((UINT16)(q >> 32), i);
+ SET_ACCUM_H((UINT16)(q >> 48), i);
- vres[i] = SATURATE_ACCUM(rsp, i, 1, 0x8000, 0x7fff);
- }
- WRITEBACK_RESULT();
+ vres[i] = SATURATE_ACCUM(rsp, i, 1, 0x8000, 0x7fff);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vmacu(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 001001 |
- // ------------------------------------------------------
- //
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 001001 |
+ // ------------------------------------------------------
+ //
#if USE_SIMD
@@ -2690,7 +2690,7 @@ INLINE void cfunc_rsp_vmacu(void *param)
__m128i vdReg, vdRegLo, vdRegHi;
__m128i vsReg = rsp->xv[VS1REG];
- __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
__m128i vaccLow = rsp->accum_l;
@@ -2736,64 +2736,64 @@ INLINE void cfunc_rsp_vmacu(void *param)
rsp->accum_h = RSPPackHi32to16(vaccLow, vaccHigh);
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 w1, w2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
-
- INT32 r1 = s1 * s2;
- UINT32 r2 = (UINT16)ACCUM_L(rsp, i) + ((UINT16)(r1) * 2);
- UINT32 r3 = (UINT16)ACCUM_M(rsp, i) + (UINT16)((r1 >> 16) * 2) + (UINT16)(r2 >> 16);
-
- SET_ACCUM_L((UINT16)(r2), i);
- SET_ACCUM_M((UINT16)(r3), i);
- SET_ACCUM_H(ACCUM_H(rsp, i) + (UINT16)(r3 >> 16) + (UINT16)(r1 >> 31), i);
-
- //res = SATURATE_ACCUM(i, 1, 0x0000, 0xffff);
- if ((INT16)ACCUM_H(rsp, i) < 0)
- {
- vres[i] = 0;
- }
- else
- {
- if (ACCUM_H(rsp, i) != 0)
- {
- vres[i] = (INT16)0xffff;
- }
- else
- {
- if ((INT16)ACCUM_M(rsp, i) < 0)
- {
- vres[i] = (INT16)0xffff;
- }
- else
- {
- vres[i] = ACCUM_M(rsp, i);
- }
- }
- }
- }
- WRITEBACK_RESULT();
+ INT32 s1 = (INT32)(INT16)w1;
+ INT32 s2 = (INT32)(INT16)w2;
+
+ INT32 r1 = s1 * s2;
+ UINT32 r2 = (UINT16)ACCUM_L(rsp, i) + ((UINT16)(r1) * 2);
+ UINT32 r3 = (UINT16)ACCUM_M(rsp, i) + (UINT16)((r1 >> 16) * 2) + (UINT16)(r2 >> 16);
+
+ SET_ACCUM_L((UINT16)(r2), i);
+ SET_ACCUM_M((UINT16)(r3), i);
+ SET_ACCUM_H(ACCUM_H(rsp, i) + (UINT16)(r3 >> 16) + (UINT16)(r1 >> 31), i);
+
+ //res = SATURATE_ACCUM(i, 1, 0x0000, 0xffff);
+ if ((INT16)ACCUM_H(rsp, i) < 0)
+ {
+ vres[i] = 0;
+ }
+ else
+ {
+ if (ACCUM_H(rsp, i) != 0)
+ {
+ vres[i] = (INT16)0xffff;
+ }
+ else
+ {
+ if ((INT16)ACCUM_M(rsp, i) < 0)
+ {
+ vres[i] = (INT16)0xffff;
+ }
+ else
+ {
+ vres[i] = ACCUM_M(rsp, i);
+ }
+ }
+ }
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vmadl(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 001100 |
- // ------------------------------------------------------
- //
- // Multiplies unsigned fraction by unsigned fraction
- // Adds the higher 16 bits of the 32-bit result to accumulator
- // The low slice of accumulator is stored into destination element
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 001100 |
+ // ------------------------------------------------------
+ //
+ // Multiplies unsigned fraction by unsigned fraction
+ // Adds the higher 16 bits of the 32-bit result to accumulator
+ // The low slice of accumulator is stored into destination element
#if USE_SIMD
@@ -2802,7 +2802,7 @@ INLINE void cfunc_rsp_vmadl(void *param)
__m128i vdReg, vdRegLo, vdRegHi;
__m128i vsReg = rsp->xv[VS1REG];
- __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
__m128i vaccLow = rsp->accum_l;
@@ -2833,40 +2833,40 @@ INLINE void cfunc_rsp_vmadl(void *param)
rsp->xv[VDREG] = RSPClampLowToVal(vdReg, rsp->accum_m, rsp->accum_h);
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 w1, w2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- UINT32 s1 = w1;
- UINT32 s2 = w2;
+ UINT32 s1 = w1;
+ UINT32 s2 = w2;
- UINT32 r1 = s1 * s2;
- UINT32 r2 = (UINT16)ACCUM_L(rsp, i) + (r1 >> 16);
+ UINT32 r1 = s1 * s2;
+ UINT32 r2 = (UINT16)ACCUM_L(rsp, i) + (r1 >> 16);
UINT32 r3 = (UINT16)ACCUM_M(rsp, i) + (r2 >> 16);
- SET_ACCUM_L((UINT16)r2, i);
- SET_ACCUM_M((UINT16)r3, i);
- SET_ACCUM_H(ACCUM_H(rsp, i) + (INT16)(r3 >> 16), i);
+ SET_ACCUM_L((UINT16)r2, i);
+ SET_ACCUM_M((UINT16)r3, i);
+ SET_ACCUM_H(ACCUM_H(rsp, i) + (INT16)(r3 >> 16), i);
- vres[i] = SATURATE_ACCUM(rsp, i, 0, 0x0000, 0xffff);
- }
- WRITEBACK_RESULT();
+ vres[i] = SATURATE_ACCUM(rsp, i, 0, 0x0000, 0xffff);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vmadm(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
#if USE_SIMD
__m128i vaccLow, vaccHigh, loProduct, hiProduct;
__m128i vsRegLo, vsRegHi, vtRegLo, vtRegHi, vdRegLo, vdRegHi;
__m128i vsReg = rsp->xv[VS1REG];
- __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
/* Unpack to obtain for 32-bit precision. */
RSPSignExtend16to32(vsReg, &vsRegLo, &vsRegHi);
@@ -2908,50 +2908,50 @@ INLINE void cfunc_rsp_vmadm(void *param)
rsp->accum_h = RSPPackHi32to16(vaccLow, vaccHigh);
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 w1, w2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- UINT32 s1 = (INT32)(INT16)w1;
- UINT32 s2 = (UINT16)w2;
-
- UINT32 r1 = s1 * s2;
- UINT32 r2 = (UINT16)ACCUM_L(rsp, i) + (UINT16)(r1);
- UINT32 r3 = (UINT16)ACCUM_M(rsp, i) + (r1 >> 16) + (r2 >> 16);
-
- SET_ACCUM_L((UINT16)r2, i);
- SET_ACCUM_M((UINT16)r3, i);
- SET_ACCUM_H((UINT16)ACCUM_H(rsp, i) + (UINT16)(r3 >> 16), i);
- if ((INT32)(r1) < 0)
- {
+ UINT32 s1 = (INT32)(INT16)w1;
+ UINT32 s2 = (UINT16)w2;
+
+ UINT32 r1 = s1 * s2;
+ UINT32 r2 = (UINT16)ACCUM_L(rsp, i) + (UINT16)(r1);
+ UINT32 r3 = (UINT16)ACCUM_M(rsp, i) + (r1 >> 16) + (r2 >> 16);
+
+ SET_ACCUM_L((UINT16)r2, i);
+ SET_ACCUM_M((UINT16)r3, i);
+ SET_ACCUM_H((UINT16)ACCUM_H(rsp, i) + (UINT16)(r3 >> 16), i);
+ if ((INT32)(r1) < 0)
+ {
SET_ACCUM_H((UINT16)ACCUM_H(rsp, i) - 1, i);
}
- vres[i] = SATURATE_ACCUM(rsp, i, 1, 0x8000, 0x7fff);
- }
- WRITEBACK_RESULT();
+ vres[i] = SATURATE_ACCUM(rsp, i, 1, 0x8000, 0x7fff);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vmadn(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
#if USE_SIMD
__m128i vaccLow, vaccHigh, loProduct, hiProduct;
__m128i vsRegLo, vsRegHi, vtRegLo, vtRegHi, vdRegLo, vdRegHi;
__m128i vsReg = rsp->xv[VS1REG];
- __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- vaccLow = rsp->accum_l;
+ vaccLow = rsp->accum_l;
- RSPZeroExtend16to32(vsReg, &vsRegLo, &vsRegHi);
- RSPSignExtend16to32(vtReg, &vtRegLo, &vtRegHi);
- RSPZeroExtend16to32(vaccLow, &vaccLow, &vaccHigh);
+ RSPZeroExtend16to32(vsReg, &vsRegLo, &vsRegHi);
+ RSPSignExtend16to32(vtReg, &vtRegLo, &vtRegHi);
+ RSPZeroExtend16to32(vaccLow, &vaccLow, &vaccHigh);
/* Begin accumulating the products. */
loProduct = _mm_mullo_epi32(vsRegLo, vtRegLo);
@@ -2988,50 +2988,50 @@ INLINE void cfunc_rsp_vmadn(void *param)
rsp->accum_h = RSPPackHi32to16(vaccLow, vaccHigh);
rsp->xv[VDREG] = RSPClampLowToVal(rsp->accum_l, rsp->accum_m, rsp->accum_h);
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 w1, w2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (UINT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
-
- UINT64 q = (UINT64)ACCUM(i) & 0x000000000000ffffL;
- q |= (((UINT64)ACCUM_L(rsp, i)) << 16);
- q |= (((UINT64)ACCUM_M(rsp, i)) << 32);
- q |= (((UINT64)ACCUM_H(rsp, i)) << 48);
- q += (INT64)(s1*s2) << 16;
-
- ACCUM(i) = q & 0x000000000000ffffL;
- SET_ACCUM_L((UINT16)(q >> 16), i);
- SET_ACCUM_M((UINT16)(q >> 32), i);
- SET_ACCUM_H((UINT16)(q >> 48), i);
-
- vres[i] = SATURATE_ACCUM(rsp, i, 0, 0x0000, 0xffff);
- }
- WRITEBACK_RESULT();
+ INT32 s1 = (UINT16)w1;
+ INT32 s2 = (INT32)(INT16)w2;
+
+ UINT64 q = (UINT64)ACCUM(i) & 0x000000000000ffffL;
+ q |= (((UINT64)ACCUM_L(rsp, i)) << 16);
+ q |= (((UINT64)ACCUM_M(rsp, i)) << 32);
+ q |= (((UINT64)ACCUM_H(rsp, i)) << 48);
+ q += (INT64)(s1*s2) << 16;
+
+ ACCUM(i) = q & 0x000000000000ffffL;
+ SET_ACCUM_L((UINT16)(q >> 16), i);
+ SET_ACCUM_M((UINT16)(q >> 32), i);
+ SET_ACCUM_H((UINT16)(q >> 48), i);
+
+ vres[i] = SATURATE_ACCUM(rsp, i, 0, 0x0000, 0xffff);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vmadh(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 001111 |
- // ------------------------------------------------------
- //
- // Multiplies signed integer by signed integer
- // The result is added into highest 32 bits of accumulator, the low slice is zero
- // The highest 32 bits of accumulator is saturated into destination element
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 001111 |
+ // ------------------------------------------------------
+ //
+ // Multiplies signed integer by signed integer
+ // The result is added into highest 32 bits of accumulator, the low slice is zero
+ // The highest 32 bits of accumulator is saturated into destination element
#if USE_SIMD
__m128i vsReg = rsp->xv[VS1REG];
- __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
/* Unpack to obtain for 32-bit precision. */
__m128i vaccLow = _mm_unpacklo_epi16(rsp->accum_m, rsp->accum_h);
@@ -3051,378 +3051,378 @@ INLINE void cfunc_rsp_vmadh(void *param)
rsp->accum_h = RSPPackHi32to16(vaccLow, vaccHigh);
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- INT16 w1, w2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ INT32 s1 = (INT32)(INT16)w1;
+ INT32 s2 = (INT32)(INT16)w2;
- INT32 accum = (UINT32)(UINT16)ACCUM_M(rsp, i);
- accum |= ((UINT32)((UINT16)ACCUM_H(rsp, i))) << 16;
- accum += s1*s2;
+ INT32 accum = (UINT32)(UINT16)ACCUM_M(rsp, i);
+ accum |= ((UINT32)((UINT16)ACCUM_H(rsp, i))) << 16;
+ accum += s1*s2;
- SET_ACCUM_H((UINT16)(accum >> 16), i);
- SET_ACCUM_M((UINT16)accum, i);
+ SET_ACCUM_H((UINT16)(accum >> 16), i);
+ SET_ACCUM_M((UINT16)accum, i);
- vres[i] = SATURATE_ACCUM1(rsp, i, 0x8000, 0x7fff);
- }
- WRITEBACK_RESULT();
+ vres[i] = SATURATE_ACCUM1(rsp, i, 0x8000, 0x7fff);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vadd(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 010000 |
- // ------------------------------------------------------
- //
- // Adds two vector registers and carry flag, the result is saturated to 32767
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 010000 |
+ // ------------------------------------------------------
+ //
+ // Adds two vector registers and carry flag, the result is saturated to 32767
#if USE_SIMD
- __m128i shuffled = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i shuffled = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
__m128i carry = _mm_and_si128(rsp->xvflag[CARRY], vec_flagmask);
- rsp->accum_l = _mm_add_epi16(_mm_add_epi16(rsp->xv[VS1REG], shuffled), carry);
+ rsp->accum_l = _mm_add_epi16(_mm_add_epi16(rsp->xv[VS1REG], shuffled), carry);
- __m128i addvec = _mm_adds_epi16(rsp->xv[VS1REG], shuffled);
+ __m128i addvec = _mm_adds_epi16(rsp->xv[VS1REG], shuffled);
- carry = _mm_and_si128(carry, _mm_xor_si128(_mm_cmpeq_epi16(addvec, vec_32767), vec_neg1));
- carry = _mm_and_si128(carry, _mm_xor_si128(_mm_cmpeq_epi16(addvec, vec_n32768), vec_neg1));
+ carry = _mm_and_si128(carry, _mm_xor_si128(_mm_cmpeq_epi16(addvec, vec_32767), vec_neg1));
+ carry = _mm_and_si128(carry, _mm_xor_si128(_mm_cmpeq_epi16(addvec, vec_n32768), vec_neg1));
- rsp->xv[VDREG] = _mm_add_epi16(addvec, carry);
+ rsp->xv[VDREG] = _mm_add_epi16(addvec, carry);
rsp->xvflag[ZERO] = _mm_setzero_si128();
rsp->xvflag[CARRY] = _mm_setzero_si128();
#else
- INT16 vres[8] = { 0 };
- for (int i = 0; i < 8; i++)
- {
- INT16 w1, w2;
+ INT16 vres[8] = { 0 };
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
- INT32 r = s1 + s2 + (((CARRY_FLAG(rsp, i)) != 0) ? 1 : 0);
-
- SET_ACCUM_L((INT16)(r), i);
-
- if (r > 32767) r = 32767;
- if (r < -32768) r = -32768;
- vres[i] = (INT16)(r);
- }
- CLEAR_ZERO_FLAGS();
- CLEAR_CARRY_FLAGS();
- WRITEBACK_RESULT();
+ INT32 s1 = (INT32)(INT16)w1;
+ INT32 s2 = (INT32)(INT16)w2;
+ INT32 r = s1 + s2 + (((CARRY_FLAG(rsp, i)) != 0) ? 1 : 0);
+
+ SET_ACCUM_L((INT16)(r), i);
+
+ if (r > 32767) r = 32767;
+ if (r < -32768) r = -32768;
+ vres[i] = (INT16)(r);
+ }
+ CLEAR_ZERO_FLAGS();
+ CLEAR_CARRY_FLAGS();
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vsub(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 010001 |
- // ------------------------------------------------------
- //
- // Subtracts two vector registers and carry flag, the result is saturated to -32768
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 010001 |
+ // ------------------------------------------------------
+ //
+ // Subtracts two vector registers and carry flag, the result is saturated to -32768
- // TODO: check VS2REG == VDREG
+ // TODO: check VS2REG == VDREG
#if USE_SIMD
- __m128i shuffled = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i shuffled = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
__m128i carry = _mm_and_si128(rsp->xvflag[CARRY], vec_flagmask);
- __m128i unsat = _mm_sub_epi16(_mm_sub_epi16(rsp->xv[VS1REG], shuffled), carry);
+ __m128i unsat = _mm_sub_epi16(_mm_sub_epi16(rsp->xv[VS1REG], shuffled), carry);
- __m128i subvec = _mm_subs_epi16(rsp->xv[VS1REG], shuffled);
+ __m128i subvec = _mm_subs_epi16(rsp->xv[VS1REG], shuffled);
- carry = _mm_and_si128(carry, _mm_xor_si128(_mm_cmpeq_epi16(subvec, vec_n32768), vec_neg1));
+ carry = _mm_and_si128(carry, _mm_xor_si128(_mm_cmpeq_epi16(subvec, vec_n32768), vec_neg1));
- rsp->xv[VDREG] = _mm_sub_epi16(subvec, carry);
+ rsp->xv[VDREG] = _mm_sub_epi16(subvec, carry);
- rsp->accum_l = unsat;
+ rsp->accum_l = unsat;
rsp->xvflag[ZERO] = _mm_setzero_si128();
rsp->xvflag[CARRY] = _mm_setzero_si128();
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- INT16 w1, w2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
- INT32 r = s1 - s2 - (((CARRY_FLAG(rsp, i)) != 0) ? 1 : 0);
+ INT32 s1 = (INT32)(INT16)w1;
+ INT32 s2 = (INT32)(INT16)w2;
+ INT32 r = s1 - s2 - (((CARRY_FLAG(rsp, i)) != 0) ? 1 : 0);
- SET_ACCUM_L((INT16)(r), i);
+ SET_ACCUM_L((INT16)(r), i);
- if (r > 32767) r = 32767;
- if (r < -32768) r = -32768;
+ if (r > 32767) r = 32767;
+ if (r < -32768) r = -32768;
- vres[i] = (INT16)(r);
- }
- CLEAR_ZERO_FLAGS();
- CLEAR_CARRY_FLAGS();
- WRITEBACK_RESULT();
+ vres[i] = (INT16)(r);
+ }
+ CLEAR_ZERO_FLAGS();
+ CLEAR_CARRY_FLAGS();
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vabs(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 010011 |
- // ------------------------------------------------------
- //
- // Changes the sign of source register 2 if source register 1 is negative and stores
- // the result to destination register
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 010011 |
+ // ------------------------------------------------------
+ //
+ // Changes the sign of source register 2 if source register 1 is negative and stores
+ // the result to destination register
#if USE_SIMD
- __m128i shuf2 = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- __m128i negs2 = _mm_sub_epi16(_mm_setzero_si128(), shuf2);
+ __m128i shuf2 = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i negs2 = _mm_sub_epi16(_mm_setzero_si128(), shuf2);
__m128i s2_n32768 = _mm_cmpeq_epi16(shuf2, vec_n32768);
- __m128i s1_lz = _mm_cmplt_epi16(rsp->xv[VS1REG], _mm_setzero_si128());
+ __m128i s1_lz = _mm_cmplt_epi16(rsp->xv[VS1REG], _mm_setzero_si128());
- __m128i result_gz = _mm_and_si128(shuf2, _mm_cmpgt_epi16(rsp->xv[VS1REG], _mm_setzero_si128()));
- __m128i result_n32768 = _mm_and_si128(s1_lz, _mm_and_si128(vec_32767, s2_n32768));
- __m128i result_negs2 = _mm_and_si128(s1_lz, _mm_and_si128(negs2, _mm_xor_si128(s2_n32768, vec_neg1)));
+ __m128i result_gz = _mm_and_si128(shuf2, _mm_cmpgt_epi16(rsp->xv[VS1REG], _mm_setzero_si128()));
+ __m128i result_n32768 = _mm_and_si128(s1_lz, _mm_and_si128(vec_32767, s2_n32768));
+ __m128i result_negs2 = _mm_and_si128(s1_lz, _mm_and_si128(negs2, _mm_xor_si128(s2_n32768, vec_neg1)));
rsp->xv[VDREG] = rsp->accum_l = _mm_or_si128(result_gz, _mm_or_si128(result_n32768, result_negs2));
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- INT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- if (s1 < 0)
- {
- if (s2 == -32768)
- {
- vres[i] = 32767;
- }
- else
- {
- vres[i] = -s2;
- }
- }
- else if (s1 > 0)
- {
- vres[i] = s2;
- }
- else
- {
- vres[i] = 0;
- }
-
- SET_ACCUM_L(vres[i], i);
- }
- WRITEBACK_RESULT();
+ if (s1 < 0)
+ {
+ if (s2 == -32768)
+ {
+ vres[i] = 32767;
+ }
+ else
+ {
+ vres[i] = -s2;
+ }
+ }
+ else if (s1 > 0)
+ {
+ vres[i] = s2;
+ }
+ else
+ {
+ vres[i] = 0;
+ }
+
+ SET_ACCUM_L(vres[i], i);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vaddc(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 010100 |
- // ------------------------------------------------------
- //
- // Adds two vector registers, the carry out is stored into carry register
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 010100 |
+ // ------------------------------------------------------
+ //
+ // Adds two vector registers, the carry out is stored into carry register
- // TODO: check VS2REG = VDREG
+ // TODO: check VS2REG = VDREG
- CLEAR_ZERO_FLAGS();
- CLEAR_CARRY_FLAGS();
+ CLEAR_ZERO_FLAGS();
+ CLEAR_CARRY_FLAGS();
#if USE_SIMD
- __m128i shuf2 = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- __m128i vec7531 = _mm_and_si128(rsp->xv[VS1REG], vec_lomask);
- __m128i vec6420 = _mm_srli_epi32(rsp->xv[VS1REG], 16);
- __m128i shuf7531 = _mm_and_si128(shuf2, vec_lomask);
- __m128i shuf6420 = _mm_srli_epi32(shuf2, 16);
- __m128i sum7531 = _mm_add_epi32(vec7531, shuf7531);
- __m128i sum6420 = _mm_add_epi32(vec6420, shuf6420);
+ __m128i shuf2 = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i vec7531 = _mm_and_si128(rsp->xv[VS1REG], vec_lomask);
+ __m128i vec6420 = _mm_srli_epi32(rsp->xv[VS1REG], 16);
+ __m128i shuf7531 = _mm_and_si128(shuf2, vec_lomask);
+ __m128i shuf6420 = _mm_srli_epi32(shuf2, 16);
+ __m128i sum7531 = _mm_add_epi32(vec7531, shuf7531);
+ __m128i sum6420 = _mm_add_epi32(vec6420, shuf6420);
- __m128i over7531 = _mm_and_si128(_mm_xor_si128(_mm_cmpeq_epi16(sum7531, _mm_setzero_si128()), vec_neg1), vec_himask);
- __m128i over6420 = _mm_and_si128(_mm_xor_si128(_mm_cmpeq_epi16(sum6420, _mm_setzero_si128()), vec_neg1), vec_himask);
+ __m128i over7531 = _mm_and_si128(_mm_xor_si128(_mm_cmpeq_epi16(sum7531, _mm_setzero_si128()), vec_neg1), vec_himask);
+ __m128i over6420 = _mm_and_si128(_mm_xor_si128(_mm_cmpeq_epi16(sum6420, _mm_setzero_si128()), vec_neg1), vec_himask);
rsp->xvflag[CARRY] = _mm_or_si128(over6420, _mm_srli_epi32(over7531, 16));
- rsp->accum_l = rsp->xv[VDREG] = _mm_or_si128(_mm_slli_epi32(sum6420, 16), sum7531);
+ rsp->accum_l = rsp->xv[VDREG] = _mm_or_si128(_mm_slli_epi32(sum6420, 16), sum7531);
#else
- INT16 vres[8] = { 0 };
- for (int i = 0; i < 8; i++)
- {
- INT16 w1, w2;
+ INT16 vres[8] = { 0 };
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (UINT32)(UINT16)w1;
- INT32 s2 = (UINT32)(UINT16)w2;
- INT32 r = s1 + s2;
-
- vres[i] = (INT16)r;
- SET_ACCUM_L((INT16)r, i);
-
- if (r & 0xffff0000)
- {
- SET_CARRY_FLAG(i);
- }
- }
- WRITEBACK_RESULT();
+ INT32 s1 = (UINT32)(UINT16)w1;
+ INT32 s2 = (UINT32)(UINT16)w2;
+ INT32 r = s1 + s2;
+
+ vres[i] = (INT16)r;
+ SET_ACCUM_L((INT16)r, i);
+
+ if (r & 0xffff0000)
+ {
+ SET_CARRY_FLAG(i);
+ }
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vsubc(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 010101 |
- // ------------------------------------------------------
- //
- // Subtracts two vector registers, the carry out is stored into carry register
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 010101 |
+ // ------------------------------------------------------
+ //
+ // Subtracts two vector registers, the carry out is stored into carry register
- // TODO: check VS2REG = VDREG
+ // TODO: check VS2REG = VDREG
- CLEAR_ZERO_FLAGS();
- CLEAR_CARRY_FLAGS();
+ CLEAR_ZERO_FLAGS();
+ CLEAR_CARRY_FLAGS();
#if USE_SIMD
- __m128i shuf2 = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- __m128i vec7531 = _mm_and_si128(rsp->xv[VS1REG], vec_lomask);
- __m128i vec6420 = _mm_srli_epi32(rsp->xv[VS1REG], 16);
- __m128i shuf7531 = _mm_and_si128(shuf2, vec_lomask);
- __m128i shuf6420 = _mm_srli_epi32(shuf2, 16);
- __m128i sum7531 = _mm_sub_epi32(vec7531, shuf7531);
- __m128i sum6420 = _mm_sub_epi32(vec6420, shuf6420);
-
- __m128i over7531 = _mm_and_si128(_mm_xor_si128(_mm_cmpeq_epi16(sum7531, _mm_setzero_si128()), vec_neg1), vec_himask);
- __m128i over6420 = _mm_and_si128(_mm_xor_si128(_mm_cmpeq_epi16(sum6420, _mm_setzero_si128()), vec_neg1), vec_himask);
- sum7531 = _mm_and_si128(sum7531, vec_lomask);
- sum6420 = _mm_and_si128(sum6420, vec_lomask);
- __m128i zero7531 = _mm_and_si128(_mm_xor_si128(_mm_cmpeq_epi16(sum7531, _mm_setzero_si128()), vec_neg1), vec_lomask);
- __m128i zero6420 = _mm_and_si128(_mm_xor_si128(_mm_cmpeq_epi16(sum6420, _mm_setzero_si128()), vec_neg1), vec_lomask);
+ __m128i shuf2 = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i vec7531 = _mm_and_si128(rsp->xv[VS1REG], vec_lomask);
+ __m128i vec6420 = _mm_srli_epi32(rsp->xv[VS1REG], 16);
+ __m128i shuf7531 = _mm_and_si128(shuf2, vec_lomask);
+ __m128i shuf6420 = _mm_srli_epi32(shuf2, 16);
+ __m128i sum7531 = _mm_sub_epi32(vec7531, shuf7531);
+ __m128i sum6420 = _mm_sub_epi32(vec6420, shuf6420);
+
+ __m128i over7531 = _mm_and_si128(_mm_xor_si128(_mm_cmpeq_epi16(sum7531, _mm_setzero_si128()), vec_neg1), vec_himask);
+ __m128i over6420 = _mm_and_si128(_mm_xor_si128(_mm_cmpeq_epi16(sum6420, _mm_setzero_si128()), vec_neg1), vec_himask);
+ sum7531 = _mm_and_si128(sum7531, vec_lomask);
+ sum6420 = _mm_and_si128(sum6420, vec_lomask);
+ __m128i zero7531 = _mm_and_si128(_mm_xor_si128(_mm_cmpeq_epi16(sum7531, _mm_setzero_si128()), vec_neg1), vec_lomask);
+ __m128i zero6420 = _mm_and_si128(_mm_xor_si128(_mm_cmpeq_epi16(sum6420, _mm_setzero_si128()), vec_neg1), vec_lomask);
rsp->xvflag[CARRY] = _mm_or_si128(over6420, _mm_srli_epi32(over7531, 16));
rsp->xvflag[ZERO] = _mm_or_si128(zero6420, _mm_srli_epi32(zero7531, 16));
- rsp->accum_l = rsp->xv[VDREG] = _mm_or_si128(_mm_slli_epi32(sum6420, 16), sum7531);
+ rsp->accum_l = rsp->xv[VDREG] = _mm_or_si128(_mm_slli_epi32(sum6420, 16), sum7531);
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- INT16 w1, w2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 w1, w2;
SCALAR_GET_VS1(w1, i);
SCALAR_GET_VS2(w2, i);
- INT32 s1 = (UINT32)(UINT16)w1;
- INT32 s2 = (UINT32)(UINT16)w2;
- INT32 r = s1 - s2;
-
- vres[i] = (INT16)(r);
- SET_ACCUM_L((UINT16)r, i);
-
- if ((UINT16)(r) != 0)
- {
- SET_ZERO_FLAG(i);
- }
- if (r & 0xffff0000)
- {
- SET_CARRY_FLAG(i);
- }
- }
- WRITEBACK_RESULT();
+ INT32 s1 = (UINT32)(UINT16)w1;
+ INT32 s2 = (UINT32)(UINT16)w2;
+ INT32 r = s1 - s2;
+
+ vres[i] = (INT16)(r);
+ SET_ACCUM_L((UINT16)r, i);
+
+ if ((UINT16)(r) != 0)
+ {
+ SET_ZERO_FLAG(i);
+ }
+ if (r & 0xffff0000)
+ {
+ SET_CARRY_FLAG(i);
+ }
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vsaw(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 011101 |
- // ------------------------------------------------------
- //
- // Stores high, middle or low slice of accumulator to destination vector
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 011101 |
+ // ------------------------------------------------------
+ //
+ // Stores high, middle or low slice of accumulator to destination vector
- switch (EL)
- {
- case 0x08: // VSAWH
- {
+ switch (EL)
+ {
+ case 0x08: // VSAWH
+ {
#if USE_SIMD
rsp->xv[VDREG] = rsp->accum_h;
#else
- for (int i = 0; i < 8; i++)
- {
- W_VREG_S(VDREG, i) = ACCUM_H(rsp, i);
- }
+ for (int i = 0; i < 8; i++)
+ {
+ W_VREG_S(VDREG, i) = ACCUM_H(rsp, i);
+ }
#endif
- break;
- }
- case 0x09: // VSAWM
- {
+ break;
+ }
+ case 0x09: // VSAWM
+ {
#if USE_SIMD
rsp->xv[VDREG] = rsp->accum_m;
#else
- for (int i = 0; i < 8; i++)
- {
- W_VREG_S(VDREG, i) = ACCUM_M(rsp, i);
- }
+ for (int i = 0; i < 8; i++)
+ {
+ W_VREG_S(VDREG, i) = ACCUM_M(rsp, i);
+ }
#endif
- break;
- }
- case 0x0a: // VSAWL
- {
+ break;
+ }
+ case 0x0a: // VSAWL
+ {
#if USE_SIMD
- rsp->xv[VDREG] = rsp->accum_l;
+ rsp->xv[VDREG] = rsp->accum_l;
#else
- for (int i = 0; i < 8; i++)
- {
- W_VREG_S(VDREG, i) = ACCUM_L(rsp, i);
- }
+ for (int i = 0; i < 8; i++)
+ {
+ W_VREG_S(VDREG, i) = ACCUM_L(rsp, i);
+ }
#endif
- break;
- }
- default: fatalerror("RSP: VSAW: el = %d\n", EL);
- }
+ break;
+ }
+ default: fatalerror("RSP: VSAW: el = %d\n", EL);
+ }
}
INLINE void cfunc_rsp_vlt(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- //int i;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100000 |
- // ------------------------------------------------------
- //
- // Sets compare flags if elements in VS1 are less than VS2
- // Moves the element in VS2 to destination vector
+ //int i;
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100000 |
+ // ------------------------------------------------------
+ //
+ // Sets compare flags if elements in VS1 are less than VS2
+ // Moves the element in VS2 to destination vector
#if USE_SIMD
rsp->xvflag[COMPARE] = rsp->xvflag[CLIP2] = _mm_setzero_si128();
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
__m128i zc_mask = _mm_and_si128(rsp->xvflag[ZERO], rsp->xvflag[CARRY]);
__m128i lt_mask = _mm_cmplt_epi16(rsp->xv[VS1REG], shuf);
__m128i eq_mask = _mm_and_si128(_mm_cmpeq_epi16(rsp->xv[VS1REG], shuf), zc_mask);
@@ -3430,522 +3430,522 @@ INLINE void cfunc_rsp_vlt(void *param)
rsp->xvflag[COMPARE] = _mm_or_si128(lt_mask, eq_mask);
__m128i result = _mm_and_si128(rsp->xv[VS1REG], rsp->xvflag[COMPARE]);
- rsp->accum_l = rsp->xv[VDREG] = _mm_or_si128(result, _mm_and_si128(shuf, _mm_xor_si128(rsp->xvflag[COMPARE], vec_neg1)));
+ rsp->accum_l = rsp->xv[VDREG] = _mm_or_si128(result, _mm_and_si128(shuf, _mm_xor_si128(rsp->xvflag[COMPARE], vec_neg1)));
rsp->xvflag[ZERO] = rsp->xvflag[CARRY] = _mm_setzero_si128();
#else
CLEAR_COMPARE_FLAGS();
CLEAR_CLIP2_FLAGS();
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- INT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- if (s1 < s2)
- {
- SET_COMPARE_FLAG(i);
- }
- else if (s1 == s2)
- {
- if (ZERO_FLAG(rsp, i) != 0 && CARRY_FLAG(rsp, i) != 0)
- {
- SET_COMPARE_FLAG(i);
- }
- }
-
- if (COMPARE_FLAG(rsp, i) != 0)
- {
- vres[i] = s1;
- }
- else
- {
- vres[i] = s2;
- }
-
- SET_ACCUM_L(vres[i], i);
- }
+ if (s1 < s2)
+ {
+ SET_COMPARE_FLAG(i);
+ }
+ else if (s1 == s2)
+ {
+ if (ZERO_FLAG(rsp, i) != 0 && CARRY_FLAG(rsp, i) != 0)
+ {
+ SET_COMPARE_FLAG(i);
+ }
+ }
+
+ if (COMPARE_FLAG(rsp, i) != 0)
+ {
+ vres[i] = s1;
+ }
+ else
+ {
+ vres[i] = s2;
+ }
+
+ SET_ACCUM_L(vres[i], i);
+ }
CLEAR_ZERO_FLAGS();
CLEAR_CARRY_FLAGS();
- WRITEBACK_RESULT();
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_veq(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100001 |
- // ------------------------------------------------------
- //
- // Sets compare flags if elements in VS1 are equal with VS2
- // Moves the element in VS2 to destination vector
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100001 |
+ // ------------------------------------------------------
+ //
+ // Sets compare flags if elements in VS1 are equal with VS2
+ // Moves the element in VS2 to destination vector
#if USE_SIMD
rsp->xvflag[COMPARE] = rsp->xvflag[CLIP2] = _mm_setzero_si128();
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
__m128i zero_mask = _mm_cmpeq_epi16(rsp->xvflag[ZERO], _mm_setzero_si128());
__m128i eq_mask = _mm_cmpeq_epi16(rsp->xv[VS1REG], shuf);
rsp->xvflag[COMPARE] = _mm_and_si128(zero_mask, eq_mask);
__m128i result = _mm_and_si128(rsp->xv[VS1REG], rsp->xvflag[COMPARE]);
- rsp->accum_l = rsp->xv[VDREG] = _mm_or_si128(result, _mm_and_si128(shuf, _mm_xor_si128(rsp->xvflag[COMPARE], vec_neg1)));
+ rsp->accum_l = rsp->xv[VDREG] = _mm_or_si128(result, _mm_and_si128(shuf, _mm_xor_si128(rsp->xvflag[COMPARE], vec_neg1)));
rsp->xvflag[ZERO] = rsp->xvflag[CARRY] = _mm_setzero_si128();
#else
CLEAR_COMPARE_FLAGS();
CLEAR_CLIP2_FLAGS();
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- INT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- if ((s1 == s2) && ZERO_FLAG(rsp, i) == 0)
- {
- SET_COMPARE_FLAG(i);
- vres[i] = s1;
- }
- else
- {
- vres[i] = s2;
- }
+ if ((s1 == s2) && ZERO_FLAG(rsp, i) == 0)
+ {
+ SET_COMPARE_FLAG(i);
+ vres[i] = s1;
+ }
+ else
+ {
+ vres[i] = s2;
+ }
- SET_ACCUM_L(vres[i], i);
- }
+ SET_ACCUM_L(vres[i], i);
+ }
CLEAR_ZERO_FLAGS();
CLEAR_CARRY_FLAGS();
- WRITEBACK_RESULT();
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vne(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100010 |
- // ------------------------------------------------------
- //
- // Sets compare flags if elements in VS1 are not equal with VS2
- // Moves the element in VS2 to destination vector
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100010 |
+ // ------------------------------------------------------
+ //
+ // Sets compare flags if elements in VS1 are not equal with VS2
+ // Moves the element in VS2 to destination vector
#if USE_SIMD
rsp->xvflag[COMPARE] = rsp->xvflag[CLIP2] = _mm_setzero_si128();
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
__m128i neq_mask = _mm_xor_si128(_mm_cmpeq_epi16(rsp->xv[VS1REG], shuf), vec_neg1);
rsp->xvflag[COMPARE] = _mm_or_si128(rsp->xvflag[ZERO], neq_mask);
__m128i result = _mm_and_si128(rsp->xv[VS1REG], rsp->xvflag[COMPARE]);
- rsp->accum_l = rsp->xv[VDREG] = _mm_or_si128(result, _mm_and_si128(shuf, _mm_xor_si128(rsp->xvflag[COMPARE], vec_neg1)));
+ rsp->accum_l = rsp->xv[VDREG] = _mm_or_si128(result, _mm_and_si128(shuf, _mm_xor_si128(rsp->xvflag[COMPARE], vec_neg1)));
rsp->xvflag[ZERO] = rsp->xvflag[CARRY] = _mm_setzero_si128();
#else
CLEAR_COMPARE_FLAGS();
CLEAR_CLIP2_FLAGS();
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- INT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- if (s1 != s2 || ZERO_FLAG(rsp, i) != 0)
- {
- SET_COMPARE_FLAG(i);
- vres[i] = s1;
- }
- else
- {
- vres[i] = s2;
+ if (s1 != s2 || ZERO_FLAG(rsp, i) != 0)
+ {
+ SET_COMPARE_FLAG(i);
+ vres[i] = s1;
+ }
+ else
+ {
+ vres[i] = s2;
}
- SET_ACCUM_L(vres[i], i);
- }
+ SET_ACCUM_L(vres[i], i);
+ }
CLEAR_ZERO_FLAGS();
CLEAR_CARRY_FLAGS();
- WRITEBACK_RESULT();
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vge(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- //int i;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100011 |
- // ------------------------------------------------------
- //
- // Sets compare flags if elements in VS1 are greater or equal with VS2
- // Moves the element in VS2 to destination vector
+ //int i;
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100011 |
+ // ------------------------------------------------------
+ //
+ // Sets compare flags if elements in VS1 are greater or equal with VS2
+ // Moves the element in VS2 to destination vector
#if USE_SIMD
rsp->xvflag[COMPARE] = rsp->xvflag[CLIP2] = _mm_setzero_si128();
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
__m128i flag_mask = _mm_cmpeq_epi16(_mm_or_si128(rsp->xvflag[ZERO], rsp->xvflag[CARRY]), _mm_setzero_si128());
__m128i eq_mask = _mm_and_si128(_mm_cmpeq_epi16(rsp->xv[VS1REG], shuf), flag_mask);
__m128i gt_mask = _mm_cmpgt_epi16(rsp->xv[VS1REG], shuf);
rsp->xvflag[COMPARE] = _mm_or_si128(eq_mask, gt_mask);
__m128i result = _mm_and_si128(rsp->xv[VS1REG], rsp->xvflag[COMPARE]);
- rsp->accum_l = rsp->xv[VDREG] = _mm_or_si128(result, _mm_and_si128(shuf, _mm_xor_si128(rsp->xvflag[COMPARE], vec_neg1)));
+ rsp->accum_l = rsp->xv[VDREG] = _mm_or_si128(result, _mm_and_si128(shuf, _mm_xor_si128(rsp->xvflag[COMPARE], vec_neg1)));
rsp->xvflag[ZERO] = rsp->xvflag[CARRY] = _mm_setzero_si128();
#else
CLEAR_COMPARE_FLAGS();
CLEAR_CLIP2_FLAGS();
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- INT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- if ((s1 == s2 && (ZERO_FLAG(rsp, i) == 0 || CARRY_FLAG(rsp, i) == 0)) || s1 > s2)
- {
- SET_COMPARE_FLAG(i);
- vres[i] = s1;
- }
- else
- {
- vres[i] = s2;
- }
-
- SET_ACCUM_L(vres[i], i);
- }
+ if ((s1 == s2 && (ZERO_FLAG(rsp, i) == 0 || CARRY_FLAG(rsp, i) == 0)) || s1 > s2)
+ {
+ SET_COMPARE_FLAG(i);
+ vres[i] = s1;
+ }
+ else
+ {
+ vres[i] = s2;
+ }
+
+ SET_ACCUM_L(vres[i], i);
+ }
CLEAR_ZERO_FLAGS();
CLEAR_CARRY_FLAGS();
- WRITEBACK_RESULT();
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vcl(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
- INT16 vres[8];
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
+ INT16 vres[8];
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100100 |
- // ------------------------------------------------------
- //
- // Vector clip low
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100100 |
+ // ------------------------------------------------------
+ //
+ // Vector clip low
#if 0//USE_SIMD
- __m128i flag0_07 = _mm_set_epi16(CARRY_FLAG(0), CARRY_FLAG(1), CARRY_FLAG(2), CARRY_FLAG(3),
- CARRY_FLAG(4), CARRY_FLAG(5), CARRY_FLAG(6), CARRY_FLAG(7));
- __m128i flag0_815 = _mm_set_epi16(ZERO_FLAG(0), ZERO_FLAG(1), ZERO_FLAG(2), ZERO_FLAG(3),
- ZERO_FLAG(4), ZERO_FLAG(5), ZERO_FLAG(6), ZERO_FLAG(7));
- __m128i flag1_07 = _mm_set_epi16(COMPARE_FLAG(0), COMPARE_FLAG(1), COMPARE_FLAG(2), COMPARE_FLAG(3),
- COMPARE_FLAG(4), COMPARE_FLAG(5), COMPARE_FLAG(6), COMPARE_FLAG(7));
- __m128i flag1_815 = _mm_set_epi16((rsp->flag[1] >> 8) & 1, (rsp->flag[1] >> 9) & 1, (rsp->flag[1] >> 10) & 1, (rsp->flag[1] >> 11) & 1,
- (rsp->flag[1] >> 12) & 1, (rsp->flag[1] >> 13) & 1, (rsp->flag[1] >> 14) & 1, (rsp->flag[1] >> 15) & 1);
- __m128i flag2_07 = _mm_set_epi16(rsp->flag[2][0], rsp->flag[2][1], rsp->flag[2][2], rsp->flag[2][3],
- rsp->flag[2][4], rsp->flag[2][5], rsp->flag[2][6], rsp->flag[2][7]);
- __m128i n0_07 = _mm_xor_si128(flag0_07, vec_neg1);
- __m128i n0_815 = _mm_xor_si128(flag0_815, vec_neg1);
- __m128i n1_07 = _mm_xor_si128(flag1_07, vec_neg1);
- __m128i n1_815 = _mm_xor_si128(flag1_815, vec_neg1);
- __m128i n2_07 = _mm_xor_si128(flag2_07, vec_neg1);
-
- __m128i shuf2 = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- __m128i vec7531 = _mm_and_si128(rsp->xv[VS1REG], vec_lomask);
- __m128i vec6420 = _mm_srli_epi32(rsp->xv[VS1REG], 16);
- __m128i shuf7531 = _mm_and_si128(shuf2, vec_lomask);
- __m128i shuf6420 = _mm_srli_epi32(shuf2, 16);
- __m128i sub7531 = _mm_sub_epi32(vec7531, shuf7531);
- __m128i sub6420 = _mm_sub_epi32(vec6420, shuf6420);
- __m128i subh7531 = _mm_and_si128(sub7531, vec_himask);
- __m128i subh6420 = _mm_and_si128(sub6420, vec_himask);
- __m128i sub_gez = _mm_or_si128(_mm_slli_epi32(_mm_cmpeq_epi16(subh6420, _mm_setzero_si128()), 16), _mm_cmpeq_epi16(subh7531, _mm_setzero_si128()));
- __m128i sub_lz = _mm_xor_si128(sub_gez, vec_neg1);
-
- __m128i sum7531 = _mm_add_epi32(vec7531, shuf7531);
- __m128i sum6420 = _mm_add_epi32(vec6420, shuf6420);
- __m128i suml7531 = _mm_and_si128(sum7531, vec_lomask);
- __m128i suml6420 = _mm_and_si128(sum6420, vec_lomask);
- __m128i sumh7531 = _mm_and_si128(sum7531, vec_himask);
- __m128i sumh6420 = _mm_and_si128(sum6420, vec_himask);
- __m128i suml_z = _mm_or_si128(_mm_slli_epi32(_mm_cmpeq_epi16(suml6420, _mm_setzero_si128()), 16), _mm_cmpeq_epi16(suml7531, _mm_setzero_si128()));
- __m128i sumh_1 = _mm_or_si128(_mm_slli_epi32(_mm_cmpeq_epi16(sumh6420, vec_hibit), 16), _mm_cmpeq_epi16(sumh7531, vec_hibit));
- __m128i sumh_z = _mm_or_si128(_mm_slli_epi32(_mm_cmpeq_epi16(sumh6420, _mm_setzero_si128()), 16), _mm_cmpeq_epi16(sumh7531, _mm_setzero_si128()));
- __m128i sum_z = _mm_and_si128(suml_z, sumh_z);
- __m128i sum_nz = _mm_xor_si128(sum_z, vec_neg1);
- __m128i sum_le0x10000 = _mm_or_si128(_mm_and_si128(suml_z, sumh_1), sumh_z);
- __m128i sum_g0x10000 = _mm_xor_si128(sum_le0x10000, vec_neg1);
-
- __m128i f0a_and_nf0b = _mm_and_si128(flag0_07, n0_815);
- __m128i nf0a_and_nf0b = _mm_and_si128( n0_07, n0_815);
-
- // accum set to -s2 if flag0[0-7] && flag0[8-15] && flag1[0-7]
- // accum set to -s2 if flag0[0-7] && !flag0[8-15] && flag2[0-7] && (s1 + s2) > 0x10000
- // accum set to -s2 if flag0[0-7] && !flag0[8-15] && !flag2[0-7] && (s1 + s2) == 0
- __m128i accum_ns2 = _mm_and_si128(_mm_and_si128(flag0_07, flag0_815), flag1_07);
- accum_ns2 = _mm_or_si128(accum_ns2, _mm_and_si128(_mm_and_si128(f0a_and_nf0b, flag2_07), sum_g0x10000));
- accum_ns2 = _mm_or_si128(accum_ns2, _mm_and_si128(_mm_and_si128(f0a_and_nf0b, n2_07), sum_z));
-
- // accum set to s2 if !flag0[0-7] && flag0[8-15] && flag1[8-15]
- // accum set to s2 if !flag0[0-7] && !flag0[8-15] && (s1 - s2) >= 0
- __m128i accum_s2 = _mm_and_si128(n0_07, _mm_and_si128(flag0_815, flag1_815));
- accum_s2 = _mm_or_si128(accum_s2, _mm_and_si128(_mm_and_si128(n0_07, n0_815), sub_gez));
-
- // flag1[8-15] set if !flag0[0-7] && !flag0[8-15] && (s1 - s2) >= 0
- __m128i new_f1b_s = _mm_and_si128(_mm_and_si128(nf0a_and_nf0b, sub_gez), vec_flagmask);
- UINT16 flag1_set = 0;
- flag1_set |= _mm_extract_epi16(new_f1b_s, 0) << 8;
- flag1_set |= _mm_extract_epi16(new_f1b_s, 1) << 9;
- flag1_set |= _mm_extract_epi16(new_f1b_s, 2) << 10;
- flag1_set |= _mm_extract_epi16(new_f1b_s, 3) << 11;
- flag1_set |= _mm_extract_epi16(new_f1b_s, 4) << 12;
- flag1_set |= _mm_extract_epi16(new_f1b_s, 5) << 13;
- flag1_set |= _mm_extract_epi16(new_f1b_s, 6) << 14;
- flag1_set |= _mm_extract_epi16(new_f1b_s, 7) << 15;
-
- // flag1[8-15]unset if !flag0[0-7] && !flag0[8-15] && (s1 - s2) < 0
- __m128i new_f1b_u = _mm_xor_si128(vec_neg1, _mm_and_si128(nf0a_and_nf0b, sub_lz));
- new_f1b_u = _mm_and_si128(new_f1b_u, vec_flagmask);
- UINT16 flag1_unset = 0;
- flag1_unset |= _mm_extract_epi16(new_f1b_u, 0) << 8;
- flag1_unset |= _mm_extract_epi16(new_f1b_u, 1) << 9;
- flag1_unset |= _mm_extract_epi16(new_f1b_u, 2) << 10;
- flag1_unset |= _mm_extract_epi16(new_f1b_u, 3) << 11;
- flag1_unset |= _mm_extract_epi16(new_f1b_u, 4) << 12;
- flag1_unset |= _mm_extract_epi16(new_f1b_u, 5) << 13;
- flag1_unset |= _mm_extract_epi16(new_f1b_u, 6) << 14;
- flag1_unset |= _mm_extract_epi16(new_f1b_u, 7) << 15;
-
- // flag1[0-7] set if flag0[0-7] && !flag0[8-15] && flag2[0-7] && (s1 + s2) <= 0x10000
- // flag1[0-7] set if flag0[0-7] && !flag0[8-15] && !flag2[0-7] && (s1 + s2) == 0
- __m128i new_f1a_s = _mm_and_si128(_mm_and_si128(f0a_and_nf0b, flag2_07), sum_le0x10000);
- new_f1a_s = _mm_or_si128(new_f1a_u, _mm_and_si128(_mm_and_si128(f0a_and_nf0b, n2_07), sum_z));
- new_f1a_s = _mm_and_si128(new_f1a_s, vec_flagmask);
- flag1_set |= _mm_extract_epi16(new_f1a_s, 0) << 0;
- flag1_set |= _mm_extract_epi16(new_f1a_s, 1) << 1;
- flag1_set |= _mm_extract_epi16(new_f1a_s, 2) << 2;
- flag1_set |= _mm_extract_epi16(new_f1a_s, 3) << 3;
- flag1_set |= _mm_extract_epi16(new_f1a_s, 4) << 4;
- flag1_set |= _mm_extract_epi16(new_f1a_s, 5) << 5;
- flag1_set |= _mm_extract_epi16(new_f1a_s, 6) << 6;
- flag1_set |= _mm_extract_epi16(new_f1a_s, 7) << 7;
-
- // flag1[0-7] unset if flag0[0-7] && !flag0[8-15] && flag2[0-7] && (s1 + s2) > 0x10000
- // flag1[0-7] unset if flag0[0-7] && !flag0[8-15] && !flag2[0-7] && (s1 + s2) != 0
- __m128i new_f1a_u = _mm_and_si128(_mm_and_si128(f0a_and_nf0b, flag2_07), sum_g0x10000);
- new_f1a_u = _mm_or_si128(new_f1a_u, _mm_and_si128(_mm_and_si128(f0a_and_nf0b, n2_07), sum_nz));
- new_f1a_u = _mm_and_si128(new_f1a_u, vec_flagmask);
- flag1_unset |= _mm_extract_epi16(new_f1a_u, 0) << 0;
- flag1_unset |= _mm_extract_epi16(new_f1a_u, 1) << 1;
- flag1_unset |= _mm_extract_epi16(new_f1a_u, 2) << 2;
- flag1_unset |= _mm_extract_epi16(new_f1a_u, 3) << 3;
- flag1_unset |= _mm_extract_epi16(new_f1a_u, 4) << 4;
- flag1_unset |= _mm_extract_epi16(new_f1a_u, 5) << 5;
- flag1_unset |= _mm_extract_epi16(new_f1a_u, 6) << 6;
- flag1_unset |= _mm_extract_epi16(new_f1a_u, 7) << 7;
-
- rsp->flag[1] &= ~flag1_unset;
- rsp->flag[1] |= flag1_set;
-
- // accum set to s1 if flag0[0-7] && flag0[8-15] && !flag1[0-7]
- // accum set to s1 if flag0[0-7] && !flag0[8-15] && flag2[0-7] && (s1 + s2) <= 0x10000
- // accum set to s1 if flag0[0-7] && !flag0[8-15] && !flag2[0-7] && (s1 + s2) != 0
- // accum set to s1 if !flag0[0-7] && flag0[8-15] && !flag1[8-15]
- // accum set to s1 if !flag0[0-7] && !flag0[8-15] && (s1 - s2) < 0
- __m128i accum_s1 = _mm_and_si128(flag0_07, _mm_and_si128(flag0_815, n1_07));
- accum_s1 = _mm_or_si128(accum_s1, _mm_and_si128(_mm_and_si128(f0a_and_nf0b, flag2_07), sum_le0x10000));
- accum_s1 = _mm_or_si128(accum_s1, _mm_and_si128(_mm_and_si128(f0a_and_nf0b, n2_07), sum_nz));
- accum_s1 = _mm_or_si128(accum_s1, _mm_and_si128(_mm_and_si128(n0_07, flag0_815), n1_815));
- accum_s1 = _mm_or_si128(accum_s1, _mm_and_si128(nf0a_and_nf0b, sub_lz));
- //__m128i zms2 = _mm_sub_epi16(_mm_setzero_si128(), shuf2);
-
- /*
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- __m128i s1_xor_s2 = _mm_xor_si128(rsp->xv[VS1REG], shuf);
- __m128i s1_plus_s2 = _mm_add_epi16(rsp->xv[VS1REG], shuf);
- __m128i s1_sub_s2 = _mm_sub_epi16(rsp->xv[VS1REG], shuf);
- __m128i s2_neg = _mm_xor_si128(shuf, vec_neg1);
-
- __m128i s2_lz = _mm_cmplt_epi16(shuf, _mm_setzero_si128());
- __m128i s1s2_xor_lz = _mm_cmplt_epi16(s1_xor_s2, _mm_setzero_si128());
- __m128i s1s2_xor_gez = _mm_xor_si128(s1s2_xor_lz, vec_neg1);
- __m128i s1s2_plus_nz = _mm_xor_si128(_mm_cmpeq_epi16(s1_plus_s2, _mm_setzero_si128()), vec_neg1);
- __m128i s1s2_plus_gz = _mm_cmpgt_epi16(s1_plus_s2, _mm_setzero_si128());
- __m128i s1s2_plus_lez = _mm_xor_si128(s1s2_plus_gz, vec_neg1);
- __m128i s1s2_plus_n1 = _mm_cmpeq_epi16(s1_plus_s2, vec_neg1);
- __m128i s1s2_sub_nz = _mm_xor_si128(_mm_cmpeq_epi16(s1_sub_s2, _mm_setzero_si128()), vec_neg1);
- __m128i s1s2_sub_lz = _mm_cmplt_epi16(s1_sub_s2, _mm_setzero_si128());
- __m128i s1s2_sub_gez = _mm_xor_si128(s1s2_sub_lz, vec_neg1);
- __m128i s1_nens2 = _mm_xor_si128(_mm_cmpeq_epi16(rsp->xv[VS1REG], s2_neg), vec_neg1);
-
- __m128i ext_mask = _mm_and_si128(_mm_and_si128(s1s2_xor_lz, s1s2_plus_n1), vec_flagmask);
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 0) << 0;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 1) << 1;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 2) << 2;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 3) << 3;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 4) << 4;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 5) << 5;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 6) << 6;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 7) << 7;
-
- __m128i carry_mask = _mm_and_si128(s1s2_xor_lz, vec_flagmask);
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 0) << 0;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 1) << 1;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 2) << 2;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 3) << 3;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 4) << 4;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 5) << 5;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 6) << 6;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 7) << 7;
-
- __m128i z0_mask = _mm_and_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_nz), s1_nens2);
- __m128i z1_mask = _mm_and_si128(_mm_and_si128(s1s2_xor_lz, s1s2_plus_nz), s1_nens2);
- __m128i z_mask = _mm_and_si128(_mm_or_si128(z0_mask, z1_mask), vec_flagmask);
- z_mask = _mm_and_si128(_mm_or_si128(z_mask, _mm_srli_epi32(z_mask, 15)), vec_shiftmask2);
- z_mask = _mm_and_si128(_mm_or_si128(z_mask, _mm_srli_epi64(z_mask, 30)), vec_shiftmask4);
- z_mask = _mm_or_si128(z_mask, _mm_srli_si128(z_mask, 7));
- z_mask = _mm_or_si128(z_mask, _mm_srli_epi16(z_mask, 4));
- rsp->flag[0] |= (_mm_extract_epi16(z_mask, 0) << 8) & 0x00ff00;
-
- __m128i f0_mask = _mm_and_si128(_mm_or_si128(_mm_and_si128(s1s2_xor_gez, s2_lz), _mm_and_si128(s1s2_xor_lz, s1s2_plus_lez)), vec_flagmask);
- __m128i f8_mask = _mm_and_si128(_mm_or_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_gez), _mm_and_si128(s1s2_xor_lz, s2_lz)), vec_flagmask);
- f0_mask = _mm_and_si128(f0_mask, vec_flagmask);
- f8_mask = _mm_and_si128(f8_mask, vec_flagmask);
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 0) << 0;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 1) << 1;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 2) << 2;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 3) << 3;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 4) << 4;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 5) << 5;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 6) << 6;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 7) << 7;
-
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 0) << 8;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 1) << 9;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 2) << 10;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 3) << 11;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 4) << 12;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 5) << 13;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 6) << 14;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 7) << 15;*/
+ __m128i flag0_07 = _mm_set_epi16(CARRY_FLAG(0), CARRY_FLAG(1), CARRY_FLAG(2), CARRY_FLAG(3),
+ CARRY_FLAG(4), CARRY_FLAG(5), CARRY_FLAG(6), CARRY_FLAG(7));
+ __m128i flag0_815 = _mm_set_epi16(ZERO_FLAG(0), ZERO_FLAG(1), ZERO_FLAG(2), ZERO_FLAG(3),
+ ZERO_FLAG(4), ZERO_FLAG(5), ZERO_FLAG(6), ZERO_FLAG(7));
+ __m128i flag1_07 = _mm_set_epi16(COMPARE_FLAG(0), COMPARE_FLAG(1), COMPARE_FLAG(2), COMPARE_FLAG(3),
+ COMPARE_FLAG(4), COMPARE_FLAG(5), COMPARE_FLAG(6), COMPARE_FLAG(7));
+ __m128i flag1_815 = _mm_set_epi16((rsp->flag[1] >> 8) & 1, (rsp->flag[1] >> 9) & 1, (rsp->flag[1] >> 10) & 1, (rsp->flag[1] >> 11) & 1,
+ (rsp->flag[1] >> 12) & 1, (rsp->flag[1] >> 13) & 1, (rsp->flag[1] >> 14) & 1, (rsp->flag[1] >> 15) & 1);
+ __m128i flag2_07 = _mm_set_epi16(rsp->flag[2][0], rsp->flag[2][1], rsp->flag[2][2], rsp->flag[2][3],
+ rsp->flag[2][4], rsp->flag[2][5], rsp->flag[2][6], rsp->flag[2][7]);
+ __m128i n0_07 = _mm_xor_si128(flag0_07, vec_neg1);
+ __m128i n0_815 = _mm_xor_si128(flag0_815, vec_neg1);
+ __m128i n1_07 = _mm_xor_si128(flag1_07, vec_neg1);
+ __m128i n1_815 = _mm_xor_si128(flag1_815, vec_neg1);
+ __m128i n2_07 = _mm_xor_si128(flag2_07, vec_neg1);
+
+ __m128i shuf2 = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i vec7531 = _mm_and_si128(rsp->xv[VS1REG], vec_lomask);
+ __m128i vec6420 = _mm_srli_epi32(rsp->xv[VS1REG], 16);
+ __m128i shuf7531 = _mm_and_si128(shuf2, vec_lomask);
+ __m128i shuf6420 = _mm_srli_epi32(shuf2, 16);
+ __m128i sub7531 = _mm_sub_epi32(vec7531, shuf7531);
+ __m128i sub6420 = _mm_sub_epi32(vec6420, shuf6420);
+ __m128i subh7531 = _mm_and_si128(sub7531, vec_himask);
+ __m128i subh6420 = _mm_and_si128(sub6420, vec_himask);
+ __m128i sub_gez = _mm_or_si128(_mm_slli_epi32(_mm_cmpeq_epi16(subh6420, _mm_setzero_si128()), 16), _mm_cmpeq_epi16(subh7531, _mm_setzero_si128()));
+ __m128i sub_lz = _mm_xor_si128(sub_gez, vec_neg1);
+
+ __m128i sum7531 = _mm_add_epi32(vec7531, shuf7531);
+ __m128i sum6420 = _mm_add_epi32(vec6420, shuf6420);
+ __m128i suml7531 = _mm_and_si128(sum7531, vec_lomask);
+ __m128i suml6420 = _mm_and_si128(sum6420, vec_lomask);
+ __m128i sumh7531 = _mm_and_si128(sum7531, vec_himask);
+ __m128i sumh6420 = _mm_and_si128(sum6420, vec_himask);
+ __m128i suml_z = _mm_or_si128(_mm_slli_epi32(_mm_cmpeq_epi16(suml6420, _mm_setzero_si128()), 16), _mm_cmpeq_epi16(suml7531, _mm_setzero_si128()));
+ __m128i sumh_1 = _mm_or_si128(_mm_slli_epi32(_mm_cmpeq_epi16(sumh6420, vec_hibit), 16), _mm_cmpeq_epi16(sumh7531, vec_hibit));
+ __m128i sumh_z = _mm_or_si128(_mm_slli_epi32(_mm_cmpeq_epi16(sumh6420, _mm_setzero_si128()), 16), _mm_cmpeq_epi16(sumh7531, _mm_setzero_si128()));
+ __m128i sum_z = _mm_and_si128(suml_z, sumh_z);
+ __m128i sum_nz = _mm_xor_si128(sum_z, vec_neg1);
+ __m128i sum_le0x10000 = _mm_or_si128(_mm_and_si128(suml_z, sumh_1), sumh_z);
+ __m128i sum_g0x10000 = _mm_xor_si128(sum_le0x10000, vec_neg1);
+
+ __m128i f0a_and_nf0b = _mm_and_si128(flag0_07, n0_815);
+ __m128i nf0a_and_nf0b = _mm_and_si128( n0_07, n0_815);
+
+ // accum set to -s2 if flag0[0-7] && flag0[8-15] && flag1[0-7]
+ // accum set to -s2 if flag0[0-7] && !flag0[8-15] && flag2[0-7] && (s1 + s2) > 0x10000
+ // accum set to -s2 if flag0[0-7] && !flag0[8-15] && !flag2[0-7] && (s1 + s2) == 0
+ __m128i accum_ns2 = _mm_and_si128(_mm_and_si128(flag0_07, flag0_815), flag1_07);
+ accum_ns2 = _mm_or_si128(accum_ns2, _mm_and_si128(_mm_and_si128(f0a_and_nf0b, flag2_07), sum_g0x10000));
+ accum_ns2 = _mm_or_si128(accum_ns2, _mm_and_si128(_mm_and_si128(f0a_and_nf0b, n2_07), sum_z));
+
+ // accum set to s2 if !flag0[0-7] && flag0[8-15] && flag1[8-15]
+ // accum set to s2 if !flag0[0-7] && !flag0[8-15] && (s1 - s2) >= 0
+ __m128i accum_s2 = _mm_and_si128(n0_07, _mm_and_si128(flag0_815, flag1_815));
+ accum_s2 = _mm_or_si128(accum_s2, _mm_and_si128(_mm_and_si128(n0_07, n0_815), sub_gez));
+
+ // flag1[8-15] set if !flag0[0-7] && !flag0[8-15] && (s1 - s2) >= 0
+ __m128i new_f1b_s = _mm_and_si128(_mm_and_si128(nf0a_and_nf0b, sub_gez), vec_flagmask);
+ UINT16 flag1_set = 0;
+ flag1_set |= _mm_extract_epi16(new_f1b_s, 0) << 8;
+ flag1_set |= _mm_extract_epi16(new_f1b_s, 1) << 9;
+ flag1_set |= _mm_extract_epi16(new_f1b_s, 2) << 10;
+ flag1_set |= _mm_extract_epi16(new_f1b_s, 3) << 11;
+ flag1_set |= _mm_extract_epi16(new_f1b_s, 4) << 12;
+ flag1_set |= _mm_extract_epi16(new_f1b_s, 5) << 13;
+ flag1_set |= _mm_extract_epi16(new_f1b_s, 6) << 14;
+ flag1_set |= _mm_extract_epi16(new_f1b_s, 7) << 15;
+
+ // flag1[8-15]unset if !flag0[0-7] && !flag0[8-15] && (s1 - s2) < 0
+ __m128i new_f1b_u = _mm_xor_si128(vec_neg1, _mm_and_si128(nf0a_and_nf0b, sub_lz));
+ new_f1b_u = _mm_and_si128(new_f1b_u, vec_flagmask);
+ UINT16 flag1_unset = 0;
+ flag1_unset |= _mm_extract_epi16(new_f1b_u, 0) << 8;
+ flag1_unset |= _mm_extract_epi16(new_f1b_u, 1) << 9;
+ flag1_unset |= _mm_extract_epi16(new_f1b_u, 2) << 10;
+ flag1_unset |= _mm_extract_epi16(new_f1b_u, 3) << 11;
+ flag1_unset |= _mm_extract_epi16(new_f1b_u, 4) << 12;
+ flag1_unset |= _mm_extract_epi16(new_f1b_u, 5) << 13;
+ flag1_unset |= _mm_extract_epi16(new_f1b_u, 6) << 14;
+ flag1_unset |= _mm_extract_epi16(new_f1b_u, 7) << 15;
+
+ // flag1[0-7] set if flag0[0-7] && !flag0[8-15] && flag2[0-7] && (s1 + s2) <= 0x10000
+ // flag1[0-7] set if flag0[0-7] && !flag0[8-15] && !flag2[0-7] && (s1 + s2) == 0
+ __m128i new_f1a_s = _mm_and_si128(_mm_and_si128(f0a_and_nf0b, flag2_07), sum_le0x10000);
+ new_f1a_s = _mm_or_si128(new_f1a_u, _mm_and_si128(_mm_and_si128(f0a_and_nf0b, n2_07), sum_z));
+ new_f1a_s = _mm_and_si128(new_f1a_s, vec_flagmask);
+ flag1_set |= _mm_extract_epi16(new_f1a_s, 0) << 0;
+ flag1_set |= _mm_extract_epi16(new_f1a_s, 1) << 1;
+ flag1_set |= _mm_extract_epi16(new_f1a_s, 2) << 2;
+ flag1_set |= _mm_extract_epi16(new_f1a_s, 3) << 3;
+ flag1_set |= _mm_extract_epi16(new_f1a_s, 4) << 4;
+ flag1_set |= _mm_extract_epi16(new_f1a_s, 5) << 5;
+ flag1_set |= _mm_extract_epi16(new_f1a_s, 6) << 6;
+ flag1_set |= _mm_extract_epi16(new_f1a_s, 7) << 7;
+
+ // flag1[0-7] unset if flag0[0-7] && !flag0[8-15] && flag2[0-7] && (s1 + s2) > 0x10000
+ // flag1[0-7] unset if flag0[0-7] && !flag0[8-15] && !flag2[0-7] && (s1 + s2) != 0
+ __m128i new_f1a_u = _mm_and_si128(_mm_and_si128(f0a_and_nf0b, flag2_07), sum_g0x10000);
+ new_f1a_u = _mm_or_si128(new_f1a_u, _mm_and_si128(_mm_and_si128(f0a_and_nf0b, n2_07), sum_nz));
+ new_f1a_u = _mm_and_si128(new_f1a_u, vec_flagmask);
+ flag1_unset |= _mm_extract_epi16(new_f1a_u, 0) << 0;
+ flag1_unset |= _mm_extract_epi16(new_f1a_u, 1) << 1;
+ flag1_unset |= _mm_extract_epi16(new_f1a_u, 2) << 2;
+ flag1_unset |= _mm_extract_epi16(new_f1a_u, 3) << 3;
+ flag1_unset |= _mm_extract_epi16(new_f1a_u, 4) << 4;
+ flag1_unset |= _mm_extract_epi16(new_f1a_u, 5) << 5;
+ flag1_unset |= _mm_extract_epi16(new_f1a_u, 6) << 6;
+ flag1_unset |= _mm_extract_epi16(new_f1a_u, 7) << 7;
+
+ rsp->flag[1] &= ~flag1_unset;
+ rsp->flag[1] |= flag1_set;
+
+ // accum set to s1 if flag0[0-7] && flag0[8-15] && !flag1[0-7]
+ // accum set to s1 if flag0[0-7] && !flag0[8-15] && flag2[0-7] && (s1 + s2) <= 0x10000
+ // accum set to s1 if flag0[0-7] && !flag0[8-15] && !flag2[0-7] && (s1 + s2) != 0
+ // accum set to s1 if !flag0[0-7] && flag0[8-15] && !flag1[8-15]
+ // accum set to s1 if !flag0[0-7] && !flag0[8-15] && (s1 - s2) < 0
+ __m128i accum_s1 = _mm_and_si128(flag0_07, _mm_and_si128(flag0_815, n1_07));
+ accum_s1 = _mm_or_si128(accum_s1, _mm_and_si128(_mm_and_si128(f0a_and_nf0b, flag2_07), sum_le0x10000));
+ accum_s1 = _mm_or_si128(accum_s1, _mm_and_si128(_mm_and_si128(f0a_and_nf0b, n2_07), sum_nz));
+ accum_s1 = _mm_or_si128(accum_s1, _mm_and_si128(_mm_and_si128(n0_07, flag0_815), n1_815));
+ accum_s1 = _mm_or_si128(accum_s1, _mm_and_si128(nf0a_and_nf0b, sub_lz));
+ //__m128i zms2 = _mm_sub_epi16(_mm_setzero_si128(), shuf2);
+
+ /*
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i s1_xor_s2 = _mm_xor_si128(rsp->xv[VS1REG], shuf);
+ __m128i s1_plus_s2 = _mm_add_epi16(rsp->xv[VS1REG], shuf);
+ __m128i s1_sub_s2 = _mm_sub_epi16(rsp->xv[VS1REG], shuf);
+ __m128i s2_neg = _mm_xor_si128(shuf, vec_neg1);
+
+ __m128i s2_lz = _mm_cmplt_epi16(shuf, _mm_setzero_si128());
+ __m128i s1s2_xor_lz = _mm_cmplt_epi16(s1_xor_s2, _mm_setzero_si128());
+ __m128i s1s2_xor_gez = _mm_xor_si128(s1s2_xor_lz, vec_neg1);
+ __m128i s1s2_plus_nz = _mm_xor_si128(_mm_cmpeq_epi16(s1_plus_s2, _mm_setzero_si128()), vec_neg1);
+ __m128i s1s2_plus_gz = _mm_cmpgt_epi16(s1_plus_s2, _mm_setzero_si128());
+ __m128i s1s2_plus_lez = _mm_xor_si128(s1s2_plus_gz, vec_neg1);
+ __m128i s1s2_plus_n1 = _mm_cmpeq_epi16(s1_plus_s2, vec_neg1);
+ __m128i s1s2_sub_nz = _mm_xor_si128(_mm_cmpeq_epi16(s1_sub_s2, _mm_setzero_si128()), vec_neg1);
+ __m128i s1s2_sub_lz = _mm_cmplt_epi16(s1_sub_s2, _mm_setzero_si128());
+ __m128i s1s2_sub_gez = _mm_xor_si128(s1s2_sub_lz, vec_neg1);
+ __m128i s1_nens2 = _mm_xor_si128(_mm_cmpeq_epi16(rsp->xv[VS1REG], s2_neg), vec_neg1);
+
+ __m128i ext_mask = _mm_and_si128(_mm_and_si128(s1s2_xor_lz, s1s2_plus_n1), vec_flagmask);
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 0) << 0;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 1) << 1;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 2) << 2;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 3) << 3;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 4) << 4;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 5) << 5;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 6) << 6;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 7) << 7;
+
+ __m128i carry_mask = _mm_and_si128(s1s2_xor_lz, vec_flagmask);
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 0) << 0;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 1) << 1;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 2) << 2;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 3) << 3;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 4) << 4;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 5) << 5;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 6) << 6;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 7) << 7;
+
+ __m128i z0_mask = _mm_and_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_nz), s1_nens2);
+ __m128i z1_mask = _mm_and_si128(_mm_and_si128(s1s2_xor_lz, s1s2_plus_nz), s1_nens2);
+ __m128i z_mask = _mm_and_si128(_mm_or_si128(z0_mask, z1_mask), vec_flagmask);
+ z_mask = _mm_and_si128(_mm_or_si128(z_mask, _mm_srli_epi32(z_mask, 15)), vec_shiftmask2);
+ z_mask = _mm_and_si128(_mm_or_si128(z_mask, _mm_srli_epi64(z_mask, 30)), vec_shiftmask4);
+ z_mask = _mm_or_si128(z_mask, _mm_srli_si128(z_mask, 7));
+ z_mask = _mm_or_si128(z_mask, _mm_srli_epi16(z_mask, 4));
+ rsp->flag[0] |= (_mm_extract_epi16(z_mask, 0) << 8) & 0x00ff00;
+
+ __m128i f0_mask = _mm_and_si128(_mm_or_si128(_mm_and_si128(s1s2_xor_gez, s2_lz), _mm_and_si128(s1s2_xor_lz, s1s2_plus_lez)), vec_flagmask);
+ __m128i f8_mask = _mm_and_si128(_mm_or_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_gez), _mm_and_si128(s1s2_xor_lz, s2_lz)), vec_flagmask);
+ f0_mask = _mm_and_si128(f0_mask, vec_flagmask);
+ f8_mask = _mm_and_si128(f8_mask, vec_flagmask);
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 0) << 0;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 1) << 1;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 2) << 2;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 3) << 3;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 4) << 4;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 5) << 5;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 6) << 6;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 7) << 7;
+
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 0) << 8;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 1) << 9;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 2) << 10;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 3) << 11;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 4) << 12;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 5) << 13;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 6) << 14;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 7) << 15;*/
#else
- for (int i = 0; i < 8; i++)
- {
- INT16 s1, s2;
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- if (CARRY_FLAG(rsp, i) != 0)
- {
- if (ZERO_FLAG(rsp, i) != 0)
- {
- if (COMPARE_FLAG(rsp, i) != 0)
- {
- SET_ACCUM_L(-(UINT16)s2, i);
- }
- else
- {
- SET_ACCUM_L(s1, i);
- }
- }
- else//ZERO_FLAG(rsp, i)==0
- {
- if (CLIP1_FLAG(rsp, i) != 0)
- {
- if (((UINT32)(UINT16)(s1) + (UINT32)(UINT16)(s2)) > 0x10000)
- {//proper fix for Harvest Moon 64, r4
- SET_ACCUM_L(s1, i);
- CLEAR_COMPARE_FLAG(i);
- }
- else
- {
- SET_ACCUM_L(-((UINT16)s2), i);
- SET_COMPARE_FLAG(i);
- }
- }
- else
- {
- if (((UINT32)(UINT16)(s1) + (UINT32)(UINT16)(s2)) != 0)
- {
- SET_ACCUM_L(s1, i);
- CLEAR_COMPARE_FLAG(i);
- }
- else
- {
- SET_ACCUM_L(-((UINT16)s2), i);
- SET_COMPARE_FLAG(i);
- }
- }
- }
- }
- else//CARRY_FLAG(rsp, i)==0
- {
- if (ZERO_FLAG(rsp, i) != 0)
- {
- if (CLIP2_FLAG(rsp, i) != 0)
- {
- SET_ACCUM_L(s2, i);
- }
- else
- {
- SET_ACCUM_L(s1, i);
- }
- }
- else
- {
- if (((INT32)(UINT16)s1 - (INT32)(UINT16)s2) >= 0)
- {
- SET_ACCUM_L(s2, i);
- SET_CLIP2_FLAG(i);
- }
- else
- {
- SET_ACCUM_L(s1, i);
- CLEAR_CLIP2_FLAG(i);
- }
- }
- }
- vres[i] = ACCUM_L(rsp, i);
- }
+ if (CARRY_FLAG(rsp, i) != 0)
+ {
+ if (ZERO_FLAG(rsp, i) != 0)
+ {
+ if (COMPARE_FLAG(rsp, i) != 0)
+ {
+ SET_ACCUM_L(-(UINT16)s2, i);
+ }
+ else
+ {
+ SET_ACCUM_L(s1, i);
+ }
+ }
+ else//ZERO_FLAG(rsp, i)==0
+ {
+ if (CLIP1_FLAG(rsp, i) != 0)
+ {
+ if (((UINT32)(UINT16)(s1) + (UINT32)(UINT16)(s2)) > 0x10000)
+ {//proper fix for Harvest Moon 64, r4
+ SET_ACCUM_L(s1, i);
+ CLEAR_COMPARE_FLAG(i);
+ }
+ else
+ {
+ SET_ACCUM_L(-((UINT16)s2), i);
+ SET_COMPARE_FLAG(i);
+ }
+ }
+ else
+ {
+ if (((UINT32)(UINT16)(s1) + (UINT32)(UINT16)(s2)) != 0)
+ {
+ SET_ACCUM_L(s1, i);
+ CLEAR_COMPARE_FLAG(i);
+ }
+ else
+ {
+ SET_ACCUM_L(-((UINT16)s2), i);
+ SET_COMPARE_FLAG(i);
+ }
+ }
+ }
+ }
+ else//CARRY_FLAG(rsp, i)==0
+ {
+ if (ZERO_FLAG(rsp, i) != 0)
+ {
+ if (CLIP2_FLAG(rsp, i) != 0)
+ {
+ SET_ACCUM_L(s2, i);
+ }
+ else
+ {
+ SET_ACCUM_L(s1, i);
+ }
+ }
+ else
+ {
+ if (((INT32)(UINT16)s1 - (INT32)(UINT16)s2) >= 0)
+ {
+ SET_ACCUM_L(s2, i);
+ SET_CLIP2_FLAG(i);
+ }
+ else
+ {
+ SET_ACCUM_L(s1, i);
+ CLEAR_CLIP2_FLAG(i);
+ }
+ }
+ }
+ vres[i] = ACCUM_L(rsp, i);
+ }
CLEAR_ZERO_FLAGS();
CLEAR_CARRY_FLAGS();
CLEAR_CLIP1_FLAGS();
- WRITEBACK_RESULT();
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vch(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100101 |
- // ------------------------------------------------------
- //
- // Vector clip high
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100101 |
+ // ------------------------------------------------------
+ //
+ // Vector clip high
CLEAR_CARRY_FLAGS();
CLEAR_COMPARE_FLAGS();
@@ -3954,173 +3954,173 @@ INLINE void cfunc_rsp_vch(void *param)
CLEAR_CLIP2_FLAGS();
#if 0//USE_SIMD
- // Compare flag
- // flag[1] bit [0- 7] set if (s1 ^ s2) < 0 && (s1 + s2) <= 0)
- // flag[1] bit [0- 7] set if (s1 ^ s2) >= 0 && (s2 < 0)
-
- // flag[1] bit [8-15] set if (s1 ^ s2) < 0 && (s2 < 0)
- // flag[1] bit [8-15] set if (s1 ^ s2) >= 0 && (s1 - s2) >= 0
-
- // Carry flag
- // flag[0] bit [0- 7] set if (s1 ^ s2) < 0
-
- // Zero flag
- // flag[0] bit [8-15] set if (s1 ^ s2) < 0 && (s1 + s2) != 0 && (s1 != ~s2)
- // flag[0] bit [8-15] set if (s1 ^ s2) >= 0 && (s1 - s2) != 0 && (s1 != ~s2)
-
- // flag[2] bit [0- 7] set if (s1 ^ s2) < 0 && (s1 + s2) == -1
-
- // accum set to -s2 if (s1 ^ s2) < 0 && (s1 + s2) <= 0)
- // accum set to -s2 if (s1 ^ s2) >= 0 && (s1 - s2) >= 0
-
- // accum set to s1 if (s1 ^ s2) < 0 && (s1 + s2) > 0)
- // accum set to s1 if (s1 ^ s2) >= 0 && (s1 - s2) < 0
-
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- __m128i s1_xor_s2 = _mm_xor_si128(rsp->xv[VS1REG], shuf);
- __m128i s1_plus_s2 = _mm_add_epi16(rsp->xv[VS1REG], shuf);
- __m128i s1_sub_s2 = _mm_sub_epi16(rsp->xv[VS1REG], shuf);
- __m128i s2_neg = _mm_xor_si128(shuf, vec_neg1);
-
- __m128i s2_lz = _mm_cmplt_epi16(shuf, _mm_setzero_si128());
- __m128i s1s2_xor_lz = _mm_cmplt_epi16(s1_xor_s2, _mm_setzero_si128());
- __m128i s1s2_xor_gez = _mm_xor_si128(s1s2_xor_lz, vec_neg1);
- __m128i s1s2_plus_nz = _mm_xor_si128(_mm_cmpeq_epi16(s1_plus_s2, _mm_setzero_si128()), vec_neg1);
- __m128i s1s2_plus_gz = _mm_cmpgt_epi16(s1_plus_s2, _mm_setzero_si128());
- __m128i s1s2_plus_lez = _mm_xor_si128(s1s2_plus_gz, vec_neg1);
- __m128i s1s2_plus_n1 = _mm_cmpeq_epi16(s1_plus_s2, vec_neg1);
- __m128i s1s2_sub_nz = _mm_xor_si128(_mm_cmpeq_epi16(s1_sub_s2, _mm_setzero_si128()), vec_neg1);
- __m128i s1s2_sub_lz = _mm_cmplt_epi16(s1_sub_s2, _mm_setzero_si128());
- __m128i s1s2_sub_gez = _mm_xor_si128(s1s2_sub_lz, vec_neg1);
- __m128i s1_nens2 = _mm_xor_si128(_mm_cmpeq_epi16(rsp->xv[VS1REG], s2_neg), vec_neg1);
-
- __m128i ext_mask = _mm_and_si128(_mm_and_si128(s1s2_xor_lz, s1s2_plus_n1), vec_flagmask);
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 0) << 0;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 1) << 1;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 2) << 2;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 3) << 3;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 4) << 4;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 5) << 5;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 6) << 6;
- rsp->flag[2] |= _mm_extract_epi16(ext_mask, 7) << 7;
-
- __m128i carry_mask = _mm_and_si128(s1s2_xor_lz, vec_flagmask);
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 0) << 0;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 1) << 1;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 2) << 2;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 3) << 3;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 4) << 4;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 5) << 5;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 6) << 6;
- rsp->flag[0] |= _mm_extract_epi16(carry_mask, 7) << 7;
-
- __m128i z0_mask = _mm_and_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_nz), s1_nens2);
- __m128i z1_mask = _mm_and_si128(_mm_and_si128(s1s2_xor_lz, s1s2_plus_nz), s1_nens2);
- __m128i z_mask = _mm_and_si128(_mm_or_si128(z0_mask, z1_mask), vec_flagmask);
- z_mask = _mm_and_si128(_mm_or_si128(z_mask, _mm_srli_epi32(z_mask, 15)), vec_shiftmask2);
- z_mask = _mm_and_si128(_mm_or_si128(z_mask, _mm_srli_epi64(z_mask, 30)), vec_shiftmask4);
- z_mask = _mm_or_si128(z_mask, _mm_srli_si128(z_mask, 7));
- z_mask = _mm_or_si128(z_mask, _mm_srli_epi16(z_mask, 4));
- rsp->flag[0] |= (_mm_extract_epi16(z_mask, 0) << 8) & 0x00ff00;
-
- __m128i f0_mask = _mm_and_si128(_mm_or_si128(_mm_and_si128(s1s2_xor_gez, s2_lz), _mm_and_si128(s1s2_xor_lz, s1s2_plus_lez)), vec_flagmask);
- __m128i f8_mask = _mm_and_si128(_mm_or_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_gez), _mm_and_si128(s1s2_xor_lz, s2_lz)), vec_flagmask);
- f0_mask = _mm_and_si128(f0_mask, vec_flagmask);
- f8_mask = _mm_and_si128(f8_mask, vec_flagmask);
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 0) << 0;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 1) << 1;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 2) << 2;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 3) << 3;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 4) << 4;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 5) << 5;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 6) << 6;
- rsp->flag[1] |= _mm_extract_epi16(f0_mask, 7) << 7;
-
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 0) << 8;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 1) << 9;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 2) << 10;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 3) << 11;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 4) << 12;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 5) << 13;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 6) << 14;
- rsp->flag[1] |= _mm_extract_epi16(f8_mask, 7) << 15;
+ // Compare flag
+ // flag[1] bit [0- 7] set if (s1 ^ s2) < 0 && (s1 + s2) <= 0)
+ // flag[1] bit [0- 7] set if (s1 ^ s2) >= 0 && (s2 < 0)
+
+ // flag[1] bit [8-15] set if (s1 ^ s2) < 0 && (s2 < 0)
+ // flag[1] bit [8-15] set if (s1 ^ s2) >= 0 && (s1 - s2) >= 0
+
+ // Carry flag
+ // flag[0] bit [0- 7] set if (s1 ^ s2) < 0
+
+ // Zero flag
+ // flag[0] bit [8-15] set if (s1 ^ s2) < 0 && (s1 + s2) != 0 && (s1 != ~s2)
+ // flag[0] bit [8-15] set if (s1 ^ s2) >= 0 && (s1 - s2) != 0 && (s1 != ~s2)
+
+ // flag[2] bit [0- 7] set if (s1 ^ s2) < 0 && (s1 + s2) == -1
+
+ // accum set to -s2 if (s1 ^ s2) < 0 && (s1 + s2) <= 0)
+ // accum set to -s2 if (s1 ^ s2) >= 0 && (s1 - s2) >= 0
+
+ // accum set to s1 if (s1 ^ s2) < 0 && (s1 + s2) > 0)
+ // accum set to s1 if (s1 ^ s2) >= 0 && (s1 - s2) < 0
+
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i s1_xor_s2 = _mm_xor_si128(rsp->xv[VS1REG], shuf);
+ __m128i s1_plus_s2 = _mm_add_epi16(rsp->xv[VS1REG], shuf);
+ __m128i s1_sub_s2 = _mm_sub_epi16(rsp->xv[VS1REG], shuf);
+ __m128i s2_neg = _mm_xor_si128(shuf, vec_neg1);
+
+ __m128i s2_lz = _mm_cmplt_epi16(shuf, _mm_setzero_si128());
+ __m128i s1s2_xor_lz = _mm_cmplt_epi16(s1_xor_s2, _mm_setzero_si128());
+ __m128i s1s2_xor_gez = _mm_xor_si128(s1s2_xor_lz, vec_neg1);
+ __m128i s1s2_plus_nz = _mm_xor_si128(_mm_cmpeq_epi16(s1_plus_s2, _mm_setzero_si128()), vec_neg1);
+ __m128i s1s2_plus_gz = _mm_cmpgt_epi16(s1_plus_s2, _mm_setzero_si128());
+ __m128i s1s2_plus_lez = _mm_xor_si128(s1s2_plus_gz, vec_neg1);
+ __m128i s1s2_plus_n1 = _mm_cmpeq_epi16(s1_plus_s2, vec_neg1);
+ __m128i s1s2_sub_nz = _mm_xor_si128(_mm_cmpeq_epi16(s1_sub_s2, _mm_setzero_si128()), vec_neg1);
+ __m128i s1s2_sub_lz = _mm_cmplt_epi16(s1_sub_s2, _mm_setzero_si128());
+ __m128i s1s2_sub_gez = _mm_xor_si128(s1s2_sub_lz, vec_neg1);
+ __m128i s1_nens2 = _mm_xor_si128(_mm_cmpeq_epi16(rsp->xv[VS1REG], s2_neg), vec_neg1);
+
+ __m128i ext_mask = _mm_and_si128(_mm_and_si128(s1s2_xor_lz, s1s2_plus_n1), vec_flagmask);
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 0) << 0;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 1) << 1;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 2) << 2;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 3) << 3;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 4) << 4;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 5) << 5;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 6) << 6;
+ rsp->flag[2] |= _mm_extract_epi16(ext_mask, 7) << 7;
+
+ __m128i carry_mask = _mm_and_si128(s1s2_xor_lz, vec_flagmask);
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 0) << 0;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 1) << 1;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 2) << 2;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 3) << 3;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 4) << 4;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 5) << 5;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 6) << 6;
+ rsp->flag[0] |= _mm_extract_epi16(carry_mask, 7) << 7;
+
+ __m128i z0_mask = _mm_and_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_nz), s1_nens2);
+ __m128i z1_mask = _mm_and_si128(_mm_and_si128(s1s2_xor_lz, s1s2_plus_nz), s1_nens2);
+ __m128i z_mask = _mm_and_si128(_mm_or_si128(z0_mask, z1_mask), vec_flagmask);
+ z_mask = _mm_and_si128(_mm_or_si128(z_mask, _mm_srli_epi32(z_mask, 15)), vec_shiftmask2);
+ z_mask = _mm_and_si128(_mm_or_si128(z_mask, _mm_srli_epi64(z_mask, 30)), vec_shiftmask4);
+ z_mask = _mm_or_si128(z_mask, _mm_srli_si128(z_mask, 7));
+ z_mask = _mm_or_si128(z_mask, _mm_srli_epi16(z_mask, 4));
+ rsp->flag[0] |= (_mm_extract_epi16(z_mask, 0) << 8) & 0x00ff00;
+
+ __m128i f0_mask = _mm_and_si128(_mm_or_si128(_mm_and_si128(s1s2_xor_gez, s2_lz), _mm_and_si128(s1s2_xor_lz, s1s2_plus_lez)), vec_flagmask);
+ __m128i f8_mask = _mm_and_si128(_mm_or_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_gez), _mm_and_si128(s1s2_xor_lz, s2_lz)), vec_flagmask);
+ f0_mask = _mm_and_si128(f0_mask, vec_flagmask);
+ f8_mask = _mm_and_si128(f8_mask, vec_flagmask);
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 0) << 0;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 1) << 1;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 2) << 2;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 3) << 3;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 4) << 4;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 5) << 5;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 6) << 6;
+ rsp->flag[1] |= _mm_extract_epi16(f0_mask, 7) << 7;
+
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 0) << 8;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 1) << 9;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 2) << 10;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 3) << 11;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 4) << 12;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 5) << 13;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 6) << 14;
+ rsp->flag[1] |= _mm_extract_epi16(f8_mask, 7) << 15;
#else
- INT16 vres[8];
- UINT32 vce = 0;
- for (int i = 0; i < 8; i++)
- {
- INT16 s1, s2;
+ INT16 vres[8];
+ UINT32 vce = 0;
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- if ((s1 ^ s2) < 0)
- {
- vce = (s1 + s2 == -1);
- SET_CARRY_FLAG(i);
- if (s2 < 0)
- {
+ if ((s1 ^ s2) < 0)
+ {
+ vce = (s1 + s2 == -1);
+ SET_CARRY_FLAG(i);
+ if (s2 < 0)
+ {
SET_CLIP2_FLAG(i);
- }
-
- if ((s1 + s2) <= 0)
- {
- SET_COMPARE_FLAG(i);
- vres[i] = -((UINT16)s2);
- }
- else
- {
- vres[i] = s1;
- }
-
- if ((s1 + s2) != 0 && s1 != ~s2)
- {
- SET_ZERO_FLAG(i);
- }
- }//sign
- else
- {
- vce = 0;
- if (s2 < 0)
- {
- SET_COMPARE_FLAG(i);
- }
- if ((s1 - s2) >= 0)
- {
+ }
+
+ if ((s1 + s2) <= 0)
+ {
+ SET_COMPARE_FLAG(i);
+ vres[i] = -((UINT16)s2);
+ }
+ else
+ {
+ vres[i] = s1;
+ }
+
+ if ((s1 + s2) != 0 && s1 != ~s2)
+ {
+ SET_ZERO_FLAG(i);
+ }
+ }//sign
+ else
+ {
+ vce = 0;
+ if (s2 < 0)
+ {
+ SET_COMPARE_FLAG(i);
+ }
+ if ((s1 - s2) >= 0)
+ {
SET_CLIP2_FLAG(i);
- vres[i] = s2;
- }
- else
- {
- vres[i] = s1;
- }
-
- if ((s1 - s2) != 0 && s1 != ~s2)
- {
- SET_ZERO_FLAG(i);
- }
- }
- if (vce)
- {
- SET_CLIP1_FLAG(i);
+ vres[i] = s2;
+ }
+ else
+ {
+ vres[i] = s1;
+ }
+
+ if ((s1 - s2) != 0 && s1 != ~s2)
+ {
+ SET_ZERO_FLAG(i);
+ }
}
- SET_ACCUM_L(vres[i], i);
- }
- WRITEBACK_RESULT();
+ if (vce)
+ {
+ SET_CLIP1_FLAG(i);
+ }
+ SET_ACCUM_L(vres[i], i);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vcr(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100110 |
- // ------------------------------------------------------
- //
- // Vector clip reverse
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100110 |
+ // ------------------------------------------------------
+ //
+ // Vector clip reverse
CLEAR_CARRY_FLAGS();
CLEAR_COMPARE_FLAGS();
@@ -4129,716 +4129,716 @@ INLINE void cfunc_rsp_vcr(void *param)
CLEAR_CLIP2_FLAGS();
#if 0//USE_SIMD
- // flag[1] bit [0- 7] set if (s1 ^ s2) < 0 && (s1 + s2) <= 0)
- // flag[1] bit [0- 7] set if (s1 ^ s2) >= 0 && (s2 < 0)
-
- // flag[1] bit [8-15] set if (s1 ^ s2) < 0 && (s2 < 0)
- // flag[1] bit [8-15] set if (s1 ^ s2) >= 0 && (s1 - s2) >= 0
-
- // accum set to ~s2 if (s1 ^ s2) < 0 && (s1 + s2) <= 0)
- // accum set to ~s2 if (s1 ^ s2) >= 0 && (s1 - s2) >= 0
-
- // accum set to s1 if (s1 ^ s2) < 0 && (s1 + s2) > 0)
- // accum set to s1 if (s1 ^ s2) >= 0 && (s1 - s2) < 0
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- __m128i s1_xor_s2 = _mm_xor_si128(rsp->xv[VS1REG], shuf);
- __m128i s1_plus_s2 = _mm_add_epi16(rsp->xv[VS1REG], shuf);
- __m128i s1_sub_s2 = _mm_sub_epi16(rsp->xv[VS1REG], shuf);
- __m128i s2_neg = _mm_xor_si128(shuf, vec_neg1);
-
- __m128i s2_lz = _mm_cmplt_epi16(shuf, _mm_setzero_si128());
- __m128i s1s2_xor_lz = _mm_cmplt_epi16(s1_xor_s2, _mm_setzero_si128());
- __m128i s1s2_xor_gez = _mm_xor_si128(s1s2_xor_lz, vec_neg1);
- __m128i s1s2_plus_gz = _mm_cmpgt_epi16(s1_plus_s2, _mm_setzero_si128());
- __m128i s1s2_plus_lez = _mm_xor_si128(s1s2_plus_gz, vec_neg1);
- __m128i s1s2_sub_lz = _mm_cmplt_epi16(s1_sub_s2, _mm_setzero_si128());
- __m128i s1s2_sub_gez = _mm_xor_si128(s1s2_sub_lz, vec_neg1);
-
- __m128i s1_mask = _mm_or_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_lz), _mm_and_si128(s1s2_xor_lz, s1s2_plus_gz));
- __m128i s2_mask = _mm_or_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_gez), _mm_and_si128(s1s2_xor_lz, s1s2_plus_lez));
- rsp->accum_l = _mm_or_si128(_mm_and_si128(rsp->xv[VS1REG], s1_mask), _mm_and_si128(s2_neg, s2_mask));
- rsp->xv[VDREG] = rsp->accum_l;
-
- rsp->xvflag[COMPARE] = _mm_or_si128(_mm_and_si128(s1s2_xor_gez, s2_lz), _mm_and_si128(s1s2_xor_lz, s1s2_plus_lez));
- rsp->xvflag[CLIP2] = _mm_or_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_gez), _mm_and_si128(s1s2_xor_lz, s2_lz));
+ // flag[1] bit [0- 7] set if (s1 ^ s2) < 0 && (s1 + s2) <= 0)
+ // flag[1] bit [0- 7] set if (s1 ^ s2) >= 0 && (s2 < 0)
+
+ // flag[1] bit [8-15] set if (s1 ^ s2) < 0 && (s2 < 0)
+ // flag[1] bit [8-15] set if (s1 ^ s2) >= 0 && (s1 - s2) >= 0
+
+ // accum set to ~s2 if (s1 ^ s2) < 0 && (s1 + s2) <= 0)
+ // accum set to ~s2 if (s1 ^ s2) >= 0 && (s1 - s2) >= 0
+
+ // accum set to s1 if (s1 ^ s2) < 0 && (s1 + s2) > 0)
+ // accum set to s1 if (s1 ^ s2) >= 0 && (s1 - s2) < 0
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i s1_xor_s2 = _mm_xor_si128(rsp->xv[VS1REG], shuf);
+ __m128i s1_plus_s2 = _mm_add_epi16(rsp->xv[VS1REG], shuf);
+ __m128i s1_sub_s2 = _mm_sub_epi16(rsp->xv[VS1REG], shuf);
+ __m128i s2_neg = _mm_xor_si128(shuf, vec_neg1);
+
+ __m128i s2_lz = _mm_cmplt_epi16(shuf, _mm_setzero_si128());
+ __m128i s1s2_xor_lz = _mm_cmplt_epi16(s1_xor_s2, _mm_setzero_si128());
+ __m128i s1s2_xor_gez = _mm_xor_si128(s1s2_xor_lz, vec_neg1);
+ __m128i s1s2_plus_gz = _mm_cmpgt_epi16(s1_plus_s2, _mm_setzero_si128());
+ __m128i s1s2_plus_lez = _mm_xor_si128(s1s2_plus_gz, vec_neg1);
+ __m128i s1s2_sub_lz = _mm_cmplt_epi16(s1_sub_s2, _mm_setzero_si128());
+ __m128i s1s2_sub_gez = _mm_xor_si128(s1s2_sub_lz, vec_neg1);
+
+ __m128i s1_mask = _mm_or_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_lz), _mm_and_si128(s1s2_xor_lz, s1s2_plus_gz));
+ __m128i s2_mask = _mm_or_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_gez), _mm_and_si128(s1s2_xor_lz, s1s2_plus_lez));
+ rsp->accum_l = _mm_or_si128(_mm_and_si128(rsp->xv[VS1REG], s1_mask), _mm_and_si128(s2_neg, s2_mask));
+ rsp->xv[VDREG] = rsp->accum_l;
+
+ rsp->xvflag[COMPARE] = _mm_or_si128(_mm_and_si128(s1s2_xor_gez, s2_lz), _mm_and_si128(s1s2_xor_lz, s1s2_plus_lez));
+ rsp->xvflag[CLIP2] = _mm_or_si128(_mm_and_si128(s1s2_xor_gez, s1s2_sub_gez), _mm_and_si128(s1s2_xor_lz, s2_lz));
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- INT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- if ((INT16)(s1 ^ s2) < 0)
- {
- if (s2 < 0)
- {
+ if ((INT16)(s1 ^ s2) < 0)
+ {
+ if (s2 < 0)
+ {
SET_CLIP2_FLAG(i);
- }
- if ((s1 + s2) <= 0)
- {
- SET_ACCUM_L(~((UINT16)s2), i);
- SET_COMPARE_FLAG(i);
- }
- else
- {
- SET_ACCUM_L(s1, i);
- }
- }
- else
- {
- if (s2 < 0)
- {
- SET_COMPARE_FLAG(i);
- }
- if ((s1 - s2) >= 0)
- {
- SET_ACCUM_L(s2, i);
+ }
+ if ((s1 + s2) <= 0)
+ {
+ SET_ACCUM_L(~((UINT16)s2), i);
+ SET_COMPARE_FLAG(i);
+ }
+ else
+ {
+ SET_ACCUM_L(s1, i);
+ }
+ }
+ else
+ {
+ if (s2 < 0)
+ {
+ SET_COMPARE_FLAG(i);
+ }
+ if ((s1 - s2) >= 0)
+ {
+ SET_ACCUM_L(s2, i);
SET_CLIP2_FLAG(i);
- }
- else
- {
- SET_ACCUM_L(s1, i);
- }
- }
-
- vres[i] = ACCUM_L(rsp, i);
- }
- WRITEBACK_RESULT();
+ }
+ else
+ {
+ SET_ACCUM_L(s1, i);
+ }
+ }
+
+ vres[i] = ACCUM_L(rsp, i);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vmrg(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100111 |
- // ------------------------------------------------------
- //
- // Merges two vectors according to compare flags
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 100111 |
+ // ------------------------------------------------------
+ //
+ // Merges two vectors according to compare flags
#if USE_SIMD
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- __m128i s2mask = _mm_cmpeq_epi16(rsp->xvflag[COMPARE], _mm_setzero_si128());
- __m128i s1mask = _mm_xor_si128(s2mask, vec_neg1);
- __m128i result = _mm_and_si128(rsp->xv[VS1REG], s1mask);
- rsp->xv[VDREG] = _mm_or_si128(result, _mm_and_si128(shuf, s2mask));
- rsp->accum_l = rsp->xv[VDREG];
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ __m128i s2mask = _mm_cmpeq_epi16(rsp->xvflag[COMPARE], _mm_setzero_si128());
+ __m128i s1mask = _mm_xor_si128(s2mask, vec_neg1);
+ __m128i result = _mm_and_si128(rsp->xv[VS1REG], s1mask);
+ rsp->xv[VDREG] = _mm_or_si128(result, _mm_and_si128(shuf, s2mask));
+ rsp->accum_l = rsp->xv[VDREG];
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- INT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ INT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- if (COMPARE_FLAG(rsp, i) != 0)
- {
- vres[i] = s1;
- }
- else
- {
- vres[i] = s2;
- }
-
- SET_ACCUM_L(vres[i], i);
- }
- WRITEBACK_RESULT();
+ if (COMPARE_FLAG(rsp, i) != 0)
+ {
+ vres[i] = s1;
+ }
+ else
+ {
+ vres[i] = s2;
+ }
+
+ SET_ACCUM_L(vres[i], i);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vand(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 101000 |
- // ------------------------------------------------------
- //
- // Bitwise AND of two vector registers
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 101000 |
+ // ------------------------------------------------------
+ //
+ // Bitwise AND of two vector registers
#if USE_SIMD
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- rsp->xv[VDREG] = _mm_and_si128(rsp->xv[VS1REG], shuf);
- rsp->accum_l = rsp->xv[VDREG];
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ rsp->xv[VDREG] = _mm_and_si128(rsp->xv[VS1REG], shuf);
+ rsp->accum_l = rsp->xv[VDREG];
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- vres[i] = s1 & s2;
- SET_ACCUM_L(vres[i], i);
- }
- WRITEBACK_RESULT();
+ vres[i] = s1 & s2;
+ SET_ACCUM_L(vres[i], i);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vnand(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 101001 |
- // ------------------------------------------------------
- //
- // Bitwise NOT AND of two vector registers
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 101001 |
+ // ------------------------------------------------------
+ //
+ // Bitwise NOT AND of two vector registers
#if USE_SIMD
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- rsp->xv[VDREG] = _mm_xor_si128(_mm_and_si128(rsp->xv[VS1REG], shuf), vec_neg1);
- rsp->accum_l = rsp->xv[VDREG];
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ rsp->xv[VDREG] = _mm_xor_si128(_mm_and_si128(rsp->xv[VS1REG], shuf), vec_neg1);
+ rsp->accum_l = rsp->xv[VDREG];
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- vres[i] = ~((s1 & s2));
- SET_ACCUM_L(vres[i], i);
- }
- WRITEBACK_RESULT();
+ vres[i] = ~((s1 & s2));
+ SET_ACCUM_L(vres[i], i);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vor(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 101010 |
- // ------------------------------------------------------
- //
- // Bitwise OR of two vector registers
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 101010 |
+ // ------------------------------------------------------
+ //
+ // Bitwise OR of two vector registers
#if USE_SIMD
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- rsp->xv[VDREG] = _mm_or_si128(rsp->xv[VS1REG], shuf);
- rsp->accum_l = rsp->xv[VDREG];
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ rsp->xv[VDREG] = _mm_or_si128(rsp->xv[VS1REG], shuf);
+ rsp->accum_l = rsp->xv[VDREG];
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- vres[i] = s1 | s2;
- SET_ACCUM_L(vres[i], i);
- }
- WRITEBACK_RESULT();
+ vres[i] = s1 | s2;
+ SET_ACCUM_L(vres[i], i);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vnor(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 101011 |
- // ------------------------------------------------------
- //
- // Bitwise NOT OR of two vector registers
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 101011 |
+ // ------------------------------------------------------
+ //
+ // Bitwise NOT OR of two vector registers
#if USE_SIMD
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- rsp->xv[VDREG] = _mm_xor_si128(_mm_or_si128(rsp->xv[VS1REG], shuf), vec_neg1);
- rsp->accum_l = rsp->xv[VDREG];
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ rsp->xv[VDREG] = _mm_xor_si128(_mm_or_si128(rsp->xv[VS1REG], shuf), vec_neg1);
+ rsp->accum_l = rsp->xv[VDREG];
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- vres[i] = ~(s1 | s2);
- SET_ACCUM_L(vres[i], i);
- }
- WRITEBACK_RESULT();
+ vres[i] = ~(s1 | s2);
+ SET_ACCUM_L(vres[i], i);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vxor(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 101100 |
- // ------------------------------------------------------
- //
- // Bitwise XOR of two vector registers
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 101100 |
+ // ------------------------------------------------------
+ //
+ // Bitwise XOR of two vector registers
#if USE_SIMD
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- rsp->xv[VDREG] = _mm_xor_si128(rsp->xv[VS1REG], shuf);
- rsp->accum_l = rsp->xv[VDREG];
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ rsp->xv[VDREG] = _mm_xor_si128(rsp->xv[VS1REG], shuf);
+ rsp->accum_l = rsp->xv[VDREG];
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- vres[i] = s1 ^ s2;
- SET_ACCUM_L(vres[i], i);
- }
- WRITEBACK_RESULT();
+ vres[i] = s1 ^ s2;
+ SET_ACCUM_L(vres[i], i);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vnxor(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 101101 |
- // ------------------------------------------------------
- //
- // Bitwise NOT XOR of two vector registers
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | TTTTT | DDDDD | 101101 |
+ // ------------------------------------------------------
+ //
+ // Bitwise NOT XOR of two vector registers
#if USE_SIMD
- __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- rsp->xv[VDREG] = _mm_xor_si128(_mm_xor_si128(rsp->xv[VS1REG], shuf), vec_neg1);
- rsp->accum_l = rsp->xv[VDREG];
+ __m128i shuf = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ rsp->xv[VDREG] = _mm_xor_si128(_mm_xor_si128(rsp->xv[VS1REG], shuf), vec_neg1);
+ rsp->accum_l = rsp->xv[VDREG];
#else
- INT16 vres[8];
- for (int i = 0; i < 8; i++)
- {
- UINT16 s1, s2;
+ INT16 vres[8];
+ for (int i = 0; i < 8; i++)
+ {
+ UINT16 s1, s2;
SCALAR_GET_VS1(s1, i);
SCALAR_GET_VS2(s2, i);
- vres[i] = ~(s1 ^ s2);
- SET_ACCUM_L(vres[i], i);
- }
- WRITEBACK_RESULT();
+ vres[i] = ~(s1 ^ s2);
+ SET_ACCUM_L(vres[i], i);
+ }
+ WRITEBACK_RESULT();
#endif
}
INLINE void cfunc_rsp_vrcp(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | ?FFFF | DDDDD | 110000 |
- // ------------------------------------------------------
- //
- // Calculates reciprocal
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | ?FFFF | DDDDD | 110000 |
+ // ------------------------------------------------------
+ //
+ // Calculates reciprocal
- INT32 shifter = 0;
+ INT32 shifter = 0;
#if USE_SIMD
- UINT16 urec;
- INT32 rec;
- SIMD_EXTRACT16(rsp->xv[VS2REG], urec, EL);
- rec = (INT16)urec;
+ UINT16 urec;
+ INT32 rec;
+ SIMD_EXTRACT16(rsp->xv[VS2REG], urec, EL);
+ rec = (INT16)urec;
#else
- INT32 rec = (INT16)(VREG_S(VS2REG, EL & 7));
+ INT32 rec = (INT16)(VREG_S(VS2REG, EL & 7));
#endif
- INT32 datainput = (rec < 0) ? (-rec) : rec;
- if (datainput)
- {
- for (int i = 0; i < 32; i++)
- {
- if (datainput & (1 << ((~i) & 0x1f)))
- {
- shifter = i;
- break;
- }
- }
- }
- else
- {
- shifter = 0x10;
- }
-
- INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
- INT32 fetchval = rsp_divtable[address];
- INT32 temp = (0x40000000 | (fetchval << 14)) >> ((~shifter) & 0x1f);
- if (rec < 0)
- {
- temp = ~temp;
- }
- if (!rec)
- {
- temp = 0x7fffffff;
- }
- else if (rec == 0xffff8000)
- {
- temp = 0xffff0000;
- }
- rec = temp;
-
- rsp->reciprocal_res = rec;
- rsp->dp_allowed = 0;
+ INT32 datainput = (rec < 0) ? (-rec) : rec;
+ if (datainput)
+ {
+ for (int i = 0; i < 32; i++)
+ {
+ if (datainput & (1 << ((~i) & 0x1f)))
+ {
+ shifter = i;
+ break;
+ }
+ }
+ }
+ else
+ {
+ shifter = 0x10;
+ }
+
+ INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
+ INT32 fetchval = rsp_divtable[address];
+ INT32 temp = (0x40000000 | (fetchval << 14)) >> ((~shifter) & 0x1f);
+ if (rec < 0)
+ {
+ temp = ~temp;
+ }
+ if (!rec)
+ {
+ temp = 0x7fffffff;
+ }
+ else if (rec == 0xffff8000)
+ {
+ temp = 0xffff0000;
+ }
+ rec = temp;
+
+ rsp->reciprocal_res = rec;
+ rsp->dp_allowed = 0;
#if USE_SIMD
- SIMD_INSERT16(rsp->xv[VDREG], (UINT16)rec, VS1REG);
- rsp->accum_l = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ SIMD_INSERT16(rsp->xv[VDREG], (UINT16)rec, VS1REG);
+ rsp->accum_l = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
#else
- W_VREG_S(VDREG, VS1REG & 7) = (UINT16)rec;
- for (int i = 0; i < 8; i++)
- {
- SET_ACCUM_L(VREG_S(VS2REG, VEC_EL_2(EL, i)), i);
- }
+ W_VREG_S(VDREG, VS1REG & 7) = (UINT16)rec;
+ for (int i = 0; i < 8; i++)
+ {
+ SET_ACCUM_L(VREG_S(VS2REG, VEC_EL_2(EL, i)), i);
+ }
#endif
}
INLINE void cfunc_rsp_vrcpl(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | ?FFFF | DDDDD | 110001 |
- // ------------------------------------------------------
- //
- // Calculates reciprocal low part
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | ?FFFF | DDDDD | 110001 |
+ // ------------------------------------------------------
+ //
+ // Calculates reciprocal low part
- INT32 shifter = 0;
+ INT32 shifter = 0;
#if USE_SIMD
- UINT16 urec;
- SIMD_EXTRACT16(rsp->xv[VS2REG], urec, EL);
- INT32 rec = (urec | rsp->reciprocal_high);
+ UINT16 urec;
+ SIMD_EXTRACT16(rsp->xv[VS2REG], urec, EL);
+ INT32 rec = (urec | rsp->reciprocal_high);
#else
- INT32 rec = ((UINT16)(VREG_S(VS2REG, EL & 7)) | rsp->reciprocal_high);
+ INT32 rec = ((UINT16)(VREG_S(VS2REG, EL & 7)) | rsp->reciprocal_high);
#endif
- INT32 datainput = rec;
-
- if (rec < 0)
- {
- if (rsp->dp_allowed)
- {
- if (rec < -32768)
- {
- datainput = ~datainput;
- }
- else
- {
- datainput = -datainput;
- }
- }
- else
- {
- datainput = -datainput;
- }
- }
-
-
- if (datainput)
- {
- for (int i = 0; i < 32; i++)
- {
- if (datainput & (1 << ((~i) & 0x1f)))
- {
- shifter = i;
- break;
- }
- }
- }
- else
- {
- if (rsp->dp_allowed)
- {
- shifter = 0;
- }
- else
- {
- shifter = 0x10;
- }
- }
-
- INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
- INT32 fetchval = rsp_divtable[address];
- INT32 temp = (0x40000000 | (fetchval << 14)) >> ((~shifter) & 0x1f);
- if (rec < 0)
- {
- temp = ~temp;
- }
- if (!rec)
- {
- temp = 0x7fffffff;
- }
- else if (rec == 0xffff8000)
- {
- temp = 0xffff0000;
- }
- rec = temp;
-
- rsp->reciprocal_res = rec;
- rsp->dp_allowed = 0;
+ INT32 datainput = rec;
+
+ if (rec < 0)
+ {
+ if (rsp->dp_allowed)
+ {
+ if (rec < -32768)
+ {
+ datainput = ~datainput;
+ }
+ else
+ {
+ datainput = -datainput;
+ }
+ }
+ else
+ {
+ datainput = -datainput;
+ }
+ }
+
+
+ if (datainput)
+ {
+ for (int i = 0; i < 32; i++)
+ {
+ if (datainput & (1 << ((~i) & 0x1f)))
+ {
+ shifter = i;
+ break;
+ }
+ }
+ }
+ else
+ {
+ if (rsp->dp_allowed)
+ {
+ shifter = 0;
+ }
+ else
+ {
+ shifter = 0x10;
+ }
+ }
+
+ INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
+ INT32 fetchval = rsp_divtable[address];
+ INT32 temp = (0x40000000 | (fetchval << 14)) >> ((~shifter) & 0x1f);
+ if (rec < 0)
+ {
+ temp = ~temp;
+ }
+ if (!rec)
+ {
+ temp = 0x7fffffff;
+ }
+ else if (rec == 0xffff8000)
+ {
+ temp = 0xffff0000;
+ }
+ rec = temp;
+
+ rsp->reciprocal_res = rec;
+ rsp->dp_allowed = 0;
#if USE_SIMD
- SIMD_INSERT16(rsp->xv[VDREG], (UINT16)rec, VS1REG);
+ SIMD_INSERT16(rsp->xv[VDREG], (UINT16)rec, VS1REG);
#else
- W_VREG_S(VDREG, VS1REG & 7) = (UINT16)rec;
+ W_VREG_S(VDREG, VS1REG & 7) = (UINT16)rec;
#endif
- for (int i = 0; i < 8; i++)
- {
+ for (int i = 0; i < 8; i++)
+ {
#if USE_SIMD
- INT16 val;
- SIMD_EXTRACT16(rsp->xv[VS2REG], val, VEC_EL_2(EL, i));
+ INT16 val;
+ SIMD_EXTRACT16(rsp->xv[VS2REG], val, VEC_EL_2(EL, i));
#else
INT16 val = VREG_S(VS2REG, VEC_EL_2(EL, i));
#endif
- SET_ACCUM_L(val, i);
- }
+ SET_ACCUM_L(val, i);
+ }
}
INLINE void cfunc_rsp_vrcph(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | ?FFFF | DDDDD | 110010 |
- // ------------------------------------------------------
- //
- // Calculates reciprocal high part
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | ?FFFF | DDDDD | 110010 |
+ // ------------------------------------------------------
+ //
+ // Calculates reciprocal high part
#if USE_SIMD
- UINT16 rcph;
- SIMD_EXTRACT16(rsp->xv[VS2REG], rcph, EL);
- rsp->reciprocal_high = rcph << 16;
- rsp->dp_allowed = 1;
+ UINT16 rcph;
+ SIMD_EXTRACT16(rsp->xv[VS2REG], rcph, EL);
+ rsp->reciprocal_high = rcph << 16;
+ rsp->dp_allowed = 1;
- rsp->accum_l = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ rsp->accum_l = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- SIMD_INSERT16(rsp->xv[VDREG], (INT16)(rsp->reciprocal_res >> 16), VS1REG);
+ SIMD_INSERT16(rsp->xv[VDREG], (INT16)(rsp->reciprocal_res >> 16), VS1REG);
#else
- rsp->reciprocal_high = (VREG_S(VS2REG, EL & 7)) << 16;
- rsp->dp_allowed = 1;
+ rsp->reciprocal_high = (VREG_S(VS2REG, EL & 7)) << 16;
+ rsp->dp_allowed = 1;
- for (int i = 0; i < 8; i++)
- {
- SET_ACCUM_L(VREG_S(VS2REG, VEC_EL_2(EL, i)), i);
- }
+ for (int i = 0; i < 8; i++)
+ {
+ SET_ACCUM_L(VREG_S(VS2REG, VEC_EL_2(EL, i)), i);
+ }
- W_VREG_S(VDREG, VS1REG & 7) = (INT16)(rsp->reciprocal_res >> 16);
+ W_VREG_S(VDREG, VS1REG & 7) = (INT16)(rsp->reciprocal_res >> 16);
#endif
}
INLINE void cfunc_rsp_vmov(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | ?FFFF | DDDDD | 110011 |
- // ------------------------------------------------------
- //
- // Moves element from vector to destination vector
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | ?FFFF | DDDDD | 110011 |
+ // ------------------------------------------------------
+ //
+ // Moves element from vector to destination vector
#if USE_SIMD
- INT16 val;
- SIMD_EXTRACT16(rsp->xv[VS2REG], val, EL);
- SIMD_INSERT16(rsp->xv[VDREG], val, VS1REG);
- rsp->accum_l = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ INT16 val;
+ SIMD_EXTRACT16(rsp->xv[VS2REG], val, EL);
+ SIMD_INSERT16(rsp->xv[VDREG], val, VS1REG);
+ rsp->accum_l = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
#else
- W_VREG_S(VDREG, VS1REG & 7) = VREG_S(VS2REG, EL & 7);
- for (int i = 0; i < 8; i++)
- {
- SET_ACCUM_L(VREG_S(VS2REG, VEC_EL_2(EL, i)), i);
- }
+ W_VREG_S(VDREG, VS1REG & 7) = VREG_S(VS2REG, EL & 7);
+ for (int i = 0; i < 8; i++)
+ {
+ SET_ACCUM_L(VREG_S(VS2REG, VEC_EL_2(EL, i)), i);
+ }
#endif
}
INLINE void cfunc_rsp_vrsql(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | ?FFFF | DDDDD | 110101 |
- // ------------------------------------------------------
- //
- // Calculates reciprocal square-root low part
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | ?FFFF | DDDDD | 110101 |
+ // ------------------------------------------------------
+ //
+ // Calculates reciprocal square-root low part
- INT32 shifter = 0;
+ INT32 shifter = 0;
#if USE_SIMD
- UINT16 val;
- SIMD_EXTRACT16(rsp->xv[VS2REG], val, EL);
- INT32 rec = rsp->reciprocal_high | val;
+ UINT16 val;
+ SIMD_EXTRACT16(rsp->xv[VS2REG], val, EL);
+ INT32 rec = rsp->reciprocal_high | val;
#else
- INT32 rec = rsp->reciprocal_high | (UINT16)VREG_S(VS2REG, EL & 7);
+ INT32 rec = rsp->reciprocal_high | (UINT16)VREG_S(VS2REG, EL & 7);
#endif
- INT32 datainput = rec;
-
- if (rec < 0)
- {
- if (rsp->dp_allowed)
- {
- if (rec < -32768)
- {
- datainput = ~datainput;
- }
- else
- {
- datainput = -datainput;
- }
- }
- else
- {
- datainput = -datainput;
- }
- }
-
- if (datainput)
- {
- for (int i = 0; i < 32; i++)
- {
- if (datainput & (1 << ((~i) & 0x1f)))
- {
- shifter = i;
- break;
- }
- }
- }
- else
- {
- if (rsp->dp_allowed)
- {
- shifter = 0;
- }
- else
- {
- shifter = 0x10;
- }
- }
-
- INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
- address = ((address | 0x200) & 0x3fe) | (shifter & 1);
-
- INT32 fetchval = rsp_divtable[address];
- INT32 temp = (0x40000000 | (fetchval << 14)) >> (((~shifter) & 0x1f) >> 1);
- if (rec < 0)
- {
- temp = ~temp;
- }
- if (!rec)
- {
- temp = 0x7fffffff;
- }
- else if (rec == 0xffff8000)
- {
- temp = 0xffff0000;
- }
- rec = temp;
-
- rsp->reciprocal_res = rec;
- rsp->dp_allowed = 0;
+ INT32 datainput = rec;
+
+ if (rec < 0)
+ {
+ if (rsp->dp_allowed)
+ {
+ if (rec < -32768)
+ {
+ datainput = ~datainput;
+ }
+ else
+ {
+ datainput = -datainput;
+ }
+ }
+ else
+ {
+ datainput = -datainput;
+ }
+ }
+
+ if (datainput)
+ {
+ for (int i = 0; i < 32; i++)
+ {
+ if (datainput & (1 << ((~i) & 0x1f)))
+ {
+ shifter = i;
+ break;
+ }
+ }
+ }
+ else
+ {
+ if (rsp->dp_allowed)
+ {
+ shifter = 0;
+ }
+ else
+ {
+ shifter = 0x10;
+ }
+ }
+
+ INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
+ address = ((address | 0x200) & 0x3fe) | (shifter & 1);
+
+ INT32 fetchval = rsp_divtable[address];
+ INT32 temp = (0x40000000 | (fetchval << 14)) >> (((~shifter) & 0x1f) >> 1);
+ if (rec < 0)
+ {
+ temp = ~temp;
+ }
+ if (!rec)
+ {
+ temp = 0x7fffffff;
+ }
+ else if (rec == 0xffff8000)
+ {
+ temp = 0xffff0000;
+ }
+ rec = temp;
+
+ rsp->reciprocal_res = rec;
+ rsp->dp_allowed = 0;
#if USE_SIMD
- SIMD_INSERT16(rsp->xv[VDREG], (UINT16)rec, VS1REG);
- rsp->accum_l = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ SIMD_INSERT16(rsp->xv[VDREG], (UINT16)rec, VS1REG);
+ rsp->accum_l = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
#else
- W_VREG_S(VDREG, VS1REG & 7) = (UINT16)(rec & 0xffff);
- for (int i = 0; i < 8; i++)
- {
- SET_ACCUM_L(VREG_S(VS2REG, VEC_EL_2(EL, i)), i);
- }
+ W_VREG_S(VDREG, VS1REG & 7) = (UINT16)(rec & 0xffff);
+ for (int i = 0; i < 8; i++)
+ {
+ SET_ACCUM_L(VREG_S(VS2REG, VEC_EL_2(EL, i)), i);
+ }
#endif
}
INLINE void cfunc_rsp_vrsqh(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- int op = rsp->impstate->arg0;
+ rsp_state *rsp = (rsp_state*)param;
+ int op = rsp->impstate->arg0;
- // 31 25 24 20 15 10 5 0
- // ------------------------------------------------------
- // | 010010 | 1 | EEEE | SSSSS | ?FFFF | DDDDD | 110110 |
- // ------------------------------------------------------
- //
- // Calculates reciprocal square-root high part
+ // 31 25 24 20 15 10 5 0
+ // ------------------------------------------------------
+ // | 010010 | 1 | EEEE | SSSSS | ?FFFF | DDDDD | 110110 |
+ // ------------------------------------------------------
+ //
+ // Calculates reciprocal square-root high part
#if USE_SIMD
- UINT16 val;
- SIMD_EXTRACT16(rsp->xv[VS2REG], val, EL);
- rsp->reciprocal_high = val << 16;
- rsp->dp_allowed = 1;
+ UINT16 val;
+ SIMD_EXTRACT16(rsp->xv[VS2REG], val, EL);
+ rsp->reciprocal_high = val << 16;
+ rsp->dp_allowed = 1;
- rsp->accum_l = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
+ rsp->accum_l = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]);
- SIMD_INSERT16(rsp->xv[VDREG], (INT16)(rsp->reciprocal_res >> 16), VS1REG); // store high part
+ SIMD_INSERT16(rsp->xv[VDREG], (INT16)(rsp->reciprocal_res >> 16), VS1REG); // store high part
#else
- rsp->reciprocal_high = (VREG_S(VS2REG, EL & 7)) << 16;
- rsp->dp_allowed = 1;
+ rsp->reciprocal_high = (VREG_S(VS2REG, EL & 7)) << 16;
+ rsp->dp_allowed = 1;
- for (int i = 0; i < 8; i++)
- {
- SET_ACCUM_L(VREG_S(VS2REG, VEC_EL_2(EL, i)), i);
- }
+ for (int i = 0; i < 8; i++)
+ {
+ SET_ACCUM_L(VREG_S(VS2REG, VEC_EL_2(EL, i)), i);
+ }
- W_VREG_S(VDREG, VS1REG & 7) = (INT16)(rsp->reciprocal_res >> 16); // store high part
+ W_VREG_S(VDREG, VS1REG & 7) = (INT16)(rsp->reciprocal_res >> 16); // store high part
#endif
}
static void cfunc_sp_set_status_cb(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- (rsp->sp_set_status_func)(0, rsp->impstate->arg0);
+ rsp_state *rsp = (rsp_state*)param;
+ (rsp->sp_set_status_func)(0, rsp->impstate->arg0);
}
static CPU_EXECUTE( rsp )
{
- rsp_state *rsp = get_safe_token(device);
- drcuml_state *drcuml = rsp->impstate->drcuml;
- int execute_result;
-
- /* reset the cache if dirty */
- if (rsp->impstate->cache_dirty)
- code_flush_cache(rsp);
- rsp->impstate->cache_dirty = FALSE;
-
- /* execute */
- do
- {
- if( rsp->sr & ( RSP_STATUS_HALT | RSP_STATUS_BROKE ) )
- {
- rsp->icount = MIN(rsp->icount, 0);
- break;
- }
-
- /* run as much as we can */
- execute_result = drcuml->execute(*rsp->impstate->entry);
-
- /* if we need to recompile, do it */
- if (execute_result == EXECUTE_MISSING_CODE)
- {
- code_compile_block(rsp, rsp->pc);
- }
- else if (execute_result == EXECUTE_UNMAPPED_CODE)
- {
- fatalerror("Attempted to execute unmapped code at PC=%08X\n", rsp->pc);
- }
- else if (execute_result == EXECUTE_RESET_CACHE)
- {
- code_flush_cache(rsp);
- }
- } while (execute_result != EXECUTE_OUT_OF_CYCLES);
+ rsp_state *rsp = get_safe_token(device);
+ drcuml_state *drcuml = rsp->impstate->drcuml;
+ int execute_result;
+
+ /* reset the cache if dirty */
+ if (rsp->impstate->cache_dirty)
+ code_flush_cache(rsp);
+ rsp->impstate->cache_dirty = FALSE;
+
+ /* execute */
+ do
+ {
+ if( rsp->sr & ( RSP_STATUS_HALT | RSP_STATUS_BROKE ) )
+ {
+ rsp->icount = MIN(rsp->icount, 0);
+ break;
+ }
+
+ /* run as much as we can */
+ execute_result = drcuml->execute(*rsp->impstate->entry);
+
+ /* if we need to recompile, do it */
+ if (execute_result == EXECUTE_MISSING_CODE)
+ {
+ code_compile_block(rsp, rsp->pc);
+ }
+ else if (execute_result == EXECUTE_UNMAPPED_CODE)
+ {
+ fatalerror("Attempted to execute unmapped code at PC=%08X\n", rsp->pc);
+ }
+ else if (execute_result == EXECUTE_RESET_CACHE)
+ {
+ code_flush_cache(rsp);
+ }
+ } while (execute_result != EXECUTE_OUT_OF_CYCLES);
}
/***************************************************************************
@@ -4852,9 +4852,9 @@ static CPU_EXECUTE( rsp )
void rspdrc_flush_drc_cache(device_t *device)
{
- if (!device->machine().options().drc()) return;
- rsp_state *rsp = get_safe_token(device);
- rsp->impstate->cache_dirty = TRUE;
+ if (!device->machine().options().drc()) return;
+ rsp_state *rsp = get_safe_token(device);
+ rsp->impstate->cache_dirty = TRUE;
}
/*-------------------------------------------------
@@ -4864,28 +4864,28 @@ void rspdrc_flush_drc_cache(device_t *device)
static void code_flush_cache(rsp_state *rsp)
{
- /* empty the transient cache contents */
- rsp->impstate->drcuml->reset();
-
- try
- {
- /* generate the entry point and out-of-cycles handlers */
- static_generate_entry_point(rsp);
- static_generate_nocode_handler(rsp);
- static_generate_out_of_cycles(rsp);
+ /* empty the transient cache contents */
+ rsp->impstate->drcuml->reset();
- /* add subroutines for memory accesses */
- static_generate_memory_accessor(rsp, 1, FALSE, "read8", rsp->impstate->read8);
- static_generate_memory_accessor(rsp, 1, TRUE, "write8", rsp->impstate->write8);
- static_generate_memory_accessor(rsp, 2, FALSE, "read16", rsp->impstate->read16);
- static_generate_memory_accessor(rsp, 2, TRUE, "write16", rsp->impstate->write16);
- static_generate_memory_accessor(rsp, 4, FALSE, "read32", rsp->impstate->read32);
- static_generate_memory_accessor(rsp, 4, TRUE, "write32", rsp->impstate->write32);
- }
- catch (drcuml_block::abort_compilation &)
- {
- fatalerror("Unable to generate static RSP code\n");
- }
+ try
+ {
+ /* generate the entry point and out-of-cycles handlers */
+ static_generate_entry_point(rsp);
+ static_generate_nocode_handler(rsp);
+ static_generate_out_of_cycles(rsp);
+
+ /* add subroutines for memory accesses */
+ static_generate_memory_accessor(rsp, 1, FALSE, "read8", rsp->impstate->read8);
+ static_generate_memory_accessor(rsp, 1, TRUE, "write8", rsp->impstate->write8);
+ static_generate_memory_accessor(rsp, 2, FALSE, "read16", rsp->impstate->read16);
+ static_generate_memory_accessor(rsp, 2, TRUE, "write16", rsp->impstate->write16);
+ static_generate_memory_accessor(rsp, 4, FALSE, "read32", rsp->impstate->read32);
+ static_generate_memory_accessor(rsp, 4, TRUE, "write32", rsp->impstate->write32);
+ }
+ catch (drcuml_block::abort_compilation &)
+ {
+ fatalerror("Unable to generate static RSP code\n");
+ }
}
@@ -4896,101 +4896,101 @@ static void code_flush_cache(rsp_state *rsp)
static void code_compile_block(rsp_state *rsp, offs_t pc)
{
- drcuml_state *drcuml = rsp->impstate->drcuml;
- compiler_state compiler = { 0 };
- const opcode_desc *seqhead, *seqlast;
- const opcode_desc *desclist;
- int override = FALSE;
- drcuml_block *block;
-
- g_profiler.start(PROFILER_DRC_COMPILE);
-
- /* get a description of this sequence */
- desclist = rsp->impstate->drcfe->describe_code(pc);
-
- bool succeeded = false;
- while (!succeeded)
- {
- try
- {
- /* start the block */
- block = drcuml->begin_block(4096);
-
- /* loop until we get through all instruction sequences */
- for (seqhead = desclist; seqhead != NULL; seqhead = seqlast->next())
- {
- const opcode_desc *curdesc;
- UINT32 nextpc;
-
- /* add a code log entry */
- if (LOG_UML)
- block->append_comment("-------------------------"); // comment
-
- /* determine the last instruction in this sequence */
- for (seqlast = seqhead; seqlast != NULL; seqlast = seqlast->next())
- if (seqlast->flags & OPFLAG_END_SEQUENCE)
- break;
- assert(seqlast != NULL);
-
- /* if we don't have a hash for this mode/pc, or if we are overriding all, add one */
- if (override || !drcuml->hash_exists(0, seqhead->pc))
- UML_HASH(block, 0, seqhead->pc); // hash mode,pc
-
- /* if we already have a hash, and this is the first sequence, assume that we */
- /* are recompiling due to being out of sync and allow future overrides */
- else if (seqhead == desclist)
- {
- override = TRUE;
- UML_HASH(block, 0, seqhead->pc); // hash mode,pc
- }
-
- /* otherwise, redispatch to that fixed PC and skip the rest of the processing */
- else
- {
- UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc
- UML_HASHJMP(block, 0, seqhead->pc, *rsp->impstate->nocode);
- // hashjmp <0>,seqhead->pc,nocode
- continue;
- }
-
- /* validate this code block if we're not pointing into ROM */
- if (rsp->program->get_write_ptr(seqhead->physpc) != NULL)
- generate_checksum_block(rsp, block, &compiler, seqhead, seqlast);
-
- /* label this instruction, if it may be jumped to locally */
- if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
- UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc
-
- /* iterate over instructions in the sequence and compile them */
- for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
- generate_sequence_instruction(rsp, block, &compiler, curdesc);
-
- /* if we need to return to the start, do it */
- if (seqlast->flags & OPFLAG_RETURN_TO_START)
- nextpc = pc;
-
- /* otherwise we just go to the next instruction */
- else
- nextpc = seqlast->pc + (seqlast->skipslots + 1) * 4;
-
- /* count off cycles and go there */
- generate_update_cycles(rsp, block, &compiler, nextpc, TRUE); // <subtract cycles>
-
- /* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */
- if (seqlast->next() == NULL || seqlast->next()->pc != nextpc)
- UML_HASHJMP(block, 0, nextpc, *rsp->impstate->nocode); // hashjmp <mode>,nextpc,nocode
- }
-
- /* end the sequence */
- block->end();
- g_profiler.stop();
- succeeded = true;
- }
- catch (drcuml_block::abort_compilation &)
- {
- code_flush_cache(rsp);
- }
- }
+ drcuml_state *drcuml = rsp->impstate->drcuml;
+ compiler_state compiler = { 0 };
+ const opcode_desc *seqhead, *seqlast;
+ const opcode_desc *desclist;
+ int override = FALSE;
+ drcuml_block *block;
+
+ g_profiler.start(PROFILER_DRC_COMPILE);
+
+ /* get a description of this sequence */
+ desclist = rsp->impstate->drcfe->describe_code(pc);
+
+ bool succeeded = false;
+ while (!succeeded)
+ {
+ try
+ {
+ /* start the block */
+ block = drcuml->begin_block(4096);
+
+ /* loop until we get through all instruction sequences */
+ for (seqhead = desclist; seqhead != NULL; seqhead = seqlast->next())
+ {
+ const opcode_desc *curdesc;
+ UINT32 nextpc;
+
+ /* add a code log entry */
+ if (LOG_UML)
+ block->append_comment("-------------------------"); // comment
+
+ /* determine the last instruction in this sequence */
+ for (seqlast = seqhead; seqlast != NULL; seqlast = seqlast->next())
+ if (seqlast->flags & OPFLAG_END_SEQUENCE)
+ break;
+ assert(seqlast != NULL);
+
+ /* if we don't have a hash for this mode/pc, or if we are overriding all, add one */
+ if (override || !drcuml->hash_exists(0, seqhead->pc))
+ UML_HASH(block, 0, seqhead->pc); // hash mode,pc
+
+ /* if we already have a hash, and this is the first sequence, assume that we */
+ /* are recompiling due to being out of sync and allow future overrides */
+ else if (seqhead == desclist)
+ {
+ override = TRUE;
+ UML_HASH(block, 0, seqhead->pc); // hash mode,pc
+ }
+
+ /* otherwise, redispatch to that fixed PC and skip the rest of the processing */
+ else
+ {
+ UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc
+ UML_HASHJMP(block, 0, seqhead->pc, *rsp->impstate->nocode);
+ // hashjmp <0>,seqhead->pc,nocode
+ continue;
+ }
+
+ /* validate this code block if we're not pointing into ROM */
+ if (rsp->program->get_write_ptr(seqhead->physpc) != NULL)
+ generate_checksum_block(rsp, block, &compiler, seqhead, seqlast);
+
+ /* label this instruction, if it may be jumped to locally */
+ if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
+ UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc
+
+ /* iterate over instructions in the sequence and compile them */
+ for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
+ generate_sequence_instruction(rsp, block, &compiler, curdesc);
+
+ /* if we need to return to the start, do it */
+ if (seqlast->flags & OPFLAG_RETURN_TO_START)
+ nextpc = pc;
+
+ /* otherwise we just go to the next instruction */
+ else
+ nextpc = seqlast->pc + (seqlast->skipslots + 1) * 4;
+
+ /* count off cycles and go there */
+ generate_update_cycles(rsp, block, &compiler, nextpc, TRUE); // <subtract cycles>
+
+ /* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */
+ if (seqlast->next() == NULL || seqlast->next()->pc != nextpc)
+ UML_HASHJMP(block, 0, nextpc, *rsp->impstate->nocode); // hashjmp <mode>,nextpc,nocode
+ }
+
+ /* end the sequence */
+ block->end();
+ g_profiler.stop();
+ succeeded = true;
+ }
+ catch (drcuml_block::abort_compilation &)
+ {
+ code_flush_cache(rsp);
+ }
+ }
}
/***************************************************************************
@@ -5004,9 +5004,9 @@ static void code_compile_block(rsp_state *rsp, offs_t pc)
static void cfunc_unimplemented(void *param)
{
- rsp_state *rsp = (rsp_state *)param;
- UINT32 opcode = rsp->impstate->arg0;
- fatalerror("PC=%08X: Unimplemented op %08X (%02X,%02X)\n", rsp->pc, opcode, opcode >> 26, opcode & 0x3f);
+ rsp_state *rsp = (rsp_state *)param;
+ UINT32 opcode = rsp->impstate->arg0;
+ fatalerror("PC=%08X: Unimplemented op %08X (%02X,%02X)\n", rsp->pc, opcode, opcode >> 26, opcode & 0x3f);
}
@@ -5017,7 +5017,7 @@ static void cfunc_unimplemented(void *param)
#ifdef UNUSED_CODE
static void cfunc_fatalerror(void *param)
{
- fatalerror("fatalerror\n");
+ fatalerror("fatalerror\n");
}
#endif
@@ -5033,24 +5033,24 @@ static void cfunc_fatalerror(void *param)
static void static_generate_entry_point(rsp_state *rsp)
{
- drcuml_state *drcuml = rsp->impstate->drcuml;
- drcuml_block *block;
+ drcuml_state *drcuml = rsp->impstate->drcuml;
+ drcuml_block *block;
- /* begin generating */
- block = drcuml->begin_block(20);
+ /* begin generating */
+ block = drcuml->begin_block(20);
- /* forward references */
- alloc_handle(drcuml, &rsp->impstate->nocode, "nocode");
+ /* forward references */
+ alloc_handle(drcuml, &rsp->impstate->nocode, "nocode");
- alloc_handle(drcuml, &rsp->impstate->entry, "entry");
- UML_HANDLE(block, *rsp->impstate->entry); // handle entry
+ alloc_handle(drcuml, &rsp->impstate->entry, "entry");
+ UML_HANDLE(block, *rsp->impstate->entry); // handle entry
- /* load fast integer registers */
- load_fast_iregs(rsp, block);
+ /* load fast integer registers */
+ load_fast_iregs(rsp, block);
- /* generate a hash jump via the current mode and PC */
- UML_HASHJMP(block, 0, mem(&rsp->pc), *rsp->impstate->nocode); // hashjmp <mode>,<pc>,nocode
- block->end();
+ /* generate a hash jump via the current mode and PC */
+ UML_HASHJMP(block, 0, mem(&rsp->pc), *rsp->impstate->nocode); // hashjmp <mode>,<pc>,nocode
+ block->end();
}
@@ -5061,21 +5061,21 @@ static void static_generate_entry_point(rsp_state *rsp)
static void static_generate_nocode_handler(rsp_state *rsp)
{
- drcuml_state *drcuml = rsp->impstate->drcuml;
- drcuml_block *block;
+ drcuml_state *drcuml = rsp->impstate->drcuml;
+ drcuml_block *block;
- /* begin generating */
- block = drcuml->begin_block(10);
+ /* begin generating */
+ block = drcuml->begin_block(10);
- /* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &rsp->impstate->nocode, "nocode");
- UML_HANDLE(block, *rsp->impstate->nocode); // handle nocode
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&rsp->pc), I0); // mov [pc],i0
- save_fast_iregs(rsp, block);
- UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
+ /* generate a hash jump via the current mode and PC */
+ alloc_handle(drcuml, &rsp->impstate->nocode, "nocode");
+ UML_HANDLE(block, *rsp->impstate->nocode); // handle nocode
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, mem(&rsp->pc), I0); // mov [pc],i0
+ save_fast_iregs(rsp, block);
+ UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
- block->end();
+ block->end();
}
@@ -5086,21 +5086,21 @@ static void static_generate_nocode_handler(rsp_state *rsp)
static void static_generate_out_of_cycles(rsp_state *rsp)
{
- drcuml_state *drcuml = rsp->impstate->drcuml;
- drcuml_block *block;
+ drcuml_state *drcuml = rsp->impstate->drcuml;
+ drcuml_block *block;
- /* begin generating */
- block = drcuml->begin_block(10);
+ /* begin generating */
+ block = drcuml->begin_block(10);
- /* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &rsp->impstate->out_of_cycles, "out_of_cycles");
- UML_HANDLE(block, *rsp->impstate->out_of_cycles); // handle out_of_cycles
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&rsp->pc), I0); // mov <pc>,i0
- save_fast_iregs(rsp, block);
- UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
+ /* generate a hash jump via the current mode and PC */
+ alloc_handle(drcuml, &rsp->impstate->out_of_cycles, "out_of_cycles");
+ UML_HANDLE(block, *rsp->impstate->out_of_cycles); // handle out_of_cycles
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, mem(&rsp->pc), I0); // mov <pc>,i0
+ save_fast_iregs(rsp, block);
+ UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
- block->end();
+ block->end();
}
/*------------------------------------------------------------------
@@ -5109,65 +5109,65 @@ static void static_generate_out_of_cycles(rsp_state *rsp)
static void static_generate_memory_accessor(rsp_state *rsp, int size, int iswrite, const char *name, code_handle *&handleptr)
{
- /* on entry, address is in I0; data for writes is in I1 */
- /* on exit, read result is in I0 */
- /* routine trashes I0-I1 */
- drcuml_state *drcuml = rsp->impstate->drcuml;
- drcuml_block *block;
-
- /* begin generating */
- block = drcuml->begin_block(1024);
-
- /* add a global entry for this */
- alloc_handle(drcuml, &handleptr, name);
- UML_HANDLE(block, *handleptr); // handle *handleptr
-
- // write:
- if (iswrite)
- {
- if (size == 1)
- {
- UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
- UML_MOV(block, mem(&rsp->impstate->arg1), I1); // mov [arg1],i1 ; data
- UML_CALLC(block, cfunc_write8, rsp); // callc cfunc_write8
- }
- else if (size == 2)
- {
- UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
- UML_MOV(block, mem(&rsp->impstate->arg1), I1); // mov [arg1],i1 ; data
- UML_CALLC(block, cfunc_write16, rsp); // callc cfunc_write16
- }
- else if (size == 4)
- {
- UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
- UML_MOV(block, mem(&rsp->impstate->arg1), I1); // mov [arg1],i1 ; data
- UML_CALLC(block, cfunc_write32, rsp); // callc cfunc_write32
- }
- }
- else
- {
- if (size == 1)
- {
- UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
- UML_CALLC(block, cfunc_read8, rsp); // callc cfunc_printf_debug
- UML_MOV(block, I0, mem(&rsp->impstate->arg0)); // mov i0,[arg0],i0 ; result
- }
- else if (size == 2)
- {
- UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
- UML_CALLC(block, cfunc_read16, rsp); // callc cfunc_read16
- UML_MOV(block, I0, mem(&rsp->impstate->arg0)); // mov i0,[arg0],i0 ; result
- }
- else if (size == 4)
- {
- UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
- UML_CALLC(block, cfunc_read32, rsp); // callc cfunc_read32
- UML_MOV(block, I0, mem(&rsp->impstate->arg0)); // mov i0,[arg0],i0 ; result
- }
- }
- UML_RET(block);
-
- block->end();
+ /* on entry, address is in I0; data for writes is in I1 */
+ /* on exit, read result is in I0 */
+ /* routine trashes I0-I1 */
+ drcuml_state *drcuml = rsp->impstate->drcuml;
+ drcuml_block *block;
+
+ /* begin generating */
+ block = drcuml->begin_block(1024);
+
+ /* add a global entry for this */
+ alloc_handle(drcuml, &handleptr, name);
+ UML_HANDLE(block, *handleptr); // handle *handleptr
+
+ // write:
+ if (iswrite)
+ {
+ if (size == 1)
+ {
+ UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
+ UML_MOV(block, mem(&rsp->impstate->arg1), I1); // mov [arg1],i1 ; data
+ UML_CALLC(block, cfunc_write8, rsp); // callc cfunc_write8
+ }
+ else if (size == 2)
+ {
+ UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
+ UML_MOV(block, mem(&rsp->impstate->arg1), I1); // mov [arg1],i1 ; data
+ UML_CALLC(block, cfunc_write16, rsp); // callc cfunc_write16
+ }
+ else if (size == 4)
+ {
+ UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
+ UML_MOV(block, mem(&rsp->impstate->arg1), I1); // mov [arg1],i1 ; data
+ UML_CALLC(block, cfunc_write32, rsp); // callc cfunc_write32
+ }
+ }
+ else
+ {
+ if (size == 1)
+ {
+ UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
+ UML_CALLC(block, cfunc_read8, rsp); // callc cfunc_printf_debug
+ UML_MOV(block, I0, mem(&rsp->impstate->arg0)); // mov i0,[arg0],i0 ; result
+ }
+ else if (size == 2)
+ {
+ UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
+ UML_CALLC(block, cfunc_read16, rsp); // callc cfunc_read16
+ UML_MOV(block, I0, mem(&rsp->impstate->arg0)); // mov i0,[arg0],i0 ; result
+ }
+ else if (size == 4)
+ {
+ UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
+ UML_CALLC(block, cfunc_read32, rsp); // callc cfunc_read32
+ UML_MOV(block, I0, mem(&rsp->impstate->arg0)); // mov i0,[arg0],i0 ; result
+ }
+ }
+ UML_RET(block);
+
+ block->end();
}
@@ -5183,14 +5183,14 @@ static void static_generate_memory_accessor(rsp_state *rsp, int size, int iswrit
-------------------------------------------------*/
static void generate_update_cycles(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, parameter param, int allow_exception)
{
- /* account for cycles */
- if (compiler->cycles > 0)
- {
- UML_SUB(block, mem(&rsp->icount), mem(&rsp->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
- UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
- UML_EXHc(block, COND_S, *rsp->impstate->out_of_cycles, param);
- }
- compiler->cycles = 0;
+ /* account for cycles */
+ if (compiler->cycles > 0)
+ {
+ UML_SUB(block, mem(&rsp->icount), mem(&rsp->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
+ UML_EXHc(block, COND_S, *rsp->impstate->out_of_cycles, param);
+ }
+ compiler->cycles = 0;
}
/*-------------------------------------------------
@@ -5200,61 +5200,61 @@ static void generate_update_cycles(rsp_state *rsp, drcuml_block *block, compiler
static void generate_checksum_block(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
{
- const opcode_desc *curdesc;
- if (LOG_UML)
- {
- block->append_comment("[Validation for %08X]", seqhead->pc | 0x1000); // comment
- }
- /* loose verify or single instruction: just compare and fail */
- if (!(rsp->impstate->drcoptions & RSPDRC_STRICT_VERIFY) || seqhead->next() == NULL)
- {
- if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP))
- {
- UINT32 sum = seqhead->opptr.l[0];
- void *base = rsp->direct->read_decrypted_ptr(seqhead->physpc | 0x1000);
- UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
-
- if (seqhead->delay.first() != NULL && seqhead->physpc != seqhead->delay.first()->physpc)
- {
- base = rsp->direct->read_decrypted_ptr(seqhead->delay.first()->physpc | 0x1000);
- UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
- UML_ADD(block, I0, I0, I1); // add i0,i0,i1
-
- sum += seqhead->delay.first()->opptr.l[0];
- }
-
- UML_CMP(block, I0, sum); // cmp i0,opptr[0]
- UML_EXHc(block, COND_NE, *rsp->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
- }
- }
-
- /* full verification; sum up everything */
- else
- {
- UINT32 sum = 0;
- void *base = rsp->direct->read_decrypted_ptr(seqhead->physpc | 0x1000);
- UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
- sum += seqhead->opptr.l[0];
- for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next())
- if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP))
- {
- base = rsp->direct->read_decrypted_ptr(curdesc->physpc | 0x1000);
- UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
- UML_ADD(block, I0, I0, I1); // add i0,i0,i1
- sum += curdesc->opptr.l[0];
-
- if (curdesc->delay.first() != NULL && (curdesc == seqlast || (curdesc->next() != NULL && curdesc->next()->physpc != curdesc->delay.first()->physpc)))
- {
- base = rsp->direct->read_decrypted_ptr(curdesc->delay.first()->physpc | 0x1000);
- UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
- UML_ADD(block, I0, I0, I1); // add i0,i0,i1
-
- sum += curdesc->delay.first()->opptr.l[0];
- }
- }
- UML_CMP(block, I0, sum); // cmp i0,sum
- UML_EXHc(block, COND_NE, *rsp->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
- }
+ const opcode_desc *curdesc;
+ if (LOG_UML)
+ {
+ block->append_comment("[Validation for %08X]", seqhead->pc | 0x1000); // comment
+ }
+ /* loose verify or single instruction: just compare and fail */
+ if (!(rsp->impstate->drcoptions & RSPDRC_STRICT_VERIFY) || seqhead->next() == NULL)
+ {
+ if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP))
+ {
+ UINT32 sum = seqhead->opptr.l[0];
+ void *base = rsp->direct->read_decrypted_ptr(seqhead->physpc | 0x1000);
+ UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
+
+ if (seqhead->delay.first() != NULL && seqhead->physpc != seqhead->delay.first()->physpc)
+ {
+ base = rsp->direct->read_decrypted_ptr(seqhead->delay.first()->physpc | 0x1000);
+ UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
+ UML_ADD(block, I0, I0, I1); // add i0,i0,i1
+
+ sum += seqhead->delay.first()->opptr.l[0];
+ }
+
+ UML_CMP(block, I0, sum); // cmp i0,opptr[0]
+ UML_EXHc(block, COND_NE, *rsp->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
+ }
+ }
+
+ /* full verification; sum up everything */
+ else
+ {
+ UINT32 sum = 0;
+ void *base = rsp->direct->read_decrypted_ptr(seqhead->physpc | 0x1000);
+ UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
+ sum += seqhead->opptr.l[0];
+ for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next())
+ if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP))
+ {
+ base = rsp->direct->read_decrypted_ptr(curdesc->physpc | 0x1000);
+ UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
+ UML_ADD(block, I0, I0, I1); // add i0,i0,i1
+ sum += curdesc->opptr.l[0];
+
+ if (curdesc->delay.first() != NULL && (curdesc == seqlast || (curdesc->next() != NULL && curdesc->next()->physpc != curdesc->delay.first()->physpc)))
+ {
+ base = rsp->direct->read_decrypted_ptr(curdesc->delay.first()->physpc | 0x1000);
+ UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
+ UML_ADD(block, I0, I0, I1); // add i0,i0,i1
+
+ sum += curdesc->delay.first()->opptr.l[0];
+ }
+ }
+ UML_CMP(block, I0, sum); // cmp i0,sum
+ UML_EXHc(block, COND_NE, *rsp->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
+ }
}
@@ -5265,51 +5265,51 @@ static void generate_checksum_block(rsp_state *rsp, drcuml_block *block, compile
static void generate_sequence_instruction(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- offs_t expc;
+ offs_t expc;
- /* add an entry for the log */
- if (LOG_UML && !(desc->flags & OPFLAG_VIRTUAL_NOOP))
- log_add_disasm_comment(rsp, block, desc->pc, desc->opptr.l[0]);
+ /* add an entry for the log */
+ if (LOG_UML && !(desc->flags & OPFLAG_VIRTUAL_NOOP))
+ log_add_disasm_comment(rsp, block, desc->pc, desc->opptr.l[0]);
- /* set the PC map variable */
- expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 3 : desc->pc;
- UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc
+ /* set the PC map variable */
+ expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 3 : desc->pc;
+ UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc
- /* accumulate total cycles */
- compiler->cycles += desc->cycles;
+ /* accumulate total cycles */
+ compiler->cycles += desc->cycles;
- /* update the icount map variable */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ /* update the icount map variable */
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
- /* if we are debugging, call the debugger */
- if ((rsp->device->machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
- {
- UML_MOV(block, mem(&rsp->pc), desc->pc); // mov [pc],desc->pc
- save_fast_iregs(rsp, block);
- UML_DEBUG(block, desc->pc); // debug desc->pc
- }
+ /* if we are debugging, call the debugger */
+ if ((rsp->device->machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ {
+ UML_MOV(block, mem(&rsp->pc), desc->pc); // mov [pc],desc->pc
+ save_fast_iregs(rsp, block);
+ UML_DEBUG(block, desc->pc); // debug desc->pc
+ }
- /* if we hit an unmapped address, fatal error */
+ /* if we hit an unmapped address, fatal error */
#if 0
- if (desc->flags & OPFLAG_COMPILER_UNMAPPED)
- {
- UML_MOV(block, mem(&rsp->pc), desc->pc); // mov [pc],desc->pc
- save_fast_iregs(rsp, block);
- UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
- }
+ if (desc->flags & OPFLAG_COMPILER_UNMAPPED)
+ {
+ UML_MOV(block, mem(&rsp->pc), desc->pc); // mov [pc],desc->pc
+ save_fast_iregs(rsp, block);
+ UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
+ }
#endif
- /* otherwise, unless this is a virtual no-op, it's a regular instruction */
- /*else*/ if (!(desc->flags & OPFLAG_VIRTUAL_NOOP))
- {
- /* compile the instruction */
- if (!generate_opcode(rsp, block, compiler, desc))
- {
- UML_MOV(block, mem(&rsp->pc), desc->pc); // mov [pc],desc->pc
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_unimplemented, rsp); // callc cfunc_unimplemented
- }
- }
+ /* otherwise, unless this is a virtual no-op, it's a regular instruction */
+ /*else*/ if (!(desc->flags & OPFLAG_VIRTUAL_NOOP))
+ {
+ /* compile the instruction */
+ if (!generate_opcode(rsp, block, compiler, desc))
+ {
+ UML_MOV(block, mem(&rsp->pc), desc->pc); // mov [pc],desc->pc
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_unimplemented, rsp); // callc cfunc_unimplemented
+ }
+ }
}
/*------------------------------------------------------------------
@@ -5318,50 +5318,50 @@ static void generate_sequence_instruction(rsp_state *rsp, drcuml_block *block, c
static void generate_delay_slot_and_branch(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 linkreg)
{
- compiler_state compiler_temp = *compiler;
- UINT32 op = desc->opptr.l[0];
-
- /* fetch the target register if dynamic, in case it is modified by the delay slot */
- if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
- {
- UML_AND(block, mem(&rsp->impstate->jmpdest), R32(RSREG), 0x00000fff);
- UML_OR(block, mem(&rsp->impstate->jmpdest), mem(&rsp->impstate->jmpdest), 0x1000);
- }
-
- /* set the link if needed -- before the delay slot */
- if (linkreg != 0)
- {
- UML_MOV(block, R32(linkreg), (INT32)(desc->pc + 8)); // mov <linkreg>,desc->pc + 8
- }
-
- /* compile the delay slot using temporary compiler state */
- assert(desc->delay.first() != NULL);
- generate_sequence_instruction(rsp, block, &compiler_temp, desc->delay.first()); // <next instruction>
-
- /* update the cycles and jump through the hash table to the target */
- if (desc->targetpc != BRANCH_TARGET_DYNAMIC)
- {
- generate_update_cycles(rsp, block, &compiler_temp, desc->targetpc, TRUE); // <subtract cycles>
- if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
- UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc
- else
- UML_HASHJMP(block, 0, desc->targetpc, *rsp->impstate->nocode);
- // hashjmp <mode>,desc->targetpc,nocode
- }
- else
- {
- generate_update_cycles(rsp, block, &compiler_temp, mem(&rsp->impstate->jmpdest), TRUE);
- // <subtract cycles>
- UML_HASHJMP(block, 0, mem(&rsp->impstate->jmpdest), *rsp->impstate->nocode);
- // hashjmp <mode>,<rsreg>,nocode
- }
-
- /* update the label */
- compiler->labelnum = compiler_temp.labelnum;
-
- /* reset the mapvar to the current cycles and account for skipped slots */
- compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ compiler_state compiler_temp = *compiler;
+ UINT32 op = desc->opptr.l[0];
+
+ /* fetch the target register if dynamic, in case it is modified by the delay slot */
+ if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
+ {
+ UML_AND(block, mem(&rsp->impstate->jmpdest), R32(RSREG), 0x00000fff);
+ UML_OR(block, mem(&rsp->impstate->jmpdest), mem(&rsp->impstate->jmpdest), 0x1000);
+ }
+
+ /* set the link if needed -- before the delay slot */
+ if (linkreg != 0)
+ {
+ UML_MOV(block, R32(linkreg), (INT32)(desc->pc + 8)); // mov <linkreg>,desc->pc + 8
+ }
+
+ /* compile the delay slot using temporary compiler state */
+ assert(desc->delay.first() != NULL);
+ generate_sequence_instruction(rsp, block, &compiler_temp, desc->delay.first()); // <next instruction>
+
+ /* update the cycles and jump through the hash table to the target */
+ if (desc->targetpc != BRANCH_TARGET_DYNAMIC)
+ {
+ generate_update_cycles(rsp, block, &compiler_temp, desc->targetpc, TRUE); // <subtract cycles>
+ if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
+ UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc
+ else
+ UML_HASHJMP(block, 0, desc->targetpc, *rsp->impstate->nocode);
+ // hashjmp <mode>,desc->targetpc,nocode
+ }
+ else
+ {
+ generate_update_cycles(rsp, block, &compiler_temp, mem(&rsp->impstate->jmpdest), TRUE);
+ // <subtract cycles>
+ UML_HASHJMP(block, 0, mem(&rsp->impstate->jmpdest), *rsp->impstate->nocode);
+ // hashjmp <mode>,<rsreg>,nocode
+ }
+
+ /* update the label */
+ compiler->labelnum = compiler_temp.labelnum;
+
+ /* reset the mapvar to the current cycles and account for skipped slots */
+ compiler->cycles += desc->skipslots;
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
}
@@ -5372,12 +5372,12 @@ static void generate_delay_slot_and_branch(rsp_state *rsp, drcuml_block *block,
static int generate_vector_opcode(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- // Opcode legend:
- // E = VS2 element type
- // S = VS1, Source vector 1
- // T = VS2, Source vector 2
- // D = Destination vector
+ UINT32 op = desc->opptr.l[0];
+ // Opcode legend:
+ // E = VS2 element type
+ // S = VS1, Source vector 1
+ // T = VS2, Source vector 2
+ // D = Destination vector
switch (op & 0x3f)
{
@@ -5580,212 +5580,212 @@ static int generate_vector_opcode(rsp_state *rsp, drcuml_block *block, compiler_
static int generate_opcode(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = op >> 26;
- code_label skip;
-
- switch (opswitch)
- {
- /* ----- sub-groups ----- */
-
- case 0x00: /* SPECIAL - MIPS I */
- return generate_special(rsp, block, compiler, desc);
-
- case 0x01: /* REGIMM - MIPS I */
- return generate_regimm(rsp, block, compiler, desc);
-
- /* ----- jumps and branches ----- */
-
- case 0x02: /* J - MIPS I */
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
- return TRUE;
-
- case 0x03: /* JAL - MIPS I */
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 31); // <next instruction + hashjmp>
- return TRUE;
-
- case 0x04: /* BEQ - MIPS I */
- UML_CMP(block, R32(RSREG), R32(RTREG)); // cmp <rsreg>,<rtreg>
- UML_JMPc(block, COND_NE, skip = compiler->labelnum++); // jmp skip,NE
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
- return TRUE;
-
- case 0x05: /* BNE - MIPS I */
- UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_JMPc(block, COND_E, skip = compiler->labelnum++); // jmp skip,E
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
- return TRUE;
-
- case 0x06: /* BLEZ - MIPS I */
- if (RSREG != 0)
- {
- UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_G, skip = compiler->labelnum++); // jmp skip,G
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
- }
- else
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
- return TRUE;
-
- case 0x07: /* BGTZ - MIPS I */
- UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_LE, skip = compiler->labelnum++); // jmp skip,LE
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
- return TRUE;
-
-
- /* ----- immediate arithmetic ----- */
-
- case 0x0f: /* LUI - MIPS I */
- if (RTREG != 0)
- UML_MOV(block, R32(RTREG), SIMMVAL << 16); // dmov <rtreg>,SIMMVAL << 16
- return TRUE;
-
- case 0x08: /* ADDI - MIPS I */
- case 0x09: /* ADDIU - MIPS I */
- if (RTREG != 0)
- {
- UML_ADD(block, R32(RTREG), R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL,V
- }
- return TRUE;
-
- case 0x0a: /* SLTI - MIPS I */
- if (RTREG != 0)
- {
- UML_CMP(block, R32(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
- UML_SETc(block, COND_L, R32(RTREG)); // dset <rtreg>,l
- }
- return TRUE;
-
- case 0x0b: /* SLTIU - MIPS I */
- if (RTREG != 0)
- {
- UML_CMP(block, R32(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
- UML_SETc(block, COND_B, R32(RTREG)); // dset <rtreg>,b
- }
- return TRUE;
-
-
- case 0x0c: /* ANDI - MIPS I */
- if (RTREG != 0)
- UML_AND(block, R32(RTREG), R32(RSREG), UIMMVAL); // dand <rtreg>,<rsreg>,UIMMVAL
- return TRUE;
-
- case 0x0d: /* ORI - MIPS I */
- if (RTREG != 0)
- UML_OR(block, R32(RTREG), R32(RSREG), UIMMVAL); // dor <rtreg>,<rsreg>,UIMMVAL
- return TRUE;
-
- case 0x0e: /* XORI - MIPS I */
- if (RTREG != 0)
- UML_XOR(block, R32(RTREG), R32(RSREG), UIMMVAL); // dxor <rtreg>,<rsreg>,UIMMVAL
- return TRUE;
-
- /* ----- memory load operations ----- */
-
- case 0x20: /* LB - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *rsp->impstate->read8); // callh read8
- if (RTREG != 0)
- UML_SEXT(block, R32(RTREG), I0, SIZE_BYTE); // dsext <rtreg>,i0,byte
- if (!in_delay_slot)
- generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
- return TRUE;
-
- case 0x21: /* LH - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *rsp->impstate->read16); // callh read16
- if (RTREG != 0)
- UML_SEXT(block, R32(RTREG), I0, SIZE_WORD); // dsext <rtreg>,i0,word
- if (!in_delay_slot)
- generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
- return TRUE;
-
- case 0x23: /* LW - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *rsp->impstate->read32); // callh read32
- if (RTREG != 0)
- UML_MOV(block, R32(RTREG), I0);
- if (!in_delay_slot)
- generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
- return TRUE;
-
- case 0x24: /* LBU - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *rsp->impstate->read8); // callh read8
- if (RTREG != 0)
- UML_AND(block, R32(RTREG), I0, 0xff); // dand <rtreg>,i0,0xff
- if (!in_delay_slot)
- generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
- return TRUE;
-
- case 0x25: /* LHU - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *rsp->impstate->read16); // callh read16
- if (RTREG != 0)
- UML_AND(block, R32(RTREG), I0, 0xffff); // dand <rtreg>,i0,0xffff
- if (!in_delay_slot)
- generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
- return TRUE;
-
- case 0x32: /* LWC2 - MIPS I */
- return generate_lwc2(rsp, block, compiler, desc);
-
-
- /* ----- memory store operations ----- */
-
- case 0x28: /* SB - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
- UML_CALLH(block, *rsp->impstate->write8); // callh write8
- if (!in_delay_slot)
- generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
- return TRUE;
-
- case 0x29: /* SH - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
- UML_CALLH(block, *rsp->impstate->write16); // callh write16
- if (!in_delay_slot)
- generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
- return TRUE;
-
- case 0x2b: /* SW - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
- UML_CALLH(block, *rsp->impstate->write32); // callh write32
- if (!in_delay_slot)
- generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
- return TRUE;
-
- case 0x3a: /* SWC2 - MIPS I */
- return generate_swc2(rsp, block, compiler, desc);
- //UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- //UML_CALLC(block, cfunc_swc2, rsp); // callc cfunc_mfc2
- //return TRUE;
-
- /* ----- coprocessor instructions ----- */
-
- case 0x10: /* COP0 - MIPS I */
- return generate_cop0(rsp, block, compiler, desc);
-
- case 0x12: /* COP2 - MIPS I */
- return generate_cop2(rsp, block, compiler, desc);
- //UML_EXH(block, rsp->impstate->exception[EXCEPTION_INVALIDOP], 0);// exh invalidop,0
- //return TRUE;
-
-
- /* ----- unimplemented/illegal instructions ----- */
-
- //default: /* ??? */ invalid_instruction(op); break;
- }
-
- return FALSE;
+ int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
+ UINT32 op = desc->opptr.l[0];
+ UINT8 opswitch = op >> 26;
+ code_label skip;
+
+ switch (opswitch)
+ {
+ /* ----- sub-groups ----- */
+
+ case 0x00: /* SPECIAL - MIPS I */
+ return generate_special(rsp, block, compiler, desc);
+
+ case 0x01: /* REGIMM - MIPS I */
+ return generate_regimm(rsp, block, compiler, desc);
+
+ /* ----- jumps and branches ----- */
+
+ case 0x02: /* J - MIPS I */
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ return TRUE;
+
+ case 0x03: /* JAL - MIPS I */
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 31); // <next instruction + hashjmp>
+ return TRUE;
+
+ case 0x04: /* BEQ - MIPS I */
+ UML_CMP(block, R32(RSREG), R32(RTREG)); // cmp <rsreg>,<rtreg>
+ UML_JMPc(block, COND_NE, skip = compiler->labelnum++); // jmp skip,NE
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
+ return TRUE;
+
+ case 0x05: /* BNE - MIPS I */
+ UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
+ UML_JMPc(block, COND_E, skip = compiler->labelnum++); // jmp skip,E
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
+ return TRUE;
+
+ case 0x06: /* BLEZ - MIPS I */
+ if (RSREG != 0)
+ {
+ UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
+ UML_JMPc(block, COND_G, skip = compiler->labelnum++); // jmp skip,G
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
+ }
+ else
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ return TRUE;
+
+ case 0x07: /* BGTZ - MIPS I */
+ UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
+ UML_JMPc(block, COND_LE, skip = compiler->labelnum++); // jmp skip,LE
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
+ return TRUE;
+
+
+ /* ----- immediate arithmetic ----- */
+
+ case 0x0f: /* LUI - MIPS I */
+ if (RTREG != 0)
+ UML_MOV(block, R32(RTREG), SIMMVAL << 16); // dmov <rtreg>,SIMMVAL << 16
+ return TRUE;
+
+ case 0x08: /* ADDI - MIPS I */
+ case 0x09: /* ADDIU - MIPS I */
+ if (RTREG != 0)
+ {
+ UML_ADD(block, R32(RTREG), R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL,V
+ }
+ return TRUE;
+
+ case 0x0a: /* SLTI - MIPS I */
+ if (RTREG != 0)
+ {
+ UML_CMP(block, R32(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
+ UML_SETc(block, COND_L, R32(RTREG)); // dset <rtreg>,l
+ }
+ return TRUE;
+
+ case 0x0b: /* SLTIU - MIPS I */
+ if (RTREG != 0)
+ {
+ UML_CMP(block, R32(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
+ UML_SETc(block, COND_B, R32(RTREG)); // dset <rtreg>,b
+ }
+ return TRUE;
+
+
+ case 0x0c: /* ANDI - MIPS I */
+ if (RTREG != 0)
+ UML_AND(block, R32(RTREG), R32(RSREG), UIMMVAL); // dand <rtreg>,<rsreg>,UIMMVAL
+ return TRUE;
+
+ case 0x0d: /* ORI - MIPS I */
+ if (RTREG != 0)
+ UML_OR(block, R32(RTREG), R32(RSREG), UIMMVAL); // dor <rtreg>,<rsreg>,UIMMVAL
+ return TRUE;
+
+ case 0x0e: /* XORI - MIPS I */
+ if (RTREG != 0)
+ UML_XOR(block, R32(RTREG), R32(RSREG), UIMMVAL); // dxor <rtreg>,<rsreg>,UIMMVAL
+ return TRUE;
+
+ /* ----- memory load operations ----- */
+
+ case 0x20: /* LB - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *rsp->impstate->read8); // callh read8
+ if (RTREG != 0)
+ UML_SEXT(block, R32(RTREG), I0, SIZE_BYTE); // dsext <rtreg>,i0,byte
+ if (!in_delay_slot)
+ generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
+ return TRUE;
+
+ case 0x21: /* LH - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *rsp->impstate->read16); // callh read16
+ if (RTREG != 0)
+ UML_SEXT(block, R32(RTREG), I0, SIZE_WORD); // dsext <rtreg>,i0,word
+ if (!in_delay_slot)
+ generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
+ return TRUE;
+
+ case 0x23: /* LW - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *rsp->impstate->read32); // callh read32
+ if (RTREG != 0)
+ UML_MOV(block, R32(RTREG), I0);
+ if (!in_delay_slot)
+ generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
+ return TRUE;
+
+ case 0x24: /* LBU - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *rsp->impstate->read8); // callh read8
+ if (RTREG != 0)
+ UML_AND(block, R32(RTREG), I0, 0xff); // dand <rtreg>,i0,0xff
+ if (!in_delay_slot)
+ generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
+ return TRUE;
+
+ case 0x25: /* LHU - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *rsp->impstate->read16); // callh read16
+ if (RTREG != 0)
+ UML_AND(block, R32(RTREG), I0, 0xffff); // dand <rtreg>,i0,0xffff
+ if (!in_delay_slot)
+ generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
+ return TRUE;
+
+ case 0x32: /* LWC2 - MIPS I */
+ return generate_lwc2(rsp, block, compiler, desc);
+
+
+ /* ----- memory store operations ----- */
+
+ case 0x28: /* SB - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
+ UML_CALLH(block, *rsp->impstate->write8); // callh write8
+ if (!in_delay_slot)
+ generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
+ return TRUE;
+
+ case 0x29: /* SH - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
+ UML_CALLH(block, *rsp->impstate->write16); // callh write16
+ if (!in_delay_slot)
+ generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
+ return TRUE;
+
+ case 0x2b: /* SW - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
+ UML_CALLH(block, *rsp->impstate->write32); // callh write32
+ if (!in_delay_slot)
+ generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
+ return TRUE;
+
+ case 0x3a: /* SWC2 - MIPS I */
+ return generate_swc2(rsp, block, compiler, desc);
+ //UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ //UML_CALLC(block, cfunc_swc2, rsp); // callc cfunc_mfc2
+ //return TRUE;
+
+ /* ----- coprocessor instructions ----- */
+
+ case 0x10: /* COP0 - MIPS I */
+ return generate_cop0(rsp, block, compiler, desc);
+
+ case 0x12: /* COP2 - MIPS I */
+ return generate_cop2(rsp, block, compiler, desc);
+ //UML_EXH(block, rsp->impstate->exception[EXCEPTION_INVALIDOP], 0);// exh invalidop,0
+ //return TRUE;
+
+
+ /* ----- unimplemented/illegal instructions ----- */
+
+ //default: /* ??? */ invalid_instruction(op); break;
+ }
+
+ return FALSE;
}
@@ -5796,147 +5796,147 @@ static int generate_opcode(rsp_state *rsp, drcuml_block *block, compiler_state *
static int generate_special(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = op & 63;
- //code_label skip;
-
- switch (opswitch)
- {
- /* ----- shift instructions ----- */
-
- case 0x00: /* SLL - MIPS I */
- if (RDREG != 0)
- {
- UML_SHL(block, R32(RDREG), R32(RTREG), SHIFT);
- }
- return TRUE;
-
- case 0x02: /* SRL - MIPS I */
- if (RDREG != 0)
- {
- UML_SHR(block, R32(RDREG), R32(RTREG), SHIFT);
- }
- return TRUE;
-
- case 0x03: /* SRA - MIPS I */
- if (RDREG != 0)
- {
- UML_SAR(block, R32(RDREG), R32(RTREG), SHIFT);
- }
- return TRUE;
-
- case 0x04: /* SLLV - MIPS I */
- if (RDREG != 0)
- {
- UML_SHL(block, R32(RDREG), R32(RTREG), R32(RSREG));
- }
- return TRUE;
-
- case 0x06: /* SRLV - MIPS I */
- if (RDREG != 0)
- {
- UML_SHR(block, R32(RDREG), R32(RTREG), R32(RSREG));
- }
- return TRUE;
-
- case 0x07: /* SRAV - MIPS I */
- if (RDREG != 0)
- {
- UML_SAR(block, R32(RDREG), R32(RTREG), R32(RSREG));
- }
- return TRUE;
-
- /* ----- basic arithmetic ----- */
-
- case 0x20: /* ADD - MIPS I */
- case 0x21: /* ADDU - MIPS I */
- if (RDREG != 0)
- {
- UML_ADD(block, R32(RDREG), R32(RSREG), R32(RTREG));
- }
- return TRUE;
-
- case 0x22: /* SUB - MIPS I */
- case 0x23: /* SUBU - MIPS I */
- if (RDREG != 0)
- {
- UML_SUB(block, R32(RDREG), R32(RSREG), R32(RTREG));
- }
- return TRUE;
-
- /* ----- basic logical ops ----- */
-
- case 0x24: /* AND - MIPS I */
- if (RDREG != 0)
- {
- UML_AND(block, R32(RDREG), R32(RSREG), R32(RTREG)); // dand <rdreg>,<rsreg>,<rtreg>
- }
- return TRUE;
-
- case 0x25: /* OR - MIPS I */
- if (RDREG != 0)
- {
- UML_OR(block, R32(RDREG), R32(RSREG), R32(RTREG)); // dor <rdreg>,<rsreg>,<rtreg>
- }
- return TRUE;
-
- case 0x26: /* XOR - MIPS I */
- if (RDREG != 0)
- {
- UML_XOR(block, R32(RDREG), R32(RSREG), R32(RTREG)); // dxor <rdreg>,<rsreg>,<rtreg>
- }
- return TRUE;
-
- case 0x27: /* NOR - MIPS I */
- if (RDREG != 0)
- {
- UML_OR(block, I0, R32(RSREG), R32(RTREG)); // dor i0,<rsreg>,<rtreg>
- UML_XOR(block, R32(RDREG), I0, (UINT64)~0); // dxor <rdreg>,i0,~0
- }
- return TRUE;
-
-
- /* ----- basic comparisons ----- */
-
- case 0x2a: /* SLT - MIPS I */
- if (RDREG != 0)
- {
- UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_SETc(block, COND_L, R32(RDREG)); // dset <rdreg>,l
- }
- return TRUE;
-
- case 0x2b: /* SLTU - MIPS I */
- if (RDREG != 0)
- {
- UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_SETc(block, COND_B, R32(RDREG)); // dset <rdreg>,b
- }
- return TRUE;
-
-
- /* ----- jumps and branches ----- */
-
- case 0x08: /* JR - MIPS I */
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
- return TRUE;
-
- case 0x09: /* JALR - MIPS I */
- generate_delay_slot_and_branch(rsp, block, compiler, desc, RDREG); // <next instruction + hashjmp>
- return TRUE;
-
-
- /* ----- system calls ----- */
-
- case 0x0d: /* BREAK - MIPS I */
- UML_MOV(block, mem(&rsp->impstate->arg0), 3); // mov [arg0],3
- UML_CALLC(block, cfunc_sp_set_status_cb, rsp); // callc cfunc_sp_set_status_cb
- UML_MOV(block, mem(&rsp->icount), 0); // mov icount, #0
-
- UML_EXIT(block, EXECUTE_OUT_OF_CYCLES);
- return TRUE;
- }
- return FALSE;
+ UINT32 op = desc->opptr.l[0];
+ UINT8 opswitch = op & 63;
+ //code_label skip;
+
+ switch (opswitch)
+ {
+ /* ----- shift instructions ----- */
+
+ case 0x00: /* SLL - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_SHL(block, R32(RDREG), R32(RTREG), SHIFT);
+ }
+ return TRUE;
+
+ case 0x02: /* SRL - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_SHR(block, R32(RDREG), R32(RTREG), SHIFT);
+ }
+ return TRUE;
+
+ case 0x03: /* SRA - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_SAR(block, R32(RDREG), R32(RTREG), SHIFT);
+ }
+ return TRUE;
+
+ case 0x04: /* SLLV - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_SHL(block, R32(RDREG), R32(RTREG), R32(RSREG));
+ }
+ return TRUE;
+
+ case 0x06: /* SRLV - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_SHR(block, R32(RDREG), R32(RTREG), R32(RSREG));
+ }
+ return TRUE;
+
+ case 0x07: /* SRAV - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_SAR(block, R32(RDREG), R32(RTREG), R32(RSREG));
+ }
+ return TRUE;
+
+ /* ----- basic arithmetic ----- */
+
+ case 0x20: /* ADD - MIPS I */
+ case 0x21: /* ADDU - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_ADD(block, R32(RDREG), R32(RSREG), R32(RTREG));
+ }
+ return TRUE;
+
+ case 0x22: /* SUB - MIPS I */
+ case 0x23: /* SUBU - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_SUB(block, R32(RDREG), R32(RSREG), R32(RTREG));
+ }
+ return TRUE;
+
+ /* ----- basic logical ops ----- */
+
+ case 0x24: /* AND - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_AND(block, R32(RDREG), R32(RSREG), R32(RTREG)); // dand <rdreg>,<rsreg>,<rtreg>
+ }
+ return TRUE;
+
+ case 0x25: /* OR - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_OR(block, R32(RDREG), R32(RSREG), R32(RTREG)); // dor <rdreg>,<rsreg>,<rtreg>
+ }
+ return TRUE;
+
+ case 0x26: /* XOR - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_XOR(block, R32(RDREG), R32(RSREG), R32(RTREG)); // dxor <rdreg>,<rsreg>,<rtreg>
+ }
+ return TRUE;
+
+ case 0x27: /* NOR - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_OR(block, I0, R32(RSREG), R32(RTREG)); // dor i0,<rsreg>,<rtreg>
+ UML_XOR(block, R32(RDREG), I0, (UINT64)~0); // dxor <rdreg>,i0,~0
+ }
+ return TRUE;
+
+
+ /* ----- basic comparisons ----- */
+
+ case 0x2a: /* SLT - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
+ UML_SETc(block, COND_L, R32(RDREG)); // dset <rdreg>,l
+ }
+ return TRUE;
+
+ case 0x2b: /* SLTU - MIPS I */
+ if (RDREG != 0)
+ {
+ UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
+ UML_SETc(block, COND_B, R32(RDREG)); // dset <rdreg>,b
+ }
+ return TRUE;
+
+
+ /* ----- jumps and branches ----- */
+
+ case 0x08: /* JR - MIPS I */
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ return TRUE;
+
+ case 0x09: /* JALR - MIPS I */
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, RDREG); // <next instruction + hashjmp>
+ return TRUE;
+
+
+ /* ----- system calls ----- */
+
+ case 0x0d: /* BREAK - MIPS I */
+ UML_MOV(block, mem(&rsp->impstate->arg0), 3); // mov [arg0],3
+ UML_CALLC(block, cfunc_sp_set_status_cb, rsp); // callc cfunc_sp_set_status_cb
+ UML_MOV(block, mem(&rsp->icount), 0); // mov icount, #0
+
+ UML_EXIT(block, EXECUTE_OUT_OF_CYCLES);
+ return TRUE;
+ }
+ return FALSE;
}
@@ -5948,40 +5948,40 @@ static int generate_special(rsp_state *rsp, drcuml_block *block, compiler_state
static int generate_regimm(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = RTREG;
- code_label skip;
-
- switch (opswitch)
- {
- case 0x00: /* BLTZ */
- case 0x10: /* BLTZAL */
- if (RSREG != 0)
- {
- UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_GE, skip = compiler->labelnum++); // jmp skip,GE
- generate_delay_slot_and_branch(rsp, block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
- // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
- }
- return TRUE;
-
- case 0x01: /* BGEZ */
- case 0x11: /* BGEZAL */
- if (RSREG != 0)
- {
- UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_L, skip = compiler->labelnum++); // jmp skip,L
- generate_delay_slot_and_branch(rsp, block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
- // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
- }
- else
- generate_delay_slot_and_branch(rsp, block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
- // <next instruction + hashjmp>
- return TRUE;
- }
- return FALSE;
+ UINT32 op = desc->opptr.l[0];
+ UINT8 opswitch = RTREG;
+ code_label skip;
+
+ switch (opswitch)
+ {
+ case 0x00: /* BLTZ */
+ case 0x10: /* BLTZAL */
+ if (RSREG != 0)
+ {
+ UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
+ UML_JMPc(block, COND_GE, skip = compiler->labelnum++); // jmp skip,GE
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
+ // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
+ }
+ return TRUE;
+
+ case 0x01: /* BGEZ */
+ case 0x11: /* BGEZAL */
+ if (RSREG != 0)
+ {
+ UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
+ UML_JMPc(block, COND_L, skip = compiler->labelnum++); // jmp skip,L
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
+ // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
+ }
+ else
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
+ // <next instruction + hashjmp>
+ return TRUE;
+ }
+ return FALSE;
}
@@ -5991,44 +5991,44 @@ static int generate_regimm(rsp_state *rsp, drcuml_block *block, compiler_state *
static int generate_cop2(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = RSREG;
-
- switch (opswitch)
- {
- case 0x00: /* MFCz */
- if (RTREG != 0)
- {
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_mfc2, rsp); // callc cfunc_mfc2
- //UML_SEXT(block, R32(RTREG), I0, DWORD); // dsext <rtreg>,i0,dword
- }
- return TRUE;
-
- case 0x02: /* CFCz */
- if (RTREG != 0)
- {
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_cfc2, rsp); // callc cfunc_cfc2
- //UML_SEXT(block, R32(RTREG), I0, DWORD); // dsext <rtreg>,i0,dword
- }
- return TRUE;
-
- case 0x04: /* MTCz */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_mtc2, rsp); // callc cfunc_mtc2
- return TRUE;
-
- case 0x06: /* CTCz */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_ctc2, rsp); // callc cfunc_ctc2
- return TRUE;
-
- case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
- case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- return generate_vector_opcode(rsp, block, compiler, desc);
- }
- return FALSE;
+ UINT32 op = desc->opptr.l[0];
+ UINT8 opswitch = RSREG;
+
+ switch (opswitch)
+ {
+ case 0x00: /* MFCz */
+ if (RTREG != 0)
+ {
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_mfc2, rsp); // callc cfunc_mfc2
+ //UML_SEXT(block, R32(RTREG), I0, DWORD); // dsext <rtreg>,i0,dword
+ }
+ return TRUE;
+
+ case 0x02: /* CFCz */
+ if (RTREG != 0)
+ {
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_cfc2, rsp); // callc cfunc_cfc2
+ //UML_SEXT(block, R32(RTREG), I0, DWORD); // dsext <rtreg>,i0,dword
+ }
+ return TRUE;
+
+ case 0x04: /* MTCz */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_mtc2, rsp); // callc cfunc_mtc2
+ return TRUE;
+
+ case 0x06: /* CTCz */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_ctc2, rsp); // callc cfunc_ctc2
+ return TRUE;
+
+ case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ return generate_vector_opcode(rsp, block, compiler, desc);
+ }
+ return FALSE;
}
/*-------------------------------------------------
@@ -6037,40 +6037,40 @@ static int generate_cop2(rsp_state *rsp, drcuml_block *block, compiler_state *co
static int generate_cop0(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = RSREG;
-
- switch (opswitch)
- {
- case 0x00: /* MFCz */
- if (RTREG != 0)
- {
- UML_MOV(block, mem(&rsp->impstate->arg0), RDREG); // mov [arg0],<rdreg>
- UML_MOV(block, mem(&rsp->impstate->arg1), RTREG); // mov [arg1],<rtreg>
- UML_CALLC(block, cfunc_get_cop0_reg, rsp); // callc cfunc_get_cop0_reg
- if(RDREG == 2)
- {
- generate_update_cycles(rsp, block, compiler, mem(&rsp->pc), TRUE);
- UML_HASHJMP(block, 0, mem(&rsp->pc), *rsp->impstate->nocode);
- }
- }
- return TRUE;
-
- case 0x04: /* MTCz */
- UML_MOV(block, mem(&rsp->impstate->arg0), RDREG); // mov [arg0],<rdreg>
- UML_MOV(block, mem(&rsp->impstate->arg1), R32(RTREG)); // mov [arg1],rtreg
- UML_CALLC(block, cfunc_set_cop0_reg, rsp); // callc cfunc_set_cop0_reg
- return TRUE;
- }
-
- return FALSE;
+ UINT32 op = desc->opptr.l[0];
+ UINT8 opswitch = RSREG;
+
+ switch (opswitch)
+ {
+ case 0x00: /* MFCz */
+ if (RTREG != 0)
+ {
+ UML_MOV(block, mem(&rsp->impstate->arg0), RDREG); // mov [arg0],<rdreg>
+ UML_MOV(block, mem(&rsp->impstate->arg1), RTREG); // mov [arg1],<rtreg>
+ UML_CALLC(block, cfunc_get_cop0_reg, rsp); // callc cfunc_get_cop0_reg
+ if(RDREG == 2)
+ {
+ generate_update_cycles(rsp, block, compiler, mem(&rsp->pc), TRUE);
+ UML_HASHJMP(block, 0, mem(&rsp->pc), *rsp->impstate->nocode);
+ }
+ }
+ return TRUE;
+
+ case 0x04: /* MTCz */
+ UML_MOV(block, mem(&rsp->impstate->arg0), RDREG); // mov [arg0],<rdreg>
+ UML_MOV(block, mem(&rsp->impstate->arg1), R32(RTREG)); // mov [arg1],rtreg
+ UML_CALLC(block, cfunc_set_cop0_reg, rsp); // callc cfunc_set_cop0_reg
+ return TRUE;
+ }
+
+ return FALSE;
}
static void cfunc_mfc2(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int el = (op >> 7) & 0xf;
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int el = (op >> 7) & 0xf;
#if USE_SIMD
UINT16 out;
SIMD_EXTRACT16(rsp->xv[VS1REG], out, (el >> 1));
@@ -6086,18 +6086,18 @@ static void cfunc_mfc2(void *param)
rsp->r[RTREG] = (INT32)(INT16)((out << 8) | temp);
#else
- UINT16 b1 = VREG_B(VS1REG, (el+0) & 0xf);
- UINT16 b2 = VREG_B(VS1REG, (el+1) & 0xf);
- if (RTREG) RTVAL = (INT32)(INT16)((b1 << 8) | (b2));
+ UINT16 b1 = VREG_B(VS1REG, (el+0) & 0xf);
+ UINT16 b2 = VREG_B(VS1REG, (el+1) & 0xf);
+ if (RTREG) RTVAL = (INT32)(INT16)((b1 << 8) | (b2));
#endif
}
static void cfunc_cfc2(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- if (RTREG)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ if (RTREG)
+ {
switch(RDREG)
{
case 0:
@@ -6149,28 +6149,28 @@ static void cfunc_cfc2(void *param)
((CLIP1_FLAG(rsp, 7) & 1) << 7);
break;
}
- }
+ }
}
static void cfunc_mtc2(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- int el = (op >> 7) & 0xf;
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ int el = (op >> 7) & 0xf;
#if USE_SIMD
- SIMD_INSERT16(rsp->xv[VS1REG], RTVAL, el >> 1);
+ SIMD_INSERT16(rsp->xv[VS1REG], RTVAL, el >> 1);
#else
- VREG_B(VS1REG, (el+0) & 0xf) = (RTVAL >> 8) & 0xff;
- VREG_B(VS1REG, (el+1) & 0xf) = (RTVAL >> 0) & 0xff;
+ VREG_B(VS1REG, (el+0) & 0xf) = (RTVAL >> 8) & 0xff;
+ VREG_B(VS1REG, (el+1) & 0xf) = (RTVAL >> 0) & 0xff;
#endif
}
static void cfunc_ctc2(void *param)
{
- rsp_state *rsp = (rsp_state*)param;
- UINT32 op = rsp->impstate->arg0;
- switch(RDREG)
- {
+ rsp_state *rsp = (rsp_state*)param;
+ UINT32 op = rsp->impstate->arg0;
+ switch(RDREG)
+ {
case 0:
CLEAR_CARRY_FLAGS();
CLEAR_ZERO_FLAGS();
@@ -6277,259 +6277,259 @@ static void cfunc_ctc2(void *param)
static void log_add_disasm_comment(rsp_state *rsp, drcuml_block *block, UINT32 pc, UINT32 op)
{
#if (LOG_UML)
- char buffer[100];
- rsp_dasm_one(buffer, pc, op);
- block->append_comment("%08X: %s", pc, buffer); // comment
+ char buffer[100];
+ rsp_dasm_one(buffer, pc, op);
+ block->append_comment("%08X: %s", pc, buffer); // comment
#endif
}
static CPU_SET_INFO( rsp )
{
- rsp_state *rsp = get_safe_token(device);
-
- switch (state)
- {
- /* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + RSP_PC: rsp->pc = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R0: rsp->r[0] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R1: rsp->r[1] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R2: rsp->r[2] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R3: rsp->r[3] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R4: rsp->r[4] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R5: rsp->r[5] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R6: rsp->r[6] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R7: rsp->r[7] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R8: rsp->r[8] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R9: rsp->r[9] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R10: rsp->r[10] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R11: rsp->r[11] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R12: rsp->r[12] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R13: rsp->r[13] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R14: rsp->r[14] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R15: rsp->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R16: rsp->r[16] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R17: rsp->r[17] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R18: rsp->r[18] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R19: rsp->r[19] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R20: rsp->r[20] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R21: rsp->r[21] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R22: rsp->r[22] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R23: rsp->r[23] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R24: rsp->r[24] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R25: rsp->r[25] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R26: rsp->r[26] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R27: rsp->r[27] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R28: rsp->r[28] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R29: rsp->r[29] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_R30: rsp->r[30] = info->i; break;
- case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + RSP_R31: rsp->r[31] = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_SR: rsp->sr = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_NEXTPC: rsp->nextpc = info->i; break;
- case CPUINFO_INT_REGISTER + RSP_STEPCNT: rsp->step_count = info->i; break;
- }
+ rsp_state *rsp = get_safe_token(device);
+
+ switch (state)
+ {
+ /* --- the following bits of info are set as 64-bit signed integers --- */
+ case CPUINFO_INT_PC:
+ case CPUINFO_INT_REGISTER + RSP_PC: rsp->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R0: rsp->r[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R1: rsp->r[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R2: rsp->r[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R3: rsp->r[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R4: rsp->r[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R5: rsp->r[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R6: rsp->r[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R7: rsp->r[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R8: rsp->r[8] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R9: rsp->r[9] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R10: rsp->r[10] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R11: rsp->r[11] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R12: rsp->r[12] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R13: rsp->r[13] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R14: rsp->r[14] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R15: rsp->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R16: rsp->r[16] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R17: rsp->r[17] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R18: rsp->r[18] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R19: rsp->r[19] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R20: rsp->r[20] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R21: rsp->r[21] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R22: rsp->r[22] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R23: rsp->r[23] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R24: rsp->r[24] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R25: rsp->r[25] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R26: rsp->r[26] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R27: rsp->r[27] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R28: rsp->r[28] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R29: rsp->r[29] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_R30: rsp->r[30] = info->i; break;
+ case CPUINFO_INT_SP:
+ case CPUINFO_INT_REGISTER + RSP_R31: rsp->r[31] = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_SR: rsp->sr = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_NEXTPC: rsp->nextpc = info->i; break;
+ case CPUINFO_INT_REGISTER + RSP_STEPCNT: rsp->step_count = info->i; break;
+ }
}
CPU_GET_INFO( rsp_drc )
{
- rsp_state *rsp = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
-
- switch(state)
- {
- /* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(rsp_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = rsp->ppc | 0x04000000; break;
-
- case CPUINFO_INT_PC: /* intentional fallthrough */
- case CPUINFO_INT_REGISTER + RSP_PC: info->i = rsp->pc | 0x04000000; break;
-
- case CPUINFO_INT_REGISTER + RSP_R0: info->i = rsp->r[0]; break;
- case CPUINFO_INT_REGISTER + RSP_R1: info->i = rsp->r[1]; break;
- case CPUINFO_INT_REGISTER + RSP_R2: info->i = rsp->r[2]; break;
- case CPUINFO_INT_REGISTER + RSP_R3: info->i = rsp->r[3]; break;
- case CPUINFO_INT_REGISTER + RSP_R4: info->i = rsp->r[4]; break;
- case CPUINFO_INT_REGISTER + RSP_R5: info->i = rsp->r[5]; break;
- case CPUINFO_INT_REGISTER + RSP_R6: info->i = rsp->r[6]; break;
- case CPUINFO_INT_REGISTER + RSP_R7: info->i = rsp->r[7]; break;
- case CPUINFO_INT_REGISTER + RSP_R8: info->i = rsp->r[8]; break;
- case CPUINFO_INT_REGISTER + RSP_R9: info->i = rsp->r[9]; break;
- case CPUINFO_INT_REGISTER + RSP_R10: info->i = rsp->r[10]; break;
- case CPUINFO_INT_REGISTER + RSP_R11: info->i = rsp->r[11]; break;
- case CPUINFO_INT_REGISTER + RSP_R12: info->i = rsp->r[12]; break;
- case CPUINFO_INT_REGISTER + RSP_R13: info->i = rsp->r[13]; break;
- case CPUINFO_INT_REGISTER + RSP_R14: info->i = rsp->r[14]; break;
- case CPUINFO_INT_REGISTER + RSP_R15: info->i = rsp->r[15]; break;
- case CPUINFO_INT_REGISTER + RSP_R16: info->i = rsp->r[16]; break;
- case CPUINFO_INT_REGISTER + RSP_R17: info->i = rsp->r[17]; break;
- case CPUINFO_INT_REGISTER + RSP_R18: info->i = rsp->r[18]; break;
- case CPUINFO_INT_REGISTER + RSP_R19: info->i = rsp->r[19]; break;
- case CPUINFO_INT_REGISTER + RSP_R20: info->i = rsp->r[20]; break;
- case CPUINFO_INT_REGISTER + RSP_R21: info->i = rsp->r[21]; break;
- case CPUINFO_INT_REGISTER + RSP_R22: info->i = rsp->r[22]; break;
- case CPUINFO_INT_REGISTER + RSP_R23: info->i = rsp->r[23]; break;
- case CPUINFO_INT_REGISTER + RSP_R24: info->i = rsp->r[24]; break;
- case CPUINFO_INT_REGISTER + RSP_R25: info->i = rsp->r[25]; break;
- case CPUINFO_INT_REGISTER + RSP_R26: info->i = rsp->r[26]; break;
- case CPUINFO_INT_REGISTER + RSP_R27: info->i = rsp->r[27]; break;
- case CPUINFO_INT_REGISTER + RSP_R28: info->i = rsp->r[28]; break;
- case CPUINFO_INT_REGISTER + RSP_R29: info->i = rsp->r[29]; break;
- case CPUINFO_INT_REGISTER + RSP_R30: info->i = rsp->r[30]; break;
- case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + RSP_R31: info->i = rsp->r[31]; break;
- case CPUINFO_INT_REGISTER + RSP_SR: info->i = rsp->sr; break;
- case CPUINFO_INT_REGISTER + RSP_NEXTPC: info->i = rsp->nextpc | 0x04000000; break;
- case CPUINFO_INT_REGISTER + RSP_STEPCNT: info->i = rsp->step_count; break;
-
- /* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(rsp); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rsp); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(rsp); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(rsp); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(rsp); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(rsp); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &rsp->icount; break;
-
- /* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "RSP DRC"); break;
- case CPUINFO_STR_SHORTNAME: strcpy(info->s, "rsp_drc"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "RSP"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
-
- case CPUINFO_STR_REGISTER + RSP_PC: sprintf(info->s, "PC: %08X", rsp->pc | 0x04000000); break;
-
- case CPUINFO_STR_REGISTER + RSP_R0: sprintf(info->s, "R0: %08X", rsp->r[0]); break;
- case CPUINFO_STR_REGISTER + RSP_R1: sprintf(info->s, "R1: %08X", rsp->r[1]); break;
- case CPUINFO_STR_REGISTER + RSP_R2: sprintf(info->s, "R2: %08X", rsp->r[2]); break;
- case CPUINFO_STR_REGISTER + RSP_R3: sprintf(info->s, "R3: %08X", rsp->r[3]); break;
- case CPUINFO_STR_REGISTER + RSP_R4: sprintf(info->s, "R4: %08X", rsp->r[4]); break;
- case CPUINFO_STR_REGISTER + RSP_R5: sprintf(info->s, "R5: %08X", rsp->r[5]); break;
- case CPUINFO_STR_REGISTER + RSP_R6: sprintf(info->s, "R6: %08X", rsp->r[6]); break;
- case CPUINFO_STR_REGISTER + RSP_R7: sprintf(info->s, "R7: %08X", rsp->r[7]); break;
- case CPUINFO_STR_REGISTER + RSP_R8: sprintf(info->s, "R8: %08X", rsp->r[8]); break;
- case CPUINFO_STR_REGISTER + RSP_R9: sprintf(info->s, "R9: %08X", rsp->r[9]); break;
- case CPUINFO_STR_REGISTER + RSP_R10: sprintf(info->s, "R10: %08X", rsp->r[10]); break;
- case CPUINFO_STR_REGISTER + RSP_R11: sprintf(info->s, "R11: %08X", rsp->r[11]); break;
- case CPUINFO_STR_REGISTER + RSP_R12: sprintf(info->s, "R12: %08X", rsp->r[12]); break;
- case CPUINFO_STR_REGISTER + RSP_R13: sprintf(info->s, "R13: %08X", rsp->r[13]); break;
- case CPUINFO_STR_REGISTER + RSP_R14: sprintf(info->s, "R14: %08X", rsp->r[14]); break;
- case CPUINFO_STR_REGISTER + RSP_R15: sprintf(info->s, "R15: %08X", rsp->r[15]); break;
- case CPUINFO_STR_REGISTER + RSP_R16: sprintf(info->s, "R16: %08X", rsp->r[16]); break;
- case CPUINFO_STR_REGISTER + RSP_R17: sprintf(info->s, "R17: %08X", rsp->r[17]); break;
- case CPUINFO_STR_REGISTER + RSP_R18: sprintf(info->s, "R18: %08X", rsp->r[18]); break;
- case CPUINFO_STR_REGISTER + RSP_R19: sprintf(info->s, "R19: %08X", rsp->r[19]); break;
- case CPUINFO_STR_REGISTER + RSP_R20: sprintf(info->s, "R20: %08X", rsp->r[20]); break;
- case CPUINFO_STR_REGISTER + RSP_R21: sprintf(info->s, "R21: %08X", rsp->r[21]); break;
- case CPUINFO_STR_REGISTER + RSP_R22: sprintf(info->s, "R22: %08X", rsp->r[22]); break;
- case CPUINFO_STR_REGISTER + RSP_R23: sprintf(info->s, "R23: %08X", rsp->r[23]); break;
- case CPUINFO_STR_REGISTER + RSP_R24: sprintf(info->s, "R24: %08X", rsp->r[24]); break;
- case CPUINFO_STR_REGISTER + RSP_R25: sprintf(info->s, "R25: %08X", rsp->r[25]); break;
- case CPUINFO_STR_REGISTER + RSP_R26: sprintf(info->s, "R26: %08X", rsp->r[26]); break;
- case CPUINFO_STR_REGISTER + RSP_R27: sprintf(info->s, "R27: %08X", rsp->r[27]); break;
- case CPUINFO_STR_REGISTER + RSP_R28: sprintf(info->s, "R28: %08X", rsp->r[28]); break;
- case CPUINFO_STR_REGISTER + RSP_R29: sprintf(info->s, "R29: %08X", rsp->r[29]); break;
- case CPUINFO_STR_REGISTER + RSP_R30: sprintf(info->s, "R30: %08X", rsp->r[30]); break;
- case CPUINFO_STR_REGISTER + RSP_R31: sprintf(info->s, "R31: %08X", rsp->r[31]); break;
+ rsp_state *rsp = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
+
+ switch(state)
+ {
+ /* --- the following bits of info are returned as 64-bit signed integers --- */
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(rsp_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = rsp->ppc | 0x04000000; break;
+
+ case CPUINFO_INT_PC: /* intentional fallthrough */
+ case CPUINFO_INT_REGISTER + RSP_PC: info->i = rsp->pc | 0x04000000; break;
+
+ case CPUINFO_INT_REGISTER + RSP_R0: info->i = rsp->r[0]; break;
+ case CPUINFO_INT_REGISTER + RSP_R1: info->i = rsp->r[1]; break;
+ case CPUINFO_INT_REGISTER + RSP_R2: info->i = rsp->r[2]; break;
+ case CPUINFO_INT_REGISTER + RSP_R3: info->i = rsp->r[3]; break;
+ case CPUINFO_INT_REGISTER + RSP_R4: info->i = rsp->r[4]; break;
+ case CPUINFO_INT_REGISTER + RSP_R5: info->i = rsp->r[5]; break;
+ case CPUINFO_INT_REGISTER + RSP_R6: info->i = rsp->r[6]; break;
+ case CPUINFO_INT_REGISTER + RSP_R7: info->i = rsp->r[7]; break;
+ case CPUINFO_INT_REGISTER + RSP_R8: info->i = rsp->r[8]; break;
+ case CPUINFO_INT_REGISTER + RSP_R9: info->i = rsp->r[9]; break;
+ case CPUINFO_INT_REGISTER + RSP_R10: info->i = rsp->r[10]; break;
+ case CPUINFO_INT_REGISTER + RSP_R11: info->i = rsp->r[11]; break;
+ case CPUINFO_INT_REGISTER + RSP_R12: info->i = rsp->r[12]; break;
+ case CPUINFO_INT_REGISTER + RSP_R13: info->i = rsp->r[13]; break;
+ case CPUINFO_INT_REGISTER + RSP_R14: info->i = rsp->r[14]; break;
+ case CPUINFO_INT_REGISTER + RSP_R15: info->i = rsp->r[15]; break;
+ case CPUINFO_INT_REGISTER + RSP_R16: info->i = rsp->r[16]; break;
+ case CPUINFO_INT_REGISTER + RSP_R17: info->i = rsp->r[17]; break;
+ case CPUINFO_INT_REGISTER + RSP_R18: info->i = rsp->r[18]; break;
+ case CPUINFO_INT_REGISTER + RSP_R19: info->i = rsp->r[19]; break;
+ case CPUINFO_INT_REGISTER + RSP_R20: info->i = rsp->r[20]; break;
+ case CPUINFO_INT_REGISTER + RSP_R21: info->i = rsp->r[21]; break;
+ case CPUINFO_INT_REGISTER + RSP_R22: info->i = rsp->r[22]; break;
+ case CPUINFO_INT_REGISTER + RSP_R23: info->i = rsp->r[23]; break;
+ case CPUINFO_INT_REGISTER + RSP_R24: info->i = rsp->r[24]; break;
+ case CPUINFO_INT_REGISTER + RSP_R25: info->i = rsp->r[25]; break;
+ case CPUINFO_INT_REGISTER + RSP_R26: info->i = rsp->r[26]; break;
+ case CPUINFO_INT_REGISTER + RSP_R27: info->i = rsp->r[27]; break;
+ case CPUINFO_INT_REGISTER + RSP_R28: info->i = rsp->r[28]; break;
+ case CPUINFO_INT_REGISTER + RSP_R29: info->i = rsp->r[29]; break;
+ case CPUINFO_INT_REGISTER + RSP_R30: info->i = rsp->r[30]; break;
+ case CPUINFO_INT_SP:
+ case CPUINFO_INT_REGISTER + RSP_R31: info->i = rsp->r[31]; break;
+ case CPUINFO_INT_REGISTER + RSP_SR: info->i = rsp->sr; break;
+ case CPUINFO_INT_REGISTER + RSP_NEXTPC: info->i = rsp->nextpc | 0x04000000; break;
+ case CPUINFO_INT_REGISTER + RSP_STEPCNT: info->i = rsp->step_count; break;
+
+ /* --- the following bits of info are returned as pointers to data or functions --- */
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(rsp); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rsp); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(rsp); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(rsp); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(rsp); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(rsp); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &rsp->icount; break;
+
+ /* --- the following bits of info are returned as NULL-terminated strings --- */
+ case CPUINFO_STR_NAME: strcpy(info->s, "RSP DRC"); break;
+ case CPUINFO_STR_SHORTNAME: strcpy(info->s, "rsp_drc"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "RSP"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
+
+ case CPUINFO_STR_REGISTER + RSP_PC: sprintf(info->s, "PC: %08X", rsp->pc | 0x04000000); break;
+
+ case CPUINFO_STR_REGISTER + RSP_R0: sprintf(info->s, "R0: %08X", rsp->r[0]); break;
+ case CPUINFO_STR_REGISTER + RSP_R1: sprintf(info->s, "R1: %08X", rsp->r[1]); break;
+ case CPUINFO_STR_REGISTER + RSP_R2: sprintf(info->s, "R2: %08X", rsp->r[2]); break;
+ case CPUINFO_STR_REGISTER + RSP_R3: sprintf(info->s, "R3: %08X", rsp->r[3]); break;
+ case CPUINFO_STR_REGISTER + RSP_R4: sprintf(info->s, "R4: %08X", rsp->r[4]); break;
+ case CPUINFO_STR_REGISTER + RSP_R5: sprintf(info->s, "R5: %08X", rsp->r[5]); break;
+ case CPUINFO_STR_REGISTER + RSP_R6: sprintf(info->s, "R6: %08X", rsp->r[6]); break;
+ case CPUINFO_STR_REGISTER + RSP_R7: sprintf(info->s, "R7: %08X", rsp->r[7]); break;
+ case CPUINFO_STR_REGISTER + RSP_R8: sprintf(info->s, "R8: %08X", rsp->r[8]); break;
+ case CPUINFO_STR_REGISTER + RSP_R9: sprintf(info->s, "R9: %08X", rsp->r[9]); break;
+ case CPUINFO_STR_REGISTER + RSP_R10: sprintf(info->s, "R10: %08X", rsp->r[10]); break;
+ case CPUINFO_STR_REGISTER + RSP_R11: sprintf(info->s, "R11: %08X", rsp->r[11]); break;
+ case CPUINFO_STR_REGISTER + RSP_R12: sprintf(info->s, "R12: %08X", rsp->r[12]); break;
+ case CPUINFO_STR_REGISTER + RSP_R13: sprintf(info->s, "R13: %08X", rsp->r[13]); break;
+ case CPUINFO_STR_REGISTER + RSP_R14: sprintf(info->s, "R14: %08X", rsp->r[14]); break;
+ case CPUINFO_STR_REGISTER + RSP_R15: sprintf(info->s, "R15: %08X", rsp->r[15]); break;
+ case CPUINFO_STR_REGISTER + RSP_R16: sprintf(info->s, "R16: %08X", rsp->r[16]); break;
+ case CPUINFO_STR_REGISTER + RSP_R17: sprintf(info->s, "R17: %08X", rsp->r[17]); break;
+ case CPUINFO_STR_REGISTER + RSP_R18: sprintf(info->s, "R18: %08X", rsp->r[18]); break;
+ case CPUINFO_STR_REGISTER + RSP_R19: sprintf(info->s, "R19: %08X", rsp->r[19]); break;
+ case CPUINFO_STR_REGISTER + RSP_R20: sprintf(info->s, "R20: %08X", rsp->r[20]); break;
+ case CPUINFO_STR_REGISTER + RSP_R21: sprintf(info->s, "R21: %08X", rsp->r[21]); break;
+ case CPUINFO_STR_REGISTER + RSP_R22: sprintf(info->s, "R22: %08X", rsp->r[22]); break;
+ case CPUINFO_STR_REGISTER + RSP_R23: sprintf(info->s, "R23: %08X", rsp->r[23]); break;
+ case CPUINFO_STR_REGISTER + RSP_R24: sprintf(info->s, "R24: %08X", rsp->r[24]); break;
+ case CPUINFO_STR_REGISTER + RSP_R25: sprintf(info->s, "R25: %08X", rsp->r[25]); break;
+ case CPUINFO_STR_REGISTER + RSP_R26: sprintf(info->s, "R26: %08X", rsp->r[26]); break;
+ case CPUINFO_STR_REGISTER + RSP_R27: sprintf(info->s, "R27: %08X", rsp->r[27]); break;
+ case CPUINFO_STR_REGISTER + RSP_R28: sprintf(info->s, "R28: %08X", rsp->r[28]); break;
+ case CPUINFO_STR_REGISTER + RSP_R29: sprintf(info->s, "R29: %08X", rsp->r[29]); break;
+ case CPUINFO_STR_REGISTER + RSP_R30: sprintf(info->s, "R30: %08X", rsp->r[30]); break;
+ case CPUINFO_STR_REGISTER + RSP_R31: sprintf(info->s, "R31: %08X", rsp->r[31]); break;
#if USE_SIMD
- case CPUINFO_STR_REGISTER + RSP_V0: sprintf(info->s, "V0: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 0], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V1: sprintf(info->s, "V1: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 1], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V2: sprintf(info->s, "V2: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 2], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V3: sprintf(info->s, "V3: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 3], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V4: sprintf(info->s, "V4: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 4], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V5: sprintf(info->s, "V5: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 5], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V6: sprintf(info->s, "V6: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 6], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V7: sprintf(info->s, "V7: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 7], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V8: sprintf(info->s, "V8: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 8], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V9: sprintf(info->s, "V9: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 9], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V10: sprintf(info->s, "V10: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[10], 7), (UINT16)_mm_extract_epi16(rsp->xv[10], 6), (UINT16)_mm_extract_epi16(rsp->xv[10], 5), (UINT16)_mm_extract_epi16(rsp->xv[10], 4), (UINT16)_mm_extract_epi16(rsp->xv[10], 3), (UINT16)_mm_extract_epi16(rsp->xv[10], 2), (UINT16)_mm_extract_epi16(rsp->xv[10], 1), (UINT16)_mm_extract_epi16(rsp->xv[10], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V11: sprintf(info->s, "V11: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[11], 7), (UINT16)_mm_extract_epi16(rsp->xv[11], 6), (UINT16)_mm_extract_epi16(rsp->xv[11], 5), (UINT16)_mm_extract_epi16(rsp->xv[11], 4), (UINT16)_mm_extract_epi16(rsp->xv[11], 3), (UINT16)_mm_extract_epi16(rsp->xv[11], 2), (UINT16)_mm_extract_epi16(rsp->xv[11], 1), (UINT16)_mm_extract_epi16(rsp->xv[11], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V12: sprintf(info->s, "V12: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[12], 7), (UINT16)_mm_extract_epi16(rsp->xv[12], 6), (UINT16)_mm_extract_epi16(rsp->xv[12], 5), (UINT16)_mm_extract_epi16(rsp->xv[12], 4), (UINT16)_mm_extract_epi16(rsp->xv[12], 3), (UINT16)_mm_extract_epi16(rsp->xv[12], 2), (UINT16)_mm_extract_epi16(rsp->xv[12], 1), (UINT16)_mm_extract_epi16(rsp->xv[12], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V13: sprintf(info->s, "V13: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[13], 7), (UINT16)_mm_extract_epi16(rsp->xv[13], 6), (UINT16)_mm_extract_epi16(rsp->xv[13], 5), (UINT16)_mm_extract_epi16(rsp->xv[13], 4), (UINT16)_mm_extract_epi16(rsp->xv[13], 3), (UINT16)_mm_extract_epi16(rsp->xv[13], 2), (UINT16)_mm_extract_epi16(rsp->xv[13], 1), (UINT16)_mm_extract_epi16(rsp->xv[13], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V14: sprintf(info->s, "V14: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[14], 7), (UINT16)_mm_extract_epi16(rsp->xv[14], 6), (UINT16)_mm_extract_epi16(rsp->xv[14], 5), (UINT16)_mm_extract_epi16(rsp->xv[14], 4), (UINT16)_mm_extract_epi16(rsp->xv[14], 3), (UINT16)_mm_extract_epi16(rsp->xv[14], 2), (UINT16)_mm_extract_epi16(rsp->xv[14], 1), (UINT16)_mm_extract_epi16(rsp->xv[14], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V15: sprintf(info->s, "V15: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[15], 7), (UINT16)_mm_extract_epi16(rsp->xv[15], 6), (UINT16)_mm_extract_epi16(rsp->xv[15], 5), (UINT16)_mm_extract_epi16(rsp->xv[15], 4), (UINT16)_mm_extract_epi16(rsp->xv[15], 3), (UINT16)_mm_extract_epi16(rsp->xv[15], 2), (UINT16)_mm_extract_epi16(rsp->xv[15], 1), (UINT16)_mm_extract_epi16(rsp->xv[15], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V16: sprintf(info->s, "V16: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[16], 7), (UINT16)_mm_extract_epi16(rsp->xv[16], 6), (UINT16)_mm_extract_epi16(rsp->xv[16], 5), (UINT16)_mm_extract_epi16(rsp->xv[16], 4), (UINT16)_mm_extract_epi16(rsp->xv[16], 3), (UINT16)_mm_extract_epi16(rsp->xv[16], 2), (UINT16)_mm_extract_epi16(rsp->xv[16], 1), (UINT16)_mm_extract_epi16(rsp->xv[16], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V17: sprintf(info->s, "V17: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[17], 7), (UINT16)_mm_extract_epi16(rsp->xv[17], 6), (UINT16)_mm_extract_epi16(rsp->xv[17], 5), (UINT16)_mm_extract_epi16(rsp->xv[17], 4), (UINT16)_mm_extract_epi16(rsp->xv[17], 3), (UINT16)_mm_extract_epi16(rsp->xv[17], 2), (UINT16)_mm_extract_epi16(rsp->xv[17], 1), (UINT16)_mm_extract_epi16(rsp->xv[17], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V18: sprintf(info->s, "V18: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[18], 7), (UINT16)_mm_extract_epi16(rsp->xv[18], 6), (UINT16)_mm_extract_epi16(rsp->xv[18], 5), (UINT16)_mm_extract_epi16(rsp->xv[18], 4), (UINT16)_mm_extract_epi16(rsp->xv[18], 3), (UINT16)_mm_extract_epi16(rsp->xv[18], 2), (UINT16)_mm_extract_epi16(rsp->xv[18], 1), (UINT16)_mm_extract_epi16(rsp->xv[18], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V19: sprintf(info->s, "V19: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[19], 7), (UINT16)_mm_extract_epi16(rsp->xv[19], 6), (UINT16)_mm_extract_epi16(rsp->xv[19], 5), (UINT16)_mm_extract_epi16(rsp->xv[19], 4), (UINT16)_mm_extract_epi16(rsp->xv[19], 3), (UINT16)_mm_extract_epi16(rsp->xv[19], 2), (UINT16)_mm_extract_epi16(rsp->xv[19], 1), (UINT16)_mm_extract_epi16(rsp->xv[19], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V20: sprintf(info->s, "V20: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[20], 7), (UINT16)_mm_extract_epi16(rsp->xv[20], 6), (UINT16)_mm_extract_epi16(rsp->xv[20], 5), (UINT16)_mm_extract_epi16(rsp->xv[20], 4), (UINT16)_mm_extract_epi16(rsp->xv[20], 3), (UINT16)_mm_extract_epi16(rsp->xv[20], 2), (UINT16)_mm_extract_epi16(rsp->xv[20], 1), (UINT16)_mm_extract_epi16(rsp->xv[20], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V21: sprintf(info->s, "V21: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[21], 7), (UINT16)_mm_extract_epi16(rsp->xv[21], 6), (UINT16)_mm_extract_epi16(rsp->xv[21], 5), (UINT16)_mm_extract_epi16(rsp->xv[21], 4), (UINT16)_mm_extract_epi16(rsp->xv[21], 3), (UINT16)_mm_extract_epi16(rsp->xv[21], 2), (UINT16)_mm_extract_epi16(rsp->xv[21], 1), (UINT16)_mm_extract_epi16(rsp->xv[21], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V22: sprintf(info->s, "V22: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[22], 7), (UINT16)_mm_extract_epi16(rsp->xv[22], 6), (UINT16)_mm_extract_epi16(rsp->xv[22], 5), (UINT16)_mm_extract_epi16(rsp->xv[22], 4), (UINT16)_mm_extract_epi16(rsp->xv[22], 3), (UINT16)_mm_extract_epi16(rsp->xv[22], 2), (UINT16)_mm_extract_epi16(rsp->xv[22], 1), (UINT16)_mm_extract_epi16(rsp->xv[22], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V23: sprintf(info->s, "V23: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[23], 7), (UINT16)_mm_extract_epi16(rsp->xv[23], 6), (UINT16)_mm_extract_epi16(rsp->xv[23], 5), (UINT16)_mm_extract_epi16(rsp->xv[23], 4), (UINT16)_mm_extract_epi16(rsp->xv[23], 3), (UINT16)_mm_extract_epi16(rsp->xv[23], 2), (UINT16)_mm_extract_epi16(rsp->xv[23], 1), (UINT16)_mm_extract_epi16(rsp->xv[23], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V24: sprintf(info->s, "V24: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[24], 7), (UINT16)_mm_extract_epi16(rsp->xv[24], 6), (UINT16)_mm_extract_epi16(rsp->xv[24], 5), (UINT16)_mm_extract_epi16(rsp->xv[24], 4), (UINT16)_mm_extract_epi16(rsp->xv[24], 3), (UINT16)_mm_extract_epi16(rsp->xv[24], 2), (UINT16)_mm_extract_epi16(rsp->xv[24], 1), (UINT16)_mm_extract_epi16(rsp->xv[24], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V25: sprintf(info->s, "V25: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[25], 7), (UINT16)_mm_extract_epi16(rsp->xv[25], 6), (UINT16)_mm_extract_epi16(rsp->xv[25], 5), (UINT16)_mm_extract_epi16(rsp->xv[25], 4), (UINT16)_mm_extract_epi16(rsp->xv[25], 3), (UINT16)_mm_extract_epi16(rsp->xv[25], 2), (UINT16)_mm_extract_epi16(rsp->xv[25], 1), (UINT16)_mm_extract_epi16(rsp->xv[25], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V26: sprintf(info->s, "V26: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[26], 7), (UINT16)_mm_extract_epi16(rsp->xv[26], 6), (UINT16)_mm_extract_epi16(rsp->xv[26], 5), (UINT16)_mm_extract_epi16(rsp->xv[26], 4), (UINT16)_mm_extract_epi16(rsp->xv[26], 3), (UINT16)_mm_extract_epi16(rsp->xv[26], 2), (UINT16)_mm_extract_epi16(rsp->xv[26], 1), (UINT16)_mm_extract_epi16(rsp->xv[26], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V27: sprintf(info->s, "V27: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[27], 7), (UINT16)_mm_extract_epi16(rsp->xv[27], 6), (UINT16)_mm_extract_epi16(rsp->xv[27], 5), (UINT16)_mm_extract_epi16(rsp->xv[27], 4), (UINT16)_mm_extract_epi16(rsp->xv[27], 3), (UINT16)_mm_extract_epi16(rsp->xv[27], 2), (UINT16)_mm_extract_epi16(rsp->xv[27], 1), (UINT16)_mm_extract_epi16(rsp->xv[27], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V28: sprintf(info->s, "V28: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[28], 7), (UINT16)_mm_extract_epi16(rsp->xv[28], 6), (UINT16)_mm_extract_epi16(rsp->xv[28], 5), (UINT16)_mm_extract_epi16(rsp->xv[28], 4), (UINT16)_mm_extract_epi16(rsp->xv[28], 3), (UINT16)_mm_extract_epi16(rsp->xv[28], 2), (UINT16)_mm_extract_epi16(rsp->xv[28], 1), (UINT16)_mm_extract_epi16(rsp->xv[28], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V29: sprintf(info->s, "V29: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[29], 7), (UINT16)_mm_extract_epi16(rsp->xv[29], 6), (UINT16)_mm_extract_epi16(rsp->xv[29], 5), (UINT16)_mm_extract_epi16(rsp->xv[29], 4), (UINT16)_mm_extract_epi16(rsp->xv[29], 3), (UINT16)_mm_extract_epi16(rsp->xv[29], 2), (UINT16)_mm_extract_epi16(rsp->xv[29], 1), (UINT16)_mm_extract_epi16(rsp->xv[29], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V30: sprintf(info->s, "V30: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[30], 7), (UINT16)_mm_extract_epi16(rsp->xv[30], 6), (UINT16)_mm_extract_epi16(rsp->xv[30], 5), (UINT16)_mm_extract_epi16(rsp->xv[30], 4), (UINT16)_mm_extract_epi16(rsp->xv[30], 3), (UINT16)_mm_extract_epi16(rsp->xv[30], 2), (UINT16)_mm_extract_epi16(rsp->xv[30], 1), (UINT16)_mm_extract_epi16(rsp->xv[30], 0)); break;
- case CPUINFO_STR_REGISTER + RSP_V31: sprintf(info->s, "V31: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[31], 7), (UINT16)_mm_extract_epi16(rsp->xv[31], 6), (UINT16)_mm_extract_epi16(rsp->xv[31], 5), (UINT16)_mm_extract_epi16(rsp->xv[31], 4), (UINT16)_mm_extract_epi16(rsp->xv[31], 3), (UINT16)_mm_extract_epi16(rsp->xv[31], 2), (UINT16)_mm_extract_epi16(rsp->xv[31], 1), (UINT16)_mm_extract_epi16(rsp->xv[31], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V0: sprintf(info->s, "V0: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 0], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 0], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V1: sprintf(info->s, "V1: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 1], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 1], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V2: sprintf(info->s, "V2: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 2], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 2], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V3: sprintf(info->s, "V3: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 3], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 3], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V4: sprintf(info->s, "V4: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 4], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 4], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V5: sprintf(info->s, "V5: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 5], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 5], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V6: sprintf(info->s, "V6: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 6], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 6], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V7: sprintf(info->s, "V7: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 7], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 7], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V8: sprintf(info->s, "V8: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 8], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 8], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V9: sprintf(info->s, "V9: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[ 9], 7), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 6), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 5), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 4), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 3), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 2), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 1), (UINT16)_mm_extract_epi16(rsp->xv[ 9], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V10: sprintf(info->s, "V10: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[10], 7), (UINT16)_mm_extract_epi16(rsp->xv[10], 6), (UINT16)_mm_extract_epi16(rsp->xv[10], 5), (UINT16)_mm_extract_epi16(rsp->xv[10], 4), (UINT16)_mm_extract_epi16(rsp->xv[10], 3), (UINT16)_mm_extract_epi16(rsp->xv[10], 2), (UINT16)_mm_extract_epi16(rsp->xv[10], 1), (UINT16)_mm_extract_epi16(rsp->xv[10], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V11: sprintf(info->s, "V11: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[11], 7), (UINT16)_mm_extract_epi16(rsp->xv[11], 6), (UINT16)_mm_extract_epi16(rsp->xv[11], 5), (UINT16)_mm_extract_epi16(rsp->xv[11], 4), (UINT16)_mm_extract_epi16(rsp->xv[11], 3), (UINT16)_mm_extract_epi16(rsp->xv[11], 2), (UINT16)_mm_extract_epi16(rsp->xv[11], 1), (UINT16)_mm_extract_epi16(rsp->xv[11], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V12: sprintf(info->s, "V12: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[12], 7), (UINT16)_mm_extract_epi16(rsp->xv[12], 6), (UINT16)_mm_extract_epi16(rsp->xv[12], 5), (UINT16)_mm_extract_epi16(rsp->xv[12], 4), (UINT16)_mm_extract_epi16(rsp->xv[12], 3), (UINT16)_mm_extract_epi16(rsp->xv[12], 2), (UINT16)_mm_extract_epi16(rsp->xv[12], 1), (UINT16)_mm_extract_epi16(rsp->xv[12], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V13: sprintf(info->s, "V13: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[13], 7), (UINT16)_mm_extract_epi16(rsp->xv[13], 6), (UINT16)_mm_extract_epi16(rsp->xv[13], 5), (UINT16)_mm_extract_epi16(rsp->xv[13], 4), (UINT16)_mm_extract_epi16(rsp->xv[13], 3), (UINT16)_mm_extract_epi16(rsp->xv[13], 2), (UINT16)_mm_extract_epi16(rsp->xv[13], 1), (UINT16)_mm_extract_epi16(rsp->xv[13], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V14: sprintf(info->s, "V14: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[14], 7), (UINT16)_mm_extract_epi16(rsp->xv[14], 6), (UINT16)_mm_extract_epi16(rsp->xv[14], 5), (UINT16)_mm_extract_epi16(rsp->xv[14], 4), (UINT16)_mm_extract_epi16(rsp->xv[14], 3), (UINT16)_mm_extract_epi16(rsp->xv[14], 2), (UINT16)_mm_extract_epi16(rsp->xv[14], 1), (UINT16)_mm_extract_epi16(rsp->xv[14], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V15: sprintf(info->s, "V15: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[15], 7), (UINT16)_mm_extract_epi16(rsp->xv[15], 6), (UINT16)_mm_extract_epi16(rsp->xv[15], 5), (UINT16)_mm_extract_epi16(rsp->xv[15], 4), (UINT16)_mm_extract_epi16(rsp->xv[15], 3), (UINT16)_mm_extract_epi16(rsp->xv[15], 2), (UINT16)_mm_extract_epi16(rsp->xv[15], 1), (UINT16)_mm_extract_epi16(rsp->xv[15], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V16: sprintf(info->s, "V16: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[16], 7), (UINT16)_mm_extract_epi16(rsp->xv[16], 6), (UINT16)_mm_extract_epi16(rsp->xv[16], 5), (UINT16)_mm_extract_epi16(rsp->xv[16], 4), (UINT16)_mm_extract_epi16(rsp->xv[16], 3), (UINT16)_mm_extract_epi16(rsp->xv[16], 2), (UINT16)_mm_extract_epi16(rsp->xv[16], 1), (UINT16)_mm_extract_epi16(rsp->xv[16], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V17: sprintf(info->s, "V17: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[17], 7), (UINT16)_mm_extract_epi16(rsp->xv[17], 6), (UINT16)_mm_extract_epi16(rsp->xv[17], 5), (UINT16)_mm_extract_epi16(rsp->xv[17], 4), (UINT16)_mm_extract_epi16(rsp->xv[17], 3), (UINT16)_mm_extract_epi16(rsp->xv[17], 2), (UINT16)_mm_extract_epi16(rsp->xv[17], 1), (UINT16)_mm_extract_epi16(rsp->xv[17], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V18: sprintf(info->s, "V18: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[18], 7), (UINT16)_mm_extract_epi16(rsp->xv[18], 6), (UINT16)_mm_extract_epi16(rsp->xv[18], 5), (UINT16)_mm_extract_epi16(rsp->xv[18], 4), (UINT16)_mm_extract_epi16(rsp->xv[18], 3), (UINT16)_mm_extract_epi16(rsp->xv[18], 2), (UINT16)_mm_extract_epi16(rsp->xv[18], 1), (UINT16)_mm_extract_epi16(rsp->xv[18], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V19: sprintf(info->s, "V19: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[19], 7), (UINT16)_mm_extract_epi16(rsp->xv[19], 6), (UINT16)_mm_extract_epi16(rsp->xv[19], 5), (UINT16)_mm_extract_epi16(rsp->xv[19], 4), (UINT16)_mm_extract_epi16(rsp->xv[19], 3), (UINT16)_mm_extract_epi16(rsp->xv[19], 2), (UINT16)_mm_extract_epi16(rsp->xv[19], 1), (UINT16)_mm_extract_epi16(rsp->xv[19], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V20: sprintf(info->s, "V20: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[20], 7), (UINT16)_mm_extract_epi16(rsp->xv[20], 6), (UINT16)_mm_extract_epi16(rsp->xv[20], 5), (UINT16)_mm_extract_epi16(rsp->xv[20], 4), (UINT16)_mm_extract_epi16(rsp->xv[20], 3), (UINT16)_mm_extract_epi16(rsp->xv[20], 2), (UINT16)_mm_extract_epi16(rsp->xv[20], 1), (UINT16)_mm_extract_epi16(rsp->xv[20], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V21: sprintf(info->s, "V21: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[21], 7), (UINT16)_mm_extract_epi16(rsp->xv[21], 6), (UINT16)_mm_extract_epi16(rsp->xv[21], 5), (UINT16)_mm_extract_epi16(rsp->xv[21], 4), (UINT16)_mm_extract_epi16(rsp->xv[21], 3), (UINT16)_mm_extract_epi16(rsp->xv[21], 2), (UINT16)_mm_extract_epi16(rsp->xv[21], 1), (UINT16)_mm_extract_epi16(rsp->xv[21], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V22: sprintf(info->s, "V22: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[22], 7), (UINT16)_mm_extract_epi16(rsp->xv[22], 6), (UINT16)_mm_extract_epi16(rsp->xv[22], 5), (UINT16)_mm_extract_epi16(rsp->xv[22], 4), (UINT16)_mm_extract_epi16(rsp->xv[22], 3), (UINT16)_mm_extract_epi16(rsp->xv[22], 2), (UINT16)_mm_extract_epi16(rsp->xv[22], 1), (UINT16)_mm_extract_epi16(rsp->xv[22], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V23: sprintf(info->s, "V23: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[23], 7), (UINT16)_mm_extract_epi16(rsp->xv[23], 6), (UINT16)_mm_extract_epi16(rsp->xv[23], 5), (UINT16)_mm_extract_epi16(rsp->xv[23], 4), (UINT16)_mm_extract_epi16(rsp->xv[23], 3), (UINT16)_mm_extract_epi16(rsp->xv[23], 2), (UINT16)_mm_extract_epi16(rsp->xv[23], 1), (UINT16)_mm_extract_epi16(rsp->xv[23], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V24: sprintf(info->s, "V24: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[24], 7), (UINT16)_mm_extract_epi16(rsp->xv[24], 6), (UINT16)_mm_extract_epi16(rsp->xv[24], 5), (UINT16)_mm_extract_epi16(rsp->xv[24], 4), (UINT16)_mm_extract_epi16(rsp->xv[24], 3), (UINT16)_mm_extract_epi16(rsp->xv[24], 2), (UINT16)_mm_extract_epi16(rsp->xv[24], 1), (UINT16)_mm_extract_epi16(rsp->xv[24], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V25: sprintf(info->s, "V25: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[25], 7), (UINT16)_mm_extract_epi16(rsp->xv[25], 6), (UINT16)_mm_extract_epi16(rsp->xv[25], 5), (UINT16)_mm_extract_epi16(rsp->xv[25], 4), (UINT16)_mm_extract_epi16(rsp->xv[25], 3), (UINT16)_mm_extract_epi16(rsp->xv[25], 2), (UINT16)_mm_extract_epi16(rsp->xv[25], 1), (UINT16)_mm_extract_epi16(rsp->xv[25], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V26: sprintf(info->s, "V26: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[26], 7), (UINT16)_mm_extract_epi16(rsp->xv[26], 6), (UINT16)_mm_extract_epi16(rsp->xv[26], 5), (UINT16)_mm_extract_epi16(rsp->xv[26], 4), (UINT16)_mm_extract_epi16(rsp->xv[26], 3), (UINT16)_mm_extract_epi16(rsp->xv[26], 2), (UINT16)_mm_extract_epi16(rsp->xv[26], 1), (UINT16)_mm_extract_epi16(rsp->xv[26], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V27: sprintf(info->s, "V27: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[27], 7), (UINT16)_mm_extract_epi16(rsp->xv[27], 6), (UINT16)_mm_extract_epi16(rsp->xv[27], 5), (UINT16)_mm_extract_epi16(rsp->xv[27], 4), (UINT16)_mm_extract_epi16(rsp->xv[27], 3), (UINT16)_mm_extract_epi16(rsp->xv[27], 2), (UINT16)_mm_extract_epi16(rsp->xv[27], 1), (UINT16)_mm_extract_epi16(rsp->xv[27], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V28: sprintf(info->s, "V28: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[28], 7), (UINT16)_mm_extract_epi16(rsp->xv[28], 6), (UINT16)_mm_extract_epi16(rsp->xv[28], 5), (UINT16)_mm_extract_epi16(rsp->xv[28], 4), (UINT16)_mm_extract_epi16(rsp->xv[28], 3), (UINT16)_mm_extract_epi16(rsp->xv[28], 2), (UINT16)_mm_extract_epi16(rsp->xv[28], 1), (UINT16)_mm_extract_epi16(rsp->xv[28], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V29: sprintf(info->s, "V29: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[29], 7), (UINT16)_mm_extract_epi16(rsp->xv[29], 6), (UINT16)_mm_extract_epi16(rsp->xv[29], 5), (UINT16)_mm_extract_epi16(rsp->xv[29], 4), (UINT16)_mm_extract_epi16(rsp->xv[29], 3), (UINT16)_mm_extract_epi16(rsp->xv[29], 2), (UINT16)_mm_extract_epi16(rsp->xv[29], 1), (UINT16)_mm_extract_epi16(rsp->xv[29], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V30: sprintf(info->s, "V30: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[30], 7), (UINT16)_mm_extract_epi16(rsp->xv[30], 6), (UINT16)_mm_extract_epi16(rsp->xv[30], 5), (UINT16)_mm_extract_epi16(rsp->xv[30], 4), (UINT16)_mm_extract_epi16(rsp->xv[30], 3), (UINT16)_mm_extract_epi16(rsp->xv[30], 2), (UINT16)_mm_extract_epi16(rsp->xv[30], 1), (UINT16)_mm_extract_epi16(rsp->xv[30], 0)); break;
+ case CPUINFO_STR_REGISTER + RSP_V31: sprintf(info->s, "V31: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)_mm_extract_epi16(rsp->xv[31], 7), (UINT16)_mm_extract_epi16(rsp->xv[31], 6), (UINT16)_mm_extract_epi16(rsp->xv[31], 5), (UINT16)_mm_extract_epi16(rsp->xv[31], 4), (UINT16)_mm_extract_epi16(rsp->xv[31], 3), (UINT16)_mm_extract_epi16(rsp->xv[31], 2), (UINT16)_mm_extract_epi16(rsp->xv[31], 1), (UINT16)_mm_extract_epi16(rsp->xv[31], 0)); break;
#else
- case CPUINFO_STR_REGISTER + RSP_V0: sprintf(info->s, "V0: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 0, 0), (UINT16)VREG_S( 0, 1), (UINT16)VREG_S( 0, 2), (UINT16)VREG_S( 0, 3), (UINT16)VREG_S( 0, 4), (UINT16)VREG_S( 0, 5), (UINT16)VREG_S( 0, 6), (UINT16)VREG_S( 0, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V1: sprintf(info->s, "V1: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 1, 0), (UINT16)VREG_S( 1, 1), (UINT16)VREG_S( 1, 2), (UINT16)VREG_S( 1, 3), (UINT16)VREG_S( 1, 4), (UINT16)VREG_S( 1, 5), (UINT16)VREG_S( 1, 6), (UINT16)VREG_S( 1, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V2: sprintf(info->s, "V2: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 2, 0), (UINT16)VREG_S( 2, 1), (UINT16)VREG_S( 2, 2), (UINT16)VREG_S( 2, 3), (UINT16)VREG_S( 2, 4), (UINT16)VREG_S( 2, 5), (UINT16)VREG_S( 2, 6), (UINT16)VREG_S( 2, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V3: sprintf(info->s, "V3: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 3, 0), (UINT16)VREG_S( 3, 1), (UINT16)VREG_S( 3, 2), (UINT16)VREG_S( 3, 3), (UINT16)VREG_S( 3, 4), (UINT16)VREG_S( 3, 5), (UINT16)VREG_S( 3, 6), (UINT16)VREG_S( 3, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V4: sprintf(info->s, "V4: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 4, 0), (UINT16)VREG_S( 4, 1), (UINT16)VREG_S( 4, 2), (UINT16)VREG_S( 4, 3), (UINT16)VREG_S( 4, 4), (UINT16)VREG_S( 4, 5), (UINT16)VREG_S( 4, 6), (UINT16)VREG_S( 4, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V5: sprintf(info->s, "V5: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 5, 0), (UINT16)VREG_S( 5, 1), (UINT16)VREG_S( 5, 2), (UINT16)VREG_S( 5, 3), (UINT16)VREG_S( 5, 4), (UINT16)VREG_S( 5, 5), (UINT16)VREG_S( 5, 6), (UINT16)VREG_S( 5, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V6: sprintf(info->s, "V6: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 6, 0), (UINT16)VREG_S( 6, 1), (UINT16)VREG_S( 6, 2), (UINT16)VREG_S( 6, 3), (UINT16)VREG_S( 6, 4), (UINT16)VREG_S( 6, 5), (UINT16)VREG_S( 6, 6), (UINT16)VREG_S( 6, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V7: sprintf(info->s, "V7: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 7, 0), (UINT16)VREG_S( 7, 1), (UINT16)VREG_S( 7, 2), (UINT16)VREG_S( 7, 3), (UINT16)VREG_S( 7, 4), (UINT16)VREG_S( 7, 5), (UINT16)VREG_S( 7, 6), (UINT16)VREG_S( 7, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V8: sprintf(info->s, "V8: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 8, 0), (UINT16)VREG_S( 8, 1), (UINT16)VREG_S( 8, 2), (UINT16)VREG_S( 8, 3), (UINT16)VREG_S( 8, 4), (UINT16)VREG_S( 8, 5), (UINT16)VREG_S( 8, 6), (UINT16)VREG_S( 8, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V9: sprintf(info->s, "V9: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 9, 0), (UINT16)VREG_S( 9, 1), (UINT16)VREG_S( 9, 2), (UINT16)VREG_S( 9, 3), (UINT16)VREG_S( 9, 4), (UINT16)VREG_S( 9, 5), (UINT16)VREG_S( 9, 6), (UINT16)VREG_S( 9, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V10: sprintf(info->s, "V10: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(10, 0), (UINT16)VREG_S(10, 1), (UINT16)VREG_S(10, 2), (UINT16)VREG_S(10, 3), (UINT16)VREG_S(10, 4), (UINT16)VREG_S(10, 5), (UINT16)VREG_S(10, 6), (UINT16)VREG_S(10, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V11: sprintf(info->s, "V11: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(11, 0), (UINT16)VREG_S(11, 1), (UINT16)VREG_S(11, 2), (UINT16)VREG_S(11, 3), (UINT16)VREG_S(11, 4), (UINT16)VREG_S(11, 5), (UINT16)VREG_S(11, 6), (UINT16)VREG_S(11, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V12: sprintf(info->s, "V12: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(12, 0), (UINT16)VREG_S(12, 1), (UINT16)VREG_S(12, 2), (UINT16)VREG_S(12, 3), (UINT16)VREG_S(12, 4), (UINT16)VREG_S(12, 5), (UINT16)VREG_S(12, 6), (UINT16)VREG_S(12, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V13: sprintf(info->s, "V13: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(13, 0), (UINT16)VREG_S(13, 1), (UINT16)VREG_S(13, 2), (UINT16)VREG_S(13, 3), (UINT16)VREG_S(13, 4), (UINT16)VREG_S(13, 5), (UINT16)VREG_S(13, 6), (UINT16)VREG_S(13, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V14: sprintf(info->s, "V14: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(14, 0), (UINT16)VREG_S(14, 1), (UINT16)VREG_S(14, 2), (UINT16)VREG_S(14, 3), (UINT16)VREG_S(14, 4), (UINT16)VREG_S(14, 5), (UINT16)VREG_S(14, 6), (UINT16)VREG_S(14, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V15: sprintf(info->s, "V15: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(15, 0), (UINT16)VREG_S(15, 1), (UINT16)VREG_S(15, 2), (UINT16)VREG_S(15, 3), (UINT16)VREG_S(15, 4), (UINT16)VREG_S(15, 5), (UINT16)VREG_S(15, 6), (UINT16)VREG_S(15, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V16: sprintf(info->s, "V16: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(16, 0), (UINT16)VREG_S(16, 1), (UINT16)VREG_S(16, 2), (UINT16)VREG_S(16, 3), (UINT16)VREG_S(16, 4), (UINT16)VREG_S(16, 5), (UINT16)VREG_S(16, 6), (UINT16)VREG_S(16, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V17: sprintf(info->s, "V17: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(17, 0), (UINT16)VREG_S(17, 1), (UINT16)VREG_S(17, 2), (UINT16)VREG_S(17, 3), (UINT16)VREG_S(17, 4), (UINT16)VREG_S(17, 5), (UINT16)VREG_S(17, 6), (UINT16)VREG_S(17, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V18: sprintf(info->s, "V18: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(18, 0), (UINT16)VREG_S(18, 1), (UINT16)VREG_S(18, 2), (UINT16)VREG_S(18, 3), (UINT16)VREG_S(18, 4), (UINT16)VREG_S(18, 5), (UINT16)VREG_S(18, 6), (UINT16)VREG_S(18, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V19: sprintf(info->s, "V19: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(19, 0), (UINT16)VREG_S(19, 1), (UINT16)VREG_S(19, 2), (UINT16)VREG_S(19, 3), (UINT16)VREG_S(19, 4), (UINT16)VREG_S(19, 5), (UINT16)VREG_S(19, 6), (UINT16)VREG_S(19, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V20: sprintf(info->s, "V20: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(20, 0), (UINT16)VREG_S(20, 1), (UINT16)VREG_S(20, 2), (UINT16)VREG_S(20, 3), (UINT16)VREG_S(20, 4), (UINT16)VREG_S(20, 5), (UINT16)VREG_S(20, 6), (UINT16)VREG_S(20, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V21: sprintf(info->s, "V21: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(21, 0), (UINT16)VREG_S(21, 1), (UINT16)VREG_S(21, 2), (UINT16)VREG_S(21, 3), (UINT16)VREG_S(21, 4), (UINT16)VREG_S(21, 5), (UINT16)VREG_S(21, 6), (UINT16)VREG_S(21, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V22: sprintf(info->s, "V22: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(22, 0), (UINT16)VREG_S(22, 1), (UINT16)VREG_S(22, 2), (UINT16)VREG_S(22, 3), (UINT16)VREG_S(22, 4), (UINT16)VREG_S(22, 5), (UINT16)VREG_S(22, 6), (UINT16)VREG_S(22, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V23: sprintf(info->s, "V23: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(23, 0), (UINT16)VREG_S(23, 1), (UINT16)VREG_S(23, 2), (UINT16)VREG_S(23, 3), (UINT16)VREG_S(23, 4), (UINT16)VREG_S(23, 5), (UINT16)VREG_S(23, 6), (UINT16)VREG_S(23, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V24: sprintf(info->s, "V24: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(24, 0), (UINT16)VREG_S(24, 1), (UINT16)VREG_S(24, 2), (UINT16)VREG_S(24, 3), (UINT16)VREG_S(24, 4), (UINT16)VREG_S(24, 5), (UINT16)VREG_S(24, 6), (UINT16)VREG_S(24, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V25: sprintf(info->s, "V25: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(25, 0), (UINT16)VREG_S(25, 1), (UINT16)VREG_S(25, 2), (UINT16)VREG_S(25, 3), (UINT16)VREG_S(25, 4), (UINT16)VREG_S(25, 5), (UINT16)VREG_S(25, 6), (UINT16)VREG_S(25, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V26: sprintf(info->s, "V26: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(26, 0), (UINT16)VREG_S(26, 1), (UINT16)VREG_S(26, 2), (UINT16)VREG_S(26, 3), (UINT16)VREG_S(26, 4), (UINT16)VREG_S(26, 5), (UINT16)VREG_S(26, 6), (UINT16)VREG_S(26, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V27: sprintf(info->s, "V27: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(27, 0), (UINT16)VREG_S(27, 1), (UINT16)VREG_S(27, 2), (UINT16)VREG_S(27, 3), (UINT16)VREG_S(27, 4), (UINT16)VREG_S(27, 5), (UINT16)VREG_S(27, 6), (UINT16)VREG_S(27, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V28: sprintf(info->s, "V28: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(28, 0), (UINT16)VREG_S(28, 1), (UINT16)VREG_S(28, 2), (UINT16)VREG_S(28, 3), (UINT16)VREG_S(28, 4), (UINT16)VREG_S(28, 5), (UINT16)VREG_S(28, 6), (UINT16)VREG_S(28, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V29: sprintf(info->s, "V29: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(29, 0), (UINT16)VREG_S(29, 1), (UINT16)VREG_S(29, 2), (UINT16)VREG_S(29, 3), (UINT16)VREG_S(29, 4), (UINT16)VREG_S(29, 5), (UINT16)VREG_S(29, 6), (UINT16)VREG_S(29, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V30: sprintf(info->s, "V30: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(30, 0), (UINT16)VREG_S(30, 1), (UINT16)VREG_S(30, 2), (UINT16)VREG_S(30, 3), (UINT16)VREG_S(30, 4), (UINT16)VREG_S(30, 5), (UINT16)VREG_S(30, 6), (UINT16)VREG_S(30, 7)); break;
- case CPUINFO_STR_REGISTER + RSP_V31: sprintf(info->s, "V31: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(31, 0), (UINT16)VREG_S(31, 1), (UINT16)VREG_S(31, 2), (UINT16)VREG_S(31, 3), (UINT16)VREG_S(31, 4), (UINT16)VREG_S(31, 5), (UINT16)VREG_S(31, 6), (UINT16)VREG_S(31, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V0: sprintf(info->s, "V0: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 0, 0), (UINT16)VREG_S( 0, 1), (UINT16)VREG_S( 0, 2), (UINT16)VREG_S( 0, 3), (UINT16)VREG_S( 0, 4), (UINT16)VREG_S( 0, 5), (UINT16)VREG_S( 0, 6), (UINT16)VREG_S( 0, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V1: sprintf(info->s, "V1: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 1, 0), (UINT16)VREG_S( 1, 1), (UINT16)VREG_S( 1, 2), (UINT16)VREG_S( 1, 3), (UINT16)VREG_S( 1, 4), (UINT16)VREG_S( 1, 5), (UINT16)VREG_S( 1, 6), (UINT16)VREG_S( 1, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V2: sprintf(info->s, "V2: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 2, 0), (UINT16)VREG_S( 2, 1), (UINT16)VREG_S( 2, 2), (UINT16)VREG_S( 2, 3), (UINT16)VREG_S( 2, 4), (UINT16)VREG_S( 2, 5), (UINT16)VREG_S( 2, 6), (UINT16)VREG_S( 2, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V3: sprintf(info->s, "V3: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 3, 0), (UINT16)VREG_S( 3, 1), (UINT16)VREG_S( 3, 2), (UINT16)VREG_S( 3, 3), (UINT16)VREG_S( 3, 4), (UINT16)VREG_S( 3, 5), (UINT16)VREG_S( 3, 6), (UINT16)VREG_S( 3, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V4: sprintf(info->s, "V4: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 4, 0), (UINT16)VREG_S( 4, 1), (UINT16)VREG_S( 4, 2), (UINT16)VREG_S( 4, 3), (UINT16)VREG_S( 4, 4), (UINT16)VREG_S( 4, 5), (UINT16)VREG_S( 4, 6), (UINT16)VREG_S( 4, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V5: sprintf(info->s, "V5: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 5, 0), (UINT16)VREG_S( 5, 1), (UINT16)VREG_S( 5, 2), (UINT16)VREG_S( 5, 3), (UINT16)VREG_S( 5, 4), (UINT16)VREG_S( 5, 5), (UINT16)VREG_S( 5, 6), (UINT16)VREG_S( 5, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V6: sprintf(info->s, "V6: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 6, 0), (UINT16)VREG_S( 6, 1), (UINT16)VREG_S( 6, 2), (UINT16)VREG_S( 6, 3), (UINT16)VREG_S( 6, 4), (UINT16)VREG_S( 6, 5), (UINT16)VREG_S( 6, 6), (UINT16)VREG_S( 6, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V7: sprintf(info->s, "V7: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 7, 0), (UINT16)VREG_S( 7, 1), (UINT16)VREG_S( 7, 2), (UINT16)VREG_S( 7, 3), (UINT16)VREG_S( 7, 4), (UINT16)VREG_S( 7, 5), (UINT16)VREG_S( 7, 6), (UINT16)VREG_S( 7, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V8: sprintf(info->s, "V8: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 8, 0), (UINT16)VREG_S( 8, 1), (UINT16)VREG_S( 8, 2), (UINT16)VREG_S( 8, 3), (UINT16)VREG_S( 8, 4), (UINT16)VREG_S( 8, 5), (UINT16)VREG_S( 8, 6), (UINT16)VREG_S( 8, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V9: sprintf(info->s, "V9: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 9, 0), (UINT16)VREG_S( 9, 1), (UINT16)VREG_S( 9, 2), (UINT16)VREG_S( 9, 3), (UINT16)VREG_S( 9, 4), (UINT16)VREG_S( 9, 5), (UINT16)VREG_S( 9, 6), (UINT16)VREG_S( 9, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V10: sprintf(info->s, "V10: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(10, 0), (UINT16)VREG_S(10, 1), (UINT16)VREG_S(10, 2), (UINT16)VREG_S(10, 3), (UINT16)VREG_S(10, 4), (UINT16)VREG_S(10, 5), (UINT16)VREG_S(10, 6), (UINT16)VREG_S(10, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V11: sprintf(info->s, "V11: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(11, 0), (UINT16)VREG_S(11, 1), (UINT16)VREG_S(11, 2), (UINT16)VREG_S(11, 3), (UINT16)VREG_S(11, 4), (UINT16)VREG_S(11, 5), (UINT16)VREG_S(11, 6), (UINT16)VREG_S(11, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V12: sprintf(info->s, "V12: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(12, 0), (UINT16)VREG_S(12, 1), (UINT16)VREG_S(12, 2), (UINT16)VREG_S(12, 3), (UINT16)VREG_S(12, 4), (UINT16)VREG_S(12, 5), (UINT16)VREG_S(12, 6), (UINT16)VREG_S(12, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V13: sprintf(info->s, "V13: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(13, 0), (UINT16)VREG_S(13, 1), (UINT16)VREG_S(13, 2), (UINT16)VREG_S(13, 3), (UINT16)VREG_S(13, 4), (UINT16)VREG_S(13, 5), (UINT16)VREG_S(13, 6), (UINT16)VREG_S(13, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V14: sprintf(info->s, "V14: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(14, 0), (UINT16)VREG_S(14, 1), (UINT16)VREG_S(14, 2), (UINT16)VREG_S(14, 3), (UINT16)VREG_S(14, 4), (UINT16)VREG_S(14, 5), (UINT16)VREG_S(14, 6), (UINT16)VREG_S(14, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V15: sprintf(info->s, "V15: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(15, 0), (UINT16)VREG_S(15, 1), (UINT16)VREG_S(15, 2), (UINT16)VREG_S(15, 3), (UINT16)VREG_S(15, 4), (UINT16)VREG_S(15, 5), (UINT16)VREG_S(15, 6), (UINT16)VREG_S(15, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V16: sprintf(info->s, "V16: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(16, 0), (UINT16)VREG_S(16, 1), (UINT16)VREG_S(16, 2), (UINT16)VREG_S(16, 3), (UINT16)VREG_S(16, 4), (UINT16)VREG_S(16, 5), (UINT16)VREG_S(16, 6), (UINT16)VREG_S(16, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V17: sprintf(info->s, "V17: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(17, 0), (UINT16)VREG_S(17, 1), (UINT16)VREG_S(17, 2), (UINT16)VREG_S(17, 3), (UINT16)VREG_S(17, 4), (UINT16)VREG_S(17, 5), (UINT16)VREG_S(17, 6), (UINT16)VREG_S(17, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V18: sprintf(info->s, "V18: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(18, 0), (UINT16)VREG_S(18, 1), (UINT16)VREG_S(18, 2), (UINT16)VREG_S(18, 3), (UINT16)VREG_S(18, 4), (UINT16)VREG_S(18, 5), (UINT16)VREG_S(18, 6), (UINT16)VREG_S(18, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V19: sprintf(info->s, "V19: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(19, 0), (UINT16)VREG_S(19, 1), (UINT16)VREG_S(19, 2), (UINT16)VREG_S(19, 3), (UINT16)VREG_S(19, 4), (UINT16)VREG_S(19, 5), (UINT16)VREG_S(19, 6), (UINT16)VREG_S(19, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V20: sprintf(info->s, "V20: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(20, 0), (UINT16)VREG_S(20, 1), (UINT16)VREG_S(20, 2), (UINT16)VREG_S(20, 3), (UINT16)VREG_S(20, 4), (UINT16)VREG_S(20, 5), (UINT16)VREG_S(20, 6), (UINT16)VREG_S(20, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V21: sprintf(info->s, "V21: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(21, 0), (UINT16)VREG_S(21, 1), (UINT16)VREG_S(21, 2), (UINT16)VREG_S(21, 3), (UINT16)VREG_S(21, 4), (UINT16)VREG_S(21, 5), (UINT16)VREG_S(21, 6), (UINT16)VREG_S(21, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V22: sprintf(info->s, "V22: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(22, 0), (UINT16)VREG_S(22, 1), (UINT16)VREG_S(22, 2), (UINT16)VREG_S(22, 3), (UINT16)VREG_S(22, 4), (UINT16)VREG_S(22, 5), (UINT16)VREG_S(22, 6), (UINT16)VREG_S(22, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V23: sprintf(info->s, "V23: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(23, 0), (UINT16)VREG_S(23, 1), (UINT16)VREG_S(23, 2), (UINT16)VREG_S(23, 3), (UINT16)VREG_S(23, 4), (UINT16)VREG_S(23, 5), (UINT16)VREG_S(23, 6), (UINT16)VREG_S(23, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V24: sprintf(info->s, "V24: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(24, 0), (UINT16)VREG_S(24, 1), (UINT16)VREG_S(24, 2), (UINT16)VREG_S(24, 3), (UINT16)VREG_S(24, 4), (UINT16)VREG_S(24, 5), (UINT16)VREG_S(24, 6), (UINT16)VREG_S(24, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V25: sprintf(info->s, "V25: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(25, 0), (UINT16)VREG_S(25, 1), (UINT16)VREG_S(25, 2), (UINT16)VREG_S(25, 3), (UINT16)VREG_S(25, 4), (UINT16)VREG_S(25, 5), (UINT16)VREG_S(25, 6), (UINT16)VREG_S(25, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V26: sprintf(info->s, "V26: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(26, 0), (UINT16)VREG_S(26, 1), (UINT16)VREG_S(26, 2), (UINT16)VREG_S(26, 3), (UINT16)VREG_S(26, 4), (UINT16)VREG_S(26, 5), (UINT16)VREG_S(26, 6), (UINT16)VREG_S(26, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V27: sprintf(info->s, "V27: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(27, 0), (UINT16)VREG_S(27, 1), (UINT16)VREG_S(27, 2), (UINT16)VREG_S(27, 3), (UINT16)VREG_S(27, 4), (UINT16)VREG_S(27, 5), (UINT16)VREG_S(27, 6), (UINT16)VREG_S(27, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V28: sprintf(info->s, "V28: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(28, 0), (UINT16)VREG_S(28, 1), (UINT16)VREG_S(28, 2), (UINT16)VREG_S(28, 3), (UINT16)VREG_S(28, 4), (UINT16)VREG_S(28, 5), (UINT16)VREG_S(28, 6), (UINT16)VREG_S(28, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V29: sprintf(info->s, "V29: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(29, 0), (UINT16)VREG_S(29, 1), (UINT16)VREG_S(29, 2), (UINT16)VREG_S(29, 3), (UINT16)VREG_S(29, 4), (UINT16)VREG_S(29, 5), (UINT16)VREG_S(29, 6), (UINT16)VREG_S(29, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V30: sprintf(info->s, "V30: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(30, 0), (UINT16)VREG_S(30, 1), (UINT16)VREG_S(30, 2), (UINT16)VREG_S(30, 3), (UINT16)VREG_S(30, 4), (UINT16)VREG_S(30, 5), (UINT16)VREG_S(30, 6), (UINT16)VREG_S(30, 7)); break;
+ case CPUINFO_STR_REGISTER + RSP_V31: sprintf(info->s, "V31: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(31, 0), (UINT16)VREG_S(31, 1), (UINT16)VREG_S(31, 2), (UINT16)VREG_S(31, 3), (UINT16)VREG_S(31, 4), (UINT16)VREG_S(31, 5), (UINT16)VREG_S(31, 6), (UINT16)VREG_S(31, 7)); break;
#endif
- case CPUINFO_STR_REGISTER + RSP_SR: sprintf(info->s, "SR: %08X", rsp->sr); break;
- case CPUINFO_STR_REGISTER + RSP_NEXTPC: sprintf(info->s, "NPC: %08X", rsp->nextpc);break;
- case CPUINFO_STR_REGISTER + RSP_STEPCNT: sprintf(info->s, "STEP: %d", rsp->step_count); break;
- }
+ case CPUINFO_STR_REGISTER + RSP_SR: sprintf(info->s, "SR: %08X", rsp->sr); break;
+ case CPUINFO_STR_REGISTER + RSP_NEXTPC: sprintf(info->s, "NPC: %08X", rsp->nextpc);break;
+ case CPUINFO_STR_REGISTER + RSP_STEPCNT: sprintf(info->s, "STEP: %d", rsp->step_count); break;
+ }
}
DEFINE_LEGACY_CPU_DEVICE(RSP_DRC, rsp_drc);
diff --git a/src/emu/cpu/saturn/saturn.c b/src/emu/cpu/saturn/saturn.c
index 41fe158cbb6..dcd4786da8b 100644
--- a/src/emu/cpu/saturn/saturn.c
+++ b/src/emu/cpu/saturn/saturn.c
@@ -60,7 +60,7 @@ saturn_device::saturn_device(const machine_config &mconfig, const char *tag, dev
, m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0)
, m_out_func(*this)
, m_in_func(*this)
- , m_reset_func(*this)
+ , m_reset_func(*this)
, m_config_func(*this)
, m_unconfig_func(*this)
, m_id_func(*this)
@@ -97,7 +97,7 @@ void saturn_device::device_start()
m_out_func.resolve_safe();
m_in_func.resolve_safe(0);
- m_reset_func.resolve_safe();
+ m_reset_func.resolve_safe();
m_config_func.resolve_safe();
m_unconfig_func.resolve_safe();
m_id_func.resolve_safe(0);
@@ -420,4 +420,3 @@ INT64 saturn_device::Reg64Int(Saturn64 r)
x |= (INT64) r[i] << (4*i);
return x;
}
-
diff --git a/src/emu/cpu/scudsp/scudsp.c b/src/emu/cpu/scudsp/scudsp.c
index db90813e926..efebe73033b 100644
--- a/src/emu/cpu/scudsp/scudsp.c
+++ b/src/emu/cpu/scudsp/scudsp.c
@@ -997,7 +997,6 @@ void scudsp_cpu_device::device_start()
void scudsp_cpu_device::device_reset()
{
-
}
void scudsp_cpu_device::execute_set_input(int irqline, int state)
diff --git a/src/emu/cpu/scudsp/scudsp.h b/src/emu/cpu/scudsp/scudsp.h
index d552663ba7b..71e49cff86f 100644
--- a/src/emu/cpu/scudsp/scudsp.h
+++ b/src/emu/cpu/scudsp/scudsp.h
@@ -59,7 +59,7 @@ union SCUDSPREG16 {
};
class scudsp_cpu_device : public cpu_device,
- public scudsp_interface
+ public scudsp_interface
{
public:
// construction/destruction
@@ -75,7 +75,7 @@ public:
/* port 3 */
DECLARE_READ32_MEMBER( ram_address_r );
DECLARE_WRITE32_MEMBER( ram_address_w );
-// virtual DECLARE_ADDRESS_MAP(map, 32) = 0;
+// virtual DECLARE_ADDRESS_MAP(map, 32) = 0;
protected:
// device-level overrides
@@ -108,17 +108,17 @@ private:
address_space_config m_program_config;
address_space_config m_data_config;
- UINT8 m_pc; /* registers */
- UINT32 m_flags; /* flags */
+ UINT8 m_pc; /* registers */
+ UINT32 m_flags; /* flags */
UINT8 m_ra;
UINT8 m_ct0,m_ct1,m_ct2,m_ct3;
- UINT8 m_delay; /* Delay */
- UINT8 m_top; /*Jump Command memory*/
- UINT16 m_lop; /*Counter Register*/ /*12-bits*/
+ UINT8 m_delay; /* Delay */
+ UINT8 m_top; /*Jump Command memory*/
+ UINT16 m_lop; /*Counter Register*/ /*12-bits*/
SCUDSPREG32 m_rx; /*X-Bus register*/
- INT64 m_mul; /*Multiplier register*//*48-bits*/
+ INT64 m_mul; /*Multiplier register*//*48-bits*/
SCUDSPREG32 m_ry; /*Y-Bus register*/
- INT64 m_alu; /*ALU register*/ /*48-bits*/
+ INT64 m_alu; /*ALU register*/ /*48-bits*/
SCUDSPREG16 m_ph; /*ALU high register*/
SCUDSPREG32 m_pl; /*ALU low register*/
SCUDSPREG16 m_ach; /*ALU external high register*/
diff --git a/src/emu/cpu/sh2/sh2drc.c b/src/emu/cpu/sh2/sh2drc.c
index bc02077ce49..b5f6092f624 100644
--- a/src/emu/cpu/sh2/sh2drc.c
+++ b/src/emu/cpu/sh2/sh2drc.c
@@ -4,7 +4,7 @@
sh2drc.c
Universal machine language-based SH-2 emulator.
-
+
***************************************************************************/
#include "emu.h"
diff --git a/src/emu/imagedev/serial.h b/src/emu/imagedev/serial.h
index dcbb3dd7a37..eb7b133a789 100644
--- a/src/emu/imagedev/serial.h
+++ b/src/emu/imagedev/serial.h
@@ -102,6 +102,6 @@ extern const device_type SERIAL;
#define MCFG_SERIAL_ADD(_tag,_config) \
- MCFG_DEVICE_ADD(_tag, SERIAL, 0) \
+ MCFG_DEVICE_ADD(_tag, SERIAL, 0) \
MCFG_DEVICE_CONFIG(_config)
#endif /* __IMAGEDEV_SERIAL_H__ */
diff --git a/src/emu/ioport.c b/src/emu/ioport.c
index 2f11cac3ada..56dd8e3fed8 100644
--- a/src/emu/ioport.c
+++ b/src/emu/ioport.c
@@ -1814,7 +1814,7 @@ void ioport_field::get_user_settings(user_settings &settings)
settings.centerdelta = m_live->analog->centerdelta();
settings.reverse = m_live->analog->reverse();
}
-
+
// non-analog settings
else
{
@@ -3207,7 +3207,7 @@ bool ioport_manager::load_game_config(xml_data_node *portnode, int type, int pla
{
// fetch the value
field->live().value = xml_get_attribute_int(portnode, "value", field->defvalue());
-
+
// fetch yes/no for toggle setting
const char *togstring = xml_get_attribute_string(portnode, "toggle", NULL);
if (togstring != NULL)
diff --git a/src/emu/machine/6525tpi.h b/src/emu/machine/6525tpi.h
index c0f6d1a484e..51d0003cc61 100644
--- a/src/emu/machine/6525tpi.h
+++ b/src/emu/machine/6525tpi.h
@@ -78,7 +78,7 @@ public:
DECLARE_WRITE8_MEMBER( pa_w );
DECLARE_WRITE8_MEMBER( pb_w );
DECLARE_WRITE8_MEMBER( pc_w );
-
+
UINT8 get_ddr_a();
UINT8 get_ddr_b();
UINT8 get_ddr_c();
@@ -88,7 +88,7 @@ protected:
virtual void device_config_complete();
virtual void device_start();
virtual void device_reset();
-
+
private:
// internal state
devcb_resolved_write_line m_out_irq_func;
@@ -111,7 +111,7 @@ private:
UINT8 m_air;
UINT8 m_irq_level[5];
-
+
void set_interrupt();
void clear_interrupt();
};
diff --git a/src/emu/machine/74145.c b/src/emu/machine/74145.c
index afbac27c65b..3cb15e899a3 100644
--- a/src/emu/machine/74145.c
+++ b/src/emu/machine/74145.c
@@ -1,11 +1,11 @@
/*****************************************************************************
*
- * TTL74145
+ * TTL74145
*
- * license: MAME, GPL-2.0+
- * copyright-holders: Dirk Best
+ * license: MAME, GPL-2.0+
+ * copyright-holders: Dirk Best
*
- * BCD-to-Decimal decoder
+ * BCD-to-Decimal decoder
*
* __ __
* 0-| v |-VCC
diff --git a/src/emu/machine/74145.h b/src/emu/machine/74145.h
index 1294ee72f34..de3458ab219 100644
--- a/src/emu/machine/74145.h
+++ b/src/emu/machine/74145.h
@@ -2,8 +2,8 @@
TTL74145
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
BCD-to-Decimal decoder
diff --git a/src/emu/machine/74181.c b/src/emu/machine/74181.c
index a9b50e1a543..e9d8b6f2ace 100644
--- a/src/emu/machine/74181.c
+++ b/src/emu/machine/74181.c
@@ -46,7 +46,7 @@ void ttl74181_device::device_start()
save_item(NAME(m_s));
save_item(NAME(m_m));
save_item(NAME(m_c));
-
+
update();
}
diff --git a/src/emu/machine/er59256.c b/src/emu/machine/er59256.c
index ee4e5b4ce47..018fe9d0882 100644
--- a/src/emu/machine/er59256.c
+++ b/src/emu/machine/er59256.c
@@ -29,7 +29,6 @@ er59256_device::er59256_device(const machine_config &mconfig, const char *tag, d
m_command(0),
m_flags(0)
{
-
}
//-------------------------------------------------
@@ -54,7 +53,7 @@ void er59256_device::device_start()
m_command=CMD_INVALID;
m_flags&= ~FLAG_DATA_LOADED;
-
+
save_item(NAME(m_eerom));
save_item(NAME(m_io_bits));
save_item(NAME(m_old_io_bits));
diff --git a/src/emu/machine/er59256.h b/src/emu/machine/er59256.h
index da9fb9004fe..1cdfa42df38 100644
--- a/src/emu/machine/er59256.h
+++ b/src/emu/machine/er59256.h
@@ -26,16 +26,16 @@ public:
UINT8 get_iobits();
void preload_rom(const UINT16 *rom_data, int count);
UINT8 data_loaded();
-
+
protected:
// device-level overrides
virtual void device_config_complete();
virtual void device_start();
virtual void device_stop();
-
+
private:
// internal state
-
+
/* The actual memory */
UINT16 m_eerom[EEROM_WORDS];
@@ -58,7 +58,7 @@ private:
/* Write enable and write in progress flags */
UINT8 m_flags;
-
+
void decode_command();
};
diff --git a/src/emu/machine/i80130.c b/src/emu/machine/i80130.c
index c9175aebfd6..021bc185147 100644
--- a/src/emu/machine/i80130.c
+++ b/src/emu/machine/i80130.c
@@ -142,14 +142,14 @@ machine_config_constructor i80130_device::device_mconfig_additions() const
i80130_device::i80130_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, I80130, "I80130", tag, owner, clock, "i80130", __FILE__),
- m_pic(*this, "pic"),
- m_pit(*this, "pit"),
- m_write_irq(*this),
- m_write_ack(*this),
- m_write_lir(*this),
- m_write_systick(*this),
- m_write_delay(*this),
- m_write_baud(*this)
+ m_pic(*this, "pic"),
+ m_pit(*this, "pit"),
+ m_write_irq(*this),
+ m_write_ack(*this),
+ m_write_lir(*this),
+ m_write_systick(*this),
+ m_write_delay(*this),
+ m_write_baud(*this)
{
}
diff --git a/src/emu/machine/ins8154.c b/src/emu/machine/ins8154.c
index dadde33e8c7..45ca7143f9e 100644
--- a/src/emu/machine/ins8154.c
+++ b/src/emu/machine/ins8154.c
@@ -2,8 +2,8 @@
National Semiconductor INS8154
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
N-Channel 128-by-8 Bit RAM Input/Output (RAM I/O)
diff --git a/src/emu/machine/ins8154.h b/src/emu/machine/ins8154.h
index f52d894d124..eef4aebffe9 100644
--- a/src/emu/machine/ins8154.h
+++ b/src/emu/machine/ins8154.h
@@ -2,8 +2,8 @@
National Semiconductor INS8154
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
N-Channel 128-by-8 Bit RAM Input/Output (RAM I/O)
diff --git a/src/emu/machine/mc146818.c b/src/emu/machine/mc146818.c
index a09ac1a1e87..fdfc9ca2d16 100644
--- a/src/emu/machine/mc146818.c
+++ b/src/emu/machine/mc146818.c
@@ -186,7 +186,7 @@ void mc146818_device::nvram_default()
if (m_region != NULL)
{
UINT32 bytes = m_region->bytes();
-
+
if (bytes > data_size())
bytes = data_size();
@@ -237,7 +237,7 @@ int mc146818_device::to_ram(int a)
{
if (!(m_data[REG_B] & REG_B_DM))
return dec_2_bcd(a);
-
+
return a;
}
@@ -250,7 +250,7 @@ int mc146818_device::from_ram(int a)
{
if (!(m_data[REG_B] & REG_B_DM))
return bcd_2_dec(a);
-
+
return a;
}
diff --git a/src/emu/machine/mc146818.h b/src/emu/machine/mc146818.h
index adae4f7cf36..fd0cab8f2d9 100644
--- a/src/emu/machine/mc146818.h
+++ b/src/emu/machine/mc146818.h
@@ -171,5 +171,5 @@ private:
// device type definition
extern const device_type MC146818;
-
+
#endif /* __MC146818_H__ */
diff --git a/src/emu/machine/mc6846.h b/src/emu/machine/mc6846.h
index 9e0dc9d4814..a3c0a370e50 100644
--- a/src/emu/machine/mc6846.h
+++ b/src/emu/machine/mc6846.h
@@ -52,7 +52,7 @@ public:
/* partial access to internal state */
UINT16 get_preset(); /* timer interval - 1 in us */
-
+
protected:
// device-level overrides
virtual void device_config_complete();
@@ -61,7 +61,7 @@ protected:
private:
// internal state
-
+
/* registers */
UINT8 m_csr; /* 0,4: combination status register */
UINT8 m_pcr; /* 1: peripheral control register */
@@ -104,12 +104,12 @@ private:
int m_old_cif;
int m_old_cto;
-
+
inline UINT16 counter();
inline void update_irq();
inline void update_cto();
inline void timer_launch();
-
+
TIMER_CALLBACK_MEMBER(timer_expire);
TIMER_CALLBACK_MEMBER(timer_one_shot);
};
diff --git a/src/emu/machine/mc6854.c b/src/emu/machine/mc6854.c
index b2009ef6500..2ec4196baad 100644
--- a/src/emu/machine/mc6854.c
+++ b/src/emu/machine/mc6854.c
@@ -186,11 +186,11 @@ mc6854_device::mc6854_device(const machine_config &mconfig, const char *tag, dev
m_fpos(0)
{
for (int i = 0; i < MC6854_FIFO_SIZE; i++)
- {
+ {
m_tfifo[i] = 0;
m_rfifo[i] = 0;
}
-
+
for (int i = 0; i < MAX_FRAME_LENGTH; i++)
{
m_frame[i] = 0;
@@ -379,7 +379,7 @@ void mc6854_device::tfifo_terminate( )
TIMER_CALLBACK_MEMBER(mc6854_device::tfifo_cb)
{
device_t* device = (device_t*) ptr;
-
+
int i, data = m_tfifo[ MC6854_FIFO_SIZE - 1 ];
if ( ! m_tstate )
diff --git a/src/emu/machine/mc6854.h b/src/emu/machine/mc6854.h
index 4f52c9a736b..b6d4fce565b 100644
--- a/src/emu/machine/mc6854.h
+++ b/src/emu/machine/mc6854.h
@@ -107,18 +107,18 @@ private:
5 = 8-bit logical control field(s)
6 = variable-length data field(s)
*/
-
+
void send_bits( UINT32 data, int len, int zi );
void tfifo_push( UINT8 data );
void tfifo_terminate( );
TIMER_CALLBACK_MEMBER(tfifo_cb);
void tfifo_clear( );
-
+
void rfifo_push( UINT8 d );
void rfifo_terminate( );
UINT8 rfifo_pop( );
void rfifo_clear( );
-
+
void update_sr2( );
void update_sr1( );
};
diff --git a/src/emu/machine/ncr5380n.c b/src/emu/machine/ncr5380n.c
index e9846ce9b46..a14fad48f69 100644
--- a/src/emu/machine/ncr5380n.c
+++ b/src/emu/machine/ncr5380n.c
@@ -3,13 +3,13 @@
ncr5380n.c
Implementation of the NCR 5380, aka the Zilog Z5380
-
+
TODO:
- IRQs
- Target mode
-
+
40801766 - IIx ROM waiting point for "next read fails"
-
+
*********************************************************************/
#include "emu.h"
@@ -78,7 +78,7 @@ void ncr5380n_device::device_reset()
void ncr5380n_device::reset_soft()
{
state = IDLE;
- scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); // clear any signals we're driving
+ scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); // clear any signals we're driving
scsi_bus->ctrl_wait(scsi_refid, S_ALL, S_ALL);
status = 0;
drq = false;
@@ -97,13 +97,13 @@ void ncr5380n_device::scsi_ctrl_changed()
{
UINT32 ctrl = scsi_bus->ctrl_r();
-// printf("scsi_ctrl_changed: lines now %x\n", ctrl);
+// printf("scsi_ctrl_changed: lines now %x\n", ctrl);
-/* if ((ctrl & (S_PHASE_MASK|S_SEL|S_BSY)) != last_phase)
- {
- printf("phase now %d, REQ %x SEL %x BSY %x\n", ctrl & S_PHASE_MASK, ctrl & S_REQ, ctrl & S_SEL, ctrl & S_BSY);
- last_phase = (S_PHASE_MASK|S_SEL|S_BSY);
- }*/
+/* if ((ctrl & (S_PHASE_MASK|S_SEL|S_BSY)) != last_phase)
+ {
+ printf("phase now %d, REQ %x SEL %x BSY %x\n", ctrl & S_PHASE_MASK, ctrl & S_REQ, ctrl & S_SEL, ctrl & S_BSY);
+ last_phase = (S_PHASE_MASK|S_SEL|S_BSY);
+ }*/
// recalculate phase match
m_busstatus &= ~BAS_PHASEMATCH;
@@ -117,7 +117,7 @@ void ncr5380n_device::scsi_ctrl_changed()
// if BSY drops or the phase goes mismatch, that terminates the DMA
if ((!(ctrl & S_BSY)) || !(m_busstatus & BAS_PHASEMATCH))
{
-// printf("BSY dropped or phase mismatch during DMA, ending DMA\n");
+// printf("BSY dropped or phase mismatch during DMA, ending DMA\n");
m_mode &= ~MODE_DMA;
m_busstatus |= BAS_ENDOFDMA;
drq_clear();
@@ -162,7 +162,7 @@ void ncr5380n_device::step(bool timeout)
int win;
for(win=7; win>=0 && !(data & (1<<win)); win--);
-// printf("arb complete: data %02x win %02x scsi_id %02x\n", data, win, scsi_id);
+// printf("arb complete: data %02x win %02x scsi_id %02x\n", data, win, scsi_id);
if(win != scsi_id) {
scsi_bus->data_w(scsi_refid, 0);
scsi_bus->ctrl_w(scsi_refid, 0, S_ALL);
@@ -222,7 +222,7 @@ void ncr5380n_device::step(bool timeout)
state = state & STATE_MASK;
step(false);
- drq_set(); // raise DRQ now that we've completed
+ drq_set(); // raise DRQ now that we've completed
break;
default:
@@ -252,21 +252,21 @@ void ncr5380n_device::recv_byte()
void ncr5380n_device::function_bus_complete()
{
state = IDLE;
-// istatus |= I_FUNCTION|I_BUS;
+// istatus |= I_FUNCTION|I_BUS;
check_irq();
}
void ncr5380n_device::function_complete()
{
state = IDLE;
-// istatus |= I_FUNCTION;
+// istatus |= I_FUNCTION;
check_irq();
}
void ncr5380n_device::bus_complete()
{
state = IDLE;
-// istatus |= I_BUS;
+// istatus |= I_BUS;
check_irq();
}
@@ -309,7 +309,7 @@ WRITE8_MEMBER(ncr5380n_device::icmd_w)
// asserting to drive the data bus?
if ((data & IC_DBUS) && !(m_icommand & IC_DBUS))
{
-// printf("%s: driving data bus with %02x\n", tag(), m_outdata);
+// printf("%s: driving data bus with %02x\n", tag(), m_outdata);
scsi_bus->data_w(scsi_refid, m_outdata);
delay(2);
}
@@ -327,7 +327,7 @@ WRITE8_MEMBER(ncr5380n_device::icmd_w)
(data & IC_SEL ? S_SEL : 0) |
(data & IC_ATN ? S_ATN : 0);
-// printf("%s: changing control lines %04x\n", tag(), newdata);
+// printf("%s: changing control lines %04x\n", tag(), newdata);
scsi_bus->ctrl_w(scsi_refid, newdata, S_RST|S_ACK|S_BSY|S_SEL|S_ATN);
}
@@ -342,11 +342,11 @@ READ8_MEMBER(ncr5380n_device::mode_r)
WRITE8_MEMBER(ncr5380n_device::mode_w)
{
-// printf("%s: mode_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
+// printf("%s: mode_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
// arbitration bit being set?
if ((data & MODE_ARBITRATE) && !(m_mode & MODE_ARBITRATE))
{
- // if SEL is selected and the assert SEL bit in the initiator
+ // if SEL is selected and the assert SEL bit in the initiator
// command register is clear, fail
if ((scsi_bus->ctrl_r() & S_SEL) && !(m_icommand & IC_SEL))
{
@@ -355,7 +355,7 @@ WRITE8_MEMBER(ncr5380n_device::mode_w)
else
{
seq = 0;
-// state = DISC_SEL_ARBITRATION;
+// state = DISC_SEL_ARBITRATION;
arbitrate();
}
}
@@ -363,20 +363,20 @@ WRITE8_MEMBER(ncr5380n_device::mode_w)
{
// arbitration in progress bit ONLY clears when the host disables arbitration. (thanks, Zilog Z8530 manual!)
// the Apple II High Speed SCSI Card boot code explicitly requires this.
- m_icommand &= ~ IC_ARBITRATION;
+ m_icommand &= ~ IC_ARBITRATION;
}
m_mode = data;
}
READ8_MEMBER(ncr5380n_device::command_r)
{
-// logerror("%s: command_r %02x (%08x)\n", tag(), m_tcommand, space.device().safe_pc());
+// logerror("%s: command_r %02x (%08x)\n", tag(), m_tcommand, space.device().safe_pc());
return m_tcommand;
}
WRITE8_MEMBER(ncr5380n_device::command_w)
{
-// printf("%s: command_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
+// printf("%s: command_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
m_tcommand = data;
// recalculate phase match
@@ -390,11 +390,11 @@ WRITE8_MEMBER(ncr5380n_device::command_w)
void ncr5380n_device::arbitrate()
{
m_icommand &= ~IC_ARBLOST;
- m_icommand |= IC_ARBITRATION; // set in progress flag
+ m_icommand |= IC_ARBITRATION; // set in progress flag
state = (state & STATE_MASK) | (ARB_COMPLETE << SUB_SHIFT);
scsi_bus->data_w(scsi_refid, m_outdata);
scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY);
- m_icommand |= IC_BSY; // make sure BSY shows in icommand (Zilog 5380 manual suggests this behavior, Apple II High-Speed SCSI Card firmware requires it)
+ m_icommand |= IC_BSY; // make sure BSY shows in icommand (Zilog 5380 manual suggests this behavior, Apple II High-Speed SCSI Card firmware requires it)
delay(11);
}
@@ -411,7 +411,7 @@ void ncr5380n_device::check_irq()
READ8_MEMBER(ncr5380n_device::status_r)
{
UINT32 ctrl = scsi_bus->ctrl_r();
- UINT8 res = status |
+ UINT8 res = status |
(ctrl & S_RST ? ST_RST : 0) |
(ctrl & S_BSY ? ST_BSY : 0) |
(ctrl & S_REQ ? ST_REQ : 0) |
@@ -420,7 +420,7 @@ READ8_MEMBER(ncr5380n_device::status_r)
(ctrl & S_INP ? ST_IO : 0) |
(ctrl & S_SEL ? ST_SEL : 0);
-// printf("%s: status_r %02x (%08x)\n", tag(), res, space.device().safe_pc());
+// printf("%s: status_r %02x (%08x)\n", tag(), res, space.device().safe_pc());
return res;
}
@@ -435,7 +435,7 @@ READ8_MEMBER(ncr5380n_device::busandstatus_r)
(ctrl & S_ATN ? BAS_ATN : 0) |
(ctrl & S_ACK ? BAS_ACK : 0);
-// printf("%s: busandstatus_r %02x (%08x)\n", tag(), res, space.device().safe_pc());
+// printf("%s: busandstatus_r %02x (%08x)\n", tag(), res, space.device().safe_pc());
return res;
}
@@ -463,7 +463,7 @@ READ8_MEMBER(ncr5380n_device::resetparityirq_r)
WRITE8_MEMBER(ncr5380n_device::startdmainitrx_w)
{
-// printf("%02x to start dma initiator Rx\n", data);
+// printf("%02x to start dma initiator Rx\n", data);
recv_byte();
}
@@ -495,7 +495,7 @@ UINT8 ncr5380n_device::dma_r()
void ncr5380n_device::drq_set()
{
- if(!drq)
+ if(!drq)
{
drq = true;
m_busstatus |= BAS_DMAREQUEST;
@@ -505,7 +505,7 @@ void ncr5380n_device::drq_set()
void ncr5380n_device::drq_clear()
{
- if(drq)
+ if(drq)
{
drq = false;
m_busstatus &= ~BAS_DMAREQUEST;
@@ -547,7 +547,7 @@ READ8_MEMBER(ncr5380n_device::read)
WRITE8_MEMBER(ncr5380n_device::write)
{
-// printf("%x to 5380 @ %x\n", data, offset);
+// printf("%x to 5380 @ %x\n", data, offset);
switch (offset & 7)
{
case 0:
@@ -583,4 +583,3 @@ WRITE8_MEMBER(ncr5380n_device::write)
break;
}
}
-
diff --git a/src/emu/machine/pd4990a.h b/src/emu/machine/pd4990a.h
index 2d767928e02..341343bfe3f 100644
--- a/src/emu/machine/pd4990a.h
+++ b/src/emu/machine/pd4990a.h
@@ -20,14 +20,14 @@ class upd4990a_old_device : public device_t
public:
upd4990a_old_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~upd4990a_old_device() {}
-
+
/* this should be refactored, once RTCs get unified */
void addretrace();
DECLARE_READ8_MEMBER( testbit_r );
DECLARE_READ8_MEMBER( databit_r );
DECLARE_WRITE16_MEMBER( control_16_w );
-
+
protected:
// device-level overrides
virtual void device_config_complete();
@@ -59,7 +59,7 @@ private:
int m_clock_line;
int m_command_line; //??
-
+
void increment_month();
void increment_day();
void readbit();
diff --git a/src/emu/machine/ram.c b/src/emu/machine/ram.c
index f4dad9f81a8..66085274f88 100644
--- a/src/emu/machine/ram.c
+++ b/src/emu/machine/ram.c
@@ -2,8 +2,8 @@
RAM device
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
Provides a configurable amount of RAM to drivers
diff --git a/src/emu/machine/ram.h b/src/emu/machine/ram.h
index bde5e157512..7579c730a6e 100644
--- a/src/emu/machine/ram.h
+++ b/src/emu/machine/ram.h
@@ -2,8 +2,8 @@
RAM device
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
Provides a configurable amount of RAM to drivers
diff --git a/src/emu/mame.c b/src/emu/mame.c
index e66d98dbbc4..cd61b65c956 100644
--- a/src/emu/mame.c
+++ b/src/emu/mame.c
@@ -148,7 +148,7 @@ int mame_execute(emu_options &options, osd_interface &osd)
bool exit_pending = false;
int error = MAMERR_NONE;
- // We need to preprocess the config files once to determine the web server's configuration
+ // We need to preprocess the config files once to determine the web server's configuration
if (options.read_config())
{
options.revert(OPTION_PRIORITY_INI);
diff --git a/src/emu/netlist/devices/net_lib.c b/src/emu/netlist/devices/net_lib.c
index 2c255469569..ac8754fb36b 100644
--- a/src/emu/netlist/devices/net_lib.c
+++ b/src/emu/netlist/devices/net_lib.c
@@ -340,7 +340,6 @@ NETLIB_START(nic7448)
NETLIB_UPDATE(nic7448)
{
-
if (INPLOGIC(m_BIQ) && !INPLOGIC(m_LTQ))
{
sub.update_outputs(8);
@@ -502,7 +501,6 @@ NETLIB_UPDATE(nic7474)
NETLIB_START(nic7474)
{
-
register_sub(sub, "sub");
register_input(sub, "CLK", sub.m_clk, net_input_t::INP_STATE_LH);
register_input("D", m_D);
@@ -817,7 +815,7 @@ NETLIB_UPDATE(nic74107A)
else if (!sub.m_Q2)
sub.m_clk.activate_hl();
//if (!sub.m_Q2 & INPLOGIC(m_clrQ))
- // sub.m_clk.activate_hl();
+ // sub.m_clk.activate_hl();
}
NETLIB_START(nic74153)
@@ -977,7 +975,7 @@ static const net_device_t_base_factory *netregistry[] =
ENTRY(netdev_analog_const, NETDEV_ANALOG_CONST)
ENTRY(netdev_logic_input, NETDEV_LOGIC_INPUT)
ENTRY(netdev_analog_input, NETDEV_ANALOG_INPUT)
- ENTRY(netdev_log, NETDEV_LOG)
+ ENTRY(netdev_log, NETDEV_LOG)
ENTRY(netdev_clock, NETDEV_CLOCK)
ENTRY(netdev_mainclock, NETDEV_MAINCLOCK)
ENTRY(netdev_analog_callback,NETDEV_CALLBACK)
@@ -1040,4 +1038,3 @@ net_device_t *net_create_device_by_name(const astring &name, netlist_setup_t &se
fatalerror("Class %s required for IC %s not found!\n", name.cstr(), icname.cstr());
return NULL; // appease code analysis
}
-
diff --git a/src/emu/netlist/devices/net_lib.h b/src/emu/netlist/devices/net_lib.h
index 2eb66ad2324..177a387b347 100644
--- a/src/emu/netlist/devices/net_lib.h
+++ b/src/emu/netlist/devices/net_lib.h
@@ -57,7 +57,7 @@
#include "nld_7400.h"
// this is a bad hack
-#define USE_OLD7493 (0)
+#define USE_OLD7493 (0)
// ----------------------------------------------------------------------------------------
// Special chips
@@ -87,8 +87,8 @@
NET_CONNECT(_name, S, _S) \
NET_CONNECT(_name, R, _R)
-#define NETDEV_LOG(_name, _I) \
- NET_REGISTER_DEV(netdev_log, _name) \
+#define NETDEV_LOG(_name, _I) \
+ NET_REGISTER_DEV(netdev_log, _name) \
NET_CONNECT(_name, I, _I)
@@ -356,7 +356,7 @@ NETLIB_SUBDEVICE(nic7474sub,
);
NETLIB_DEVICE(nic7474,
- NETLIB_NAME(nic7474sub) sub;
+ NETLIB_NAME(nic7474sub) sub;
ttl_input_t m_D;
ttl_input_t m_clrQ;
@@ -389,7 +389,7 @@ NETLIB_SUBDEVICE(nic74107Asub,
);
NETLIB_DEVICE(nic74107A,
- NETLIB_NAME(nic74107Asub) sub;
+ NETLIB_NAME(nic74107Asub) sub;
ttl_input_t m_J;
ttl_input_t m_K;
@@ -400,7 +400,7 @@ NETLIB_DEVICE(nic74107A,
class NETLIB_NAME(nic74107) : public NETLIB_NAME(nic74107A)
{
public:
- NETLIB_NAME(nic74107) ()
+ NETLIB_NAME(nic74107) ()
: NETLIB_NAME(nic74107A) () {}
};
@@ -480,7 +480,7 @@ NETLIB_SUBDEVICE(nic9316_sub,
);
NETLIB_DEVICE(nic9316,
- NETLIB_NAME(nic9316_sub) sub;
+ NETLIB_NAME(nic9316_sub) sub;
ttl_input_t m_ENP;
ttl_input_t m_ENT;
ttl_input_t m_CLRQ;
@@ -543,7 +543,7 @@ NETLIB_SUBDEVICE(nic7448_sub,
NETLIB_DEVICE(nic7448,
- NETLIB_NAME(nic7448_sub) sub;
+ NETLIB_NAME(nic7448_sub) sub;
ttl_input_t m_LTQ;
ttl_input_t m_BIQ;
diff --git a/src/emu/netlist/devices/nld_7400.c b/src/emu/netlist/devices/nld_7400.c
index 977bd991dbc..baad498c641 100644
--- a/src/emu/netlist/devices/nld_7400.c
+++ b/src/emu/netlist/devices/nld_7400.c
@@ -2,5 +2,3 @@
* nld_7400.c
*
*/
-
-
diff --git a/src/emu/netlist/devices/nld_7400.h b/src/emu/netlist/devices/nld_7400.h
index 078ceafd54b..82f121597ed 100644
--- a/src/emu/netlist/devices/nld_7400.h
+++ b/src/emu/netlist/devices/nld_7400.h
@@ -35,9 +35,9 @@
#define NLD_7400_H_
#define TTL_7400_NAND(_name, _A, _B) \
- NET_REGISTER_DEV(7400, _name) \
- NET_CONNECT(_name, A, _A) \
- NET_CONNECT(_name, B, _B)
+ NET_REGISTER_DEV(7400, _name) \
+ NET_CONNECT(_name, A, _A) \
+ NET_CONNECT(_name, B, _B)
NETLIB_SIGNAL(7400, 2, 0, 0);
diff --git a/src/emu/netlist/devices/nld_signal.h b/src/emu/netlist/devices/nld_signal.h
index 9119c0253a7..4265343f624 100644
--- a/src/emu/netlist/devices/nld_signal.h
+++ b/src/emu/netlist/devices/nld_signal.h
@@ -15,12 +15,12 @@
// ----------------------------------------------------------------------------------------
#define NETLIB_SIGNAL(_name, _num_input, _check, _invert) \
- class NETLIB_NAME(_name) : public net_signal_t<_num_input, _check, _invert> \
- { \
- public: \
- ATTR_COLD NETLIB_NAME(_name) () \
- : net_signal_t<_num_input, _check, _invert>() { } \
- }
+ class NETLIB_NAME(_name) : public net_signal_t<_num_input, _check, _invert> \
+ { \
+ public: \
+ ATTR_COLD NETLIB_NAME(_name) () \
+ : net_signal_t<_num_input, _check, _invert>() { } \
+ }
// ----------------------------------------------------------------------------------------
// net_signal_t
@@ -30,46 +30,46 @@ template <int _numdev>
class net_signal_base_t : public net_device_t
{
public:
- net_signal_base_t()
- : net_device_t(), m_active(1) { }
+ net_signal_base_t()
+ : net_device_t(), m_active(1) { }
- ATTR_COLD void start()
- {
- const char *sIN[8] = { "I1", "I2", "I3", "I4", "I5", "I6", "I7", "I8" };
+ ATTR_COLD void start()
+ {
+ const char *sIN[8] = { "I1", "I2", "I3", "I4", "I5", "I6", "I7", "I8" };
- register_output("Q", m_Q);
- for (int i=0; i < _numdev; i++)
- {
- register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
- }
- m_Q.initial(1);
- }
+ register_output("Q", m_Q);
+ for (int i=0; i < _numdev; i++)
+ {
+ register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
+ }
+ m_Q.initial(1);
+ }
#if (USE_DEACTIVE_DEVICE)
- ATTR_HOT void inc_active()
- {
- if (m_active == 0)
- {
- update();
- }
- m_active++;
- }
-
- ATTR_HOT void dec_active()
- {
- m_active--;
- if (m_active == 0)
- {
- for (int i = 0; i< _numdev; i++)
- m_i[i].inactivate();
- }
- }
+ ATTR_HOT void inc_active()
+ {
+ if (m_active == 0)
+ {
+ update();
+ }
+ m_active++;
+ }
+
+ ATTR_HOT void dec_active()
+ {
+ m_active--;
+ if (m_active == 0)
+ {
+ for (int i = 0; i< _numdev; i++)
+ m_i[i].inactivate();
+ }
+ }
#endif
public:
- ttl_input_t m_i[_numdev];
- ttl_output_t m_Q;
- INT8 m_active;
+ ttl_input_t m_i[_numdev];
+ ttl_output_t m_Q;
+ INT8 m_active;
};
@@ -77,72 +77,72 @@ template <int _numdev, int _check, int _invert>
class net_signal_t : public net_device_t
{
public:
- net_signal_t()
- : net_device_t(), m_active(1)
- {
- m_Q.initial(1);
- }
-
- ATTR_COLD void start()
- {
- const char *sIN[8] = { "A", "B", "C", "D", "E", "F", "G", "H" };
-
- register_output("Q", m_Q);
- for (int i=0; i < _numdev; i++)
- {
- register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
- }
- }
-
- #if (USE_DEACTIVE_DEVICE)
- ATTR_HOT void inc_active()
- {
- if (m_active == 0)
- {
- update();
- }
- m_active++;
- }
-
- ATTR_HOT void dec_active()
- {
- m_active--;
- if (m_active == 0)
- {
- for (int i = 0; i< _numdev; i++)
- m_i[i].inactivate();
- }
- }
- #endif
-
- virtual void update()
- {
- static const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
- int pos = -1;
-
- for (int i = 0; i< _numdev; i++)
- {
- this->m_i[i].activate();
- if (INPLOGIC(this->m_i[i]) == _check)
- {
- OUTLOGIC(this->m_Q, _check ^ (1 ^ _invert), times[_check]);// ? 15000 : 22000);
- pos = i;
- break;
- }
- }
- if (pos >= 0)
- {
- for (int i = 0; i < _numdev; i++)
- if (i != pos)
- this->m_i[i].inactivate();
- } else
- OUTLOGIC(this->m_Q,_check ^ (_invert), times[1-_check]);// ? 22000 : 15000);
- }
+ net_signal_t()
+ : net_device_t(), m_active(1)
+ {
+ m_Q.initial(1);
+ }
+
+ ATTR_COLD void start()
+ {
+ const char *sIN[8] = { "A", "B", "C", "D", "E", "F", "G", "H" };
+
+ register_output("Q", m_Q);
+ for (int i=0; i < _numdev; i++)
+ {
+ register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
+ }
+ }
+
+ #if (USE_DEACTIVE_DEVICE)
+ ATTR_HOT void inc_active()
+ {
+ if (m_active == 0)
+ {
+ update();
+ }
+ m_active++;
+ }
+
+ ATTR_HOT void dec_active()
+ {
+ m_active--;
+ if (m_active == 0)
+ {
+ for (int i = 0; i< _numdev; i++)
+ m_i[i].inactivate();
+ }
+ }
+ #endif
+
+ virtual void update()
+ {
+ static const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
+ int pos = -1;
+
+ for (int i = 0; i< _numdev; i++)
+ {
+ this->m_i[i].activate();
+ if (INPLOGIC(this->m_i[i]) == _check)
+ {
+ OUTLOGIC(this->m_Q, _check ^ (1 ^ _invert), times[_check]);// ? 15000 : 22000);
+ pos = i;
+ break;
+ }
+ }
+ if (pos >= 0)
+ {
+ for (int i = 0; i < _numdev; i++)
+ if (i != pos)
+ this->m_i[i].inactivate();
+ } else
+ OUTLOGIC(this->m_Q,_check ^ (_invert), times[1-_check]);// ? 22000 : 15000);
+ }
public:
- ttl_input_t m_i[_numdev];
- ttl_output_t m_Q;
- INT8 m_active;
+ ttl_input_t m_i[_numdev];
+ ttl_output_t m_Q;
+ INT8 m_active;
};
#if 1
@@ -150,71 +150,71 @@ template <int _check, int _invert>
class xx_net_signal_t: public net_device_t
{
public:
- xx_net_signal_t()
- : net_device_t(), m_active(1)
- {
- m_Q.initial(1);
- }
-
- ATTR_COLD void start()
- {
- const char *sIN[2] = { "A", "B" };
-
- register_output("Q", m_Q);
- for (int i=0; i < 2; i++)
- {
- register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
- }
- }
-
- #if (USE_DEACTIVE_DEVICE)
- ATTR_HOT void inc_active()
- {
- if (m_active == 0)
- {
- update();
- }
- m_active++;
- }
-
- ATTR_HOT void dec_active()
- {
- m_active--;
- if (m_active == 0)
- {
- m_i[0].inactivate();
- m_i[1].inactivate();
- }
- }
- #endif
-
-
- ATTR_HOT ATTR_ALIGN void update()
- {
- const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
-
- int res = _invert ^ 1 ^_check;
- m_i[0].activate();
- m_i[1].activate();
- if (INPLOGIC(m_i[0]) ^ _check)
- {
- if (INPLOGIC(m_i[1]) ^ _check)
- {
- res = _invert ^ _check;
- }
- else
- m_i[0].inactivate();
- } else {
- if (INPLOGIC(m_i[1]) ^ _check)
- m_i[1].inactivate();
- }
- OUTLOGIC(m_Q, res, times[(res & 1) ^ 1]);// ? 22000 : 15000);
- }
+ xx_net_signal_t()
+ : net_device_t(), m_active(1)
+ {
+ m_Q.initial(1);
+ }
+
+ ATTR_COLD void start()
+ {
+ const char *sIN[2] = { "A", "B" };
+
+ register_output("Q", m_Q);
+ for (int i=0; i < 2; i++)
+ {
+ register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
+ }
+ }
+
+ #if (USE_DEACTIVE_DEVICE)
+ ATTR_HOT void inc_active()
+ {
+ if (m_active == 0)
+ {
+ update();
+ }
+ m_active++;
+ }
+
+ ATTR_HOT void dec_active()
+ {
+ m_active--;
+ if (m_active == 0)
+ {
+ m_i[0].inactivate();
+ m_i[1].inactivate();
+ }
+ }
+ #endif
+
+
+ ATTR_HOT ATTR_ALIGN void update()
+ {
+ const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
+
+ int res = _invert ^ 1 ^_check;
+ m_i[0].activate();
+ m_i[1].activate();
+ if (INPLOGIC(m_i[0]) ^ _check)
+ {
+ if (INPLOGIC(m_i[1]) ^ _check)
+ {
+ res = _invert ^ _check;
+ }
+ else
+ m_i[0].inactivate();
+ } else {
+ if (INPLOGIC(m_i[1]) ^ _check)
+ m_i[1].inactivate();
+ }
+ OUTLOGIC(m_Q, res, times[(res & 1) ^ 1]);// ? 22000 : 15000);
+ }
public:
- ttl_input_t m_i[2];
- ttl_output_t m_Q;
- INT8 m_active;
+ ttl_input_t m_i[2];
+ ttl_output_t m_Q;
+ INT8 m_active;
};
#endif
@@ -226,58 +226,58 @@ template <UINT8 _check, UINT8 _invert>
class net_signal_t<3, _check, _invert> : public net_device_t
{
public:
- net_signal_t() : net_device_t(), m_active(1) { }
-
- ATTR_COLD void start()
- {
- const char *sIN[3] = { "I1", "I2", "I3" };
-
- register_output("Q", m_Q);
- for (int i=0; i < 3; i++)
- {
- register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
- }
- m_Q.initial(1);
- }
-
- ATTR_HOT ATTR_ALIGN void update()
- {
- const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
- //const UINT8 res_tab[4] = {1, 1, 1, 0 };
- //const UINT8 ai1[4] = {0, 1, 0, 0 };
- //const UINT8 ai2[4] = {1, 0, 1, 0 };
-
- UINT8 res = _invert ^ 1 ^_check;
- m_i[0].activate();
- if (INPLOGIC(m_i[0]) ^ _check)
- {
- m_i[1].activate();
- if (INPLOGIC(m_i[1]) ^ _check)
- {
- m_i[2].activate();
- if (INPLOGIC(m_i[2]) ^ _check)
- {
- res = _invert ^ _check;
- }
- else
- m_i[1].inactivate();
- }
- else
- {
- if (INPLOGIC(m_i[2]) ^ _check)
- m_i[2].inactivate();
- m_i[0].inactivate();
- }
- } else {
- if (INPLOGIC(m_i[1]) ^ _check)
- m_i[1].inactivate();
- }
- OUTLOGIC(m_Q, res, times[1 - res]);// ? 22000 : 15000);
- }
+ net_signal_t() : net_device_t(), m_active(1) { }
+
+ ATTR_COLD void start()
+ {
+ const char *sIN[3] = { "I1", "I2", "I3" };
+
+ register_output("Q", m_Q);
+ for (int i=0; i < 3; i++)
+ {
+ register_input(sIN[i], m_i[i], net_input_t::INP_STATE_ACTIVE);
+ }
+ m_Q.initial(1);
+ }
+
+ ATTR_HOT ATTR_ALIGN void update()
+ {
+ const netlist_time times[2] = { NLTIME_FROM_NS(22), NLTIME_FROM_NS(15) };
+ //const UINT8 res_tab[4] = {1, 1, 1, 0 };
+ //const UINT8 ai1[4] = {0, 1, 0, 0 };
+ //const UINT8 ai2[4] = {1, 0, 1, 0 };
+
+ UINT8 res = _invert ^ 1 ^_check;
+ m_i[0].activate();
+ if (INPLOGIC(m_i[0]) ^ _check)
+ {
+ m_i[1].activate();
+ if (INPLOGIC(m_i[1]) ^ _check)
+ {
+ m_i[2].activate();
+ if (INPLOGIC(m_i[2]) ^ _check)
+ {
+ res = _invert ^ _check;
+ }
+ else
+ m_i[1].inactivate();
+ }
+ else
+ {
+ if (INPLOGIC(m_i[2]) ^ _check)
+ m_i[2].inactivate();
+ m_i[0].inactivate();
+ }
+ } else {
+ if (INPLOGIC(m_i[1]) ^ _check)
+ m_i[1].inactivate();
+ }
+ OUTLOGIC(m_Q, res, times[1 - res]);// ? 22000 : 15000);
+ }
public:
- ttl_input_t m_i[3];
- ttl_output_t m_Q;
- INT8 m_active;
+ ttl_input_t m_i[3];
+ ttl_output_t m_Q;
+ INT8 m_active;
};
@@ -288,8 +288,8 @@ template <int _check, int _invert>
class net_signal_t<2, _check, _invert> : public xx_net_signal_t<_check, _invert>
{
public:
- net_signal_t()
- : xx_net_signal_t<_check, _invert>() { }
+ net_signal_t()
+ : xx_net_signal_t<_check, _invert>() { }
};
diff --git a/src/emu/netlist/devices/nld_system.h b/src/emu/netlist/devices/nld_system.h
index 34cc4d99bc4..7f32ff748c3 100644
--- a/src/emu/netlist/devices/nld_system.h
+++ b/src/emu/netlist/devices/nld_system.h
@@ -17,12 +17,12 @@
// ----------------------------------------------------------------------------------------
#define NETDEV_TTL_CONST(_name, _v) \
- NET_REGISTER_DEV(netdev_ttl_const, _name) \
- NETDEV_PARAM(_name.CONST, _v)
+ NET_REGISTER_DEV(netdev_ttl_const, _name) \
+ NETDEV_PARAM(_name.CONST, _v)
#define NETDEV_ANALOG_CONST(_name, _v) \
- NET_REGISTER_DEV(netdev_analog_const, _name) \
- NETDEV_PARAM(_name.CONST, _v)
+ NET_REGISTER_DEV(netdev_analog_const, _name) \
+ NETDEV_PARAM(_name.CONST, _v)
// ----------------------------------------------------------------------------------------
// netdev_*_const
@@ -58,7 +58,7 @@ NETLIB_DEVICE_WITH_PARAMS(netdev_mainclock,
class NETLIB_NAME(netdev_analog_callback) : public net_device_t
{
public:
- NETLIB_NAME(netdev_analog_callback)()
+ NETLIB_NAME(netdev_analog_callback)()
: net_device_t() { }
ATTR_COLD void start()
diff --git a/src/emu/netlist/netlist.mak b/src/emu/netlist/netlist.mak
index 76aa56236d4..7f235075919 100644
--- a/src/emu/netlist/netlist.mak
+++ b/src/emu/netlist/netlist.mak
@@ -22,4 +22,4 @@ NETLISTOBJS+= \
$(NETLISTOBJ)/nl_base.o \
$(NETLISTOBJ)/nl_parser.o \
$(NETLISTOBJ)/devices/net_lib.o \
-
+
diff --git a/src/emu/netlist/nl_base.c b/src/emu/netlist/nl_base.c
index a784c64e3b7..3908960b0a9 100644
--- a/src/emu/netlist/nl_base.c
+++ b/src/emu/netlist/nl_base.c
@@ -13,9 +13,9 @@
netlist_base_t::netlist_base_t()
: m_mainclock(NULL),
- m_time_ps(netlist_time::zero),
- m_rem(0),
- m_div(NETLIST_DIV)
+ m_time_ps(netlist_time::zero),
+ m_rem(0),
+ m_div(NETLIST_DIV)
{
}
@@ -30,11 +30,11 @@ ATTR_COLD void netlist_base_t::set_mainclock_dev(NETLIB_NAME(netdev_mainclock) *
ATTR_COLD void netlist_base_t::reset()
{
- m_time_ps = netlist_time::zero;
- m_rem = 0;
- m_queue.clear();
- if (m_mainclock != NULL)
- m_mainclock->m_Q.set_time(netlist_time::zero);
+ m_time_ps = netlist_time::zero;
+ m_rem = 0;
+ m_queue.clear();
+ if (m_mainclock != NULL)
+ m_mainclock->m_Q.set_time(netlist_time::zero);
}
@@ -195,9 +195,9 @@ ATTR_HOT ATTR_ALIGN const netlist_sig_t netlist_core_device_t::INPLOGIC_PASSIVE(
net_device_t::net_device_t()
: netlist_core_device_t(),
- m_inputs(20),
- m_setup(NULL),
- m_variable_input_count(false)
+ m_inputs(20),
+ m_setup(NULL),
+ m_variable_input_count(false)
{
}
@@ -311,7 +311,6 @@ ATTR_HOT inline void net_output_t::update_dev(const net_input_t *inp, const UINT
ATTR_HOT inline void net_output_t::update_devs()
{
-
assert(m_num_cons != 0);
const UINT32 masks[4] = { 1, 5, 3, 1 };
diff --git a/src/emu/netlist/nl_base.h b/src/emu/netlist/nl_base.h
index 713e94572e2..5904f043e4f 100644
--- a/src/emu/netlist/nl_base.h
+++ b/src/emu/netlist/nl_base.h
@@ -38,7 +38,7 @@ typedef delegate<void ()> net_update_delegate;
#define NETLIB_UPDATE(_chip) ATTR_HOT ATTR_ALIGN void NETLIB_NAME(_chip) :: update(void)
#define NETLIB_START(_chip) ATTR_COLD void NETLIB_NAME(_chip) :: start(void)
//#define NETLIB_CONSTRUCTOR(_chip) ATTR_COLD _chip :: _chip (netlist_setup_t &setup, const char *name)
-// : net_device_t(setup, name)
+// : net_device_t(setup, name)
#define NETLIB_UPDATE_PARAM(_chip) ATTR_HOT ATTR_ALIGN void NETLIB_NAME(_chip) :: update_param(void)
#define NETLIB_FUNC_VOID(_chip, _name, _params) ATTR_HOT ATTR_ALIGN inline void NETLIB_NAME(_chip) :: _name _params
@@ -47,8 +47,8 @@ typedef delegate<void ()> net_update_delegate;
class NETLIB_NAME(_name) : public net_device_t \
{ \
public: \
- NETLIB_NAME(_name) () \
- : net_device_t() { } \
+ NETLIB_NAME(_name) () \
+ : net_device_t() { } \
protected: \
ATTR_HOT void update(); \
ATTR_HOT void start(); \
@@ -59,9 +59,9 @@ typedef delegate<void ()> net_update_delegate;
class NETLIB_NAME(_name) : public netlist_core_device_t \
{ \
public: \
- NETLIB_NAME(_name) () \
- : netlist_core_device_t() \
- { } \
+ NETLIB_NAME(_name) () \
+ : netlist_core_device_t() \
+ { } \
/*protected:*/ \
ATTR_HOT void update(); \
_priv \
@@ -71,8 +71,8 @@ typedef delegate<void ()> net_update_delegate;
class NETLIB_NAME(_name) : public net_device_t \
{ \
public: \
- NETLIB_NAME(_name) () \
- : net_device_t() { } \
+ NETLIB_NAME(_name) () \
+ : net_device_t() { } \
ATTR_HOT void update_param(); \
ATTR_HOT void update(); \
ATTR_HOT void start(); \
@@ -319,7 +319,7 @@ public:
: net_output_t(OUTPUT | SIGNAL_DIGITAL)
{
// Default to TTL
- m_low_V = 0.1; // these depend on sinked/sourced current. Values should be suitable for typical applications.
+ m_low_V = 0.1; // these depend on sinked/sourced current. Values should be suitable for typical applications.
m_high_V = 4.8;
}
@@ -774,34 +774,34 @@ ATTR_HOT inline const bool analog_input_t::is_highz() const
class net_device_t_base_factory
{
public:
- net_device_t_base_factory(const astring &name, const astring &classname)
- : m_name(name), m_classname(classname)
- {}
+ net_device_t_base_factory(const astring &name, const astring &classname)
+ : m_name(name), m_classname(classname)
+ {}
- virtual ~net_device_t_base_factory() {}
+ virtual ~net_device_t_base_factory() {}
- virtual net_device_t *Create() const = 0;
+ virtual net_device_t *Create() const = 0;
- const astring &name() const { return m_name; }
- const astring &classname() const { return m_classname; }
+ const astring &name() const { return m_name; }
+ const astring &classname() const { return m_classname; }
protected:
- astring m_name; /* device name */
- astring m_classname; /* device class name */
+ astring m_name; /* device name */
+ astring m_classname; /* device class name */
};
template <class C>
class net_device_t_factory : public net_device_t_base_factory
{
public:
- net_device_t_factory(const astring &name, const astring &classname)
- : net_device_t_base_factory(name, classname) { }
-
- net_device_t *Create() const
- {
- net_device_t *r = new C();
- //r->init(setup, name);
- return r;
- }
+ net_device_t_factory(const astring &name, const astring &classname)
+ : net_device_t_base_factory(name, classname) { }
+
+ net_device_t *Create() const
+ {
+ net_device_t *r = new C();
+ //r->init(setup, name);
+ return r;
+ }
};
net_device_t *net_create_device_by_classname(const astring &classname, netlist_setup_t &setup, const astring &icname);
diff --git a/src/emu/netlist/nl_config.h b/src/emu/netlist/nl_config.h
index 91bc758193c..fd729d5c217 100644
--- a/src/emu/netlist/nl_config.h
+++ b/src/emu/netlist/nl_config.h
@@ -16,27 +16,27 @@
// SETUP
//============================================================
-#define USE_DELEGATES (0)
+#define USE_DELEGATES (0)
/*
* The next options needs -Wno-pmf-conversions to compile and gcc
* This is intended for non-mame usage.
*
*/
-#define USE_PMFDELEGATES (0)
+#define USE_PMFDELEGATES (0)
// Next if enabled adds 20% performance ... but is not guaranteed to be absolutely timing correct.
-#define USE_DEACTIVE_DEVICE (0)
+#define USE_DEACTIVE_DEVICE (0)
-#define OUTPUT_MAX_CONNECTIONS (48)
+#define OUTPUT_MAX_CONNECTIONS (48)
// Use nano-second resolution - Sufficient for now
-#define NETLIST_INTERNAL_RES (U64(1000000000))
-#define NETLIST_DIV_BITS (0)
-//#define NETLIST_INTERNAL_RES (U64(1000000000000))
-//#define NETLIST_DIV_BITS (10)
-#define NETLIST_DIV (U64(1) << NETLIST_DIV_BITS)
-#define NETLIST_MASK (NETLIST_DIV-1)
-#define NETLIST_CLOCK (NETLIST_INTERNAL_RES / NETLIST_DIV)
+#define NETLIST_INTERNAL_RES (U64(1000000000))
+#define NETLIST_DIV_BITS (0)
+//#define NETLIST_INTERNAL_RES (U64(1000000000000))
+//#define NETLIST_DIV_BITS (10)
+#define NETLIST_DIV (U64(1) << NETLIST_DIV_BITS)
+#define NETLIST_MASK (NETLIST_DIV-1)
+#define NETLIST_CLOCK (NETLIST_INTERNAL_RES / NETLIST_DIV)
#define NETLIST_HIGHIMP_V (1.23456e20) /* some voltage we should never see */
@@ -54,7 +54,7 @@ typedef delegate<void (const double)> netlist_output_delegate;
#define NL_VERBOSE (0)
#define NL_KEEP_STATISTICS (0)
-#define FATAL_ERROR_AFTER_NS (0) //(1000)
+#define FATAL_ERROR_AFTER_NS (0) //(1000)
#if (NL_VERBOSE)
#define NL_VERBOSE_OUT(x) printf x
diff --git a/src/emu/netlist/nl_lists.h b/src/emu/netlist/nl_lists.h
index cb437df14c2..970b5c1c39f 100644
--- a/src/emu/netlist/nl_lists.h
+++ b/src/emu/netlist/nl_lists.h
@@ -118,8 +118,8 @@ public:
}
// profiling
- INT32 m_prof_start;
- INT32 m_prof_end;
+ INT32 m_prof_start;
+ INT32 m_prof_end;
INT32 m_prof_sortmove;
INT32 m_prof_sort;
private:
diff --git a/src/emu/netlist/nl_setup.c b/src/emu/netlist/nl_setup.c
index 3cf1795c488..ac9d05ce63c 100644
--- a/src/emu/netlist/nl_setup.c
+++ b/src/emu/netlist/nl_setup.c
@@ -87,7 +87,7 @@ void netlist_setup_t::remove_dev(const astring &name)
void netlist_setup_t::register_callback(const astring &devname, netlist_output_delegate delegate)
{
- NETLIB_NAME(netdev_analog_callback) *dev = (NETLIB_NAME(netdev_analog_callback) *) m_devices.find(devname);
+ NETLIB_NAME(netdev_analog_callback) *dev = (NETLIB_NAME(netdev_analog_callback) *) m_devices.find(devname);
if (dev == NULL)
fatalerror("did not find device %s\n", devname.cstr());
dev->register_callback(delegate);
@@ -315,4 +315,3 @@ void netlist_setup_t::print_stats()
printf("Queue Move %15d\n", m_netlist.m_queue.m_prof_sortmove);
}
}
-
diff --git a/src/emu/netlist/nl_setup.h b/src/emu/netlist/nl_setup.h
index ffc07c9b17d..735a27e6176 100644
--- a/src/emu/netlist/nl_setup.h
+++ b/src/emu/netlist/nl_setup.h
@@ -36,7 +36,6 @@
#define NETLIST_START(_name) \
ATTR_COLD void NETLIST_NAME(_name)(netlist_setup_t &netlist) \
{
-
#define NETLIST_END }
#define NETLIST_INCLUDE(_name) \
diff --git a/src/emu/sound/2608intf.c b/src/emu/sound/2608intf.c
index 42a41b6152d..5028a1d6ed8 100644
--- a/src/emu/sound/2608intf.c
+++ b/src/emu/sound/2608intf.c
@@ -226,7 +226,7 @@ ROM_START( ym2608 )
It was verified, using real YM2608, that this ADPCM stream produces 100% correct output signal.
*/
// see YM2608_ADPCM_ROM_addr table in fm.c for current sample offsets
- // original offset comments from Jarek:
+ // original offset comments from Jarek:
// offset 0:
/* Source: 01BD.ROM */
/* Length: 448 / 0x000001C0 */
@@ -257,5 +257,3 @@ const rom_entry *ym2608_device::device_rom_region() const
{
return ROM_NAME( ym2608 );
}
-
-
diff --git a/src/emu/sound/s14001a.c b/src/emu/sound/s14001a.c
index 2d70d3746ad..7de2fb009b7 100644
--- a/src/emu/sound/s14001a.c
+++ b/src/emu/sound/s14001a.c
@@ -17,12 +17,12 @@
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
-
+
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
diff --git a/src/emu/video/dl1416.c b/src/emu/video/dl1416.c
index 963f8d81f08..83c72737b07 100644
--- a/src/emu/video/dl1416.c
+++ b/src/emu/video/dl1416.c
@@ -1,9 +1,9 @@
/*****************************************************************************
*
- * DL1416
+ * DL1416
*
- * license: MAME, GPL-2.0+
- * copyright-holders: Dirk Best
+ * license: MAME, GPL-2.0+
+ * copyright-holders: Dirk Best
*
* 4-Digit 16-Segment Alphanumeric Intelligent Display
* with Memory/Decoder/Driver
diff --git a/src/emu/video/dl1416.h b/src/emu/video/dl1416.h
index bb1b2eb9e58..18c2bbe734c 100644
--- a/src/emu/video/dl1416.h
+++ b/src/emu/video/dl1416.h
@@ -1,9 +1,9 @@
/*****************************************************************************
*
- * DL1416
+ * DL1416
*
- * license: MAME, GPL-2.0+
- * copyright-holders: Dirk Best
+ * license: MAME, GPL-2.0+
+ * copyright-holders: Dirk Best
*
* 4-Digit 16-Segment Alphanumeric Intelligent Display
* with Memory/Decoder/Driver
diff --git a/src/emu/video/fixfreq.c b/src/emu/video/fixfreq.c
index 33d693546c7..2254fedfd65 100644
--- a/src/emu/video/fixfreq.c
+++ b/src/emu/video/fixfreq.c
@@ -2,7 +2,7 @@
fixfreq.h
- 2013 Couriersud
+ 2013 Couriersud
Fixed frequency monochrome monitor emulation
@@ -57,13 +57,13 @@ const device_type FIXFREQ = &device_creator<fixedfreq_device>;
fixedfreq_device::fixedfreq_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
- device_video_interface(mconfig, *this, false)
+ device_video_interface(mconfig, *this, false)
{
}
fixedfreq_device::fixedfreq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, FIXFREQ, "FIXFREQ", tag, owner, clock, "fixfreq", __FILE__),
- device_video_interface(mconfig, *this, false)
+ device_video_interface(mconfig, *this, false)
{
}
@@ -85,7 +85,6 @@ void fixedfreq_device::device_config_complete()
void fixedfreq_device::device_start()
{
-
m_htotal = 0;
m_vtotal = 0;
@@ -167,8 +166,8 @@ void fixedfreq_device::recompute_parameters(bool postload)
void fixedfreq_device::update_screen_parameters(attotime refresh)
{
rectangle visarea(
-// m_hsync - m_hvisible,
-// m_hsync - 1 ,
+// m_hsync - m_hvisible,
+// m_hsync - 1 ,
m_hbackporch - m_hfrontporch,
m_hbackporch - m_hfrontporch + m_hvisible - 1,
m_vbackporch - m_vfrontporch,
@@ -222,7 +221,6 @@ UINT32 fixedfreq_device::screen_update(screen_device &screen, bitmap_rgb32 &bitm
void fixedfreq_device::update_vid(double newval, attotime cur_time)
{
-
bitmap_rgb32 *bm = m_bitmap[m_cur_bm];
int pixels = round((cur_time - m_line_time).as_double() / m_clock_period.as_double());
@@ -292,5 +290,3 @@ void fixedfreq_device::update_vid(double newval, attotime cur_time)
/***************************************************************************/
-
-
diff --git a/src/emu/video/fixfreq.h b/src/emu/video/fixfreq.h
index 29ca56b349a..0caa57871d9 100644
--- a/src/emu/video/fixfreq.h
+++ b/src/emu/video/fixfreq.h
@@ -45,10 +45,9 @@ extern fixedfreq_interface fixedfreq_mode_ntsc720;
// ======================> vga_device
class fixedfreq_device : public device_t,
- public device_video_interface,
- public fixedfreq_interface
+ public device_video_interface,
+ public fixedfreq_interface
{
-
public:
// construction/destruction
fixedfreq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/video/mb_vcu.c b/src/emu/video/mb_vcu.c
index b714f1d46f8..2aa912d0c3f 100644
--- a/src/emu/video/mb_vcu.c
+++ b/src/emu/video/mb_vcu.c
@@ -64,9 +64,9 @@ inline void mb_vcu_device::write_byte(offs_t address, UINT8 data)
mb_vcu_device::mb_vcu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MB_VCU, "Mazer Blazer custom VCU", tag, owner, clock, "mb_vcu", __FILE__),
- device_memory_interface(mconfig, *this),
- device_video_interface(mconfig, *this),
- m_space_config("videoram", ENDIANNESS_LITTLE, 8, 19, 0, NULL, *ADDRESS_MAP_NAME(mb_vcu_vram))
+ device_memory_interface(mconfig, *this),
+ device_video_interface(mconfig, *this),
+ m_space_config("videoram", ENDIANNESS_LITTLE, 8, 19, 0, NULL, *ADDRESS_MAP_NAME(mb_vcu_vram))
{
}
@@ -144,7 +144,7 @@ void mb_vcu_device::device_reset()
//**************************************************************************
// READ/WRITE HANDLERS
//**************************************************************************
-// UINT8 *pcg = memregion("sub2")->base();
+// UINT8 *pcg = memregion("sub2")->base();
READ8_MEMBER( mb_vcu_device::read_ram )
{
@@ -296,7 +296,7 @@ READ8_MEMBER( mb_vcu_device::load_set_clr )
{
int xi,yi;
int dstx,dsty;
-// UINT8 dot;
+// UINT8 dot;
int bits = 0;
if(m_mode == 0x13 || m_mode == 0x03)
{
diff --git a/src/emu/video/mb_vcu.h b/src/emu/video/mb_vcu.h
index 60bf814447b..4ae727eb2ef 100644
--- a/src/emu/video/mb_vcu.h
+++ b/src/emu/video/mb_vcu.h
@@ -35,9 +35,9 @@ struct mb_vcu_interface
// ======================> mb_vcu_device
class mb_vcu_device : public device_t,
- public device_memory_interface,
- public device_video_interface,
- public mb_vcu_interface
+ public device_memory_interface,
+ public device_video_interface,
+ public mb_vcu_interface
{
public:
// construction/destruction
diff --git a/src/emu/video/vector.c b/src/emu/video/vector.c
index 4417080a48b..757e383c7d0 100644
--- a/src/emu/video/vector.c
+++ b/src/emu/video/vector.c
@@ -131,13 +131,13 @@ const device_type VECTOR = &device_creator<vector_device>;
vector_device::vector_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
: device_t(mconfig, type, name, tag, owner, clock, shortname, source),
- device_video_interface(mconfig, *this)
+ device_video_interface(mconfig, *this)
{
}
vector_device::vector_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, VECTOR, "VECTOR", tag, owner, clock, "vector", __FILE__),
- device_video_interface(mconfig, *this)
+ device_video_interface(mconfig, *this)
{
}
diff --git a/src/emu/video/vector.h b/src/emu/video/vector.h
index 9c0122b0250..cb4b2b04d54 100644
--- a/src/emu/video/vector.h
+++ b/src/emu/video/vector.h
@@ -9,7 +9,7 @@
#define VECTOR_COLOR444(c) \
MAKE_RGB(pal4bit((c) >> 8), pal4bit((c) >> 4), pal4bit((c) >> 0))
-
+
/* The vertices are buffered here */
struct point
@@ -22,29 +22,28 @@ struct point
arg1(0),
arg2(0),
status(0) {}
-
+
int x; int y;
rgb_t col;
int intensity;
int arg1; int arg2; /* start/end in pixel array or clipping info */
int status; /* for dirty and clipping handling */
};
-
+
class vector_device : public device_t,
- public device_video_interface
+ public device_video_interface
{
-
public:
// construction/destruction
vector_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
vector_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
-
+
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void clear_list();
-
+
void add_point(int x, int y, rgb_t color, int intensity);
void add_clip(int minx, int miny, int maxx, int maxy);
-
+
void set_flicker(float m_flicker_correction);
float get_flicker();
@@ -53,7 +52,7 @@ public:
// device-level overrides
virtual void device_start();
-
+
private:
static int m_flicker; /* beam flicker value */
static float m_flicker_correction;
diff --git a/src/emu/webengine.c b/src/emu/webengine.c
index f5e37f9353f..2b83dcbb221 100644
--- a/src/emu/webengine.c
+++ b/src/emu/webengine.c
@@ -49,15 +49,15 @@ static void get_qsvar(const struct mg_request_info *request_info,
}
char* websanitize_statefilename ( char* unsanitized )
-{
- // It's important that we remove any dangerous characters from any filename
+{
+ // It's important that we remove any dangerous characters from any filename
// we receive from a web client. This can be a serious security hole.
// As MAME/MESS policy is lowercase filenames, also lowercase it.
-
+
char* sanitized = new char[64];
int insertpoint =0;
char charcompare;
-
+
while (*unsanitized != 0)
{
charcompare = *unsanitized;
@@ -78,7 +78,7 @@ char* websanitize_statefilename ( char* unsanitized )
sanitized[insertpoint] = '\0'; // Make sure we're null-terminated.
}
unsanitized++;
- }
+ }
return (sanitized);
}
@@ -92,8 +92,8 @@ int web_engine::json_game_handler(struct mg_connection *conn)
data["parent"] = m_machine->system().parent;
data["source_file"] = m_machine->system().source_file;
data["flags"] = m_machine->system().flags;
- data["ispaused"] = m_machine->paused();
-
+ data["ispaused"] = m_machine->paused();
+
Json::FastWriter writer;
const char *json = writer.write(data).c_str();
// Send HTTP reply to the client
@@ -199,7 +199,7 @@ int web_engine::begin_request_handler(struct mg_connection *conn)
else if(!strcmp(cmd_name,"savestate"))
{
char cmd_val[64];
- get_qsvar(request_info, "val", cmd_val, sizeof(cmd_val));
+ get_qsvar(request_info, "val", cmd_val, sizeof(cmd_val));
char *filename = websanitize_statefilename(cmd_val);
m_machine->schedule_save(filename);
}
diff --git a/src/lib/softfloat/fsincos.c b/src/lib/softfloat/fsincos.c
index 889bb566793..1adb689e32b 100755
--- a/src/lib/softfloat/fsincos.c
+++ b/src/lib/softfloat/fsincos.c
@@ -565,10 +565,10 @@ float128 OddPoly(float128 x, float128 *arr, unsigned n)
}
/*----------------------------------------------------------------------------
-| Scales extended double-precision floating-point value in operand `a' by
-| value `b'. The function truncates the value in the second operand 'b' to
+| Scales extended double-precision floating-point value in operand `a' by
+| value `b'. The function truncates the value in the second operand 'b' to
| an integral value and adds that value to the exponent of the operand 'a'.
-| The operation performed according to the IEC/IEEE Standard for Binary
+| The operation performed according to the IEC/IEEE Standard for Binary
| Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
@@ -576,70 +576,70 @@ extern floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b );
floatx80 floatx80_scale(floatx80 a, floatx80 b)
{
- sbits32 aExp, bExp;
- bits64 aSig, bSig;
+ sbits32 aExp, bExp;
+ bits64 aSig, bSig;
- // handle unsupported extended double-precision floating encodings
+ // handle unsupported extended double-precision floating encodings
/* if (floatx80_is_unsupported(a) || floatx80_is_unsupported(b))
{
float_raise(float_flag_invalid);
return floatx80_default_nan;
}*/
- aSig = extractFloatx80Frac(a);
- aExp = extractFloatx80Exp(a);
- int aSign = extractFloatx80Sign(a);
- bSig = extractFloatx80Frac(b);
- bExp = extractFloatx80Exp(b);
- int bSign = extractFloatx80Sign(b);
-
- if (aExp == 0x7FFF) {
- if ((bits64) (aSig<<1) || ((bExp == 0x7FFF) && (bits64) (bSig<<1)))
- {
- return propagateFloatx80NaN(a, b);
- }
- if ((bExp == 0x7FFF) && bSign) {
- float_raise(float_flag_invalid);
- return floatx80_default_nan;
- }
- if (bSig && (bExp == 0)) float_raise(float_flag_denormal);
- return a;
- }
- if (bExp == 0x7FFF) {
- if ((bits64) (bSig<<1)) return propagateFloatx80NaN(a, b);
- if ((aExp | aSig) == 0) {
- if (! bSign) {
- float_raise(float_flag_invalid);
- return floatx80_default_nan;
- }
- return a;
- }
- if (aSig && (aExp == 0)) float_raise(float_flag_denormal);
- if (bSign) return packFloatx80(aSign, 0, 0);
- return packFloatx80(aSign, 0x7FFF, U64(0x8000000000000000));
- }
- if (aExp == 0) {
- if (aSig == 0) return a;
- float_raise(float_flag_denormal);
- normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
- }
- if (bExp == 0) {
- if (bSig == 0) return a;
- float_raise(float_flag_denormal);
- normalizeFloatx80Subnormal(bSig, &bExp, &bSig);
- }
-
- if (bExp > 0x400E) {
- /* generate appropriate overflow/underflow */
- return roundAndPackFloatx80(80, aSign,
- bSign ? -0x3FFF : 0x7FFF, aSig, 0);
- }
- if (bExp < 0x3FFF) return a;
-
- int shiftCount = 0x403E - bExp;
- bSig >>= shiftCount;
- sbits32 scale = bSig;
- if (bSign) scale = -scale; /* -32768..32767 */
- return
- roundAndPackFloatx80(80, aSign, aExp+scale, aSig, 0);
+ aSig = extractFloatx80Frac(a);
+ aExp = extractFloatx80Exp(a);
+ int aSign = extractFloatx80Sign(a);
+ bSig = extractFloatx80Frac(b);
+ bExp = extractFloatx80Exp(b);
+ int bSign = extractFloatx80Sign(b);
+
+ if (aExp == 0x7FFF) {
+ if ((bits64) (aSig<<1) || ((bExp == 0x7FFF) && (bits64) (bSig<<1)))
+ {
+ return propagateFloatx80NaN(a, b);
+ }
+ if ((bExp == 0x7FFF) && bSign) {
+ float_raise(float_flag_invalid);
+ return floatx80_default_nan;
+ }
+ if (bSig && (bExp == 0)) float_raise(float_flag_denormal);
+ return a;
+ }
+ if (bExp == 0x7FFF) {
+ if ((bits64) (bSig<<1)) return propagateFloatx80NaN(a, b);
+ if ((aExp | aSig) == 0) {
+ if (! bSign) {
+ float_raise(float_flag_invalid);
+ return floatx80_default_nan;
+ }
+ return a;
+ }
+ if (aSig && (aExp == 0)) float_raise(float_flag_denormal);
+ if (bSign) return packFloatx80(aSign, 0, 0);
+ return packFloatx80(aSign, 0x7FFF, U64(0x8000000000000000));
+ }
+ if (aExp == 0) {
+ if (aSig == 0) return a;
+ float_raise(float_flag_denormal);
+ normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
+ }
+ if (bExp == 0) {
+ if (bSig == 0) return a;
+ float_raise(float_flag_denormal);
+ normalizeFloatx80Subnormal(bSig, &bExp, &bSig);
+ }
+
+ if (bExp > 0x400E) {
+ /* generate appropriate overflow/underflow */
+ return roundAndPackFloatx80(80, aSign,
+ bSign ? -0x3FFF : 0x7FFF, aSig, 0);
+ }
+ if (bExp < 0x3FFF) return a;
+
+ int shiftCount = 0x403E - bExp;
+ bSig >>= shiftCount;
+ sbits32 scale = bSig;
+ if (bSign) scale = -scale; /* -32768..32767 */
+ return
+ roundAndPackFloatx80(80, aSign, aExp+scale, aSig, 0);
}
diff --git a/src/lib/softfloat/softfloat.h b/src/lib/softfloat/softfloat.h
index 77abbdb2984..6f4389b10bc 100644
--- a/src/lib/softfloat/softfloat.h
+++ b/src/lib/softfloat/softfloat.h
@@ -89,8 +89,8 @@ enum {
*----------------------------------------------------------------------------*/
extern int8 float_exception_flags;
enum {
- float_flag_invalid = 0x01, float_flag_denormal = 0x02, float_flag_divbyzero = 0x04, float_flag_overflow = 0x08,
- float_flag_underflow = 0x10, float_flag_inexact = 0x20
+ float_flag_invalid = 0x01, float_flag_denormal = 0x02, float_flag_divbyzero = 0x04, float_flag_overflow = 0x08,
+ float_flag_underflow = 0x10, float_flag_inexact = 0x20
};
/*----------------------------------------------------------------------------
diff --git a/src/mame/audio/n8080.c b/src/mame/audio/n8080.c
index 4f0b0db1512..0cdc4db1631 100644
--- a/src/mame/audio/n8080.c
+++ b/src/mame/audio/n8080.c
@@ -569,7 +569,7 @@ MACHINE_CONFIG_FRAGMENT( spacefev_sound )
MCFG_SOUND_START_OVERRIDE(n8080_state,spacefev)
MCFG_SOUND_RESET_OVERRIDE(n8080_state,spacefev)
-
+
/* basic machine hardware */
MCFG_CPU_ADD("audiocpu", I8035, 6000000)
MCFG_CPU_PROGRAM_MAP(n8080_sound_cpu_map)
@@ -590,10 +590,10 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_FRAGMENT( sheriff_sound )
-
+
MCFG_SOUND_START_OVERRIDE(n8080_state,sheriff)
MCFG_SOUND_RESET_OVERRIDE(n8080_state,sheriff)
-
+
/* basic machine hardware */
MCFG_CPU_ADD("audiocpu", I8035, 6000000)
MCFG_CPU_PROGRAM_MAP(n8080_sound_cpu_map)
@@ -615,7 +615,7 @@ MACHINE_CONFIG_FRAGMENT( helifire_sound )
MCFG_SOUND_START_OVERRIDE(n8080_state,helifire)
MCFG_SOUND_RESET_OVERRIDE(n8080_state,helifire)
-
+
/* basic machine hardware */
MCFG_CPU_ADD("audiocpu", I8035, 6000000)
MCFG_CPU_PROGRAM_MAP(n8080_sound_cpu_map)
diff --git a/src/mame/audio/pleiads.c b/src/mame/audio/pleiads.c
index 6b312d48d84..5190612cc56 100644
--- a/src/mame/audio/pleiads.c
+++ b/src/mame/audio/pleiads.c
@@ -57,8 +57,8 @@ void pleiads_sound_device::device_config_complete()
void pleiads_sound_device::device_start()
{
/* The real values are _unknown_!
- * I took the ones from Naughty Boy / Pop Flamer
- */
+ * I took the ones from Naughty Boy / Pop Flamer
+ */
/* charge 10u?? (C??) through 330K?? (R??) -> 3.3s */
m_pa5.charge_time = 3.3;
@@ -669,7 +669,7 @@ void pleiads_sound_device::common_start()
}
m_channel = machine().sound().stream_alloc(*this, 0, 1, machine().sample_rate(), this);
-
+
save_item(NAME(m_sound_latch_a));
save_item(NAME(m_sound_latch_b));
save_item(NAME(m_sound_latch_c));
diff --git a/src/mame/audio/pleiads.h b/src/mame/audio/pleiads.h
index 7e90702aa1b..4fc9b75bdf4 100644
--- a/src/mame/audio/pleiads.h
+++ b/src/mame/audio/pleiads.h
@@ -6,7 +6,7 @@ struct pl_t_state
counter(0),
output(0),
max_freq(0) {}
-
+
int counter;
int output;
int max_freq;
@@ -18,8 +18,8 @@ struct pl_c_state
counter(0),
level(0),
charge_time(0),
- discharge_time(0) {}
-
+ discharge_time(0) {}
+
int counter;
int level;
double charge_time;
@@ -32,7 +32,7 @@ struct pl_n_state
counter(0),
polyoffs(0),
freq(0) {}
-
+
int counter;
int polyoffs;
int freq;
@@ -49,7 +49,7 @@ public:
DECLARE_WRITE8_MEMBER( control_a_w );
DECLARE_WRITE8_MEMBER( control_b_w );
DECLARE_WRITE8_MEMBER( control_c_w );
-
+
protected:
// device-level overrides
virtual void device_config_complete();
@@ -57,7 +57,7 @@ protected:
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
-
+
void common_start();
inline int tone1(int samplerate);
inline int update_pb4(int samplerate);
@@ -68,7 +68,7 @@ protected:
inline int tone4(int samplerate);
inline int update_c_pa6(int samplerate);
inline int noise(int samplerate);
-
+
// internal state
tms36xx_device *m_tms;
sound_stream *m_channel;
diff --git a/src/mame/audio/s11c_bg.c b/src/mame/audio/s11c_bg.c
index e46fb5ea5ab..6099283c97f 100644
--- a/src/mame/audio/s11c_bg.c
+++ b/src/mame/audio/s11c_bg.c
@@ -12,12 +12,12 @@ const device_type S11C_BG = &device_creator<s11c_bg_device>;
s11c_bg_device::s11c_bg_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig,S11C_BG,"Williams System 11C background music",tag,owner,clock, "s11c_bg", __FILE__),
- m_cpu(*this,"bgcpu"),
- m_ym2151(*this,"ym2151"),
- m_hc55516(*this,"hc55516_bg"),
- m_dac1(*this,"dac1"),
- m_pia40(*this,"pia40"),
- m_cpubank(*this,"bgbank")
+ m_cpu(*this,"bgcpu"),
+ m_ym2151(*this,"ym2151"),
+ m_hc55516(*this,"hc55516_bg"),
+ m_dac1(*this,"dac1"),
+ m_pia40(*this,"pia40"),
+ m_cpubank(*this,"bgbank")
{
}
@@ -54,12 +54,12 @@ WRITE8_MEMBER( s11c_bg_device::pia40_pa_w )
WRITE_LINE_MEMBER( s11c_bg_device::pia40_cb2_w)
{
-// m_pia34->cb1_w(state); // To Widget MCB1 through CPU Data interface
+// m_pia34->cb1_w(state); // To Widget MCB1 through CPU Data interface
}
WRITE8_MEMBER( s11c_bg_device::pia40_pb_w )
{
-// m_pia34->portb_w(data);
+// m_pia34->portb_w(data);
}
WRITE_LINE_MEMBER( s11c_bg_device::pia40_ca2_w)
diff --git a/src/mame/audio/segag80r.c b/src/mame/audio/segag80r.c
index 49bd46c0c0a..b48a7f12732 100644
--- a/src/mame/audio/segag80r.c
+++ b/src/mame/audio/segag80r.c
@@ -55,7 +55,7 @@ void sega005_sound_device::device_config_complete()
void sega005_sound_device::device_start()
{
segag80r_state *state = machine().driver_data<segag80r_state>();
-
+
/* create the stream */
m_sega005_stream = machine().sound().stream_alloc(*this, 0, 1, SEGA005_COUNTER_FREQ, this);
@@ -454,7 +454,7 @@ MACHINE_CONFIG_FRAGMENT( 005_sound_board )
MCFG_I8255A_ADD( "ppi8255", ppi8255_005_intf )
/* sound hardware */
-
+
MCFG_SAMPLES_ADD("samples", sega005_samples_interface)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
@@ -617,7 +617,7 @@ static const samples_interface spaceod_samples_interface =
MACHINE_CONFIG_FRAGMENT( spaceod_sound_board )
/* sound hardware */
-
+
MCFG_SAMPLES_ADD("samples", spaceod_samples_interface)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MACHINE_CONFIG_END
@@ -764,7 +764,7 @@ MACHINE_CONFIG_FRAGMENT( monsterb_sound_board )
MCFG_I8243_ADD("audio_8243", NOOP, WRITE8(segag80r_state,n7751_rom_control_w))
/* sound hardware */
-
+
MCFG_SAMPLES_ADD("samples", monsterb_samples_interface)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
diff --git a/src/mame/audio/segasnd.c b/src/mame/audio/segasnd.c
index 419b32e404d..15d58671a44 100644
--- a/src/mame/audio/segasnd.c
+++ b/src/mame/audio/segasnd.c
@@ -97,7 +97,7 @@ void speech_sound_device::device_config_complete()
void speech_sound_device::device_start()
{
m_speech = machine().root_device().memregion("speech")->base();
-
+
save_item(NAME(m_latch));
save_item(NAME(m_t0));
save_item(NAME(m_p2));
@@ -155,7 +155,7 @@ WRITE8_MEMBER( speech_sound_device::p2_w )
void speech_sound_device::drq_w(device_t *device, int level)
{
speech_sound_device *speech = device->machine().device<speech_sound_device>("segaspeech");
-
+
speech->m_drq = (level == ASSERT_LINE);
}
@@ -220,9 +220,9 @@ static ADDRESS_MAP_START( speech_portmap, AS_IO, 8, driver_device )
AM_RANGE(0x00, 0xff) AM_DEVREAD("segaspeech", speech_sound_device, rom_r)
AM_RANGE(0x00, 0xff) AM_DEVWRITE("speech", sp0250_device, write)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVREADWRITE("segaspeech", speech_sound_device, p1_r, p1_w)
- AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE("segaspeech", speech_sound_device, p2_w)
- AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVREAD("segaspeech", speech_sound_device, t0_r)
- AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_DEVREAD("segaspeech", speech_sound_device, t1_r)
+ AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE("segaspeech", speech_sound_device, p2_w)
+ AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVREAD("segaspeech", speech_sound_device, t0_r)
+ AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_DEVREAD("segaspeech", speech_sound_device, t1_r)
ADDRESS_MAP_END
@@ -286,7 +286,7 @@ usb_sound_device::usb_sound_device(const machine_config &mconfig, device_type ty
m_noise_subcount(0)
{
}
-
+
usb_sound_device::usb_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SEGAUSB, "Sega Universal Sound Board", tag, owner, clock, "segausb", __FILE__),
device_sound_interface(mconfig, *this),
@@ -310,14 +310,13 @@ void usb_sound_device::device_config_complete()
void usb_sound_device::device_start()
{
-
filter_state temp;
int tchan, tgroup;
/* find the CPU we are associated with */
m_maincpu = machine().device("maincpu");
assert(m_maincpu != NULL);
-
+
/* allocate RAM */
m_program_ram = (UINT8 *)memshare("pgmram")->ptr();
m_work_ram = auto_alloc_array(machine(), UINT8, 0x400);
@@ -918,7 +917,7 @@ MACHINE_CONFIG_END
machine_config_constructor usb_sound_device::device_mconfig_additions() const
{
- return MACHINE_CONFIG_NAME( segausb );
+ return MACHINE_CONFIG_NAME( segausb );
}
const device_type SEGAUSBROM = &device_creator<usb_rom_sound_device>;
@@ -927,7 +926,7 @@ usb_rom_sound_device::usb_rom_sound_device(const machine_config &mconfig, const
: usb_sound_device(mconfig, SEGAUSBROM, "Sega Universal Sound Board with ROM", tag, owner, clock, "segausbrom", __FILE__)
{
}
-
+
static ADDRESS_MAP_START( usb_map_rom, AS_PROGRAM, 8, usb_sound_device )
AM_RANGE(0x0000, 0x0fff) AM_ROM AM_REGION(":usbcpu", 0)
ADDRESS_MAP_END
@@ -941,8 +940,8 @@ MACHINE_CONFIG_FRAGMENT( segausb_rom )
MCFG_TIMER_DRIVER_ADD_PERIODIC("usb_timer", usb_sound_device, increment_t1_clock_timer_cb, attotime::from_hz(USB_2MHZ_CLOCK / 256))
MACHINE_CONFIG_END
-
+
machine_config_constructor usb_rom_sound_device::device_mconfig_additions() const
{
- return MACHINE_CONFIG_NAME( segausb_rom );
+ return MACHINE_CONFIG_NAME( segausb_rom );
}
diff --git a/src/mame/audio/segasnd.h b/src/mame/audio/segasnd.h
index f8868659d47..36dc36cec33 100644
--- a/src/mame/audio/segasnd.h
+++ b/src/mame/audio/segasnd.h
@@ -17,16 +17,16 @@ public:
DECLARE_WRITE8_MEMBER( data_w );
DECLARE_WRITE8_MEMBER( control_w );
-
+
DECLARE_READ8_MEMBER( t0_r );
DECLARE_READ8_MEMBER( t1_r );
DECLARE_READ8_MEMBER( p1_r );
DECLARE_READ8_MEMBER( rom_r );
DECLARE_WRITE8_MEMBER( p1_w );
DECLARE_WRITE8_MEMBER( p2_w );
-
+
static void drq_w(device_t *device, int level);
-
+
protected:
// device-level overrides
virtual void device_config_complete();
@@ -34,7 +34,7 @@ protected:
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
-
+
private:
// internal state
UINT8 m_drq;
@@ -58,7 +58,7 @@ struct filter_state
filter_state():
capval(0),
exponent(0) {}
-
+
double capval; /* current capacitor value */
double exponent; /* constant exponent */
};
@@ -78,7 +78,7 @@ struct timer8253_channel
subcount(0),
count(0),
remain(0) {}
-
+
UINT8 holding; /* holding until counts written? */
UINT8 latchmode; /* latching mode */
UINT8 latchtoggle; /* latching state */
@@ -102,7 +102,7 @@ struct timer8253
env[2] = 0;
config = 0;
}
-
+
timer8253_channel chan[3]; /* three channels' worth of information */
double env[3]; /* envelope value for each channel */
filter_state chan_filter[2]; /* filter states for the first two channels */
@@ -119,23 +119,23 @@ public:
usb_sound_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
usb_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~usb_sound_device() {}
- required_device<i8035_device> m_ourcpu; /* CPU index of the 8035 */
+ required_device<i8035_device> m_ourcpu; /* CPU index of the 8035 */
DECLARE_READ8_MEMBER( status_r );
DECLARE_WRITE8_MEMBER( data_w );
DECLARE_READ8_MEMBER( ram_r );
DECLARE_WRITE8_MEMBER( ram_w );
-
+
DECLARE_READ8_MEMBER( p1_r );
DECLARE_WRITE8_MEMBER( p1_w );
DECLARE_WRITE8_MEMBER( p2_w );
DECLARE_READ8_MEMBER( t1_r );
-
+
DECLARE_READ8_MEMBER( workram_r );
DECLARE_WRITE8_MEMBER( workram_w );
-
+
TIMER_DEVICE_CALLBACK_MEMBER( increment_t1_clock_timer_cb );
-
+
protected:
// device-level overrides
virtual machine_config_constructor device_mconfig_additions() const;
@@ -145,21 +145,21 @@ protected:
// sound stream update overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
-
+
private:
// internal state
- sound_stream *m_stream; /* output stream */
- device_t *m_maincpu;
- UINT8 m_in_latch; /* input latch */
- UINT8 m_out_latch; /* output latch */
- UINT8 m_last_p2_value; /* current P2 output value */
- UINT8 * m_program_ram; /* pointer to program RAM */
- UINT8 * m_work_ram; /* pointer to work RAM */
- UINT8 m_work_ram_bank; /* currently selected work RAM bank */
- UINT8 m_t1_clock; /* T1 clock value */
- UINT8 m_t1_clock_mask; /* T1 clock mask (configured via jumpers) */
- timer8253 m_timer_group[3]; /* 3 groups of timers */
- UINT8 m_timer_mode[3]; /* mode control for each group */
+ sound_stream *m_stream; /* output stream */
+ device_t *m_maincpu;
+ UINT8 m_in_latch; /* input latch */
+ UINT8 m_out_latch; /* output latch */
+ UINT8 m_last_p2_value; /* current P2 output value */
+ UINT8 * m_program_ram; /* pointer to program RAM */
+ UINT8 * m_work_ram; /* pointer to work RAM */
+ UINT8 m_work_ram_bank; /* currently selected work RAM bank */
+ UINT8 m_t1_clock; /* T1 clock value */
+ UINT8 m_t1_clock_mask; /* T1 clock mask (configured via jumpers) */
+ timer8253 m_timer_group[3]; /* 3 groups of timers */
+ UINT8 m_timer_mode[3]; /* mode control for each group */
UINT32 m_noise_shift;
UINT8 m_noise_state;
UINT8 m_noise_subcount;
@@ -167,7 +167,7 @@ private:
double m_gate_rc2_exp[2];
filter_state m_final_filter;
filter_state m_noise_filters[5];
-
+
TIMER_CALLBACK_MEMBER( delayed_usb_data_w );
void timer_w(int which, UINT8 offset, UINT8 data);
void env_w(int which, UINT8 offset, UINT8 data);
@@ -179,19 +179,19 @@ class usb_rom_sound_device : public usb_sound_device
{
public:
usb_rom_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- ~usb_rom_sound_device() {}
+ ~usb_rom_sound_device() {}
protected:
// device-level overrides
virtual machine_config_constructor device_mconfig_additions() const;
};
-
+
extern const device_type SEGAUSBROM;
-
+
#define MCFG_SEGAUSB_ADD(_tag) \
MCFG_SOUND_ADD(_tag, SEGAUSB, 0) \
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
-
+
#define MCFG_SEGAUSBROM_ADD(_tag) \
MCFG_SOUND_ADD(_tag, SEGAUSBROM, 0) \
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
diff --git a/src/mame/audio/wpcsnd.c b/src/mame/audio/wpcsnd.c
index 7da9a7d30db..a05afb14c01 100644
--- a/src/mame/audio/wpcsnd.c
+++ b/src/mame/audio/wpcsnd.c
@@ -13,13 +13,13 @@ const device_type WPCSND = &device_creator<wpcsnd_device>;
wpcsnd_device::wpcsnd_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig,WPCSND,"Williams WPC Sound",tag,owner,clock, "wpcsnd", __FILE__),
- m_cpu(*this,"bgcpu"),
- m_ym2151(*this,"ym2151"),
- m_hc55516(*this,"hc55516"),
- m_dac(*this,"dac"),
- m_cpubank(*this,"rombank"),
- m_fixedbank(*this,"fixed"),
- m_reply_cb(*this)
+ m_cpu(*this,"bgcpu"),
+ m_ym2151(*this,"ym2151"),
+ m_hc55516(*this,"hc55516"),
+ m_dac(*this,"dac"),
+ m_cpubank(*this,"rombank"),
+ m_fixedbank(*this,"fixed"),
+ m_reply_cb(*this)
{
}
@@ -164,6 +164,4 @@ WRITE8_MEMBER(wpcsnd_device::latch_w)
WRITE8_MEMBER(wpcsnd_device::volume_w)
{
-
}
-
diff --git a/src/mame/drivers/8080bw.c b/src/mame/drivers/8080bw.c
index 5c7e3a7e1ca..88f285f6915 100644
--- a/src/mame/drivers/8080bw.c
+++ b/src/mame/drivers/8080bw.c
@@ -7,7 +7,7 @@
Michael Strutts, Nicola Salmoria, Tormod Tjaberg, Mirko Buffoni
Lee Taylor, Valerio Verrando, Marco Cassili, Zsolt Vasvari, and others
- Much information about Space Invaders PCBs and other Taito and Midway
+ Much information about Space Invaders PCBs and other Taito and Midway
sets and hardware contributed by Andrew Welburn
@@ -78,10 +78,10 @@
for this set.
Does support flipscreen.
Does not have the color overlay circuitry nor places for it on the pcbs.
- (Later TVNxxxxx are actually rebadged CVNxxxxx, see below)
+ (Later TVNxxxxx are actually rebadged CVNxxxxx, see below)
Came from factory with one of the SV or TV romsets.
Capable of running TV, SV or CV romsets.
- This pcb set is probably the oldest one and was designed at Taito.
+ This pcb set is probably the oldest one and was designed at Taito.
* SVNxxxxx? (L-shaped pcbset) - B&W only, used on "Space Invaders" Upright
with 3-separate-sheets-of-gel 'strips' color overlay.
***TODO: this overlay might not be supported properly yet!
@@ -94,10 +94,10 @@
which had a similar board shape?
* CVNxxxxx (3 layer pcbset) - Color, used on "T.T Space Invaders Color"
cocktail with electronic color overlay.
- Does support flipscreen.
+ Does support flipscreen.
Note that later TVNxxxxx pcbsets are actually 'rebadged' CVNxxxxx
pcbsets with the color overlay circuitry unpopulated, and can be
- 'upgraded' to CVNxxxxx by adding a few components and proms.
+ 'upgraded' to CVNxxxxx by adding a few components and proms.
Came from factory with one of the CV romsets.
Capable of running TV, SV or CV romsets.
* PVNxxxxx (2&3 layer pcbsets) - Color, used on "T.T Space Invaders Part
@@ -113,7 +113,7 @@
SV0H, SV02, SV10, SV04, SV09, SV06 - sisv3 (rev 3) (Andy W calls this 'SV2')
SV0H, SV11, SV12, SV04, SV13, SV14 - sisv (rev 4, 5-digit scoring) (Andy W calls this 'SV3') (this set is likely newer than the TV0x sets)
TV01, TV02, TV03, TV04 - sitv1 (rev 1)
- TV0H, TV02, TV03, TV04 - sitv (rev 2 with bug fixes)
+ TV0H, TV02, TV03, TV04 - sitv (rev 2 with bug fixes)
CV03, CV04, CV05, CV06 w/proms - undumped (but may be the same as one of the sisv sets with the roms combined to 2716 size)
CV17, CV18, CV19, CV20 w/proms - sicv
UV1, UV2, UV3, UV4, UV5, UV6, UV7, UV8, UV9, UV10 w/proms - undumped (probably same as pvxx set just split differently)
@@ -4016,7 +4016,7 @@ ROM_START( cosmicmo ) /* Roms stamped with "II", denoting version II */
ROM_LOAD( "ii-7.h7", 0x4800, 0x0400, CRC(6a13b15b) SHA1(dc03a6c3e938cfd08d16bd1660899f951ba72ea2) )
/* There is no colour circuits or tracking on the game pcb, its a black and white composite video signal only */
- /* The PCB is etched with Universal 7814A-3 */
+ /* The PCB is etched with Universal 7814A-3 */
ROM_END
ROM_START( cosmicm2 )
diff --git a/src/mame/drivers/cchasm.c b/src/mame/drivers/cchasm.c
index 9e6f0f96355..75d8584aadc 100644
--- a/src/mame/drivers/cchasm.c
+++ b/src/mame/drivers/cchasm.c
@@ -175,7 +175,7 @@ static MACHINE_CONFIG_START( cchasm, cchasm_state )
/* sound hardware */
-
+
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("ay1", AY8910, 1818182)
diff --git a/src/mame/drivers/cps1.c b/src/mame/drivers/cps1.c
index 87132f29ab7..ef5b2f530b6 100644
--- a/src/mame/drivers/cps1.c
+++ b/src/mame/drivers/cps1.c
@@ -4842,14 +4842,14 @@ ROM_END
/* B-Board 89625B-1 */
ROM_START( ffightj3 )
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
- ROM_LOAD16_BYTE( "ff_36.12f", 0x00000, 0x20000, CRC(ed988977) SHA1(c718e989206bd2b68832c8fcb5667397d500ebac) ) // == ffu_30.11f
- ROM_LOAD16_BYTE( "ffj_42(__ffightj3).12h", 0x00001, 0x20000, CRC(07bf1c21) SHA1(f21a939fd92607c7f54816dedbcb3c5818cf4183) ) // == ffu_35.11h
- ROM_LOAD16_BYTE( "ff_37.13f", 0x40000, 0x20000, CRC(dba5a476) SHA1(2f0176dd050f9630b914f1c1ca5d96215bcf567f) ) // == ffu_31.12f
+ ROM_LOAD16_BYTE( "ff_36.12f", 0x00000, 0x20000, CRC(ed988977) SHA1(c718e989206bd2b68832c8fcb5667397d500ebac) ) // == ffu_30.11f
+ ROM_LOAD16_BYTE( "ffj_42(__ffightj3).12h", 0x00001, 0x20000, CRC(07bf1c21) SHA1(f21a939fd92607c7f54816dedbcb3c5818cf4183) ) // == ffu_35.11h
+ ROM_LOAD16_BYTE( "ff_37.13f", 0x40000, 0x20000, CRC(dba5a476) SHA1(2f0176dd050f9630b914f1c1ca5d96215bcf567f) ) // == ffu_31.12f
ROM_LOAD16_BYTE( "ffj_43(__ffightj3).13h", 0x40001, 0x20000, CRC(fbeca028) SHA1(85eeed6a25b401d73d12896ca1e2bf7402c921ee) )
- ROM_LOAD16_BYTE( "ff_34.10f", 0x80000, 0x20000, CRC(0c8dc3fc) SHA1(edcce3efd9cdd131ef0c96df15a68722d5c3498e) ) // == ff-32m.8h
- ROM_LOAD16_BYTE( "ffj_40.10h", 0x80001, 0x20000, CRC(8075bab9) SHA1(f9c7405133f6fc5557c90e60e8ccc459e4f6fd7d) ) // == ff-32m.8h
- ROM_LOAD16_BYTE( "ff_35.11f", 0xc0000, 0x20000, CRC(4a934121) SHA1(3982c261582755a0eac340d6d7ed96e6c263c8b6) ) // == ff-32m.8h
- ROM_LOAD16_BYTE( "ffj_41.11h", 0xc0001, 0x20000, CRC(2af68154) SHA1(7d549cb38650b4b79c68ad6d0dfcefdd62be4e99) ) // == ff-32m.8h
+ ROM_LOAD16_BYTE( "ff_34.10f", 0x80000, 0x20000, CRC(0c8dc3fc) SHA1(edcce3efd9cdd131ef0c96df15a68722d5c3498e) ) // == ff-32m.8h
+ ROM_LOAD16_BYTE( "ffj_40.10h", 0x80001, 0x20000, CRC(8075bab9) SHA1(f9c7405133f6fc5557c90e60e8ccc459e4f6fd7d) ) // == ff-32m.8h
+ ROM_LOAD16_BYTE( "ff_35.11f", 0xc0000, 0x20000, CRC(4a934121) SHA1(3982c261582755a0eac340d6d7ed96e6c263c8b6) ) // == ff-32m.8h
+ ROM_LOAD16_BYTE( "ffj_41.11h", 0xc0001, 0x20000, CRC(2af68154) SHA1(7d549cb38650b4b79c68ad6d0dfcefdd62be4e99) ) // == ff-32m.8h
ROM_REGION( 0x200000, "gfx", 0 )
ROMX_LOAD( "ff_09.4b", 0x000000, 0x20000, CRC(5b116d0d) SHA1(a24e829fdfa043bd27b508d7cc0788ad80fd180e) , ROM_SKIP(7) )
@@ -4886,7 +4886,7 @@ ROM_START( ffightj3 )
ROM_REGION( 0x0200, "bboardplds", 0 )
ROM_LOAD( "s222b.1a", 0x0000, 0x0117, NO_DUMP )
- ROM_LOAD( "lwio.12e", 0x0000, 0x0117, CRC(ad52b90c) SHA1(f0fd6aeea515ee449320fe15684e6b3ab7f97bf4) ) // pal verification required
+ ROM_LOAD( "lwio.12e", 0x0000, 0x0117, CRC(ad52b90c) SHA1(f0fd6aeea515ee449320fe15684e6b3ab7f97bf4) ) // pal verification required
ROM_END
/* B-Board 91634B-2 */
@@ -5864,7 +5864,7 @@ ROM_END
ROM_START( sf2ed )
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "sf2e_30d.11e", 0x00000, 0x20000, CRC(4bb2657c) SHA1(b2d077296b77be7db371f953b7fc446a67d8a9d6) )
- ROM_LOAD16_BYTE( "sf2e_37d.11f", 0x00001, 0x20000, CRC(102f4561) SHA1(2fc77cd3b2ecf8fadc4f8614cb200cf2cba4c616) ) //only rom different from sf2ud
+ ROM_LOAD16_BYTE( "sf2e_37d.11f", 0x00001, 0x20000, CRC(102f4561) SHA1(2fc77cd3b2ecf8fadc4f8614cb200cf2cba4c616) ) //only rom different from sf2ud
ROM_LOAD16_BYTE( "sf2e_31d.12e", 0x40000, 0x20000, CRC(d57b67d7) SHA1(43d0b47c9fada8d9b445caa4b96ac8493061aa8b) )
ROM_LOAD16_BYTE( "sf2e_38d.12f", 0x40001, 0x20000, CRC(9c8916ef) SHA1(a4629356a816454bcc1d7b41e70e147d4769a682) )
ROM_LOAD16_BYTE( "sf2e_28d.9e", 0x80000, 0x20000, CRC(175819d1) SHA1(c98b6b7af4e57735dbfb3d1e61ba1bfb9f145d33) )
diff --git a/src/mame/drivers/cps2.c b/src/mame/drivers/cps2.c
index abcffe86cd3..658d52b0807 100644
--- a/src/mame/drivers/cps2.c
+++ b/src/mame/drivers/cps2.c
@@ -8179,8 +8179,8 @@ ROM_END
ROM_START( xmvsfar1 )
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
- ROM_LOAD16_WORD_SWAP( "xvsa.03", 0x000000, 0x80000, CRC(520054df) SHA1(98fd30aeb4cc9120607434f258a1c00204d75d63) ) /* Missing revision letter */
- ROM_LOAD16_WORD_SWAP( "xvsa.04", 0x080000, 0x80000, CRC(13086e55) SHA1(0d9a4b2a4278a98423155702c66df3f2e1e8ef56) ) /* Missing revision letter */
+ ROM_LOAD16_WORD_SWAP( "xvsa.03", 0x000000, 0x80000, CRC(520054df) SHA1(98fd30aeb4cc9120607434f258a1c00204d75d63) ) /* Missing revision letter */
+ ROM_LOAD16_WORD_SWAP( "xvsa.04", 0x080000, 0x80000, CRC(13086e55) SHA1(0d9a4b2a4278a98423155702c66df3f2e1e8ef56) ) /* Missing revision letter */
ROM_LOAD16_WORD_SWAP( "xvs.05a", 0x100000, 0x80000, CRC(7db6025d) SHA1(2d74f48f83f45359bfaca28ab686625766af12ee) )
ROM_LOAD16_WORD_SWAP( "xvs.06a", 0x180000, 0x80000, CRC(e8e2c75c) SHA1(929408cb5d98e95cec75ea58e4701b0cbdbcd016) )
ROM_LOAD16_WORD_SWAP( "xvs.07", 0x200000, 0x80000, CRC(08f0abed) SHA1(ef16c376232dba63b0b9bc3aa0640f9001ccb68a) )
diff --git a/src/mame/drivers/cps3.c b/src/mame/drivers/cps3.c
index f6c01e95919..835d6acf1bf 100644
--- a/src/mame/drivers/cps3.c
+++ b/src/mame/drivers/cps3.c
@@ -450,9 +450,9 @@ hardware modification to the security cart.....
3. Power on the PCB and using the built-in cart flashROM menu re-program the SIMMs for your chosen game using the CD
from set 'cps3boot' in MAME.
4. That is all. Enjoy your working PCB.
-
-*/
-
+
+*/
+
#include "emu.h"
#include "cdrom.h"
#include "cpu/sh2/sh2.h"
@@ -3853,5 +3853,3 @@ GAME( 1999, jojobaner1,jojoba, jojoba, cps3_jojo, cps3_state, jojoba, ROT0
GAME( 1999, cps3boot, 0, sfiii3, cps3_jojo, cps3_state, cps3boot, ROT0, "bootleg", "CPS3 Multi-game bootleg for HD6417095 type SH2 (New Generation, 3rd Strike, JoJo's Venture, JoJo's Bizarre Adventure, Red Earth)", GAME_IMPERFECT_GRAPHICS )
// this does not play Red Earth or the 2 Jojo games. New Generation and 3rd Strike have been heavily modified to work with the separate code/data encryption a dead cart / 2nd Impact cart has. Selecting the other games will give an 'invalid CD' message.
GAME( 1999, cps3boota, cps3boot, sfiii3, cps3_jojo, cps3_state, sfiii2, ROT0, "bootleg", "CPS3 Multi-game bootleg for dead security cart (New Generation, 2nd Impact, 3rd Strike)", GAME_IMPERFECT_GRAPHICS )
-
-
diff --git a/src/mame/drivers/dkong.c b/src/mame/drivers/dkong.c
index 151118f3b8e..be1f3c34791 100644
--- a/src/mame/drivers/dkong.c
+++ b/src/mame/drivers/dkong.c
@@ -415,9 +415,9 @@ MACHINE_START_MEMBER(dkong_state,dkong2b)
{
dkong_init_device_driver_data();
m_hardware_type = HARDWARE_TKG04;
-
+
m_snd_rom = memregion("soundcpu")->base();
-
+
save_item(NAME(m_decrypt_counter));
save_item(NAME(m_dma_latch));
}
diff --git a/src/mame/drivers/gunpey.c b/src/mame/drivers/gunpey.c
index b5f1994ed70..6529b2fc5bc 100644
--- a/src/mame/drivers/gunpey.c
+++ b/src/mame/drivers/gunpey.c
@@ -4,9 +4,9 @@
Gunpey (c) 2000 Banpresto
- TODO:
- - compression scheme used by the Axell video chip, game is playable but several gfxs are
- still broken.
+ TODO:
+ - compression scheme used by the Axell video chip, game is playable but several gfxs are
+ still broken.
=============================================================================================
ASM code study:
diff --git a/src/mame/drivers/hideseek.c b/src/mame/drivers/hideseek.c
index a2c81bbbf6a..86b4ed2404e 100644
--- a/src/mame/drivers/hideseek.c
+++ b/src/mame/drivers/hideseek.c
@@ -49,7 +49,6 @@ public:
void hideseek_state::video_start()
{
-
}
@@ -66,7 +65,7 @@ static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 32, hideseek_state )
AM_RANGE(0x01000000, 0x01ffffff) AM_RAM // DRAM
AM_RANGE(0xffff8000, 0xffff87ff) AM_RAM // HD64F7045F28 i/os
AM_RANGE(0xfffff000, 0xffffffff) AM_RAM // on-chip RAM
-// AM_RANGE(0x06000000, 0x07ffffff) AM_ROM AM_REGION("blit_data", 0)
+// AM_RANGE(0x06000000, 0x07ffffff) AM_ROM AM_REGION("blit_data", 0)
ADDRESS_MAP_END
@@ -98,7 +97,7 @@ static MACHINE_CONFIG_START( hideseek, hideseek_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", SH2, 7372800 * 4 )
MCFG_CPU_PROGRAM_MAP(mem_map)
-// MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", hideseek_state, hideseek_scanline, "screen", 0, 1)
+// MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", hideseek_state, hideseek_scanline, "screen", 0, 1)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@@ -148,7 +147,6 @@ ROM_END
DRIVER_INIT_MEMBER(hideseek_state,hideseek)
{
-
}
diff --git a/src/mame/drivers/igs017.c b/src/mame/drivers/igs017.c
index 3fb6ee9f213..3f5c00c3bb7 100644
--- a/src/mame/drivers/igs017.c
+++ b/src/mame/drivers/igs017.c
@@ -75,7 +75,7 @@ public:
optional_device<igs025_device> m_igs025; // Mj Shuang Long Qiang Zhu 2
optional_device<igs022_device> m_igs022; // Mj Shuang Long Qiang Zhu 2
- void igs025_to_igs022_callback( void );
+ void igs025_to_igs022_callback( void );
int m_toggle;
int m_debug_addr;
@@ -1098,11 +1098,11 @@ DRIVER_INIT_MEMBER(igs017_state,lhzb2)
lhzb2_patch_rom();
// install and configure protection device(s)
-// m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xda5610, 0xda5613, read16_delegate(FUNC(igs025_device::killbld_igs025_prot_r), (igs025_device*)m_igs025), write16_delegate(FUNC(igs025_device::killbld_igs025_prot_w), (igs025_device*)m_igs025));
-// m_igs022->m_sharedprotram = m_sharedprotram;
-// m_igs025->m_kb_source_data = dw3_source_data;
-// m_igs025->m_kb_source_data_offset = 0;
-// m_igs025->m_kb_game_id = 0x00060000;
+// m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xda5610, 0xda5613, read16_delegate(FUNC(igs025_device::killbld_igs025_prot_r), (igs025_device*)m_igs025), write16_delegate(FUNC(igs025_device::killbld_igs025_prot_w), (igs025_device*)m_igs025));
+// m_igs022->m_sharedprotram = m_sharedprotram;
+// m_igs025->m_kb_source_data = dw3_source_data;
+// m_igs025->m_kb_source_data_offset = 0;
+// m_igs025->m_kb_game_id = 0x00060000;
}
@@ -1282,11 +1282,11 @@ DRIVER_INIT_MEMBER(igs017_state,slqz2)
slqz2_patch_rom();
// install and configure protection device(s)
-// m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xda5610, 0xda5613, read16_delegate(FUNC(igs025_device::killbld_igs025_prot_r), (igs025_device*)m_igs025), write16_delegate(FUNC(igs025_device::killbld_igs025_prot_w), (igs025_device*)m_igs025));
-// m_igs022->m_sharedprotram = m_sharedprotram;
-// m_igs025->m_kb_source_data = dw3_source_data;
-// m_igs025->m_kb_source_data_offset = 0;
-// m_igs025->m_kb_game_id = 0x00060000;
+// m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xda5610, 0xda5613, read16_delegate(FUNC(igs025_device::killbld_igs025_prot_r), (igs025_device*)m_igs025), write16_delegate(FUNC(igs025_device::killbld_igs025_prot_w), (igs025_device*)m_igs025));
+// m_igs022->m_sharedprotram = m_sharedprotram;
+// m_igs025->m_kb_source_data = dw3_source_data;
+// m_igs025->m_kb_source_data_offset = 0;
+// m_igs025->m_kb_game_id = 0x00060000;
}
// spkrform
diff --git a/src/mame/drivers/jaguar.c b/src/mame/drivers/jaguar.c
index bdcfd35f285..e3c2484aa9b 100644
--- a/src/mame/drivers/jaguar.c
+++ b/src/mame/drivers/jaguar.c
@@ -1114,40 +1114,40 @@ TODO: this needs to be device-ized, of course ...
---- ---- ---- ---x set to enable irq
[0x04]: DSA control register
[0x0a]: DSA TX/RX data (sends commands with this)
- 0x01 Play Title (?)
- 0x02 Stop
- 0x03 Read TOC
- 0x04 Pause
- 0x05 Unpause
- 0x09 Get Title Len
- 0x0a Open Tray
- 0x0b Close Tray
- 0x0d Get Comp Time
- 0x10 Goto ABS Min
- 0x11 Goto ABS Sec
- 0x12 Goto ABS Frame
- 0x14 Read Long TOC
- 0x15 Set Mode
- 0x16 Get Error
- 0x17 Clear Error
- 0x18 Spin Up
- 0x20 Play AB Min
- 0x21 Play AB Sec
- 0x22 Play AB Frame
- 0x23 Stop AB Min
- 0x24 Stop AB Sec
- 0x25 Stop AB Frame
- 0x26 AB Release
- 0x50 Get Disc Status
- 0x51 Set Volume
- 0x54 Get Maxsession
- 0x70 Set DAC mode (?)
- 0xa0-0xaf User Define (???)
- 0xf0 Service
- 0xf1 Sledge
- 0xf2 Focus
- 0xf3 Turntable
- 0xf4 Radial
+ 0x01 Play Title (?)
+ 0x02 Stop
+ 0x03 Read TOC
+ 0x04 Pause
+ 0x05 Unpause
+ 0x09 Get Title Len
+ 0x0a Open Tray
+ 0x0b Close Tray
+ 0x0d Get Comp Time
+ 0x10 Goto ABS Min
+ 0x11 Goto ABS Sec
+ 0x12 Goto ABS Frame
+ 0x14 Read Long TOC
+ 0x15 Set Mode
+ 0x16 Get Error
+ 0x17 Clear Error
+ 0x18 Spin Up
+ 0x20 Play AB Min
+ 0x21 Play AB Sec
+ 0x22 Play AB Frame
+ 0x23 Stop AB Min
+ 0x24 Stop AB Sec
+ 0x25 Stop AB Frame
+ 0x26 AB Release
+ 0x50 Get Disc Status
+ 0x51 Set Volume
+ 0x54 Get Maxsession
+ 0x70 Set DAC mode (?)
+ 0xa0-0xaf User Define (???)
+ 0xf0 Service
+ 0xf1 Sledge
+ 0xf2 Focus
+ 0xf3 Turntable
+ 0xf4 Radial
[0x10]: I2S bus control register
[0x14]: CD subcode control register
@@ -1930,7 +1930,7 @@ DRIVER_INIT_MEMBER(jaguar_state,jaguarcd)
{
m_hacks_enabled = false;
save_item(NAME(m_joystick_data));
-// cart_start();
+// cart_start();
m_is_jagcd = true;
for (int i=0;i<0x20000/4;i++) // the cd bios is bigger.. check
diff --git a/src/mame/drivers/jangou.c b/src/mame/drivers/jangou.c
index e661d864037..2afeab268e8 100644
--- a/src/mame/drivers/jangou.c
+++ b/src/mame/drivers/jangou.c
@@ -927,7 +927,7 @@ void jangou_state::machine_start()
save_item(NAME(m_cvsd_shiftreg));
save_item(NAME(m_cvsd_shift_cnt));
-
+
/* Create a timer to feed the CVSD DAC with sample bits */
m_cvsd_bit_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(jangou_state::cvsd_bit_timer_callback), this));
m_cvsd_bit_timer->adjust(attotime::from_hz(MASTER_CLOCK / 1024), 0, attotime::from_hz(MASTER_CLOCK / 1024));
diff --git a/src/mame/drivers/jpmsys5.c b/src/mame/drivers/jpmsys5.c
index 91f4ef2be9d..115ef7d110c 100644
--- a/src/mame/drivers/jpmsys5.c
+++ b/src/mame/drivers/jpmsys5.c
@@ -6,8 +6,8 @@
driver by Phil Bennett
- AWP bits J.Wallace, D. Haywood
-
+ AWP bits J.Wallace, D. Haywood
+
Video System Games supported:
* Monopoly
* Monopoly Classic
@@ -306,7 +306,7 @@ READ16_MEMBER(jpmsys5_state::jpm_upd7759_r)
AM_RANGE(0x0460c0, 0x0460c1) AM_WRITENOP \
AM_RANGE(0x048000, 0x04801f) AM_READWRITE(coins_r, coins_w) \
AM_RANGE(0x04c000, 0x04c0ff) AM_READ(mux_r) AM_WRITE(mux_w)
-
+
static ADDRESS_MAP_START( 68000_awp_map, AS_PROGRAM, 16, jpmsys5_state )
JPM_SYS5_COMMON_MAP
AM_RANGE(0x0460a0, 0x0460a3) AM_DEVWRITE8("ym2413", ym2413_device, write, 0x00ff)
@@ -490,7 +490,6 @@ WRITE_LINE_MEMBER(jpmsys5_state::pia_irq)
READ8_MEMBER(jpmsys5_state::u29_porta_r)
{
-
int combined_meter = MechMtr_GetActivity(0) | MechMtr_GetActivity(1) |
MechMtr_GetActivity(2) | MechMtr_GetActivity(3) |
MechMtr_GetActivity(4) | MechMtr_GetActivity(5) |
diff --git a/src/mame/drivers/lethalj.c b/src/mame/drivers/lethalj.c
index 5739f6cccd7..00ba7c897a6 100644
--- a/src/mame/drivers/lethalj.c
+++ b/src/mame/drivers/lethalj.c
@@ -618,8 +618,8 @@ static INPUT_PORTS_START( franticf ) // how do the directional inputs work?
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
-// PORT_START("PADDLE")
-// PORT_BIT( 0x00ff, 0x0000, IPT_PADDLE ) PORT_PLAYER(1) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CENTERDELTA(0) PORT_REVERSE
+// PORT_START("PADDLE")
+// PORT_BIT( 0x00ff, 0x0000, IPT_PADDLE ) PORT_PLAYER(1) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CENTERDELTA(0) PORT_REVERSE
INPUT_PORTS_END
diff --git a/src/mame/drivers/m92.c b/src/mame/drivers/m92.c
index e25716e4db0..92bf3296479 100644
--- a/src/mame/drivers/m92.c
+++ b/src/mame/drivers/m92.c
@@ -46,9 +46,9 @@ System notes:
Glitch list!
- All games:
- Flip screen/Cocktail Mode is unsupported (offsetted screens, and also Irem Skins Game
- hangs at title screen when flip is enabled), it's also unknown where exactly it's tied.
+ All games:
+ Flip screen/Cocktail Mode is unsupported (offsetted screens, and also Irem Skins Game
+ hangs at title screen when flip is enabled), it's also unknown where exactly it's tied.
Gunforce:
Animated water sometimes doesn't appear on level 5 (but it
diff --git a/src/mame/drivers/mazerbla.c b/src/mame/drivers/mazerbla.c
index c36ac4be9e2..f28dc460772 100644
--- a/src/mame/drivers/mazerbla.c
+++ b/src/mame/drivers/mazerbla.c
@@ -89,8 +89,8 @@ master z80
[0x0792]: z80 regs check
[0x0924]: z80 SP reg check
(following two happens quite often, basically after every POST test)
- [0x08e1]: writes 0xaa to led i/o port
- [0x08d2]: writes 0x02 to A, then 0 to led i/o port
+ [0x08e1]: writes 0xaa to led i/o port
+ [0x08d2]: writes 0x02 to A, then 0 to led i/o port
[0x07d7]: checks ROM 0x0000-0x1fff
[0x07ee]: checks ROM 0x2000-0x3fff
[0x0805]: checks ROM 0x4000-0x5fff
@@ -105,7 +105,7 @@ master z80
[0x08ab]: shared RAM check, values at 0xc000-0xc7ff must be 0x00 (otherwise wait until they are)
[0x08c2]: writes 0 to shared RAM
[0x000d]: clears RAM 0xe0fb, 0xe0fd, 0xe0fe (word)
- [0x2138]: puts a 1 to 0xe0fb
+ [0x2138]: puts a 1 to 0xe0fb
[0x0021]: clears i/o at 0x6a (lamps), clears 0xe563, 0xe004, 0xe000, 0xe001, 0xe007, 0xe002, 0xe003, 0xe005,
0xc04f, 0xe572, enables IM 2, clears 0xe581 / 0xe583 (word), puts default initials (0x2274->0xe058)
diff --git a/src/mame/drivers/n8080.c b/src/mame/drivers/n8080.c
index 960684c603c..bf8cf260efd 100644
--- a/src/mame/drivers/n8080.c
+++ b/src/mame/drivers/n8080.c
@@ -475,7 +475,7 @@ MACHINE_RESET_MEMBER(n8080_state,n8080)
MACHINE_RESET_MEMBER(n8080_state,spacefev)
{
MACHINE_RESET_CALL_MEMBER(n8080);
-
+
m_spacefev_red_screen = 0;
m_spacefev_red_cannon = 0;
}
@@ -483,7 +483,7 @@ MACHINE_RESET_MEMBER(n8080_state,spacefev)
MACHINE_RESET_MEMBER(n8080_state,sheriff)
{
MACHINE_RESET_CALL_MEMBER(n8080);
-
+
m_sheriff_color_mode = 0;
m_sheriff_color_data = 0;
}
@@ -491,7 +491,7 @@ MACHINE_RESET_MEMBER(n8080_state,sheriff)
MACHINE_RESET_MEMBER(n8080_state,helifire)
{
MACHINE_RESET_CALL_MEMBER(n8080);
-
+
m_helifire_mv = 0;
m_helifire_sc = 0;
m_helifire_flash = 0;
diff --git a/src/mame/drivers/namconb1.c b/src/mame/drivers/namconb1.c
index 7bfcd17e509..c2992a4a0e9 100644
--- a/src/mame/drivers/namconb1.c
+++ b/src/mame/drivers/namconb1.c
@@ -667,16 +667,16 @@ READ32_MEMBER(namconb1_state::custom_key_r)
switch( m_gametype )
{
/*
- Gunbullet/Point Blank keycus notes (thanks Guru):
+ Gunbullet/Point Blank keycus notes (thanks Guru):
- These games use the keycus in an unconventional way. Instead of reading it for a PRNG or a
- magic value, it writes a scratch value to the keycus once per frame.
+ These games use the keycus in an unconventional way. Instead of reading it for a PRNG or a
+ magic value, it writes a scratch value to the keycus once per frame.
- On hardware, if there is no keycus or the wrong keycus is present, this write will stall the
- 68000 (probably nothing completes the bus cycle in that case) and the game will hang instead
- of booting.
+ On hardware, if there is no keycus or the wrong keycus is present, this write will stall the
+ 68000 (probably nothing completes the bus cycle in that case) and the game will hang instead
+ of booting.
- Patching these writes out causes the game to run fine with no keycus present.
+ Patching these writes out causes the game to run fine with no keycus present.
*/
case NAMCONB1_GUNBULET:
return 0;
@@ -2046,4 +2046,3 @@ GAME( 1994, vshoot, 0, namconb1, namconb1, namconb1_state, vshoot, RO
GAME( 1994, outfxies, 0, namconb2, outfxies, namconb1_state, outfxies, ROT0, "Namco", "The Outfoxies (World, OU2)", GAME_IMPERFECT_SOUND )
GAME( 1994, outfxiesj,outfxies, namconb2, outfxies, namconb1_state, outfxies, ROT0, "Namco", "The Outfoxies (Japan, OU1)", GAME_IMPERFECT_SOUND )
GAME( 1995, machbrkr, 0, namconb2, namconb1, namconb1_state, machbrkr, ROT0, "Namco", "Mach Breakers - Numan Athletics 2 (Japan)", GAME_IMPERFECT_SOUND )
-
diff --git a/src/mame/drivers/namcops2.c b/src/mame/drivers/namcops2.c
index 8b138b1ab6d..232ede808bd 100644
--- a/src/mame/drivers/namcops2.c
+++ b/src/mame/drivers/namcops2.c
@@ -517,8 +517,8 @@ ROM_START( fateulc )
SYSTEM246_BIOS
ROM_REGION(0x840000, "key", ROMREGION_ERASE00)
- ROM_LOAD( "fud1vera.ic002", 0x000000, 0x800000, CRC(892ffdd1) SHA1(4a444ed49e5c89dd0af4f026626a164b9eec61d1) )
- ROM_LOAD( "fud1vera_spr.ic002", 0x800000, 0x040000, CRC(0fca4e99) SHA1(0bd74de26f10089ee848f03093229abfa8c84663) )
+ ROM_LOAD( "fud1vera.ic002", 0x000000, 0x800000, CRC(892ffdd1) SHA1(4a444ed49e5c89dd0af4f026626a164b9eec61d1) )
+ ROM_LOAD( "fud1vera_spr.ic002", 0x800000, 0x040000, CRC(0fca4e99) SHA1(0bd74de26f10089ee848f03093229abfa8c84663) )
DISK_REGION("dvd")
DISK_IMAGE_READONLY( "fud-hdd0-a", 0, SHA1(1189863ae0e339e11708b9660521f86b3b97bc9e) )
@@ -531,7 +531,7 @@ ROM_START( fateulcb )
ROM_REGION(0x840000, "key", ROMREGION_ERASE00)
ROM_LOAD( "fates-dongle.bin", 0x000000, 0x840000, CRC(b0f15996) SHA1(8161c61f18700ddaeecd89bf3a7fb685431355e7) )
- DISK_REGION("dvd") // actually HDD for this game
+ DISK_REGION("dvd") // actually HDD for this game
DISK_IMAGE_READONLY( "fateulcb", 0, SHA1(073e67a5219ad53292716093b8c35deb20761c04) )
ROM_END
diff --git a/src/mame/drivers/neogeo.c b/src/mame/drivers/neogeo.c
index c71c5fadf57..35c17b64ecd 100644
--- a/src/mame/drivers/neogeo.c
+++ b/src/mame/drivers/neogeo.c
@@ -672,7 +672,7 @@ void neogeo_state::neogeo_audio_cpu_banking_init()
m_bank_audio_cart[1] = membank("audio_e000");
m_bank_audio_cart[2] = membank("audio_c000");
m_bank_audio_cart[3] = membank("audio_8000");
-
+
address_mask = (memregion("audiocpu")->bytes() - 0x10000 - 1) & 0x3ffff;
rgn = memregion("audiocpu")->base();
@@ -1058,7 +1058,7 @@ static INPUT_PORTS_START( neogeo )
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Previous Game") PORT_CODE(KEYCODE_4)
PORT_BIT( 0x7000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, neogeo_state, get_memcard_status, NULL)
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SPECIAL ) /* Hardware type (AES=0, MVS=1) Some games check this and show */
- /* a piracy warning screen if the hardware and BIOS don't match */
+ /* a piracy warning screen if the hardware and BIOS don't match */
PORT_START("AUDIO/COIN")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
diff --git a/src/mame/drivers/peplus.c b/src/mame/drivers/peplus.c
index 42a1f723047..4ed19c56033 100644
--- a/src/mame/drivers/peplus.c
+++ b/src/mame/drivers/peplus.c
@@ -4844,7 +4844,7 @@ The CG2298 graphics can support the following XnnnnnnP Data game types:
Joker Poker, Double Joker Poker, Deuces Joker Wild Poker, Sevens or Better, Tens or Better, Jacks or Better
Nevada Draw Poker, Nevada Bonus Poker, White Hot Aces, Double Double Aces & Faces, Odds & Ends Poker
Two Pair, Crazy Eights and Full House Bonus
-
+
*/
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "xmp00017.u67", 0x00000, 0x10000, CRC(129e6eaa) SHA1(1dd2b83a672a618f338b553a6cbd598b6d4ce672) )
diff --git a/src/mame/drivers/pgm.c b/src/mame/drivers/pgm.c
index 98859305645..cc8bfd5b261 100644
--- a/src/mame/drivers/pgm.c
+++ b/src/mame/drivers/pgm.c
@@ -3539,11 +3539,11 @@ ROM_START( killbldp )
ROM_REGION( 0x4000, "prot", 0 ) /* ARM protection ASIC - internal rom */
/* the first 0x268 bytes of this are EXECUTE ONLY in the original chip, attempting to read them even via the original CPU just returns what is on the bus */
- ROM_LOAD( "killbldp_igs027a.bin", 0x000000, 0x04000, CRC(c7868d90) SHA1(335c99933a38b77fcfc3f8004063f35124364f3e) ) // this is the original rom with the first 0x268 bytes from the bootleg - but it doesn't work?
+ ROM_LOAD( "killbldp_igs027a.bin", 0x000000, 0x04000, CRC(c7868d90) SHA1(335c99933a38b77fcfc3f8004063f35124364f3e) ) // this is the original rom with the first 0x268 bytes from the bootleg - but it doesn't work?
/* there are some differences around 0x2e80, investigate - maybe above is badly dumped?, padding at 0x3ac0 is also different */
ROM_LOAD( "killbldp_igs027a_alt.bin", 0x000000, 0x04000, CRC(98316b06) SHA1(09be9fad24d68980a0a5beae60ced48012286216) ) // from a bootleg
-
+
ROM_REGION( 0x800000, "user1", 0 ) /* Protection Data (encrypted external ARM data) */
ROM_LOAD( "v300x.u26", 0x000000, 0x200000, CRC(144388c8) SHA1(d7469df077c1a674129f18210584ba4d05a61888) )
diff --git a/src/mame/drivers/pong.c b/src/mame/drivers/pong.c
index 49c475da5e3..ce19ae36c94 100644
--- a/src/mame/drivers/pong.c
+++ b/src/mame/drivers/pong.c
@@ -48,7 +48,7 @@ TODO:
*/
#define MASTER_CLOCK 7159000
-#define V_TOTAL (0x105+1) // 262
+#define V_TOTAL (0x105+1) // 262
#define H_TOTAL (0x1C6+1) // 454
#define HBSTART (H_TOTAL)
@@ -334,7 +334,7 @@ static NETLIST_START(pong_schematics)
NE555N_MSTABLE(ic_b9, 256VQ, P1)
NETDEV_PARAM(ic_b9.R, RES_K(90))
NETDEV_PARAM(ic_b9.C, CAP_U(.1))
- NETDEV_PARAM(ic_b9.VL, 0.5) // 1N914
+ NETDEV_PARAM(ic_b9.VL, 0.5) // 1N914
TTL_7404_INVERT(ic_c9b, ic_b9.Q)
TTL_7400_NAND(ic_b7b, ic_a7b.Q, hsyncQ)
TTL_7493(ic_b8, ic_b7b.Q, ic_b8.QA, ic_b9.Q, ic_b9.Q)
@@ -351,7 +351,7 @@ static NETLIST_START(pong_schematics)
NE555N_MSTABLE(ic_a9, 256VQ, P2)
NETDEV_PARAM(ic_a9.R, RES_K(90))
NETDEV_PARAM(ic_a9.C, CAP_U(.1))
- NETDEV_PARAM(ic_a9.VL, 0.5) // 1N914
+ NETDEV_PARAM(ic_a9.VL, 0.5) // 1N914
TTL_7404_INVERT(ic_c9a, ic_a9.Q)
TTL_7400_NAND(ic_b7c, ic_a7a.Q, hsyncQ)
TTL_7493(ic_a8, ic_b7c.Q, ic_a8.QA, ic_a9.Q, ic_a9.Q)
diff --git a/src/mame/drivers/s11c.c b/src/mame/drivers/s11c.c
index fde5365b443..344924c5d4f 100644
--- a/src/mame/drivers/s11c.c
+++ b/src/mame/drivers/s11c.c
@@ -35,13 +35,13 @@ static ADDRESS_MAP_START( s11c_audio_map, AS_PROGRAM, 8, s11c_state )
AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank1")
ADDRESS_MAP_END
static ADDRESS_MAP_START( s11c_bg_map, AS_PROGRAM, 8, s11c_state )
- AM_RANGE(0x0000, 0x07ff) AM_RAM
- AM_RANGE(0x2000, 0x2001) AM_MIRROR(0x1ffe) AM_DEVREADWRITE("ym2151", ym2151_device, read, write)
- AM_RANGE(0x4000, 0x4003) AM_MIRROR(0x1ffc) AM_DEVREADWRITE("pia40", pia6821_device, read, write)
- AM_RANGE(0x6000, 0x67ff) AM_WRITE(bg_speech_digit_w)
- AM_RANGE(0x6800, 0x6fff) AM_WRITE(bg_speech_clock_w)
- AM_RANGE(0x7800, 0x7fff) AM_WRITE(bgbank_w)
- AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bgbank")
+ AM_RANGE(0x0000, 0x07ff) AM_RAM
+ AM_RANGE(0x2000, 0x2001) AM_MIRROR(0x1ffe) AM_DEVREADWRITE("ym2151", ym2151_device, read, write)
+ AM_RANGE(0x4000, 0x4003) AM_MIRROR(0x1ffc) AM_DEVREADWRITE("pia40", pia6821_device, read, write)
+ AM_RANGE(0x6000, 0x67ff) AM_WRITE(bg_speech_digit_w)
+ AM_RANGE(0x6800, 0x6fff) AM_WRITE(bg_speech_clock_w)
+ AM_RANGE(0x7800, 0x7fff) AM_WRITE(bgbank_w)
+ AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bgbank")
ADDRESS_MAP_END
*/
@@ -128,24 +128,24 @@ INPUT_PORTS_END
/*
WRITE8_MEMBER( s11c_state::bgbank_w )
{
- UINT8 bank = ((data & 0x04) >> 2) | ((data & 0x03) << 1);
- membank("bgbank")->set_entry(bank);
+ UINT8 bank = ((data & 0x04) >> 2) | ((data & 0x03) << 1);
+ membank("bgbank")->set_entry(bank);
// popmessage("BG bank set to %02x (%i)",data,bank);
}
*/
MACHINE_RESET_MEMBER( s11c_state, s11c )
{
-// membank("bgbank")->set_entry(0);
+// membank("bgbank")->set_entry(0);
// reset the CPUs again, so that the CPUs are starting with the right vectors (otherwise sound may die on reset)
-// m_bgcpu->set_input_line(INPUT_LINE_RESET,PULSE_LINE);
+// m_bgcpu->set_input_line(INPUT_LINE_RESET,PULSE_LINE);
}
DRIVER_INIT_MEMBER(s11c_state,s11c)
{
emu_timer* timer = timer_alloc(TIMER_IRQ);
-// UINT8 *BGROM = memregion("bgcpu")->base();
-// membank("bgbank")->configure_entries(0, 8, &BGROM[0x10000], 0x8000);
-// membank("bgbank")->set_entry(0);
+// UINT8 *BGROM = memregion("bgcpu")->base();
+// membank("bgbank")->configure_entries(0, 8, &BGROM[0x10000], 0x8000);
+// membank("bgbank")->set_entry(0);
set_invert(true);
set_timer(timer);
timer->adjust(attotime::from_ticks(S11_IRQ_CYCLES,E_CLOCK),1);
@@ -265,18 +265,18 @@ static const pia6821_interface pia34_intf =
//static const pia6821_interface pia40_intf =
//{
-// DEVCB_NULL, /* port A in */
-// DEVCB_NULL, /* port B in */
-// DEVCB_NULL, /* line CA1 in */
-// DEVCB_NULL, /* line CB1 in */
-// DEVCB_LINE_VCC, /* line CA2 in */
-// DEVCB_NULL, /* line CB2 in */
-// DEVCB_DRIVER_MEMBER(s11_state, pia40_pa_w), /* port A out */
-// DEVCB_DRIVER_MEMBER(s11_state, pia40_pb_w), /* port B out */
-// DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia40_ca2_w), /* line CA2 out */
-// DEVCB_DRIVER_LINE_MEMBER(s11_state, pia40_cb2_w), /* line CB2 out */
-// DEVCB_CPU_INPUT_LINE("bgcpu", M6809_FIRQ_LINE), /* IRQA */
-// DEVCB_CPU_INPUT_LINE("bgcpu", INPUT_LINE_NMI) /* IRQB */
+// DEVCB_NULL, /* port A in */
+// DEVCB_NULL, /* port B in */
+// DEVCB_NULL, /* line CA1 in */
+// DEVCB_NULL, /* line CB1 in */
+// DEVCB_LINE_VCC, /* line CA2 in */
+// DEVCB_NULL, /* line CB2 in */
+// DEVCB_DRIVER_MEMBER(s11_state, pia40_pa_w), /* port A out */
+// DEVCB_DRIVER_MEMBER(s11_state, pia40_pb_w), /* port B out */
+// DEVCB_DRIVER_LINE_MEMBER(s11b_state, pia40_ca2_w), /* line CA2 out */
+// DEVCB_DRIVER_LINE_MEMBER(s11_state, pia40_cb2_w), /* line CB2 out */
+// DEVCB_CPU_INPUT_LINE("bgcpu", M6809_FIRQ_LINE), /* IRQA */
+// DEVCB_CPU_INPUT_LINE("bgcpu", INPUT_LINE_NMI) /* IRQB */
//};
static MACHINE_CONFIG_START( s11c, s11c_state )
diff --git a/src/mame/drivers/scramble.c b/src/mame/drivers/scramble.c
index 0d932fc3891..e1487222918 100644
--- a/src/mame/drivers/scramble.c
+++ b/src/mame/drivers/scramble.c
@@ -1493,7 +1493,7 @@ static MACHINE_CONFIG_DERIVED( mars, scramble )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(mars_map)
-
+
MCFG_DEVICE_REMOVE("ppi8255_1")
MCFG_I8255A_ADD( "ppi8255_1", stratgyx_ppi_1_intf )
diff --git a/src/mame/drivers/sderby.c b/src/mame/drivers/sderby.c
index 38d15f7bca7..1cb5299271e 100644
--- a/src/mame/drivers/sderby.c
+++ b/src/mame/drivers/sderby.c
@@ -321,9 +321,9 @@ static ADDRESS_MAP_START( sderby2_map, AS_PROGRAM, 16, sderby_state )
AM_RANGE(0x308008, 0x308009) AM_WRITE(sderby_out_w) /* output port */
AM_RANGE(0x30800e, 0x30800f) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x380000, 0x380fff) AM_WRITE(paletteram_RRRRRGGGGGBBBBBx_word_w) AM_SHARE("paletteram")
- AM_RANGE(0x300000, 0x300001) AM_WRITENOP /* unknown... write 0x01 in game, and 0x00 on reset */ //MOD
+ AM_RANGE(0x300000, 0x300001) AM_WRITENOP /* unknown... write 0x01 in game, and 0x00 on reset */ //MOD
AM_RANGE(0xcf0000, 0xcf07ff) AM_RAM AM_SHARE("nvram")
- AM_RANGE(0xcfc000, 0xcfffff) AM_RAM //MOD
+ AM_RANGE(0xcfc000, 0xcfffff) AM_RAM //MOD
ADDRESS_MAP_END
diff --git a/src/mame/drivers/segag80r.c b/src/mame/drivers/segag80r.c
index fa93a59aa01..2fcccd58a0b 100644
--- a/src/mame/drivers/segag80r.c
+++ b/src/mame/drivers/segag80r.c
@@ -1457,7 +1457,7 @@ DRIVER_INIT_MEMBER(segag80r_state,astrob)
/* install Astro Blaster sound board */
iospace.install_write_handler(0x3e, 0x3f, write8_delegate(FUNC(segag80r_state::astrob_sound_w),this));
-
+
save_item(NAME(m_sound_state));
save_item(NAME(m_sound_rate));
}
@@ -1470,7 +1470,7 @@ DRIVER_INIT_MEMBER(segag80r_state,005)
/* configure video */
m_background_pcb = G80_BACKGROUND_NONE;
-
+
save_item(NAME(m_sound_state));
save_item(NAME(m_sound_addr));
save_item(NAME(m_sound_data));
@@ -1498,7 +1498,7 @@ DRIVER_INIT_MEMBER(segag80r_state,spaceod)
/* install our wacky mangled ports */
iospace.install_read_handler(0xf8, 0xfb, read8_delegate(FUNC(segag80r_state::spaceod_mangled_ports_r),this));
iospace.install_read_handler(0xfc, 0xfc, read8_delegate(FUNC(segag80r_state::spaceod_port_fc_r),this));
-
+
save_item(NAME(m_sound_state));
}
@@ -1518,7 +1518,7 @@ DRIVER_INIT_MEMBER(segag80r_state,monsterb)
/* install background board handlers */
iospace.install_write_handler(0xb8, 0xbd, write8_delegate(FUNC(segag80r_state::monsterb_back_port_w),this));
pgmspace.install_write_handler(0xe000, 0xffff, write8_delegate(FUNC(segag80r_state::monsterb_vidram_w),this));
-
+
save_item(NAME(m_sound_state));
save_item(NAME(m_sound_addr));
save_item(NAME(m_n7751_command));
@@ -1543,7 +1543,7 @@ DRIVER_INIT_MEMBER(segag80r_state,monster2)
iospace.install_write_handler(0xb4, 0xb5, write8_delegate(FUNC(segag80r_state::pignewt_back_color_w),this));
iospace.install_write_handler(0xb8, 0xbd, write8_delegate(FUNC(segag80r_state::pignewt_back_port_w),this));
pgmspace.install_write_handler(0xe000, 0xffff, write8_delegate(FUNC(segag80r_state::pignewt_vidram_w),this));
-
+
save_item(NAME(m_sound_state));
save_item(NAME(m_sound_addr));
save_item(NAME(m_n7751_command));
diff --git a/src/mame/drivers/segag80v.c b/src/mame/drivers/segag80v.c
index a414fd0370e..95dad5efd85 100644
--- a/src/mame/drivers/segag80v.c
+++ b/src/mame/drivers/segag80v.c
@@ -901,13 +901,13 @@ static MACHINE_CONFIG_START( g80v_base, segag80v_state )
/* video hardware */
-
+
MCFG_SCREEN_ADD("screen", VECTOR)
MCFG_SCREEN_REFRESH_RATE(40)
MCFG_SCREEN_SIZE(400, 300)
MCFG_SCREEN_VISIBLE_AREA(512, 1536, 640-32, 1408+32)
MCFG_SCREEN_UPDATE_DRIVER(segag80v_state, screen_update_segag80v)
-
+
MCFG_VECTOR_ADD("vector")
/* sound hardware */
diff --git a/src/mame/drivers/stv.c b/src/mame/drivers/stv.c
index 38b05abd73b..04da1bb1456 100644
--- a/src/mame/drivers/stv.c
+++ b/src/mame/drivers/stv.c
@@ -9,31 +9,31 @@
TODO:
- clean this up!
- - Properly emulate the protection chips, used by several games (check stvprot.c for more info)
+ - Properly emulate the protection chips, used by several games (check stvprot.c for more info)
- (per-game issues)
- - stress: accesses the Sound Memory Expansion Area (0x05a80000-0x05afffff), unknown purpose;
+ (per-game issues)
+ - stress: accesses the Sound Memory Expansion Area (0x05a80000-0x05afffff), unknown purpose;
- - smleague / finlarch: it randomly hangs / crashes,it works if you use a ridiculous MCFG_INTERLEAVE number,might need strict
- SH-2 synching or it's actually a m68k comms issue.
+ - smleague / finlarch: it randomly hangs / crashes,it works if you use a ridiculous MCFG_INTERLEAVE number,might need strict
+ SH-2 synching or it's actually a m68k comms issue.
- - groovef: ugly back screen color, caused by incorrect usage of the Color Calculation function.
+ - groovef: ugly back screen color, caused by incorrect usage of the Color Calculation function.
- - myfairld: Apparently this game gives a black screen (either test mode and in-game mode),but let it wait for about
- 10 seconds and the game will load everything. This is because of a hellishly slow m68k sub-routine located at 54c2.
- Likely to not be a bug but an in-game design issue.
+ - myfairld: Apparently this game gives a black screen (either test mode and in-game mode),but let it wait for about
+ 10 seconds and the game will load everything. This is because of a hellishly slow m68k sub-routine located at 54c2.
+ Likely to not be a bug but an in-game design issue.
- - danchih / danchiq: currently hangs randomly (regression).
+ - danchih / danchiq: currently hangs randomly (regression).
- - batmanfr: Missing sound,caused by an extra ADSP chip which is on the cart.The CPU is a
- ADSP-2181,and it's the same used by NBA Jam Extreme (ZN game).
+ - batmanfr: Missing sound,caused by an extra ADSP chip which is on the cart.The CPU is a
+ ADSP-2181,and it's the same used by NBA Jam Extreme (ZN game).
- - vfremix: when you play as Akira, there is a problem with third match: game doesn't upload all textures
- and tiles and doesn't enable display, although gameplay is normal - wait a while to get back
- to title screen after losing a match
+ - vfremix: when you play as Akira, there is a problem with third match: game doesn't upload all textures
+ and tiles and doesn't enable display, although gameplay is normal - wait a while to get back
+ to title screen after losing a match
- - vfremix: various problems with SCU DSP: Jeffry causes a black screen hang. Akira's kick sometimes
- sends the opponent out of the ring from whatever position.
+ - vfremix: various problems with SCU DSP: Jeffry causes a black screen hang. Akira's kick sometimes
+ sends the opponent out of the ring from whatever position.
************************************************************************************************************************/
diff --git a/src/mame/drivers/taito_f2.c b/src/mame/drivers/taito_f2.c
index 3a20fbddb16..ed7d165f704 100644
--- a/src/mame/drivers/taito_f2.c
+++ b/src/mame/drivers/taito_f2.c
@@ -4526,7 +4526,7 @@ ROM_START( growlp )
ROM_LOAD16_BYTE( "growl_ic13_scro-0-0-h_2e7a.bin", 0x00001, 0x40000, CRC(4E220E34) SHA1(C0D69B178B3E2DD004295EEE92311B387733228B) )
ROM_LOAD16_BYTE( "growl_ic12_scro-1-l_026e.bin", 0x80000, 0x40000, CRC(486925B4) SHA1(7D804E45AB58A4B1A121438D354A4A294DAA5177) )
ROM_LOAD16_BYTE( "growl_ic14_scro-0-1-h_f0fa.bin", 0x80001, 0x40000, CRC(42C2A2D0) SHA1(638D563A3928B7B2E6DAE7F8C607669116284899) )
-
+
ROM_REGION( 0x200000, "gfx2", 0 ) /* OBJ */
ROM_LOAD16_BYTE( "growl_ic17_obj0-0-l_90b9.bin", 0x000000, 0x40000, CRC(CD94025A) SHA1(0DA7A0F213F9A9D7A420A9DCDD6D3DB2E4B6A9EF) )
ROM_LOAD16_BYTE( "growl_ic19_obj0-0-h_b652.bin", 0x000001, 0x40000, CRC(6838C1B0) SHA1(0355BFF010AB94F9D566E6BD404BD3559C407A37) )
diff --git a/src/mame/drivers/thepit.c b/src/mame/drivers/thepit.c
index a1f12666279..24328ffb99e 100644
--- a/src/mame/drivers/thepit.c
+++ b/src/mame/drivers/thepit.c
@@ -114,8 +114,8 @@ HT-01B
*************************************************************
- Desert Dan (C)1982 by Video Optics
- pinout
+ Desert Dan (C)1982 by Video Optics
+ pinout
-------------
---------------------------------------------------
@@ -124,21 +124,21 @@ HT-01B
GND | A | 1 | GND
+5 | B | 2 | +5
+5 | C | 3 | +5
- | D | 4 |
+ | D | 4 |
1P START | E | 5 | 2P START
- | F | 6 |
+ | F | 6 |
| H | 7 | COIN
- | J | 8 |
- | K | 9 |
+ | J | 8 |
+ | K | 9 |
| L | 10 | ATTACK
- | M | 11 |
- | N | 12 |
- UP | P | 13 |
- DOWN | R | 14 |
- LEFT | S | 15 |
- RIGHT | T | 16 |
+ | M | 11 |
+ | N | 12 |
+ UP | P | 13 |
+ DOWN | R | 14 |
+ LEFT | S | 15 |
+ RIGHT | T | 16 |
SPK + | U | 17 | SPK - (GND)
- | V | 18 |
+ | V | 18 |
SYNC (COMP) | W | 19 | RED
GREEN | X | 20 | BLUE
+ 12 | Y | 21 | + 12
diff --git a/src/mame/drivers/tumbleb.c b/src/mame/drivers/tumbleb.c
index ea2ef6e213e..68a7efcb8f2 100644
--- a/src/mame/drivers/tumbleb.c
+++ b/src/mame/drivers/tumbleb.c
@@ -1912,7 +1912,7 @@ static INPUT_PORTS_START( carket )
PORT_DIPSETTING( 0x0006, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0002, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0004, DEF_STR( Very_Hard ) )
- PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:5,4,3") /* Tested correct */
+ PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:5,4,3") /* Tested correct */
PORT_DIPSETTING( 0x0000, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x0020, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0010, DEF_STR( 3C_1C ) )
@@ -1924,7 +1924,7 @@ static INPUT_PORTS_START( carket )
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2") /* Test Mode shows Language: Korean / English, but doesn't work?? */
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
@@ -2854,7 +2854,7 @@ sound Z80 (Xtal 4.096Mhz)
6116 sound ram
-27010.uc1 audio data
+27010.uc1 audio data
sound hardware
diff --git a/src/mame/drivers/twin16.c b/src/mame/drivers/twin16.c
index decd1fada94..60e669f1a7c 100644
--- a/src/mame/drivers/twin16.c
+++ b/src/mame/drivers/twin16.c
@@ -734,10 +734,10 @@ static MACHINE_CONFIG_START( twin16, twin16_state )
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(XTAL_18_432MHz/2, 576, 0, 40*8, 264, 2*8, 30*8)
-// MCFG_SCREEN_REFRESH_RATE(((double)XTAL_18_432MHz / 2) / (576 * 264))
-// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2062)) // 32 lines
-// MCFG_SCREEN_SIZE(40*8, 32*8)
-// MCFG_SCREEN_VISIBLE_AREA(0, 40*8-1, 2*8, 30*8-1)
+// MCFG_SCREEN_REFRESH_RATE(((double)XTAL_18_432MHz / 2) / (576 * 264))
+// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2062)) // 32 lines
+// MCFG_SCREEN_SIZE(40*8, 32*8)
+// MCFG_SCREEN_VISIBLE_AREA(0, 40*8-1, 2*8, 30*8-1)
MCFG_SCREEN_UPDATE_DRIVER(twin16_state, screen_update_twin16)
MCFG_SCREEN_VBLANK_DRIVER(twin16_state, screen_eof_twin16)
diff --git a/src/mame/drivers/wallc.c b/src/mame/drivers/wallc.c
index 4ce255ef204..2e38a836fb8 100644
--- a/src/mame/drivers/wallc.c
+++ b/src/mame/drivers/wallc.c
@@ -362,17 +362,17 @@ ROM_END
/*
-It use a epoxy brick like wallc
+It use a epoxy brick like wallc
Inside the brick there are:
- 74245
- 74368
- Pal16r4
74368 is a tristate not, it's used to:
--nagate D0 that goes to the CPU if A15 is low
--nagate D1 that goes to the CPU if A15 is low
--nagate D2 that goes to the CPU if A15 is low
--nagate D3 that goes to the CPU if A15 is low
+-nagate D0 that goes to the CPU if A15 is low
+-nagate D1 that goes to the CPU if A15 is low
+-nagate D2 that goes to the CPU if A15 is low
+-nagate D3 that goes to the CPU if A15 is low
-negate cpu clk to feed the pal clk ALWAYS
-negate A15 to feed 74245 /EN ALWAYS
@@ -395,8 +395,8 @@ A15 (Output enable, not in equation)
D2
D3
D4
-D5 (2 times)
-D7 (2 times)
+D5 (2 times)
+D7 (2 times)
Pal output
D2 (via not to cpu)
@@ -432,7 +432,6 @@ DRIVER_INIT_MEMBER(wallc_state,sidam)
for (i=0; i<0x2000; i++)
{
-
switch (i & 0x4a) // A1, A3, A6
{
case 0x00:
@@ -456,20 +455,20 @@ DRIVER_INIT_MEMBER(wallc_state,sidam)
}
-
+
if (count==16)
{
count = 0;
logerror("\n");
}
- c = ROM[ i ] ^ 0x0f;
+ c = ROM[ i ] ^ 0x0f;
ROM[ i ] = c;
}
}
-
+
GAME( 1984, wallc, 0, wallc, wallc, wallc_state, wallc, ROT0, "Midcoin", "Wall Crash (set 1)", 0 )
GAME( 1984, wallca, wallc, wallc, wallc, wallc_state, wallca, ROT0, "Midcoin", "Wall Crash (set 2)", 0 )
GAME( 1984, sidampkr,0, wallc, wallc, wallc_state, sidam, ROT270, "Sidam", "Unknown Sidam Poker", GAME_NOT_WORKING )
diff --git a/src/mame/drivers/wpc_dcs.c b/src/mame/drivers/wpc_dcs.c
index 4ef28653213..c77a4b9278b 100644
--- a/src/mame/drivers/wpc_dcs.c
+++ b/src/mame/drivers/wpc_dcs.c
@@ -106,15 +106,15 @@ static INPUT_PORTS_START( wpc_dcs )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Begin Test / Enter") PORT_CODE(KEYCODE_ENTER_PAD)
// DCS games tend to use unneeded inputs here for extra switches (like STTNG putting the spinner switch here)
-/* PORT_START("FLIP")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Right Flipper EOS") PORT_CODE(KEYCODE_RSHIFT)
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Right Flipper Button") PORT_CODE(KEYCODE_RSHIFT)
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Left Flipper EOS") PORT_CODE(KEYCODE_LSHIFT)
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Left Flipper Button") PORT_CODE(KEYCODE_LSHIFT)
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Right Flipper EOS") PORT_CODE(KEYCODE_RSHIFT)
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Right Flipper Button") PORT_CODE(KEYCODE_RSHIFT)
- PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Left Flipper EOS") PORT_CODE(KEYCODE_LSHIFT)
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Left Flipper Button") PORT_CODE(KEYCODE_LSHIFT)
+/* PORT_START("FLIP")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Right Flipper EOS") PORT_CODE(KEYCODE_RSHIFT)
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Right Flipper Button") PORT_CODE(KEYCODE_RSHIFT)
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Left Flipper EOS") PORT_CODE(KEYCODE_LSHIFT)
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Left Flipper Button") PORT_CODE(KEYCODE_LSHIFT)
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Right Flipper EOS") PORT_CODE(KEYCODE_RSHIFT)
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Right Flipper Button") PORT_CODE(KEYCODE_RSHIFT)
+ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Left Flipper EOS") PORT_CODE(KEYCODE_LSHIFT)
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Upper Left Flipper Button") PORT_CODE(KEYCODE_LSHIFT)
*/
PORT_START("DIPS")
PORT_DIPNAME(0x01,0x01,"Switch 1") PORT_DIPLOCATION("SWA:1")
diff --git a/src/mame/etc/template_cpu.h b/src/mame/etc/template_cpu.h
index f5ba367b2c3..764caf01d2c 100644
--- a/src/mame/etc/template_cpu.h
+++ b/src/mame/etc/template_cpu.h
@@ -52,8 +52,8 @@ protected:
private:
address_space_config m_program_config;
- UINT8 m_pc; /* registers */
- UINT8 m_flags; /* flags */
+ UINT8 m_pc; /* registers */
+ UINT8 m_flags; /* flags */
address_space *m_program;
address_space *m_data;
int m_icount;
diff --git a/src/mame/includes/1943.h b/src/mame/includes/1943.h
index 3cde6fe6731..077d75fa9ce 100644
--- a/src/mame/includes/1943.h
+++ b/src/mame/includes/1943.h
@@ -37,7 +37,7 @@ public:
int m_bg2_on;
/* protection */
- UINT8 m_prot_value;
+ UINT8 m_prot_value;
DECLARE_WRITE8_MEMBER(c1943_protection_w);
DECLARE_READ8_MEMBER(c1943_protection_r);
DECLARE_READ8_MEMBER(_1943b_c007_r);
diff --git a/src/mame/includes/aztarac.h b/src/mame/includes/aztarac.h
index 0783bb7e30b..2d426cfbb99 100644
--- a/src/mame/includes/aztarac.h
+++ b/src/mame/includes/aztarac.h
@@ -22,7 +22,7 @@ public:
required_device<vector_device> m_vector;
required_shared_ptr<UINT16> m_nvram;
required_shared_ptr<UINT16> m_vectorram;
-
+
int m_sound_status;
int m_xcenter;
int m_ycenter;
diff --git a/src/mame/includes/cchasm.h b/src/mame/includes/cchasm.h
index ce941913217..e79ee7f9b60 100644
--- a/src/mame/includes/cchasm.h
+++ b/src/mame/includes/cchasm.h
@@ -33,7 +33,7 @@ public:
required_device<dac_device> m_dac1;
required_device<dac_device> m_dac2;
required_device<vector_device> m_vector;
-
+
int m_sound_flags;
int m_coin_flag;
int m_channel_active[2];
diff --git a/src/mame/includes/cinemat.h b/src/mame/includes/cinemat.h
index 34331d67dea..56dc5ad03f5 100644
--- a/src/mame/includes/cinemat.h
+++ b/src/mame/includes/cinemat.h
@@ -23,7 +23,7 @@ public:
optional_device<ay8910_device> m_ay1;
required_device<vector_device> m_vector;
optional_shared_ptr<UINT16> m_rambase;
-
+
UINT8 m_sound_control;
void (*m_sound_handler)(running_machine &,UINT8 sound_val, UINT8 bits_changed);
UINT32 m_current_shift;
diff --git a/src/mame/includes/dkong.h b/src/mame/includes/dkong.h
index 0bfaf021a80..a8f5ee80dac 100644
--- a/src/mame/includes/dkong.h
+++ b/src/mame/includes/dkong.h
@@ -110,10 +110,10 @@ public:
required_device<cpu_device> m_maincpu;
optional_device<cpu_device> m_soundcpu;
optional_device<eeprom_serial_93cxx_device> m_eeprom;
- optional_device<n2a03_device> m_dev_n2a03a; /* dkong3 */
+ optional_device<n2a03_device> m_dev_n2a03a; /* dkong3 */
optional_device<n2a03_device> m_dev_n2a03b; /* dkong3 */
- optional_device<latch8_device> m_dev_vp2; /* dkong2, virtual port 2 */
- optional_device<latch8_device> m_dev_6h; /* dkong2 */
+ optional_device<latch8_device> m_dev_vp2; /* dkong2, virtual port 2 */
+ optional_device<latch8_device> m_dev_6h; /* dkong2 */
optional_device<discrete_device> m_discrete;
/* memory pointers */
@@ -248,14 +248,14 @@ public:
INTERRUPT_GEN_MEMBER(s2650_interrupt);
INTERRUPT_GEN_MEMBER(vblank_irq);
TIMER_CALLBACK_MEMBER(scanline_callback);
-
+
void braze_decrypt_rom(UINT8 *dest);
void drakton_decrypt_rom(UINT8 mod, int offs, int *bs);
DECLARE_READ8_MEMBER(memory_read_byte);
DECLARE_WRITE8_MEMBER(memory_write_byte);
void dkong_init_device_driver_data( );
double CD4049(double x);
-
+
private:
// video/dkong.c
void radarscp_step(int line_cnt);
diff --git a/src/mame/includes/pgm.h b/src/mame/includes/pgm.h
index 8d244af87c2..37bc200105d 100644
--- a/src/mame/includes/pgm.h
+++ b/src/mame/includes/pgm.h
@@ -151,13 +151,13 @@ public:
UINT8 m_asic3_reg;
UINT8 m_asic3_latch[3];
UINT8 m_asic3_x;
- UINT8 m_asic3_y;
- UINT8 m_asic3_z;
+ UINT8 m_asic3_y;
+ UINT8 m_asic3_z;
UINT16 m_asic3_h1;
UINT16 m_asic3_h2;
UINT16 m_asic3_hold;
-
+
DECLARE_DRIVER_INIT(orlegend);
void asic3_compute_hold();
@@ -284,7 +284,7 @@ public:
UINT8 coverage[256]; // coverage is how much of the table we've managed to verify using known facts about the table structure
int command_31_write_type;
-
+
// the maximum level size returned or read by the device appears to be this size
UINT16 level_structure[8][10];
@@ -447,7 +447,7 @@ public:
m_sharedprotram(*this, "sharedprotram"),
m_igs025(*this,"igs025"),
m_igs028(*this,"igs028")
-
+
{
}
diff --git a/src/mame/includes/segag80r.h b/src/mame/includes/segag80r.h
index b850948d642..c42600ede44 100644
--- a/src/mame/includes/segag80r.h
+++ b/src/mame/includes/segag80r.h
@@ -155,10 +155,10 @@ class sega005_sound_device : public device_t,
{
public:
sega005_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
emu_timer *m_sega005_sound_timer;
sound_stream *m_sega005_stream;
-
+
protected:
// device-level overrides
virtual void device_config_complete();
diff --git a/src/mame/includes/segag80v.h b/src/mame/includes/segag80v.h
index 270a3911a75..56456a7b281 100644
--- a/src/mame/includes/segag80v.h
+++ b/src/mame/includes/segag80v.h
@@ -25,13 +25,13 @@ public:
required_shared_ptr<UINT8> m_mainram;
required_shared_ptr<UINT8> m_vectorram;
-
+
required_device<cpu_device> m_maincpu;
optional_device<samples_device> m_samples;
optional_device<speech_sound_device> m_speech;
optional_device<usb_sound_device> m_usb;
required_device<vector_device> m_vector;
-
+
UINT8 m_mult_data[2];
UINT16 m_mult_result;
UINT8 m_spinner_select;
diff --git a/src/mame/includes/wpc_pin.h b/src/mame/includes/wpc_pin.h
index 2bf14052ce9..7dbc0fa015b 100644
--- a/src/mame/includes/wpc_pin.h
+++ b/src/mame/includes/wpc_pin.h
@@ -116,7 +116,7 @@ public:
private:
bool m_send;
-// UINT8 m_prev_data;
+// UINT8 m_prev_data;
};
#endif /* WPC_PIN_H_ */
diff --git a/src/mame/machine/igs022.c b/src/mame/machine/igs022.c
index 47e8520fbaa..bf45d09c288 100644
--- a/src/mame/machine/igs022.c
+++ b/src/mame/machine/igs022.c
@@ -1,4 +1,4 @@
-/*
+/*
IGS022 is an encrypted DMA device, most likely an MCU of some sort
it can safely be swapped between games so doesn't appear to have
@@ -34,7 +34,6 @@ void igs022_device::device_start()
void igs022_device::device_reset()
{
-
//printf("igs022_device::device_reset()");
@@ -249,7 +248,7 @@ void igs022_device::IGS022_handle_command()
m_sharedprotram[0x29e/2] = m_kb_regs[reg] & 0xffff;
}
- m_sharedprotram[0x202 / 2] = 0x7c; // this mode complete?
+ m_sharedprotram[0x202 / 2] = 0x7c; // this mode complete?
}
// Is this actually what this is suppose to do? Complete guess.
@@ -258,7 +257,7 @@ void igs022_device::IGS022_handle_command()
m_sharedprotram[0x28c / 2] = m_sharedprotram[0x288 / 2];
m_sharedprotram[0x28e / 2] = m_sharedprotram[0x28a / 2];
- m_sharedprotram[0x202 / 2] = 0x23; // this mode complete?
+ m_sharedprotram[0x202 / 2] = 0x23; // this mode complete?
}
// what do these do? write the completion byte for now...
@@ -275,12 +274,9 @@ void igs022_device::IGS022_handle_command()
IGS022_do_dma(src,dst,size,mode);
- m_sharedprotram[0x202 / 2] = 0x5e; // this mode complete?
+ m_sharedprotram[0x202 / 2] = 0x5e; // this mode complete?
}
}
const device_type IGS022 = &device_creator<igs022_device>;
-
-
-
diff --git a/src/mame/machine/igs022.h b/src/mame/machine/igs022.h
index 5507fb2b9cf..2a32470b2d1 100644
--- a/src/mame/machine/igs022.h
+++ b/src/mame/machine/igs022.h
@@ -6,7 +6,7 @@ class igs022_device : public device_t
public:
igs022_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- UINT16* m_sharedprotram;
+ UINT16* m_sharedprotram;
void IGS022_handle_command();
protected:
diff --git a/src/mame/machine/igs025.c b/src/mame/machine/igs025.c
index ae9c79c7922..e614f4d6102 100644
--- a/src/mame/machine/igs025.c
+++ b/src/mame/machine/igs025.c
@@ -1,4 +1,4 @@
-/*
+/*
IGS025 is some kind of state machine / logic device which the game
uses for various security checks, and to determine the region of the
@@ -33,7 +33,7 @@ void igs025_device::no_callback_setup()
printf("igs025 trigger external callback with no external callback setup\n");
}
-
+
void igs025_device::set_external_cb(device_t &device,igs025_execute_external newcb)
{
@@ -178,7 +178,7 @@ WRITE16_MEMBER(igs025_device::killbld_igs025_prot_w )
{
if (data == 0x0002) { // Execute command
//printf("execute\n");
- m_execute_external();
+ m_execute_external();
}
}
break;
@@ -187,7 +187,7 @@ WRITE16_MEMBER(igs025_device::killbld_igs025_prot_w )
{
if (data == 0x0001) { // Execute command
//printf("execute\n");
- m_execute_external();
+ m_execute_external();
m_kb_reg++;
}
}
@@ -198,7 +198,7 @@ WRITE16_MEMBER(igs025_device::killbld_igs025_prot_w )
break;
case 0x04:
- // m_kb_ptr = data; // Suspect. Not good for drgw3
+ // m_kb_ptr = data; // Suspect. Not good for drgw3
break;
case 0x20:
@@ -213,8 +213,8 @@ WRITE16_MEMBER(igs025_device::killbld_igs025_prot_w )
killbld_protection_calculate_hold(m_kb_cmd & 0x0f, data & 0xff);
break;
- // default:
- // logerror("%06X: ASIC25 W CMD %X VAL %X\n", space.device().safe_pc(), m_kb_cmd, data);
+ // default:
+ // logerror("%06X: ASIC25 W CMD %X VAL %X\n", space.device().safe_pc(), m_kb_cmd, data);
}
}
}
@@ -258,8 +258,8 @@ READ16_MEMBER(igs025_device::killbld_igs025_prot_r )
killbld_protection_calculate_hilo();
return 0; // Read and then discarded
- // default:
- // logerror("%06X: ASIC25 R CMD %X\n", space.device().safe_pc(), m_kb_cmd);
+ // default:
+ // logerror("%06X: ASIC25 R CMD %X\n", space.device().safe_pc(), m_kb_cmd);
}
}
@@ -325,7 +325,7 @@ WRITE16_MEMBER(igs025_device::olds_w )
case 0x03:
{
- m_execute_external();
+ m_execute_external();
m_olds_cmd3 = ((data >> 4) + 1) & 0x3;
}
@@ -523,6 +523,3 @@ WRITE16_MEMBER(igs025_device::drgw2_d80000_protection_w )
const device_type IGS025 = &device_creator<igs025_device>;
-
-
-
diff --git a/src/mame/machine/igs028.c b/src/mame/machine/igs028.c
index 47e6c6d2e63..9e861166141 100644
--- a/src/mame/machine/igs028.c
+++ b/src/mame/machine/igs028.c
@@ -24,7 +24,6 @@ void igs028_device::device_validity_check(validity_checker &valid) const
void igs028_device::device_start()
{
-
m_sharedprotram = 0;
@@ -32,7 +31,6 @@ void igs028_device::device_start()
void igs028_device::device_reset()
{
-
//printf("igs028_device::device_reset()");
@@ -123,7 +121,7 @@ void igs028_device::IGS028_do_dma(UINT16 src, UINT16 dst, UINT16 size, UINT16 mo
if (mode==0) dat2 -= extraxor;
else if (mode==1) dat2 = ((dat2 & 0xf0f0) >> 4)|((dat2 & 0x0f0f) << 4);
else if (mode==2) dat2 ^= extraxor;
- else if (mode==5) dat2 = ((dat2 &0x00ff) << 8) | ((dat2 &0xff00) >> 8);
+ else if (mode==5) dat2 = ((dat2 &0x00ff) << 8) | ((dat2 &0xff00) >> 8);
else if (mode==6) dat2 += extraxor;
else
{
@@ -150,14 +148,13 @@ void igs028_device::IGS028_do_dma(UINT16 src, UINT16 dst, UINT16 size, UINT16 mo
}
break;
- default: // >=8
- printf ("DMA mode unknown!!!\nsrc:%4.4x, dst: %4.4x, size: %4.4x, mode: %4.4x\n", src, dst, size, mode);
+ default: // >=8
+ printf ("DMA mode unknown!!!\nsrc:%4.4x, dst: %4.4x, size: %4.4x, mode: %4.4x\n", src, dst, size, mode);
}
}
void igs028_device::IGS028_handle()
{
-
UINT16 cmd = m_sharedprotram[0x3026 / 2];
// logerror ("command: %x\n", cmd);
@@ -221,6 +218,3 @@ void igs028_device::IGS028_handle()
const device_type IGS028 = &device_creator<igs028_device>;
-
-
-
diff --git a/src/mame/machine/igs028.h b/src/mame/machine/igs028.h
index 68dc1ce88ec..0d15ef01aff 100644
--- a/src/mame/machine/igs028.h
+++ b/src/mame/machine/igs028.h
@@ -7,7 +7,7 @@ class igs028_device : public device_t
public:
igs028_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- UINT16* m_sharedprotram;
+ UINT16* m_sharedprotram;
void IGS028_handle(void);
diff --git a/src/mame/machine/pgmprot_igs025_igs022.c b/src/mame/machine/pgmprot_igs025_igs022.c
index 6b1ba5868aa..7f69ba38a7d 100644
--- a/src/mame/machine/pgmprot_igs025_igs022.c
+++ b/src/mame/machine/pgmprot_igs025_igs022.c
@@ -317,7 +317,7 @@ MACHINE_RESET_MEMBER(pgm_022_025_state,killbld)
void pgm_022_025_state::igs025_to_igs022_callback( void )
{
-// printf("igs025_to_igs022_callback\n");
+// printf("igs025_to_igs022_callback\n");
m_igs022->IGS022_handle_command();
}
@@ -340,7 +340,7 @@ DRIVER_INIT_MEMBER(pgm_022_025_state,drgw3)
{
pgm_basic_init();
pgm_dw3_decrypt();
-
+
// install and configure protection device(s)
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xda5610, 0xda5613, read16_delegate(FUNC(igs025_device::killbld_igs025_prot_r), (igs025_device*)m_igs025), write16_delegate(FUNC(igs025_device::killbld_igs025_prot_w), (igs025_device*)m_igs025));
m_igs022->m_sharedprotram = m_sharedprotram;
@@ -381,12 +381,12 @@ INPUT_PORTS_START( killbld )
PORT_DIPSETTING( 0x0017, DEF_STR( China ) )
PORT_DIPSETTING( 0x0018, DEF_STR( Hong_Kong ) )
PORT_DIPSETTING( 0x0019, DEF_STR( Japan ) )
-// PORT_DIPSETTING( 0x001a, "1a" ) // invalid
-// PORT_DIPSETTING( 0x001b, "1b" ) // invalid
-// PORT_DIPSETTING( 0x001c, "1c" ) // invalid
-// PORT_DIPSETTING( 0x001d, "1d" ) // invalid
-// PORT_DIPSETTING( 0x001e, "1e" ) // invalid
-// PORT_DIPSETTING( 0x001f, "1f" ) // invalid
+// PORT_DIPSETTING( 0x001a, "1a" ) // invalid
+// PORT_DIPSETTING( 0x001b, "1b" ) // invalid
+// PORT_DIPSETTING( 0x001c, "1c" ) // invalid
+// PORT_DIPSETTING( 0x001d, "1d" ) // invalid
+// PORT_DIPSETTING( 0x001e, "1e" ) // invalid
+// PORT_DIPSETTING( 0x001f, "1f" ) // invalid
PORT_DIPSETTING( 0x0020, DEF_STR( Korea ) )
PORT_DIPSETTING( 0x0021, DEF_STR( World ) )
INPUT_PORTS_END
@@ -396,7 +396,7 @@ INPUT_PORTS_START( dw3 )
PORT_MODIFY("Region") /* Region - supplied by protection device */
PORT_CONFNAME( 0x000f, 0x0006, DEF_STR( Region ) )
-// PORT_CONFSETTING( 0x0000, "0" )
+// PORT_CONFSETTING( 0x0000, "0" )
PORT_CONFSETTING( 0x0001, DEF_STR( Japan ) )
PORT_CONFSETTING( 0x0002, DEF_STR( Korea ))
PORT_CONFSETTING( 0x0003, DEF_STR( Taiwan ) )
@@ -413,13 +413,13 @@ INPUT_PORTS_START( dw3j ) // for dw3100 set
PORT_MODIFY("Region") /* Region - supplied by protection device */
PORT_CONFNAME( 0x000f, 0x0001, DEF_STR( Region ) )
-// PORT_CONFSETTING( 0x0000, "0" )
+// PORT_CONFSETTING( 0x0000, "0" )
PORT_CONFSETTING( 0x0001, DEF_STR( Japan ) )
-// PORT_CONFSETTING( 0x0002, DEF_STR( Korea ))
-// PORT_CONFSETTING( 0x0003, DEF_STR( Taiwan ) )
-// PORT_CONFSETTING( 0x0004, DEF_STR( Hong_Kong ) ) // typo Hokg Kong
-// PORT_CONFSETTING( 0x0005, DEF_STR( China ) )
-// PORT_CONFSETTING( 0x0006, DEF_STR( World ) )
-// PORT_CONFSETTING( 0x0007, "Singapore" )
+// PORT_CONFSETTING( 0x0002, DEF_STR( Korea ))
+// PORT_CONFSETTING( 0x0003, DEF_STR( Taiwan ) )
+// PORT_CONFSETTING( 0x0004, DEF_STR( Hong_Kong ) ) // typo Hokg Kong
+// PORT_CONFSETTING( 0x0005, DEF_STR( China ) )
+// PORT_CONFSETTING( 0x0006, DEF_STR( World ) )
+// PORT_CONFSETTING( 0x0007, "Singapore" )
INPUT_PORTS_END
diff --git a/src/mame/machine/pgmprot_igs025_igs028.c b/src/mame/machine/pgmprot_igs025_igs028.c
index 81f10c813c3..a5e6692feea 100644
--- a/src/mame/machine/pgmprot_igs025_igs028.c
+++ b/src/mame/machine/pgmprot_igs025_igs028.c
@@ -174,7 +174,7 @@ ADDRESS_MAP_END
void pgm_028_025_state::igs025_to_igs028_callback( void )
{
-// printf("igs025_to_igs028_callback\n");
+// printf("igs025_to_igs028_callback\n");
m_igs028->IGS028_handle();
}
diff --git a/src/mame/machine/pgmprot_igs027a_type3.c b/src/mame/machine/pgmprot_igs027a_type3.c
index 05e5ea448ce..73a2c2272b3 100644
--- a/src/mame/machine/pgmprot_igs027a_type3.c
+++ b/src/mame/machine/pgmprot_igs027a_type3.c
@@ -243,7 +243,7 @@ READ32_MEMBER(pgm_arm_type3_state::killbldp_speedup_r )
{
int pc = space.device().safe_pc();
if (pc == 0x7d8) space.device().execute().eat_cycles(500);
- //else printf("killbldp_speedup_r %08x\n", pc);
+ //else printf("killbldp_speedup_r %08x\n", pc);
return m_arm_ram2[0x00c/4];
}
diff --git a/src/mame/machine/wpc.c b/src/mame/machine/wpc.c
index d6f6327c272..76861317d28 100644
--- a/src/mame/machine/wpc.c
+++ b/src/mame/machine/wpc.c
@@ -12,15 +12,15 @@ const device_type WPCASIC = &device_creator<wpc_device>;
wpc_device::wpc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig,WPCASIC,"Williams WPC ASIC",tag,owner,clock, "wpc", __FILE__),
- m_irq_cb(*this),
- m_firq_cb(*this),
- m_sounddata_r(*this),
- m_sounddata_w(*this),
- m_soundctrl_r(*this),
- m_soundctrl_w(*this),
- m_sounds11_w(*this),
- m_bank_w(*this),
- m_dmdbank_w(*this)
+ m_irq_cb(*this),
+ m_firq_cb(*this),
+ m_sounddata_r(*this),
+ m_sounddata_w(*this),
+ m_soundctrl_r(*this),
+ m_soundctrl_w(*this),
+ m_sounds11_w(*this),
+ m_bank_w(*this),
+ m_dmdbank_w(*this)
{
}
@@ -81,11 +81,11 @@ READ8_MEMBER(wpc_device::read)
case WPC_SWROWREAD:
sprintf(kbdrow,":INP%X",m_switch_col);
ret = ~ioport(kbdrow)->read();
-// for(x=0;x<8;x++)
-// {
-// if(m_switch_col & (1<<x))
-// ret = m_switches[3+x];
-// }
+// for(x=0;x<8;x++)
+// {
+// if(m_switch_col & (1<<x))
+// ret = m_switches[3+x];
+// }
break;
case WPC_SWCOINDOOR:
ret = ~ioport(":COIN")->read();
@@ -239,4 +239,3 @@ WRITE8_MEMBER(wpc_device::write)
break;
}
}
-
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index 7eacb5a6a9c..0e35329aaf1 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -2338,7 +2338,7 @@ gunfrontj // 1991.01 C71 (c) 1990 Taito Corporation (Japan)
growl // 1991.?? C74 (c) 1990 Taito Corporation Japan (World)
growlu // 1991.02 C74 (c) 1990 Taito America Corporation (US)
runark // 1991.02 C74 (c) 1990 Taito Corporation (Japan)
-growlp // 1991.?? C74 (c) 1990 Taito Corporation Japan (World, prototype)
+growlp // 1991.?? C74 (c) 1990 Taito Corporation Japan (World, prototype)
mjnquest // 1991.05 C77 (c) 1990 Taito Corporation (Japan)
mjnquestb // 1991.05 C77 (c) 1990 Taito Corporation (Japan)
footchmp // 1991.?? C80 (c) 1990 Taito Corporation Japan (World)
@@ -3460,8 +3460,8 @@ jojoban // 27/09/1999 (c) 1999 (Japan)
jojobanr1 // 13/09/1999 (c) 1999 (Japan)
jojobane // 27/09/1999 (c) 1999 (Euro)
jojobaner1 // 13/09/1999 (c) 1999 (Euro)
-cps3boot // bootleg
-cps3boota // bootleg
+cps3boot // bootleg
+cps3boota // bootleg
// Capcom ZN1
cpzn1
@@ -5905,7 +5905,7 @@ wondl96 // (c) 1996 SemiCom
htchctch // (c) 1995 SemiCom
cookbib // (c) 1995 SemiCom
chokchok // (c) 1995 SemiCom
-carket //
+carket //
bcstry // (c) 1997 SemiCom
bcstrya // (c) 1997 SemiCom
semibase // (c) 1997 SemiCom
@@ -8986,7 +8986,7 @@ hrdtimes // (c) 1994
hrdtimesa // (c) 1994
drtomy // (c) 1993 no copyright message (1993 on pcb), some code taken from 'Big Karnak'
sderby // (c) 1996
-sderby2 // (c) 1996
+sderby2 // (c) 1996
croupier // (c) 1997 Playmark
croupiera // (c) 1997 Playmark
spacewin
@@ -9990,7 +9990,7 @@ thedeep // (c) 1987 Wood Place
rundeep // (c) 1988 Cream (bootleg?)
wallc // (c) 1984 Midcoin
wallca // (c) 1984 Midcoin
-sidampkr //
+sidampkr //
wink // (c) 1985 Midcoin
winka // (c) 1985 Midcoin
24cdjuke // (c) 1988 Midcoin
@@ -10231,7 +10231,7 @@ pntnpuzl // Century?
trucocl // (c) 1991 Miky SRL
ertictac // (c) 1992 Sisteme
ertictaca // (c) 1992 Sisteme
-ertictacb // (c) 1992 Sisteme
+ertictacb // (c) 1992 Sisteme
poizone // (c) 1990 Sisteme
ssfindo // (c) 1999 Icarus
ppcar // (c) 1999 Icarus
@@ -10242,7 +10242,7 @@ dambustr // (c) 1981 South West Research
dambustra // (c) 1981 South West Research
dambustruk // (c) 1981 South West Research
gunpey // (c) 2000 Banpresto
-hideseek //
+hideseek //
spaceg // (c) 19??
gldarrow // (c) 1984 Meyco Games
wldarrow // (c) 1982 Meyco Games
diff --git a/src/mame/video/dkong.c b/src/mame/video/dkong.c
index 6f6d1c5a3f0..a6ada535e09 100644
--- a/src/mame/video/dkong.c
+++ b/src/mame/video/dkong.c
@@ -837,9 +837,9 @@ void dkong_state::radarscp_draw_background(bitmap_ind16 &bitmap, const rectangle
void dkong_state::radarscp_scanline(int scanline)
{
const UINT8 *table = m_gfx3;
- int table_len = m_gfx3_len;
- int x,y,offset;
- UINT16 *pixel;
+ int table_len = m_gfx3_len;
+ int x,y,offset;
+ UINT16 *pixel;
const rectangle &visarea = m_screen->visible_area();
y = scanline;
@@ -853,9 +853,9 @@ void dkong_state::radarscp_scanline(int scanline)
pixel = &m_bg_bits.pix16(y, x);
if ((m_counter < table_len) && (x == 4 * (table[m_counter|offset] & 0x7f)))
{
- if ( m_star_ff && (table[m_counter|offset] & 0x80) ) /* star */
+ if ( m_star_ff && (table[m_counter|offset] & 0x80) ) /* star */
*pixel = RADARSCP_STAR_COL;
- else if (m_grid_sig && !(table[m_counter|offset] & 0x80)) /* radar */
+ else if (m_grid_sig && !(table[m_counter|offset] & 0x80)) /* radar */
*pixel = RADARSCP_GRID_COL_OFFSET+m_grid_col;
else
*pixel = RADARSCP_BCK_COL_OFFSET + m_blue_level;
diff --git a/src/mame/video/lethalj.c b/src/mame/video/lethalj.c
index 92b2d276fc6..ed4640292ad 100644
--- a/src/mame/video/lethalj.c
+++ b/src/mame/video/lethalj.c
@@ -142,7 +142,7 @@ void lethalj_state::do_blit()
int pix = source[sx % BLITTER_SOURCE_WIDTH];
if (pix)
dest[dx] = pix;
-
+
}
}
}
diff --git a/src/mame/video/n64.c b/src/mame/video/n64.c
index c59fcee909b..0a4fa38e360 100644
--- a/src/mame/video/n64.c
+++ b/src/mame/video/n64.c
@@ -4,9 +4,9 @@
SGI/Nintendo Reality Display Processor
-------------------
- by MooglyGuy
- based on initial C code by Ville Linde
- contains additional improvements from angrylion, Ziggy, Gonetz and Orkin
+ by MooglyGuy
+ based on initial C code by Ville Linde
+ contains additional improvements from angrylion, Ziggy, Gonetz and Orkin
*******************************************************************************
diff --git a/src/mame/video/rdpbhelp.h b/src/mame/video/rdpbhelp.h
index 6edc3b81e72..b143d0063eb 100644
--- a/src/mame/video/rdpbhelp.h
+++ b/src/mame/video/rdpbhelp.h
@@ -4,8 +4,8 @@
SGI/Nintendo Reality Display Processor Blend Unit (BL) helper macros
-------------------
- by MooglyGuy
- based on code by Ville Linde, MooglyGuy, angrylion, Ziggy, Gonetz and Orkin
+ by MooglyGuy
+ based on code by Ville Linde, MooglyGuy, angrylion, Ziggy, Gonetz and Orkin
******************************************************************************/
@@ -17,41 +17,41 @@
#include "includes/n64.h"
#include "video/n64.h"
-#define DITHER_A(val, dith) \
- if ((val + dith) >= 0x100) \
- { \
- val = 0xff; \
- } \
- else \
- { \
- val += dith; \
+#define DITHER_A(val, dith) \
+ if ((val + dith) >= 0x100) \
+ { \
+ val = 0xff; \
+ } \
+ else \
+ { \
+ val += dith; \
}
-#define DITHER_CHAN(chan, dith) \
- if ((chan & 7) > dith) \
- { \
- chan = (chan & 0xf8) + 8; \
- if (chan > 247) \
- { \
- chan = 255; \
- } \
+#define DITHER_CHAN(chan, dith) \
+ if ((chan & 7) > dith) \
+ { \
+ chan = (chan & 0xf8) + 8; \
+ if (chan > 247) \
+ { \
+ chan = 255; \
+ } \
}
-#define DITHER_RGB(dith) \
- DITHER_CHAN(r, dith) \
- DITHER_CHAN(g, dith) \
+#define DITHER_RGB(dith) \
+ DITHER_CHAN(r, dith) \
+ DITHER_CHAN(g, dith) \
DITHER_CHAN(b, dith)
-#define ALPHA_COMPARE() \
- if (((this)->*(compare[acmode]))(userdata->PixelColor.i.a, userdata, object)) \
- { \
- return false; \
+#define ALPHA_COMPARE() \
+ if (((this)->*(compare[acmode]))(userdata->PixelColor.i.a, userdata, object)) \
+ { \
+ return false; \
}
#define CVG_COMPARE() \
- if (object.OtherModes.antialias_en ? (!userdata->CurrentPixCvg) : (!userdata->CurrentCvgBit)) \
- { \
- return false; \
+ if (object.OtherModes.antialias_en ? (!userdata->CurrentPixCvg) : (!userdata->CurrentCvgBit)) \
+ { \
+ return false; \
}
#define TEST_REJECT() \
@@ -59,112 +59,111 @@
CVG_COMPARE();
#define WRITE_OUT_NB_ND(cycle) \
- *fr = *userdata->ColorInputs.blender1a_r[cycle]; \
- *fg = *userdata->ColorInputs.blender1a_g[cycle]; \
+ *fr = *userdata->ColorInputs.blender1a_r[cycle]; \
+ *fg = *userdata->ColorInputs.blender1a_g[cycle]; \
*fb = *userdata->ColorInputs.blender1a_b[cycle];
#define WRITE_OUT() \
- *fr = r; \
- *fg = g; \
+ *fr = r; \
+ *fg = g; \
*fb = b;
#define WRITE_BLENDED_COLOR() \
- userdata->BlendedPixelColor.i.r = r; \
- userdata->BlendedPixelColor.i.g = g; \
- userdata->BlendedPixelColor.i.b = b; \
+ userdata->BlendedPixelColor.i.r = r; \
+ userdata->BlendedPixelColor.i.g = g; \
+ userdata->BlendedPixelColor.i.b = b; \
userdata->BlendedPixelColor.i.a = userdata->PixelColor.i.a;
#define BLEND_CYCLE0(cyc) \
- userdata->InvPixelColor.i.a = 0xff - *userdata->ColorInputs.blender1b_a[cyc]; \
- ((this)->*(cycle##cyc[sel##cyc]))(&r, &g, &b, userdata, object); \
-
+ userdata->InvPixelColor.i.a = 0xff - *userdata->ColorInputs.blender1b_a[cyc]; \
+ ((this)->*(cycle##cyc[sel##cyc]))(&r, &g, &b, userdata, object);
#define BLEND_CYCLE1(cyc) \
- if (partialreject && userdata->PixelColor.i.a >= 0xff) \
- { \
- ASSIGN_OUT(cyc); \
- } \
- else \
- { \
- userdata->InvPixelColor.i.a = 0xff - *userdata->ColorInputs.blender1b_a[cyc]; \
- ((this)->*(cycle##cyc[sel##cyc]))(&r, &g, &b, userdata, object); \
+ if (partialreject && userdata->PixelColor.i.a >= 0xff) \
+ { \
+ ASSIGN_OUT(cyc); \
+ } \
+ else \
+ { \
+ userdata->InvPixelColor.i.a = 0xff - *userdata->ColorInputs.blender1b_a[cyc]; \
+ ((this)->*(cycle##cyc[sel##cyc]))(&r, &g, &b, userdata, object); \
}
#define BLEND_CYCLE(cyc, check_reject) \
BLEND_CYCLE##check_reject(cyc)
#define BLEND_FACTORS0(cycle) \
- UINT8 blend1a = *userdata->ColorInputs.blender1b_a[cycle] >> 3; \
+ UINT8 blend1a = *userdata->ColorInputs.blender1b_a[cycle] >> 3; \
UINT8 blend2a = *userdata->ColorInputs.blender2b_a[cycle] >> 3;
#define BLEND_FACTORS1(cycle) \
- UINT8 blend1a = (*userdata->ColorInputs.blender1b_a[cycle] >> (3 + userdata->ShiftA)) & 0x1c; \
+ UINT8 blend1a = (*userdata->ColorInputs.blender1b_a[cycle] >> (3 + userdata->ShiftA)) & 0x1c; \
UINT8 blend2a = (*userdata->ColorInputs.blender2b_a[cycle] >> (3 + userdata->ShiftB)) & 0x1c;
-#define BLEND_SUM0() ;
+#define BLEND_SUM0() ;
#define BLEND_SUM1() \
UINT32 sum = ((blend1a >> 2) + (blend2a >> 2) + 1) & 0xf;
-#define BLEND_FACTORS(cycle, special, sum) \
- BLEND_FACTORS##special(cycle); \
+#define BLEND_FACTORS(cycle, special, sum) \
+ BLEND_FACTORS##special(cycle); \
BLEND_SUM##sum();
#define BLEND_MUL(cycle) \
- *r = (((int)(*userdata->ColorInputs.blender1a_r[cycle]) * (int)(blend1a))) + \
- (((int)(*userdata->ColorInputs.blender2a_r[cycle]) * (int)(blend2a))); \
- *g = (((int)(*userdata->ColorInputs.blender1a_g[cycle]) * (int)(blend1a))) + \
- (((int)(*userdata->ColorInputs.blender2a_g[cycle]) * (int)(blend2a))); \
- *b = (((int)(*userdata->ColorInputs.blender1a_b[cycle]) * (int)(blend1a))) + \
+ *r = (((int)(*userdata->ColorInputs.blender1a_r[cycle]) * (int)(blend1a))) + \
+ (((int)(*userdata->ColorInputs.blender2a_r[cycle]) * (int)(blend2a))); \
+ *g = (((int)(*userdata->ColorInputs.blender1a_g[cycle]) * (int)(blend1a))) + \
+ (((int)(*userdata->ColorInputs.blender2a_g[cycle]) * (int)(blend2a))); \
+ *b = (((int)(*userdata->ColorInputs.blender1a_b[cycle]) * (int)(blend1a))) + \
(((int)(*userdata->ColorInputs.blender2a_b[cycle]) * (int)(blend2a)));
#define BLEND_ADD1(cycle) \
- *r += (((int)*userdata->ColorInputs.blender2a_r[cycle]) << 2); \
- *g += (((int)*userdata->ColorInputs.blender2a_g[cycle]) << 2); \
+ *r += (((int)*userdata->ColorInputs.blender2a_r[cycle]) << 2); \
+ *g += (((int)*userdata->ColorInputs.blender2a_g[cycle]) << 2); \
*b += (((int)*userdata->ColorInputs.blender2a_b[cycle]) << 2);
#define BLEND_ADD0(cycle) \
- *r += (int)*userdata->ColorInputs.blender2a_r[cycle]; \
- *g += (int)*userdata->ColorInputs.blender2a_g[cycle]; \
+ *r += (int)*userdata->ColorInputs.blender2a_r[cycle]; \
+ *g += (int)*userdata->ColorInputs.blender2a_g[cycle]; \
*b += (int)*userdata->ColorInputs.blender2a_b[cycle];
-#define BLEND_ADD(cycle, special) \
+#define BLEND_ADD(cycle, special) \
BLEND_ADD##special(cycle);
-#define BLEND_SHIFT(shift) \
- *r >>= shift; \
- *g >>= shift; \
+#define BLEND_SHIFT(shift) \
+ *r >>= shift; \
+ *g >>= shift; \
*b >>= shift;
-#define BLEND_CLAMP() \
- if (*r > 255) *r = 255; \
- if (*g > 255) *g = 255; \
+#define BLEND_CLAMP() \
+ if (*r > 255) *r = 255; \
+ if (*g > 255) *g = 255; \
if (*b > 255) *b = 255;
-#define BLEND_SCALE() \
- if (sum) \
- { \
- *r /= sum; \
- *g /= sum; \
- *b /= sum; \
- } \
- else \
- { \
- *r = *g = *b = 0xff; \
+#define BLEND_SCALE() \
+ if (sum) \
+ { \
+ *r /= sum; \
+ *g /= sum; \
+ *b /= sum; \
+ } \
+ else \
+ { \
+ *r = *g = *b = 0xff; \
}
-#define BLEND_SCALE_CLAMP0() \
+#define BLEND_SCALE_CLAMP0() \
BLEND_CLAMP();
-#define BLEND_SCALE_CLAMP1() \
- BLEND_SCALE(); \
+#define BLEND_SCALE_CLAMP1() \
+ BLEND_SCALE(); \
BLEND_CLAMP();
-#define BLEND_SCALE_CLAMP(sum) \
+#define BLEND_SCALE_CLAMP(sum) \
BLEND_SCALE_CLAMP##sum();
#define ASSIGN_OUT(cycle) \
- r = *userdata->ColorInputs.blender1a_r[cycle]; \
- g = *userdata->ColorInputs.blender1a_g[cycle]; \
+ r = *userdata->ColorInputs.blender1a_r[cycle]; \
+ g = *userdata->ColorInputs.blender1a_g[cycle]; \
b = *userdata->ColorInputs.blender1a_b[cycle];
-#endif // _VIDEO_RDPBHELP_H_ \ No newline at end of file
+#endif // _VIDEO_RDPBHELP_H_
diff --git a/src/mame/video/rdpblend.c b/src/mame/video/rdpblend.c
index f4cb91f4bd8..14b510f14fc 100644
--- a/src/mame/video/rdpblend.c
+++ b/src/mame/video/rdpblend.c
@@ -4,9 +4,9 @@
SGI/Nintendo Reality Display Processor Blend Unit (BL)
-------------------
- by MooglyGuy
- based on initial C code by Ville Linde
- contains additional improvements from angrylion, Ziggy, Gonetz and Orkin
+ by MooglyGuy
+ based on initial C code by Ville Linde
+ contains additional improvements from angrylion, Ziggy, Gonetz and Orkin
******************************************************************************/
@@ -282,11 +282,11 @@ bool N64BlenderT::Blend2CycleBlendACVGDither(UINT32* fr, UINT32* fg, UINT32* fb,
return true;
}
-#define BLEND_PIPE(cycle, special, sum, shift) \
- BLEND_FACTORS(cycle, special, sum); \
- BLEND_MUL(cycle); \
- BLEND_ADD(cycle, special); \
- BLEND_SHIFT(shift); \
+#define BLEND_PIPE(cycle, special, sum, shift) \
+ BLEND_FACTORS(cycle, special, sum); \
+ BLEND_MUL(cycle); \
+ BLEND_ADD(cycle, special); \
+ BLEND_SHIFT(shift); \
BLEND_SCALE_CLAMP(sum);
void N64BlenderT::BlendEquationCycle0NoForceNoSpecial(int* r, int* g, int* b, rdp_span_aux *userdata, const rdp_poly_state& object)
diff --git a/src/mame/video/rdpblend.h b/src/mame/video/rdpblend.h
index a1d201babb4..aa8f52f7b54 100644
--- a/src/mame/video/rdpblend.h
+++ b/src/mame/video/rdpblend.h
@@ -4,9 +4,9 @@
SGI/Nintendo Reality Display Processor Blend Unit (BL)
-------------------
- by MooglyGuy
- based on initial C code by Ville Linde
- contains additional improvements from angrylion, Ziggy, Gonetz and Orkin
+ by MooglyGuy
+ based on initial C code by Ville Linde
+ contains additional improvements from angrylion, Ziggy, Gonetz and Orkin
******************************************************************************/
@@ -33,8 +33,8 @@ class N64BlenderT
N64BlenderT();
- Blender1 blend1[8];
- Blender2 blend2[8];
+ Blender1 blend1[8];
+ Blender2 blend2[8];
void SetMachine(running_machine& machine) { m_machine = &machine; }
void SetProcessor(n64_rdp* rdp) { m_rdp = rdp; }
@@ -45,23 +45,23 @@ class N64BlenderT
running_machine* m_machine;
n64_rdp* m_rdp;
- bool Blend1CycleNoBlendNoACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend1CycleNoBlendNoACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend1CycleNoBlendACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend1CycleNoBlendACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend1CycleBlendNoACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend1CycleBlendNoACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend1CycleBlendACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend1CycleBlendACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
-
- bool Blend2CycleNoBlendNoACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend2CycleNoBlendNoACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend2CycleNoBlendACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend2CycleNoBlendACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend2CycleBlendNoACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend2CycleBlendNoACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend2CycleBlendACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
- bool Blend2CycleBlendACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend1CycleNoBlendNoACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend1CycleNoBlendNoACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend1CycleNoBlendACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend1CycleNoBlendACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend1CycleBlendNoACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend1CycleBlendNoACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend1CycleBlendACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend1CycleBlendACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+
+ bool Blend2CycleNoBlendNoACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend2CycleNoBlendNoACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend2CycleNoBlendACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend2CycleNoBlendACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend2CycleBlendNoACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend2CycleBlendNoACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend2CycleBlendACVGNoDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool Blend2CycleBlendACVGDither(UINT32* fr, UINT32* fg, UINT32* fb, int dith, int adseed, int partialreject, int sel0, int sel1, int acmode, rdp_span_aux *userdata, const rdp_poly_state& object);
void BlendEquationCycle0NoForceNoSpecial(INT32* r, INT32* g, INT32* b, rdp_span_aux *userdata, const rdp_poly_state& object);
void BlendEquationCycle0NoForceSpecial(INT32* r, INT32* g, INT32* b, rdp_span_aux *userdata, const rdp_poly_state& object);
@@ -73,13 +73,13 @@ class N64BlenderT
void BlendEquationCycle1ForceNoSpecial(INT32* r, INT32* g, INT32* b, rdp_span_aux *userdata, const rdp_poly_state& object);
void BlendEquationCycle1ForceSpecial(INT32* r, INT32* g, INT32* b, rdp_span_aux *userdata, const rdp_poly_state& object);
- BlendEquation cycle0[4];
- BlendEquation cycle1[4];
- AlphaCompare compare[4];
+ BlendEquation cycle0[4];
+ BlendEquation cycle1[4];
+ AlphaCompare compare[4];
- bool AlphaCompareNone(UINT8 alpha, const rdp_span_aux *userdata, const rdp_poly_state& object);
- bool AlphaCompareNoDither(UINT8 alpha, const rdp_span_aux *userdata, const rdp_poly_state& object);
- bool AlphaCompareDither(UINT8 alpha, const rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool AlphaCompareNone(UINT8 alpha, const rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool AlphaCompareNoDither(UINT8 alpha, const rdp_span_aux *userdata, const rdp_poly_state& object);
+ bool AlphaCompareDither(UINT8 alpha, const rdp_span_aux *userdata, const rdp_poly_state& object);
void DitherRGB(INT32* r, INT32* g, INT32* b, int dith);
void DitherA(UINT8* a, int dith);
diff --git a/src/mame/video/rdpspn16.c b/src/mame/video/rdpspn16.c
index ffebcca6ee9..158f968332c 100644
--- a/src/mame/video/rdpspn16.c
+++ b/src/mame/video/rdpspn16.c
@@ -4,9 +4,9 @@
SGI/Nintendo Reality Display Processor span-drawing functions
-------------------
- by MooglyGuy
- based on initial C code by Ville Linde
- contains additional improvements from angrylion, Ziggy, Gonetz and Orkin
+ by MooglyGuy
+ based on initial C code by Ville Linde
+ contains additional improvements from angrylion, Ziggy, Gonetz and Orkin
******************************************************************************/
diff --git a/src/mame/video/rdptpipe.c b/src/mame/video/rdptpipe.c
index 7a10a11eb45..f5a83096a95 100644
--- a/src/mame/video/rdptpipe.c
+++ b/src/mame/video/rdptpipe.c
@@ -4,9 +4,9 @@
SGI/Nintendo Reality Display Texture Fetch Unit (TF)
-------------------
- by MooglyGuy
- based on initial C code by Ville Linde
- contains additional improvements from angrylion, Ziggy, Gonetz and Orkin
+ by MooglyGuy
+ based on initial C code by Ville Linde
+ contains additional improvements from angrylion, Ziggy, Gonetz and Orkin
******************************************************************************/
@@ -62,23 +62,23 @@ void N64TexturePipeT::Mask(INT32* S, INT32* T, INT32 num, const rdp_poly_state&
}
#define MASK_COUPLED(param, param1, num, coord) \
- if (tiles[num].mask_##coord) \
- { \
- INT32 maskbits_##coord = m_maskbits_table[tiles[num].mask_##coord]; \
- if (tiles[num].m##coord) \
- { \
- INT32 wrapthreshold = tiles[num].mask_##coord > 10 ? 10 : tiles[num].mask_##coord; \
- if ((param >> wrapthreshold) & 1) \
- { \
- param = ~param; \
- } \
- if ((param1 >> wrapthreshold) & 1) \
- { \
- param1 = ~param1; \
- } \
- } \
- param &= maskbits_##coord; \
- param1 &= maskbits_##coord; \
+ if (tiles[num].mask_##coord) \
+ { \
+ INT32 maskbits_##coord = m_maskbits_table[tiles[num].mask_##coord]; \
+ if (tiles[num].m##coord) \
+ { \
+ INT32 wrapthreshold = tiles[num].mask_##coord > 10 ? 10 : tiles[num].mask_##coord; \
+ if ((param >> wrapthreshold) & 1) \
+ { \
+ param = ~param; \
+ } \
+ if ((param1 >> wrapthreshold) & 1) \
+ { \
+ param1 = ~param1; \
+ } \
+ } \
+ param &= maskbits_##coord; \
+ param1 &= maskbits_##coord; \
}
void N64TexturePipeT::MaskCoupled(INT32* S, INT32* S1, INT32* T, INT32* T1, INT32 num, const rdp_poly_state& object)
@@ -128,17 +128,17 @@ void N64TexturePipeT::MaskCoupled(INT32* S, INT32* S1, INT32* T, INT32* T1, INT3
}
}
-#define SHIFT_CYCLE(param, max, num, coord) \
- param = SIGN16(param); \
- if (tiles[num].shift_##coord < 11) \
- { \
- param >>= tiles[num].shift_##coord; \
- } \
- else \
- { \
- param <<= (16 - tiles[num].shift_##coord); \
- } \
- param = SIGN16(param); \
+#define SHIFT_CYCLE(param, max, num, coord) \
+ param = SIGN16(param); \
+ if (tiles[num].shift_##coord < 11) \
+ { \
+ param >>= tiles[num].shift_##coord; \
+ } \
+ else \
+ { \
+ param <<= (16 - tiles[num].shift_##coord); \
+ } \
+ param = SIGN16(param); \
max = ((param >> 3) >= tiles[num].coord##h);
void N64TexturePipeT::ShiftCycle(INT32* S, INT32* T, INT32* maxs, INT32* maxt, UINT32 num, const rdp_poly_state& object)
@@ -194,27 +194,27 @@ void N64TexturePipeT::ShiftCopy(INT32* S, INT32* T, UINT32 num, const rdp_poly_s
*T = SIGN16(*T);
}
-#define CLAMP_CYCLE(param, frac, max, num, coord) \
- if (tiles[num].c##coord || !tiles[num].mask_##coord) \
- { \
- if (param & 0x10000) \
- { \
- param = 0; \
- frac = 0; \
- } \
- else if (max) \
- { \
- param = m_clamp_##coord##_diff[num]; \
- frac = 0; \
- } \
- else \
- { \
- param = (SIGN17(param) >> 5) & 0x1fff; \
- } \
- } \
- else \
- { \
- param = (SIGN17(param) >> 5) & 0x1fff; \
+#define CLAMP_CYCLE(param, frac, max, num, coord) \
+ if (tiles[num].c##coord || !tiles[num].mask_##coord) \
+ { \
+ if (param & 0x10000) \
+ { \
+ param = 0; \
+ frac = 0; \
+ } \
+ else if (max) \
+ { \
+ param = m_clamp_##coord##_diff[num]; \
+ frac = 0; \
+ } \
+ else \
+ { \
+ param = (SIGN17(param) >> 5) & 0x1fff; \
+ } \
+ } \
+ else \
+ { \
+ param = (SIGN17(param) >> 5) & 0x1fff; \
}
void N64TexturePipeT::ClampCycle(INT32* S, INT32* T, INT32* SFRAC, INT32* TFRAC, INT32 maxs, INT32 maxt, INT32 num, rdp_span_aux *userdata, const rdp_poly_state& object, INT32 *m_clamp_s_diff, INT32 *m_clamp_t_diff)
diff --git a/src/mame/video/rdptpipe.h b/src/mame/video/rdptpipe.h
index 1b16ecc64ff..80666f6dddb 100644
--- a/src/mame/video/rdptpipe.h
+++ b/src/mame/video/rdptpipe.h
@@ -4,9 +4,9 @@
SGI/Nintendo Reality Display Texture Fetch Unit (TF)
-------------------
- by MooglyGuy
- based on initial C code by Ville Linde
- contains additional improvements from angrylion, Ziggy, Gonetz and Orkin
+ by MooglyGuy
+ based on initial C code by Ville Linde
+ contains additional improvements from angrylion, Ziggy, Gonetz and Orkin
******************************************************************************/
@@ -98,7 +98,7 @@ class N64TexturePipeT
void CycleLinear(Color* TEX, Color* prev, INT32 SSS, INT32 SST, UINT32 tilenum, UINT32 cycle, rdp_span_aux *userdata, const rdp_poly_state& object, INT32 *m_clamp_s_diff, INT32 *m_clamp_t_diff);
void CycleLinearLerp(Color* TEX, Color* prev, INT32 SSS, INT32 SST, UINT32 tilenum, UINT32 cycle, rdp_span_aux *userdata, const rdp_poly_state& object, INT32 *m_clamp_s_diff, INT32 *m_clamp_t_diff);
- Cycler cycle[4];
+ Cycler cycle[4];
void Copy(Color* TEX, INT32 SSS, INT32 SST, UINT32 tilenum, const rdp_poly_state& object, rdp_span_aux *userdata);
UINT32 Fetch(INT32 SSS, INT32 SST, INT32 tile, const rdp_poly_state& object, rdp_span_aux *userdata);
diff --git a/src/mame/video/tia.c b/src/mame/video/tia.c
index 0259b1a33be..5e86088025e 100644
--- a/src/mame/video/tia.c
+++ b/src/mame/video/tia.c
@@ -50,112 +50,112 @@ PALETTE_INIT_MEMBER(tia_ntsc_video_device, tia_ntsc)
int i, j;
/********************************
Phase Shift 24.7
- { 0.000, 0.000 },
- { 0.192, -0.127 },
- { 0.239, -0.052 },
- { 0.244, 0.030 },
- { 0.201, 0.108 },
- { 0.125, 0.166 },
- { 0.026, 0.194 },
- { -0.080, 0.185 },
- { -0.169, 0.145 },
- { -0.230, 0.077 },
- { -0.247, -0.006 },
- { -0.220, -0.087 },
- { -0.152, -0.153 },
- { -0.057, -0.189 },
- { 0.049, -0.193 },
- { 0.144, -0.161 }
+ { 0.000, 0.000 },
+ { 0.192, -0.127 },
+ { 0.239, -0.052 },
+ { 0.244, 0.030 },
+ { 0.201, 0.108 },
+ { 0.125, 0.166 },
+ { 0.026, 0.194 },
+ { -0.080, 0.185 },
+ { -0.169, 0.145 },
+ { -0.230, 0.077 },
+ { -0.247, -0.006 },
+ { -0.220, -0.087 },
+ { -0.152, -0.153 },
+ { -0.057, -0.189 },
+ { 0.049, -0.193 },
+ { 0.144, -0.161 }
Phase Shift 25.2
- { 0.000, 0.000 },
- { 0.192, -0.127 },
- { 0.239, -0.052 },
- { 0.244, 0.033 },
- { 0.200, 0.113 },
- { 0.119, 0.169 },
- { 0.013, 0.195 },
- { -0.094, 0.183 },
- { -0.182, 0.136 },
- { -0.237, 0.062 },
- { -0.245, -0.020 },
- { -0.210, -0.103 },
- { -0.131, -0.164 },
- { -0.027, -0.193 },
- { 0.079, -0.187 },
- { 0.169, -0.145 }
+ { 0.000, 0.000 },
+ { 0.192, -0.127 },
+ { 0.239, -0.052 },
+ { 0.244, 0.033 },
+ { 0.200, 0.113 },
+ { 0.119, 0.169 },
+ { 0.013, 0.195 },
+ { -0.094, 0.183 },
+ { -0.182, 0.136 },
+ { -0.237, 0.062 },
+ { -0.245, -0.020 },
+ { -0.210, -0.103 },
+ { -0.131, -0.164 },
+ { -0.027, -0.193 },
+ { 0.079, -0.187 },
+ { 0.169, -0.145 }
Phase Shift 25.7
- { 0.000, 0.000 },
- { 0.192, -0.127 },
- { 0.243, -0.049 },
- { 0.242, 0.038 },
- { 0.196, 0.116 },
- { 0.109, 0.172 },
- { 0.005, 0.196 },
- { -0.104, 0.178 },
- { -0.192, 0.127 },
- { -0.241, 0.051 },
- { -0.244, -0.037 },
- { -0.197, -0.115 },
- { -0.112, -0.173 },
- { -0.004, -0.197 },
- { 0.102, -0.179 },
- { 0.190, -0.128 }
+ { 0.000, 0.000 },
+ { 0.192, -0.127 },
+ { 0.243, -0.049 },
+ { 0.242, 0.038 },
+ { 0.196, 0.116 },
+ { 0.109, 0.172 },
+ { 0.005, 0.196 },
+ { -0.104, 0.178 },
+ { -0.192, 0.127 },
+ { -0.241, 0.051 },
+ { -0.244, -0.037 },
+ { -0.197, -0.115 },
+ { -0.112, -0.173 },
+ { -0.004, -0.197 },
+ { 0.102, -0.179 },
+ { 0.190, -0.128 }
Phase Shift 26.7
- { 0.000, 0.000 },
- { 0.192, -0.127 },
- { 0.242, -0.046 },
- { 0.240, 0.044 },
- { 0.187, 0.125 },
- { 0.092, 0.180 },
- { -0.020, 0.195 },
- { -0.128, 0.170 },
- { -0.210, 0.107 },
- { -0.247, 0.022 },
- { -0.231, -0.067 },
- { -0.166, -0.142 },
- { -0.064, -0.188 },
- { 0.049, -0.193 },
- { 0.154, -0.155 },
- { 0.227, -0.086 }
+ { 0.000, 0.000 },
+ { 0.192, -0.127 },
+ { 0.242, -0.046 },
+ { 0.240, 0.044 },
+ { 0.187, 0.125 },
+ { 0.092, 0.180 },
+ { -0.020, 0.195 },
+ { -0.128, 0.170 },
+ { -0.210, 0.107 },
+ { -0.247, 0.022 },
+ { -0.231, -0.067 },
+ { -0.166, -0.142 },
+ { -0.064, -0.188 },
+ { 0.049, -0.193 },
+ { 0.154, -0.155 },
+ { 0.227, -0.086 }
Phase Shift 27.2
- { 0.000, 0.000 },
- { 0.192, -0.127 },
- { 0.243, -0.044 },
- { 0.239, 0.047 },
- { 0.183, 0.129 },
- { 0.087, 0.181 },
- { -0.029, 0.195 },
- { -0.138, 0.164 },
- { -0.217, 0.098 },
- { -0.246, 0.009 },
- { -0.223, -0.081 },
- { -0.149, -0.153 },
- { -0.041, -0.192 },
- { 0.073, -0.188 },
- { 0.173, -0.142 },
- { 0.235, -0.067 }
+ { 0.000, 0.000 },
+ { 0.192, -0.127 },
+ { 0.243, -0.044 },
+ { 0.239, 0.047 },
+ { 0.183, 0.129 },
+ { 0.087, 0.181 },
+ { -0.029, 0.195 },
+ { -0.138, 0.164 },
+ { -0.217, 0.098 },
+ { -0.246, 0.009 },
+ { -0.223, -0.081 },
+ { -0.149, -0.153 },
+ { -0.041, -0.192 },
+ { 0.073, -0.188 },
+ { 0.173, -0.142 },
+ { 0.235, -0.067 }
Phase Shift 27.7
- { 0.000, 0.000 },
- { 0.192, -0.127 },
- { 0.243, -0.044 },
- { 0.238, 0.051 },
- { 0.178, 0.134 },
- { 0.078, 0.184 },
- { -0.041, 0.194 },
- { -0.151, 0.158 },
- { -0.224, 0.087 },
- { -0.248, -0.005 },
- { -0.214, -0.096 },
- { -0.131, -0.164 },
- { -0.019, -0.195 },
- { 0.099, -0.182 },
- { 0.194, -0.126 },
- { 0.244, -0.042 }
+ { 0.000, 0.000 },
+ { 0.192, -0.127 },
+ { 0.243, -0.044 },
+ { 0.238, 0.051 },
+ { 0.178, 0.134 },
+ { 0.078, 0.184 },
+ { -0.041, 0.194 },
+ { -0.151, 0.158 },
+ { -0.224, 0.087 },
+ { -0.248, -0.005 },
+ { -0.214, -0.096 },
+ { -0.131, -0.164 },
+ { -0.019, -0.195 },
+ { 0.099, -0.182 },
+ { 0.194, -0.126 },
+ { 0.244, -0.042 }
**********************************/
static const double color[16][2] =
diff --git a/src/mess/drivers/a7800.c b/src/mess/drivers/a7800.c
index 0ab4845df74..da93bc8618e 100644
--- a/src/mess/drivers/a7800.c
+++ b/src/mess/drivers/a7800.c
@@ -62,13 +62,13 @@
added.
2013/10/16 Robert Tuccitto Added Phase Shifts 24.7, 25.2, 26.2, 27.2.
- Phase Shifts 24.7 through 27.7 degrees with 0.5 degree
+ Phase Shifts 24.7 through 27.7 degrees with 0.5 degree
increments documented. Phase Shift 26.2 degrees made active.
Fixed typo under 26.7 7$.
2013/10/27 Robert Tuccitto Modernized screen parameters for NTSC & PAL.
- 2013/11/03 Fixed correctly typo under 26.7 7$.
+ 2013/11/03 Fixed correctly typo under 26.7 7$.
***************************************************************************/
#include "emu.h"
@@ -98,18 +98,18 @@ static ADDRESS_MAP_START( a7800_mem, AS_PROGRAM, 8, a7800_state )
AM_RANGE(0x0460, 0x046f) /* XBOARD POKEY2 */
AM_RANGE(0x0470, 0x047f) /* XBOARD CTRL */
AM_RANGE(0x0480, 0x04ff) AM_MIRROR(0x100) AM_RAM /* RIOT RAM */
- AM_RANGE(0x1000, 0x17ff) AM_RAM /* hs SRAM */
+ AM_RANGE(0x1000, 0x17ff) AM_RAM /* hs SRAM */
AM_RANGE(0x1800, 0x27ff) AM_RAM
AM_RANGE(0x2800, 0x2fff) AM_RAMBANK("bank7") /* MAINRAM */
AM_RANGE(0x3000, 0x37ff) AM_RAMBANK("bank7") /* MAINRAM */
AM_RANGE(0x3800, 0x3fff) AM_RAMBANK("bank7") /* MAINRAM */
- AM_RANGE(0x3000, 0x3fff) AM_ROM /* hs ROM space */
+ AM_RANGE(0x3000, 0x3fff) AM_ROM /* hs ROM space */
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") /* f18 hornet */
AM_RANGE(0x4000, 0xffff) AM_WRITE(a7800_cart_w) /* XBOARD SRAM */
- AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank2") /* sc */
+ AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank2") /* sc */
AM_RANGE(0xa000, 0xbfff) AM_ROMBANK("bank3") /* sc + ac */
AM_RANGE(0xc000, 0xdfff) AM_ROMBANK("bank4") /* ac */
- AM_RANGE(0xe000, 0xffff) AM_ROM
+ AM_RANGE(0xe000, 0xffff) AM_ROM
ADDRESS_MAP_END
@@ -160,100 +160,100 @@ INPUT_PORTS_END
***************************************************************************/
#define NTSC_GREY \
- MAKE_RGB(0x00,0x00,0x00), MAKE_RGB(0x11,0x11,0x11), MAKE_RGB(0x22,0x22,0x22), MAKE_RGB(0x33,0x33,0x33), \
- MAKE_RGB(0x44,0x44,0x44), MAKE_RGB(0x55,0x55,0x55), MAKE_RGB(0x66,0x66,0x66), MAKE_RGB(0x77,0x77,0x77), \
- MAKE_RGB(0x88,0x88,0x88), MAKE_RGB(0x99,0x99,0x99), MAKE_RGB(0xAA,0xAA,0xAA), MAKE_RGB(0xBB,0xBB,0xBB), \
- MAKE_RGB(0xCC,0xCC,0xCC), MAKE_RGB(0xDD,0xDD,0xDD), MAKE_RGB(0xEE,0xEE,0xEE), MAKE_RGB(0xFF,0xFF,0xFF )
+ MAKE_RGB(0x00,0x00,0x00), MAKE_RGB(0x11,0x11,0x11), MAKE_RGB(0x22,0x22,0x22), MAKE_RGB(0x33,0x33,0x33), \
+ MAKE_RGB(0x44,0x44,0x44), MAKE_RGB(0x55,0x55,0x55), MAKE_RGB(0x66,0x66,0x66), MAKE_RGB(0x77,0x77,0x77), \
+ MAKE_RGB(0x88,0x88,0x88), MAKE_RGB(0x99,0x99,0x99), MAKE_RGB(0xAA,0xAA,0xAA), MAKE_RGB(0xBB,0xBB,0xBB), \
+ MAKE_RGB(0xCC,0xCC,0xCC), MAKE_RGB(0xDD,0xDD,0xDD), MAKE_RGB(0xEE,0xEE,0xEE), MAKE_RGB(0xFF,0xFF,0xFF )
#define NTSC_GOLD \
- MAKE_RGB(0x1A,0x07,0x00), MAKE_RGB(0x2B,0x18,0x00), MAKE_RGB(0x3C,0x29,0x00), MAKE_RGB(0x4D,0x3A,0x00), \
- MAKE_RGB(0x5E,0x4B,0x00), MAKE_RGB(0x6F,0x5C,0x00), MAKE_RGB(0x80,0x6D,0x00), MAKE_RGB(0x91,0x7E,0x09), \
- MAKE_RGB(0xA2,0x8F,0x1A), MAKE_RGB(0xB3,0xA0,0x2B), MAKE_RGB(0xC4,0xB1,0x3C), MAKE_RGB(0xD5,0xC2,0x4D), \
- MAKE_RGB(0xE6,0xD3,0x5E), MAKE_RGB(0xF7,0xE4,0x6F), MAKE_RGB(0xFF,0xF5,0x83), MAKE_RGB(0xFF,0xF7,0x97 )
+ MAKE_RGB(0x1A,0x07,0x00), MAKE_RGB(0x2B,0x18,0x00), MAKE_RGB(0x3C,0x29,0x00), MAKE_RGB(0x4D,0x3A,0x00), \
+ MAKE_RGB(0x5E,0x4B,0x00), MAKE_RGB(0x6F,0x5C,0x00), MAKE_RGB(0x80,0x6D,0x00), MAKE_RGB(0x91,0x7E,0x09), \
+ MAKE_RGB(0xA2,0x8F,0x1A), MAKE_RGB(0xB3,0xA0,0x2B), MAKE_RGB(0xC4,0xB1,0x3C), MAKE_RGB(0xD5,0xC2,0x4D), \
+ MAKE_RGB(0xE6,0xD3,0x5E), MAKE_RGB(0xF7,0xE4,0x6F), MAKE_RGB(0xFF,0xF5,0x83), MAKE_RGB(0xFF,0xF7,0x97 )
#define NTSC_ORANGE \
- MAKE_RGB(0x31,0x00,0x00), MAKE_RGB(0x42,0x06,0x00), MAKE_RGB(0x53,0x17,0x00), MAKE_RGB(0x64,0x28,0x00), \
- MAKE_RGB(0x75,0x39,0x00), MAKE_RGB(0x86,0X4A,0x00), MAKE_RGB(0x97,0x5B,0x0B), MAKE_RGB(0xA8,0x6C,0x1C), \
- MAKE_RGB(0xB9,0x7D,0x2D), MAKE_RGB(0xCA,0x8E,0x3E), MAKE_RGB(0xDB,0x9F,0x4F), MAKE_RGB(0xEC,0xB0,0x60), \
- MAKE_RGB(0xFD,0xC1,0x71), MAKE_RGB(0xFF,0xD2,0x86), MAKE_RGB(0xFF,0xE3,0x9D), MAKE_RGB(0xFF,0xF4,0xB3 )
+ MAKE_RGB(0x31,0x00,0x00), MAKE_RGB(0x42,0x06,0x00), MAKE_RGB(0x53,0x17,0x00), MAKE_RGB(0x64,0x28,0x00), \
+ MAKE_RGB(0x75,0x39,0x00), MAKE_RGB(0x86,0X4A,0x00), MAKE_RGB(0x97,0x5B,0x0B), MAKE_RGB(0xA8,0x6C,0x1C), \
+ MAKE_RGB(0xB9,0x7D,0x2D), MAKE_RGB(0xCA,0x8E,0x3E), MAKE_RGB(0xDB,0x9F,0x4F), MAKE_RGB(0xEC,0xB0,0x60), \
+ MAKE_RGB(0xFD,0xC1,0x71), MAKE_RGB(0xFF,0xD2,0x86), MAKE_RGB(0xFF,0xE3,0x9D), MAKE_RGB(0xFF,0xF4,0xB3 )
#define NTSC_RED_ORANGE \
- MAKE_RGB(0x3E,0x00,0x00), MAKE_RGB(0x4F,0x00,0x00), MAKE_RGB(0x60,0x08,0x00), MAKE_RGB(0x71,0x19,0x00), \
- MAKE_RGB(0x82,0x2A,0x0F), MAKE_RGB(0x93,0x3B,0x20), MAKE_RGB(0xA4,0x4C,0x31), MAKE_RGB(0xB5,0x5D,0x42), \
- MAKE_RGB(0xC6,0x6E,0x53), MAKE_RGB(0xD7,0x7F,0x64), MAKE_RGB(0xE8,0x90,0x75), MAKE_RGB(0xF9,0xA1,0x86), \
- MAKE_RGB(0xFF,0xB2,0x9A), MAKE_RGB(0xFF,0xC3,0xB0), MAKE_RGB(0xFF,0xD4,0xC6), MAKE_RGB(0xFF,0xE5,0xDC )
+ MAKE_RGB(0x3E,0x00,0x00), MAKE_RGB(0x4F,0x00,0x00), MAKE_RGB(0x60,0x08,0x00), MAKE_RGB(0x71,0x19,0x00), \
+ MAKE_RGB(0x82,0x2A,0x0F), MAKE_RGB(0x93,0x3B,0x20), MAKE_RGB(0xA4,0x4C,0x31), MAKE_RGB(0xB5,0x5D,0x42), \
+ MAKE_RGB(0xC6,0x6E,0x53), MAKE_RGB(0xD7,0x7F,0x64), MAKE_RGB(0xE8,0x90,0x75), MAKE_RGB(0xF9,0xA1,0x86), \
+ MAKE_RGB(0xFF,0xB2,0x9A), MAKE_RGB(0xFF,0xC3,0xB0), MAKE_RGB(0xFF,0xD4,0xC6), MAKE_RGB(0xFF,0xE5,0xDC )
#define NTSC_PINK \
- MAKE_RGB(0x3E,0x00,0x06), MAKE_RGB(0x4F,0x00,0x12), MAKE_RGB(0x60,0x00,0x1E), MAKE_RGB(0x71,0x0E,0x2E), \
- MAKE_RGB(0x82,0x1F,0x3F), MAKE_RGB(0x93,0x30,0x50), MAKE_RGB(0xA4,0x41,0x61), MAKE_RGB(0xB5,0x52,0x72), \
- MAKE_RGB(0xC6,0x63,0x83), MAKE_RGB(0xD7,0x74,0x94), MAKE_RGB(0xE8,0x85,0xA5), MAKE_RGB(0xF9,0x96,0xB6), \
- MAKE_RGB(0xFF,0xA7,0xCB), MAKE_RGB(0xFF,0xB8,0xE1), MAKE_RGB(0xFF,0xC9,0xEF), MAKE_RGB(0xFF,0xDA,0xF4 )
+ MAKE_RGB(0x3E,0x00,0x06), MAKE_RGB(0x4F,0x00,0x12), MAKE_RGB(0x60,0x00,0x1E), MAKE_RGB(0x71,0x0E,0x2E), \
+ MAKE_RGB(0x82,0x1F,0x3F), MAKE_RGB(0x93,0x30,0x50), MAKE_RGB(0xA4,0x41,0x61), MAKE_RGB(0xB5,0x52,0x72), \
+ MAKE_RGB(0xC6,0x63,0x83), MAKE_RGB(0xD7,0x74,0x94), MAKE_RGB(0xE8,0x85,0xA5), MAKE_RGB(0xF9,0x96,0xB6), \
+ MAKE_RGB(0xFF,0xA7,0xCB), MAKE_RGB(0xFF,0xB8,0xE1), MAKE_RGB(0xFF,0xC9,0xEF), MAKE_RGB(0xFF,0xDA,0xF4 )
#define NTSC_PURPLE \
- MAKE_RGB(0x32,0x00,0x38), MAKE_RGB(0x43,0x00,0x44), MAKE_RGB(0x54,0x00,0x50), MAKE_RGB(0x65,0x0C,0x5F), \
- MAKE_RGB(0x76,0x1D,0x70), MAKE_RGB(0x87,0x2E,0x81), MAKE_RGB(0x98,0x3F,0x92), MAKE_RGB(0xA9,0x50,0xA3), \
- MAKE_RGB(0xBA,0x61,0xB4), MAKE_RGB(0xCB,0x72,0xC5), MAKE_RGB(0xDC,0x83,0xD6), MAKE_RGB(0xED,0x94,0xE4), \
- MAKE_RGB(0xFE,0xA5,0xE4), MAKE_RGB(0xFF,0xB6,0xE9), MAKE_RGB(0xFF,0xC7,0xEE), MAKE_RGB(0xFF,0xD8,0xF3 )
+ MAKE_RGB(0x32,0x00,0x38), MAKE_RGB(0x43,0x00,0x44), MAKE_RGB(0x54,0x00,0x50), MAKE_RGB(0x65,0x0C,0x5F), \
+ MAKE_RGB(0x76,0x1D,0x70), MAKE_RGB(0x87,0x2E,0x81), MAKE_RGB(0x98,0x3F,0x92), MAKE_RGB(0xA9,0x50,0xA3), \
+ MAKE_RGB(0xBA,0x61,0xB4), MAKE_RGB(0xCB,0x72,0xC5), MAKE_RGB(0xDC,0x83,0xD6), MAKE_RGB(0xED,0x94,0xE4), \
+ MAKE_RGB(0xFE,0xA5,0xE4), MAKE_RGB(0xFF,0xB6,0xE9), MAKE_RGB(0xFF,0xC7,0xEE), MAKE_RGB(0xFF,0xD8,0xF3 )
#define NTSC_PURPLE_BLUE \
- MAKE_RGB(0x1B,0x00,0x5F), MAKE_RGB(0x2C,0x00,0x6B), MAKE_RGB(0x3D,0x00,0x77), MAKE_RGB(0x4E,0x11,0x88), \
- MAKE_RGB(0x5F,0x22,0x99), MAKE_RGB(0x70,0x33,0xAA), MAKE_RGB(0x81,0x44,0xBB), MAKE_RGB(0x92,0x55,0xCC), \
- MAKE_RGB(0xA3,0x66,0xDD), MAKE_RGB(0xB4,0x77,0xED), MAKE_RGB(0xC5,0x88,0xED), MAKE_RGB(0xD6,0x99,0xED), \
- MAKE_RGB(0xE7,0xAA,0xED), MAKE_RGB(0xF8,0xBB,0xED), MAKE_RGB(0xFF,0xCC,0xF0), MAKE_RGB(0xFF,0xDD,0xF5 )
+ MAKE_RGB(0x1B,0x00,0x5F), MAKE_RGB(0x2C,0x00,0x6B), MAKE_RGB(0x3D,0x00,0x77), MAKE_RGB(0x4E,0x11,0x88), \
+ MAKE_RGB(0x5F,0x22,0x99), MAKE_RGB(0x70,0x33,0xAA), MAKE_RGB(0x81,0x44,0xBB), MAKE_RGB(0x92,0x55,0xCC), \
+ MAKE_RGB(0xA3,0x66,0xDD), MAKE_RGB(0xB4,0x77,0xED), MAKE_RGB(0xC5,0x88,0xED), MAKE_RGB(0xD6,0x99,0xED), \
+ MAKE_RGB(0xE7,0xAA,0xED), MAKE_RGB(0xF8,0xBB,0xED), MAKE_RGB(0xFF,0xCC,0xF0), MAKE_RGB(0xFF,0xDD,0xF5 )
#define NTSC_BLUE1 \
- MAKE_RGB(0x00,0x00,0x72), MAKE_RGB(0x10,0x00,0x7E), MAKE_RGB(0x21,0x0D,0x8E), MAKE_RGB(0x32,0x1E,0x9F), \
- MAKE_RGB(0x43,0x2F,0xB0), MAKE_RGB(0x54,0x40,0xC1), MAKE_RGB(0x65,0x51,0xD2), MAKE_RGB(0x76,0x62,0xE3), \
- MAKE_RGB(0x87,0x73,0xF4), MAKE_RGB(0x98,0x84,0xF9), MAKE_RGB(0xA9,0x95,0xF9), MAKE_RGB(0xBA,0xA6,0xF9), \
- MAKE_RGB(0xCB,0xB7,0xF9), MAKE_RGB(0xDC,0xC8,0xF9), MAKE_RGB(0xED,0xD9,0xF9), MAKE_RGB(0xFE,0xEA,0xF9 )
+ MAKE_RGB(0x00,0x00,0x72), MAKE_RGB(0x10,0x00,0x7E), MAKE_RGB(0x21,0x0D,0x8E), MAKE_RGB(0x32,0x1E,0x9F), \
+ MAKE_RGB(0x43,0x2F,0xB0), MAKE_RGB(0x54,0x40,0xC1), MAKE_RGB(0x65,0x51,0xD2), MAKE_RGB(0x76,0x62,0xE3), \
+ MAKE_RGB(0x87,0x73,0xF4), MAKE_RGB(0x98,0x84,0xF9), MAKE_RGB(0xA9,0x95,0xF9), MAKE_RGB(0xBA,0xA6,0xF9), \
+ MAKE_RGB(0xCB,0xB7,0xF9), MAKE_RGB(0xDC,0xC8,0xF9), MAKE_RGB(0xED,0xD9,0xF9), MAKE_RGB(0xFE,0xEA,0xF9 )
#define NTSC_BLUE2 \
- MAKE_RGB(0x00,0x00,0x65), MAKE_RGB(0x00,0x0C,0x7A), MAKE_RGB(0x05,0x1D,0x8E), MAKE_RGB(0x16,0x2E,0x9F), \
- MAKE_RGB(0x27,0x3F,0xB0), MAKE_RGB(0x38,0x50,0xC1), MAKE_RGB(0x49,0x61,0xD2), MAKE_RGB(0x5A,0x72,0xE3), \
- MAKE_RGB(0x6B,0x83,0xF4), MAKE_RGB(0x7C,0x94,0xFF), MAKE_RGB(0x8D,0xA5,0xFF), MAKE_RGB(0x9E,0xB6,0xFF), \
- MAKE_RGB(0xAF,0xC7,0xFF), MAKE_RGB(0xC0,0xD8,0xFF), MAKE_RGB(0xD1,0xE9,0xFF), MAKE_RGB(0xE2,0xFA,0xFF )
+ MAKE_RGB(0x00,0x00,0x65), MAKE_RGB(0x00,0x0C,0x7A), MAKE_RGB(0x05,0x1D,0x8E), MAKE_RGB(0x16,0x2E,0x9F), \
+ MAKE_RGB(0x27,0x3F,0xB0), MAKE_RGB(0x38,0x50,0xC1), MAKE_RGB(0x49,0x61,0xD2), MAKE_RGB(0x5A,0x72,0xE3), \
+ MAKE_RGB(0x6B,0x83,0xF4), MAKE_RGB(0x7C,0x94,0xFF), MAKE_RGB(0x8D,0xA5,0xFF), MAKE_RGB(0x9E,0xB6,0xFF), \
+ MAKE_RGB(0xAF,0xC7,0xFF), MAKE_RGB(0xC0,0xD8,0xFF), MAKE_RGB(0xD1,0xE9,0xFF), MAKE_RGB(0xE2,0xFA,0xFF )
#define NTSC_LIGHT_BLUE \
- MAKE_RGB(0x00,0x0D,0x48), MAKE_RGB(0x00,0x1E,0x5E), MAKE_RGB(0x00,0x2F,0x74), MAKE_RGB(0x00,0x40,0x8A), \
- MAKE_RGB(0x11,0x51,0x9B), MAKE_RGB(0x22,0x62,0xAC), MAKE_RGB(0x33,0x73,0xBD), MAKE_RGB(0x44,0x84,0xCE), \
- MAKE_RGB(0x55,0x95,0xDF), MAKE_RGB(0x66,0xA6,0xF0), MAKE_RGB(0x77,0xB7,0xFF), MAKE_RGB(0x88,0xC8,0xFF), \
- MAKE_RGB(0x99,0xD9,0xFF), MAKE_RGB(0xAA,0xEA,0xFF), MAKE_RGB(0xBB,0xFB,0xFF), MAKE_RGB(0xCC,0xFF,0xFF )
+ MAKE_RGB(0x00,0x0D,0x48), MAKE_RGB(0x00,0x1E,0x5E), MAKE_RGB(0x00,0x2F,0x74), MAKE_RGB(0x00,0x40,0x8A), \
+ MAKE_RGB(0x11,0x51,0x9B), MAKE_RGB(0x22,0x62,0xAC), MAKE_RGB(0x33,0x73,0xBD), MAKE_RGB(0x44,0x84,0xCE), \
+ MAKE_RGB(0x55,0x95,0xDF), MAKE_RGB(0x66,0xA6,0xF0), MAKE_RGB(0x77,0xB7,0xFF), MAKE_RGB(0x88,0xC8,0xFF), \
+ MAKE_RGB(0x99,0xD9,0xFF), MAKE_RGB(0xAA,0xEA,0xFF), MAKE_RGB(0xBB,0xFB,0xFF), MAKE_RGB(0xCC,0xFF,0xFF )
#define NTSC_TURQUOISE \
- MAKE_RGB(0x00,0x1C,0x1C), MAKE_RGB(0x00,0x2D,0x32), MAKE_RGB(0x00,0x3E,0x49), MAKE_RGB(0x00,0x4F,0x5F), \
- MAKE_RGB(0x05,0x60,0x73), MAKE_RGB(0x16,0x71,0x84), MAKE_RGB(0x27,0x82,0x95), MAKE_RGB(0x38,0x93,0xA6), \
- MAKE_RGB(0x49,0xA4,0xB7), MAKE_RGB(0x5A,0xB5,0xC8), MAKE_RGB(0x6B,0xC6,0xD9), MAKE_RGB(0x7C,0xD7,0xEA), \
- MAKE_RGB(0x8D,0xE8,0xFB), MAKE_RGB(0x9E,0xF9,0xFF), MAKE_RGB(0xAF,0xFF,0xFF), MAKE_RGB(0xC0,0xFF,0xFF )
+ MAKE_RGB(0x00,0x1C,0x1C), MAKE_RGB(0x00,0x2D,0x32), MAKE_RGB(0x00,0x3E,0x49), MAKE_RGB(0x00,0x4F,0x5F), \
+ MAKE_RGB(0x05,0x60,0x73), MAKE_RGB(0x16,0x71,0x84), MAKE_RGB(0x27,0x82,0x95), MAKE_RGB(0x38,0x93,0xA6), \
+ MAKE_RGB(0x49,0xA4,0xB7), MAKE_RGB(0x5A,0xB5,0xC8), MAKE_RGB(0x6B,0xC6,0xD9), MAKE_RGB(0x7C,0xD7,0xEA), \
+ MAKE_RGB(0x8D,0xE8,0xFB), MAKE_RGB(0x9E,0xF9,0xFF), MAKE_RGB(0xAF,0xFF,0xFF), MAKE_RGB(0xC0,0xFF,0xFF )
#define NTSC_GREEN_BLUE \
- MAKE_RGB(0x00,0x25,0x0B), MAKE_RGB(0x00,0x36,0x10), MAKE_RGB(0x00,0x47,0x18), MAKE_RGB(0x00,0x58,0x2E), \
- MAKE_RGB(0x07,0x69,0x42), MAKE_RGB(0x18,0x7A,0x53), MAKE_RGB(0x29,0x8B,0x64), MAKE_RGB(0x3A,0x9C,0x75), \
- MAKE_RGB(0x4B,0xAD,0x86), MAKE_RGB(0x5C,0xBE,0x97), MAKE_RGB(0x6D,0xCF,0xA8), MAKE_RGB(0x7E,0xE0,0xB9), \
- MAKE_RGB(0x8F,0xF1,0xCA), MAKE_RGB(0xA0,0xFF,0xDA), MAKE_RGB(0xB1,0xFF,0xE6), MAKE_RGB(0xC2,0xFF,0xF2 )
+ MAKE_RGB(0x00,0x25,0x0B), MAKE_RGB(0x00,0x36,0x10), MAKE_RGB(0x00,0x47,0x18), MAKE_RGB(0x00,0x58,0x2E), \
+ MAKE_RGB(0x07,0x69,0x42), MAKE_RGB(0x18,0x7A,0x53), MAKE_RGB(0x29,0x8B,0x64), MAKE_RGB(0x3A,0x9C,0x75), \
+ MAKE_RGB(0x4B,0xAD,0x86), MAKE_RGB(0x5C,0xBE,0x97), MAKE_RGB(0x6D,0xCF,0xA8), MAKE_RGB(0x7E,0xE0,0xB9), \
+ MAKE_RGB(0x8F,0xF1,0xCA), MAKE_RGB(0xA0,0xFF,0xDA), MAKE_RGB(0xB1,0xFF,0xE6), MAKE_RGB(0xC2,0xFF,0xF2 )
#define NTSC_GREEN \
- MAKE_RGB(0x00,0x27,0x0C), MAKE_RGB(0x00,0x38,0x11), MAKE_RGB(0x00,0x49,0x16), MAKE_RGB(0x04,0x5A,0x1A), \
- MAKE_RGB(0x15,0x6B,0x1A), MAKE_RGB(0x26,0x7C,0x22), MAKE_RGB(0x37,0x8D,0x33), MAKE_RGB(0x48,0x9E,0x44), \
- MAKE_RGB(0x59,0xAF,0x55), MAKE_RGB(0x6A,0xC0,0x66), MAKE_RGB(0x7B,0xD1,0x77), MAKE_RGB(0x8C,0xE2,0x88), \
- MAKE_RGB(0x9D,0xF3,0x99), MAKE_RGB(0xAE,0xFF,0xA8), MAKE_RGB(0xBF,0xFF,0xB4), MAKE_RGB(0xD0,0xFF,0xC0 )
+ MAKE_RGB(0x00,0x27,0x0C), MAKE_RGB(0x00,0x38,0x11), MAKE_RGB(0x00,0x49,0x16), MAKE_RGB(0x04,0x5A,0x1A), \
+ MAKE_RGB(0x15,0x6B,0x1A), MAKE_RGB(0x26,0x7C,0x22), MAKE_RGB(0x37,0x8D,0x33), MAKE_RGB(0x48,0x9E,0x44), \
+ MAKE_RGB(0x59,0xAF,0x55), MAKE_RGB(0x6A,0xC0,0x66), MAKE_RGB(0x7B,0xD1,0x77), MAKE_RGB(0x8C,0xE2,0x88), \
+ MAKE_RGB(0x9D,0xF3,0x99), MAKE_RGB(0xAE,0xFF,0xA8), MAKE_RGB(0xBF,0xFF,0xB4), MAKE_RGB(0xD0,0xFF,0xC0 )
#define NTSC_YELLOW_GREEN \
- MAKE_RGB(0x00,0x21,0x0A), MAKE_RGB(0x00,0x32,0x0F), MAKE_RGB(0x0A,0x43,0x11), MAKE_RGB(0x1B,0x54,0x11), \
- MAKE_RGB(0x2C,0x65,0x11), MAKE_RGB(0x3D,0x76,0x11), MAKE_RGB(0x4E,0x87,0x11), MAKE_RGB(0x5F,0x98,0x1E), \
- MAKE_RGB(0x70,0xA9,0x2F), MAKE_RGB(0x81,0xBA,0x40), MAKE_RGB(0x92,0xCB,0x51), MAKE_RGB(0xA3,0xDC,0x62), \
- MAKE_RGB(0xB4,0xED,0x73), MAKE_RGB(0xC5,0xFE,0x84), MAKE_RGB(0xD6,0xFF,0x90), MAKE_RGB(0xE7,0xFF,0x9C )
+ MAKE_RGB(0x00,0x21,0x0A), MAKE_RGB(0x00,0x32,0x0F), MAKE_RGB(0x0A,0x43,0x11), MAKE_RGB(0x1B,0x54,0x11), \
+ MAKE_RGB(0x2C,0x65,0x11), MAKE_RGB(0x3D,0x76,0x11), MAKE_RGB(0x4E,0x87,0x11), MAKE_RGB(0x5F,0x98,0x1E), \
+ MAKE_RGB(0x70,0xA9,0x2F), MAKE_RGB(0x81,0xBA,0x40), MAKE_RGB(0x92,0xCB,0x51), MAKE_RGB(0xA3,0xDC,0x62), \
+ MAKE_RGB(0xB4,0xED,0x73), MAKE_RGB(0xC5,0xFE,0x84), MAKE_RGB(0xD6,0xFF,0x90), MAKE_RGB(0xE7,0xFF,0x9C )
#define NTSC_ORANGE_GREEN \
- MAKE_RGB(0x05,0x13,0x04), MAKE_RGB(0x16,0x24,0x04), MAKE_RGB(0x27,0x35,0x04), MAKE_RGB(0x38,0x46,0x04), \
- MAKE_RGB(0x49,0x57,0x04), MAKE_RGB(0x5A,0x68,0x04), MAKE_RGB(0x6B,0x79,0x04), MAKE_RGB(0x7C,0x8A,0x09), \
- MAKE_RGB(0x8D,0x9B,0x1A), MAKE_RGB(0x9E,0xAC,0x2B), MAKE_RGB(0xAF,0xBD,0x3C), MAKE_RGB(0xC0,0xCE,0x4D), \
- MAKE_RGB(0xD1,0xDF,0x5E), MAKE_RGB(0xE2,0xF0,0x6F), MAKE_RGB(0xF3,0xFF,0x80), MAKE_RGB(0xFF,0xFF,0x8D )
+ MAKE_RGB(0x05,0x13,0x04), MAKE_RGB(0x16,0x24,0x04), MAKE_RGB(0x27,0x35,0x04), MAKE_RGB(0x38,0x46,0x04), \
+ MAKE_RGB(0x49,0x57,0x04), MAKE_RGB(0x5A,0x68,0x04), MAKE_RGB(0x6B,0x79,0x04), MAKE_RGB(0x7C,0x8A,0x09), \
+ MAKE_RGB(0x8D,0x9B,0x1A), MAKE_RGB(0x9E,0xAC,0x2B), MAKE_RGB(0xAF,0xBD,0x3C), MAKE_RGB(0xC0,0xCE,0x4D), \
+ MAKE_RGB(0xD1,0xDF,0x5E), MAKE_RGB(0xE2,0xF0,0x6F), MAKE_RGB(0xF3,0xFF,0x80), MAKE_RGB(0xFF,0xFF,0x8D )
#define NTSC_LIGHT_ORANGE \
- MAKE_RGB(0x21,0x02,0x00), MAKE_RGB(0x32,0x13,0x00), MAKE_RGB(0x43,0x24,0x00), MAKE_RGB(0x54,0x35,0x00), \
- MAKE_RGB(0x65,0x46,0x00), MAKE_RGB(0x76,0x57,0x00), MAKE_RGB(0x87,0x68,0x00), MAKE_RGB(0x98,0x79,0x0C), \
- MAKE_RGB(0xA9,0x8A,0x1D), MAKE_RGB(0xBA,0x9B,0x2E), MAKE_RGB(0xCB,0xAC,0x3F), MAKE_RGB(0xDC,0xBD,0x50), \
- MAKE_RGB(0xED,0xCE,0x61), MAKE_RGB(0xFE,0xDF,0x72), MAKE_RGB(0xFF,0xF0,0x87), MAKE_RGB(0xFF,0xFF,0x9D )
+ MAKE_RGB(0x21,0x02,0x00), MAKE_RGB(0x32,0x13,0x00), MAKE_RGB(0x43,0x24,0x00), MAKE_RGB(0x54,0x35,0x00), \
+ MAKE_RGB(0x65,0x46,0x00), MAKE_RGB(0x76,0x57,0x00), MAKE_RGB(0x87,0x68,0x00), MAKE_RGB(0x98,0x79,0x0C), \
+ MAKE_RGB(0xA9,0x8A,0x1D), MAKE_RGB(0xBA,0x9B,0x2E), MAKE_RGB(0xCB,0xAC,0x3F), MAKE_RGB(0xDC,0xBD,0x50), \
+ MAKE_RGB(0xED,0xCE,0x61), MAKE_RGB(0xFE,0xDF,0x72), MAKE_RGB(0xFF,0xF0,0x87), MAKE_RGB(0xFF,0xFF,0x9D )
static const rgb_t a7800_palette[256*3] =
{
@@ -603,100 +603,100 @@ define NTSC_LIGHT_ORANGE
define NTSC_GREY
- MAKE_RGB(0x00,0x00,0x00), MAKE_RGB(0x11,0x11,0x11), MAKE_RGB(0x22,0x22,0x22), MAKE_RGB(0x33,0x33,0x33), \
- MAKE_RGB(0x44,0x44,0x44), MAKE_RGB(0x55,0x55,0x55), MAKE_RGB(0x66,0x66,0x66), MAKE_RGB(0x77,0x77,0x77), \
- MAKE_RGB(0x88,0x88,0x88), MAKE_RGB(0x99,0x99,0x99), MAKE_RGB(0xAA,0xAA,0xAA), MAKE_RGB(0xBB,0xBB,0xBB), \
- MAKE_RGB(0xCC,0xCC,0xCC), MAKE_RGB(0xDD,0xDD,0xDD), MAKE_RGB(0xEE,0xEE,0xEE), MAKE_RGB(0xFF,0xFF,0xFF )
+ MAKE_RGB(0x00,0x00,0x00), MAKE_RGB(0x11,0x11,0x11), MAKE_RGB(0x22,0x22,0x22), MAKE_RGB(0x33,0x33,0x33), \
+ MAKE_RGB(0x44,0x44,0x44), MAKE_RGB(0x55,0x55,0x55), MAKE_RGB(0x66,0x66,0x66), MAKE_RGB(0x77,0x77,0x77), \
+ MAKE_RGB(0x88,0x88,0x88), MAKE_RGB(0x99,0x99,0x99), MAKE_RGB(0xAA,0xAA,0xAA), MAKE_RGB(0xBB,0xBB,0xBB), \
+ MAKE_RGB(0xCC,0xCC,0xCC), MAKE_RGB(0xDD,0xDD,0xDD), MAKE_RGB(0xEE,0xEE,0xEE), MAKE_RGB(0xFF,0xFF,0xFF )
define NTSC_GOLD
- MAKE_RGB(0x1A,0x07,0x00), MAKE_RGB(0x2B,0x18,0x00), MAKE_RGB(0x3C,0x29,0x00), MAKE_RGB(0x4D,0x3A,0x00), \
- MAKE_RGB(0x5E,0x4B,0x00), MAKE_RGB(0x6F,0x5C,0x00), MAKE_RGB(0x80,0x6D,0x00), MAKE_RGB(0x91,0x7E,0x09), \
- MAKE_RGB(0xA2,0x8F,0x1A), MAKE_RGB(0xB3,0xA0,0x2B), MAKE_RGB(0xC4,0xB1,0x3C), MAKE_RGB(0xD5,0xC2,0x4D), \
- MAKE_RGB(0xE6,0xD3,0x5E), MAKE_RGB(0xF7,0xE4,0x6F), MAKE_RGB(0xFF,0xF5,0x83), MAKE_RGB(0xFF,0xFF,0x97 )
+ MAKE_RGB(0x1A,0x07,0x00), MAKE_RGB(0x2B,0x18,0x00), MAKE_RGB(0x3C,0x29,0x00), MAKE_RGB(0x4D,0x3A,0x00), \
+ MAKE_RGB(0x5E,0x4B,0x00), MAKE_RGB(0x6F,0x5C,0x00), MAKE_RGB(0x80,0x6D,0x00), MAKE_RGB(0x91,0x7E,0x09), \
+ MAKE_RGB(0xA2,0x8F,0x1A), MAKE_RGB(0xB3,0xA0,0x2B), MAKE_RGB(0xC4,0xB1,0x3C), MAKE_RGB(0xD5,0xC2,0x4D), \
+ MAKE_RGB(0xE6,0xD3,0x5E), MAKE_RGB(0xF7,0xE4,0x6F), MAKE_RGB(0xFF,0xF5,0x83), MAKE_RGB(0xFF,0xFF,0x97 )
define NTSC_ORANGE
- MAKE_RGB(0x32,0x00,0x00), MAKE_RGB(0x43,0x06,0x00), MAKE_RGB(0x54,0x17,0x00), MAKE_RGB(0x65,0x28,0x00), \
- MAKE_RGB(0x79,0x39,0x00), MAKE_RGB(0x87,0x4A,0x00), MAKE_RGB(0x98,0x5B,0x0C), MAKE_RGB(0xA9,0x6C,0x1D), \
- MAKE_RGB(0xBA,0x7D,0x2E), MAKE_RGB(0xCB,0x8E,0x3F), MAKE_RGB(0xDC,0x9F,0x50), MAKE_RGB(0xED,0xB0,0x61), \
- MAKE_RGB(0xFE,0xC1,0x72), MAKE_RGB(0xFF,0xD2,0x87), MAKE_RGB(0xFF,0xE3,0x9E), MAKE_RGB(0xFF,0xF4,0xB4 )
+ MAKE_RGB(0x32,0x00,0x00), MAKE_RGB(0x43,0x06,0x00), MAKE_RGB(0x54,0x17,0x00), MAKE_RGB(0x65,0x28,0x00), \
+ MAKE_RGB(0x79,0x39,0x00), MAKE_RGB(0x87,0x4A,0x00), MAKE_RGB(0x98,0x5B,0x0C), MAKE_RGB(0xA9,0x6C,0x1D), \
+ MAKE_RGB(0xBA,0x7D,0x2E), MAKE_RGB(0xCB,0x8E,0x3F), MAKE_RGB(0xDC,0x9F,0x50), MAKE_RGB(0xED,0xB0,0x61), \
+ MAKE_RGB(0xFE,0xC1,0x72), MAKE_RGB(0xFF,0xD2,0x87), MAKE_RGB(0xFF,0xE3,0x9E), MAKE_RGB(0xFF,0xF4,0xB4 )
define NTSC_RED_ORANGE
- MAKE_RGB(0x3E,0x00,0x00), MAKE_RGB(0x4F,0x00,0x00), MAKE_RGB(0x60,0x07,0x00), MAKE_RGB(0x71,0x18,0x00), \
- MAKE_RGB(0x82,0x29,0x10), MAKE_RGB(0x93,0x3A,0x21), MAKE_RGB(0xA4,0x4B,0x32), MAKE_RGB(0xB5,0x5C,0x43), \
- MAKE_RGB(0xC6,0x6D,0x54), MAKE_RGB(0xD7,0x7E,0x65), MAKE_RGB(0xE8,0x8F,0x76), MAKE_RGB(0xF9,0xA0,0x87), \
- MAKE_RGB(0xFF,0xB1,0x9C), MAKE_RGB(0xFF,0xC2,0xB2), MAKE_RGB(0xFF,0xD3,0xC8), MAKE_RGB(0xFF,0xE4,0xDE )
+ MAKE_RGB(0x3E,0x00,0x00), MAKE_RGB(0x4F,0x00,0x00), MAKE_RGB(0x60,0x07,0x00), MAKE_RGB(0x71,0x18,0x00), \
+ MAKE_RGB(0x82,0x29,0x10), MAKE_RGB(0x93,0x3A,0x21), MAKE_RGB(0xA4,0x4B,0x32), MAKE_RGB(0xB5,0x5C,0x43), \
+ MAKE_RGB(0xC6,0x6D,0x54), MAKE_RGB(0xD7,0x7E,0x65), MAKE_RGB(0xE8,0x8F,0x76), MAKE_RGB(0xF9,0xA0,0x87), \
+ MAKE_RGB(0xFF,0xB1,0x9C), MAKE_RGB(0xFF,0xC2,0xB2), MAKE_RGB(0xFF,0xD3,0xC8), MAKE_RGB(0xFF,0xE4,0xDE )
define NTSC_PINK
- MAKE_RGB(0x3E,0x00,0x09), MAKE_RGB(0x4F,0x00,0x15), MAKE_RGB(0x60,0x00,0x21), MAKE_RGB(0x71,0x0E,0x31), \
- MAKE_RGB(0x82,0x1F,0x42), MAKE_RGB(0x93,0x30,0x53), MAKE_RGB(0xA4,0x41,0x64), MAKE_RGB(0xB5,0x52,0x75), \
- MAKE_RGB(0xC6,0x63,0x86), MAKE_RGB(0xD7,0x74,0x97), MAKE_RGB(0xE8,0x85,0xA8), MAKE_RGB(0xF9,0x96,0xB9), \
- MAKE_RGB(0xFF,0xA7,0xCE), MAKE_RGB(0xFF,0xB8,0xE4), MAKE_RGB(0xFF,0xC9,0xEF), MAKE_RGB(0xFF,0xDA,0xF4 )
+ MAKE_RGB(0x3E,0x00,0x09), MAKE_RGB(0x4F,0x00,0x15), MAKE_RGB(0x60,0x00,0x21), MAKE_RGB(0x71,0x0E,0x31), \
+ MAKE_RGB(0x82,0x1F,0x42), MAKE_RGB(0x93,0x30,0x53), MAKE_RGB(0xA4,0x41,0x64), MAKE_RGB(0xB5,0x52,0x75), \
+ MAKE_RGB(0xC6,0x63,0x86), MAKE_RGB(0xD7,0x74,0x97), MAKE_RGB(0xE8,0x85,0xA8), MAKE_RGB(0xF9,0x96,0xB9), \
+ MAKE_RGB(0xFF,0xA7,0xCE), MAKE_RGB(0xFF,0xB8,0xE4), MAKE_RGB(0xFF,0xC9,0xEF), MAKE_RGB(0xFF,0xDA,0xF4 )
define NTSC_PURPLE
- MAKE_RGB(0x30,0x00,0x3D), MAKE_RGB(0x41,0x00,0x48), MAKE_RGB(0x52,0x00,0x54), MAKE_RGB(0x63,0x0C,0x64), \
- MAKE_RGB(0x74,0x1D,0x75), MAKE_RGB(0x85,0x2E,0x86), MAKE_RGB(0x96,0x3F,0x97), MAKE_RGB(0xA7,0x50,0xA8), \
- MAKE_RGB(0xB8,0x61,0xB9), MAKE_RGB(0xC9,0x72,0xCA), MAKE_RGB(0xDA,0x83,0xDB), MAKE_RGB(0xEB,0x94,0xE5), \
- MAKE_RGB(0xFC,0xA5,0xE5), MAKE_RGB(0xFF,0xB6,0xE9), MAKE_RGB(0xFF,0xC7,0xEE), MAKE_RGB(0xFF,0xD8,0xF3 )
+ MAKE_RGB(0x30,0x00,0x3D), MAKE_RGB(0x41,0x00,0x48), MAKE_RGB(0x52,0x00,0x54), MAKE_RGB(0x63,0x0C,0x64), \
+ MAKE_RGB(0x74,0x1D,0x75), MAKE_RGB(0x85,0x2E,0x86), MAKE_RGB(0x96,0x3F,0x97), MAKE_RGB(0xA7,0x50,0xA8), \
+ MAKE_RGB(0xB8,0x61,0xB9), MAKE_RGB(0xC9,0x72,0xCA), MAKE_RGB(0xDA,0x83,0xDB), MAKE_RGB(0xEB,0x94,0xE5), \
+ MAKE_RGB(0xFC,0xA5,0xE5), MAKE_RGB(0xFF,0xB6,0xE9), MAKE_RGB(0xFF,0xC7,0xEE), MAKE_RGB(0xFF,0xD8,0xF3 )
define NTSC_PURPLE_BLUE
- MAKE_RGB(0x18,0x00,0x62), MAKE_RGB(0x29,0x00,0x6E), MAKE_RGB(0x3A,0x01,0x7A), MAKE_RGB(0x4B,0x12,0x8B), \
- MAKE_RGB(0x5C,0x23,0x9C), MAKE_RGB(0x6D,0x34,0xAD), MAKE_RGB(0x7E,0x45,0xBE), MAKE_RGB(0x8F,0x56,0xCF), \
- MAKE_RGB(0xA0,0x67,0xE0), MAKE_RGB(0xB1,0x78,0xEE), MAKE_RGB(0xC2,0x89,0xEE), MAKE_RGB(0xD3,0x9A,0xEE), \
- MAKE_RGB(0xE4,0xAB,0xEE), MAKE_RGB(0xF5,0xBC,0xEE), MAKE_RGB(0xFF,0xCD,0xE0), MAKE_RGB(0xFF,0xDE,0xF5 )
+ MAKE_RGB(0x18,0x00,0x62), MAKE_RGB(0x29,0x00,0x6E), MAKE_RGB(0x3A,0x01,0x7A), MAKE_RGB(0x4B,0x12,0x8B), \
+ MAKE_RGB(0x5C,0x23,0x9C), MAKE_RGB(0x6D,0x34,0xAD), MAKE_RGB(0x7E,0x45,0xBE), MAKE_RGB(0x8F,0x56,0xCF), \
+ MAKE_RGB(0xA0,0x67,0xE0), MAKE_RGB(0xB1,0x78,0xEE), MAKE_RGB(0xC2,0x89,0xEE), MAKE_RGB(0xD3,0x9A,0xEE), \
+ MAKE_RGB(0xE4,0xAB,0xEE), MAKE_RGB(0xF5,0xBC,0xEE), MAKE_RGB(0xFF,0xCD,0xE0), MAKE_RGB(0xFF,0xDE,0xF5 )
define NTSC_BLUE1
- MAKE_RGB(0x00,0x00,0x72), MAKE_RGB(0x0C,0x00,0x7F), MAKE_RGB(0x1D,0x0E,0x8F), MAKE_RGB(0x2E,0x1F,0xA0), \
- MAKE_RGB(0x3F,0x30,0xB1), MAKE_RGB(0x50,0x41,0xC2), MAKE_RGB(0x61,0x52,0xD3), MAKE_RGB(0x72,0x63,0xE4), \
- MAKE_RGB(0x83,0x74,0xF5), MAKE_RGB(0x94,0x85,0xFA), MAKE_RGB(0xA5,0x96,0xFA), MAKE_RGB(0xB6,0xA7,0xFA), \
- MAKE_RGB(0xC7,0xB8,0xFA), MAKE_RGB(0xD8,0xC9,0xFA), MAKE_RGB(0xE9,0xDA,0xFA), MAKE_RGB(0xFA,0xE8,0xFA )
+ MAKE_RGB(0x00,0x00,0x72), MAKE_RGB(0x0C,0x00,0x7F), MAKE_RGB(0x1D,0x0E,0x8F), MAKE_RGB(0x2E,0x1F,0xA0), \
+ MAKE_RGB(0x3F,0x30,0xB1), MAKE_RGB(0x50,0x41,0xC2), MAKE_RGB(0x61,0x52,0xD3), MAKE_RGB(0x72,0x63,0xE4), \
+ MAKE_RGB(0x83,0x74,0xF5), MAKE_RGB(0x94,0x85,0xFA), MAKE_RGB(0xA5,0x96,0xFA), MAKE_RGB(0xB6,0xA7,0xFA), \
+ MAKE_RGB(0xC7,0xB8,0xFA), MAKE_RGB(0xD8,0xC9,0xFA), MAKE_RGB(0xE9,0xDA,0xFA), MAKE_RGB(0xFA,0xE8,0xFA )
define NTSC_BLUE2
- MAKE_RGB(0x00,0x00,0x62), MAKE_RGB(0x00,0x0F,0x77), MAKE_RGB(0x01,0x20,0x8D), MAKE_RGB(0x12,0x31,0x9E), \
- MAKE_RGB(0x23,0x42,0xAF), MAKE_RGB(0x34,0x53,0xC0), MAKE_RGB(0x45,0x64,0xD1), MAKE_RGB(0x56,0x75,0xE2), \
- MAKE_RGB(0x67,0x86,0xF3), MAKE_RGB(0x78,0x97,0xFF), MAKE_RGB(0x89,0xA8,0xFF), MAKE_RGB(0x9A,0xB9,0xFF), \
- MAKE_RGB(0xAB,0xCA,0xFF), MAKE_RGB(0xBC,0xDB,0xFF), MAKE_RGB(0xCD,0xEC,0xFF), MAKE_RGB(0xDE,0xFD,0xFF )
+ MAKE_RGB(0x00,0x00,0x62), MAKE_RGB(0x00,0x0F,0x77), MAKE_RGB(0x01,0x20,0x8D), MAKE_RGB(0x12,0x31,0x9E), \
+ MAKE_RGB(0x23,0x42,0xAF), MAKE_RGB(0x34,0x53,0xC0), MAKE_RGB(0x45,0x64,0xD1), MAKE_RGB(0x56,0x75,0xE2), \
+ MAKE_RGB(0x67,0x86,0xF3), MAKE_RGB(0x78,0x97,0xFF), MAKE_RGB(0x89,0xA8,0xFF), MAKE_RGB(0x9A,0xB9,0xFF), \
+ MAKE_RGB(0xAB,0xCA,0xFF), MAKE_RGB(0xBC,0xDB,0xFF), MAKE_RGB(0xCD,0xEC,0xFF), MAKE_RGB(0xDE,0xFD,0xFF )
define NTSC_LIGHT_BLUE
- MAKE_RGB(0x00,0x10,0x42), MAKE_RGB(0x00,0x21,0x58), MAKE_RGB(0x00,0x32,0x6E), MAKE_RGB(0x00,0x43,0x84), \
- MAKE_RGB(0x0E,0x54,0x96), MAKE_RGB(0x1F,0x65,0xA7), MAKE_RGB(0x30,0x76,0xB8), MAKE_RGB(0x41,0x87,0xC9), \
- MAKE_RGB(0x52,0x98,0xDA), MAKE_RGB(0x63,0xA9,0xEB), MAKE_RGB(0x74,0xBA,0xFC), MAKE_RGB(0x85,0xCB,0xFF), \
- MAKE_RGB(0x96,0xDC,0xFF), MAKE_RGB(0xA7,0xED,0xFF), MAKE_RGB(0xB8,0xFE,0xFF), MAKE_RGB(0xC9,0xFF,0xFF )
+ MAKE_RGB(0x00,0x10,0x42), MAKE_RGB(0x00,0x21,0x58), MAKE_RGB(0x00,0x32,0x6E), MAKE_RGB(0x00,0x43,0x84), \
+ MAKE_RGB(0x0E,0x54,0x96), MAKE_RGB(0x1F,0x65,0xA7), MAKE_RGB(0x30,0x76,0xB8), MAKE_RGB(0x41,0x87,0xC9), \
+ MAKE_RGB(0x52,0x98,0xDA), MAKE_RGB(0x63,0xA9,0xEB), MAKE_RGB(0x74,0xBA,0xFC), MAKE_RGB(0x85,0xCB,0xFF), \
+ MAKE_RGB(0x96,0xDC,0xFF), MAKE_RGB(0xA7,0xED,0xFF), MAKE_RGB(0xB8,0xFE,0xFF), MAKE_RGB(0xC9,0xFF,0xFF )
define NTSC_TURQUOISE
- MAKE_RGB(0x00,0x1E,0x14), MAKE_RGB(0x00,0x2F,0x2A), MAKE_RGB(0x00,0x40,0x40), MAKE_RGB(0x00,0x51,0x56), \
- MAKE_RGB(0x04,0x62,0x6B), MAKE_RGB(0x15,0x73,0x7C), MAKE_RGB(0x26,0x84,0x8D), MAKE_RGB(0x37,0x95,0x9E), \
- MAKE_RGB(0x48,0xA6,0xAF), MAKE_RGB(0x59,0xB7,0xC0), MAKE_RGB(0x6A,0xC8,0xD1), MAKE_RGB(0x7B,0xD9,0xE2), \
- MAKE_RGB(0x8C,0xEA,0xF3), MAKE_RGB(0x9D,0xFB,0xFF), MAKE_RGB(0xAE,0xFF,0xFF), MAKE_RGB(0xBF,0xFF,0xFF )
+ MAKE_RGB(0x00,0x1E,0x14), MAKE_RGB(0x00,0x2F,0x2A), MAKE_RGB(0x00,0x40,0x40), MAKE_RGB(0x00,0x51,0x56), \
+ MAKE_RGB(0x04,0x62,0x6B), MAKE_RGB(0x15,0x73,0x7C), MAKE_RGB(0x26,0x84,0x8D), MAKE_RGB(0x37,0x95,0x9E), \
+ MAKE_RGB(0x48,0xA6,0xAF), MAKE_RGB(0x59,0xB7,0xC0), MAKE_RGB(0x6A,0xC8,0xD1), MAKE_RGB(0x7B,0xD9,0xE2), \
+ MAKE_RGB(0x8C,0xEA,0xF3), MAKE_RGB(0x9D,0xFB,0xFF), MAKE_RGB(0xAE,0xFF,0xFF), MAKE_RGB(0xBF,0xFF,0xFF )
define NTSC_GREEN_BLUE
- MAKE_RGB(0x00,0x26,0x0B), MAKE_RGB(0x00,0x37,0x10), MAKE_RGB(0x00,0x48,0x16), MAKE_RGB(0x00,0x59,0x25), \
- MAKE_RGB(0x08,0x6A,0x38), MAKE_RGB(0x19,0x7B,0x49), MAKE_RGB(0x2A,0x8C,0x5A), MAKE_RGB(0x3B,0x9D,0x6B), \
- MAKE_RGB(0x4C,0xAE,0x7C), MAKE_RGB(0x5D,0xBF,0x8D), MAKE_RGB(0x6E,0xD0,0x9E), MAKE_RGB(0x7F,0xE1,0xAF), \
- MAKE_RGB(0x90,0xF2,0xC0), MAKE_RGB(0xA1,0xFF,0xD0), MAKE_RGB(0xB2,0xFF,0xDC), MAKE_RGB(0xC3,0xFF,0xE8 )
+ MAKE_RGB(0x00,0x26,0x0B), MAKE_RGB(0x00,0x37,0x10), MAKE_RGB(0x00,0x48,0x16), MAKE_RGB(0x00,0x59,0x25), \
+ MAKE_RGB(0x08,0x6A,0x38), MAKE_RGB(0x19,0x7B,0x49), MAKE_RGB(0x2A,0x8C,0x5A), MAKE_RGB(0x3B,0x9D,0x6B), \
+ MAKE_RGB(0x4C,0xAE,0x7C), MAKE_RGB(0x5D,0xBF,0x8D), MAKE_RGB(0x6E,0xD0,0x9E), MAKE_RGB(0x7F,0xE1,0xAF), \
+ MAKE_RGB(0x90,0xF2,0xC0), MAKE_RGB(0xA1,0xFF,0xD0), MAKE_RGB(0xB2,0xFF,0xDC), MAKE_RGB(0xC3,0xFF,0xE8 )
define NTSC_GREEN
- MAKE_RGB(0x00,0x26,0x0B), MAKE_RGB(0x00,0x37,0x10), MAKE_RGB(0x00,0x48,0x16), MAKE_RGB(0x08,0x59,0x18), \
- MAKE_RGB(0x19,0x6A,0x18), MAKE_RGB(0x2A,0x7B,0x18), MAKE_RGB(0x3B,0x8C,0x29), MAKE_RGB(0x4C,0x9D,0x3A), \
- MAKE_RGB(0x5D,0xAE,0x4B), MAKE_RGB(0x6E,0xBF,0x5C), MAKE_RGB(0x7F,0xD0,0x6D), MAKE_RGB(0x90,0xE1,0x7E), \
- MAKE_RGB(0xA1,0xF2,0x8F), MAKE_RGB(0xB2,0xFF,0x9F), MAKE_RGB(0xC3,0xFF,0xAB), MAKE_RGB(0xD4,0xFF,0xB7 )
+ MAKE_RGB(0x00,0x26,0x0B), MAKE_RGB(0x00,0x37,0x10), MAKE_RGB(0x00,0x48,0x16), MAKE_RGB(0x08,0x59,0x18), \
+ MAKE_RGB(0x19,0x6A,0x18), MAKE_RGB(0x2A,0x7B,0x18), MAKE_RGB(0x3B,0x8C,0x29), MAKE_RGB(0x4C,0x9D,0x3A), \
+ MAKE_RGB(0x5D,0xAE,0x4B), MAKE_RGB(0x6E,0xBF,0x5C), MAKE_RGB(0x7F,0xD0,0x6D), MAKE_RGB(0x90,0xE1,0x7E), \
+ MAKE_RGB(0xA1,0xF2,0x8F), MAKE_RGB(0xB2,0xFF,0x9F), MAKE_RGB(0xC3,0xFF,0xAB), MAKE_RGB(0xD4,0xFF,0xB7 )
define NTSC_YELLOW_GREEN
- MAKE_RGB(0x00,0x1E,0x09), MAKE_RGB(0x00,0x2F,0x0E), MAKE_RGB(0x11,0x40,0x0E), MAKE_RGB(0x22,0x51,0x0E), \
- MAKE_RGB(0x33,0x62,0x0E), MAKE_RGB(0x44,0x73,0x0E), MAKE_RGB(0x55,0x84,0x0E), MAKE_RGB(0x66,0x95,0x17), \
- MAKE_RGB(0x77,0xA6,0x28), MAKE_RGB(0x88,0xB7,0x39), MAKE_RGB(0x99,0xC8,0x4A), MAKE_RGB(0xAA,0xD9,0x5B), \
- MAKE_RGB(0xBB,0xEA,0x6C), MAKE_RGB(0xCC,0xFB,0x7D), MAKE_RGB(0xDD,0xFF,0x8A), MAKE_RGB(0xEE,0xFF,0x96 )
+ MAKE_RGB(0x00,0x1E,0x09), MAKE_RGB(0x00,0x2F,0x0E), MAKE_RGB(0x11,0x40,0x0E), MAKE_RGB(0x22,0x51,0x0E), \
+ MAKE_RGB(0x33,0x62,0x0E), MAKE_RGB(0x44,0x73,0x0E), MAKE_RGB(0x55,0x84,0x0E), MAKE_RGB(0x66,0x95,0x17), \
+ MAKE_RGB(0x77,0xA6,0x28), MAKE_RGB(0x88,0xB7,0x39), MAKE_RGB(0x99,0xC8,0x4A), MAKE_RGB(0xAA,0xD9,0x5B), \
+ MAKE_RGB(0xBB,0xEA,0x6C), MAKE_RGB(0xCC,0xFB,0x7D), MAKE_RGB(0xDD,0xFF,0x8A), MAKE_RGB(0xEE,0xFF,0x96 )
define NTSC_ORANGE_GREEN
- MAKE_RGB(0x0D,0x0F,0x01), MAKE_RGB(0x1E,0x20,0x01), MAKE_RGB(0x2F,0x31,0x01), MAKE_RGB(0x40,0x42,0x01), \
- MAKE_RGB(0x51,0x53,0x01), MAKE_RGB(0x62,0x64,0x01), MAKE_RGB(0x73,0x75,0x01), MAKE_RGB(0x84,0x86,0x08), \
- MAKE_RGB(0x95,0x97,0x19), MAKE_RGB(0xA6,0xA8,0x2A), MAKE_RGB(0xB7,0xB9,0x3B), MAKE_RGB(0xC8,0xCA,0x4C), \
- MAKE_RGB(0xD9,0xDB,0x5D), MAKE_RGB(0xEA,0xEC,0x6E), MAKE_RGB(0xFB,0xFD,0x7F), MAKE_RGB(0xFF,0xFF,0x8F )
+ MAKE_RGB(0x0D,0x0F,0x01), MAKE_RGB(0x1E,0x20,0x01), MAKE_RGB(0x2F,0x31,0x01), MAKE_RGB(0x40,0x42,0x01), \
+ MAKE_RGB(0x51,0x53,0x01), MAKE_RGB(0x62,0x64,0x01), MAKE_RGB(0x73,0x75,0x01), MAKE_RGB(0x84,0x86,0x08), \
+ MAKE_RGB(0x95,0x97,0x19), MAKE_RGB(0xA6,0xA8,0x2A), MAKE_RGB(0xB7,0xB9,0x3B), MAKE_RGB(0xC8,0xCA,0x4C), \
+ MAKE_RGB(0xD9,0xDB,0x5D), MAKE_RGB(0xEA,0xEC,0x6E), MAKE_RGB(0xFB,0xFD,0x7F), MAKE_RGB(0xFF,0xFF,0x8F )
define NTSC_LIGHT_ORANGE
- MAKE_RGB(0x28,0x00,0x00), MAKE_RGB(0x39,0x0E,0x00), MAKE_RGB(0x4A,0x1F,0x00), MAKE_RGB(0x5B,0x30,0x00), \
- MAKE_RGB(0x6C,0x41,0x00), MAKE_RGB(0x7D,0x52,0x00), MAKE_RGB(0x8E,0x63,0x00), MAKE_RGB(0x9F,0x74,0x10), \
- MAKE_RGB(0xB0,0x85,0x21), MAKE_RGB(0xC1,0x96,0x32), MAKE_RGB(0xD2,0xA7,0x43), MAKE_RGB(0xE3,0xB8,0x54), \
- MAKE_RGB(0xF4,0xC9,0x65), MAKE_RGB(0xFF,0xDA,0x78), MAKE_RGB(0xFF,0xEB,0x8E), MAKE_RGB(0xFF,0xFC,0xA4 )
+ MAKE_RGB(0x28,0x00,0x00), MAKE_RGB(0x39,0x0E,0x00), MAKE_RGB(0x4A,0x1F,0x00), MAKE_RGB(0x5B,0x30,0x00), \
+ MAKE_RGB(0x6C,0x41,0x00), MAKE_RGB(0x7D,0x52,0x00), MAKE_RGB(0x8E,0x63,0x00), MAKE_RGB(0x9F,0x74,0x10), \
+ MAKE_RGB(0xB0,0x85,0x21), MAKE_RGB(0xC1,0x96,0x32), MAKE_RGB(0xD2,0xA7,0x43), MAKE_RGB(0xE3,0xB8,0x54), \
+ MAKE_RGB(0xF4,0xC9,0x65), MAKE_RGB(0xFF,0xDA,0x78), MAKE_RGB(0xFF,0xEB,0x8E), MAKE_RGB(0xFF,0xFC,0xA4 )
***************************************************************************/
@@ -929,7 +929,7 @@ static MACHINE_CONFIG_START( a7800_ntsc, a7800_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_RAW_PARAMS( 7159090, 456, 0, 320, 262, 26, 26 + 192 + 30 )
+ MCFG_SCREEN_RAW_PARAMS( 7159090, 456, 0, 320, 262, 26, 26 + 192 + 30 )
MCFG_SCREEN_UPDATE_DRIVER(a7800_state, screen_update_a7800)
MCFG_PALETTE_LENGTH(ARRAY_LENGTH(a7800_palette))
@@ -966,7 +966,7 @@ static MACHINE_CONFIG_DERIVED( a7800_pal, a7800_ntsc )
// MCFG_TIMER_ADD_SCANLINE("scantimer", a7800_interrupt, "screen", 0, 1)
MCFG_SCREEN_MODIFY( "screen" )
- MCFG_SCREEN_RAW_PARAMS( 7093788, 456, 0, 320, 312, 34, 34 + 228 + 30 )
+ MCFG_SCREEN_RAW_PARAMS( 7093788, 456, 0, 320, 312, 34, 34 + 228 + 30 )
MCFG_PALETTE_INIT_OVERRIDE(a7800_state, a7800p )
/* sound hardware */
diff --git a/src/mess/drivers/apple2.c b/src/mess/drivers/apple2.c
index ff1bf1e2e1d..1ff299c6bd4 100644
--- a/src/mess/drivers/apple2.c
+++ b/src/mess/drivers/apple2.c
@@ -835,7 +835,7 @@ static MACHINE_CONFIG_DERIVED( laba2p, apple2p )
MCFG_A2BUS_SLOT_REMOVE("sl3")
MCFG_A2BUS_SLOT_REMOVE("sl6")
-// MCFG_A2BUS_ONBOARD_ADD("a2bus", "sl3", A2BUS_LAB_80COL, NULL)
+// MCFG_A2BUS_ONBOARD_ADD("a2bus", "sl3", A2BUS_LAB_80COL, NULL)
MCFG_A2BUS_ONBOARD_ADD("a2bus", "sl6", A2BUS_IWM_FDC, NULL)
MACHINE_CONFIG_END
diff --git a/src/mess/drivers/apricot.c b/src/mess/drivers/apricot.c
index 9e17305de03..f5160df1987 100644
--- a/src/mess/drivers/apricot.c
+++ b/src/mess/drivers/apricot.c
@@ -2,8 +2,8 @@
ACT Apricot PC/Xi
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
- Error 29 (timer failed)
- Dump of the keyboard MCU ROM needed (can be dumped using test mode)
diff --git a/src/mess/drivers/astrocde.c b/src/mess/drivers/astrocde.c
index 177e66d1817..e31abe09ffd 100644
--- a/src/mess/drivers/astrocde.c
+++ b/src/mess/drivers/astrocde.c
@@ -2,8 +2,8 @@
Bally Astrocade consumer hardware
- license: MAME
- copyright-holders: Nicola Salmoria, Mike Coates, Frank Palazzolo, Aaron Giles, Dirk Best
+ license: MAME
+ copyright-holders: Nicola Salmoria, Mike Coates, Frank Palazzolo, Aaron Giles, Dirk Best
****************************************************************************/
diff --git a/src/mess/drivers/bbc.c b/src/mess/drivers/bbc.c
index 09a930b06e3..4153d09db23 100644
--- a/src/mess/drivers/bbc.c
+++ b/src/mess/drivers/bbc.c
@@ -3,7 +3,7 @@
ANA01 - Model A
ANA02 - Model A with Econet interface
-
+
ANB01 - Model B
ANB02 - Model B with Econet interface
ANB03 - Model B with Disc interface
@@ -28,7 +28,7 @@
ARM1 - ARM Evaluation System
ADB20 - Master Compact
-
+
MESS Driver By:
Gordon Jefferyes
@@ -45,12 +45,12 @@
#include "cpu/m6502/m6502.h"
#include "cpu/m6502/m65sc02.h"
#include "machine/6522via.h"
-#include "machine/mc146818.h" /* RTC & CMOS RAM */
+#include "machine/mc146818.h" /* RTC & CMOS RAM */
#include "machine/upd7002.h"
#include "bus/centronics/ctronics.h"
#include "bus/econet/econet.h"
-#include "sound/tms5220.h" /* Speech */
-#include "video/saa5050.h" /* Teletext */
+#include "sound/tms5220.h" /* Speech */
+#include "video/saa5050.h" /* Teletext */
/* Devices */
#include "imagedev/flopdrv.h"
@@ -67,7 +67,7 @@ A = BBC Model A
B = BBC Model B
B+ = BBC Model B+
M = BBC Master
-
+
A B B+ M
+ &0000 + + + +
| | | | |
@@ -142,16 +142,16 @@ static ADDRESS_MAP_START( bbca_mem, AS_PROGRAM, 8, bbc_state )
AM_RANGE(0x8000, 0xbfff) AM_READ_BANK("bank4") /* 8000-bfff Paged ROM */
AM_RANGE(0xc000, 0xfbff) AM_READ_BANK("bank7") /* c000-fbff OS ROM */
AM_RANGE(0xfc00, 0xfdff) AM_NOP /* fc00-fdff FRED & JIM Pages */
- /* fe00-feff Shiela Address Page */
+ /* fe00-feff Shiela Address Page */
AM_RANGE(0xfe00, 0xfe07) AM_READWRITE(bbc_6845_r, bbc_6845_w) /* fe00-fe07 6845 CRTC Video controller */
AM_RANGE(0xfe08, 0xfe08) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, status_read, control_write)
AM_RANGE(0xfe09, 0xfe09) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, data_read, data_write)
AM_RANGE(0xfe10, 0xfe17) AM_READWRITE(bbc_fe_r, bbc_SerialULA_w) /* fe10-fe17 Serial ULA Serial system chip */
AM_RANGE(0xfe18, 0xfe1f) AM_NOP /* fe18-fe1f INTOFF/STATID # ECONET Interrupt Off / ID No. */
AM_RANGE(0xfe20, 0xfe2f) AM_WRITE(bbc_videoULA_w) /* R: fe20-fe2f INTON # ECONET Interrupt On */
- /* W: fe20-fe2f Video ULA Video system chip */
+ /* W: fe20-fe2f Video ULA Video system chip */
AM_RANGE(0xfe30, 0xfe3f) AM_READWRITE(bbc_fe_r, bbc_page_selecta_w) /* R: fe30-fe3f NC Not Connected */
- /* W: fe30-fe3f 84LS161 Paged ROM selector */
+ /* W: fe30-fe3f 84LS161 Paged ROM selector */
AM_RANGE(0xfe40, 0xfe5f) AM_DEVREADWRITE("via6522_0", via6522_device, read, write) /* fe40-fe5f 6522 VIA SYSTEM VIA */
AM_RANGE(0xfe60, 0xfe7f) AM_NOP /* fe60-fe7f 6522 VIA # USER VIA */
AM_RANGE(0xfe80, 0xfe9f) AM_NOP /* fe80-fe9f 8271/1770 FDC # Floppy disc controller */
@@ -170,16 +170,16 @@ static ADDRESS_MAP_START( bbcb_mem, AS_PROGRAM, 8, bbc_state )
AM_RANGE(0x8000, 0xbfff) AM_READ_BANK("bank4") AM_WRITE(bbc_memoryb4_w) /* 8000-bfff Paged ROM */
AM_RANGE(0xc000, 0xfbff) AM_READ_BANK("bank7") /* c000-fbff OS ROM */
AM_RANGE(0xfc00, 0xfdff) AM_READWRITE(bbc_opus_read, bbc_opus_write) /* fc00-fdff OPUS Disc Controller */
- /* fe00-feff Shiela Address Page */
+ /* fe00-feff Shiela Address Page */
AM_RANGE(0xfe00, 0xfe07) AM_READWRITE(bbc_6845_r, bbc_6845_w) /* fe00-fe07 6845 CRTC Video controller */
AM_RANGE(0xfe08, 0xfe08) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, status_read, control_write)
AM_RANGE(0xfe09, 0xfe09) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, data_read, data_write)
AM_RANGE(0xfe10, 0xfe17) AM_READWRITE(bbc_fe_r, bbc_SerialULA_w) /* fe10-fe17 Serial ULA Serial system chip */
AM_RANGE(0xfe18, 0xfe1f) AM_NOP /* fe18-fe1f INTOFF/STATID ECONET Interrupt Off / ID No. */
AM_RANGE(0xfe20, 0xfe2f) AM_WRITE(bbc_videoULA_w) /* R: fe20-fe2f INTON ECONET Interrupt On */
- /* W: fe20-fe2f Video ULA Video system chip */
+ /* W: fe20-fe2f Video ULA Video system chip */
AM_RANGE(0xfe30, 0xfe3f) AM_READWRITE(bbc_fe_r, bbc_page_selectb_w) /* R: fe30-fe3f NC Not Connected */
- /* W: fe30-fe3f 84LS161 Paged ROM selector */
+ /* W: fe30-fe3f 84LS161 Paged ROM selector */
AM_RANGE(0xfe40, 0xfe5f) AM_DEVREADWRITE("via6522_0", via6522_device, read, write) /* fe40-fe5f 6522 VIA SYSTEM VIA */
AM_RANGE(0xfe60, 0xfe7f) AM_DEVREADWRITE("via6522_1", via6522_device, read, write) /* fe60-fe7f 6522 VIA USER VIA */
AM_RANGE(0xfe80, 0xfe9f) AM_READWRITE(bbc_disc_r, bbc_disc_w) /* fe80-fe9f 8271 FDC Floppy disc controller */
@@ -199,16 +199,16 @@ static ADDRESS_MAP_START( bbcbp_mem, AS_PROGRAM, 8, bbc_state )
AM_RANGE(0xb000, 0xbfff) AM_READ_BANK("bank6") /* b000-bfff Rest of paged ROM area */
AM_RANGE(0xc000, 0xfbff) AM_READ_BANK("bank7") /* c000-fbff OS ROM */
AM_RANGE(0xfc00, 0xfdff) AM_NOP /* fc00-fdff FRED & JIM Pages */
- /* fe00-feff Shiela Address Page */
+ /* fe00-feff Shiela Address Page */
AM_RANGE(0xfe00, 0xfe07) AM_READWRITE(bbc_6845_r, bbc_6845_w) /* fe00-fe07 6845 CRTC Video controller */
AM_RANGE(0xfe08, 0xfe08) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, status_read, control_write)
AM_RANGE(0xfe09, 0xfe09) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, data_read, data_write)
AM_RANGE(0xfe10, 0xfe17) AM_READWRITE(bbc_fe_r, bbc_SerialULA_w) /* fe10-fe17 Serial ULA Serial system chip */
AM_RANGE(0xfe18, 0xfe1f) AM_NOP /* fe18-fe1f INTOFF/STATID ECONET Interrupt Off / ID No. */
AM_RANGE(0xfe20, 0xfe2f) AM_WRITE(bbc_videoULA_w) /* R: fe20-fe2f INTON ECONET Interrupt On */
- /* W: fe20-fe2f Video ULA Video system chip */
+ /* W: fe20-fe2f Video ULA Video system chip */
AM_RANGE(0xfe30, 0xfe3f) AM_READWRITE(bbc_fe_r, bbc_page_selectbp_w) /* R: fe30-fe3f NC Not Connected */
- /* W: fe30-fe3f 84LS161 Paged ROM selector */
+ /* W: fe30-fe3f 84LS161 Paged ROM selector */
AM_RANGE(0xfe40, 0xfe5f) AM_DEVREADWRITE("via6522_0", via6522_device, read, write) /* fe40-fe5f 6522 VIA SYSTEM VIA */
AM_RANGE(0xfe60, 0xfe7f) AM_DEVREADWRITE("via6522_1", via6522_device, read, write) /* fe60-fe7f 6522 VIA USER VIA */
AM_RANGE(0xfe80, 0xfe9f) AM_READWRITE(bbc_wd1770_read, bbc_wd1770_write) /* fe80-fe9f 1770 FDC Floppy disc controller */
@@ -228,7 +228,7 @@ static ADDRESS_MAP_START( bbcbp128_mem, AS_PROGRAM, 8, bbc_state )
AM_RANGE(0xb000, 0xbfff) AM_READ_BANK("bank6") AM_WRITE(bbc_memorybp6_128_w) /* b000-bfff Rest of paged ROM area */
AM_RANGE(0xc000, 0xfbff) AM_READ_BANK("bank7") /* c000-fbff OS ROM */
AM_RANGE(0xfc00, 0xfdff) AM_NOP /* fc00-fdff FRED & JIM Pages */
- /* fe00-feff Shiela Address Page */
+ /* fe00-feff Shiela Address Page */
AM_RANGE(0xfe00, 0xfe07) AM_READWRITE(bbc_6845_r, bbc_6845_w) /* fe00-fe07 6845 CRTC Video controller */
AM_RANGE(0xfe08, 0xfe08) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, status_read, control_write)
AM_RANGE(0xfe09, 0xfe09) AM_MIRROR(0x06) AM_DEVREADWRITE("acia6850", acia6850_device, data_read, data_write)
@@ -236,9 +236,9 @@ static ADDRESS_MAP_START( bbcbp128_mem, AS_PROGRAM, 8, bbc_state )
AM_RANGE(0xfe10, 0xfe17) AM_NOP /* fe10-fe17 Serial ULA Serial system chip */
AM_RANGE(0xfe18, 0xfe1f) AM_NOP /* fe18-fe1f INTOFF/STATID ECONET Interrupt Off / ID No. */
AM_RANGE(0xfe20, 0xfe2f) AM_WRITE(bbc_videoULA_w) /* R: fe20-fe2f INTON ECONET Interrupt On */
- /* W: fe20-fe2f Video ULA Video system chip */
+ /* W: fe20-fe2f Video ULA Video system chip */
AM_RANGE(0xfe30, 0xfe3f) AM_READWRITE(bbc_fe_r, bbc_page_selectbp_w) /* R: fe30-fe3f NC Not Connected */
- /* W: fe30-fe3f 84LS161 Paged ROM selector */
+ /* W: fe30-fe3f 84LS161 Paged ROM selector */
AM_RANGE(0xfe40, 0xfe5f) AM_DEVREADWRITE("via6522_0", via6522_device, read, write) /* fe40-fe5f 6522 VIA SYSTEM VIA */
AM_RANGE(0xfe60, 0xfe7f) AM_DEVREADWRITE("via6522_1", via6522_device, read, write) /* fe60-fe7f 6522 VIA USER VIA */
AM_RANGE(0xfe80, 0xfe9f) AM_READWRITE(bbc_wd1770_read, bbc_wd1770_write) /* fe80-fe9f 1770 FDC Floppy disc controller */
@@ -466,10 +466,10 @@ INPUT_PORTS_END
static INPUT_PORTS_START(bbc_config)
PORT_START("BBCCONFIG")
-
-// PORT_CONFNAME( 0x01, 0x00, "Speech Upgrade" )
-// PORT_CONFSETTING( 0x00, DEF_STR( On ) )
-// PORT_CONFSETTING( 0x01, DEF_STR( Off ) )
+
+// PORT_CONFNAME( 0x01, 0x00, "Speech Upgrade" )
+// PORT_CONFSETTING( 0x00, DEF_STR( On ) )
+// PORT_CONFSETTING( 0x01, DEF_STR( Off ) )
PORT_CONFNAME( 0x07, 0x00, "DFS Select" )
PORT_CONFSETTING( 0x00, "Acorn DFS 0.90 (read only)" )
@@ -486,7 +486,7 @@ static INPUT_PORTS_START(bbc_config)
PORT_CONFSETTING( 0x08, "Solidisk 128K (fe62)" )
PORT_CONFSETTING( 0x10, "Acorn 64K (fe30)" )
PORT_CONFSETTING( 0x18, "Acorn 128K (fe30)" )
-// PORT_CONFSETTING( 0x20, "ATPL Sidewise 16K" )
+// PORT_CONFSETTING( 0x20, "ATPL Sidewise 16K" )
INPUT_PORTS_END
static INPUT_PORTS_START(bbca)
@@ -494,7 +494,7 @@ static INPUT_PORTS_START(bbca)
INPUT_PORTS_END
static INPUT_PORTS_START(bbcb)
- PORT_INCLUDE(bbc_config)
+ PORT_INCLUDE(bbc_config)
PORT_INCLUDE(bbc_keyboard)
PORT_INCLUDE(bbc_joy)
INPUT_PORTS_END
@@ -728,7 +728,7 @@ static MACHINE_CONFIG_DERIVED( bbcb, bbca )
/* speech hardware */
// MCFG_SOUND_ADD("tms5220", TMS5220, 640000)
-// MCFG_TMS52XX_SPEECHROM("vsm")
+// MCFG_TMS52XX_SPEECHROM("vsm")
/* devices */
MCFG_VIA6522_ADD("via6522_1", 1000000, bbcb_user_via)
@@ -768,7 +768,7 @@ static MACHINE_CONFIG_DERIVED( bbcb_us, bbca )
/* speech hardware */
// MCFG_SOUND_ADD("tms5220", TMS5220, 640000)
-// MCFG_TMS52XX_SPEECHROM("vsm")
+// MCFG_TMS52XX_SPEECHROM("vsm")
/* video hardware */
MCFG_SCREEN_MODIFY("screen")
@@ -877,7 +877,7 @@ static MACHINE_CONFIG_START( bbcm, bbc_state )
/* cassette */
MCFG_CASSETTE_ADD( "cassette", bbc_cassette_interface )
- /* cartridges */
+ /* cartridges */
MCFG_CARTSLOT_ADD("cart")
MCFG_CARTSLOT_EXTENSION_LIST("bin")
MCFG_CARTSLOT_NOT_MANDATORY
@@ -888,7 +888,7 @@ static MACHINE_CONFIG_START( bbcm, bbc_state )
MCFG_SOFTWARE_LIST_ADD("cass_ls_m", "bbcm_cass")
MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("cass_ls_a", "bbca_cass")
MCFG_SOFTWARE_LIST_COMPATIBLE_ADD("cass_ls_b", "bbcb_cass")
- MCFG_SOFTWARE_LIST_ADD("cart_ls_m", "bbcm_cart")
+ MCFG_SOFTWARE_LIST_ADD("cart_ls_m", "bbcm_cart")
/* acia */
MCFG_ACIA6850_ADD("acia6850", bbc_acia6850_interface)
@@ -936,11 +936,11 @@ static MACHINE_CONFIG_DERIVED( bbcmet, bbcm )
/* Remove all devices not present in this model */
/* sound hardware */
-// MCFG_DEVICE_REMOVE("mono")
-// MCFG_DEVICE_REMOVE("sn76489")
+// MCFG_DEVICE_REMOVE("mono")
+// MCFG_DEVICE_REMOVE("sn76489")
/* printer */
-// MCFG_DEVICE_REMOVE("centronics")
+// MCFG_DEVICE_REMOVE("centronics")
/* cassette */
MCFG_DEVICE_REMOVE("cassette")
@@ -951,15 +951,15 @@ static MACHINE_CONFIG_DERIVED( bbcmet, bbcm )
MCFG_SOFTWARE_LIST_REMOVE("cass_ls_b")
/* acia */
-// MCFG_DEVICE_REMOVE("acia6850")
+// MCFG_DEVICE_REMOVE("acia6850")
MCFG_DEVICE_REMOVE(RS232_TAG)
/* devices */
-// MCFG_DEVICE_REMOVE("upd7002")
-// MCFG_DEVICE_REMOVE("via6522_1")
+// MCFG_DEVICE_REMOVE("upd7002")
+// MCFG_DEVICE_REMOVE("via6522_1")
/* fdc */
-// MCFG_DEVICE_REMOVE("wd177x")
+// MCFG_DEVICE_REMOVE("wd177x")
MACHINE_CONFIG_END
@@ -978,8 +978,8 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( bbcmc, bbcm )
-
-// MCFG_DEVICE_REMOVE("rtc")
+
+// MCFG_DEVICE_REMOVE("rtc")
/* fdc */
MCFG_DEVICE_REMOVE("wd177x")
@@ -1005,29 +1005,29 @@ ROM_START(bbca)
/* rom page 3 0c000 BASIC */
ROM_DEFAULT_BIOS("os12b2")
ROM_SYSTEM_BIOS( 0, "os12b2", "OS 1.20 / BASIC2" )
- ROMX_LOAD("os12.rom", 0x10000, 0x4000, CRC(3c14fc70) SHA1(0d9bcaf6a393c9ce2359ed700ddb53c232c2c45d), ROM_BIOS(1)) /* os */
- ROMX_LOAD("basic2.rom", 0x0c000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(1)) /* rom page 3 0c000 */
+ ROMX_LOAD("os12.rom", 0x10000, 0x4000, CRC(3c14fc70) SHA1(0d9bcaf6a393c9ce2359ed700ddb53c232c2c45d), ROM_BIOS(1)) /* os */
+ ROMX_LOAD("basic2.rom", 0x0c000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(1)) /* rom page 3 0c000 */
ROM_SYSTEM_BIOS( 1, "os12b1", "OS 1.20 / BASIC1" )
- ROMX_LOAD("os12.rom", 0x10000, 0x4000, CRC(3c14fc70) SHA1(0d9bcaf6a393c9ce2359ed700ddb53c232c2c45d), ROM_BIOS(2)) /* os */
- ROMX_LOAD("basic1.rom", 0x0c000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(2)) /* rom page 3 0c000 */
+ ROMX_LOAD("os12.rom", 0x10000, 0x4000, CRC(3c14fc70) SHA1(0d9bcaf6a393c9ce2359ed700ddb53c232c2c45d), ROM_BIOS(2)) /* os */
+ ROMX_LOAD("basic1.rom", 0x0c000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(2)) /* rom page 3 0c000 */
ROM_SYSTEM_BIOS( 2, "os10b2", "OS 1.00 / BASIC2" )
- ROMX_LOAD("os10.rom", 0x10000, 0x4000, CRC(9679b8f8) SHA1(d35f6723132aabe3c4d00fc16fd9ecc6768df753), ROM_BIOS(3)) /* os */
- ROMX_LOAD("basic2.rom", 0x0c000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(3)) /* rom page 3 0c000 */
+ ROMX_LOAD("os10.rom", 0x10000, 0x4000, CRC(9679b8f8) SHA1(d35f6723132aabe3c4d00fc16fd9ecc6768df753), ROM_BIOS(3)) /* os */
+ ROMX_LOAD("basic2.rom", 0x0c000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(3)) /* rom page 3 0c000 */
ROM_SYSTEM_BIOS( 3, "os10b1", "OS 1.00 / BASIC1" )
- ROMX_LOAD("os10.rom", 0x10000, 0x4000, CRC(9679b8f8) SHA1(d35f6723132aabe3c4d00fc16fd9ecc6768df753), ROM_BIOS(4)) /* os */
- ROMX_LOAD("basic1.rom", 0x0c000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(4)) /* rom page 3 0c000 */
+ ROMX_LOAD("os10.rom", 0x10000, 0x4000, CRC(9679b8f8) SHA1(d35f6723132aabe3c4d00fc16fd9ecc6768df753), ROM_BIOS(4)) /* os */
+ ROMX_LOAD("basic1.rom", 0x0c000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(4)) /* rom page 3 0c000 */
ROM_SYSTEM_BIOS( 4, "os01b2", "OS 0.10 / BASIC2" )
- ROMX_LOAD("os01.rom", 0x10000, 0x4000, CRC(45ee0980) SHA1(4b0ece6dc139d5d3f4fabd023716fb6f25149b80), ROM_BIOS(5)) /* os */
- ROMX_LOAD("basic2.rom", 0x00000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(5)) /* rom page 0 00000 */
- ROMX_LOAD("basic2.rom", 0x04000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(5)) /* rom page 1 04000 */
- ROMX_LOAD("basic2.rom", 0x08000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(5)) /* rom page 2 08000 */
- ROMX_LOAD("basic2.rom", 0x0c000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(5)) /* rom page 3 0c000 */
+ ROMX_LOAD("os01.rom", 0x10000, 0x4000, CRC(45ee0980) SHA1(4b0ece6dc139d5d3f4fabd023716fb6f25149b80), ROM_BIOS(5)) /* os */
+ ROMX_LOAD("basic2.rom", 0x00000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(5)) /* rom page 0 00000 */
+ ROMX_LOAD("basic2.rom", 0x04000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(5)) /* rom page 1 04000 */
+ ROMX_LOAD("basic2.rom", 0x08000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(5)) /* rom page 2 08000 */
+ ROMX_LOAD("basic2.rom", 0x0c000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(5)) /* rom page 3 0c000 */
ROM_SYSTEM_BIOS( 5, "os01b1", "OS 0.10 / BASIC1" )
- ROMX_LOAD("os01.rom", 0x10000, 0x4000, CRC(45ee0980) SHA1(4b0ece6dc139d5d3f4fabd023716fb6f25149b80), ROM_BIOS(6)) /* os */
- ROMX_LOAD("basic1.rom", 0x00000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(6)) /* rom page 0 00000 */
- ROMX_LOAD("basic1.rom", 0x04000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(6)) /* rom page 1 04000 */
- ROMX_LOAD("basic1.rom", 0x08000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(6)) /* rom page 2 08000 */
- ROMX_LOAD("basic1.rom", 0x0c000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(6)) /* rom page 3 0c000 */
+ ROMX_LOAD("os01.rom", 0x10000, 0x4000, CRC(45ee0980) SHA1(4b0ece6dc139d5d3f4fabd023716fb6f25149b80), ROM_BIOS(6)) /* os */
+ ROMX_LOAD("basic1.rom", 0x00000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(6)) /* rom page 0 00000 */
+ ROMX_LOAD("basic1.rom", 0x04000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(6)) /* rom page 1 04000 */
+ ROMX_LOAD("basic1.rom", 0x08000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(6)) /* rom page 2 08000 */
+ ROMX_LOAD("basic1.rom", 0x0c000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(6)) /* rom page 3 0c000 */
ROM_END
@@ -1059,18 +1059,18 @@ ROM_START(bbcb)
/* rom page 15 3c000 BASIC */
ROM_DEFAULT_BIOS("os12b2")
ROM_SYSTEM_BIOS( 0, "os12b2", "OS 1.20 / BASIC2" )
- ROMX_LOAD("os12.rom", 0x40000, 0x4000, CRC(3c14fc70) SHA1(0d9bcaf6a393c9ce2359ed700ddb53c232c2c45d), ROM_BIOS(1)) /* os */
- ROMX_LOAD("basic2.rom", 0x3c000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(1)) /* rom page 15 3c000 */
+ ROMX_LOAD("os12.rom", 0x40000, 0x4000, CRC(3c14fc70) SHA1(0d9bcaf6a393c9ce2359ed700ddb53c232c2c45d), ROM_BIOS(1)) /* os */
+ ROMX_LOAD("basic2.rom", 0x3c000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(1)) /* rom page 15 3c000 */
ROM_SYSTEM_BIOS( 1, "os12b1", "OS 1.20 / BASIC1" )
- ROMX_LOAD("os12.rom", 0x40000, 0x4000, CRC(3c14fc70) SHA1(0d9bcaf6a393c9ce2359ed700ddb53c232c2c45d), ROM_BIOS(2)) /* os */
- ROMX_LOAD("basic1.rom", 0x3c000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(2)) /* rom page 15 3c000 */
+ ROMX_LOAD("os12.rom", 0x40000, 0x4000, CRC(3c14fc70) SHA1(0d9bcaf6a393c9ce2359ed700ddb53c232c2c45d), ROM_BIOS(2)) /* os */
+ ROMX_LOAD("basic1.rom", 0x3c000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(2)) /* rom page 15 3c000 */
ROM_SYSTEM_BIOS( 2, "os10b2", "OS 1.00 / BASIC2" )
- ROMX_LOAD("os10.rom", 0x40000, 0x4000, CRC(9679b8f8) SHA1(d35f6723132aabe3c4d00fc16fd9ecc6768df753), ROM_BIOS(3)) /* os */
- ROMX_LOAD("basic2.rom", 0x3c000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(3)) /* rom page 15 3c000 */
+ ROMX_LOAD("os10.rom", 0x40000, 0x4000, CRC(9679b8f8) SHA1(d35f6723132aabe3c4d00fc16fd9ecc6768df753), ROM_BIOS(3)) /* os */
+ ROMX_LOAD("basic2.rom", 0x3c000, 0x4000, CRC(79434781) SHA1(4a7393f3a45ea309f744441c16723e2ef447a281), ROM_BIOS(3)) /* rom page 15 3c000 */
ROM_SYSTEM_BIOS( 3, "os10b1", "OS 1.00 / BASIC1" )
- ROMX_LOAD("os10.rom", 0x40000, 0x4000, CRC(9679b8f8) SHA1(d35f6723132aabe3c4d00fc16fd9ecc6768df753), ROM_BIOS(4)) /* os */
- ROMX_LOAD("basic1.rom", 0x3c000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(4)) /* rom page 15 3c000 */
-
+ ROMX_LOAD("os10.rom", 0x40000, 0x4000, CRC(9679b8f8) SHA1(d35f6723132aabe3c4d00fc16fd9ecc6768df753), ROM_BIOS(4)) /* os */
+ ROMX_LOAD("basic1.rom", 0x3c000, 0x4000, CRC(b3364108) SHA1(890f6e3e7fab3340f75b85e93ff29332bc9ecb2e), ROM_BIOS(4)) /* rom page 15 3c000 */
+
ROM_REGION(0x20000,"user2",0) /* DFS ROMS */
ROM_LOAD("dfs09.rom", 0x00000, 0x2000, CRC(3ce609cf) SHA1(5cc0f14b8f46855c70eaa653cca4ad079b458732))
ROM_RELOAD( 0x02000, 0x2000 )
@@ -1257,7 +1257,7 @@ ROM_START(bbcm)
/* 34000 rom 13 ADFS */
/* 38000 rom 14 View + MOS code */
/* 3c000 rom 15 Terminal + Tube host + CFS */
-// ROM_LOAD("anfs424.rom", 0x20000, 0x4000, CRC(1b9f75fd) SHA1(875f71edd48f87c3a55371409d0cc2015d8b5853) ) // TODO where to load this?
+// ROM_LOAD("anfs424.rom", 0x20000, 0x4000, CRC(1b9f75fd) SHA1(875f71edd48f87c3a55371409d0cc2015d8b5853) ) // TODO where to load this?
ROM_REGION(0x40,"rtc",0) /* mc146818 */
/* Factory defaulted CMOS RAM, sets default language ROM, etc. */
@@ -1293,7 +1293,7 @@ ROM_START(bbcmt)
/* 34000 rom 13 ADFS */
/* 38000 rom 14 View + MOS code */
/* 3c000 rom 15 Terminal + Tube host + CFS */
-// ROM_LOAD("anfs424.ic27", 0x20000, 0x4000, CRC(1b9f75fd) SHA1(875f71edd48f87c3a55371409d0cc2015d8b5853) ) // TODO where to load this?
+// ROM_LOAD("anfs424.ic27", 0x20000, 0x4000, CRC(1b9f75fd) SHA1(875f71edd48f87c3a55371409d0cc2015d8b5853) ) // TODO where to load this?
ROM_REGION(0x40,"rtc",0) /* mc146818 */
/* Factory defaulted CMOS RAM, sets default language ROM, etc. */
@@ -1395,7 +1395,7 @@ ROM_START(bbcm512)
/* 34000 rom 13 ADFS */
/* 38000 rom 14 View + MOS code */
/* 3c000 rom 15 Terminal + Tube host + CFS */
-// ROM_LOAD("anfs424.ic27", 0x20000, 0x4000, CRC(1b9f75fd) SHA1(875f71edd48f87c3a55371409d0cc2015d8b5853) )
+// ROM_LOAD("anfs424.ic27", 0x20000, 0x4000, CRC(1b9f75fd) SHA1(875f71edd48f87c3a55371409d0cc2015d8b5853) )
ROM_REGION(0x40,"rtc",0) /* mc146818 */
/* Factory defaulted CMOS RAM, sets default language ROM, etc. */
@@ -1429,7 +1429,7 @@ ROM_START(bbcmarm)
/* 34000 rom 13 ADFS */
/* 38000 rom 14 View + MOS code */
/* 3c000 rom 15 Terminal + Tube host + CFS */
-// ROM_LOAD("anfs424.ic27", 0x20000, 0x4000, CRC(1b9f75fd) SHA1(875f71edd48f87c3a55371409d0cc2015d8b5853) )
+// ROM_LOAD("anfs424.ic27", 0x20000, 0x4000, CRC(1b9f75fd) SHA1(875f71edd48f87c3a55371409d0cc2015d8b5853) )
ROM_REGION(0x40,"rtc",0) /* mc146818 */
/* Factory defaulted CMOS RAM, sets default language ROM, etc. */
@@ -1446,7 +1446,7 @@ ROM_START(bbcmc)
ROMX_LOAD("mos510.ic49", 0x30000, 0x10000, BAD_DUMP CRC(9a2a6086) SHA1(094ab37b0b6437c4f1653eaa0602ef102737adb6), ROM_BIOS(1)) /* Merged individual ROM bank dumps */
ROM_SYSTEM_BIOS( 1, "mos500", "Original MOS 5.00" )
ROMX_LOAD("mos500.ic49", 0x30000, 0x10000, BAD_DUMP CRC(f6170023) SHA1(140d002d2d9cd34b47197a2ba823505af2a84633), ROM_BIOS(2)) /* Merged individual ROM bank dumps */
-
+
ROM_COPY("user1", 0x30000, 0x40000, 0x4000) /* Move loaded roms into place */
ROM_FILL(0x30000, 0x4000, 0xFFFF)
/* 00000 rom 0 EXTERNAL */
@@ -1466,9 +1466,9 @@ ROM_START(bbcmc)
/* 38000 rom 14 BASIC */
/* 3c000 rom 15 Utils */
-// ROM_REGION(0x80,"mc146818",0) /* mc146818 */
+// ROM_REGION(0x80,"mc146818",0) /* mc146818 */
/* Factory defaulted CMOS RAM, sets default language ROM, etc. */
-// ROM_LOAD("mos500.cmos", 0x00, 0x80, CRC(d8458039) SHA1(72c056d493e74ceca41f48936012b012b496a226))
+// ROM_LOAD("mos500.cmos", 0x00, 0x80, CRC(d8458039) SHA1(72c056d493e74ceca41f48936012b012b496a226))
ROM_END
@@ -1500,9 +1500,9 @@ ROM_START(bbcmc_ar)
ROM_LOAD("international16.rom", 0x8000 , 0x4000, CRC(0ef527b1) SHA1(dc5149ccf588cd591a6ad47727474ef3313272ce) )
ROM_LOAD("arabian-c22.rom" , 0x20000, 0x4000, CRC(4f3aadff) SHA1(2bbf61ba68264ce5845aab9c54e750b0efe219c8) )
-// ROM_REGION(0x80,"mc146818",0) /* mc146818 */
+// ROM_REGION(0x80,"mc146818",0) /* mc146818 */
/* Factory defaulted CMOS RAM, sets default language ROM, etc. */
-// ROM_LOAD("mos500.cmos", 0x00, 0x80, CRC(d8458039) SHA1(72c056d493e74ceca41f48936012b012b496a226))
+// ROM_LOAD("mos500.cmos", 0x00, 0x80, CRC(d8458039) SHA1(72c056d493e74ceca41f48936012b012b496a226))
ROM_END
diff --git a/src/mess/drivers/cat.c b/src/mess/drivers/cat.c
index 4a0afbf6bf0..6f879f1d6de 100644
--- a/src/mess/drivers/cat.c
+++ b/src/mess/drivers/cat.c
@@ -7,29 +7,29 @@
Copyright (C) 2009-2013 Miodrag Milanovic and Jonathan Gevaryahu AKA Lord Nightmare
With information and help from John "Sandy" Bumgarner, Dwight Elvey,
Charles Springer, Terry Holmes, Jonathan Sand, Aza Raskin and others.
-
-
+
+
This source file is dual-licensed under the following licenses:
1. The MAME license as of September 2013
2. The GNU LGPLv2.1:
-
+
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
-
+
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
-
+
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
-
+
Please contact the authors if you require other licensing.
-
-
+
+
This driver is dedicated in memory of Jef Raskin and Dave Boulton
12/06/2009 Skeleton driver.
@@ -234,7 +234,7 @@ J9: unpopulated DIL 40-pin straight connector for a ROM debug/expansion/RAM-shad
/HICE is most likely !(a19|a18)&!a15
pin 1 (GND) is in the lower left and the pins count low-high then to the right
(gnd ? ? ? ? ? vcc a14 a13 a8 a9 a11 /OE a10 /LOCE d7 d6 d5 d4 d3 )
- (GND ? ? ? gnd ? vcc a12 a7 a6 a5 a4 a3 a2 a1 a0 d0 d1 d2 gnd)
+ (GND ? ? ? gnd ? vcc a12 a7 a6 a5 a4 a3 a2 a1 a0 d0 d1 d2 gnd)
Jx: 4 pin on top side, 6 pin on bottom side edge ?debug? connector (doesn't have a Jx number)
(trace me!)
B1: a cut-able trace on the pcb. Not cut, affects one of the pins on the unpopulated J9 connector only.
@@ -453,9 +453,9 @@ public:
DECLARE_READ16_MEMBER(cat_2e80_r);
DECLARE_READ16_MEMBER(cat_0080_r);
DECLARE_READ16_MEMBER(cat_0000_r);
-
+
DECLARE_READ8_MEMBER(swyft_d0000);
-
+
DECLARE_READ8_MEMBER(swyft_via0_r);
DECLARE_WRITE8_MEMBER(swyft_via0_w);
DECLARE_READ8_MEMBER(via0_pa_r);
@@ -471,7 +471,7 @@ public:
DECLARE_READ_LINE_MEMBER(via0_cb2_r);
DECLARE_WRITE_LINE_MEMBER(via0_cb2_w);
DECLARE_WRITE_LINE_MEMBER(via0_int_w);
-
+
DECLARE_READ8_MEMBER(swyft_via1_r);
DECLARE_WRITE8_MEMBER(swyft_via1_w);
DECLARE_READ8_MEMBER(via1_pa_r);
@@ -1200,7 +1200,7 @@ rom:
...-0xC951: ?
0xC952: boot vector
0xC952-0xCAAE: binary code (purpose?)
- 0xCD26-0xCD3B: ?init forth bytecode?
+ 0xCD26-0xCD3B: ?init forth bytecode?
0xCD3C-0xCEBA: 0xFF fill (unused?)
0xCEEB-0xFFFE: Forth dictionaries for compiling, with <word> then <3 bytes> afterward? (or before it? most likely afterward)
@@ -1243,7 +1243,7 @@ Add A0 low word to itself
Add A0 low word to itself again
move the long word from address pointed to by A0 (i.e. the specific opcode's area at the 46xxx part of ram) to A1
Jump to A1(CD06)
-
+
CD06: jump to A3 (E94)
E94: subtract D5 from A5 (cd28 - cd22 = 0x0006)
@@ -1358,8 +1358,8 @@ READ8_MEMBER( cat_state::swyft_d0000 )
// if bit is 1 enable: (obviously don't set more than one bit or you get bus contention!)
// acia
-// via0
-// via1
+// via0
+// via1
// x x x x 1 1 ?1? ?0? ? ^ ^ ^ ? ? * * * * ?*? ? ? ? ? ?
// ^ ^ ^ ^ <- these four bits address the VIA registers? is this correct?
static const char *const swyft_via_regnames[] = { "0: ORB/IRB", "1: ORA/IRA", "2: DDRB", "3: DDRA", "4: T1C-L", "5: T1C-H", "6: T1L-L", "7: T1L-H", "8: T2C-L" "9: T2C-H", "A: SR", "B: ACR", "C: PCR", "D: IFR", "E: IER", "F: ORA/IRA*" };
diff --git a/src/mess/drivers/compis.c b/src/mess/drivers/compis.c
index ae4b9f59fc8..0331414b67d 100644
--- a/src/mess/drivers/compis.c
+++ b/src/mess/drivers/compis.c
@@ -96,7 +96,7 @@ READ16_MEMBER( compis_state::isbx1_tdma_r )
{
if (ACCESSING_BITS_0_7)
{
- if (offset < 2)
+ if (offset < 2)
return m_crtc->read(space, offset & 0x01);
else
return 0;
@@ -280,8 +280,8 @@ static ADDRESS_MAP_START( compis_io, AS_IO, 16, compis_state )
AM_RANGE(0x0000, 0x0007) /* PCS0 */ AM_MIRROR(0x78) AM_DEVREADWRITE8(I8255_TAG, i8255_device, read, write, 0xff00)
AM_RANGE(0x0080, 0x0087) /* PCS1 */ AM_MIRROR(0x78) AM_DEVREADWRITE8(I8253_TAG, pit8253_device, read, write, 0x00ff)
AM_RANGE(0x0100, 0x011f) /* PCS2 */ AM_MIRROR(0x60) AM_DEVREADWRITE8(MM58174A_TAG, mm58274c_device, read, write, 0x00ff)
- //AM_RANGE(0x0180, 0x0181) /* PCS3 */ AM_MIRROR(0x7e)
- //AM_RANGE(0x0200, 0x0201) /* PCS4 */ AM_MIRROR(0x7e)
+ //AM_RANGE(0x0180, 0x0181) /* PCS3 */ AM_MIRROR(0x7e)
+ //AM_RANGE(0x0200, 0x0201) /* PCS4 */ AM_MIRROR(0x7e)
AM_RANGE(0x0280, 0x028f) /* PCS5 */ AM_MIRROR(0x70) AM_DEVICE(I80130_TAG, i80130_device, io_map)
AM_RANGE(0x0300, 0x0301) /* PCS6:0 */ AM_MIRROR(0xe) AM_WRITE8(tape_mon_w, 0x00ff)
AM_RANGE(0x0310, 0x0311) /* PCS6:3 */ AM_MIRROR(0xc) AM_DEVREADWRITE8(I8251A_TAG, i8251_device, data_r, data_w, 0xff00)
@@ -300,7 +300,7 @@ static ADDRESS_MAP_START( compis_io, AS_IO, 16, compis_state )
AM_RANGE(0x0330, 0x0333) /* PCS6:6 */ AM_DEVREADWRITE8("upd7220", upd7220_device, read, write, 0x00ff)
AM_RANGE(0x0330, 0x0331) /* PCS6:7 */ AM_MIRROR(0xe) AM_READWRITE8(isbx1_tdma_r, isbx1_tdma_w, 0xff00) // DMA-TERMINATE J9 (iSBX1)
AM_RANGE(0x0340, 0x034f) /* PCS6:8 */ AM_DEVREADWRITE8(ISBX_0_TAG, isbx_slot_device, mcs0_r, mcs0_w, 0x00ff) // 8272 CS0 (8/16-bit) J8 (iSBX0)
- AM_RANGE(0x0340, 0x034f) /* PCS6:9 */ AM_DEVREADWRITE8(ISBX_0_TAG, isbx_slot_device, mcs1_r, mcs1_w, 0xff00) // CS1 (16-bit) J8 (iSBX0)
+ AM_RANGE(0x0340, 0x034f) /* PCS6:9 */ AM_DEVREADWRITE8(ISBX_0_TAG, isbx_slot_device, mcs1_r, mcs1_w, 0xff00) // CS1 (16-bit) J8 (iSBX0)
AM_RANGE(0x0350, 0x035f) /* PCS6:10 */ AM_DEVREADWRITE8(ISBX_0_TAG, isbx_slot_device, mcs1_r, mcs1_w, 0x00ff) // CS1 (8-bit) J8 (iSBX0)
AM_RANGE(0x0350, 0x035f) /* PCS6:11 */ AM_DEVREADWRITE8(ISBX_0_TAG, isbx_slot_device, mdack_r, mdack_w, 0xff00) // DMA-ACK J8 (iSBX0)
AM_RANGE(0x0360, 0x036f) /* PCS6:13 */ AM_DEVREADWRITE8(ISBX_1_TAG, isbx_slot_device, mcs0_r, mcs0_w, 0x00ff) // CS0 (8/16-bit) J9 (iSBX1)
@@ -483,7 +483,7 @@ READ8_MEMBER( compis_state::compis_irq_callback )
WRITE_LINE_MEMBER( compis_state::tmr0_w )
{
m_tmr0 = state;
-
+
m_cassette->output(m_tmr0 ? -1 : 1);
m_maincpu->tmrin0_w(state);
@@ -563,10 +563,10 @@ static const i8251_interface usart_intf =
READ8_MEMBER( compis_state::ppi_pb_r )
{
/*
-
+
bit description
-
- 0 J5-4
+
+ 0 J5-4
1 J5-5
2 J6-3 Cassette read
3 J2-6 DSR / S8-4 Test
@@ -574,7 +574,7 @@ READ8_MEMBER( compis_state::ppi_pb_r )
5 J7-11 Centronics BUSY
6 J7-13 Centronics SELECT
7 Tmr0
-
+
*/
UINT8 data = 0;
@@ -598,9 +598,9 @@ READ8_MEMBER( compis_state::ppi_pb_r )
WRITE8_MEMBER( compis_state::ppi_pc_w )
{
/*
-
+
bit description
-
+
0 J5-1
1 J5-2
2 Select: 1=time measure, DSR from J2/J4 pin 6. 0=read cassette
@@ -609,7 +609,7 @@ WRITE8_MEMBER( compis_state::ppi_pc_w )
5 J7-1 Centronics STROBE
6 V2-4 Floppy Soft reset
7 V2-3 Floppy Terminal count
-
+
*/
m_isbx0->opt1_w(BIT(data, 4));
diff --git a/src/mess/drivers/ct486.c b/src/mess/drivers/ct486.c
index cb32671e217..e314be7678a 100644
--- a/src/mess/drivers/ct486.c
+++ b/src/mess/drivers/ct486.c
@@ -2,8 +2,8 @@
PC/AT 486 with Chips & Technologies CS4031 chipset
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
***************************************************************************/
diff --git a/src/mess/drivers/dectalk.c b/src/mess/drivers/dectalk.c
index 02ddf719356..5a3d160f99c 100644
--- a/src/mess/drivers/dectalk.c
+++ b/src/mess/drivers/dectalk.c
@@ -21,12 +21,12 @@
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
-*
+*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
-*
+*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
@@ -37,7 +37,7 @@
* This driver dedicated in memory of Dennis Klatt and Jonathan Allen, without whose
* original work MITalk and hence KlattTalk and DECtalk would never have existed,
* in memory of Martin Minow, who wrote much of the DECtalk DTC-01 code, and
-* in memory of Tony Vitale, who was one of the architects of the DECtalk project.
+* in memory of Tony Vitale, who was one of the architects of the DECtalk project.
*
* Staff behind DECtalk itself: (mostly from http://amhistory.si.edu/archives/speechsynthesis/ss_dec.htm ):
* John C. Broihier
@@ -131,7 +131,7 @@ DTC-01 LEDs
* unknown date: Version 1.1 roms released to fix a bug with insufficient stack space, see ss_dec1 above
* October 11 1983: Second half of Version 1.8 rom finalized
* December 05 1983: First half of Version 1.8 rom finalized
-* March 1984: Hardware version B done
+* March 1984: Hardware version B done
(integrates the output fifo sync error check onto the pcb;
Version A units are retrofitted when sent in for firmware upgrades)
(most of the schematics come from this time, and have the version 1.8 roms listed on them)
@@ -738,7 +738,7 @@ READ16_MEMBER(dectalk_state::spc_infifo_data_r)
// if fifo is empty (tail ptr == head ptr), do not increment the tail ptr, otherwise do.
if (m_infifo_count > 0)
{
- m_infifo_tail_ptr++;
+ m_infifo_tail_ptr++;
m_infifo_count--;
}
m_infifo_tail_ptr&=0x1F;
diff --git a/src/mess/drivers/einstein.c b/src/mess/drivers/einstein.c
index 12842eb5a63..a4fe2724291 100644
--- a/src/mess/drivers/einstein.c
+++ b/src/mess/drivers/einstein.c
@@ -2,8 +2,8 @@
Tatung Einstein
- license: MAME
- copyright-holders: Kevin Thacker, Dirk Best, Phill Harvey-Smith
+ license: MAME
+ copyright-holders: Kevin Thacker, Dirk Best, Phill Harvey-Smith
TMS9129 VDP Graphics
diff --git a/src/mess/drivers/esq5505.c b/src/mess/drivers/esq5505.c
index 8e641ede9db..c75d9aee0c3 100644
--- a/src/mess/drivers/esq5505.c
+++ b/src/mess/drivers/esq5505.c
@@ -917,7 +917,7 @@ ROM_END
ROM_START( eps16p )
ROM_REGION(0x20000, "osrom", 0)
- ROM_LOAD16_BYTE( "eps16plus-100f-lower.u27", 0x000000, 0x010000, CRC(78568d3f) SHA1(ac737e093f422e109e8f06d44548629a12d6418c) )
+ ROM_LOAD16_BYTE( "eps16plus-100f-lower.u27", 0x000000, 0x010000, CRC(78568d3f) SHA1(ac737e093f422e109e8f06d44548629a12d6418c) )
ROM_LOAD16_BYTE( "eps16plus-100f-upper.u28", 0x000001, 0x010000, CRC(1264465f) SHA1(71604da091bd90a32f0d93698d70b9e114ec1697) )
ROM_REGION(0x200000, "waverom", ROMREGION_ERASE00) // EPS-16 Plus has no ROM sounds
@@ -979,4 +979,3 @@ CONS( 1990, sd1, 0, 0, vfxsd, vfx, esq5505_state, denib, "Ensoniq", "SD-1 (
CONS( 1990, sq1, 0, 0, sq1, vfx, esq5505_state, sq1, "Ensoniq", "SQ-1", GAME_NOT_WORKING ) // 2x16 LCD
CONS( 1990, sqrack,sq1, 0, sq1, vfx, esq5505_state, sq1, "Ensoniq", "SQ-Rack", GAME_NOT_WORKING ) // 2x16 LCD
CONS( 1991, sd132, sd1,0, vfx32, vfx, esq5505_state, denib, "Ensoniq", "SD-1 (32 voice)", GAME_NOT_WORKING ) // 2x40 VFD
-
diff --git a/src/mess/drivers/esqmr.c b/src/mess/drivers/esqmr.c
index a1e234cb317..9376667c994 100644
--- a/src/mess/drivers/esqmr.c
+++ b/src/mess/drivers/esqmr.c
@@ -103,8 +103,8 @@ INPUT_PORTS_END
ROM_START( mr61 )
ROM_REGION(0x100000, "maincpu", 0)
- ROM_LOAD16_WORD_SWAP( "mrw-osf-11af-2.10.bin", 0x000000, 0x080000, CRC(5854314e) SHA1(8fb2e2ee2f5fb12eae8ea33cb18f757efaec6780) )
- ROM_LOAD16_WORD_SWAP( "mrw-romc-32ef-1.20.bin", 0x080000, 0x080000, CRC(68321347) SHA1(56cb96943ba42c35ba2787a49b5f4adf7c8dffb8) )
+ ROM_LOAD16_WORD_SWAP( "mrw-osf-11af-2.10.bin", 0x000000, 0x080000, CRC(5854314e) SHA1(8fb2e2ee2f5fb12eae8ea33cb18f757efaec6780) )
+ ROM_LOAD16_WORD_SWAP( "mrw-romc-32ef-1.20.bin", 0x080000, 0x080000, CRC(68321347) SHA1(56cb96943ba42c35ba2787a49b5f4adf7c8dffb8) )
ROM_REGION(0x200000, "waverom", ROMREGION_ERASE00)
ROM_REGION(0x200000, "waverom2", ROMREGION_ERASE00)
diff --git a/src/mess/drivers/ex800.c b/src/mess/drivers/ex800.c
index 4a08f9c085e..e87a5558579 100644
--- a/src/mess/drivers/ex800.c
+++ b/src/mess/drivers/ex800.c
@@ -1,9 +1,9 @@
/******************************************************************************
- Epson EX-800 Dot Matrix printer
+ Epson EX-800 Dot Matrix printer
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
--
diff --git a/src/mess/drivers/hp48.c b/src/mess/drivers/hp48.c
index e916de3850a..eadda806c14 100644
--- a/src/mess/drivers/hp48.c
+++ b/src/mess/drivers/hp48.c
@@ -932,9 +932,9 @@ static MACHINE_CONFIG_START( hp48_common, hp48_state )
MCFG_CPU_ADD ( "maincpu", SATURN, 3937007 ) /* almost 4 MHz */
MCFG_CPU_PROGRAM_MAP ( hp48)
MCFG_SATURN_CONFIG( WRITE32(hp48_state, hp48_reg_out), READ32(hp48_state, hp48_reg_in),
- WRITELINE(hp48_state, hp48_mem_reset), WRITE32(hp48_state, hp48_mem_config),
- WRITE32(hp48_state, hp48_mem_unconfig), READ32(hp48_state, hp48_mem_id),
- WRITE32(hp48_state, hp48_mem_crc), WRITELINE(hp48_state, hp48_rsi) )
+ WRITELINE(hp48_state, hp48_mem_reset), WRITE32(hp48_state, hp48_mem_config),
+ WRITE32(hp48_state, hp48_mem_unconfig), READ32(hp48_state, hp48_mem_id),
+ WRITE32(hp48_state, hp48_mem_crc), WRITELINE(hp48_state, hp48_rsi) )
/* memory */
MCFG_NVRAM_ADD_0FILL("nvram")
diff --git a/src/mess/drivers/ibmpc.c b/src/mess/drivers/ibmpc.c
index 4c5e59ef698..c2424539a00 100644
--- a/src/mess/drivers/ibmpc.c
+++ b/src/mess/drivers/ibmpc.c
@@ -357,9 +357,9 @@ static MACHINE_CONFIG_START( ibm5160, ibmpc_state )
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("640K")
- /* software lists */
- MCFG_SOFTWARE_LIST_ADD("pc_disk_list","ibm5150")
- MCFG_SOFTWARE_LIST_ADD("xt_disk_list","ibm5160_flop")
+ /* software lists */
+ MCFG_SOFTWARE_LIST_ADD("pc_disk_list","ibm5150")
+ MCFG_SOFTWARE_LIST_ADD("xt_disk_list","ibm5160_flop")
MACHINE_CONFIG_END
diff --git a/src/mess/drivers/instruct.c b/src/mess/drivers/instruct.c
index a8d02eb548e..91fd3f9e7d3 100644
--- a/src/mess/drivers/instruct.c
+++ b/src/mess/drivers/instruct.c
@@ -373,7 +373,7 @@ QUICKLOAD_LOAD_MEMBER( instruct_state, instruct )
read_ = 0xfff;
if (quick_length < 0xfff)
read_ = quick_length;
- m_p_ram[0] = 0x1f; // add jump for RST key
+ m_p_ram[0] = 0x1f; // add jump for RST key
for (i = 1; i < read_; i++)
m_p_ram[i] = quick_data[i];
diff --git a/src/mess/drivers/lx800.c b/src/mess/drivers/lx800.c
index 7334695a395..c2d08a4cce8 100644
--- a/src/mess/drivers/lx800.c
+++ b/src/mess/drivers/lx800.c
@@ -2,8 +2,8 @@
Epson LX-800 dot matrix printer
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
Skeleton driver
diff --git a/src/mess/drivers/mc10.c b/src/mess/drivers/mc10.c
index 04a15a2cd08..548e5261d6d 100644
--- a/src/mess/drivers/mc10.c
+++ b/src/mess/drivers/mc10.c
@@ -2,8 +2,8 @@
TRS-80 Radio Shack MicroColor Computer
- license: MAME
- copyright-holders: Nathan Woods, Dirk Best
+ license: MAME
+ copyright-holders: Nathan Woods, Dirk Best
***************************************************************************/
diff --git a/src/mess/drivers/modellot.c b/src/mess/drivers/modellot.c
index 78f14bcae51..ba8ef5b177b 100644
--- a/src/mess/drivers/modellot.c
+++ b/src/mess/drivers/modellot.c
@@ -13,7 +13,7 @@
be 16, 32, or 48k. The FDC is a FD1791.
All the articles and doco (what there is of it) is all in Italian.
-
+
***********************************************************************************/
#include "emu.h"
diff --git a/src/mess/drivers/molecular.c b/src/mess/drivers/molecular.c
index 1993b877f25..457a5a4b7f8 100644
--- a/src/mess/drivers/molecular.c
+++ b/src/mess/drivers/molecular.c
@@ -173,7 +173,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( molecula_file_io, AS_IO, 8, molecula_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
-// AM_RANGE(0x40, 0x43) AM_READWRITE(sio_r,sio_w)
+// AM_RANGE(0x40, 0x43) AM_READWRITE(sio_r,sio_w)
AM_RANGE(0x72, 0x73) AM_WRITE(file_output_w) // unknown
ADDRESS_MAP_END
@@ -257,7 +257,7 @@ static const gfx_layout charlayout =
#endif
static GFXDECODE_START( molecula )
-// GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 1 )
+// GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 1 )
GFXDECODE_END
@@ -293,10 +293,10 @@ static MACHINE_CONFIG_START( molecula, molecula_state )
MCFG_CPU_PROGRAM_MAP(molecula_app_map)
MCFG_CPU_IO_MAP(molecula_app_io)
-// MCFG_CPU_ADD("sub",I8086,I86_CLOCK/2)
-// MCFG_CPU_PROGRAM_MAP(molecula_map)
-// MCFG_CPU_IO_MAP(molecula_io)
-// MCFG_DEVICE_DISABLE()
+// MCFG_CPU_ADD("sub",I8086,I86_CLOCK/2)
+// MCFG_CPU_PROGRAM_MAP(molecula_map)
+// MCFG_CPU_IO_MAP(molecula_io)
+// MCFG_DEVICE_DISABLE()
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
diff --git a/src/mess/drivers/mtx.c b/src/mess/drivers/mtx.c
index b948837717e..7d306e7736d 100644
--- a/src/mess/drivers/mtx.c
+++ b/src/mess/drivers/mtx.c
@@ -2,8 +2,8 @@
Memotech MTX 500, MTX 512 and RS 128
- license: MAME
- copyright-holders: (Original Author?), Dirk Best, Curt Coder
+ license: MAME
+ copyright-holders: (Original Author?), Dirk Best, Curt Coder
**************************************************************************/
diff --git a/src/mess/drivers/nascom1.c b/src/mess/drivers/nascom1.c
index a854f17fb09..5e5cdd00ee3 100644
--- a/src/mess/drivers/nascom1.c
+++ b/src/mess/drivers/nascom1.c
@@ -1,12 +1,12 @@
/************************************************************************
- Nascom 1 and Nascom 2
+ Nascom 1 and Nascom 2
- license: MAME
- copyright-holders: (Original Author?), Dirk Best
+ license: MAME
+ copyright-holders: (Original Author?), Dirk Best
- Memory map
+ Memory map
CPU: z80
0000-03ff ROM (Nascom1 Monitor)
diff --git a/src/mess/drivers/ng_aes.c b/src/mess/drivers/ng_aes.c
index 4f76ea53cdb..e24f1627d5e 100644
--- a/src/mess/drivers/ng_aes.c
+++ b/src/mess/drivers/ng_aes.c
@@ -1332,7 +1332,7 @@ static INPUT_PORTS_START( aes )
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_SELECT ) PORT_PLAYER(2)
PORT_BIT( 0x7000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, neogeo_state, get_memcard_status, NULL)
PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* Hardware type (AES=0, MVS=1) Some games check this and show */
- /* a piracy warning screen if the hardware and BIOS don't match */
+ /* a piracy warning screen if the hardware and BIOS don't match */
PORT_START("AUDIO")
PORT_BIT( 0x0007, IP_ACTIVE_HIGH, IPT_UNUSED ) /* AES has no coin slots, it's a console */
diff --git a/src/mess/drivers/pc.c b/src/mess/drivers/pc.c
index 56a25869079..76062c8a2f0 100644
--- a/src/mess/drivers/pc.c
+++ b/src/mess/drivers/pc.c
@@ -157,7 +157,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(mc1502_io, AS_IO, 8, pc_state )
AM_RANGE(0x0020, 0x0021) AM_DEVREADWRITE("pic8259", pic8259_device, read, write)
- AM_RANGE(0x0028, 0x0028) AM_DEVREADWRITE("upd8251", i8251_device, data_r, data_w) // not working yet
+ AM_RANGE(0x0028, 0x0028) AM_DEVREADWRITE("upd8251", i8251_device, data_r, data_w) // not working yet
AM_RANGE(0x0029, 0x0029) AM_DEVREADWRITE("upd8251", i8251_device, status_r, control_w)
AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE("pit8253", pit8253_device, read, write)
// BIOS 5.31, 5.33
@@ -902,7 +902,7 @@ static INPUT_PORTS_START( ec1841 )
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x01, DEF_STR( Yes ) )
-// PORT_START("DSW1") /* SA2 */
+// PORT_START("DSW1") /* SA2 */
PORT_INCLUDE( pcvideo_cga )
INPUT_PORTS_END
diff --git a/src/mess/drivers/pc1512.c b/src/mess/drivers/pc1512.c
index 5f16e535ff5..7596aabcce8 100644
--- a/src/mess/drivers/pc1512.c
+++ b/src/mess/drivers/pc1512.c
@@ -1369,7 +1369,7 @@ static MACHINE_CONFIG_START( pc1640, pc1640_state )
MCFG_PIC8259_ADD(I8259A2_TAG, INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0), VCC, NULL)
MCFG_PIT8253_ADD(I8253_TAG, pit_intf)
MCFG_MC146818_ADD(MC146818_TAG, XTAL_32_768kHz)
- MCFG_MC146818_IRQ_HANDLER(DEVWRITELINE(I8259A2_TAG, pic8259_device, ir2_w))
+ MCFG_MC146818_IRQ_HANDLER(DEVWRITELINE(I8259A2_TAG, pic8259_device, ir2_w))
MCFG_PC_FDC_XT_ADD(PC_FDC_XT_TAG)
MCFG_FLOPPY_DRIVE_ADD(PC_FDC_XT_TAG ":0", pc1512_floppies, "525dd", pc1512_state::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(PC_FDC_XT_TAG ":1", pc1512_floppies, NULL, pc1512_state::floppy_formats)
diff --git a/src/mess/drivers/pt68k4.c b/src/mess/drivers/pt68k4.c
index 4339c119f19..14904e68693 100644
--- a/src/mess/drivers/pt68k4.c
+++ b/src/mess/drivers/pt68k4.c
@@ -75,7 +75,7 @@ void pt68k4_state::machine_reset()
//UINT32 pt68k4_state::screen_update_pt68k4(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
//{
-// return 0;
+// return 0;
//}
READ16_MEMBER( pt68k4_state::status_r )
diff --git a/src/mess/drivers/px4.c b/src/mess/drivers/px4.c
index 068d22a9751..9395c5fe4dd 100644
--- a/src/mess/drivers/px4.c
+++ b/src/mess/drivers/px4.c
@@ -2,8 +2,8 @@
Epson PX-4
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
Note: We are missing a dump of the slave 7508 CPU that controls
the keyboard and some other things.
diff --git a/src/mess/drivers/rmnimbus.c b/src/mess/drivers/rmnimbus.c
index 8c685c8189d..53631c1674d 100644
--- a/src/mess/drivers/rmnimbus.c
+++ b/src/mess/drivers/rmnimbus.c
@@ -294,8 +294,8 @@ static MACHINE_CONFIG_START( nimbus, rmnimbus_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS( XTAL_4_433619MHz*2,650,0,640,260,0,250)
-// MCFG_SCREEN_REFRESH_RATE(50)
-// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(100))
+// MCFG_SCREEN_REFRESH_RATE(50)
+// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(100))
MCFG_SCREEN_UPDATE_DRIVER(rmnimbus_state, screen_update_nimbus)
MCFG_SCREEN_VBLANK_DRIVER(rmnimbus_state, screen_eof_nimbus)
@@ -303,8 +303,8 @@ static MACHINE_CONFIG_START( nimbus, rmnimbus_state )
MCFG_PALETTE_LENGTH(SCREEN_NO_COLOURS)
-// MCFG_SCREEN_SIZE(650, 260)
-// MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 249)
+// MCFG_SCREEN_SIZE(650, 260)
+// MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 249)
/* Backing storage */
MCFG_WD2793_ADD(FDC_TAG, nimbus_wd17xx_interface )
diff --git a/src/mess/drivers/samcoupe.c b/src/mess/drivers/samcoupe.c
index 1e51cba9fb3..1d56a33d73f 100644
--- a/src/mess/drivers/samcoupe.c
+++ b/src/mess/drivers/samcoupe.c
@@ -2,8 +2,8 @@
Miles Gordon Technology SAM Coupe
- license: MAME
- copyright-holders: Lee Hammerton, Dirk Best
+ license: MAME
+ copyright-holders: Lee Hammerton, Dirk Best
Notes:
------
diff --git a/src/mess/drivers/saturn.c b/src/mess/drivers/saturn.c
index 05459f01cad..4a06ae177c5 100644
--- a/src/mess/drivers/saturn.c
+++ b/src/mess/drivers/saturn.c
@@ -764,7 +764,7 @@ static MACHINE_CONFIG_START( saturn, sat_console_state )
MCFG_CPU_DATA_MAP(scudsp_data)
MCFG_CPU_CONFIG(scudsp_config)
-// SH-1
+// SH-1
// SMPC MCU, running at 4 MHz (+ custom RTC device that runs at 32.768 KHz)
diff --git a/src/mess/drivers/socrates.c b/src/mess/drivers/socrates.c
index 0befc44293c..9ebbaec775e 100644
--- a/src/mess/drivers/socrates.c
+++ b/src/mess/drivers/socrates.c
@@ -15,12 +15,12 @@
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
-*
+*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
-*
+*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
diff --git a/src/mess/drivers/sym1.c b/src/mess/drivers/sym1.c
index 1aba78536c3..a4b270739ff 100644
--- a/src/mess/drivers/sym1.c
+++ b/src/mess/drivers/sym1.c
@@ -2,8 +2,8 @@
Synertek Systems Corp. SYM-1
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
***************************************************************************/
@@ -22,9 +22,9 @@
//**************************************************************************
// SYM-1 main (and only) oscillator Y1
-#define SYM1_CLOCK XTAL_1MHz
+#define SYM1_CLOCK XTAL_1MHz
-#define LED_REFRESH_DELAY attotime::from_usec(70)
+#define LED_REFRESH_DELAY attotime::from_usec(70)
//**************************************************************************
@@ -180,7 +180,7 @@ const ttl74145_interface sym1_ttl74145_intf =
//**************************************************************************
-// INPUT PORTS
+// INPUT PORTS
//**************************************************************************
static INPUT_PORTS_START( sym1 )
@@ -246,10 +246,10 @@ INPUT_PORTS_END
//**************************************************************************
/*
- PA0: Write protect R6532 RAM
- PA1: Write protect RAM 0x400-0x7ff
- PA2: Write protect RAM 0x800-0xbff
- PA3: Write protect RAM 0xc00-0xfff
+ PA0: Write protect R6532 RAM
+ PA1: Write protect RAM 0x400-0x7ff
+ PA2: Write protect RAM 0x800-0xbff
+ PA3: Write protect RAM 0xc00-0xfff
*/
WRITE8_MEMBER( sym1_state::sym1_via2_a_w )
{
@@ -358,16 +358,16 @@ const via6522_interface sym1_via2 =
//**************************************************************************
static ADDRESS_MAP_START( sym1_map, AS_PROGRAM, 8, sym1_state )
- AM_RANGE(0x0000, 0x03ff) AM_RAM // U12/U13 RAM
+ AM_RANGE(0x0000, 0x03ff) AM_RAM // U12/U13 RAM
AM_RANGE(0x0400, 0x07ff) AM_RAMBANK("bank2") AM_SHARE("ram_1k")
AM_RANGE(0x0800, 0x0bff) AM_RAMBANK("bank3") AM_SHARE("ram_2k")
AM_RANGE(0x0c00, 0x0fff) AM_RAMBANK("bank4") AM_SHARE("ram_3k")
- AM_RANGE(0x8000, 0x8fff) AM_ROM AM_SHARE("monitor") // U20 Monitor ROM
- AM_RANGE(0xa000, 0xa00f) AM_DEVREADWRITE("via6522_0", via6522_device, read, write) // U25 VIA #1
- AM_RANGE(0xa400, 0xa40f) AM_DEVREADWRITE("riot", riot6532_device, read, write) // U27 RIOT
- AM_RANGE(0xa600, 0xa67f) AM_RAMBANK("bank5") AM_SHARE("riot_ram") // U27 RIOT RAM
- AM_RANGE(0xa800, 0xa80f) AM_DEVREADWRITE("via6522_1", via6522_device, read, write) // U28 VIA #2
- AM_RANGE(0xac00, 0xac0f) AM_DEVREADWRITE("via6522_2", via6522_device, read, write) // U29 VIA #3
+ AM_RANGE(0x8000, 0x8fff) AM_ROM AM_SHARE("monitor") // U20 Monitor ROM
+ AM_RANGE(0xa000, 0xa00f) AM_DEVREADWRITE("via6522_0", via6522_device, read, write) // U25 VIA #1
+ AM_RANGE(0xa400, 0xa40f) AM_DEVREADWRITE("riot", riot6532_device, read, write) // U27 RIOT
+ AM_RANGE(0xa600, 0xa67f) AM_RAMBANK("bank5") AM_SHARE("riot_ram") // U27 RIOT RAM
+ AM_RANGE(0xa800, 0xa80f) AM_DEVREADWRITE("via6522_1", via6522_device, read, write) // U28 VIA #2
+ AM_RANGE(0xac00, 0xac0f) AM_DEVREADWRITE("via6522_2", via6522_device, read, write) // U29 VIA #3
AM_RANGE(0xb000, 0xefff) AM_ROM
ADDRESS_MAP_END
diff --git a/src/mess/drivers/tsispch.c b/src/mess/drivers/tsispch.c
index 0b55f46045c..d4a91bbea14 100644
--- a/src/mess/drivers/tsispch.c
+++ b/src/mess/drivers/tsispch.c
@@ -15,12 +15,12 @@
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
-*
+*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
-*
+*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
diff --git a/src/mess/drivers/vtech1.c b/src/mess/drivers/vtech1.c
index 65dfd75e914..ea746262f64 100644
--- a/src/mess/drivers/vtech1.c
+++ b/src/mess/drivers/vtech1.c
@@ -12,8 +12,8 @@
Video Technology Laser 310
Dick Smith Electronics VZ-300
- license: MAME
- copyright-holders: Juergen Buchmueller, Dirk Best
+ license: MAME
+ copyright-holders: Juergen Buchmueller, Dirk Best
Thanks go to:
diff --git a/src/mess/drivers/zexall.c b/src/mess/drivers/zexall.c
index 4a99e80b604..7affabf258c 100644
--- a/src/mess/drivers/zexall.c
+++ b/src/mess/drivers/zexall.c
@@ -18,12 +18,12 @@
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
-*
+*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
-*
+*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
diff --git a/src/mess/includes/apple2.h b/src/mess/includes/apple2.h
index f27d0769035..fafd40c8a52 100644
--- a/src/mess/includes/apple2.h
+++ b/src/mess/includes/apple2.h
@@ -81,7 +81,7 @@ enum machine_type_t
TK2000, // Microdigital TK2000
LASER128, // Laser 128/128EX/128EX2
SPACE84, // "Space 84" with flipped text mode
- LABA2P // lab equipment (?) II Plus with flipped text mode
+ LABA2P // lab equipment (?) II Plus with flipped text mode
};
enum bank_disposition_t
diff --git a/src/mess/includes/at.h b/src/mess/includes/at.h
index 32f1d024aca..001e57c1833 100644
--- a/src/mess/includes/at.h
+++ b/src/mess/includes/at.h
@@ -50,11 +50,11 @@ public:
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu") { }
required_device<cpu_device> m_maincpu;
-
+
DECLARE_DRIVER_INIT(at586);
-
+
UINT8 m_at_offset1;
-
+
enum {
TYPE_586
};
diff --git a/src/mess/includes/bbc.h b/src/mess/includes/bbc.h
index e0c05a560f1..00e7a5d65e5 100644
--- a/src/mess/includes/bbc.h
+++ b/src/mess/includes/bbc.h
@@ -75,15 +75,15 @@ public:
int m_SWRAMtype; // this stores the DIP switch setting for the SWRAM type being used
int m_Speech; // this stores the CONF setting for Speech enabled/disabled
int m_Master; // if 0 then we are emulating a BBC B style machine
- // if 1 then we are emulating a BBC Master style machine
+ // if 1 then we are emulating a BBC Master style machine
int m_ACCCON_IRR; // IRQ inputs
int m_rombank; // This is the latch that holds the sideways ROM bank to read
int m_userport; // This stores the sideways RAM latch type.
- // Acorn and others use the bbc_rombank latch to select the write bank to be used.(type 0)
- // Solidisc use the BBC's userport to select the write bank to be used (type 1)
+ // Acorn and others use the bbc_rombank latch to select the write bank to be used.(type 0)
+ // Solidisc use the BBC's userport to select the write bank to be used (type 1)
int m_pagedRAM; // BBC B+ memory handling
int m_vdusel; // BBC B+ memory handling
diff --git a/src/mess/includes/compis.h b/src/mess/includes/compis.h
index aab605126ee..813bdb40e75 100644
--- a/src/mess/includes/compis.h
+++ b/src/mess/includes/compis.h
@@ -32,41 +32,41 @@
#include "machine/z80dart.h"
#include "video/upd7220.h"
-#define I80186_TAG "ic1"
-#define I80130_TAG "ic15"
-#define I8251A_TAG "ic59"
-#define I8253_TAG "ic60"
+#define I80186_TAG "ic1"
+#define I80130_TAG "ic15"
+#define I8251A_TAG "ic59"
+#define I8253_TAG "ic60"
#define I8274_TAG "ic65"
-#define MM58174A_TAG "ic66"
-#define I8255_TAG "ic69"
+#define MM58174A_TAG "ic66"
+#define I8255_TAG "ic69"
#define RS232_A_TAG "rs232a"
#define RS232_B_TAG "rs232b"
#define CASSETTE_TAG "cassette"
#define CENTRONICS_TAG "centronics"
-#define ISBX_0_TAG "isbx0"
-#define ISBX_1_TAG "isbx1"
-#define SCREEN_TAG "screen"
+#define ISBX_0_TAG "isbx0"
+#define ISBX_1_TAG "isbx1"
+#define SCREEN_TAG "screen"
class compis_state : public driver_device
{
public:
compis_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, I80186_TAG),
- m_osp(*this, I80130_TAG),
- m_pit(*this, I8253_TAG),
- m_ppi(*this, I8255_TAG),
- m_mpsc(*this, I8274_TAG),
- m_centronics(*this, CENTRONICS_TAG),
- m_uart(*this, I8251A_TAG),
- m_rtc(*this, MM58174A_TAG),
- m_crtc(*this, "upd7220"),
- m_cassette(*this, CASSETTE_TAG),
- m_isbx0(*this, ISBX_0_TAG),
- m_isbx1(*this, ISBX_1_TAG),
- m_ram(*this, RAM_TAG),
- m_video_ram(*this, "video_ram"),
- m_s8(*this, "S8")
+ m_maincpu(*this, I80186_TAG),
+ m_osp(*this, I80130_TAG),
+ m_pit(*this, I8253_TAG),
+ m_ppi(*this, I8255_TAG),
+ m_mpsc(*this, I8274_TAG),
+ m_centronics(*this, CENTRONICS_TAG),
+ m_uart(*this, I8251A_TAG),
+ m_rtc(*this, MM58174A_TAG),
+ m_crtc(*this, "upd7220"),
+ m_cassette(*this, CASSETTE_TAG),
+ m_isbx0(*this, ISBX_0_TAG),
+ m_isbx1(*this, ISBX_1_TAG),
+ m_ram(*this, RAM_TAG),
+ m_video_ram(*this, "video_ram"),
+ m_s8(*this, "S8")
{ }
required_device<i80186_cpu_device> m_maincpu;
diff --git a/src/mess/includes/einstein.h b/src/mess/includes/einstein.h
index 39ac2a613bf..252d1a44e18 100644
--- a/src/mess/includes/einstein.h
+++ b/src/mess/includes/einstein.h
@@ -1,9 +1,9 @@
/***************************************************************************
- Tatung Einstein
+ Tatung Einstein
- license: MAME
- copyright-holders: Kevin Thacker, Dirk Best, Phill Harvey-Smith
+ license: MAME
+ copyright-holders: Kevin Thacker, Dirk Best, Phill Harvey-Smith
***************************************************************************/
diff --git a/src/mess/includes/mtx.h b/src/mess/includes/mtx.h
index 2b84f0f2a0e..30e3eedf6e8 100644
--- a/src/mess/includes/mtx.h
+++ b/src/mess/includes/mtx.h
@@ -2,8 +2,8 @@
Memotech MTX 500, MTX 512 and RS 128
- license: MAME
- copyright-holders: (Original Author?), Dirk Best, Curt Coder
+ license: MAME
+ copyright-holders: (Original Author?), Dirk Best, Curt Coder
*************************************************************************/
diff --git a/src/mess/includes/nascom1.h b/src/mess/includes/nascom1.h
index b2724449665..9e03e39d068 100644
--- a/src/mess/includes/nascom1.h
+++ b/src/mess/includes/nascom1.h
@@ -1,9 +1,9 @@
/***************************************************************************
- Nascom 1 and Nascom 2
+ Nascom 1 and Nascom 2
- license: MAME
- copyright-holders: (Original Author?), Dirk Best
+ license: MAME
+ copyright-holders: (Original Author?), Dirk Best
***************************************************************************/
diff --git a/src/mess/includes/rmnimbus.h b/src/mess/includes/rmnimbus.h
index 0048db8cf63..6b6e6892d19 100644
--- a/src/mess/includes/rmnimbus.h
+++ b/src/mess/includes/rmnimbus.h
@@ -410,7 +410,7 @@ public:
required_device<er59256_device> m_eeprom;
UINT32 m_debug_machine;
-// i186_state m_i186;
+// i186_state m_i186;
keyboard_t m_keyboard;
nimbus_drives_t m_nimbus_drives;
ipc_interface_t m_ipc_interface;
diff --git a/src/mess/includes/thomson.h b/src/mess/includes/thomson.h
index 52b1b10694c..b9d14a0c301 100644
--- a/src/mess/includes/thomson.h
+++ b/src/mess/includes/thomson.h
@@ -115,9 +115,9 @@ public:
DECLARE_DEVICE_IMAGE_LOAD_MEMBER( to7_cartridge );
DECLARE_DEVICE_IMAGE_LOAD_MEMBER( mo5_cartridge );
-
+
optional_device<mc6854_device> m_mc6854;
-
+
DECLARE_WRITE8_MEMBER( to7_set_cassette_motor );
DECLARE_WRITE8_MEMBER( mo5_set_cassette_motor );
DECLARE_WRITE_LINE_MEMBER( thom_dev_irq_0 );
@@ -322,7 +322,7 @@ protected:
required_device<mea8000_device> m_mea8000;
required_device<ram_device> m_ram;
optional_device<mc6846_device> m_mc6846;
-
+
/* bank logging and optimisations */
int m_old_cart_bank;
int m_old_cart_bank_was_read_only;
diff --git a/src/mess/machine/amigacd.c b/src/mess/machine/amigacd.c
index 2785c3a5455..d2f3a0e7384 100644
--- a/src/mess/machine/amigacd.c
+++ b/src/mess/machine/amigacd.c
@@ -431,7 +431,7 @@ static const amiga_autoconfig_device dmac_device =
READ8_DEVICE_HANDLER( amigacd_tpi6525_portc_r )
{
int ret = 0;
-
+
tpi6525_device *tpi = space.machine().device<tpi6525_device>("tpi6525");
if ( (tpi->get_ddr_c() & 0x04) == 0 ) /* if pin 2 is set to input */
@@ -448,7 +448,7 @@ READ8_DEVICE_HANDLER( amigacd_tpi6525_portc_r )
WRITE8_DEVICE_HANDLER( amigacd_tpi6525_portb_w )
{
tpi6525_device *tpi = space.machine().device<tpi6525_device>("tpi6525");
-
+
if ( tpi->get_ddr_b() & 0x01 ) /* if pin 0 is set to output */
matsucd_cmd_w( data & 1 ); /* write to the /CMD signal */
diff --git a/src/mess/machine/amstrad.c b/src/mess/machine/amstrad.c
index a66e8bb604c..10217ea5d08 100644
--- a/src/mess/machine/amstrad.c
+++ b/src/mess/machine/amstrad.c
@@ -1428,7 +1428,7 @@ WRITE8_MEMBER(amstrad_state::amstrad_plus_asic_6000_w)
}
if(offset == 0x0800) // Programmable raster interrupt
{
- // logerror("ASIC: Wrote %02x to PRI\n",data);
+ // logerror("ASIC: Wrote %02x to PRI\n",data);
m_asic.pri = data;
}
if(offset >= 0x0801 && offset <= 0x0803) // Split screen registers
diff --git a/src/mess/machine/bbc.c b/src/mess/machine/bbc.c
index a6585efa898..1d10857b366 100644
--- a/src/mess/machine/bbc.c
+++ b/src/mess/machine/bbc.c
@@ -574,7 +574,7 @@ READ8_MEMBER(bbc_state::bbcm_r)
{
via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
via6522_device *via_1 = machine().device<via6522_device>("via6522_1");
-
+
myo = offset-0x200;
if ((myo>=0x00) && (myo<=0x07)) return bbc_6845_r(space, myo-0x00); /* Video Controller */
if ((myo>=0x08) && (myo<=0x0f))
@@ -611,7 +611,7 @@ WRITE8_MEMBER(bbc_state::bbcm_w)
{
via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
via6522_device *via_1 = machine().device<via6522_device>("via6522_1");
-
+
myo=offset-0x200;
if ((myo>=0x00) && (myo<=0x07)) bbc_6845_w(space, myo-0x00, data); /* Video Controller */
if ((myo>=0x08) && (myo<=0x0f))
@@ -864,8 +864,8 @@ void bbc_state::bbcb_IC32_initialise(bbc_state *state)
m_b0_sound=0x01; // Write Enable to the sound generator IC
m_b1_speech_read=0x01; // READ select on the speech processor
m_b2_speech_write=0x01; // WRITE select on the speech processor
- m_b3_keyboard=0x01; // Keyboard write enable
- m_b4_video0=0x01; // These two outputs define the number to be added to the start of screen address
+ m_b3_keyboard=0x01; // Keyboard write enable
+ m_b4_video0=0x01; // These two outputs define the number to be added to the start of screen address
m_b5_video1=0x01; // in hardware to control hardware scrolling
m_b6_caps_lock_led=0x01; // Operates the CAPS lock LED
m_b7_shift_lock_led=0x01; // Operates the SHIFT lock LED
diff --git a/src/mess/machine/compiskb.c b/src/mess/machine/compiskb.c
index ba82291b725..19672df68d6 100644
--- a/src/mess/machine/compiskb.c
+++ b/src/mess/machine/compiskb.c
@@ -305,21 +305,21 @@ READ8_MEMBER( compis_keyboard_device::bus_r )
// bus_w -
//-------------------------------------------------
-WRITE8_MEMBER( compis_keyboard_device::bus_w )
+WRITE8_MEMBER( compis_keyboard_device::bus_w )
{
/*
-
+
bit description
-
+
0 keyboard row bit 0
1 keyboard row bit 1
2 keyboard row bit 2
3 keyboard row bit 3
- 4
+ 4
5 speaker
6 CAPS LED
7 data out
-
+
*/
m_bus = data;
diff --git a/src/mess/machine/compiskb.h b/src/mess/machine/compiskb.h
index dba4a1dccc9..787065081fa 100644
--- a/src/mess/machine/compiskb.h
+++ b/src/mess/machine/compiskb.h
@@ -25,7 +25,7 @@
//**************************************************************************
#define COMPIS_KEYBOARD_TAG "compiskb"
-#define SPEAKER_TAG "speaker"
+#define SPEAKER_TAG "speaker"
diff --git a/src/mess/machine/cs4031.c b/src/mess/machine/cs4031.c
index 5a758d97376..d93f349a96e 100644
--- a/src/mess/machine/cs4031.c
+++ b/src/mess/machine/cs4031.c
@@ -2,8 +2,8 @@
Chips & Technologies CS4031 chipset
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
Chipset for 486 based PC/AT compatible systems. Consists of two
individual chips:
diff --git a/src/mess/machine/cs4031.h b/src/mess/machine/cs4031.h
index 99815b7e048..9d1a95e6c14 100644
--- a/src/mess/machine/cs4031.h
+++ b/src/mess/machine/cs4031.h
@@ -2,8 +2,8 @@
Chips & Technologies CS4031 chipset
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
Chipset for 486 based PC/AT compatible systems. Consists of two
individual chips:
diff --git a/src/mess/machine/e05a03.c b/src/mess/machine/e05a03.c
index e7c52bcd59e..547dc1e4297 100644
--- a/src/mess/machine/e05a03.c
+++ b/src/mess/machine/e05a03.c
@@ -2,8 +2,8 @@
E05A03 Gate Array (used in the Epson LX-800)
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
***************************************************************************/
diff --git a/src/mess/machine/e05a03.h b/src/mess/machine/e05a03.h
index 025dfa16058..7a33c6b4f92 100644
--- a/src/mess/machine/e05a03.h
+++ b/src/mess/machine/e05a03.h
@@ -2,8 +2,8 @@
E05A03 Gate Array (used in the Epson LX-800)
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
***************************************************************************/
diff --git a/src/mess/machine/einstein.c b/src/mess/machine/einstein.c
index f7c29ad1cc5..7e587c64a6e 100644
--- a/src/mess/machine/einstein.c
+++ b/src/mess/machine/einstein.c
@@ -1,9 +1,9 @@
/***************************************************************************
- Tatung Einstein
+ Tatung Einstein
- license: MAME
- copyright-holders: Kevin Thacker, Dirk Best, Phill Harvey-Smith
+ license: MAME
+ copyright-holders: Kevin Thacker, Dirk Best, Phill Harvey-Smith
***************************************************************************/
diff --git a/src/mess/machine/epson_sio.c b/src/mess/machine/epson_sio.c
index 5bff0ec86bf..84848c47102 100644
--- a/src/mess/machine/epson_sio.c
+++ b/src/mess/machine/epson_sio.c
@@ -2,8 +2,8 @@
EPSON SIO port emulation
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
**********************************************************************/
diff --git a/src/mess/machine/epson_sio.h b/src/mess/machine/epson_sio.h
index 6e3c2bd16b2..145009bff87 100644
--- a/src/mess/machine/epson_sio.h
+++ b/src/mess/machine/epson_sio.h
@@ -2,8 +2,8 @@
EPSON SIO port emulation
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
**********************************************************************/
diff --git a/src/mess/machine/isa_cards.c b/src/mess/machine/isa_cards.c
index 04a3ad94818..bd69eb04162 100644
--- a/src/mess/machine/isa_cards.c
+++ b/src/mess/machine/isa_cards.c
@@ -2,8 +2,8 @@
ISA cards
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
**********************************************************************/
diff --git a/src/mess/machine/isa_cards.h b/src/mess/machine/isa_cards.h
index 222b448d70a..686a7812622 100644
--- a/src/mess/machine/isa_cards.h
+++ b/src/mess/machine/isa_cards.h
@@ -2,8 +2,8 @@
ISA cards
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
**********************************************************************/
diff --git a/src/mess/machine/kb_7007_3.h b/src/mess/machine/kb_7007_3.h
index 1a53faa9045..35de2e98484 100644
--- a/src/mess/machine/kb_7007_3.h
+++ b/src/mess/machine/kb_7007_3.h
@@ -11,7 +11,7 @@ INPUT_PORTS_START( mc7007_3_keyboard )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Right Shift") PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Keypad 7") PORT_CODE(KEYCODE_7_PAD) // PORT_CODE(KEYCODE_HOME)
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Keypad 7") PORT_CODE(KEYCODE_7_PAD) // PORT_CODE(KEYCODE_HOME)
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Keypad 8") PORT_CODE(KEYCODE_8_PAD) // PORT_CODE(KEYCODE_UP)
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Keypad 9") PORT_CODE(KEYCODE_9_PAD) // PORT_CODE(KEYCODE_PGUP)
diff --git a/src/mess/machine/kb_ec1841.c b/src/mess/machine/kb_ec1841.c
index 982e5492fb2..3c35f3f26ed 100644
--- a/src/mess/machine/kb_ec1841.c
+++ b/src/mess/machine/kb_ec1841.c
@@ -2,7 +2,7 @@
EC-1841 92-key keyboard emulation
- Sends 9 non-standard scan codes (54..5C) and reassigns 3 standard
+ Sends 9 non-standard scan codes (54..5C) and reassigns 3 standard
ones (2A, 36, 3A). EC-1841 BIOS converts scan codes into Cyrillic
by default; 'Lat' key (mapped to F11) switches it to Latin mode.
'Rus' (F12) switches back.
diff --git a/src/mess/machine/mtx.c b/src/mess/machine/mtx.c
index 78aca733778..5593a2a3485 100644
--- a/src/mess/machine/mtx.c
+++ b/src/mess/machine/mtx.c
@@ -2,8 +2,8 @@
Memotech MTX 500, MTX 512 and RS 128
- license: MAME
- copyright-holders: (Original Author?), Dirk Best, Curt Coder
+ license: MAME
+ copyright-holders: (Original Author?), Dirk Best, Curt Coder
**************************************************************************/
diff --git a/src/mess/machine/nascom1.c b/src/mess/machine/nascom1.c
index 7fd8c76240e..f9f3737050a 100644
--- a/src/mess/machine/nascom1.c
+++ b/src/mess/machine/nascom1.c
@@ -1,9 +1,9 @@
/**********************************************************************
- Nascom 1 and Nascom 2
+ Nascom 1 and Nascom 2
- license: MAME
- copyright-holders: (Original Author?), Dirk Best
+ license: MAME
+ copyright-holders: (Original Author?), Dirk Best
**********************************************************************/
diff --git a/src/mess/machine/pc.c b/src/mess/machine/pc.c
index 50d620fe014..b2eff69e7c2 100644
--- a/src/mess/machine/pc.c
+++ b/src/mess/machine/pc.c
@@ -425,15 +425,15 @@ const struct pit8253_interface pcjr_pit8253_config =
const i8251_interface mc1502_i8251_interface =
{
- DEVCB_NULL, /* XXX RxD data are accessible via PPI port C, bit 7 */
+ DEVCB_NULL, /* XXX RxD data are accessible via PPI port C, bit 7 */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
- DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir7_w), /* default handler does nothing */
+ DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir7_w), /* default handler does nothing */
DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir7_w),
DEVCB_NULL,
- DEVCB_NULL /* XXX SYNDET triggers NMI */
+ DEVCB_NULL /* XXX SYNDET triggers NMI */
};
WRITE_LINE_MEMBER(pc_state::mc1502_pit8253_out1_changed)
@@ -1534,7 +1534,7 @@ MACHINE_RESET_MEMBER(pc_state,pc)
m_speaker->level_w(0);
// ec1841-specific code
- m_memboards = m_ram->size()/(512*1024) - 1;
+ m_memboards = m_ram->size()/(512*1024) - 1;
if (m_memboards > 3)
m_memboards = 3;
memset(m_memboard,0,sizeof(m_memboard));
diff --git a/src/mess/machine/pf10.c b/src/mess/machine/pf10.c
index b996a77596a..ce499b8667c 100644
--- a/src/mess/machine/pf10.c
+++ b/src/mess/machine/pf10.c
@@ -2,8 +2,8 @@
EPSON PF-10
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
Battery operated portable 3.5" floppy drive
diff --git a/src/mess/machine/pf10.h b/src/mess/machine/pf10.h
index 2c9dfeceddb..c2288599e1b 100644
--- a/src/mess/machine/pf10.h
+++ b/src/mess/machine/pf10.h
@@ -2,8 +2,8 @@
EPSON PF-10
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
Battery operated portable 3.5" floppy drive
diff --git a/src/mess/machine/samcoupe.c b/src/mess/machine/samcoupe.c
index 516b8aa8961..e4598f8543f 100644
--- a/src/mess/machine/samcoupe.c
+++ b/src/mess/machine/samcoupe.c
@@ -2,8 +2,8 @@
Miles Gordon Technology SAM Coupe
- license: MAME
- copyright-holders: Lee Hammerton, Dirk Best
+ license: MAME
+ copyright-holders: Lee Hammerton, Dirk Best
***************************************************************************/
diff --git a/src/mess/machine/southbridge.c b/src/mess/machine/southbridge.c
index 99fa97b9e46..0c495fa3dbf 100644
--- a/src/mess/machine/southbridge.c
+++ b/src/mess/machine/southbridge.c
@@ -217,8 +217,8 @@ void southbridge_device::device_start()
spaceio.install_readwrite_handler(0x0170, 0x0177, read32_delegate(FUNC(bus_master_ide_controller_device::read_cs0),&(*m_ide2)), write32_delegate(FUNC(bus_master_ide_controller_device::write_cs0), &(*m_ide2)),0xffffffff);
spaceio.install_readwrite_handler(0x01f0, 0x01f7, read32_delegate(FUNC(bus_master_ide_controller_device::read_cs0),&(*m_ide)), write32_delegate(FUNC(bus_master_ide_controller_device::write_cs0), &(*m_ide)),0xffffffff);
// HACK: this works if you take out the (non working) fdc
-// spaceio.install_readwrite_handler(0x0370, 0x0377, read32_delegate(FUNC(bus_master_ide_controller_device::read_cs1),&(*m_ide2)), write32_delegate(FUNC(bus_master_ide_controller_device::write_cs1), &(*m_ide2)),0xffffffff);
-// spaceio.install_readwrite_handler(0x03f0, 0x03f7, read32_delegate(FUNC(bus_master_ide_controller_device::read_cs1),&(*m_ide)), write32_delegate(FUNC(bus_master_ide_controller_device::write_cs1), &(*m_ide)),0xffffffff);
+// spaceio.install_readwrite_handler(0x0370, 0x0377, read32_delegate(FUNC(bus_master_ide_controller_device::read_cs1),&(*m_ide2)), write32_delegate(FUNC(bus_master_ide_controller_device::write_cs1), &(*m_ide2)),0xffffffff);
+// spaceio.install_readwrite_handler(0x03f0, 0x03f7, read32_delegate(FUNC(bus_master_ide_controller_device::read_cs1),&(*m_ide)), write32_delegate(FUNC(bus_master_ide_controller_device::write_cs1), &(*m_ide)),0xffffffff);
spaceio.install_readwrite_handler(0x0374, 0x0377, read8_delegate(FUNC(southbridge_device::ide2_read_cs1_r),this), write8_delegate(FUNC(southbridge_device::ide2_write_cs1_w), this),0xff0000);
spaceio.install_readwrite_handler(0x03f4, 0x03f7, read8_delegate(FUNC(southbridge_device::ide_read_cs1_r),this), write8_delegate(FUNC(southbridge_device::ide_write_cs1_w), this),0xff0000);
spaceio.nop_readwrite(0x00e0, 0x00ef);
diff --git a/src/mess/machine/tf20.c b/src/mess/machine/tf20.c
index ce344eedb47..1c7d7d3698e 100644
--- a/src/mess/machine/tf20.c
+++ b/src/mess/machine/tf20.c
@@ -2,8 +2,8 @@
EPSON TF-20
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
Dual 5.25" floppy drive with HX-20 factory option
diff --git a/src/mess/machine/tf20.h b/src/mess/machine/tf20.h
index e0748cd2f31..8ba20b1a93a 100644
--- a/src/mess/machine/tf20.h
+++ b/src/mess/machine/tf20.h
@@ -2,8 +2,8 @@
EPSON TF-20
- license: MAME, GPL-2.0+
- copyright-holders: Dirk Best
+ license: MAME, GPL-2.0+
+ copyright-holders: Dirk Best
Dual 5.25" floppy drive with HX-20 factory option
diff --git a/src/mess/mess.lst b/src/mess/mess.lst
index aff62252fd7..7501c6351f8 100644
--- a/src/mess/mess.lst
+++ b/src/mess/mess.lst
@@ -178,7 +178,7 @@ sd132 // 1991 SD-1 32
sq1 // 1990 SQ-1
sqrack // 1990 SQ-Rack
kt76 // 1996 KT-76
-mr61 // 1996 MR-61
+mr61 // 1996 MR-61
mrrack // 1996 MR-Rack
// Fairchild
diff --git a/src/mess/video/samcoupe.c b/src/mess/video/samcoupe.c
index 51ee092219c..2376a676880 100644
--- a/src/mess/video/samcoupe.c
+++ b/src/mess/video/samcoupe.c
@@ -2,8 +2,8 @@
Miles Gordon Technology SAM Coupe
- license: MAME
- copyright-holders: Lee Hammerton, Dirk Best
+ license: MAME
+ copyright-holders: Lee Hammerton, Dirk Best
***************************************************************************/
diff --git a/src/osd/sdl/input.c b/src/osd/sdl/input.c
index 7efa2f198e6..78d861faaea 100644
--- a/src/osd/sdl/input.c
+++ b/src/osd/sdl/input.c
@@ -733,7 +733,7 @@ static void sdlinput_register_joysticks(running_machine &machine)
mame_printf_verbose("Joystick: Start initialization\n");
for (physical_stick = 0; physical_stick < SDL_NumJoysticks(); physical_stick++)
{
- char *joy_name;
+ char *joy_name;
#if (SDLMAME_SDL2) && (!defined(SDLMAME_EMSCRIPTEN))
joy = SDL_JoystickOpen(physical_stick);
diff --git a/src/osd/sdl/sdl.mak b/src/osd/sdl/sdl.mak
index e9d3b4d7c83..d38c67e6728 100644
--- a/src/osd/sdl/sdl.mak
+++ b/src/osd/sdl/sdl.mak
@@ -466,7 +466,7 @@ ifeq ($(findstring rpi,$(TEST_GCC)),rpi)
CCOMFLAGS += -Wno-cast-align
endif
-else # compiler is specifically Clang
+else # compiler is specifically Clang
CCOMFLAGS += -Wno-cast-align -Wno-constant-logical-operand -Wno-shift-count-overflow -Wno-tautological-constant-out-of-range-compare -Wno-tautological-compare -Wno-self-assign-field
endif
diff --git a/src/osd/sdl/sdlsync_mini.c b/src/osd/sdl/sdlsync_mini.c
index c6d22bbec8f..91ea06c17dc 100644
--- a/src/osd/sdl/sdlsync_mini.c
+++ b/src/osd/sdl/sdlsync_mini.c
@@ -9,11 +9,11 @@
#include "osdcore.h"
#include "sdlsync.h"
-#define USE_SCALABLE_LOCKS (0)
+#define USE_SCALABLE_LOCKS (0)
struct _osd_event
{
- void * ptr;
+ void * ptr;
};
struct _osd_thread {
diff --git a/src/version.c b/src/version.c
index e2de6a885a0..28b98b8f31f 100644
--- a/src/version.c
+++ b/src/version.c
@@ -9,4 +9,4 @@
***************************************************************************/
extern const char build_version[];
-const char build_version[] = "0.150 ("__DATE__")";
+const char build_version[] = "0.151 ("__DATE__")";