diff options
| author | 2026-04-23 04:48:44 +0200 | |
|---|---|---|
| committer | 2026-04-23 04:48:44 +0200 | |
| commit | 3ba734e93110240ee0779f528504ea6e6c114062 (patch) | |
| tree | 8a3fba34883d4795e6892cca29fb31f105bda6e3 | |
| parent | 25addd26c834b886997f9b5abd6a7d2023cd18c5 (diff) | |
namcos21: small cleanup
| -rw-r--r-- | src/mame/namco/namcos21.cpp | 58 | ||||
| -rw-r--r-- | src/mame/namco/namcos21_3d.cpp | 18 | ||||
| -rw-r--r-- | src/mame/namco/namcos21_c67.cpp | 82 | ||||
| -rw-r--r-- | src/mame/namco/namcos21_de.cpp | 60 | ||||
| -rw-r--r-- | src/mame/namco/namcos21_dsp.cpp | 111 | ||||
| -rw-r--r-- | src/mame/namco/namcos21_dsp_c67.cpp | 274 |
6 files changed, 314 insertions, 289 deletions
diff --git a/src/mame/namco/namcos21.cpp b/src/mame/namco/namcos21.cpp index 686a85c39a3..a01f24e1d81 100644 --- a/src/mame/namco/namcos21.cpp +++ b/src/mame/namco/namcos21.cpp @@ -270,10 +270,10 @@ Filter Board #include "emu.h" #include "namco65.h" -#include "namcos21_dsp.h" #include "namco_c139.h" #include "namco_c148.h" #include "namcos21_3d.h" +#include "namcos21_dsp.h" #include "cpu/m68000/m68000.h" #include "cpu/m6805/m6805.h" @@ -291,8 +291,6 @@ Filter Board namespace { -#define ENABLE_LOGGING 0 - class namcos21_state : public driver_device { public: @@ -399,7 +397,7 @@ uint16_t namcos21_state::gpu_color_r() void namcos21_state::gpu_color_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - COMBINE_DATA( &m_gpu_color ); + COMBINE_DATA(&m_gpu_color); } uint16_t namcos21_state::gpu_register_r(offs_t offset) @@ -410,7 +408,7 @@ uint16_t namcos21_state::gpu_register_r(offs_t offset) void namcos21_state::gpu_register_w(offs_t offset, uint16_t data, uint16_t mem_mask) { m_screen->update_partial(m_screen->vpos()); - COMBINE_DATA( &m_gpu_register[offset] ); + COMBINE_DATA(&m_gpu_register[offset]); } void namcos21_state::gpu_videoram_w(offs_t offset, uint16_t data) @@ -451,7 +449,7 @@ void namcos21_state::bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect for (int sx = cliprect.left(); sx <= cliprect.right(); sx++) { int const pen = pSource[(sx + xscroll) & 0x1ff]; - switch( pen ) + switch (pen) { case 0xff: break; @@ -510,7 +508,7 @@ uint32_t namcos21_state::screen_update(screen_device &screen, bitmap_ind16 &bitm /***********************************************************/ -/* dual port ram memory handlers */ +// dual port ram memory handlers uint16_t namcos21_state::dpram_word_r(offs_t offset) { @@ -519,10 +517,8 @@ uint16_t namcos21_state::dpram_word_r(offs_t offset) void namcos21_state::dpram_word_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - if( ACCESSING_BITS_0_7 ) - { - m_dpram[offset] = data&0xff; - } + if (ACCESSING_BITS_0_7) + m_dpram[offset] = data & 0xff; } uint8_t namcos21_state::dpram_byte_r(offs_t offset) @@ -540,13 +536,13 @@ void namcos21_state::dpram_byte_w(offs_t offset, uint8_t data) void namcos21_state::master_map(address_map &map) { map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).ram(); /* work RAM */ + map(0x100000, 0x10ffff).ram(); // work RAM map(0x180000, 0x183fff).rw(FUNC(namcos21_state::eeprom_r), FUNC(namcos21_state::eeprom_w)).umask16(0x00ff); map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); // DSP Related map(0x250000, 0x25ffff).ram().share("namcos21dsp:winrun_polydata"); - map(0x260000, 0x26ffff).ram(); /* unused? */ + map(0x260000, 0x26ffff).ram(); // unused? map(0x280000, 0x281fff).w(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_dspbios_w)); map(0x380000, 0x38000f).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_dspcomram_control_r), FUNC(namcos21_dsp_device::winrun_dspcomram_control_w)); map(0x3c0000, 0x3c1fff).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_68k_dspcomram_r), FUNC(namcos21_dsp_device::winrun_68k_dspcomram_w)); @@ -578,8 +574,8 @@ void namcos21_state::slave_map(address_map &map) void namcos21_state::gpu_map(address_map &map) { map(0x000000, 0x07ffff).rom(); - map(0x100000, 0x100001).rw(FUNC(namcos21_state::gpu_color_r), FUNC(namcos21_state::gpu_color_w)); /* ? */ - map(0x180000, 0x19ffff).ram(); /* work RAM */ + map(0x100000, 0x100001).rw(FUNC(namcos21_state::gpu_color_r), FUNC(namcos21_state::gpu_color_w)); // ? + map(0x180000, 0x19ffff).ram(); // work RAM map(0x1c0000, 0x1fffff).m(m_gpu_intc, FUNC(namco_c148_device::map)); map(0x200000, 0x20ffff).ram().share("gpu_comram"); map(0x400000, 0x40ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); @@ -597,17 +593,17 @@ void namcos21_state::gpu_map(address_map &map) void namcos21_state::sound_map(address_map &map) { - map(0x0000, 0x3fff).bankr("audiobank"); /* banked */ - map(0x3000, 0x3003).nopw(); /* ? */ + map(0x0000, 0x3fff).bankr("audiobank"); // banked + map(0x3000, 0x3003).nopw(); // ? map(0x4000, 0x4001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)); map(0x5000, 0x51ff).mirror(0x0e00).rw(m_c140, FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)); map(0x6000, 0x61ff).mirror(0x0e00).rw(m_c140, FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)); // mirrored map(0x7000, 0x77ff).mirror(0x0800).rw(FUNC(namcos21_state::dpram_byte_r), FUNC(namcos21_state::dpram_byte_w)).share("dpram"); map(0x8000, 0x9fff).ram(); - map(0xa000, 0xbfff).nopw(); /* amplifier enable on 1st write */ - map(0xc000, 0xffff).nopw(); /* avoid debug log noise; games write frequently to 0xe000 */ + map(0xa000, 0xbfff).nopw(); // amplifier enable on 1st write + map(0xc000, 0xffff).nopw(); // avoid debug log noise; games write frequently to 0xe000 map(0xc000, 0xc001).w(FUNC(namcos21_state::sound_bankselect_w)); - map(0xd001, 0xd001).nopw(); /* watchdog */ + map(0xd001, 0xd001).nopw(); // watchdog map(0xd000, 0xffff).rom().region("audiocpu", 0x01000); } @@ -738,19 +734,19 @@ INPUT_PORTS_END void namcos21_state::sound_bankselect_w(uint8_t data) { - m_audiobank->set_entry(data>>4); + m_audiobank->set_entry(data >> 4); } void namcos21_state::sound_reset_w(uint8_t data) { if (data & 0x01) { - /* Resume execution */ + // Resume execution m_audiocpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); } else { - /* Suspend execution */ + // Suspend execution m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); } } @@ -778,12 +774,12 @@ uint8_t namcos21_state::eeprom_r(offs_t offset) void namcos21_state::machine_reset() { - /* Initialise the bank select in the sound CPU */ - m_audiobank->set_entry(0); /* Page in bank 0 */ + // Initialise the bank select in the sound CPU + m_audiobank->set_entry(0); // Page in bank 0 m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE ); - /* Place CPU2 & CPU3 into the reset condition */ + // Place CPU2 & CPU3 into the reset condition reset_all_subcpus(ASSERT_LINE); } @@ -821,14 +817,14 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos21_state::screen_scanline) void namcos21_state::winrun(machine_config &config) { - M68000(config, m_maincpu, 49.152_MHz_XTAL / 4); /* Master */ + M68000(config, m_maincpu, 49.152_MHz_XTAL / 4); // Master m_maincpu->set_addrmap(AS_PROGRAM, &namcos21_state::master_map); TIMER(config, "scantimer").configure_scanline(FUNC(namcos21_state::screen_scanline), "screen", 0, 1); - M68000(config, m_slave, 49.152_MHz_XTAL / 4); /* Slave */ + M68000(config, m_slave, 49.152_MHz_XTAL / 4); // Slave m_slave->set_addrmap(AS_PROGRAM, &namcos21_state::slave_map); - MC6809E(config, m_audiocpu, 49.152_MHz_XTAL / 24); /* Sound */ + MC6809E(config, m_audiocpu, 49.152_MHz_XTAL / 24); // Sound m_audiocpu->set_addrmap(AS_PROGRAM, &namcos21_state::sound_map); m_audiocpu->set_periodic_int(FUNC(namcos21_state::irq0_line_hold), attotime::from_hz(2*60)); @@ -837,7 +833,7 @@ void namcos21_state::winrun(machine_config &config) NAMCOS21_DSP(config, m_namcos21_dsp, 0); m_namcos21_dsp->set_renderer_tag("namcos21_3d"); - m68000_device &gpu(M68000(config, "gpu", 49.152_MHz_XTAL / 4)); /* graphics coprocessor */ + m68000_device &gpu(M68000(config, "gpu", 49.152_MHz_XTAL / 4)); // graphics coprocessor gpu.set_addrmap(AS_PROGRAM, &namcos21_state::gpu_map); NAMCO_C148(config, m_master_intc, 0, m_maincpu, true); @@ -851,7 +847,7 @@ void namcos21_state::winrun(machine_config &config) NAMCO_C148(config, m_gpu_intc, 0, "gpu", false); NAMCO_C139(config, m_sci, 0); - config.set_maximum_quantum(attotime::from_hz(6000)); /* 100 CPU slices per frame */ + config.set_maximum_quantum(attotime::from_hz(6000)); // 100 CPU slices per frame NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); diff --git a/src/mame/namco/namcos21_3d.cpp b/src/mame/namco/namcos21_3d.cpp index aa15491f3b3..49748e6ecd8 100644 --- a/src/mame/namco/namcos21_3d.cpp +++ b/src/mame/namco/namcos21_3d.cpp @@ -80,7 +80,7 @@ void namcos21_3d_device::copy_visible_poly_framebuffer(bitmap_ind16 &bitmap, con for (int sx = clip.left(); sx <= clip.right(); sx++) { int z = pZ[sx]; - //if( pZ[sx]!=0x7fff ) + //if (pZ[sx] != 0x7fff) if (z >= zlo && z <= zhi) { dest[sx] = pPen[sx]; @@ -152,7 +152,7 @@ void namcos21_3d_device::rendertri(const n21_vertex *v0, const n21_vertex *v1, c { int dy, ystart, yend, crop; - /* first, sort so that v0->y <= v1->y <= v2->y */ + // first, sort so that v0->y <= v1->y <= v2->y for (;;) { if (v0->y > v1->y) @@ -175,8 +175,8 @@ void namcos21_3d_device::rendertri(const n21_vertex *v0, const n21_vertex *v1, c if (dy) { int y; - edge e1; /* short edge (top and bottom) */ - edge e2; /* long (common) edge */ + edge e1; // short edge (top and bottom) + edge e2; // long (common) edge double dx2dy = (v2->x - v0->x) / dy; double dz2dy = (v2->z - v0->z) / dy; @@ -262,12 +262,10 @@ void namcos21_3d_device::draw_quad(int sx[4], int sy[4], int zcode[4], int color { n21_vertex a, b, c, d; int depthcueenable = 1; - /* - 0x0000..0x1fff sprite palettes (0x20 sets of 0x100 colors) - 0x2000..0x3fff polygon palette bank0 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) - 0x4000..0x5fff polygon palette bank1 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) - 0x6000..0x7fff polygon palette bank2 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) - */ + // 0x0000..0x1fff sprite palettes (0x20 sets of 0x100 colors) + // 0x2000..0x3fff polygon palette bank0 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) + // 0x4000..0x5fff polygon palette bank1 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) + // 0x6000..0x7fff polygon palette bank2 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) if (m_fixed_palbase != -1) { diff --git a/src/mame/namco/namcos21_c67.cpp b/src/mame/namco/namcos21_c67.cpp index 1a0d429c54d..88324683f12 100644 --- a/src/mame/namco/namcos21_c67.cpp +++ b/src/mame/namco/namcos21_c67.cpp @@ -13,11 +13,15 @@ TODO: - verify audiocpu irq frequency; - is m_layer0_pivot software-controlled and if so, where? (solvalou sprite layer 0 is further back than starblad and cybsled); +- wrong global sprite layer offsets in service mode for all games except aircomb, it's fine in-game though; - aircomb: z-fighting issue on attract mode with the plane renders (after the first title screen), and on pilot parachuting with a time over; - aircomb: missing background on attract mode ranking screen (masking? cfr. shared/namco_c355spr.cpp); - aircomb: bad sprite colors on debriefing medal screen; -- solvalou: black screen on service mode, is it due of the various hacks or it's in shared/namco_c355spr.cpp?; +- solvalou: black screen on service mode, is it due of the various hacks or it's in shared/namco_c355spr.cpp? + it writes the c355 sprite list to 0x14000 and the sprite table to 0x0, so it'll work if those are swapped + around in namco_c355spr.cpp; +- solvalou: service mode polygon test is crashy when testing invalid polygons (the good old IDC overflow); - solvalou: sprite blend is wrong during water stages (look at the blaster/score panel), the palette bank for the water is at 0x2200, but the blend palette is at 0x6000 instead of 0x6200?; - starblad: service mode has heavy sprite glitches if entered from live gameplay (verify) @@ -26,8 +30,8 @@ BTANB: - aircomb: intro cockpit closure is one pixel off on left edge; - solvalou: sprites on top of foreground polygons (eg. explosions, water splash) -Reversed AD Stick Y control in starblad/solvalou is correct (just like aircomb). It may seem backwards -when playing it on an MAME (eg. with mouse), so just change analog reverse setting in the UI. +Reversed AD Stick Y control in starblad/solvalou is correct (just like aircomb). It may seem backwards when +playing it on an MAME (eg. with mouse), in that case just change the analog reverse setting in the UI. --------------------------------------------------------------------------- @@ -267,19 +271,21 @@ Palette: #include "emu.h" +#include "namco68.h" +#include "namco_c139.h" +#include "namco_c148.h" +#include "namco_dsp.h" +#include "namcos21_3d.h" +#include "namcos21_dsp_c67.h" + +#include "namco_c355spr.h" + #include "cpu/m68000/m68000.h" #include "cpu/m6805/m6805.h" #include "cpu/m6809/m6809.h" #include "machine/nvram.h" #include "namcoio_gearbox.h" #include "machine/timer.h" -#include "namco_c139.h" -#include "namco_c148.h" -#include "namco68.h" -#include "namco_dsp.h" -#include "namcos21_dsp_c67.h" -#include "namco_c355spr.h" -#include "namcos21_3d.h" #include "sound/c140.h" #include "sound/ymopm.h" @@ -289,8 +295,6 @@ Palette: #include "solvalou.lh" -#define ENABLE_LOGGING 0 - namespace { @@ -438,16 +442,16 @@ u32 namcos21_c67_state::screen_update(screen_device &screen, bitmap_ind16 &bitma m_c355spr->draw(screen, bitmap, cliprect, 2); const u16 pri1 = (m_palette->read16_ext(0) >> 8) & 7; -// const u16 pri2 = (m_palette->read16_ext(1) >> 8) & 7; // always '2'? + //const u16 pri2 = (m_palette->read16_ext(1) >> 8) & 7; // always '2'? switch (pri1) { case 0: // aircomb mission select & gameplay + case 2: // starblad/solvalou when going in service mode m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7ffe); m_c355spr->draw(screen, bitmap, cliprect, 0); break; case 4: // default gameplay for all games, aircomb attract mode - case 2: // TODO: starblad/solvalou when going in service mode default: m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, m_layer0_pivot, 0x7ffe); m_c355spr->draw(screen, bitmap, cliprect, 0); @@ -470,16 +474,14 @@ u16 namcos21_c67_state::video_enable_r() // other bits unknown (if ever used) void namcos21_c67_state::video_enable_w(offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA( &m_video_enable ); + COMBINE_DATA(&m_video_enable); if (m_video_enable & ~0x40) - { logerror("Video Enable %04x!\n", m_video_enable); - } } /***********************************************************/ -/* dual port ram memory handlers */ +// dual port ram memory handlers u16 namcos21_c67_state::dpram_word_r(offs_t offset) { @@ -489,9 +491,7 @@ u16 namcos21_c67_state::dpram_word_r(offs_t offset) void namcos21_c67_state::dpram_word_w(offs_t offset, u16 data, u16 mem_mask) { if (ACCESSING_BITS_0_7) - { - m_dpram[offset] = data&0xff; - } + m_dpram[offset] = data & 0xff; } u8 namcos21_c67_state::dpram_byte_r(offs_t offset) @@ -512,11 +512,11 @@ void namcos21_c67_state::dpram_byte_w(offs_t offset, u8 data) void namcos21_c67_state::common_map(address_map &map) { - map(0x280000, 0x280001).nopw(); /* written once on startup */ + map(0x280000, 0x280001).nopw(); // written once on startup map(0x400000, 0x400001).w(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::pointram_control_w)); map(0x440000, 0x440001).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::pointram_data_r), FUNC(namcos21_dsp_c67_device::pointram_data_w)); - map(0x440002, 0x47ffff).nopw(); /* (?) Air Combat */ - map(0x480000, 0x4807ff).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::namcos21_depthcue_r), FUNC(namcos21_dsp_c67_device::namcos21_depthcue_w)); /* Air Combat */ + map(0x440002, 0x47ffff).nopw(); // (?) Air Combat + map(0x480000, 0x4807ff).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::namcos21_depthcue_r), FUNC(namcos21_dsp_c67_device::namcos21_depthcue_w)); // Air Combat map(0x700000, 0x71ffff).rw(m_c355spr, FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)); map(0x720000, 0x720007).rw(m_c355spr, FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); map(0x740000, 0x74ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); @@ -534,7 +534,7 @@ void namcos21_c67_state::master_map(address_map &map) { common_map(map); map(0x000000, 0x0fffff).rom(); - map(0x100000, 0x10ffff).ram(); /* private work RAM */ + map(0x100000, 0x10ffff).ram(); // private work RAM map(0x180000, 0x183fff).rw(FUNC(namcos21_c67_state::eeprom_r), FUNC(namcos21_c67_state::eeprom_w)).umask16(0x00ff); map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); map(0x200000, 0x20ffff).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_w)); @@ -544,7 +544,7 @@ void namcos21_c67_state::slave_map(address_map &map) { common_map(map); map(0x000000, 0x07ffff).rom(); - map(0x100000, 0x13ffff).ram(); /* private work RAM */ + map(0x100000, 0x13ffff).ram(); // private work RAM map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); map(0x200000, 0x20ffff).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_w)); } @@ -555,17 +555,17 @@ void namcos21_c67_state::slave_map(address_map &map) void namcos21_c67_state::sound_map(address_map &map) { - map(0x0000, 0x3fff).bankr("audiobank"); /* banked */ - map(0x3000, 0x3003).nopw(); /* ? */ + map(0x0000, 0x3fff).bankr("audiobank"); // banked + map(0x3000, 0x3003).nopw(); // ? map(0x4000, 0x4001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)); map(0x5000, 0x51ff).mirror(0x0e00).rw(m_c140, FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)); map(0x6000, 0x61ff).mirror(0x0e00).rw(m_c140, FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)); // mirrored map(0x7000, 0x77ff).mirror(0x0800).rw(FUNC(namcos21_c67_state::dpram_byte_r), FUNC(namcos21_c67_state::dpram_byte_w)).share("dpram"); map(0x8000, 0x9fff).ram(); - map(0xa000, 0xbfff).nopw(); /* amplifier enable on 1st write */ - map(0xc000, 0xffff).nopw(); /* avoid debug log noise; games write frequently to 0xe000 */ + map(0xa000, 0xbfff).nopw(); // amplifier enable on 1st write + map(0xc000, 0xffff).nopw(); // avoid debug log noise; games write frequently to 0xe000 map(0xc000, 0xc001).w(FUNC(namcos21_c67_state::sound_bankselect_w)); - map(0xd001, 0xd001).nopw(); /* watchdog */ + map(0xd001, 0xd001).nopw(); // watchdog map(0xd000, 0xffff).rom().region("audiocpu", 0x01000); } @@ -769,7 +769,7 @@ INPUT_PORTS_END void namcos21_c67_state::sound_bankselect_w(u8 data) { - m_audiobank->set_entry(data>>4); + m_audiobank->set_entry(data >> 4); } @@ -777,12 +777,12 @@ void namcos21_c67_state::sound_reset_w(u8 data) { if (data & 0x01) { - /* Resume execution */ + // Resume execution m_audiocpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); } else { - /* Suspend execution */ + // Suspend execution m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); } @@ -816,12 +816,12 @@ u8 namcos21_c67_state::eeprom_r(offs_t offset) void namcos21_c67_state::machine_reset() { - /* Initialise the bank select in the sound CPU */ - m_audiobank->set_entry(0); /* Page in bank 0 */ + // Initialise the bank select in the sound CPU + m_audiobank->set_entry(0); // Page in bank 0 m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE ); - /* Place CPU2 & CPU3 into the reset condition */ + // Place CPU2 & CPU3 into the reset condition reset_all_subcpus(ASSERT_LINE); } @@ -843,7 +843,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos21_c67_state::screen_scanline) { int scanline = param; - if (scanline == 240*2) + if (scanline == 240 * 2) { m_master_intc->vblank_irq_trigger(); m_slave_intc->vblank_irq_trigger(); @@ -854,14 +854,14 @@ TIMER_DEVICE_CALLBACK_MEMBER(namcos21_c67_state::screen_scanline) // starblad, solvalou, aircomb, cybsled base state void namcos21_c67_state::namcos21(machine_config &config) { - M68000(config, m_maincpu, 49.152_MHz_XTAL / 4); /* Master */ + M68000(config, m_maincpu, 49.152_MHz_XTAL / 4); // Master m_maincpu->set_addrmap(AS_PROGRAM, &namcos21_c67_state::master_map); TIMER(config, "scantimer").configure_scanline(FUNC(namcos21_c67_state::screen_scanline), "screen", 0, 1); - M68000(config, m_slave, 49.152_MHz_XTAL / 4); /* Slave */ + M68000(config, m_slave, 49.152_MHz_XTAL / 4); // Slave m_slave->set_addrmap(AS_PROGRAM, &namcos21_c67_state::slave_map); - MC6809E(config, m_audiocpu, 49.152_MHz_XTAL / 24); /* Sound */ + MC6809E(config, m_audiocpu, 49.152_MHz_XTAL / 24); // Sound m_audiocpu->set_addrmap(AS_PROGRAM, &namcos21_c67_state::sound_map); m_audiocpu->set_periodic_int(FUNC(namcos21_c67_state::irq0_line_hold), attotime::from_hz(2*60)); diff --git a/src/mame/namco/namcos21_de.cpp b/src/mame/namco/namcos21_de.cpp index abe4471ea1e..82d48d7d841 100644 --- a/src/mame/namco/namcos21_de.cpp +++ b/src/mame/namco/namcos21_de.cpp @@ -49,8 +49,6 @@ TODO: #include "speaker.h" -#define ENABLE_LOGGING 0 - DECLARE_DEVICE_TYPE(NAMCO_DE_PCB, namco_de_pcbstack_device) @@ -148,14 +146,14 @@ namco_de_pcbstack_device::namco_de_pcbstack_device(const machine_config &mconfig void namco_de_pcbstack_device::device_add_mconfig(machine_config &config) { - M68000(config, m_maincpu, 49.152_MHz_XTAL / 4); /* Master */ + M68000(config, m_maincpu, 49.152_MHz_XTAL / 4); // Master m_maincpu->set_addrmap(AS_PROGRAM, &namco_de_pcbstack_device::driveyes_master_map); TIMER(config, "scantimer").configure_scanline(FUNC(namco_de_pcbstack_device::screen_scanline), "screen", 0, 1); - M68000(config, m_slave, 49.152_MHz_XTAL / 4); /* Slave */ + M68000(config, m_slave, 49.152_MHz_XTAL / 4); // Slave m_slave->set_addrmap(AS_PROGRAM, &namco_de_pcbstack_device::driveyes_slave_map); - MC6809E(config, m_audiocpu, 3072000); /* Sound */ + MC6809E(config, m_audiocpu, 3072000); // Sound m_audiocpu->set_addrmap(AS_PROGRAM, &namco_de_pcbstack_device::sound_map); m_audiocpu->set_periodic_int(FUNC(namco_de_pcbstack_device::irq0_line_hold), attotime::from_hz(2*60)); @@ -164,7 +162,7 @@ void namco_de_pcbstack_device::device_add_mconfig(machine_config &config) NAMCOS21_DSP(config, m_namcos21_dsp, 0); m_namcos21_dsp->set_renderer_tag("namcos21_3d"); - config.set_maximum_quantum(attotime::from_hz(6000)); /* 100 CPU slices per frame */ + config.set_maximum_quantum(attotime::from_hz(6000)); // 100 CPU slices per frame NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); @@ -276,16 +274,14 @@ u16 namco_de_pcbstack_device::video_enable_r() void namco_de_pcbstack_device::video_enable_w(offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA( &m_video_enable ); /* 0x40 = enable */ - if (m_video_enable != 0 && m_video_enable != 0x40 ) - { + COMBINE_DATA(&m_video_enable); // 0x40 = enable + if (m_video_enable & ~0x40) logerror("%s: unexpected video_enable_w=0x%x\n", machine().describe_context(), m_video_enable); - } } /***********************************************************/ -/* dual port ram memory handlers */ +// dual port ram memory handlers u16 namco_de_pcbstack_device::dpram_word_r(offs_t offset) { @@ -295,9 +291,7 @@ u16 namco_de_pcbstack_device::dpram_word_r(offs_t offset) void namco_de_pcbstack_device::dpram_word_w(offs_t offset, u16 data, u16 mem_mask) { if (ACCESSING_BITS_0_7) - { - m_dpram[offset] = data&0xff; - } + m_dpram[offset] = data & 0xff; } u8 namco_de_pcbstack_device::dpram_byte_r(offs_t offset) @@ -316,17 +310,17 @@ void namco_de_pcbstack_device::dpram_byte_w(offs_t offset, u8 data) void namco_de_pcbstack_device::sound_map(address_map &map) { - map(0x0000, 0x3fff).bankr("audiobank"); /* banked */ - map(0x3000, 0x3003).nopw(); /* ? */ + map(0x0000, 0x3fff).bankr("audiobank"); // banked + map(0x3000, 0x3003).nopw(); // ? map(0x4000, 0x4001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)); map(0x5000, 0x51ff).mirror(0x0e00).rw(m_c140, FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)); map(0x6000, 0x61ff).mirror(0x0e00).rw(m_c140, FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)); // mirrored map(0x7000, 0x77ff).mirror(0x0800).rw(FUNC(namco_de_pcbstack_device::dpram_byte_r), FUNC(namco_de_pcbstack_device::dpram_byte_w)).share("dpram"); map(0x8000, 0x9fff).ram(); - map(0xa000, 0xbfff).nopw(); /* amplifier enable on 1st write */ - map(0xc000, 0xffff).nopw(); /* avoid debug log noise; games write frequently to 0xe000 */ + map(0xa000, 0xbfff).nopw(); // amplifier enable on 1st write + map(0xc000, 0xffff).nopw(); // avoid debug log noise; games write frequently to 0xe000 map(0xc000, 0xc001).w(FUNC(namco_de_pcbstack_device::sound_bankselect_w)); - map(0xd001, 0xd001).nopw(); /* watchdog */ + map(0xd001, 0xd001).nopw(); // watchdog map(0xd000, 0xffff).rom().region("audiocpu", 0x01000); } @@ -386,7 +380,7 @@ void namco_de_pcbstack_device::driveyes_master_map(address_map &map) { driveyes_common_map(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).ram(); /* private work RAM */ + map(0x100000, 0x10ffff).ram(); // private work RAM map(0x180000, 0x183fff).rw(FUNC(namco_de_pcbstack_device::eeprom_r), FUNC(namco_de_pcbstack_device::eeprom_w)).umask16(0x00ff); map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); @@ -403,25 +397,25 @@ void namco_de_pcbstack_device::driveyes_slave_map(address_map &map) { driveyes_common_map(map); map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).ram(); /* private work RAM */ + map(0x100000, 0x10ffff).ram(); // private work RAM map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); } void namco_de_pcbstack_device::sound_bankselect_w(u8 data) { - m_audiobank->set_entry(data>>4); + m_audiobank->set_entry(data >> 4); } void namco_de_pcbstack_device::sound_reset_w(u8 data) { if (data & 0x01) { - /* Resume execution */ + // Resume execution m_audiocpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); } else { - /* Suspend execution */ + // Suspend execution m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); } } @@ -452,7 +446,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(namco_de_pcbstack_device::screen_scanline) { int scanline = param; - if (scanline == 240*2) + if (scanline == 240 * 2) { m_master_intc->vblank_irq_trigger(); m_slave_intc->vblank_irq_trigger(); @@ -474,12 +468,12 @@ void namco_de_pcbstack_device::device_start() void namco_de_pcbstack_device::device_reset() { - /* Initialise the bank select in the sound CPU */ - m_audiobank->set_entry(0); /* Page in bank 0 */ + // Initialise the bank select in the sound CPU + m_audiobank->set_entry(0); // Page in bank 0 m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE ); - /* Place CPU2 & CPU3 into the reset condition */ + // Place CPU2 & CPU3 into the reset condition reset_all_subcpus(ASSERT_LINE); } @@ -523,8 +517,8 @@ static INPUT_PORTS_START( driveyes ) PORT_START("pcb_1:MCUB") PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("gearbox", FUNC(namcoio_gearbox_device::clutch_r)) PORT_BIT( 0x37, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* ? */ - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) /* ? */ + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) // ? + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) // ? PORT_START("pcb_1:MCUH") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) @@ -579,11 +573,11 @@ static INPUT_PORTS_START( driveyes ) PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_DEVICE_MEMBER("gearbox", FUNC(namcoio_gearbox_device::in_r)) PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_START("pcb_1:MCUDI1") /* 63B05Z0 - $3001 */ + PORT_START("pcb_1:MCUDI1") // 63B05Z0 - $3001 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_START("pcb_1:MCUDI2") /* 63B05Z0 - $3002 */ + PORT_START("pcb_1:MCUDI2") // 63B05Z0 - $3002 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_START("pcb_1:MCUDI3") /* 63B05Z0 - $3003 */ + PORT_START("pcb_1:MCUDI3") // 63B05Z0 - $3003 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) // the side view screens do still read inputs, but it's more likely that the main screen should be transfering them diff --git a/src/mame/namco/namcos21_dsp.cpp b/src/mame/namco/namcos21_dsp.cpp index a494bc4aa20..57e2b1542d5 100644 --- a/src/mame/namco/namcos21_dsp.cpp +++ b/src/mame/namco/namcos21_dsp.cpp @@ -70,31 +70,31 @@ void namcos21_dsp_device::device_reset() uint16_t namcos21_dsp_device::winrun_dspcomram_r(offs_t offset) { - int bank = 1-(m_winrun_dspcomram_control[0x4/2]&1); - uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; + int bank = 1 - (m_winrun_dspcomram_control[0x4/2] & 1); + uint16_t *mem = &m_winrun_dspcomram[0x1000 * bank]; return mem[offset]; } void namcos21_dsp_device::winrun_dspcomram_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - int bank = 1-(m_winrun_dspcomram_control[0x4/2]&1); - uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; - COMBINE_DATA( &mem[offset] ); + int bank = 1 - (m_winrun_dspcomram_control[0x4/2] & 1); + uint16_t *mem = &m_winrun_dspcomram[0x1000 * bank]; + COMBINE_DATA(&mem[offset]); } uint16_t namcos21_dsp_device::winrun_cuskey_r() { int pc = m_dsp->pc(); - switch( pc ) + switch (pc) { - case 0x0064: /* winrun91 */ + case 0x0064: // winrun91 return 0xfebb; - case 0x006c: /* winrun91 */ + case 0x006c: // winrun91 return 0xffff; - case 0x0073: /* winrun91 */ + case 0x0073: // winrun91 return 0x0144; - case 0x0075: /* winrun */ + case 0x0075: // winrun return 0x24; default: @@ -109,86 +109,97 @@ void namcos21_dsp_device::winrun_cuskey_w(uint16_t data) void namcos21_dsp_device::winrun_flush_poly() { - if( m_winrun_poly_index>0 ) + if (m_winrun_poly_index > 0) { const uint16_t *pSource = m_winrun_poly_buf; uint16_t color; int sx[4], sy[4], zcode[4]; int j; color = *pSource++; - if( color&0x8000 ) - { /* direct-draw */ - for( j=0; j<4; j++ ) + if (color & 0x8000) + { + // direct-draw + for (j = 0; j < 4; j++) { - sx[j] = m_poly_frame_width/2 + (int16_t)*pSource++; + sx[j] = m_poly_frame_width/2 + (int16_t)*pSource++; sy[j] = m_poly_frame_height/2 + (int16_t)*pSource++; zcode[j] = *pSource++; } - m_renderer->draw_quad(sx, sy, zcode, color&0x7fff); + m_renderer->draw_quad(sx, sy, zcode, color & 0x7fff); } else { - int quad_idx = color*6; + int quad_idx = color * 6; for(;;) { uint8_t code = m_pointram[quad_idx++]; color = m_pointram[quad_idx++]; - for( j=0; j<4; j++ ) + for (j = 0; j < 4; j++) { uint8_t vi = m_pointram[quad_idx++]; - sx[j] = m_poly_frame_width/2 + (int16_t)pSource[vi*3+0]; - sy[j] = m_poly_frame_height/2 + (int16_t)pSource[vi*3+1]; - zcode[j] = pSource[vi*3+2]; + sx[j] = m_poly_frame_width/2 + (int16_t)pSource[vi * 3 + 0]; + sy[j] = m_poly_frame_height/2 + (int16_t)pSource[vi * 3 + 1]; + zcode[j] = pSource[vi * 3 + 2]; } - m_renderer->draw_quad(sx, sy, zcode, color&0x7fff); - if( code&0x80 ) - { /* end-of-quadlist marker */ + m_renderer->draw_quad(sx, sy, zcode, color & 0x7fff); + if (code & 0x80) + { + // end-of-quadlist marker break; } } } m_winrun_poly_index = 0; } -} /* winrun_flushpoly */ +} uint16_t namcos21_dsp_device::winrun_poly_reset_r() { - winrun_flush_poly(); + if (!machine().side_effects_disabled()) + winrun_flush_poly(); + return 0; } void namcos21_dsp_device::winrun_dsp_render_w(uint16_t data) { - if( m_winrun_poly_index<WINRUN_MAX_POLY_PARAM ) + if (m_winrun_poly_index < WINRUN_MAX_POLY_PARAM) { m_winrun_poly_buf[m_winrun_poly_index++] = data; } else { - logerror( "WINRUN_POLY_OVERFLOW\n" ); + logerror("WINRUN_POLY_OVERFLOW\n"); } } void namcos21_dsp_device::winrun_dsp_pointrom_addr_w(offs_t offset, uint16_t data) { - if( offset==0 ) - { /* port 8 */ + if (offset == 0) + { + // port 8 m_winrun_pointrom_addr = data; } else - { /* port 9 */ - m_winrun_pointrom_addr |= (data<<16); + { + // port 9 + m_winrun_pointrom_addr |= (data << 16); } } uint16_t namcos21_dsp_device::winrun_dsp_pointrom_data_r() { - return m_ptrom16[m_winrun_pointrom_addr++]; + uint16_t data = m_ptrom16[m_winrun_pointrom_addr]; + + if (!machine().side_effects_disabled()) + m_winrun_pointrom_addr++; + + return data; } void namcos21_dsp_device::winrun_dsp_complete_w(uint16_t data) { - if( data ) + if (data) { winrun_flush_poly(); m_dsp->pulse_input_line(INPUT_LINE_RESET, attotime::zero); @@ -203,31 +214,31 @@ uint16_t namcos21_dsp_device::winrun_table_r(offs_t offset) void namcos21_dsp_device::winrun_dspbios_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - COMBINE_DATA( &m_winrun_dspbios[offset] ); - if( offset==0xfff ) // is this the real trigger? + COMBINE_DATA(&m_winrun_dspbios[offset]); + if (offset == 0xfff) // is this the real trigger? { m_winrun_dsp_alive = 1; m_dsp->resume(SUSPEND_REASON_HALT); } } -//380000 : read : dsp status? 1 = busy -//380000 : write(0x01) - done before dsp comram init -//380004 : dspcomram bank, as seen by 68k -//380008 : read : state? +// 380000: read : dsp status? 1 = busy +// 380000: write(0x01) - done before dsp comram init +// 380004: dspcomram bank, as seen by 68k +// 380008: read : state? uint16_t namcos21_dsp_device::winrun_68k_dspcomram_r(offs_t offset) { - int bank = m_winrun_dspcomram_control[0x4/2]&1; - uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; + int bank = m_winrun_dspcomram_control[0x4/2] & 1; + uint16_t *mem = &m_winrun_dspcomram[0x1000 * bank]; return mem[offset]; } void namcos21_dsp_device::winrun_68k_dspcomram_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - int bank = m_winrun_dspcomram_control[0x4/2]&1; - uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; - COMBINE_DATA( &mem[offset] ); + int bank = m_winrun_dspcomram_control[0x4/2] & 1; + uint16_t *mem = &m_winrun_dspcomram[0x1000 * bank]; + COMBINE_DATA(&mem[offset]); } uint16_t namcos21_dsp_device::winrun_dspcomram_control_r(offs_t offset) @@ -237,7 +248,7 @@ uint16_t namcos21_dsp_device::winrun_dspcomram_control_r(offs_t offset) void namcos21_dsp_device::winrun_dspcomram_control_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - COMBINE_DATA( &m_winrun_dspcomram_control[offset] ); + COMBINE_DATA(&m_winrun_dspcomram_control[offset]); } @@ -275,8 +286,8 @@ void namcos21_dsp_device::device_add_mconfig(machine_config &config) void namcos21_dsp_device::pointram_control_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - COMBINE_DATA( &m_pointram_control ); - m_pointram_idx = 0; /* HACK */ + COMBINE_DATA(&m_pointram_control); + m_pointram_idx = 0; // HACK } uint16_t namcos21_dsp_device::pointram_data_r() @@ -286,9 +297,9 @@ uint16_t namcos21_dsp_device::pointram_data_r() void namcos21_dsp_device::pointram_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - if( ACCESSING_BITS_0_7 ) + if (ACCESSING_BITS_0_7) { m_pointram[m_pointram_idx++] = data; - m_pointram_idx &= (PTRAM_SIZE-1); + m_pointram_idx &= (PTRAM_SIZE - 1); } } diff --git a/src/mame/namco/namcos21_dsp_c67.cpp b/src/mame/namco/namcos21_dsp_c67.cpp index 6035ff6a351..b50b9e46974 100644 --- a/src/mame/namco/namcos21_dsp_c67.cpp +++ b/src/mame/namco/namcos21_dsp_c67.cpp @@ -25,8 +25,8 @@ namcos21_dsp_c67_device::namcos21_dsp_c67_device(const machine_config &mconfig, m_renderer(*this, finder_base::DUMMY_TAG), m_c67master(*this, "dspmaster"), m_c67slave(*this, "dspslave%u", 0U), - m_ptrom24(*this,"point24"), - m_master_dsp_ram(*this,"master_dsp_ram"), + m_ptrom24(*this, "point24"), + m_master_dsp_ram(*this, "master_dsp_ram"), m_gametype(0), m_irq_enable(0) { @@ -71,7 +71,7 @@ void namcos21_dsp_c67_device::device_reset() m_poly_frame_width = m_renderer->get_width(); m_poly_frame_height = m_renderer->get_height(); - /* Wipe the framebuffers */ + // Wipe the framebuffers m_renderer->swap_and_clear_poly_framebuffer(); m_renderer->swap_and_clear_poly_framebuffer(); @@ -109,7 +109,7 @@ void namcos21_dsp_c67_device::reset_dsps(int state) void namcos21_dsp_c67_device::reset_kickstart() { - //printf( "dspkick=0x%x\n", data ); + //printf("dspkick=0x%x\n", data); if (m_mbNeedsKickstart == 0) return; m_mbNeedsKickstart = 0; @@ -151,28 +151,29 @@ void namcos21_dsp_c67_device::device_add_mconfig(machine_config &config) void namcos21_dsp_c67_device::dspcuskey_w(uint16_t data) -{ /* TODO: proper cuskey emulation */ +{ + // TODO: proper cuskey emulation } uint16_t namcos21_dsp_c67_device::dspcuskey_r() { uint16_t result = 0; - if( m_gametype == NAMCOS21_SOLVALOU ) + if (m_gametype == NAMCOS21_SOLVALOU) { - switch( m_c67master->pc() ) + switch (m_c67master->pc()) { case 0x805e: result = 0x0000; break; case 0x805f: result = 0xfeba; break; case 0x8067: result = 0xffff; break; case 0x806e: result = 0x0145; break; default: - logerror( "unk cuskey_r; pc=0x%x\n", m_c67master->pc() ); + logerror("unk cuskey_r; pc=0x%x\n", m_c67master->pc()); break; } } - else if( m_gametype == NAMCOS21_CYBERSLED ) + else if (m_gametype == NAMCOS21_CYBERSLED) { - switch( m_c67master->pc() ) + switch (m_c67master->pc()) { case 0x8061: result = 0xfe95; break; case 0x8069: result = 0xffff; break; @@ -181,9 +182,9 @@ uint16_t namcos21_dsp_c67_device::dspcuskey_r() break; } } - else if( m_gametype == NAMCOS21_AIRCOMBAT ) + else if (m_gametype == NAMCOS21_AIRCOMBAT) { - switch( m_c67master->pc() ) + switch (m_c67master->pc()) { case 0x8062: result = 0xfeb9; break; case 0x806a: result = 0xffff; break; @@ -199,11 +200,13 @@ void namcos21_dsp_c67_device::transmit_word_to_slave(uint16_t data) { unsigned offs = m_mpDspState->slaveInputStart+m_mpDspState->slaveBytesAvailable++; m_mpDspState->slaveInputBuffer[offs%DSP_BUF_MAX] = data; - if (ENABLE_LOGGING) logerror( "+%04x(#%04x)\n", data, m_mpDspState->slaveBytesAvailable ); + + if (ENABLE_LOGGING) logerror("+%04x(#%04x)\n", data, m_mpDspState->slaveBytesAvailable); + m_mpDspState->slaveActive = 1; - if( m_mpDspState->slaveBytesAvailable >= DSP_BUF_MAX ) + if (m_mpDspState->slaveBytesAvailable >= DSP_BUF_MAX) { - fatalerror( "IDC overflow\n" ); + fatalerror("IDC overflow\n"); } } @@ -327,30 +330,41 @@ void namcos21_dsp_c67_device::namcos21_kickstart() uint16_t namcos21_dsp_c67_device::read_word_from_slave_input() { uint16_t data = 0; - if( m_mpDspState->slaveBytesAvailable>0 ) + + if (m_mpDspState->slaveBytesAvailable > 0) { - data = m_mpDspState->slaveInputBuffer[m_mpDspState->slaveInputStart++]; - m_mpDspState->slaveInputStart %= DSP_BUF_MAX; - m_mpDspState->slaveBytesAvailable--; - if( m_mpDspState->slaveBytesAdvertised>0 ) + data = m_mpDspState->slaveInputBuffer[m_mpDspState->slaveInputStart]; + + if (!machine().side_effects_disabled()) { - m_mpDspState->slaveBytesAdvertised--; + m_mpDspState->slaveInputStart++; + m_mpDspState->slaveInputStart %= DSP_BUF_MAX; + m_mpDspState->slaveBytesAvailable--; + if (m_mpDspState->slaveBytesAdvertised > 0) + { + m_mpDspState->slaveBytesAdvertised--; + } + if (ENABLE_LOGGING) logerror("%s:-%04x(0x%04x)\n", machine().describe_context(), data, m_mpDspState->slaveBytesAvailable); } - if (ENABLE_LOGGING) logerror( "%s:-%04x(0x%04x)\n", machine().describe_context(), data, m_mpDspState->slaveBytesAvailable ); } + return data; } uint16_t namcos21_dsp_c67_device::get_input_bytes_advertised_for_slave() { - if( m_mpDspState->slaveBytesAdvertised < m_mpDspState->slaveBytesAvailable ) + if (!machine().side_effects_disabled()) { - m_mpDspState->slaveBytesAdvertised++; - } - else if( m_mpDspState->slaveActive && m_mpDspState->masterFinished && m_mpDspState->masterSourceAddr ) - { - namcos21_kickstart(); + if (m_mpDspState->slaveBytesAdvertised < m_mpDspState->slaveBytesAvailable) + { + m_mpDspState->slaveBytesAdvertised++; + } + else if (m_mpDspState->slaveActive && m_mpDspState->masterFinished && m_mpDspState->masterSourceAddr) + { + namcos21_kickstart(); + } } + return m_mpDspState->slaveBytesAdvertised; } @@ -381,68 +395,74 @@ int32_t namcos21_dsp_c67_device::read_pointrom_data(unsigned offset) uint16_t namcos21_dsp_c67_device::dsp_port0_r() { int32_t data = read_pointrom_data(m_pointrom_idx++); - m_mPointRomMSB = (uint8_t)(data>>16); + m_mPointRomMSB = (uint8_t)(data >> 16); m_mbPointRomDataAvailable = 1; return (uint16_t)data; } void namcos21_dsp_c67_device::dsp_port0_w(uint16_t data) -{ /* unused? */ - if (ENABLE_LOGGING) logerror( "PTRAM_LO(0x%04x)\n", data ); +{ + // unused? + if (ENABLE_LOGGING) logerror("PTRAM_LO(0x%04x)\n", data); } uint16_t namcos21_dsp_c67_device::dsp_port1_r() { - if( m_mbPointRomDataAvailable ) + if (m_mbPointRomDataAvailable) { m_mbPointRomDataAvailable = 0; return m_mPointRomMSB; } - return 0x8000; /* IDC ack? */ + return 0x8000; // IDC ack? } void namcos21_dsp_c67_device::dsp_port1_w(uint16_t data) -{ /* unused? */ - if (ENABLE_LOGGING) logerror( "PTRAM_HI(0x%04x)\n", data ); +{ + // unused? + if (ENABLE_LOGGING) logerror("PTRAM_HI(0x%04x)\n", data); } uint16_t namcos21_dsp_c67_device::dsp_port2_r() -{ /* IDC TRANSMIT ENABLE? */ +{ + // IDC TRANSMIT ENABLE? return 0; } void namcos21_dsp_c67_device::dsp_port2_w(uint16_t data) { - if (ENABLE_LOGGING) logerror( "IDC ADDR INIT(0x%04x)\n", data ); + if (ENABLE_LOGGING) logerror("IDC ADDR INIT(0x%04x)\n", data); m_mpDspState->masterSourceAddr = data; transfer_dsp_data(true); } uint16_t namcos21_dsp_c67_device::dsp_port3_idc_rcv_enable_r() -{ /* IDC RECEIVE ENABLE? */ +{ + // IDC RECEIVE ENABLE? return 0; } void namcos21_dsp_c67_device::dsp_port3_w(uint16_t data) { - m_pointrom_idx<<=16; - m_pointrom_idx|=data; + m_pointrom_idx <<= 16; + m_pointrom_idx |= data; } void namcos21_dsp_c67_device::dsp_port4_w(uint16_t data) -{ /* receives $0B<<4 prior to IDC setup */ +{ + // receives $0B<<4 prior to IDC setup } uint16_t namcos21_dsp_c67_device::dsp_port8_r() -{ /* SMU status */ +{ + // SMU status return 1; } void namcos21_dsp_c67_device::dsp_port8_w(uint16_t data) { - if (ENABLE_LOGGING) logerror( "port8_w(%d)\n", data ); - if( data ) + if (ENABLE_LOGGING) logerror("port8_w(%d)\n", data); + if (data) { m_mpDspState->masterFinished = 1; } @@ -450,77 +470,81 @@ void namcos21_dsp_c67_device::dsp_port8_w(uint16_t data) } uint16_t namcos21_dsp_c67_device::dsp_port9_r() -{ /* render-device-busy; used for direct-draw */ +{ + // render-device-busy; used for direct-draw return 0; } uint16_t namcos21_dsp_c67_device::dsp_porta_r() -{ /* config */ +{ + // config return 0; } void namcos21_dsp_c67_device::dsp_porta_w(uint16_t data) { - /* boot: 1 */ - /* IRQ0 end: 0 */ - /* INT2 begin: 1 */ - /* direct-draw begin: 0 */ - /* INT1 begin: 1 */ -// if (ENABLE_LOGGING) logerror( "dsp_porta_w(0x%04x)\n", data ); + // boot: 1 + // IRQ0 end: 0 + // INT2 begin: 1 + // direct-draw begin: 0 + // INT1 begin: 1 + //if (ENABLE_LOGGING) logerror("dsp_porta_w(0x%04x)\n", data); } uint16_t namcos21_dsp_c67_device::dsp_portb_r() -{ /* config */ +{ + // config return 1; } void namcos21_dsp_c67_device::dsp_portb_w(uint16_t data) { - if( data==0 ) - { /* only 0->1 transition triggers */ + if (data == 0) + { + // only 0->1 transition triggers return; } - if( m_mpDspState->masterDirectDrawSize == 13 ) + if (m_mpDspState->masterDirectDrawSize == 13) { - int i; int sx[4], sy[4], zcode[4]; int color = m_mpDspState->masterDirectDrawBuffer[0]; - for( i=0; i<4; i++ ) + for (int i = 0; i < 4; i++) { - sx[i] = m_poly_frame_width/2 + (int16_t)m_mpDspState->masterDirectDrawBuffer[i*3+1]; - sy[i] = m_poly_frame_height/2 + (int16_t)m_mpDspState->masterDirectDrawBuffer[i*3+2]; - zcode[i] = m_mpDspState->masterDirectDrawBuffer[i*3+3]; + sx[i] = m_poly_frame_width/2 + (int16_t)m_mpDspState->masterDirectDrawBuffer[i * 3 + 1]; + sy[i] = m_poly_frame_height/2 + (int16_t)m_mpDspState->masterDirectDrawBuffer[i * 3 + 2]; + zcode[i] = m_mpDspState->masterDirectDrawBuffer[i * 3 + 3]; } - if( color&0x8000 ) + if (color & 0x8000) { m_renderer->draw_quad(sx, sy, zcode, color); } else { - logerror( "indirection used w/ direct draw?\n" ); + logerror("indirection used w/ direct draw?\n"); } } - else if( m_mpDspState->masterDirectDrawSize ) + else if (m_mpDspState->masterDirectDrawSize) { - logerror( "unexpected masterDirectDrawSize=%d!\n",m_mpDspState->masterDirectDrawSize ); + logerror("unexpected masterDirectDrawSize=%d!\n",m_mpDspState->masterDirectDrawSize); } m_mpDspState->masterDirectDrawSize = 0; } void namcos21_dsp_c67_device::dsp_portc_w(uint16_t data) { - if( m_mpDspState->masterDirectDrawSize < DSP_BUF_MAX ) + if (m_mpDspState->masterDirectDrawSize < DSP_BUF_MAX) { m_mpDspState->masterDirectDrawBuffer[m_mpDspState->masterDirectDrawSize++] = data; } else { - logerror( "portc overflow\n" ); + logerror("portc overflow\n"); } } uint16_t namcos21_dsp_c67_device::dsp_portf_r() -{ /* informs BIOS that this is Master DSP */ +{ + // informs BIOS that this is Master DSP return 0; } @@ -537,7 +561,7 @@ void namcos21_dsp_c67_device::master_dsp_program(address_map &map) void namcos21_dsp_c67_device::master_dsp_data(address_map &map) { map(0x2000, 0x200f).rw(FUNC(namcos21_dsp_c67_device::dspcuskey_r), FUNC(namcos21_dsp_c67_device::dspcuskey_w)); - map(0x8000, 0xffff).rw(FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_w)); /* 0x8000 words */ + map(0x8000, 0xffff).rw(FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_w)); // 0x8000 words } void namcos21_dsp_c67_device::master_dsp_io(address_map &map) @@ -559,59 +583,59 @@ void namcos21_dsp_c67_device::master_dsp_io(address_map &map) void namcos21_dsp_c67_device::render_slave_output(uint16_t data) { - if( m_mpDspState->slaveOutputSize >= 4096 ) + if (m_mpDspState->slaveOutputSize >= 4096) { - fatalerror( "SLAVE OVERFLOW (0x%x)\n",m_mpDspState->slaveOutputBuffer[0] ); + fatalerror("SLAVE OVERFLOW (0x%x)\n", m_mpDspState->slaveOutputBuffer[0]); } - /* append word to slave output buffer */ + // append word to slave output buffer m_mpDspState->slaveOutputBuffer[m_mpDspState->slaveOutputSize++] = data; { uint16_t *pSource = m_mpDspState->slaveOutputBuffer; uint16_t count = *pSource++; - if( count && m_mpDspState->slaveOutputSize > count ) + if (count && m_mpDspState->slaveOutputSize > count) { uint16_t color = *pSource++; int sx[4], sy[4],zcode[4]; - int j; - if( color&0x8000 ) + if (color & 0x8000) { - if( count!=13 ) logerror( "?!direct-draw(%d)\n", count ); - for( j=0; j<4; j++ ) + if (count != 13) logerror("?!direct-draw(%d)\n", count); + for (int j = 0; j < 4; j++ ) { - sx[j] = m_poly_frame_width/2 + (int16_t)pSource[3*j+0]; - sy[j] = m_poly_frame_height/2 + (int16_t)pSource[3*j+1]; - zcode[j] = pSource[3*j+2]; + sx[j] = m_poly_frame_width/2 + (int16_t)pSource[3 * j + 0]; + sy[j] = m_poly_frame_height/2 + (int16_t)pSource[3 * j + 1]; + zcode[j] = pSource[3 * j + 2]; } - m_renderer->draw_quad(sx, sy, zcode, color&0x7fff); + m_renderer->draw_quad(sx, sy, zcode, color & 0x7fff); } else { - int quad_idx = color*6; + int quad_idx = color * 6; for(;;) { uint8_t code = m_pointram[quad_idx++]; - color = m_pointram[quad_idx++]|(code<<8); - for( j=0; j<4; j++ ) + color = m_pointram[quad_idx++]|(code << 8); + for (int j = 0; j < 4; j++) { uint8_t vi = m_pointram[quad_idx++]; - sx[j] = m_poly_frame_width/2 + (int16_t)pSource[vi*3+0]; - sy[j] = m_poly_frame_height/2 + (int16_t)pSource[vi*3+1]; - zcode[j] = pSource[vi*3+2]; + sx[j] = m_poly_frame_width/2 + (int16_t)pSource[vi * 3 + 0]; + sy[j] = m_poly_frame_height/2 + (int16_t)pSource[vi * 3 + 1]; + zcode[j] = pSource[vi * 3 + 2]; } - m_renderer->draw_quad(sx, sy, zcode, color&0x7fff); - if( code&0x80 ) - { /* end-of-quadlist marker */ + m_renderer->draw_quad(sx, sy, zcode, color & 0x7fff); + if (code & 0x80) + { + // end-of-quadlist marker break; } } } m_mpDspState->slaveOutputSize = 0; } - else if( count==0 ) + else if (count == 0) { - fatalerror( "RenderSlaveOutput\n" ); + fatalerror("RenderSlaveOutput\n"); } } } @@ -632,24 +656,25 @@ uint16_t namcos21_dsp_c67_device::slave_port2_r() } uint16_t namcos21_dsp_c67_device::slave_port3_r() -{ /* render-device queue size */ - /* up to 0x1fe bytes? - * slave blocks until free &space exists - */ +{ + // render-device queue size + // up to 0x1fe bytes? slave blocks until free &space exists return 0; } void namcos21_dsp_c67_device::slave_port3_w(uint16_t data) -{ /* 0=busy, 1=ready? */ +{ + // 0=busy, 1=ready? } void namcos21_dsp_c67_device::slave_XF_output_w(uint16_t data) { - if (ENABLE_LOGGING) logerror( "%s :slaveXF(%d)\n", machine().describe_context(), data ); + if (ENABLE_LOGGING) logerror("%s :slaveXF(%d)\n", machine().describe_context(), data); } uint16_t namcos21_dsp_c67_device::slave_portf_r() -{ /* informs BIOS that this is Slave DSP */ +{ + // informs BIOS that this is Slave DSP return 1; } @@ -660,7 +685,7 @@ void namcos21_dsp_c67_device::slave_dsp_program(address_map &map) void namcos21_dsp_c67_device::slave_dsp_data(address_map &map) { - /* no external data memory */ + // no external data memory } void namcos21_dsp_c67_device::slave_dsp_io(address_map &map) @@ -692,36 +717,36 @@ void namcos21_dsp_c67_device::slave_dsp_io(address_map &map) */ void namcos21_dsp_c67_device::pointram_control_w(offs_t offset, uint16_t data, uint16_t mem_mask) { -// uint16_t prev = m_pointram_control; - COMBINE_DATA( &m_pointram_control ); + //uint16_t prev = m_pointram_control; + COMBINE_DATA(&m_pointram_control); - /* m_pointram_control&0x20 : bank for depthcue data */ + // m_pointram_control&0x20 : bank for depthcue data #if 0 - logerror( "%s dsp_control_w:[%x]:=%04x ", + logerror("%s dsp_control_w:[%x]:=%04x ", machine().describe_context(), offset, - m_pointram_control ); + m_pointram_control); uint16_t delta = (prev^m_pointram_control)&m_pointram_control; - if( delta&0x10 ) + if (delta & 0x10) { - logerror( " [reset]" ); + logerror(" [reset]"); } - if( delta&2 ) + if (delta & 2) { - logerror( " send(A)%x", m_pointram_control&1 ); + logerror(" send(A)%x", m_pointram_control & 1); } - if( delta&4 ) + if (delta & 4) { - logerror( " send(B)%x", m_pointram_control&1 ); + logerror(" send(B)%x", m_pointram_control & 1); } - if( delta&8 ) + if (delta & 8) { - logerror( " send(C)%x", m_pointram_control&1 ); + logerror(" send(C)%x", m_pointram_control & 1); } - logerror( "\n" ); + logerror("\n"); #endif - m_pointram_idx = 0; /* HACK */ + m_pointram_idx = 0; // HACK } uint16_t namcos21_dsp_c67_device::pointram_data_r() @@ -731,28 +756,29 @@ uint16_t namcos21_dsp_c67_device::pointram_data_r() void namcos21_dsp_c67_device::pointram_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - if( ACCESSING_BITS_0_7 ) + if (ACCESSING_BITS_0_7) { -// if( (m_pointram_idx%6)==0 ) logerror("\n" ); -// logerror( " %02x", data ); + //if((m_pointram_idx%6) == 0) logerror("\n"); + //logerror(" %02x", data); m_pointram[m_pointram_idx++] = data; - m_pointram_idx &= (PTRAM_SIZE-1); + m_pointram_idx &= (PTRAM_SIZE - 1); } } uint16_t namcos21_dsp_c67_device::namcos21_depthcue_r(offs_t offset) { - int bank = (m_pointram_control&0x20)?1:0; + int bank = (m_pointram_control & 0x20) ? 1 : 0; return m_depthcue[bank][offset]; } + void namcos21_dsp_c67_device::namcos21_depthcue_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - if( ACCESSING_BITS_0_7 ) + if (ACCESSING_BITS_0_7) { - int bank = (m_pointram_control&0x20)?1:0; + int bank = (m_pointram_control & 0x20) ? 1 : 0; m_depthcue[bank][offset] = data; -// if( (offset&0xf)==0 ) logerror( "\n depthcue: " ); -// logerror( " %02x", data ); + //if ((offset & 0xf) == 0) logerror("\n depthcue: "); + //logerror(" %02x", data); } } |
