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authorGravatarGravatar hap <happppp@users.noreply.github.com>2020-07-14 09:44:40 +0200
committerGravatarGravatar hap <happppp@users.noreply.github.com>2020-07-14 09:44:40 +0200
commit36ae40b4aa741885c6df3b3e9ff2b13f0bb448b6 (patch)
tree7774e80817442e5e1b345986af2b0bfa64bfb595
parente04f490e4b0a7bc5ed9c212663facaf8195c96f4 (diff)
downloadmame-36ae40b4aa741885c6df3b3e9ff2b13f0bb448b6.tar.xz
mame-36ae40b4aa741885c6df3b3e9ff2b13f0bb448b6.zip
avr8: remove duplicate notes (they are in the cpp)
-rw-r--r--src/devices/cpu/avr8/avr8.cpp2
-rw-r--r--src/devices/cpu/avr8/avr8.h32
2 files changed, 1 insertions, 33 deletions
diff --git a/src/devices/cpu/avr8/avr8.cpp b/src/devices/cpu/avr8/avr8.cpp
index 013ac8db6f6..ab00d9bd804 100644
--- a/src/devices/cpu/avr8/avr8.cpp
+++ b/src/devices/cpu/avr8/avr8.cpp
@@ -6,7 +6,7 @@
- Notes -
Cycle counts are generally considered to be 100% accurate per-instruction, does not support mid-instruction
- interrupts although no software has been countered yet that requires it. Evidence of cycle accuracy is given
+ interrupts although no software has been encountered yet that requires it. Evidence of cycle accuracy is given
in the form of the demoscene 'wild' demo, Craft, by [lft], which uses an ATmega88 to write video out a 6-bit
RGB DAC pixel-by-pixel, synchronously with the frame timing. Intentionally modifying the timing of any of
the existing opcodes has been shown to wildly corrupt the video output in Craft, so one can assume that the
diff --git a/src/devices/cpu/avr8/avr8.h b/src/devices/cpu/avr8/avr8.h
index 374200513a6..8fde28f55d8 100644
--- a/src/devices/cpu/avr8/avr8.h
+++ b/src/devices/cpu/avr8/avr8.h
@@ -3,38 +3,6 @@
/*
Atmel 8-bit AVR simulator
- - Notes -
- Cycle counts are generally considered to be 100% accurate per-instruction, does not support mid-instruction
- interrupts although no software has been encountered yet that requires it. Evidence of cycle accuracy is given
- in the form of the demoscene 'wild' demo, Craft, by [lft], which uses an ATmega88 to write video out a 6-bit
- RGB DAC pixel-by-pixel, synchronously with the frame timing. Intentionally modifying the timing of any of
- the existing opcodes has been shown to wildly corrupt the video output in Craft, so one can assume that the
- existing timing is 100% correct.
-
- Unimplemented opcodes: SPM, SPM Z+, SLEEP, BREAK, WDR, EICALL, JMP, CALL
-
- - Changelist -
- 23 Dec. 2012 [Sandro Ronco]
- - Added CPSE, LD Z+, ST -Z/-Y/-X and ICALL opcodes
- - Fixed Z flag in CPC, SBC and SBCI opcodes
- - Fixed V and C flags in SBIW opcode
-
- 30 Oct. 2012
- - Added FMUL, FMULS, FMULSU opcodes [Ryan Holtz]
- - Fixed incorrect flag calculation in ROR opcode [Ryan Holtz]
- - Fixed incorrect bit testing in SBIC/SBIS opcodes [Ryan Holtz]
-
- 25 Oct. 2012
- - Added MULS, ANDI, STI Z+, LD -Z, LD -Y, LD -X, LD Y+q, LD Z+q, SWAP, ASR, ROR and SBIS opcodes [Ryan Holtz]
- - Corrected cycle counts for LD and ST opcodes [Ryan Holtz]
- - Moved opcycles init into inner while loop, fixes 2-cycle and 3-cycle opcodes effectively forcing
- all subsequent 1-cycle opcodes to be 2 or 3 cycles [Ryan Holtz]
- - Fixed register behavior in MULSU, LD -Z, and LD -Y opcodes [Ryan Holtz]
-
- 18 Oct. 2012
- - Added OR, SBCI, ORI, ST Y+, ADIQ opcodes [Ryan Holtz]
- - Fixed COM, NEG, LSR opcodes [Ryan Holtz]
-
*/
#ifndef MAME_CPU_AVR8_AVR8_H