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author MetalliC <0vetal0@gmail.com>2026-03-21 16:01:20 +0200
committer MetalliC <0vetal0@gmail.com>2026-03-21 16:01:53 +0200
commit2c7c8534b6cb0da6d146365515203cda0fa3de92 (patch)
tree94ba654b31ba1814741190c0bf06dce3c8e1e643
parentf35d749527426d1e18155232f0846e271eb26c63 (diff)
ymz770: add sample rate auto selection
-rw-r--r--src/devices/sound/ymz770.cpp12
1 files changed, 10 insertions, 2 deletions
diff --git a/src/devices/sound/ymz770.cpp b/src/devices/sound/ymz770.cpp
index 15756948c09..31f485c3d39 100644
--- a/src/devices/sound/ymz770.cpp
+++ b/src/devices/sound/ymz770.cpp
@@ -14,7 +14,7 @@ TODO:
both /SEL and /CS pins goes low - will be run SAC with number set at data bus.
It can not be used in CV1K (/SEL pin is NC, internally pulled to VCC), probably
not used in PGM2 too.
-- Configurable sample clock divider (currently hardcoded)
+- Configurable sample clock divider needs more research
770:
- Sequencer timers are implemented but seem unused, presumably because of design
flaws or bugs, likely due to lack of automatic adding of sequencer # to register
@@ -239,7 +239,7 @@ retry:
if (channel.is_playing)
{
// next block
- int sample_rate, channel_count;
+ int sample_rate = m_sclock, channel_count;
if (!channel.decoder->decode_buffer(channel.pptr, m_rom.bytes()*8, channel.output_data, channel.output_remaining, sample_rate, channel_count, channel.atbl) || channel.output_remaining == 0)
{
channel.is_playing = !channel.last_block; // detect infinite retry loop
@@ -248,6 +248,14 @@ retry:
goto retry;
}
+ // it's not clear how exactly clock divider selection works, so far we simply set sample rate as per AMM header,
+ // in theory may cause problems if samples will have it wrong or use several rates.
+ if (sample_rate != m_sclock)
+ {
+ m_sclock = sample_rate;
+ m_stream->set_sample_rate(m_sclock);
+ }
+
channel.last_block = channel.output_remaining < 1152;
channel.output_remaining--;
channel.output_ptr = 1;