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author Robbbert <Robbbert@users.noreply.github.com>2017-09-17 03:29:43 +1000
committer Robbbert <Robbbert@users.noreply.github.com>2017-09-17 03:29:43 +1000
commit2ab4642af4a13b937535795a3ac5b95a51a933af (patch)
treeddcea043a9b805884729ace9c0859a61e04332a8
parentf1294ab5903e6d3a655b0d55ace402328a17d8e2 (diff)
(nw) more uarts and cleanups
-rw-r--r--src/mame/drivers/dsb46.cpp77
-rw-r--r--src/mame/drivers/jade.cpp4
-rw-r--r--src/mame/drivers/systec.cpp67
-rw-r--r--src/mame/drivers/zsbc3.cpp64
4 files changed, 117 insertions, 95 deletions
diff --git a/src/mame/drivers/dsb46.cpp b/src/mame/drivers/dsb46.cpp
index 4b665f66fd9..7e40b29a3f1 100644
--- a/src/mame/drivers/dsb46.cpp
+++ b/src/mame/drivers/dsb46.cpp
@@ -6,6 +6,15 @@
2013-07-31 Connected to terminal [Robbbert]
2016-07-11 After 10 seconds the monitor program will start [Robbbert]
+Commands: (no spaces allowed)
+B - Boot the disk
+D - Dump memory to screen
+F - Fill Memory
+G - Go To
+H - Help
+P - Alter port values
+S - Alter memory
+
The photos show 3 boards:
- A scsi board (all 74-series TTL)
@@ -21,7 +30,11 @@ Both roms contain Z80 code.
#include "emu.h"
#include "cpu/z80/z80.h"
-#include "machine/terminal.h"
+#include "cpu/z80/z80daisy.h"
+#include "machine/z80ctc.h"
+#include "machine/z80sio.h"
+#include "machine/clock.h"
+#include "bus/rs232/rs232.h"
class dsb46_state : public driver_device
@@ -30,20 +43,17 @@ public:
dsb46_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
- , m_terminal(*this, "terminal")
- {
- }
+ , m_sio(*this, "sio")
+ { }
- DECLARE_READ8_MEMBER(port00_r);
- DECLARE_READ8_MEMBER(port01_r);
- void kbd_put(u8 data);
+ DECLARE_WRITE_LINE_MEMBER(clock_tick);
DECLARE_WRITE8_MEMBER(port1a_w);
DECLARE_DRIVER_INIT(dsb46);
DECLARE_MACHINE_RESET(dsb46);
+
private:
- uint8_t m_term_data;
required_device<cpu_device> m_maincpu;
- required_device<generic_terminal_device> m_terminal;
+ required_device<z80sio_device> m_sio;
};
static ADDRESS_MAP_START( dsb46_mem, AS_PROGRAM, 8, dsb46_state )
@@ -54,13 +64,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dsb46_io, AS_IO, 8, dsb46_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x00, 0x00) AM_READ(port00_r) AM_DEVWRITE("terminal", generic_terminal_device, write)
- AM_RANGE(0x01, 0x01) AM_READ(port01_r)
+ AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("sio", z80sio_device, ba_cd_r, ba_cd_w)
+ AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE("ctc1", z80ctc_device, read, write)
AM_RANGE(0x1a, 0x1a) AM_WRITE(port1a_w)
- //AM_RANGE(0x00, 0x01) uartch1
- //AM_RANGE(0x02, 0x03) uartch2
- //AM_RANGE(0x08, 0x08) ??
- //AM_RANGE(0x0a, 0x0b) ??
//AM_RANGE(0x10, 0x10) disk related
//AM_RANGE(0x14, 0x14) ??
//AM_RANGE(0x18, 0x18) ??
@@ -83,7 +89,6 @@ MACHINE_RESET_MEMBER( dsb46_state,dsb46 )
{
membank("read")->set_entry(0);
membank("write")->set_entry(0);
- m_term_data = 0;
m_maincpu->reset();
}
@@ -92,33 +97,47 @@ WRITE8_MEMBER( dsb46_state::port1a_w )
membank("read")->set_entry(data & 1);
}
-READ8_MEMBER( dsb46_state::port01_r )
+// source of baud frequency is unknown, so we invent a clock
+WRITE_LINE_MEMBER( dsb46_state::clock_tick )
{
- return (m_term_data) ? 5 : 4;
+ m_sio->txca_w(state);
+ m_sio->rxca_w(state);
}
-READ8_MEMBER( dsb46_state::port00_r )
+static const z80_daisy_config daisy_chain[] =
{
- uint8_t ret = m_term_data;
- m_term_data = 0;
- return ret;
-}
+ { "ctc1" },
+ { "sio" },
+ { nullptr }
+};
-void dsb46_state::kbd_put(u8 data)
-{
- m_term_data = data;
-}
static MACHINE_CONFIG_START( dsb46 )
// basic machine hardware
MCFG_CPU_ADD("maincpu", Z80, 4000000)
MCFG_CPU_PROGRAM_MAP(dsb46_mem)
MCFG_CPU_IO_MAP(dsb46_io)
+ MCFG_Z80_DAISY_CHAIN(daisy_chain)
+
MCFG_MACHINE_RESET_OVERRIDE(dsb46_state, dsb46)
/* video hardware */
- MCFG_DEVICE_ADD("terminal", GENERIC_TERMINAL, 0)
- MCFG_GENERIC_TERMINAL_KEYBOARD_CB(PUT(dsb46_state, kbd_put))
+ MCFG_DEVICE_ADD("uart_clock", CLOCK, 153600)
+ MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(dsb46_state, clock_tick))
+
+ /* Devices */
+ MCFG_Z80SIO_ADD("sio", XTAL_4MHz, 0, 0, 0, 0)
+ MCFG_Z80SIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
+ MCFG_Z80SIO_OUT_TXDA_CB(DEVWRITELINE("rs232", rs232_port_device, write_txd))
+ MCFG_Z80SIO_OUT_DTRA_CB(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
+ MCFG_Z80SIO_OUT_RTSA_CB(DEVWRITELINE("rs232", rs232_port_device, write_rts))
+
+ MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
+ MCFG_RS232_RXD_HANDLER(DEVWRITELINE("sio", z80sio_device, rxa_w))
+ MCFG_RS232_CTS_HANDLER(DEVWRITELINE("sio", z80sio_device, ctsa_w))
+
+ MCFG_DEVICE_ADD("ctc1", Z80CTC, XTAL_4MHz)
+ MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MACHINE_CONFIG_END
ROM_START( dsb46 )
diff --git a/src/mame/drivers/jade.cpp b/src/mame/drivers/jade.cpp
index e59d2e2ffa4..73dbe093cff 100644
--- a/src/mame/drivers/jade.cpp
+++ b/src/mame/drivers/jade.cpp
@@ -73,12 +73,12 @@ static MACHINE_CONFIG_START( jade )
MCFG_CPU_PROGRAM_MAP(jade_mem)
MCFG_CPU_IO_MAP(jade_io)
- MCFG_DEVICE_ADD("siot_clock", CLOCK, 153600)
+ MCFG_DEVICE_ADD("uart_clock", CLOCK, 153600)
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(jade_state, clock_tick))
/* Devices */
MCFG_Z80SIO_ADD("sio", XTAL_4MHz, 0, 0, 0, 0)
- //MCFG_Z80SIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0)) // interrupts not programmed by default
+ //MCFG_Z80SIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0)) // no evidence of a daisy chain because IM2 is not set
MCFG_Z80SIO_OUT_TXDA_CB(DEVWRITELINE("rs232", rs232_port_device, write_txd))
MCFG_Z80SIO_OUT_DTRA_CB(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
MCFG_Z80SIO_OUT_RTSA_CB(DEVWRITELINE("rs232", rs232_port_device, write_rts))
diff --git a/src/mame/drivers/systec.cpp b/src/mame/drivers/systec.cpp
index ce953e3c230..5cf5599b301 100644
--- a/src/mame/drivers/systec.cpp
+++ b/src/mame/drivers/systec.cpp
@@ -35,46 +35,28 @@
#include "emu.h"
#include "cpu/z80/z80.h"
-#include "machine/terminal.h"
+#include "machine/z80sio.h"
+#include "machine/clock.h"
+#include "bus/rs232/rs232.h"
-#define TERMINAL_TAG "terminal"
class systec_state : public driver_device
{
public:
systec_state(const machine_config &mconfig, device_type type, const char *tag)
- : driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu"),
- m_terminal(*this, TERMINAL_TAG)
- {
- }
+ : driver_device(mconfig, type, tag)
+ , m_maincpu(*this, "maincpu")
+ , m_sio(*this, "sio")
+ { }
+ DECLARE_WRITE_LINE_MEMBER(clock_tick);
+
+private:
required_device<cpu_device> m_maincpu;
- required_device<generic_terminal_device> m_terminal;
- DECLARE_READ8_MEMBER(systec_c4_r);
- DECLARE_READ8_MEMBER(systec_c6_r);
- void kbd_put(u8 data);
- uint8_t m_term_data;
+ required_device<z80sio_device> m_sio;
virtual void machine_reset() override;
};
-READ8_MEMBER( systec_state::systec_c4_r )
-{
- uint8_t ret = m_term_data;
- m_term_data = 0;
- return ret;
-}
-
-READ8_MEMBER( systec_state::systec_c6_r )
-{
- return 0x04 | (m_term_data ? 1 : 0);
-}
-
-void systec_state::kbd_put(u8 data)
-{
- m_term_data = data;
-}
-
static ADDRESS_MAP_START(systec_mem, AS_PROGRAM, 8, systec_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0xffff) AM_RAM AM_REGION("maincpu", 0)
@@ -82,8 +64,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(systec_io, AS_IO, 8, systec_state)
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0xc4, 0xc4) AM_READ(systec_c4_r) AM_DEVWRITE(TERMINAL_TAG, generic_terminal_device, write)
- AM_RANGE(0xc6, 0xc6) AM_READ(systec_c6_r)
+ AM_RANGE(0x68, 0x6b) // fdc?
+ AM_RANGE(0x6c, 0x6c) // motor control?
+ AM_RANGE(0xc4, 0xc7) AM_DEVREADWRITE("sio", z80sio_device, cd_ba_r, cd_ba_w)
ADDRESS_MAP_END
/* Input ports */
@@ -97,16 +80,32 @@ void systec_state::machine_reset()
memcpy(m_p_maincpu, m_p_roms, 0x2000);
}
+// source of baud frequency is unknown, so we invent a clock
+WRITE_LINE_MEMBER( systec_state::clock_tick )
+{
+ m_sio->txca_w(state);
+ m_sio->rxca_w(state);
+}
+
static MACHINE_CONFIG_START( systec )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", Z80, XTAL_16MHz / 4)
MCFG_CPU_PROGRAM_MAP(systec_mem)
MCFG_CPU_IO_MAP(systec_io)
+ MCFG_DEVICE_ADD("uart_clock", CLOCK, 153600)
+ MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(systec_state, clock_tick))
+
+ /* Devices */
+ MCFG_Z80SIO_ADD("sio", XTAL_4MHz, 0, 0, 0, 0)
+ //MCFG_Z80SIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0)) // no evidence of a daisy chain because IM2 is not set
+ MCFG_Z80SIO_OUT_TXDA_CB(DEVWRITELINE("rs232", rs232_port_device, write_txd))
+ MCFG_Z80SIO_OUT_DTRA_CB(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
+ MCFG_Z80SIO_OUT_RTSA_CB(DEVWRITELINE("rs232", rs232_port_device, write_rts))
- /* video hardware */
- MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
- MCFG_GENERIC_TERMINAL_KEYBOARD_CB(PUT(systec_state, kbd_put))
+ MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
+ MCFG_RS232_RXD_HANDLER(DEVWRITELINE("sio", z80sio_device, rxa_w))
+ MCFG_RS232_CTS_HANDLER(DEVWRITELINE("sio", z80sio_device, ctsa_w))
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/zsbc3.cpp b/src/mame/drivers/zsbc3.cpp
index 4f2ad18238b..3060d52c07e 100644
--- a/src/mame/drivers/zsbc3.cpp
+++ b/src/mame/drivers/zsbc3.cpp
@@ -36,44 +36,30 @@
#include "emu.h"
#include "cpu/z80/z80.h"
-#include "machine/terminal.h"
+#include "machine/z80sio.h"
+#include "machine/z80pio.h"
+#include "machine/clock.h"
+#include "bus/rs232/rs232.h"
-#define TERMINAL_TAG "terminal"
class zsbc3_state : public driver_device
{
public:
zsbc3_state(const machine_config &mconfig, device_type type, const char *tag)
- : driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu"),
- m_terminal(*this, TERMINAL_TAG)
- {
- }
+ : driver_device(mconfig, type, tag)
+ , m_maincpu(*this, "maincpu")
+ , m_sio(*this, "sio")
+ { }
- DECLARE_READ8_MEMBER(zsbc3_28_r);
- DECLARE_READ8_MEMBER(zsbc3_2a_r);
- void kbd_put(u8 data);
+ DECLARE_WRITE_LINE_MEMBER(clock_tick);
private:
- uint8_t m_term_data;
virtual void machine_reset() override;
required_device<cpu_device> m_maincpu;
- required_device<generic_terminal_device> m_terminal;
+ required_device<z80sio_device> m_sio;
};
-READ8_MEMBER( zsbc3_state::zsbc3_28_r )
-{
- uint8_t ret = m_term_data;
- m_term_data = 0;
- return ret;
-}
-
-READ8_MEMBER( zsbc3_state::zsbc3_2a_r )
-{
- return (m_term_data) ? 5 : 4;
-}
-
static ADDRESS_MAP_START(zsbc3_mem, AS_PROGRAM, 8, zsbc3_state)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE( 0x0000, 0x07ff ) AM_ROM
@@ -83,8 +69,10 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(zsbc3_io, AS_IO, 8, zsbc3_state)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x28, 0x28) AM_READ(zsbc3_28_r) AM_DEVWRITE(TERMINAL_TAG, generic_terminal_device, write)
- AM_RANGE(0x2a, 0x2a) AM_READ(zsbc3_2a_r)
+ AM_RANGE(0x08, 0x0b) //AM_DEVREADWRITE("pio", z80pio_device, read, write) // the control bytes appear to be for a PIO
+ AM_RANGE(0x28, 0x2b) AM_DEVREADWRITE("sio", z80sio_device, cd_ba_r, cd_ba_w)
+ AM_RANGE(0x30, 0x30) // unknown device, init bytes = 45, 0D
+ AM_RANGE(0x38, 0x38) // unknown device, init byte = C3
ADDRESS_MAP_END
/* Input ports */
@@ -96,9 +84,11 @@ void zsbc3_state::machine_reset()
{
}
-void zsbc3_state::kbd_put(u8 data)
+// source of baud frequency is unknown, so we invent a clock
+WRITE_LINE_MEMBER( zsbc3_state::clock_tick )
{
- m_term_data = data;
+ m_sio->txca_w(state);
+ m_sio->rxca_w(state);
}
@@ -109,8 +99,22 @@ static MACHINE_CONFIG_START( zsbc3 )
MCFG_CPU_IO_MAP(zsbc3_io)
/* video hardware */
- MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
- MCFG_GENERIC_TERMINAL_KEYBOARD_CB(PUT(zsbc3_state, kbd_put))
+ MCFG_DEVICE_ADD("uart_clock", CLOCK, 153600)
+ MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(zsbc3_state, clock_tick))
+
+ /* Devices */
+ MCFG_Z80SIO_ADD("sio", XTAL_16MHz / 4, 0, 0, 0, 0)
+ //MCFG_Z80SIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0)) // no evidence of a daisy chain because IM2 is not set
+ MCFG_Z80SIO_OUT_TXDA_CB(DEVWRITELINE("rs232", rs232_port_device, write_txd))
+ MCFG_Z80SIO_OUT_DTRA_CB(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
+ MCFG_Z80SIO_OUT_RTSA_CB(DEVWRITELINE("rs232", rs232_port_device, write_rts))
+
+ MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
+ MCFG_RS232_RXD_HANDLER(DEVWRITELINE("sio", z80sio_device, rxa_w))
+ MCFG_RS232_CTS_HANDLER(DEVWRITELINE("sio", z80sio_device, ctsa_w))
+
+ MCFG_DEVICE_ADD("pio", Z80PIO, XTAL_16MHz / 4)
+ //MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MACHINE_CONFIG_END
/* ROM definition */