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author AJR <ajrhacker@users.noreply.github.com>2018-06-13 14:53:36 -0400
committer AJR <ajrhacker@users.noreply.github.com>2018-06-13 14:56:22 -0400
commit1f1c60cbe86e5585e0fb1924ff459715715fe033 (patch)
tree484fd23ff3f67cf72b15b856222a8f6fe03e14bb
parenta69902b46055356300b31d78277ad689995b33ff (diff)
mcs51.cpp: Consolidate internal address maps; remove P0 from ROMless versions since it conflicts with external accesses on hardware (nw)
-rw-r--r--src/devices/cpu/mcs51/mcs51.cpp30
-rw-r--r--src/devices/cpu/mcs51/mcs51.h7
2 files changed, 13 insertions, 24 deletions
diff --git a/src/devices/cpu/mcs51/mcs51.cpp b/src/devices/cpu/mcs51/mcs51.cpp
index 25bc28dda2d..6ac3ca48e5d 100644
--- a/src/devices/cpu/mcs51/mcs51.cpp
+++ b/src/devices/cpu/mcs51/mcs51.cpp
@@ -242,25 +242,15 @@ DEFINE_DEVICE_TYPE(DS5002FP, ds5002fp_device, "ds5002fp", "Dallas DS5002FP")
ADDRESS MAPS
***************************************************************************/
-void mcs51_cpu_device::program_12bit(address_map &map)
+void mcs51_cpu_device::program_internal(address_map &map)
{
- map(0x00, 0x0fff).rom();
+ if (m_rom_size > 0)
+ map(0, m_rom_size - 1).rom().region(DEVICE_SELF, 0);
}
-void mcs51_cpu_device::program_13bit(address_map &map)
+void mcs51_cpu_device::data_internal(address_map &map)
{
- map(0x00, 0x1fff).rom();
-}
-
-void mcs51_cpu_device::data_7bit(address_map &map)
-{
- map(0x0000, 0x007f).ram().share("scratchpad");
- map(0x0100, 0x01ff).ram().share("sfr_ram"); /* SFR */
-}
-
-void mcs51_cpu_device::data_8bit(address_map &map)
-{
- map(0x0000, 0x00ff).ram().share("scratchpad");
+ map(0x0000, m_ram_mask).ram().share("scratchpad");
map(0x0100, 0x01ff).ram().share("sfr_ram"); /* SFR */
}
@@ -268,13 +258,12 @@ void mcs51_cpu_device::data_8bit(address_map &map)
mcs51_cpu_device::mcs51_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width, uint8_t features)
: cpu_device(mconfig, type, tag, owner, clock)
- , m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0,
- (program_width == 12) ? address_map_constructor(FUNC(mcs51_cpu_device::program_12bit), this) : (program_width == 13) ? address_map_constructor(FUNC(mcs51_cpu_device::program_13bit), this) : address_map_constructor())
- , m_data_config("data", ENDIANNESS_LITTLE, 8, 9, 0,
- (data_width == 7) ? address_map_constructor(FUNC(mcs51_cpu_device::data_7bit), this) : (data_width == 8) ? address_map_constructor(FUNC(mcs51_cpu_device::data_8bit), this) : address_map_constructor())
+ , m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0, address_map_constructor(FUNC(mcs51_cpu_device::program_internal), this))
+ , m_data_config("data", ENDIANNESS_LITTLE, 8, 9, 0, address_map_constructor(FUNC(mcs51_cpu_device::data_internal), this))
, m_io_config("io", ENDIANNESS_LITTLE, 8, (features & FEATURE_DS5002FP) ? 17 : 16, 0)
, m_pc(0)
, m_features(features)
+ , m_rom_size(program_width > 0 ? 1 << program_width : 0)
, m_ram_mask( (data_width == 8) ? 0xFF : 0x7F )
, m_num_interrupts(5)
, m_sfr_ram(*this, "sfr_ram")
@@ -2149,7 +2138,8 @@ void mcs51_cpu_device::device_start()
state_add( MCS51_DPL, "DPL", DPL).noshow();
state_add( MCS51_IE, "IE", IE).formatstr("%02X");
state_add( MCS51_IP, "IP", IP).formatstr("%02X");
- state_add<uint8_t>( MCS51_P0, "P0", [this](){ return P0; }, [this](uint8_t p){ SET_P0(p); }).formatstr("%02X");
+ if (m_rom_size > 0)
+ state_add<uint8_t>( MCS51_P0, "P0", [this](){ return P0; }, [this](uint8_t p){ SET_P0(p); }).formatstr("%02X");
state_add<uint8_t>( MCS51_P1, "P1", [this](){ return P1; }, [this](uint8_t p){ SET_P1(p); }).formatstr("%02X");
state_add<uint8_t>( MCS51_P2, "P2", [this](){ return P2; }, [this](uint8_t p){ SET_P2(p); }).formatstr("%02X");
state_add<uint8_t>( MCS51_P3, "P3", [this](){ return P3; }, [this](uint8_t p){ SET_P3(p); }).formatstr("%02X");
diff --git a/src/devices/cpu/mcs51/mcs51.h b/src/devices/cpu/mcs51/mcs51.h
index 1001d355bc1..a0fa68d02f9 100644
--- a/src/devices/cpu/mcs51/mcs51.h
+++ b/src/devices/cpu/mcs51/mcs51.h
@@ -101,10 +101,8 @@ public:
template<class Object> devcb_base &set_serial_rx_cb(Object &&cb) { return m_serial_rx_cb.set_callback(std::forward<Object>(cb)); }
template<class Object> devcb_base &set_serial_tx_cb(Object &&cb) { return m_serial_tx_cb.set_callback(std::forward<Object>(cb)); }
- void data_7bit(address_map &map);
- void data_8bit(address_map &map);
- void program_12bit(address_map &map);
- void program_13bit(address_map &map);
+ void program_internal(address_map &map);
+ void data_internal(address_map &map);
protected:
// construction/destruction
mcs51_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width, uint8_t features = 0);
@@ -143,6 +141,7 @@ protected:
uint8_t m_rwm; //Signals that the current instruction is a read/write/modify instruction
int m_inst_cycles; /* cycles for the current instruction */
+ const uint32_t m_rom_size; /* size (in bytes) of internal program ROM/EPROM */
int m_ram_mask; /* second ram bank for indirect access available ? */
int m_num_interrupts; /* number of interrupts supported */
int m_recalc_parity; /* recalculate parity before next instruction */