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authorGravatarGravatar Olivier Galibert <galibert@pobox.com>2018-03-18 09:26:45 +0100
committerGravatarGravatar Olivier Galibert <galibert@pobox.com>2018-04-05 15:01:26 +0200
commit1d338061af66eed2cbf3e19655bb840f4e801c9c (patch) (github)
treeb5968d5bf972f7aa7fd7b3daa1e1ca90cb24c5c5
parent7bc00fc17ef961494e276060aed3b5333e4ce993 (diff)
downloadmame-1d338061af66eed2cbf3e19655bb840f4e801c9c.tar.bz2
mame-1d338061af66eed2cbf3e19655bb840f4e801c9c.zip
mb86233/4 rewrite [O. Galibert]
model1: Use the real 315-5573 Virtua Racing coprocessor program [Team Caps0ff] model2: Rewamp the coprocessors communications [O. Galibert]
-rw-r--r--scripts/src/machine.lua12
-rw-r--r--scripts/target/mame/arcade.lua1
-rw-r--r--scripts/target/mame/mess.lua1
-rw-r--r--src/devices/cpu/mb86233/mb86233.cpp2356
-rw-r--r--src/devices/cpu/mb86233/mb86233.h206
-rw-r--r--src/devices/cpu/mb86233/mb86233d.cpp168
-rw-r--r--src/devices/cpu/mb86233/mb86233d.h2
-rw-r--r--src/devices/cpu/mb86235/mb86235.cpp55
-rw-r--r--src/devices/cpu/mb86235/mb86235.h61
-rw-r--r--src/devices/cpu/mb86235/mb86235drc.cpp192
-rw-r--r--src/devices/cpu/mb86235/mb86235ops.cpp58
-rw-r--r--src/devices/machine/gen_fifo.cpp201
-rw-r--r--src/devices/machine/gen_fifo.h222
-rw-r--r--src/mame/drivers/model1.cpp249
-rw-r--r--src/mame/drivers/model2.cpp1173
-rw-r--r--src/mame/includes/model1.h130
-rw-r--r--src/mame/includes/model2.h291
-rw-r--r--src/mame/machine/model1.cpp1032
18 files changed, 3077 insertions, 3333 deletions
diff --git a/scripts/src/machine.lua b/scripts/src/machine.lua
index 120c158a560..8d7fd3d2739 100644
--- a/scripts/src/machine.lua
+++ b/scripts/src/machine.lua
@@ -3445,3 +3445,15 @@ if (MACHINES["28FXXX"]~=null) then
MAME_DIR .. "src/devices/machine/28fxxx.h",
}
end
+
+---------------------------------------------------
+--
+--@src/devices/machine/gen_fifo.h,MACHINES["GEN_FIFO"] = true
+---------------------------------------------------
+
+if (MACHINES["GEN_FIFO"]~=null) then
+ files {
+ MAME_DIR .. "src/devices/machine/gen_fifo.cpp",
+ MAME_DIR .. "src/devices/machine/gen_fifo.h",
+ }
+end
diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua
index 44f7d00c977..066b6d680fa 100644
--- a/scripts/target/mame/arcade.lua
+++ b/scripts/target/mame/arcade.lua
@@ -619,6 +619,7 @@ MACHINES["WATCHDOG"] = true
MACHINES["INPUT_MERGER"] = true
MACHINES["K054321"] = true
MACHINES["ADC0844"] = true
+MACHINES["GEN_FIFO"] = true
--------------------------------------------------
-- specify available bus cores
diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua
index 96d9412bf5b..7bcff927ace 100644
--- a/scripts/target/mame/mess.lua
+++ b/scripts/target/mame/mess.lua
@@ -628,6 +628,7 @@ MACHINES["INPUT_MERGER"] = true
-- MACHINES["K054321"] = true
MACHINES["ADC0844"] = true
MACHINES["28FXXX"] = true
+-- MACHINES["GEN_FIFO"] = true
--------------------------------------------------
-- specify available bus cores
diff --git a/src/devices/cpu/mb86233/mb86233.cpp b/src/devices/cpu/mb86233/mb86233.cpp
index 68cf6a8fe6f..7244e0d5d04 100644
--- a/src/devices/cpu/mb86233/mb86233.cpp
+++ b/src/devices/cpu/mb86233/mb86233.cpp
@@ -1,1666 +1,1200 @@
// license:BSD-3-Clause
-// copyright-holders:Ernesto Corvi
-/***************************************************************************
-
- mb86233.c
- Core implementation for the portable Fujitsu MB86233 series DSP emulator.
-
- Written by ElSemi
- MAME version by Ernesto Corvi
-
- TODO:
- - Properly emulate the TGP Tables from the ROM (See GETEXTERNAL)
- - Many unknown opcodes and addressing modes
- - Interrupts?
-
-***************************************************************************/
+// copyright-holders:Olivier Galibert
#include "emu.h"
#include "debugger.h"
#include "mb86233.h"
#include "mb86233d.h"
+/*
+ Driver based on the initial reverse-engineering of Elsemi, extended,
+ generalized and made to look more like a cpu since then thanks in
+ part to a "manual" that barely deserves the name.
+
+ The 86232 has 512 32-bits dwords of triple-port memory (1 write, 2
+ read). The 86233/86234 have instead two normal (1 read, 1 write,
+ non-simultaneous) independant ram banks, one of 256 dwords and one
+ of 512.
+
+ The ram banks are mapped at 0x000-0x0ff and 0x200-0x3ff (proven by
+ geometrizer code that clears the ram at startup). Move and load
+ instructions kind of target a specific ram, but do it by adding
+ 0x200 to the address on one side of the other, which can then end up
+ anywhere. In particular model1 coprocessor has the output fifo at
+ 0x400, which is sometimes hit by having x1 at 0x200 and using the
+ automatic 0x200 adder. Theorically external accesses to 100-1ff and
+ 400+ seem to be routed externally, since they're used for the fifo
+ in model 1.
+
+ The cpu can theorically work in either floating point (32-bits ieee
+ flots) or fixed point (32/36/48 bits registers) modes. All sega
+ programs start by activating floating point and staying there, so
+ fixed point is not implemented.
+
+ An interrupt is used to update the rf0 (status? leds?) registers in
+ the coprocessor programs. It's on bit 1 of the mask (irq3?) and
+ vector 0x004. It's probably periodic, maybe on vblank. Note that
+ the copro programs never initialize the stack pointer. Interrupts
+ are not implemented at this point.
+
+ The 86233 and 86234 dies are slightly different in the die shots,
+ but there's no known programming-level difference at this point.
+ It's unclear whether some register-file linked functionality is
+ internal or external though (fifos, banking in model2/86234), so
+ there may lie the actual differences.
+*/
+
+
+DEFINE_DEVICE_TYPE(MB86233, mb86233_device, "mb86233", "Fujitsu MB86233 (TGP)")
+DEFINE_DEVICE_TYPE(MB86234, mb86234_device, "mb86234", "Fujitsu MB86234 (TGP)")
+
+
+mb86233_device::mb86233_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+ : cpu_device(mconfig, type, tag, owner, clock)
+ , m_program_config("program", ENDIANNESS_LITTLE, 32, 16, -2)
+ , m_data_config("data", ENDIANNESS_LITTLE, 32, 16, -2)
+ , m_io_config("io", ENDIANNESS_LITTLE, 32, 16, -2)
+ , m_rf_config("rf", ENDIANNESS_LITTLE, 32, 4, -2)
+{
+}
-DEFINE_DEVICE_TYPE(MB86233, mb86233_cpu_device, "mb86233", "Fujitsu MB86233 \"TGP\"")
-
+mb86233_device::mb86233_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mb86233_device(mconfig, MB86233, tag, owner, clock)
+{
+}
-mb86233_cpu_device::mb86233_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : cpu_device(mconfig, MB86233, tag, owner, clock)
- , m_program_config("program", ENDIANNESS_LITTLE, 32, 32, -2)
- , m_data_config("data", ENDIANNESS_LITTLE, 32, 32, 0)
- , m_pc(0), m_reps(0), m_pcsp(0), m_eb(0), m_shift(0), m_repcnt(0), m_sr(0)
- , m_fpucontrol(0), m_program(nullptr), m_direct(nullptr), m_icount(0), m_fifo_wait(0)
- , m_fifo_read_cb(*this)
- , m_fifo_read_ok_cb(*this)
- , m_fifo_write_cb(*this)
- , m_tablergn(nullptr), m_ARAM(nullptr), m_BRAM(nullptr)
- , m_Tables(nullptr)
+mb86234_device::mb86234_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mb86233_device(mconfig, MB86234, tag, owner, clock)
{
}
-device_memory_interface::space_config_vector mb86233_cpu_device::memory_space_config() const
+device_memory_interface::space_config_vector mb86233_device::memory_space_config() const
{
return space_config_vector {
- std::make_pair(AS_PROGRAM, &m_program_config),
- std::make_pair(AS_DATA, &m_data_config)
+ std::make_pair(AS_PROGRAM, &m_program_config),
+ std::make_pair(AS_DATA, &m_data_config),
+ std::make_pair(AS_IO, &m_io_config),
+ std::make_pair(AS_RF, &m_rf_config)
};
}
-std::unique_ptr<util::disasm_interface> mb86233_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> mb86233_device::create_disassembler()
{
return std::make_unique<mb86233_disassembler>();
}
-/***************************************************************************
- MACROS
-***************************************************************************/
-
-#define ZERO_FLAG (1 << 0)
-#define SIGN_FLAG (1 << 1)
-#define EXTERNAL_FLAG (1 << 2) //This seems to be a flag coming from some external circuit??
-
-#define GETPC() m_pc
-#define GETA() m_a
-#define GETB() m_b
-#define GETD() m_d
-#define GETP() m_p
-#define GETSR() m_sr
-#define GETGPR(a) m_gpr[a]
-#define GETSHIFT() m_shift
-#define GETPCS() m_pcs
-#define GETPCSP() m_pcsp
-#define GETEB() m_eb
-#define GETREPS() m_reps
-#define GETEXTPORT() m_extport
-#define GETFIFOWAIT() m_fifo_wait
-#define GETARAM() m_ARAM
-#define GETBRAM() m_BRAM
-#define GETREPCNT() m_repcnt
-
-#define ROPCODE(a) m_direct->read_dword(a)
-#define RDMEM(a) m_program->read_dword(a)
-#define WRMEM(a,v) m_program->write_dword((a), v)
-
-/***************************************************************************
- Initialization and Shutdown
-***************************************************************************/
-
-void mb86233_cpu_device::device_start()
-{
- m_pc = 0;
- m_a.u = 0;
- m_b.u = 0;
- m_d.u = 0;
- m_p.u = 0;
- m_reps = 0;
- m_pcs[0] = m_pcs[1] = m_pcs[2] = m_pcs[3] = 0;
- m_pcsp = 0;
- m_eb = 0;
- m_shift = 0;
- m_repcnt = 0;
- m_sr = 0;
- memset(m_gpr, 0, sizeof(m_gpr));
- memset(m_extport, 0, sizeof(m_extport));
- m_fifo_wait = 0;
-
- m_fifo_read_cb.resolve_safe(0);
- m_fifo_read_ok_cb.resolve_safe(0);
- m_fifo_write_cb.resolve_safe();
+void mb86233_device::device_start()
+{
m_program = &space(AS_PROGRAM);
- m_direct = m_program->direct<-2>();
-
- if ( m_tablergn )
- {
- m_Tables = (uint32_t*) machine().root_device().memregion(m_tablergn)->base();
- }
-
- memset( m_RAM, 0, 2 * 0x200 * sizeof(uint32_t) );
- m_ARAM = &m_RAM[0];
- m_BRAM = &m_RAM[0x200];
-
+ m_direct = m_program->direct<-2>();
+
+ m_data = &space(AS_DATA);
+ m_io = &space(AS_IO);
+ m_rf = &space(AS_RF);
+
+ state_add(STATE_GENPC, "GENPC", m_pc);
+ state_add(STATE_GENPCBASE, "PC", m_ppc).noshow();
+ state_add(STATE_GENSP, "SP", m_sp);
+ state_add(STATE_GENFLAGS, "ST", m_st);
+
+ state_add(REG_A, "A", m_a);
+ state_add(REG_B, "B", m_b);
+ state_add(REG_D, "D", m_d);
+ state_add(REG_P, "P", m_p);
+ state_add(REG_R, "R", m_r);
+ state_add(REG_R, "RPC", m_rpc);
+ state_add(REG_C0, "C0", m_c0);
+ state_add(REG_C1, "C1", m_c1);
+ state_add(REG_B0, "B0", m_b0);
+ state_add(REG_B1, "B1", m_b1);
+ state_add(REG_X0, "X0", m_x0);
+ state_add(REG_X1, "X1", m_x1);
+ state_add(REG_I0, "I0", m_i0);
+ state_add(REG_I1, "I1", m_i1);
+ state_add(REG_SFT, "SFT", m_sft);
+ state_add(REG_VSM, "VSM", m_vsm);
+ state_add(REG_PCS0, "PCS0", m_pcs[0]);
+ state_add(REG_PCS1, "PCS1", m_pcs[1]);
+ state_add(REG_PCS2, "PCS2", m_pcs[2]);
+ state_add(REG_PCS3, "PCS3", m_pcs[3]);
+ state_add(REG_MASK, "MASK", m_mask);
+ state_add(REG_M, "M", m_m);
+
+ save_item(NAME(m_ppc));
save_item(NAME(m_pc));
- save_item(NAME(m_a.u));
- save_item(NAME(m_b.u));
- save_item(NAME(m_d.u));
- save_item(NAME(m_p.u));
- save_item(NAME(m_reps));
+ save_item(NAME(m_st));
+ save_item(NAME(m_sp));
+ save_item(NAME(m_a));
+ save_item(NAME(m_b));
+ save_item(NAME(m_d));
+ save_item(NAME(m_p));
+ save_item(NAME(m_r));
+ save_item(NAME(m_rpc));
+ save_item(NAME(m_c0));
+ save_item(NAME(m_c1));
+ save_item(NAME(m_b0));
+ save_item(NAME(m_b1));
+ save_item(NAME(m_x0));
+ save_item(NAME(m_x1));
+ save_item(NAME(m_i0));
+ save_item(NAME(m_i1));
+ save_item(NAME(m_sft));
+ save_item(NAME(m_vsm));
+ save_item(NAME(m_vsmr));
save_item(NAME(m_pcs));
- save_item(NAME(m_pcsp));
- save_item(NAME(m_eb));
- save_item(NAME(m_shift));
- save_item(NAME(m_repcnt));
- save_item(NAME(m_sr));
- save_item(NAME(m_gpr));
- save_item(NAME(m_extport));
- save_item(NAME(m_RAM));
-
- state_add( MB86233_PC, "PC", m_pc).formatstr("%04X");
- state_add( MB86233_A, "PA", m_a.u).formatstr("%08X");
- state_add( MB86233_B, "PB", m_b.u).formatstr("%08X");
- state_add( MB86233_P, "PP", m_p.u).formatstr("%08X");
- state_add( MB86233_D, "PD", m_d.u).formatstr("%08X");
- state_add( MB86233_REP, "REPS", m_reps).formatstr("%08X");
- state_add( MB86233_SP, "PCSP", m_pcsp).mask(0xf).formatstr("%01X");
- state_add( MB86233_EB, "EB", m_eb).formatstr("%08X");
- state_add( MB86233_SHIFT, "SHIFT", m_shift).formatstr("%08X");
- state_add( MB86233_R0, "R0", m_gpr[0]).formatstr("%08X");
- state_add( MB86233_R1, "R1", m_gpr[1]).formatstr("%08X");
- state_add( MB86233_R2, "R2", m_gpr[2]).formatstr("%08X");
- state_add( MB86233_R3, "R3", m_gpr[3]).formatstr("%08X");
- state_add( MB86233_R4, "R4", m_gpr[4]).formatstr("%08X");
- state_add( MB86233_R5, "R5", m_gpr[5]).formatstr("%08X");
- state_add( MB86233_R6, "R6", m_gpr[6]).formatstr("%08X");
- state_add( MB86233_R7, "R7", m_gpr[7]).formatstr("%08X");
- state_add( MB86233_R8, "R8", m_gpr[8]).formatstr("%08X");
- state_add( MB86233_R9, "R9", m_gpr[9]).formatstr("%08X");
- state_add( MB86233_R10, "R10", m_gpr[10]).formatstr("%08X");
- state_add( MB86233_R11, "R11", m_gpr[11]).formatstr("%08X");
- state_add( MB86233_R12, "R12", m_gpr[12]).formatstr("%08X");
- state_add( MB86233_R13, "R13", m_gpr[13]).formatstr("%08X");
- state_add( MB86233_R14, "R14", m_gpr[14]).formatstr("%08X");
- state_add( MB86233_R15, "R15", m_gpr[15]).formatstr("%08X");
-
- state_add( STATE_GENPC, "GENPC", m_pc).noshow();
- state_add( STATE_GENPCBASE, "CURPC", m_pc).noshow();
- state_add( STATE_GENFLAGS, "GENFLAGS", m_sr).formatstr("%2s").noshow();
+ save_item(NAME(m_mask));
+ save_item(NAME(m_m));
+ save_item(NAME(m_gpio0));
+ save_item(NAME(m_gpio1));
+ save_item(NAME(m_gpio2));
+ save_item(NAME(m_gpio3));
+
+ save_item(NAME(m_alu_stmask));
+ save_item(NAME(m_alu_stset));
+ save_item(NAME(m_alu_r1));
+ save_item(NAME(m_alu_r2));
+
+ m_gpio0 = m_gpio1 = m_gpio2 = m_gpio3 = false;
set_icountptr(m_icount);
}
-void mb86233_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) const
+void mb86233_device::state_string_export(const device_state_entry &entry, std::string &str) const
{
- switch (entry.index())
- {
- case STATE_GENFLAGS:
- str = string_format("%c%c", (m_sr & SIGN_FLAG) ? 'N' : 'n', (m_sr & ZERO_FLAG) ? 'Z' : 'z');
- break;
- }
}
-
-void mb86233_cpu_device::device_reset()
+WRITE_LINE_MEMBER(mb86233_device::gpio0_w)
{
- /* zero registers and flags */
- m_pc = 0;
- m_sr = 0;
- m_pcsp = 0;
- m_eb = 0;
- m_shift = 0;
- m_fifo_wait = 0;
+ m_gpio0 = state;
}
+WRITE_LINE_MEMBER(mb86233_device::gpio1_w)
+{
+ m_gpio1 = state;
+}
+WRITE_LINE_MEMBER(mb86233_device::gpio2_w)
+{
+ m_gpio2 = state;
+}
-/***************************************************************************
- Status Register
-***************************************************************************/
-
-#define ZERO_FLAG (1 << 0)
-#define SIGN_FLAG (1 << 1)
-#define EXTERNAL_FLAG (1 << 2) //This seems to be a flag coming from some external circuit??
-
-void mb86233_cpu_device::FLAGSF( float v )
+WRITE_LINE_MEMBER(mb86233_device::gpio3_w)
{
- GETSR() &= ~(ZERO_FLAG|SIGN_FLAG);
+ m_gpio3 = state;
+}
- if ( v == 0 )
- GETSR() |= ZERO_FLAG;
+void mb86233_device::device_reset()
+{
+ m_pc = 0;
+ m_ppc = 0;
+ m_st = F_ZRC|F_ZRD|F_ZX0|F_ZX1|F_ZX2|F_ZC0|F_ZC1;
+ m_sp = 0;
+
+ m_a = 0;
+ m_b = 0;
+ m_d = 0;
+ m_p = 0;
+ m_r = 1;
+ m_rpc = 1;
+ m_c0 = 1;
+ m_c1 = 1;
+ m_b0 = 0;
+ m_b1 = 0;
+ m_x0 = 0;
+ m_x1 = 0;
+ m_i0 = 0;
+ m_i1 = 0;
+ m_sft = 0;
+ m_vsm = 0;
+ m_vsmr = 7;
+ m_mask = 0;
+ m_m = 1;
+
+ m_alu_stmask = 0;
+ m_alu_stset = 0;
+ m_alu_r1 = 0;
+ m_alu_r2 = 0;
+
+ std::fill(std::begin(m_pcs), std::end(m_pcs), 0);
+
+ m_stall = false;
+}
- if ( v < 0 )
- GETSR() |= SIGN_FLAG;
+s32 mb86233_device::s24_32(u32 val)
+{
+ if(val & 0x00800000)
+ return val | 0xff000000;
+ else
+ return val & 0x00ffffff;
}
-void mb86233_cpu_device::FLAGSI( uint32_t v )
+u32 mb86233_device::set_exp(u32 val, u32 exp)
{
- GETSR() &= ~(ZERO_FLAG|SIGN_FLAG);
+ return (val & 0x807fffff) | ((exp & 0xff) << 23);
+}
- if ( v == 0 )
- GETSR() |= ZERO_FLAG;
+u32 mb86233_device::set_mant(u32 val, u32 mant)
+{
+ return (val & 0x07f800000) | ((mant & 0x00800000) << 8) | (mant & 0x007fffff);
+}
- if ( v & 0x80000000 )
- GETSR() |= SIGN_FLAG;
+u32 mb86233_device::get_exp(u32 val)
+{
+ return (val >> 23) & 0xff;
}
+u32 mb86233_device::get_mant(u32 val)
+{
+ return val & 0x80000000 ? val | 0x7f800000 : val & 0x807fffff;
+}
+void mb86233_device::pcs_push()
+{
+ for(unsigned int i=3; i; i--)
+ m_pcs[i] = m_pcs[i-1];
+ m_pcs[0] = m_pc;
+}
-/***************************************************************************
- Condition Codes
-***************************************************************************/
+void mb86233_device::pcs_pop()
+{
+ m_pc = m_pcs[0];
+ for(unsigned int i=0; i != 3; i++)
+ m_pcs[i] = m_pcs[i+1];
+}
-int mb86233_cpu_device::COND( uint32_t cond )
+void mb86233_device::testdz()
{
- switch( cond )
- {
- case 0x00: /* eq */
- if ( (GETSR() & ZERO_FLAG) ) return 1;
- break;
+ if(m_d)
+ m_st &= ~F_ZRD;
+ else
+ m_st |= F_ZRD;
+ if(m_d & 0x80000000)
+ m_st |= F_SGD;
+ else
+ m_st &= ~F_SGD;
+}
- case 0x01: /* ge */
- if ( (GETSR() & ZERO_FLAG) || ((GETSR() & SIGN_FLAG)==0) ) return 1;
+void mb86233_device::alu_pre(u32 alu)
+{
+ switch(alu) {
+ case 0x00: break; // no alu
+
+ case 0x01: {
+ // andd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = m_d & m_a;
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x02: /* le */
- if ( (GETSR() & ZERO_FLAG) || (GETSR() & SIGN_FLAG) ) return 1;
+ case 0x02: {
+ // orad
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = m_d | m_a;
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x06: /* never */
+ case 0x03: {
+ // eord
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = m_d ^ m_a;
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x0a:
- if(GETSR() & EXTERNAL_FLAG) return 1;
+ case 0x05: {
+ // fcpd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ u32 r = f2u(u2f(m_d) - u2f(m_a));
+ m_alu_stset = r ? r & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x10: /* --r12 != 0 */
- GETGPR(12)--;
- if ( GETGPR(12) != 0 ) return 1;
+ case 0x06: {
+ // fmad
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = f2u(u2f(m_d) + u2f(m_a));
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x11: /* --r13 != 0 */
- GETGPR(13)--;
- if ( GETGPR(13) != 0 ) return 1;
+ case 0x07: {
+ // fsbd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = f2u(u2f(m_d) - u2f(m_a));
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x16: /* always */
- return 1;
-
- default:
- logerror( "TGP: Unknown condition code (cc=%d) at PC:%x\n", cond, GETPC());
+ case 0x08: {
+ // fml
+ m_alu_stmask = 0;
+ m_alu_r1 = f2u(u2f(m_a) * u2f(m_b));
+ m_alu_stset = 0;
break;
}
- return 0;
-}
-
-
-
-/***************************************************************************
- ALU
-***************************************************************************/
-
-void mb86233_cpu_device::ALU( uint32_t alu)
-{
- float ftmp;
-
- switch(alu)
- {
- case 0x00: /* NOP */
+ case 0x09: {
+ // fmsd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = f2u(u2f(m_d) + u2f(m_p));
+ m_alu_r2 = f2u(u2f(m_a) * u2f(m_b));
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x01: /* D = D & A */
- GETD().u &= GETA().u;
- FLAGSI( GETD().u);
+ case 0x0a: {
+ // fmrd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = f2u(u2f(m_d) - u2f(m_p));
+ m_alu_r2 = f2u(u2f(m_a) * u2f(m_b));
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x02: /* D = D | A */
- GETD().u |= GETA().u;
- FLAGSI( GETD().u);
+ case 0x0b: {
+ // fabd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = m_d & 0x7fffffff;
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x03: /* D = D ^ A */
- GETD().u ^= GETA().u;
- FLAGSI( GETD().u);
+ case 0x0c: {
+ // fsmd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = f2u(u2f(m_d) + u2f(m_p));
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x04: /* D = D ~ A */
- GETD().u = ~GETA().u;
- FLAGSI( GETD().u);
+ case 0x0d: {
+ // fspd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = m_p;
+ m_alu_r2 = f2u(u2f(m_a) * u2f(m_b));
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x05: /* CMP D,A */
- ftmp = GETD().f - GETA().f;
- FLAGSF( ftmp);
- m_icount--;
+ case 0x0e: {
+ // cxfd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = f2u(s32(m_d));
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x06: /* D = D + A */
- GETD().f += GETA().f;
- FLAGSF( GETD().f);
- m_icount--;
+ case 0x0f: {
+ // cfxd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ switch((m_m >> 1) & 3) {
+ case 0: m_alu_r1 = s32(roundf(u2f(m_d))); break;
+ case 1: m_alu_r1 = s32(ceilf(u2f(m_d))); break;
+ case 2: m_alu_r1 = s32(floorf(u2f(m_d))); break;
+ case 3: m_alu_r1 = s32(u2f(m_d)); break;
+ }
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x07: /* D = D - A */
- GETD().f -= GETA().f;
- FLAGSF( GETD().f);
- m_icount--;
+ case 0x10: {
+ // fdvd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = f2u(u2f(m_d) / u2f(m_a));
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x08: /* P = A * B */
- GETP().f = GETA().f * GETB().f;
- m_icount--;
+ case 0x11: {
+ // fned
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = m_d ? m_d ^ 0x80000000 : 0;
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x09: /* D = D + P; P = A * B */
- GETD().f += GETP().f;
- GETP().f = GETA().f * GETB().f;
- FLAGSF( GETD().f);
- m_icount--;
+ case 0x13: {
+ // d = b + a
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = f2u(u2f(m_b) + u2f(m_a));
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x0A: /* D = D - P; P = A * B */
- GETD().f -= GETP().f;
- GETP().f = GETA().f * GETB().f;
- FLAGSF( GETD().f);
- m_icount--;
+ case 0x14: {
+ // d = b - a
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = f2u(u2f(m_b) - u2f(m_a));
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x0B: /* D = fabs(D) */
- GETD().f = fabs( GETD().f );
- FLAGSF( GETD().f);
- m_icount--;
+ case 0x16: {
+ // lsrd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = m_d >> m_sft;
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x0C: /* D = D + P */
- GETD().f += GETP().f;
- FLAGSF( GETD().f);
- m_icount--;
+ case 0x17: {
+ // lsld
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = m_d << m_sft;
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x0D: /* D = P; P = A * B */
- GETD().f = GETP().f;
- GETP().f = GETA().f * GETB().f;
- FLAGSF( GETD().f);
- m_icount--;
+ case 0x18: {
+ // asrd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = s32(m_d) >> m_sft;
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x0E: /* D = float(D) */
- GETD().f = (float)GETD().i;
- FLAGSF( GETD().f);
- m_icount--;
+ case 0x19: {
+ // asld
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = s32(m_d) << m_sft;
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x0F: /* D = int(D) */
- switch((m_fpucontrol>>1)&3)
- {
- //case 0: GETD().i = floorf(GETD().f+0.5f); break;
- //case 1: GETD().i = ceilf(GETD().f); break;
- case 2: GETD().i = floorf(GETD().f); break; // Manx TT
- case 3: GETD().i = (int32_t)GETD().f; break;
- default: popmessage("TGP uses D = int(D) with FPU control = %02x, contact MAMEdev",m_fpucontrol>>1); break;
- }
-
- FLAGSI( GETD().i);
+ case 0x1a: {
+ // addd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = m_d + m_a;
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x10: /* D = D / A */
- if ( GETA().u != 0 )
- GETD().f = GETD().f / GETA().f;
- FLAGSF( GETD().f);
- m_icount--;
+ case 0x1b: {
+ // subd
+ m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
+ m_alu_r1 = m_d - m_a;
+ m_alu_stset = m_alu_r1 ? m_alu_r1 & 0x80000000 ? F_SGD : 0 : F_ZRD;
break;
+ }
- case 0x11: /* D = -D */
- GETD().f = -GETD().f;
- FLAGSF( GETD().f);
- m_icount--;
+ default:
+ logerror("unhandled alu pre %02x\n", alu);
break;
+ }
+}
- case 0x13: /* D = A + B */
- GETD().f = GETA().f + GETB().f;
- FLAGSF( GETD().f);
- m_icount--;
- break;
+void mb86233_device::alu_update_st()
+{
+ m_st = (m_st & ~m_alu_stmask) | m_alu_stset;
+}
- case 0x14: /* D = B - A */
- GETD().f = GETB().f - GETA().f;
- FLAGSF( GETD().f);
- m_icount--;
- break;
+void mb86233_device::alu_post(u32 alu)
+{
+ switch(alu) {
+ case 0x00: break; // no alu
- case 0x16: /* LSR D, SHIFT */
- GETD().u >>= GETSHIFT();
- FLAGSI( GETD().u);
+ case 0x05:
+ // flags only
+ alu_update_st();
break;
- case 0x17: /* LSL D, SHIFT */
- GETD().u <<= GETSHIFT();
- FLAGSI( GETD().u);
+ case 0x01: case 0x02: case 0x03: case 0x06:
+ case 0x07: case 0x0b: case 0x0c: case 0x0e:
+ case 0x0f: case 0x10: case 0x11: case 0x13:
+ case 0x14: case 0x16: case 0x17: case 0x18:
+ case 0x19: case 0x1a: case 0x1b:
+ // d update
+ m_d = m_alu_r1;
+ alu_update_st();
break;
- case 0x18: /* ASR D, SHIFT */
-// GETD().u = (GETD().u & 0x80000000) | (GETD().u >> GETSHIFT());
- GETD().i >>= GETSHIFT();
- FLAGSI( GETD().u);
+ case 0x08:
+ // p update
+ m_p = m_alu_r1;
break;
- case 0x1A: /* D = D + A */
- GETD().i += GETA().i;
- FLAGSI( GETD().u);
+ case 0x09: case 0x0a: case 0xd:
+ // d, p update
+ m_d = m_alu_r1;
+ m_p = m_alu_r2;
+ alu_update_st();
break;
- case 0x1B: /* D = D - A */
- GETD().i -= GETA().i;
- FLAGSI( GETD().u);
+ default:
+ logerror("unhandled alu post %02x\n", alu);
break;
-
- default:
- fatalerror( "TGP: Unknown ALU op %x at PC:%04x\n", alu, GETPC() );
}
}
-
-
-/***************************************************************************
- Memory Access
-***************************************************************************/
-
-uint32_t mb86233_cpu_device::ScaleExp(unsigned int v,int scale)
-{
- int exp=(v>>23)&0xff;
- exp+=scale;
- v&=~0x7f800000;
- return v|(exp<<23);
-}
-
-
-uint32_t mb86233_cpu_device::GETEXTERNAL( uint32_t EB, uint32_t offset )
+u16 mb86233_device::ea_pre_0(u32 r)
{
- uint32_t addr;
-
- if ( EB == 0 && offset >= 0x20 && offset <= 0x2f ) /* TGP Tables in ROM - FIXME - */
- {
- if(offset>=0x20 && offset<=0x23) //SIN from value at RAM(0x20) in 0x4000/PI steps
- {
- uint32_t r;
- uint32_t value=GETEXTPORT()[0x20];
- uint32_t off;
- value+=(offset-0x20)<<14;
- off=value&0x3fff;
- if((value&0x7fff)==0)
- r=0;
- else if((value&0x7fff)==0x4000)
- r=0x3f800000;
- else
- {
- if(value&0x4000)
- off=0x4000-off;
- r=m_Tables[off];
- }
- if(value&0x8000)
- r|=1<<31;
- return r;
+ switch(r & 0x180) {
+ case 0x000: return r & 0x7f;
+ case 0x080: case 0x100: return (r & 0x7f) + m_b0 + m_x0;
+ case 0x180: {
+ switch(r & 0x60) {
+ case 0x00: return m_b0 + m_x0;
+ case 0x20: return m_x0;
+ case 0x40: return m_b0 + (m_x0 & m_vsmr);
+ case 0x60: return m_x0 & m_vsmr;
}
-
- if(offset==0x27)
- {
- unsigned int value=GETEXTPORT()[0x27];
- int exp=(value>>23)&0xff;
- unsigned int res;
- unsigned int sign=0;
- MB86233_REG a,b;
- int index;
-
- a.u=GETEXTPORT()[0x24];
- b.u=GETEXTPORT()[0x25];
-
-
- if(!exp)
- {
- if((a.u&0x7fffffff)<=(b.u&0x7fffffff))
- {
- if(b.u&0x80000000)
- res=0xc000;
- else
- res=0x4000;
- }
- else
- {
- if(a.u&0x80000000)
- res=0x8000;
- else
- res=0x0000;
- }
- return res;
- }
-
- if((a.u^b.u)&0x80000000)
- sign=16; //the negative values are in the high word
-
- if((exp&0x70)!=0x70)
- index=0;
- else if(exp<0x70 || exp>0x7e)
- index=0x3fff;
- else
- {
- int expdif=exp-0x71;
- int base;
- int mask;
- int shift;
-
-
- if(expdif<0)
- expdif=0;
- base=1<<expdif;
- mask=base-1;
- shift=23-expdif;
-
- index=base+((value>>shift)&mask);
-
- }
-
- res=(m_Tables[index+0x10000/4]>>sign)&0xffff;
-
- if((a.u&0x7fffffff)<=(b.u&0x7fffffff))
- res=0x4000-res;
-
-
- if((a.u&0x80000000) && (b.u&0x80000000)) //3rd quadrant
- {
- res=0x8000|res;
- }
- else if((a.u&0x80000000) && !(b.u&0x80000000)) //2nd quadrant
- {
- res=res&0x7fff;
- }
- else if(!(a.u&0x80000000) && (b.u&0x80000000)) //2nd quadrant
- {
- res=0x8000|res;
- }
-
- return res;
-
- }
-
- if(offset==0x28)
- {
- uint32_t offset=(GETEXTPORT()[0x28]>>10)&0x1fff;
- uint32_t value=m_Tables[offset*2+0x20000/4];
- uint32_t srcexp=(GETEXTPORT()[0x28]>>23)&0xff;
-
- value&=0x7FFFFFFF;
-
- return ScaleExp(value,0x7f-srcexp);
- }
- if(offset==0x29)
- {
- uint32_t offset=(GETEXTPORT()[0x28]>>10)&0x1fff;
- uint32_t value=m_Tables[offset*2+(0x20000/4)+1];
- uint32_t srcexp=(GETEXTPORT()[0x28]>>23)&0xff;
-
- value&=0x7FFFFFFF;
- if(GETEXTPORT()[0x28]&(1<<31))
- value|=1<<31;
-
- return ScaleExp(value,0x7f-srcexp);
- }
- if(offset==0x2a)
- {
- uint32_t offset=((GETEXTPORT()[0x2a]>>11)&0x1fff)^0x1000;
- uint32_t value=m_Tables[offset*2+0x30000/4];
- uint32_t srcexp=(GETEXTPORT()[0x2a]>>24)&0x7f;
-
- value&=0x7FFFFFFF;
-
- return ScaleExp(value,0x3f-srcexp);
- }
- if(offset==0x2b)
- {
- uint32_t offset=((GETEXTPORT()[0x2a]>>11)&0x1fff)^0x1000;
- uint32_t value=m_Tables[offset*2+(0x30000/4)+1];
- uint32_t srcexp=(GETEXTPORT()[0x2a]>>24)&0x7f;
-
- value&=0x7FFFFFFF;
- if(GETEXTPORT()[0x2a]&(1<<31))
- value|=1<<31;
-
- return ScaleExp(value,0x3f-srcexp);
- }
-
- return GETEXTPORT()[offset];
}
-
- addr = ( EB & 0xFFFF0000 ) | ( offset & 0xFFFF );
-
- return RDMEM(addr);
+ }
+ return 0;
}
-void mb86233_cpu_device::SETEXTERNAL( uint32_t EB, uint32_t offset, uint32_t value )
+void mb86233_device::ea_post_0(u32 r)
{
- uint32_t addr;
-
- if ( EB == 0 && offset >= 0x20 && offset <= 0x2f ) /* TGP Tables in ROM - FIXME - */
- {
- GETEXTPORT()[offset] = value;
-
- if(offset==0x25 || offset==0x24)
- {
- if((GETEXTPORT()[0x24]&0x7fffffff)<=(GETEXTPORT()[0x25]&0x7fffffff))
- {
- GETSR()|=EXTERNAL_FLAG;
- }
- else
- {
- GETSR()&=~EXTERNAL_FLAG;
- }
- }
+ if(!(r & 0x100))
return;
+ if(!(r & 0x080))
+ m_x0 += m_i0;
+ else {
+ if(r & 0x10)
+ m_x0 += (r & 0xf) - 0x10;
+ else
+ m_x0 += r & 0xf;
}
-
- addr = ( EB & 0xFFFF0000 ) | ( offset & 0xFFFF );
-
- WRMEM( addr, value );
}
-
-
-/***************************************************************************
- Register Access
-***************************************************************************/
-
-uint32_t mb86233_cpu_device::GETREGS( uint32_t reg, int source )
+u16 mb86233_device::ea_pre_1(u32 r)
{
- uint32_t mode = ( reg >> 6 ) & 0x07;
-
- reg &= 0x3f;
-
- if ( mode == 0 || mode == 1 || mode == 3 )
- {
- if ( reg < 0x10 )
- {
- return GETGPR(reg);
- }
-
- switch( reg )
- {
- case 0x10: /* A */
- return GETA().u;
-
- case 0x11: /* A.e */
- return (GETA().u >> 23) & 0xff;
-
- case 0x12: /* A.m */
- return (GETA().u & 0x7fffff) | ((GETA().u&0x80000000) >> 8);
-
- case 0x13: /* B */
- return GETB().u;
-
- case 0x14: /* B.e */
- return (GETB().u >> 23) & 0xff;
-
- case 0x15: /* B.m */
- return (GETB().u & 0x7fffff) | ((GETB().u&0x80000000) >> 8);
-
- case 0x19: /* D */
- return GETD().u;
-
- case 0x1A: /* D.e */
- return (GETD().u >> 23) & 0xff;
-
- case 0x1B: /* D.m */
- return (GETD().u & 0x7fffff) | ((GETD().u&0x80000000) >> 8);
-
- case 0x1C: /* P */
- return GETP().u;
-
- case 0x1D: /* P.e */
- return (GETP().u >> 23) & 0xff;
-
- case 0x1E: /* P.m */
- return (GETP().u & 0x7fffff) | ((GETP().u&0x80000000) >> 8);
-
- case 0x1F: /* Shift */
- return GETSHIFT();
-
- case 0x20: /* Parallel Port */
- logerror( "TGP: Parallel port read at PC:%04x\n", GETPC() );
- return 0;
-
- case 0x21: /* FIn */
- {
- if ( m_fifo_read_ok_cb() == ASSERT_LINE )
- {
- return m_fifo_read_cb();
- }
-
- GETFIFOWAIT() = 1;
- return 0;
- }
-
- case 0x22: /* FOut */
- return 0;
-
- case 0x23: /* EB */
- return GETEB();
-
- case 0x34:
- return GETREPCNT();
-
- default:
- fatalerror( "TGP: Unknown GETREG (%d) at PC=%04x\n", reg, GETPC() );
+ switch(r & 0x180) {
+ case 0x000: return r & 0x7f;
+ case 0x080: case 0x100: return (r & 0x7f) + m_b1 + m_x1;
+ case 0x180: {
+ switch(r & 0x60) {
+ case 0x00: return m_b1 + m_x1;
+ case 0x20: return m_x1;
+ case 0x40: return m_b1 + (m_x1 & m_vsmr);
+ case 0x60: return m_x1 & m_vsmr;
}
}
- else if ( mode == 2 ) /* Indexed */
- {
- uint32_t addr = reg & 0x1f;
-
- if ( source )
- {
- if( !( reg & 0x20 ) )
- addr += GETGPR(0);
-
- addr += GETGPR(2);
- }
- else
- {
- if( !( reg & 0x20 ) )
- addr += GETGPR(1);
-
- addr += GETGPR(3);
- }
-
- return addr;
}
- else if( mode == 6 ) /* Indexed with postop */
- {
- uint32_t addr = 0;
-
- if ( source )
- {
- if( !( reg & 0x20 ) )
- addr += GETGPR(0);
-
- addr += GETGPR(2);
- }
- else
- {
- if( !( reg & 0x20 ) )
- addr += GETGPR(1);
-
- addr += GETGPR(3);
- }
+ return 0;
+}
- if ( reg & 0x10 )
- {
- if ( source )
- GETGPR(2) -= 0x20 - ( reg & 0x1f );
- else
- GETGPR(3) -= 0x20 - ( reg & 0x1f );
- }
+void mb86233_device::ea_post_1(u32 r)
+{
+ if(!(r & 0x100))
+ return;
+ if(!(r & 0x080))
+ m_x1 += m_i1;
+ else {
+ if(r & 0x10)
+ m_x1 += (r & 0xf) - 0x10;
else
- {
- if ( source )
- GETGPR(2) += ( reg & 0x1f );
- else
- GETGPR(3) += ( reg & 0x1f );
- }
-
- return addr;
- }
- else
- {
- fatalerror( "TGP: Unknown GETREG mode %d at PC:%04x\n", mode, GETPC() );
+ m_x1 += r & 0xf;
}
-
- // never executed
- //return 0;
}
-void mb86233_cpu_device::SETREGS( uint32_t reg, uint32_t val )
+u32 mb86233_device::read_reg(u32 r)
{
- int mode = ( reg >> 6) & 0x07;
-
- reg &= 0x3f;
-
- if( mode == 0 || mode == 1 || mode == 3 )
- {
- if(reg==12 || reg==13) // counter regs seem to be 8 bit only
- val&=0xff;
-
- if ( reg < 0x10 )
- {
- GETGPR(reg) = val;
- return;
- }
-
- switch( reg )
- {
- case 0x10: /* A */
- GETA().u = val;
- break;
-
- case 0x11: /* A.e */
- GETA().u &= ~((0x0000007f) << 23);
- GETA().u |= (( val & 0xff ) << 23 );
- break;
-
- case 0x12: /* A.m */
- GETA().u &= ~( 0x807fffff );
- GETA().u |= ( val & 0x7fffff );
- GETA().u |= ( val & 0x800000 ) << 8;
- break;
-
- case 0x13: /* B */
- GETB().u = val;
- break;
-
- case 0x14: /* B.e */
- GETB().u &= ~((0x0000007f) << 23);
- GETB().u |= (( val & 0xff ) << 23 );
- break;
-
- case 0x15: /* B.m */
- GETB().u &= ~( 0x807fffff );
- GETB().u |= ( val & 0x7fffff );
- GETB().u |= ( val & 0x800000 ) << 8;
- break;
-
- case 0x19: /* D */
- GETD().u = val;
- break;
-
- case 0x1A: /* D.e */
- GETD().u &= ~((0x0000007f) << 23);
- GETD().u |= (( val & 0xff ) << 23 );
- break;
-
- case 0x1B: /* B.m */
- GETD().u &= ~( 0x807fffff );
- GETD().u |= ( val & 0x7fffff );
- GETD().u |= ( val & 0x800000 ) << 8;
- break;
-
- case 0x1C: /* P */
- GETP().u = val;
- break;
-
- case 0x1D: /* P.e */
- GETP().u &= ~((0x000000ff) << 23);
- GETP().u |= (( val & 0xff ) << 23 );
- break;
-
- case 0x1E: /* P.m */
- GETP().u &= ~( 0x807fffff );
- GETP().u |= ( val & 0x7fffff );
- GETP().u |= ( val & 0x800000 ) << 8;
- break;
-
- case 0x1F:
- GETSHIFT() = val;
- break;
-
- case 0x20: /* Parallel Port */
- logerror( "TGP: Parallel port write: %08x at PC:%04x\n", val, GETPC() );
- break;
-
- case 0x22: /* FOut */
- m_fifo_write_cb( val );
- break;
-
- case 0x23:
- GETEB() = val;
- break;
-
- case 0x34:
- GETREPCNT() = val;
- break;
-
- default:
- fatalerror( "TGP: Unknown register write (r:%d, mode:%d) at PC:%04x\n", reg, mode, GETPC());
- }
- }
- else
- {
- fatalerror( "TGP: Unknown register write (r:%d, mode:%d) at PC:%04x\n", reg, mode, GETPC());
+ r &= 0x3f;
+ if(r >= 0x20 && r < 0x30)
+ return m_rf->read_dword(r & 0x1f);
+ switch(r) {
+ case 0x00: return m_b0;
+ case 0x01: return m_b1;
+ case 0x02: return m_x0;
+ case 0x03: return m_x1;
+
+ case 0x0c: return m_c0;
+ case 0x0d: return m_c1;
+
+ case 0x10: return m_a;
+ case 0x11: return get_exp(m_a);
+ case 0x12: return get_mant(m_a);
+ case 0x13: return m_b;
+ case 0x14: return get_exp(m_b);
+ case 0x15: return get_mant(m_b);
+ case 0x19: return m_d;
+ /* c */
+ case 0x1a: return get_exp(m_d);
+ case 0x1b: return get_mant(m_d);
+ case 0x1c: return m_p;
+ case 0x1d: return get_exp(m_p);
+ case 0x1e: return get_mant(m_p);
+ case 0x1f: return m_sft;
+
+ case 0x34: return m_rpc;
+
+ default:
+ logerror("unimplemented read_reg(%02x)\n", r);
+ return 0;
}
}
-
-/***************************************************************************
- Addressing Modes
-***************************************************************************/
-
-uint32_t mb86233_cpu_device::INDIRECT( uint32_t reg, int source )
+void mb86233_device::write_reg(u32 r, u32 v)
{
- uint32_t mode = ( reg >> 6 ) & 0x07;
-
- if ( mode == 0 || mode == 1 || mode == 3 )
- {
- return reg;
+ r &= 0x3f;
+ if(r >= 0x20 && r < 0x30) {
+ m_rf->write_dword(r & 0x1f, v);
+ return;
}
- else if ( mode == 2 )
- {
- uint32_t addr = reg & 0x3f;
-
- if ( source )
- {
- if( !(reg & 0x20) )
- addr += GETGPR(0);
+ switch(r) {
+ case 0x00: m_b0 = v; break;
+ case 0x01: m_b1 = v; break;
+ case 0x02: m_x0 = v; break;
+ case 0x03: m_x1 = v; break;
- addr += GETGPR(2);
- }
- else
- {
- if( !(reg & 0x20) )
- addr += GETGPR(1);
+ case 0x05: m_i0 = v; break;
+ case 0x06: m_i1 = v; break;
- addr += GETGPR(3);
- }
+ case 0x08: m_sp = v; break;
- return addr;
- }
- else if ( mode == 6 || mode == 7 )
- {
- uint32_t addr = 0;
+ case 0x0a: m_vsm = v & 7; m_vsmr = (8 << m_vsm) - 1; break;
- if ( source )
- {
- if ( !( reg & 0x20 ) )
- addr += GETGPR(0);
-
- addr += GETGPR(2);
- }
+ case 0x0c:
+ m_c0 = v;
+ if(m_c0 == 1)
+ m_st |= F_ZC0;
else
- {
- if ( !( reg & 0x20 ) )
- addr += GETGPR(1);
-
- addr += GETGPR(3);
- }
+ m_st &= ~F_ZC0;
+ break;
- if ( reg & 0x10 )
- {
- if ( source )
- GETGPR(2) -= 0x20 - ( reg & 0x1f );
- else
- GETGPR(3) -= 0x20 - ( reg & 0x1f );
- }
+ case 0x0d:
+ m_c1 = v;
+ if(m_c1 == 1)
+ m_st |= F_ZC1;
else
- {
- if ( source )
- GETGPR(2) += ( reg & 0x1f );
- else
- GETGPR(3) += ( reg & 0x1f );
- }
- if( mode == 7)
- {
- if ( source )
- GETGPR(2)&=0x3f;
- else
- GETGPR(3)&=0x3f;
- }
+ m_st &= ~F_ZC1;
+ break;
- return addr;
- }
- else
- {
- fatalerror( "TGP: Unknown INDIRECT mode %d at PC:%04x\n", mode, GETPC() );
+ case 0x0f: break;
+
+ case 0x10: m_a = v; break;
+ case 0x11: m_a = set_exp(m_a, v); break;
+ case 0x12: m_a = set_mant(m_a, v); break;
+ case 0x13: m_b = v; break;
+ case 0x14: m_b = set_exp(m_b, v); break;
+ case 0x15: m_b = set_mant(m_b, v); break;
+ /* c */
+ case 0x19: m_d = v; testdz(); break;
+ case 0x1a: m_d = set_exp(m_d, v); testdz(); break;
+ case 0x1b: m_d = set_mant(m_d, v); testdz(); break;
+ case 0x1c: m_p = v; break;
+ case 0x1d: m_p = set_exp(m_p, v); break;
+ case 0x1e: m_p = set_mant(m_p, v); break;
+ case 0x1f: m_sft = v; break;
+
+ case 0x34: m_rpc = v; break;
+ case 0x3c: m_mask = v; break;
+
+ default:
+ logerror("unimplemented write_reg(%02x, %08x)\n", r, v);
+ break;
}
-
- // never executed
- //return 0;
}
-/***************************************************************************
- Core Execution Loop
-***************************************************************************/
+void mb86233_device::write_mem_internal_1(u32 r, u32 v, bool bank)
+{
+ u16 ea = ea_pre_1(r);
+ if(bank)
+ ea += 0x200;
+ m_data->write_dword(ea, v);
+ ea_post_1(r);
+}
-void mb86233_cpu_device::execute_run()
+void mb86233_device::write_mem_io_1(u32 r, u32 v)
{
- while( m_icount > 0 )
- {
- uint32_t val;
- uint32_t opcode;
+ u16 ea = ea_pre_1(r);
+ m_io->write_dword(ea, v);
+ ea_post_1(r);
+}
- debugger_instruction_hook(GETPC());
+void mb86233_device::execute_run()
+{
+ while(m_icount > 0) {
+ m_ppc = m_pc;
+ debugger_instruction_hook(m_ppc);
+ u32 opcode = m_direct->read_dword(m_pc++);
+
+ switch((opcode >> 26) & 0x3f) {
+ case 0x00: {
+ // lab
+ u32 r1 = opcode & 0x1ff;
+ u32 r2 = (opcode >> 9) & 0x1ff;
+ u32 alu = (opcode >> 21) & 0x1f;
+ u32 op = (opcode >> 18) & 0x7;
+
+ alu_pre(alu);
+
+ switch(op) {
+ case 0: {
+ // lab mem, mem (e)
+
+ u32 ea1 = ea_pre_0(r1);
+ u32 v1 = m_data->read_dword(ea1);
+ if(m_stall) goto do_stall;
+
+ u32 ea2 = ea_pre_1(r2);
+ u32 v2 = m_io->read_dword(ea2);
+ if(m_stall) goto do_stall;
+
+ ea_post_0(r1);
+ ea_post_1(r2);
+
+ m_a = v1;
+ m_b = v2;
+ break;
+ }
- opcode = ROPCODE(GETPC());
+ case 3: {
+ // lab mem, mem + 0x200
- GETFIFOWAIT() = 0;
+ u32 ea1 = ea_pre_0(r1);
+ u32 v1 = m_data->read_dword(ea1);
+ if(m_stall) goto do_stall;
- switch( (opcode >> 26) & 0x3f )
- {
- case 0x00: /* dual move */
- {
- uint32_t r1 = opcode & 0x1ff;
- uint32_t r2 = ( opcode >> 9 ) & 0x7f;
- uint32_t alu = ( opcode >> 21 ) & 0x1f;
- uint32_t op = ( opcode >> 16 ) & 0x1f;
+ u32 ea2 = ea_pre_1(r2) + 0x200;
+ u32 v2 = m_data->read_dword(ea2);
+ if(m_stall) goto do_stall;
- ALU( alu );
+ ea_post_0(r1);
+ ea_post_1(r2);
- switch( op )
- {
- case 0x01:
- GETA().u = GETARAM()[INDIRECT(r1,1)];
- GETB().u = GETEXTERNAL( GETEB(),INDIRECT(r2|(2<<6), 0));
- break;
+ m_a = v1;
+ m_b = v2;
+ break;
+ }
- case 0x04: // ?
- GETA().u = GETARAM()[r1];
- GETB().u = GETEXTERNAL( GETEB(),r2);
- break;
+ case 4: {
+ // lab mem + 0x200, mem
- case 0x0C:
- GETA().u = GETARAM()[INDIRECT(r1,1)];
- GETB().u = GETBRAM()[r2];
- break;
+ u32 ea1 = ea_pre_0(r1) + 0x200;
+ u32 v1 = m_data->read_dword(ea1);
+ if(m_stall) goto do_stall;
- case 0x0D: // VF2 shadows
- GETA().u = GETARAM()[INDIRECT(r1,1)];
- GETB().u = GETBRAM()[INDIRECT(r2|2<<6,0)];
- break;
+ u32 ea2 = ea_pre_1(r2);
+ u32 v2 = m_data->read_dword(ea2);
+ if(m_stall) goto do_stall;
- case 0x0F:
- GETA().u = GETARAM()[r1];
- GETB().u = GETBRAM()[INDIRECT(r2|6<<6,0)];
- break;
+ ea_post_0(r1);
+ ea_post_1(r2);
- case 0x10:
- GETA().u = GETBRAM()[INDIRECT(r1,1)];
- GETB().u = GETARAM()[r2];
- break;
+ m_a = v1;
+ m_b = v2;
+ break;
+ }
- case 0x11:
- GETA().u = GETBRAM()[INDIRECT(r1,1)];
- GETB().u = GETARAM()[INDIRECT(r2|(2<<6),0)];
- break;
+ default:
+ logerror("unhandler lab subop %x\n", op);
+ break;
- default:
- logerror( "TGP: Unknown TGP double move (op=%d) at PC:%x\n", op, GETPC());
- break;
- }
}
- break;
-
- case 0x7: /* LD/MOV */
- {
- uint32_t r1 = opcode & 0x1ff;
- uint32_t r2 = ( opcode >> 9 ) & 0x7f;
- uint32_t alu = ( opcode >> 21 ) & 0x1f;
- uint32_t op = ( opcode >> 16 ) & 0x1f;
-
- switch( op )
- {
- case 0x04: /* MOV RAM->External */
- {
- SETEXTERNAL( GETEB(), r2, GETARAM()[r1]);
- ALU(alu);
- }
- break;
- case 0x0c: /* MOV RAM->BRAM */
- {
- GETBRAM()[r2] = GETARAM()[r1];
- ALU(alu);
- }
- break;
+ alu_post(alu);
+ break;
+ }
- case 0x0d: /* Move RAM->BRAM indirect? */
- {
- val = GETARAM()[r1];
- ALU(alu);
- GETBRAM()[INDIRECT(r2|(2<<6),0)] = val;
- }
- break;
- case 0x1d: /* MOV RAM->Reg */
- {
- if ( r1 & 0x180 )
- {
- val = GETARAM()[GETREGS(r1,0)];
- }
- else
- {
- val = GETARAM()[r1];
- }
-
- /* if we're waiting for data, don't complete the instruction */
- if ( GETFIFOWAIT() )
- break;
-
- ALU(alu);
- SETREGS(r2,val);
- }
- break;
+ case 0x07: {
+ // ld / mov
+ u32 r1 = opcode & 0x1ff;
+ u32 r2 = (opcode >> 9) & 0x1ff;
+ u32 alu = (opcode >> 21) & 0x1f;
+ u32 op = (opcode >> 18) & 0x7;
- case 0x1c: /* MOV Reg->RAMInd */
- {
- val = GETREGS(r2,1);
+ alu_pre(alu);
- /* if we're waiting for data, don't complete the instruction */
- if ( GETFIFOWAIT() )
- break;
+ switch(op) {
+ case 0: {
+ // mov mem, mem (e)
+ u32 ea = ea_pre_0(r1);
+ u32 v = m_data->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_0(r1);
+ write_mem_io_1(r2, v);
+ break;
+ }
- ALU(alu);
+ case 1: {
+ // mov mem + 0x200, mem (e)
+ u32 ea = ea_pre_0(r1) + 0x200*0;
+ u32 v = m_data->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_0(r1);
+ write_mem_io_1(r2, v);
+ break;
+ }
- if ( ( r2 >> 6 ) & 0x01)
- {
- SETEXTERNAL( GETEB(),INDIRECT(r1,0),val);
- }
- else
- {
- GETARAM()[INDIRECT(r1,0)] = val;
- }
- }
- break;
+ case 2: {
+ // mov mem (e), mem
+ u32 ea = ea_pre_0(r1);
+ u32 v = m_io->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_0(r1);
+ write_mem_internal_1(r2, v, false);
+ break;
+ }
- case 0x1f: /* MOV Reg->Reg */
- {
- if ( r1 == 0x10 && r2 == 0xf )
- {
- /* NOP */
- ALU( alu);
- }
- else
- {
- val = GETREGS(r1,1);
-
- /* if we're waiting for data, don't complete the instruction */
- if ( GETFIFOWAIT() )
- break;
-
- ALU(alu);
- SETREGS(r2, val);
- }
- }
- break;
+ case 3: {
+ // mov mem, mem + 0x200
+ u32 ea = ea_pre_0(r1);
+ u32 v = m_data->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_0(r1);
+ write_mem_internal_1(r2, v, true);
+ break;
+ }
- case 0x0f: /* MOV RAMInd->BRAMInd */
- {
- val = GETARAM()[INDIRECT(r1,1)];
- ALU(alu);
- GETBRAM()[INDIRECT(r2|(6<<6),0)] = val;
- }
- break;
+ case 4: {
+ // mov mem + 0x200, mem
+ u32 ea = ea_pre_0(r1) + 0x200;
+ u32 v = m_data->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_0(r1);
+ write_mem_internal_1(r2, v, false);
+ break;
+ }
- case 0x13: /* MOV BRAMInd->RAMInd */
- {
- val = GETBRAM()[INDIRECT(r1,1)];
- ALU(alu);
- GETARAM()[INDIRECT(r2|(6<<6),0)] = val;
- }
- break;
+ case 5: {
+ // mov mem (o), mem
+ u32 ea = ea_pre_0(r1);
+ u32 v = m_program->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_0(r1);
+ write_mem_internal_1(r2, v, false);
+ break;
+ }
- case 0x10: /* MOV RAMInd->RAM */
- {
- val = GETBRAM()[INDIRECT(r1,1)];
- ALU(alu);
- GETARAM()[r2] = val;
- }
+ case 7: {
+ switch(r2 >> 6) {
+ case 0: {
+ // mov reg, mem
+ u32 v = read_reg(r2);
+ if(m_stall) goto do_stall;
+ write_mem_internal_1(r1, v, false);
break;
+ }
- case 0x1e: /* External->Reg */
- {
- uint32_t offset;
-
- if ( (( r2 >> 6 ) & 7) == 1 )
- {
- offset = INDIRECT(r1,1);
- val = GETEXTERNAL(0,offset);
- }
- else
- {
- offset = INDIRECT(r1,0);
- val = GETEXTERNAL(GETEB(),offset);
- }
-
- ALU(alu);
- SETREGS(r2,val);
- }
+ case 1: {
+ // mov reg, mem (e)
+ u32 v = read_reg(r2);
+ if(m_stall) goto do_stall;
+ write_mem_io_1(r1, v);
break;
+ }
- case 0x03: /* RAM->External Ind */
- {
- val = GETARAM()[r1];
- ALU(alu);
- SETEXTERNAL(GETEB(),INDIRECT(r2|(6<<6),0),val);
- }
+ case 2: {
+ // mov mem + 0x200, reg
+ u32 ea = ea_pre_1(r1) + 0x200;
+ u32 v = m_data->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_1(r1);
+ write_reg(r2, v);
break;
+ }
- case 0x07: /* RAMInd->External */
- {
- val = GETARAM()[INDIRECT(r1,1)];
- ALU(alu);
- SETEXTERNAL( GETEB(),INDIRECT(r2|(6<<6),0),val);
- }
+ case 3: {
+ // mov mem, reg
+ u32 ea = ea_pre_1(r1);
+ u32 v = m_data->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_1(r1);
+ write_reg(r2, v);
break;
+ }
- case 0x08: /* External->RAM */
- {
- val = GETEXTERNAL( GETEB(),INDIRECT(r1,1));
- ALU(alu);
- GETARAM()[r2] = val;
- }
+ case 4: {
+ // mov mem (e), reg
+ u32 ea = ea_pre_1(r1);
+ u32 v = m_io->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_1(r1);
+ write_reg(r2, v);
break;
+ }
- case 0x0b: /* External->RAMInd */
- {
- val = GETEXTERNAL( GETEB(),INDIRECT(r1,1));
- ALU( alu);
- GETARAM()[INDIRECT(r2|(6<<6),0)] = val;
- }
+ case 5: {
+ // mov mem (o), reg
+ u32 ea = ea_pre_0(r1);
+ u32 v = m_program->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_0(r1);
+ write_reg(r2, v);
break;
+ }
- case 0x17: /* External r2-> RAMInd r3 */
- {
- uint32_t offset;
-
- offset = INDIRECT(r1,1);
-
- val = GETEXTERNAL( GETEB(), offset);
- ALU(alu);
- GETARAM()[INDIRECT(r2|(6<<6),0)] = val;
- }
+ case 6: {
+ // mov reg, reg
+ u32 v = read_reg(r1);
+ if(m_stall) goto do_stall;
+ write_reg(r2, v);
break;
- case 0x14:
- {
- uint32_t offset;
-
- offset = INDIRECT(r1,1);
+ }
- val = GETEXTERNAL( 0, offset);
- ALU(alu);
- GETARAM()[r2] = val;
- }
+ default:
+ logerror("unhandler ld/mov subop 7/%x\n", r2 >> 6);
break;
-
- default:
- fatalerror( "TGP: Unknown TGP move (op=%02x) at PC:%x\n", op, GETPC());
}
+ break;
}
- break;
-
- case 0x0d: /* CONTROL? */
- {
- uint32_t sub = (opcode>>16) & 0xff;
-
- switch(sub)
- {
- case 0x0a: // FPU Round Control opcode
- m_fpucontrol = opcode & 0xff;
- logerror( "TGP: FPU Round CONTROL sets %02x at PC:%x\n", m_fpucontrol, GETPC());
- break;
- default:
- logerror( "TGP: Unknown CONTROL sub-type %02x at PC:%x\n", sub, GETPC());
- break;
- }
+ default:
+ logerror("unhandler ld/mov subop %x\n", op);
break;
}
- case 0x0e: /* LDIMM24 */
- {
- uint32_t sub = (opcode>>24) & 0x03;
- uint32_t imm = opcode & 0xffffff;
-
- /* sign extend 24->32 */
- if ( imm & 0x800000 )
- imm |= 0xFF000000;
+ alu_post(alu);
+ break;
+ }
- switch( sub )
- {
- case 0x00: /* P */
- GETP().u = imm;
- break;
+ case 0x0d: {
+ // stm/clm
+ u32 sub2 = (opcode >> 17) & 7;
- case 0x01: /* A */
- GETA().u = imm;
- break;
+ // Theorically has restricted alu too
- case 0x02: /* B */
- GETB().u = imm;
- break;
+ switch(sub2) {
+ case 5:
+ // stmh
+ // bit 0 = floating point
+ // bit 1-2 = rounding mode
+ m_m = opcode;
+ break;
- case 0x03: /* D */
- GETD().u = imm;
- break;
- }
+ default:
+ logerror("unimplemented opcode 0d/%x\n", sub2);
+ break;
}
break;
+ }
- case 0x0f: /* REP/CLEAR/FLAGS */
- {
- uint32_t alu = ( opcode >> 20 ) & 0x1f;
- uint32_t sub2 = ( opcode >> 16 ) & 0x0f;
-
- ALU(alu);
-
- if( sub2 == 0x00 ) /* CLEAR reg */
- {
- uint32_t reg = opcode & 0x1f;
-
- switch( reg )
- {
- case 0x10:
- GETD().u = 0;
- break;
-
- case 0x08:
- GETB().u = 0;
- break;
-
- case 0x04:
- GETA().u = 0;
- break;
- }
- }
- else if ( sub2 == 0x04 ) /* REP xxx */
- {
- uint32_t sub3 = ( opcode >> 12 ) & 0x0f;
-
- if ( sub3 == 0 )
- {
- GETREPS() = opcode & 0xfff;
-
- if ( GETREPS() == 0 )
- GETREPS() = 0x100;
-
- GETPC()++;
- }
- else if ( sub3 == 8 )
- {
- GETREPS() = GETREGS( opcode & 0xfff, 0 );
- GETPC()++;
- }
- }
- else if ( sub2 == 0x02 ) /* CLRFLAGS */
- {
- GETSR() &= ~(opcode&0xfff);
- }
- else if ( sub2 == 0x06 ) /* SETFLAGS */
- {
- GETSR() |= (opcode&0xfff);
- }
+ case 0x0e: {
+ // lipl / lia / lib / lid
+ switch((opcode >> 24) & 0x3) {
+ case 0:
+ m_p = (m_p & 0xffffff000000) | (opcode & 0xffffff);
+ break;
+ case 1:
+ m_a = s24_32(opcode);
+ break;
+ case 2:
+ m_b = s24_32(opcode);
+ break;
+ case 3:
+ m_d = s24_32(opcode);
+ testdz();
+ break;
}
break;
+ }
- case 0x10: /* LDIMM rx */
- {
- uint32_t sub = (opcode>>24) & 0x03;
- uint32_t imm = opcode & 0xffff;
+ case 0x0f: {
+ // rep/clr0/clr1/set
+ u32 alu = (opcode >> 20) & 0x1f;
+ u32 sub2 = (opcode >> 17) & 7;
+
+ alu_pre(alu);
+
+ switch(sub2) {
+ case 0:
+ // clr0
+ if(opcode & 0x0004) m_a = 0;
+ if(opcode & 0x0008) m_b = 0;
+ if(opcode & 0x0010) m_d = 0;
+ break;
- GETGPR(sub) = imm;
- }
- break;
+ case 1:
+ // clr1 - flags mapping unknown
+ break;
- case 0x13: /* LDIMM r1x */
- {
- uint32_t sub = (opcode>>24) & 0x03;
- uint32_t imm = opcode & 0xffffff;
-
- if ( sub == 0 ) /* R12 */
- GETGPR(12) = imm;
- else if ( sub == 1 ) /* R13 */
- GETGPR(13) = imm;
- else
- logerror( "TGP: Unknown LDIMM r12 (sub=%d) at PC:%04x\n", sub, GETPC() );
+ case 2: {
+ // rep
+ u8 r = opcode & 0x8000 ? read_reg(opcode) : opcode;
+ if(m_stall) goto do_stall;
+ m_r = r;
+ goto rep_start;
}
- break;
- case 0x14: /* LDIMM m,e */
- {
- uint32_t sub = (opcode>>24) & 0x03;
- uint32_t imm = opcode & 0xffffff;
+ case 3:
+ // set - flags mapping unknown
+ // 0800 = enable interrupt flag
+ break;
- if ( sub == 0 ) /* A */
- {
- GETA().u = imm;
- }
- else if ( sub == 1 ) /* A.e */
- {
- GETA().u &= ~0x7f800000;
- GETA().u |= (imm & 0xff) << 23;
- }
- else if ( sub == 2 ) /* A.m */
- {
- GETA().u &= 0x7f800000;
- GETA().u |= (imm & 0x7fffff ) | ((imm & 0x800000) << 8);
- }
- else
- {
- fatalerror( "TGP: Unknown LDIMM m,e (sub=%d) at PC:%04x\n", sub, GETPC() );
- }
+ default:
+ logerror("unimplemented opcode 0f/%x\n", sub2);
+ break;
}
+
+ alu_post(alu);
break;
+ }
- case 0x15: /* LDIMM m,e */
- {
- uint32_t sub = (opcode>>24) & 0x03;
- uint32_t imm = opcode & 0xffffff;
-
- if ( sub == 0 ) /* B.e again? */
- {
- //GETB().u = ((imm & 0x7f) << 23) | ((imm & 0xff) << 8) | ( imm & 0xff );
- GETB().u &= ~0x7f800000;
- GETB().u |= (imm & 0xff) << 23;
- }
- else if ( sub == 1 ) /* B.e */
- {
- GETB().u &= ~0x7f800000;
- GETB().u |= (imm & 0xff) << 23;
- }
- else if ( sub == 2 ) /* B.m */
- {
- GETB().u &= 0x7f800000;
- GETB().u |= (imm & 0x7fffff ) | ((imm & 0x800000) << 8);
- }
- else
- {
- fatalerror( "TGP: Unknown LDIMM m,e (sub=%d) at PC:%04x\n", sub, GETPC() );
- }
- }
+ case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: {
+ // ldi
+ write_reg(opcode >> 24, s24_32(opcode));
break;
+ }
- case 0x16: /* LDIMM m,e */
- {
- uint32_t sub = (opcode>>24) & 0x03;
- uint32_t imm = opcode & 0xffffff;
+ case 0x2f: case 0x3f: {
+ // Conditional branch of every kind
+ u32 cond = ( opcode >> 20 ) & 0x1f;
+ u32 subtype = ( opcode >> 17 ) & 7;
+ u32 data = opcode & 0xffff;
+ bool invert = opcode & 0x40000000;
- if ( sub == 1 ) /* clear + D.m */
- {
- GETD().u = (imm & 0x7fffff ) | ((imm & 0x800000) << 8);
- }
- else if ( sub == 2 ) /* D.e */
- {
- GETD().u &= ~0x7f800000;
- GETD().u |= (imm & 0xff) << 23;
- }
- else if ( sub == 3 ) /* D.m */
- {
- GETD().u &= 0x7f800000;
- GETD().u |= (imm & 0x7fffff ) | ((imm & 0x800000) << 8);
- }
- else
- {
- fatalerror( "TGP: Unknown LDIMM m,e (sub=%d) at PC:%04x\n", sub, GETPC() );
- }
- }
- break;
+ bool cond_passed = false;
- case 0x17: /* LDIMM special reg */
- {
- uint32_t sub = (opcode>>24) & 0x03;
- uint32_t imm = opcode & 0xffffff;
+ switch(cond) {
+ case 0x00: // zrd - d zero
+ cond_passed = m_st & F_ZRD;
+ break;
- if ( sub == 0x03 )
- {
- GETSHIFT() = imm;
- }
- else
- {
- logerror( "TGP: Unknown LDIMM special reg (sub=%d) at PC:%04x\n", sub, GETPC() );
- }
- }
- break;
+ case 0x01: // ged - d >= 0
+ cond_passed = !(m_st & F_SGD);
+ break;
- case 0x18: /* LDIMM external reg */
- {
- uint32_t sub = (opcode>>24) & 0x03;
- uint32_t imm = opcode & 0xffffff;
+ case 0x02: // led - d <= 0
+ cond_passed = m_st & (F_ZRD | F_SGD);
+ break;
- if ( sub == 0x03 )
- {
- GETEB() = imm;
- }
- else
- {
- fatalerror( "TGP: Unknown LDIMM external reg (sub=%d) at PC:%04x\n", sub, GETPC() );
- }
- }
- break;
+ case 0x0a: // gpio0
+ cond_passed = m_gpio0;
+ break;
- case 0x1d: //LDIMM to Rep regs
- {
- uint32_t sub = (opcode>>24)&0x3;
- uint32_t imm = opcode&0xffffff;
- if(sub == 0x00)
- {
- GETREPCNT() = imm;
- }
- else
- {
- fatalerror( "TGP: Unknown LDIMM REPCnt (sub=%d) at PC:%04x\n", sub, GETPC() );
- }
- }
- break;
+ case 0x0b: // gpio1
+ cond_passed = m_gpio1;
+ break;
- case 0x2f: /* Conditional Branches */
- {
- uint32_t cond = ( opcode >> 20 ) & 0x1f;
- uint32_t subtype = ( opcode >> 16 ) & 0x0f;
- uint32_t data = opcode & 0xffff;
-
- if( COND( cond) )
- {
- switch( subtype )
- {
- case 0x00: /* BRIF <addr> */
- GETPC() = data - 1;
- break;
-
- case 0x02: /* BRIF indirect */
- data = GETREGS(data&0x7f,0) - 1;
-
- /* if we're waiting for data, don't complete the instruction */
- if ( GETFIFOWAIT() )
- break;
-
- GETPC() = data;
- break;
-
- case 0x04: /* BSIF <addr> */
- GETPCS()[GETPCSP()] = GETPC();
- GETPCSP()++;
- GETPC() = data - 1;
- break;
-
- case 0x06: /* BSIF indirect */
- GETPCS()[GETPCSP()] = GETPC();
- GETPCSP()++;
- if ( data & 0x4000 )
- data = GETREGS(data&0x7f,0) - 1;
- else
- data = ((GETARAM()[data&0x3ff])&0xffff)-1;
-
- /* if we're waiting for data, don't complete the instruction */
- if ( GETFIFOWAIT() )
- break;
-
- GETPC() = data;
- break;
-
- case 0x0a: /* RTIF */
- --GETPCSP();
- GETPC() = GETPCS()[GETPCSP()];
- break;
-
- case 0x0c: /* LDIF */
- SETREGS(((data>>9)&0x7f), GETARAM()[data&0x1FF] );
- break;
-
- case 0x0e: /* RIIF */
- fatalerror( "TGP: RIIF unimplemented at PC:%04x\n", GETPC() );
-
- default:
- fatalerror( "TGP: Unknown Branch opcode (subtype=%d) at PC:%04x\n", subtype, GETPC() );
- }
- }
- }
- break;
+ case 0x0c: // gpio2
+ cond_passed = m_gpio2;
+ break;
- case 0x3f: /* Inverse Conditional Branches */
- {
- uint32_t cond = ( opcode >> 20 ) & 0x1f;
- uint32_t subtype = ( opcode >> 16 ) & 0x0f;
- uint32_t data = opcode & 0xffff;
+ case 0x10: // zc0 - c0 == 1
+ cond_passed = !(m_st & F_ZC0);
+ break;
- if( !COND( cond) )
- {
- switch( subtype )
- {
- case 0x00: /* BRUL <addr> */
- GETPC() = data - 1;
- break;
+ case 0x11: // zc1 - c1 == 1
+ cond_passed = !(m_st & F_ZC1);
+ break;
- case 0x02: /* BRUL indirect */
- data = GETREGS(data&0x7f,0) - 1;
+ case 0x12: // gpio3
+ cond_passed = m_gpio3;
+ break;
- /* if we're waiting for data, don't complete the instruction */
- if ( GETFIFOWAIT() )
- break;
+ case 0x16: // alw - always
+ cond_passed = true;
+ break;
- GETPC() = data;
- break;
+ default:
+ logerror("unimplemented condition %x\n", cond);
+ break;
+ }
+ if(invert)
+ cond_passed = !cond_passed;
- case 0x04: /* BSUL <addr> */
- GETPCS()[GETPCSP()] = GETPC();
- GETPCSP()++;
- GETPC() = data - 1;
- break;
+ if(cond_passed) {
+ switch(subtype) {
+ case 0: // brif #adr
+ m_pc = data;
+ break;
- case 0x06: /* BSUL indirect */
- data = GETARAM()[data] - 1;
+ case 1: // brul
+ if(opcode & 0x4000) {
+ // brul reg
+ u32 v = read_reg(opcode);
+ if(m_stall) goto do_stall;
+ m_pc = v;
+ } else {
+ // brul adr
+ u32 ea = ea_pre_0(opcode);
+ u32 v = m_data->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_0(opcode);
+ m_pc = v;
+ }
+ break;
- /* if we're waiting for data, don't complete the instruction */
- if ( GETFIFOWAIT() )
- break;
+ case 2: // bsif #adr
+ pcs_push();
+ m_pc = data;
+ break;
- GETPC() = data;
- break;
+ case 3: // bsul
+ if(opcode & 0x4000) {
+ // bsul reg
+ u32 v = read_reg(opcode);
+ if(m_stall) goto do_stall;
+ pcs_push();
+ m_pc = v;
+ } else {
+ // bsul adr
+ u32 ea = ea_pre_0(opcode);
+ u32 v = m_data->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_0(opcode);
+ pcs_push();
+ m_pc = v;
+ }
+ break;
- case 0x0a: /* RTUL */
- --GETPCSP();
- GETPC() = GETPCS()[GETPCSP()];
- break;
+ case 5: // rtif #adr
+ pcs_pop();
+ break;
- case 0x0c: /* LDUL */
- SETREGS(((data>>9)&0x7f), GETARAM()[data&0x1FF] );
- break;
+ case 6: { // ldif adr, rn
+ u32 ea = ea_pre_0(opcode);
+ u32 v = m_data->read_dword(ea);
+ if(m_stall) goto do_stall;
+ ea_post_0(opcode);
+ write_reg(opcode >> 9, v);
+ break;
+ }
- case 0x0e: /* RIUL */
- fatalerror( "TGP: RIUL unimplemented at PC:%04x\n", GETPC() );
+ default:
+ logerror("unimplemented branch subtype %x\n", subtype);
+ break;
+ }
+ }
- default:
- fatalerror( "TGP: Unknown Branch opcode (subtype=%d) at PC:%04x\n", subtype, GETPC() );
+ if(subtype < 2)
+ switch(cond) {
+ case 0x10:
+ if(m_c0 != 1) {
+ m_c0 --;
+ if(m_c0 == 1)
+ m_st |= F_ZC0;
}
+ break;
+
+ case 0x11:
+ if(m_c1 != 1) {
+ m_c1 --;
+ if(m_c1 == 1)
+ m_st |= F_ZC1;
+ }
+ break;
}
- }
+
break;
+ }
- case 0x1f:
- case 0x12:
- logerror( "TGP: unknown opcode %08x at PC:%04x (%02x)\n", opcode, GETPC(),(opcode >> 26) & 0x3f );
+ default:
+ logerror("unimplemented opcode type %02x\n", (opcode >> 26) & 0x3f);
break;
-
- default:
- fatalerror( "TGP: unknown opcode %08x at PC:%04x (%02x)\n", opcode, GETPC(),(opcode >> 26) & 0x3f );
}
- if ( GETFIFOWAIT() == 0 )
- {
- if( GETREPS() == 0 )
- GETPC()++;
- else
- --GETREPS();
-
- m_icount--;
+ if(m_r != 1) {
+ m_pc = m_ppc;
+ m_r --;
}
- else
- {
- m_icount = 0;
+
+ rep_start:
+ if(0) {
+ do_stall:
+ m_pc = m_ppc;
+ m_stall = false;
}
+ m_icount--;
}
}
diff --git a/src/devices/cpu/mb86233/mb86233.h b/src/devices/cpu/mb86233/mb86233.h
index 1d25be5eae4..255b16d16e4 100644
--- a/src/devices/cpu/mb86233/mb86233.h
+++ b/src/devices/cpu/mb86233/mb86233.h
@@ -1,143 +1,137 @@
// license:BSD-3-Clause
-// copyright-holders:Ernesto Corvi
+// copyright-holders:Olivier Galibert
+
#ifndef MAME_CPU_MB86233_MB86233_H
#define MAME_CPU_MB86233_MB86233_H
#pragma once
+class mb86233_device : public cpu_device
+{
+public:
+ enum address_space_ids {
+ AS_RF = 4,
+ AS_EXTERNAL = 5
+ };
-#define MCFG_MB86233_FIFO_READ_CB(_devcb) \
- devcb = &downcast<mb86233_cpu_device &>(*device).set_fifo_read_cb(DEVCB_##_devcb);
-#define MCFG_MB86233_FIFO_READ_OK_CB(_devcb) \
- devcb = &downcast<mb86233_cpu_device &>(*device).set_fifo_read_ok_cb(DEVCB_##_devcb);
-#define MCFG_MB86233_FIFO_WRITE_CB(_devcb) \
- devcb = &downcast<mb86233_cpu_device &>(*device).set_fifo_write_cb(DEVCB_##_devcb);
-#define MCFG_MB86233_TABLE_REGION(_region) \
- downcast<mb86233_cpu_device &>(*device).set_tablergn(_region);
+ enum regs_ids {
+ REG_A, REG_B, REG_D, REG_P,
+ REG_R, REG_C0, REG_C1,
+ REG_B0, REG_B1, REG_X0, REG_X1, REG_I0, REG_I1,
+ REG_SFT, REG_VSM, REG_MASK, REG_M,
+ REG_PCS0, REG_PCS1, REG_PCS2, REG_PCS3
+ };
+ enum st_flags {
+ F_ZRC = 0x00000001,
+ F_ZRD = 0x00000002,
+ F_SGC = 0x00000004,
+ F_SGD = 0x00000008,
+ F_CPC = 0x00000010,
+ F_CPD = 0x00000020,
+ F_OVC = 0x00000040,
+ F_OVD = 0x00000080,
+ F_UNC = 0x00000100,
+ F_UND = 0x00000200,
+ F_DVZC = 0x00000400,
+ F_DVZD = 0x00000800,
+ F_CA = 0x00001000,
+ F_CPP = 0x00002000,
+ F_OVM = 0x00004000,
+ F_UNM = 0x00008000,
+ F_SIF0 = 0x00010000,
+ F_SIF1 = 0x00020000,
+ F_SOF0 = 0x00040000,
+
+ F_PIF = 0x00100000,
+ F_POF = 0x00200000,
+ F_PAIF = 0x00400000,
+ F_PAOF = 0x00800000,
+ F_F0S = 0x01000000,
+ F_F1S = 0x02000000,
+ F_IT = 0x04000000,
+ F_ZX0 = 0x08000000,
+ F_ZX1 = 0x10000000,
+ F_ZX2 = 0x20000000,
+ F_ZC0 = 0x40000000,
+ F_ZC1 = 0x80000000
+ };
-class mb86233_cpu_device : public cpu_device
-{
-public:
- // construction/destruction
- mb86233_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ mb86233_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- // configuration helpers
- template <class Object> devcb_base &set_fifo_read_cb(Object &&cb) { return m_fifo_read_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_fifo_read_ok_cb(Object &&cb) { return m_fifo_read_ok_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_fifo_write_cb(Object &&cb) { return m_fifo_write_cb.set_callback(std::forward<Object>(cb)); }
- void set_tablergn(const char *tablergn) { m_tablergn = tablergn; }
+ void stall() { m_stall = true; }
+
+ DECLARE_WRITE_LINE_MEMBER(gpio0_w);
+ DECLARE_WRITE_LINE_MEMBER(gpio1_w);
+ DECLARE_WRITE_LINE_MEMBER(gpio2_w);
+ DECLARE_WRITE_LINE_MEMBER(gpio3_w);
protected:
- // register enumeration
- enum
- {
- MB86233_PC=1,
- MB86233_A,
- MB86233_B,
- MB86233_D,
- MB86233_P,
- MB86233_REP,
- MB86233_SP,
- MB86233_EB,
- MB86233_SHIFT,
- MB86233_FLAGS,
- MB86233_R0,
- MB86233_R1,
- MB86233_R2,
- MB86233_R3,
- MB86233_R4,
- MB86233_R5,
- MB86233_R6,
- MB86233_R7,
- MB86233_R8,
- MB86233_R9,
- MB86233_R10,
- MB86233_R11,
- MB86233_R12,
- MB86233_R13,
- MB86233_R14,
- MB86233_R15
- };
+ mb86233_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
- // device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
- // device_execute_interface overrides
virtual uint32_t execute_min_cycles() const override { return 1; }
- virtual uint32_t execute_max_cycles() const override { return 2; }
- virtual uint32_t execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 4; }
virtual void execute_run() override;
- // device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
-
- // device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- // device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
address_space_config m_data_config;
+ address_space_config m_io_config;
+ address_space_config m_rf_config;
- union MB86233_REG
- {
- int32_t i;
- uint32_t u;
- float f;
- };
-
- uint16_t m_pc;
- MB86233_REG m_a;
- MB86233_REG m_b;
- MB86233_REG m_d;
- MB86233_REG m_p;
-
- uint16_t m_reps;
- uint16_t m_pcs[4];
- uint8_t m_pcsp;
- uint32_t m_eb;
- uint32_t m_shift;
- uint32_t m_repcnt;
- uint16_t m_sr;
- uint8_t m_fpucontrol;
-
- uint32_t m_gpr[16];
- uint32_t m_extport[0x30];
-
- address_space *m_program;
+ address_space *m_program, *m_data, *m_io, *m_rf;
direct_read_data<-2> *m_direct;
int m_icount;
- /* FIFO */
- int m_fifo_wait;
- devcb_read32 m_fifo_read_cb;
- devcb_read_line m_fifo_read_ok_cb;
- devcb_write32 m_fifo_write_cb;
- const char *m_tablergn;
-
- /* internal RAM */
- uint32_t m_RAM[2 * 0x200];
- uint32_t *m_ARAM, *m_BRAM;
- uint32_t *m_Tables;
-
- void FLAGSF( float v );
- void FLAGSI( uint32_t v );
- int COND( uint32_t cond );
- void ALU( uint32_t alu);
- uint32_t ScaleExp(unsigned int v,int scale);
- uint32_t GETEXTERNAL( uint32_t EB, uint32_t offset );
- void SETEXTERNAL( uint32_t EB, uint32_t offset, uint32_t value );
- uint32_t GETREGS( uint32_t reg, int source );
- void SETREGS( uint32_t reg, uint32_t val );
- uint32_t INDIRECT( uint32_t reg, int source );
+ u32 m_st, m_a, m_b, m_d, m_p;
+ u32 m_alu_stmask, m_alu_stset, m_alu_r1, m_alu_r2;
+ u16 m_ppc, m_pc, m_sp, m_b0, m_b1, m_x0, m_x1, m_i0, m_i1, m_vsmr, m_pcs[4], m_mask, m_m;
+ u8 m_r, m_rpc, m_c0, m_c1, m_sft, m_vsm;
+ bool m_gpio0, m_gpio1, m_gpio2, m_gpio3;
+
+ bool m_stall;
+
+ static s32 s24_32(u32 val);
+ static u32 set_exp(u32 val, u32 exp);
+ static u32 set_mant(u32 val, u32 mant);
+ static u32 get_exp(u32 val);
+ static u32 get_mant(u32 val);
+
+ void testdz();
+ void alu_update_st();
+ void alu_pre(u32 alu);
+ void alu_post(u32 alu);
+ u16 ea_pre_0(u32 r);
+ void ea_post_0(u32 r);
+ u16 ea_pre_1(u32 r);
+ void ea_post_1(u32 r);
+ void pcs_push();
+ void pcs_pop();
+
+ u32 read_reg(u32 r);
+ void write_reg(u32 r, u32 v);
+ void write_mem_internal_1(u32 r, u32 v, bool bank);
+ void write_mem_external_1(u32 r, u32 v);
+ void write_mem_io_1(u32 r, u32 v);
+};
+class mb86234_device : public mb86233_device
+{
+public:
+ mb86234_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
-DECLARE_DEVICE_TYPE(MB86233, mb86233_cpu_device)
+DECLARE_DEVICE_TYPE(MB86233, mb86233_device)
+DECLARE_DEVICE_TYPE(MB86234, mb86234_device)
#endif // MAME_CPU_MB86233_MB86233_H
diff --git a/src/devices/cpu/mb86233/mb86233d.cpp b/src/devices/cpu/mb86233/mb86233d.cpp
index 8433247dbc7..c49f01c3bba 100644
--- a/src/devices/cpu/mb86233/mb86233d.cpp
+++ b/src/devices/cpu/mb86233/mb86233d.cpp
@@ -1,5 +1,5 @@
// license:BSD-3-Clause
-// copyright-holders:Ernesto Corvi
+// copyright-holders:Olivier Galibert
#include "emu.h"
#include "mb86233d.h"
@@ -15,47 +15,54 @@
2 <register file>
3 sio0 si1 pio pioa rpc - - - pad mod ear st mask tim cx dx
+ In the 86233/86234 the C, page, serial, parallel, timer registers
+ don't seem to exist. The register file is turned into i/o ports.
+ Of the second bank part '3', only "mask" is actually used.
- Address encoding:
+ Address encoding (adx uses x0/b0, ady uses x1/b1):
0 0aaa aaaa $a
0 1aaa aaaa $a(xn)
1 0aaa aaaa $a(xn+)
- 1 100b bbbb (xn+$b)
- 1 101b bbbb (bxn+$b)
- 1 110b bbbb [xn+$b]
- 1 111b bbbb [bxn+$b]
+ 1 100b bbbb (bxn+$b)
+ 1 101b bbbb (xn+$b)
+ 1 110b bbbb [bxn+$b]
+ 1 111b bbbb [xn+$b]
3322 2222 2222 1111 1111 1100 0000 0000
1098 7654 3210 9876 5432 1098 7654 3210
- 0000 00aa aaao ooyy yyyy yyyx xxxx xxxx lab
+ 0000 00aa aaa0 00yy yyyy yyyx xxxx xxxx lab adx, ady (e)
+ 0000 00aa aaa0 11yy yyyy yyyx xxxx xxxx lab adx, ady + 0x200
+ 0000 00aa aaa1 00yy yyyy yyyx xxxx xxxx lab adx + 0x200, ady
- 0000 00aa aaa0 11yy yyyy yyyx xxxx xxxx lab adx (e), ady
- 0000 00aa aaa1 00yy yyyy yyyx xxxx xxxx lab adx, ady (e)
-
- 0001 11aa aaa0 10yy yyyy yyyx xxxx xxxx mov adx, ady
- 0001 11aa aaa0 11yy yyyy yyyx xxxx xxxx mov adx (e), ady
- 0001 11aa aaa1 00yy yyyy yyyx xxxx xxxx mov adx, ady (e)
+ 0001 11aa aaa0 0?yy yyyy yyyx xxxx xxxx mov adx, ady (e) (the ? is not a + 0x200 select, cf. VR copro code)
+ 0001 11aa aaa0 10yy yyyy yyyx xxxx xxxx mov adx (e), ady
+ 0001 11aa aaa0 11yy yyyy yyyx xxxx xxxx mov adx, ady + 0x200
+ 0001 11aa aaa1 00yy yyyy yyyx xxxx xxxx mov adx + 0x200, ady
0001 11aa aaa1 01yy yyyy yyyx xxxx xxxx mov adx (o), ady
- 0001 11aa aaa1 1100 0rrr rrry yyyy yyyy mov r, ady (e)
- 0001 11aa aaa1 1100 1rrr rrry yyyy yyyy mov r, ady
- 0001 11aa aaa1 1101 1rrr rrrx xxxx xxxx mov adx (e), r
- 0001 11aa aaa1 1110 0rrr rrrx xxxx xxxx mov adx, r
+
+ 0001 11aa aaa1 1100 0rrr rrry yyyy yyyy mov r, ady
+ 0001 11aa aaa1 1100 1rrr rrry yyyy yyyy mov r, ady (e)
+ 0001 11aa aaa1 1101 0rrr rrry yyyy yyyy mov ady + 0x200, r
+ 0001 11aa aaa1 1101 1rrr rrry yyyy yyyy mov ady, r
+ 0001 11aa aaa1 1110 0rrr rrry yyyy yyyy mov ady (e), r
0001 11aa aaa1 1110 1rrr rrrx xxxx xxxx mov adx (o), r
0001 11aa aaa1 1111 0rrr rrr. ..ss ssss mov s, r
+ 0011 011. .... 101. vvvv vvvv vvvv vvvv stmh (bit0 = fp, bit 1-2 = rounding mode, rest unused)
+
0011 10rr vvvv vvvv vvvv vvvv vvvv vvvv lipl/lia/lib/lid #v
- 0011 11aa aaa. 000. rrrr rrrr rrrr rrrr clr0 <reglist>
- 0011 11aa aaa. 001. ffff ffff ffff ffff clr1 flags
- 0011 11aa aaa. 010. 0... .... nnnn nnnn rep #n
- 0011 11aa aaa. 010. 1... .... ..11 0100 rep rpc
- 0011 11aa aaa. 011. ffff ffff ffff ffff set flags
+ 0011 11.a aaaa 000. rrrr rrrr rrrr rrrr clr0 <reglist>
+ 0011 11.a aaaa 001. ffff ffff ffff ffff clr1 flags
+ 0011 11.a aaaa 010. 0... .... nnnn nnnn rep #n (0 = 0x100)
+ 0011 11.a aaaa 010. 1... .... ..11 0100 rep rpc
+ 0011 11.a aaaa 011. ffff ffff ffff ffff set flags
- 010r rrrr .... .... vvvv vvvv vvvv vvvv ldi #v, b0/.../- (bank 0/1) (h/l is special and targets exponent/mantissa size 8/24)
+ 01rr rrrr vvvv vvvv vvvv vvvv vvvv vvvv ldi #v, r (actual v size varies 3-24 depending on register)
1i11 11.c cccc 0000 aaaa aaaa aaaa aaaa brif cond #a
1i11 11.c cccc 0010 .0.. ...x xxxx xxxx brul cond (adx)
@@ -65,10 +72,17 @@
1i11 11.c cccc 0110 .1.. .... ...r rrrr bsul cond r
1i11 11.c cccc 1010 .... .... .... .... rtif cond
1i11 11.c cccc 1100 .rrr rrrx xxxx xxxx ldif cond adx, r
- 1011 11.c 0110 1110 .... .... .... .... iret
+ 1011 11.1 0110 1110 .... .... .... .... iret
Top 3 bits = instruction group, except when it isn't.
+
+ Conditions are 5 bits, but only a subset is known, see condition()
+
+ Alu can theorically be on C or D registers, but since C doesn't
+ exist, we don't know how C access is encoded. The operation
+ itself is 5-bits for the "full" alu range.
+
*/
@@ -109,24 +123,28 @@ std::string mb86233_disassembler::regs(u32 reg)
return regnames[reg & 0x3f];
}
-std::string mb86233_disassembler::memory(u32 reg, bool x1)
+std::string mb86233_disassembler::memory(u32 reg, bool x1, bool bank)
{
std::ostringstream stream;
switch(reg & 0x180) {
case 0x000:
- if((reg & 0x7f) < 10)
- util::stream_format(stream, "$%d", reg & 0x7f );
+ if(bank)
+ util::stream_format(stream, "$0x%x", 0x200 | (reg & 0x7f));
+ else if((reg & 0x7f) < 10)
+ util::stream_format(stream, "$%d", reg & 0x7f);
else
- util::stream_format(stream, "$0x%x", reg & 0x7f );
+ util::stream_format(stream, "$0x%x", reg & 0x7f);
break;
case 0x080:
- if(reg & 0x7f) {
- if((reg & 0x7f) < 10)
- util::stream_format(stream, "$%d", reg & 0x7f );
+ if(bank || (reg & 0x7f)) {
+ if(bank)
+ util::stream_format(stream, "$0x%x", 0x200 | (reg & 0x7f));
+ else if((reg & 0x7f) < 10)
+ util::stream_format(stream, "$%d", reg & 0x7f);
else
- util::stream_format(stream, "$0x%x", reg & 0x7f );
+ util::stream_format(stream, "$0x%x", reg & 0x7f);
}
stream << '(';
@@ -139,8 +157,14 @@ std::string mb86233_disassembler::memory(u32 reg, bool x1)
break;
case 0x100:
- if(reg & 0x7f)
- util::stream_format(stream, "$0x%x", reg & 0x7f );
+ if(bank || (reg & 0x7f)) {
+ if(bank)
+ util::stream_format(stream, "$0x%x", 0x200 | (reg & 0x7f));
+ else if((reg & 0x7f) < 10)
+ util::stream_format(stream, "$%d", reg & 0x7f);
+ else
+ util::stream_format(stream, "$0x%x", reg & 0x7f);
+ }
stream << '(';
@@ -152,7 +176,7 @@ std::string mb86233_disassembler::memory(u32 reg, bool x1)
break;
case 0x180:
- stream << (reg & 0x40 ? "$[" : "$(");
+ stream << (reg & 0x40 ? "[" : "(");
if(x1) {
if(!(reg & 0x20))
util::stream_format(stream, "bx1");
@@ -179,6 +203,10 @@ std::string mb86233_disassembler::memory(u32 reg, bool x1)
}
stream << (reg & 0x40 ? ']' : ')');
+
+ if(bank)
+ stream << "+0x200";
+
break;
}
@@ -204,13 +232,14 @@ std::string mb86233_disassembler::alu0_func(u32 alu)
case 0x0b: util::stream_format(stream, "fabd"); break;
case 0x0c: util::stream_format(stream, "fsmd"); break;
case 0x0d: util::stream_format(stream, "fspd"); break;
- case 0x0e: util::stream_format(stream, "cifd"); break;
- case 0x0f: util::stream_format(stream, "cfid"); break;
+ case 0x0e: util::stream_format(stream, "cxfd"); break;
+ case 0x0f: util::stream_format(stream, "cfxd"); break;
case 0x10: util::stream_format(stream, "fdvd"); break;
case 0x11: util::stream_format(stream, "fned"); break;
// 12
case 0x13: util::stream_format(stream, "d=b+a"); break;
case 0x14: util::stream_format(stream, "d=b-a"); break;
+ // 15
case 0x16: util::stream_format(stream, "lsrd"); break;
case 0x17: util::stream_format(stream, "lsld"); break;
case 0x18: util::stream_format(stream, "asrd"); break;
@@ -243,19 +272,19 @@ offs_t mb86233_disassembler::disassemble(std::ostream &stream, offs_t pc, const
switch(op) {
case 0:
- util::stream_format(stream, "lab %s, %s (io)", memory(r1, false), memory(r2, true));
+ util::stream_format(stream, "lab %s, %s (e)", memory(r1, false, false), memory(r2, true, false));
break;
case 3:
- util::stream_format(stream, "lab %s, %s", memory(r1, false), memory(r2, true));
+ util::stream_format(stream, "lab %s, %s", memory(r1, false, false), memory(r2, true, true));
break;
case 4:
- util::stream_format(stream, "lab %s, %s (e)", memory(r1, false), memory(r2, true));
+ util::stream_format(stream, "lab %s, %s", memory(r1, false, true), memory(r2, true, false));
break;
default:
- util::stream_format(stream, "lab {%d} %s, %s", op, memory(r1, false), memory(r2, true));
+ util::stream_format(stream, "lab {%d} %s, %s", op, memory(r1, false, false), memory(r2, true, false));
break;
}
break;
@@ -278,53 +307,53 @@ offs_t mb86233_disassembler::disassemble(std::ostream &stream, offs_t pc, const
switch(op) {
case 0:
- util::stream_format(stream, "mov %s, %s", memory(r1, false), memory(r2, true));
+ util::stream_format(stream, "mov {0} %s, %s (e)", memory(r1, false, false), memory(r2, true, false));
break;
case 1:
- util::stream_format(stream, "mov %s, %s (io)", memory(r1, false), memory(r2, true));
+ util::stream_format(stream, "mov {1} %s, %s (e)", memory(r1, false, false), memory(r2, true, false));
break;
case 2:
- util::stream_format(stream, "mov %s (io), %s", memory(r1, false), memory(r2, true));
+ util::stream_format(stream, "mov %s (e), %s", memory(r1, false, false), memory(r2, true, false));
break;
case 3:
- util::stream_format(stream, "mov %s, %s (e)", memory(r1, false), memory(r2, true));
+ util::stream_format(stream, "mov %s, %s", memory(r1, false, false), memory(r2, true, true));
break;
case 4:
- util::stream_format(stream, "mov %s (e), %s", memory(r1, false), memory(r2, true));
+ util::stream_format(stream, "mov %s, %s", memory(r1, false, true), memory(r2, true, false));
break;
case 5:
- util::stream_format(stream, "mov %s (o), %s", memory(r1, false), memory(r2, true));
+ util::stream_format(stream, "mov %s (o), %s", memory(r1, false, false), memory(r2, true, false));
break;
case 7: {
switch(r2 >> 6) {
case 0:
- util::stream_format(stream, "mov %s, %s", regs(r2 & 0x3f), memory(r1, true));
+ util::stream_format(stream, "mov %s, %s", regs(r2 & 0x3f), memory(r1, true, false));
break;
case 1:
- util::stream_format(stream, "mov %s, %s (io)", regs(r2 & 0x3f), memory(r1, true));
+ util::stream_format(stream, "mov %s, %s (e)", regs(r2 & 0x3f), memory(r1, true, false));
break;
case 2:
- util::stream_format(stream, "mov %s (e), %s", memory(r1, false), regs(r2 & 0x3f));
+ util::stream_format(stream, "mov %s, %s", memory(r1, true, true), regs(r2 & 0x3f));
break;
case 3:
- util::stream_format(stream, "mov %s, %s", memory(r1, false), regs(r2 & 0x3f));
+ util::stream_format(stream, "mov %s, %s", memory(r1, true, false), regs(r2 & 0x3f));
break;
case 4:
- util::stream_format(stream, "mov %s (io), %s", memory(r1, false), regs(r2 & 0x3f));
+ util::stream_format(stream, "mov %s (e), %s", memory(r1, true, false), regs(r2 & 0x3f));
break;
case 5:
- util::stream_format(stream, "mov %s (o), %s", memory(r1, false), regs(r2 & 0x3f));
+ util::stream_format(stream, "mov %s (o), %s", memory(r1, false, false), regs(r2 & 0x3f));
break;
case 6:
@@ -335,13 +364,33 @@ offs_t mb86233_disassembler::disassemble(std::ostream &stream, offs_t pc, const
break;
default:
- util::stream_format(stream, "mov {r2 %d} %s, %s", r2 >> 6, memory(r1, true), regs(r2 & 0x3f));
+ util::stream_format(stream, "mov {r2 %d} %s, %s", r2 >> 6, memory(r1, false, false), regs(r2 & 0x3f));
break;
}
break;
}
default:
- util::stream_format(stream, "mov {%d} %s, %s", op, memory(r1, false), memory(r2, true));
+ util::stream_format(stream, "mov {%d} %s, %s", op, memory(r1, false, false), memory(r2, true, false));
+ break;
+ }
+ break;
+ }
+
+ case 0x0d: { // stm/clm
+ u32 sub2 = (opcode >> 17) & 7;
+
+ switch(sub2) {
+ case 5: {
+ util::stream_format(stream, "stmh");
+ if(opcode & 0x0001)
+ util::stream_format(stream, " fp");
+ static const char *const round_mode[4] = { "rn", "rp", "rm", "rz" };
+ util::stream_format(stream, " %s", round_mode[(opcode >> 1) & 3]);
+ break;
+ }
+
+ default:
+ util::stream_format(stream, "unk %02x.%x", opcode >> 26, sub2);
break;
}
break;
@@ -354,7 +403,7 @@ offs_t mb86233_disassembler::disassemble(std::ostream &stream, offs_t pc, const
}
case 0x0f: { // rep/clr0/clr1/set
- u32 alu = (opcode >> 21) & 0x1f;
+ u32 alu = (opcode >> 20) & 0x1f;
u32 sub2 = (opcode >> 17) & 7;
if(alu)
@@ -405,6 +454,7 @@ offs_t mb86233_disassembler::disassemble(std::ostream &stream, offs_t pc, const
}
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
util::stream_format(stream, "ldi #0x%x, %s", opcode & 0xffffff, regnames[(opcode >> 24) & 0x3f]); break;
break;
@@ -424,7 +474,7 @@ offs_t mb86233_disassembler::disassemble(std::ostream &stream, offs_t pc, const
if(opcode & 0x4000)
util::stream_format(stream, "%s", regs(opcode & 0x1f));
else
- util::stream_format(stream, "(%s)", memory(opcode & 0x1ff, false));
+ util::stream_format(stream, "(%s)", memory(opcode & 0x1ff, false, false));
break;
case 2:
@@ -436,7 +486,7 @@ offs_t mb86233_disassembler::disassemble(std::ostream &stream, offs_t pc, const
if(opcode & 0x4000)
util::stream_format(stream, "%s", regs(opcode & 0x1f));
else
- util::stream_format(stream, "(%s)", memory(opcode & 0x1ff, false));
+ util::stream_format(stream, "(%s)", memory(opcode & 0x1ff, false, false));
break;
case 5:
@@ -444,7 +494,7 @@ offs_t mb86233_disassembler::disassemble(std::ostream &stream, offs_t pc, const
break;
case 6:
- util::stream_format(stream, "ldif %s %s, %s", condition(cond, invert), memory(data & 0x1ff, false), regs((data >> 9) & 0x3f));
+ util::stream_format(stream, "ldif %s %s, %s", condition(cond, invert), memory(data & 0x1ff, false, false), regs((data >> 9) & 0x3f));
break;
case 7:
diff --git a/src/devices/cpu/mb86233/mb86233d.h b/src/devices/cpu/mb86233/mb86233d.h
index 50a48a6f0a9..bd475e061b6 100644
--- a/src/devices/cpu/mb86233/mb86233d.h
+++ b/src/devices/cpu/mb86233/mb86233d.h
@@ -19,7 +19,7 @@ private:
static const char *const regnames[0x40];
static std::string condition(unsigned int cond, bool invert);
static std::string regs(u32 reg);
- static std::string memory(u32 reg, bool x1);
+ static std::string memory(u32 reg, bool x1, bool bank);
static std::string alu0_func(u32 alu);
};
diff --git a/src/devices/cpu/mb86235/mb86235.cpp b/src/devices/cpu/mb86235/mb86235.cpp
index 0987b1e1b20..670571e6fce 100644
--- a/src/devices/cpu/mb86235/mb86235.cpp
+++ b/src/devices/cpu/mb86235/mb86235.cpp
@@ -263,6 +263,9 @@ mb86235_device::mb86235_device(const machine_config &mconfig, const char *tag, d
, m_program_config("program", ENDIANNESS_LITTLE, 64, 32, -3)
, m_dataa_config("data_a", ENDIANNESS_LITTLE, 32, 24, -2, address_map_constructor(FUNC(mb86235_device::internal_abus), this))
, m_datab_config("data_b", ENDIANNESS_LITTLE, 32, 10, -2, address_map_constructor(FUNC(mb86235_device::internal_bbus), this))
+ , m_fifoin(*this, finder_base::DUMMY_TAG)
+ , m_fifoout0(*this, finder_base::DUMMY_TAG)
+ , m_fifoout1(*this, finder_base::DUMMY_TAG)
, m_cache(CACHE_SIZE + sizeof(mb86235_internal_state))
, m_drcuml(nullptr)
, m_drcfe(nullptr)
@@ -292,55 +295,3 @@ std::unique_ptr<util::disasm_interface> mb86235_device::create_disassembler()
{
return std::make_unique<mb86235_disassembler>();
}
-
-
-void mb86235_device::fifoin_w(uint32_t data)
-{
- if (m_core->fifoin.num >= FIFOIN_SIZE)
- {
- fatalerror("fifoin_w: pushing to full fifo");
- }
-
- //printf("FIFOIN push %08X\n", data);
-
- m_core->fifoin.data[m_core->fifoin.wpos] = data;
-
- m_core->fifoin.wpos++;
- m_core->fifoin.wpos &= FIFOIN_SIZE-1;
- m_core->fifoin.num++;
-}
-
-bool mb86235_device::is_fifoin_empty()
-{
- return m_core->fifoin.num == 0;
-}
-
-bool mb86235_device::is_fifoin_full()
-{
- return m_core->fifoin.num >= FIFOIN_SIZE;
-}
-
-uint32_t mb86235_device::fifoout0_r()
-{
- if (m_core->fifoout0.num == 0)
- {
- fatalerror("fifoout0_r: reading from empty fifo");
- }
-
- uint32_t data = m_core->fifoout0.data[m_core->fifoout0.rpos];
-
- m_core->fifoout0.rpos++;
- m_core->fifoout0.rpos &= FIFOOUT0_SIZE - 1;
- m_core->fifoout0.num--;
- return data;
-}
-
-bool mb86235_device::is_fifoout0_full()
-{
- return m_core->fifoout0.num >= FIFOOUT0_SIZE;
-}
-
-bool mb86235_device::is_fifoout0_empty()
-{
- return m_core->fifoout0.num == 0;
-}
diff --git a/src/devices/cpu/mb86235/mb86235.h b/src/devices/cpu/mb86235/mb86235.h
index 73ee7fcb07f..dc583dd9b84 100644
--- a/src/devices/cpu/mb86235/mb86235.h
+++ b/src/devices/cpu/mb86235/mb86235.h
@@ -13,10 +13,21 @@
#include "cpu/drcfe.h"
#include "cpu/drcuml.h"
+#include "machine/gen_fifo.h"
+
+#define MCFG_MB86235_FIFOIN(tag) \
+ downcast<mb86235_device &>(*device).set_fifoin_tag(tag);
+
+#define MCFG_MB86235_FIFOOUT0(tag) \
+ downcast<mb86235_device &>(*device).set_fifoout0_tag(tag);
+
+#define MCFG_MB86235_FIFOOUT1(tag) \
+ downcast<mb86235_device &>(*device).set_fifoout1_tag(tag);
class mb86235_frontend;
+
class mb86235_device : public cpu_device
{
friend class mb86235_frontend;
@@ -25,6 +36,10 @@ public:
// construction/destruction
mb86235_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t clock);
+ void set_fifoin_tag(const char *tag) { m_fifoin.set_tag(tag); }
+ void set_fifoout0_tag(const char *tag) { m_fifoout0.set_tag(tag); }
+ void set_fifoout1_tag(const char *tag) { m_fifoout1.set_tag(tag); }
+
void unimplemented_op();
void unimplemented_alu();
void unimplemented_control();
@@ -33,13 +48,6 @@ public:
void pcs_overflow();
void pcs_underflow();
- void fifoin_w(uint32_t data);
- bool is_fifoin_full();
- bool is_fifoin_empty();
- uint32_t fifoout0_r();
- bool is_fifoout0_empty();
- bool is_fifoout0_full();
-
enum
{
MB86235_PC = 1,
@@ -53,10 +61,6 @@ public:
MB86235_ST
};
- static constexpr int FIFOIN_SIZE = 16;
- static constexpr int FIFOOUT0_SIZE = 16;
- static constexpr int FIFOOUT1_SIZE = 16;
-
void internal_abus(address_map &map);
void internal_bbus(address_map &map);
protected:
@@ -102,14 +106,6 @@ private:
uint32_t md;
};
- struct fifo
- {
- int rpos;
- int wpos;
- int num;
- uint32_t data[16];
- };
-
struct fifo_state
{
uint32_t pc;
@@ -164,9 +160,6 @@ private:
float fp0;
bool delay_slot;
- fifo fifoin;
- fifo fifoout0;
- fifo fifoout1;
fifo_state cur_fifo_state;
};
@@ -177,18 +170,16 @@ private:
uml::code_handle *m_entry; /* entry point */
uml::code_handle *m_nocode; /* nocode exception handler */
uml::code_handle *m_out_of_cycles; /* out of cycles exception handler */
- uml::code_handle *m_clear_fifo_in;
- uml::code_handle *m_clear_fifo_out0;
- uml::code_handle *m_clear_fifo_out1;
- uml::code_handle *m_read_fifo_in;
- uml::code_handle *m_write_fifo_out0;
- uml::code_handle *m_write_fifo_out1;
uml::code_handle *m_read_abus;
uml::code_handle *m_write_abus;
address_space_config m_program_config;
address_space_config m_dataa_config;
address_space_config m_datab_config;
+ optional_device<generic_fifo_u32_device> m_fifoin;
+ optional_device<generic_fifo_u32_device> m_fifoout0;
+ optional_device<generic_fifo_u32_device> m_fifoout1;
+
drc_cache m_cache;
std::unique_ptr<drcuml_state> m_drcuml;
std::unique_ptr<mb86235_frontend> m_drcfe;
@@ -216,7 +207,6 @@ private:
void static_generate_entry_point();
void static_generate_nocode_handler();
void static_generate_out_of_cycles();
- void static_generate_fifo();
void static_generate_memory_accessors();
void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception);
@@ -244,6 +234,19 @@ private:
bool aluop_has_result(int aluop);
bool check_previous_op_stall();
+ // UML is sad...
+ u32 m_cur_value;
+
+ static void clear_fifoin(void *param);
+ static void clear_fifoout0(void *param);
+ static void clear_fifoout1(void *param);
+ static void read_fifoin(void *param);
+ static void write_fifoout0(void *param);
+ static void write_fifoout1(void *param);
+ static void empty_fifoin(void *param);
+ static void full_fifoout0(void *param);
+ static void full_fifoout1(void *param);
+
// interpreter
void execute_op(uint32_t h, uint32_t l);
void do_alu1(uint32_t h, uint32_t l);
diff --git a/src/devices/cpu/mb86235/mb86235drc.cpp b/src/devices/cpu/mb86235/mb86235drc.cpp
index d1682d0e024..12e0ab60650 100644
--- a/src/devices/cpu/mb86235/mb86235drc.cpp
+++ b/src/devices/cpu/mb86235/mb86235drc.cpp
@@ -78,17 +78,6 @@
#define MU_CALC_REQUIRED ((desc->regreq[1] & 0x1000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
#define MD_CALC_REQUIRED ((desc->regreq[1] & 0x2000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define FIFOIN_RPOS uml::mem(&m_core->fifoin.rpos)
-#define FIFOIN_WPOS uml::mem(&m_core->fifoin.wpos)
-#define FIFOIN_NUM uml::mem(&m_core->fifoin.num)
-#define FIFOOUT0_RPOS uml::mem(&m_core->fifoout0.rpos)
-#define FIFOOUT0_WPOS uml::mem(&m_core->fifoout0.wpos)
-#define FIFOOUT0_NUM uml::mem(&m_core->fifoout0.num)
-#define FIFOOUT1_RPOS uml::mem(&m_core->fifoout1.rpos)
-#define FIFOOUT1_WPOS uml::mem(&m_core->fifoout1.wpos)
-#define FIFOOUT1_NUM uml::mem(&m_core->fifoout1.num)
-
-
inline void mb86235_device::alloc_handle(uml::code_handle *&handleptr, const char *name)
{
if (!handleptr)
@@ -390,89 +379,58 @@ void mb86235_device::static_generate_out_of_cycles()
block.end();
}
-void mb86235_device::static_generate_fifo()
+void mb86235_device::clear_fifoin(void *param)
{
- {
- // clear fifo in
- drcuml_block &block(m_drcuml->begin_block(20));
-
- alloc_handle(m_clear_fifo_in, "clear_fifo_in");
- UML_HANDLE(block, *m_clear_fifo_in);
- UML_MOV(block, FIFOIN_NUM, 0);
- UML_MOV(block, FIFOIN_RPOS, 0);
- UML_MOV(block, FIFOIN_WPOS, 0);
- UML_RET(block);
+ mb86235_device *cpu = (mb86235_device *)param;
+ cpu->m_fifoin->clear();
+}
- block.end();
- }
- {
- // clear fifo out0
- drcuml_block &block(m_drcuml->begin_block(20));
-
- alloc_handle(m_clear_fifo_out0, "clear_fifo_out0");
- UML_HANDLE(block, *m_clear_fifo_out0);
- UML_MOV(block, FIFOOUT0_NUM, 0);
- UML_MOV(block, FIFOOUT0_RPOS, 0);
- UML_MOV(block, FIFOOUT0_WPOS, 0);
- UML_RET(block);
+void mb86235_device::clear_fifoout0(void *param)
+{
+ mb86235_device *cpu = (mb86235_device *)param;
+ cpu->m_fifoout0->clear();
+}
- block.end();
- }
- {
- // clear fifo out1
- drcuml_block &block(m_drcuml->begin_block(20));
-
- alloc_handle(m_clear_fifo_out1, "clear_fifo_out1");
- UML_HANDLE(block, *m_clear_fifo_out1);
- UML_MOV(block, FIFOOUT1_NUM, 0);
- UML_MOV(block, FIFOOUT1_RPOS, 0);
- UML_MOV(block, FIFOOUT1_WPOS, 0);
- UML_RET(block);
+void mb86235_device::clear_fifoout1(void *param)
+{
+ mb86235_device *cpu = (mb86235_device *)param;
+ cpu->m_fifoout1->clear();
+}
- block.end();
- }
- {
- // read fifo in
- // I0 = return value
- drcuml_block &block(m_drcuml->begin_block(32));
- alloc_handle(m_read_fifo_in, "read_fifo_in");
- UML_HANDLE(block, *m_read_fifo_in);
- UML_MOV(block, I1, FIFOIN_RPOS);
- UML_LOAD(block, I0, m_core->fifoin.data, I1, SIZE_QWORD, SCALE_x8);
- UML_ADD(block, I1, I1, 1);
- UML_AND(block, I1, I1, FIFOIN_SIZE-1);
- UML_MOV(block, FIFOIN_RPOS, I1);
- UML_SUB(block, FIFOIN_NUM, FIFOIN_NUM, 1);
- UML_RET(block);
+void mb86235_device::read_fifoin(void *param)
+{
+ mb86235_device *cpu = (mb86235_device *)param;
+ cpu->m_cur_value = cpu->m_fifoin->pop();
+}
- block.end();
- }
- {
- // write fifo out0
- // I0 = input value
- drcuml_block &block(m_drcuml->begin_block(32));
- alloc_handle(m_write_fifo_out0, "write_fifo_out0");
- UML_HANDLE(block, *m_write_fifo_out0);
- UML_MOV(block, I1, FIFOOUT0_WPOS);
- UML_STORE(block, m_core->fifoout0.data, I1, I0, SIZE_QWORD, SCALE_x8);
- UML_ADD(block, I1, I1, 1);
- UML_AND(block, I1, I1, FIFOOUT0_SIZE - 1);
- UML_MOV(block, FIFOOUT0_WPOS, I1);
- UML_ADD(block, FIFOOUT0_NUM, FIFOOUT0_NUM, 1);
- UML_RET(block);
+void mb86235_device::write_fifoout0(void *param)
+{
+ mb86235_device *cpu = (mb86235_device *)param;
+ cpu->m_fifoout0->push(u32(cpu->m_cur_value));
+}
- block.end();
- }
- {
- // write fifo out1
- drcuml_block &block(m_drcuml->begin_block(32));
- alloc_handle(m_write_fifo_out1, "write_fifo_out1");
- UML_HANDLE(block, *m_write_fifo_out1);
- // TODO
- UML_RET(block);
+void mb86235_device::write_fifoout1(void *param)
+{
+ mb86235_device *cpu = (mb86235_device *)param;
+ cpu->m_fifoout1->push(u32(cpu->m_cur_value));
+}
- block.end();
- }
+void mb86235_device::empty_fifoin(void *param)
+{
+ mb86235_device *cpu = (mb86235_device *)param;
+ cpu->m_cur_value = cpu->m_fifoin->is_empty();
+}
+
+void mb86235_device::full_fifoout0(void *param)
+{
+ mb86235_device *cpu = (mb86235_device *)param;
+ cpu->m_cur_value = cpu->m_fifoout0->is_full();
+}
+
+void mb86235_device::full_fifoout1(void *param)
+{
+ mb86235_device *cpu = (mb86235_device *)param;
+ cpu->m_cur_value = cpu->m_fifoout1->is_full();
}
void mb86235_device::static_generate_memory_accessors()
@@ -542,9 +500,6 @@ void mb86235_device::flush_cache()
static_generate_nocode_handler();
static_generate_out_of_cycles();
- // generate utility functions
- static_generate_fifo();
-
// generate exception handlers
// generate memory accessors
@@ -690,8 +645,13 @@ void mb86235_device::generate_reg_read(drcuml_block &block, compiler_state &comp
break;
case 0x31: // FI
- UML_CALLH(block, *m_read_fifo_in);
- UML_MOV(block, dst, I0);
+ if (m_fifoin)
+ {
+ UML_CALLC(block, read_fifoin, this);
+ UML_MOV(block, dst, mem(&m_cur_value));
+ }
+ else
+ UML_MOV(block, dst, 0);
break;
default:
@@ -747,8 +707,11 @@ void mb86235_device::generate_reg_write(drcuml_block &block, compiler_state &com
break;
case 0x32: // FO0
- UML_MOV(block, I0, src);
- UML_CALLH(block, *m_write_fifo_out0);
+ if (m_fifoout0)
+ {
+ UML_MOV(block, mem(&m_cur_value), src);
+ UML_CALLC(block, write_fifoout0, this);
+ }
break;
case 0x34: // PDR
@@ -850,11 +813,12 @@ bool mb86235_device::generate_opcode(drcuml_block &block, compiler_state &compil
}
// insert FIFO IN check if needed
- if (fifoin_check)
+ if (fifoin_check && m_fifoin)
{
uml::code_label const not_empty = compiler.labelnum++;
- UML_CMP(block, FIFOIN_NUM, 0);
- UML_JMPc(block, COND_G, not_empty);
+ UML_CALLC(block, empty_fifoin, this);
+ UML_CMP(block, mem(&m_cur_value), 1);
+ UML_JMPc(block, COND_NE, not_empty);
UML_MOV(block, mem(&m_core->icount), 0);
UML_EXH(block, *m_out_of_cycles, desc->pc);
@@ -863,11 +827,12 @@ bool mb86235_device::generate_opcode(drcuml_block &block, compiler_state &compil
}
// insert FIFO OUT0 check if needed
- if (fifoout0_check)
+ if (fifoout0_check && m_fifoout0)
{
uml::code_label const not_full = compiler.labelnum++;
- UML_CMP(block, FIFOOUT0_NUM, FIFOOUT0_SIZE - 1);
- UML_JMPc(block, COND_L, not_full);
+ UML_CALLC(block, full_fifoout0, this);
+ UML_CMP(block, mem(&m_cur_value), 1);
+ UML_JMPc(block, COND_NE, not_full);
UML_MOV(block, mem(&m_core->icount), 0);
UML_EXH(block, *m_out_of_cycles, desc->pc);
@@ -876,11 +841,12 @@ bool mb86235_device::generate_opcode(drcuml_block &block, compiler_state &compil
}
// insert FIFO OUT1 check if needed
- if (fifoout1_check)
+ if (fifoout1_check && m_fifoout1)
{
uml::code_label const not_full = compiler.labelnum++;
- UML_CMP(block, FIFOOUT1_NUM, FIFOOUT1_SIZE - 1);
- UML_JMPc(block, COND_L, not_full);
+ UML_CALLC(block, full_fifoout1, this);
+ UML_CMP(block, mem(&m_cur_value), 1);
+ UML_JMPc(block, COND_NE, not_full);
UML_MOV(block, mem(&m_core->icount), 0);
UML_EXH(block, *m_out_of_cycles, desc->pc);
@@ -1573,17 +1539,25 @@ void mb86235_device::generate_control(drcuml_block &block, compiler_state &compi
case 0x03: //
if (ef1 == 1) // CLRFI
- UML_CALLH(block, *m_clear_fifo_in);
+ {
+ if (m_fifoin)
+ UML_CALLC(block, clear_fifoin, this);
+ }
else if (ef1 == 2) // CLRFO
{
- UML_CALLH(block, *m_clear_fifo_out0);
- UML_CALLH(block, *m_clear_fifo_out1);
+ if (m_fifoout0)
+ UML_CALLC(block, clear_fifoout0, this);
+ if (m_fifoout1)
+ UML_CALLC(block, clear_fifoout1, this);
}
else if (ef1 == 3) // CLRF
{
- UML_CALLH(block, *m_clear_fifo_in);
- UML_CALLH(block, *m_clear_fifo_out0);
- UML_CALLH(block, *m_clear_fifo_out1);
+ if (m_fifoin)
+ UML_CALLC(block, clear_fifoin, this);
+ if (m_fifoout0)
+ UML_CALLC(block, clear_fifoout0, this);
+ if (m_fifoout1)
+ UML_CALLC(block, clear_fifoout1, this);
}
break;
diff --git a/src/devices/cpu/mb86235/mb86235ops.cpp b/src/devices/cpu/mb86235/mb86235ops.cpp
index 024437c506a..fc8d667fc35 100644
--- a/src/devices/cpu/mb86235/mb86235ops.cpp
+++ b/src/devices/cpu/mb86235/mb86235ops.cpp
@@ -752,7 +752,7 @@ inline uint32_t mb86235_device::get_transfer_reg(uint8_t which)
case 1: // FI
{
FCLR(IFE);
- if(is_fifoin_empty() == true)
+ if(m_fifoin->is_empty())
{
FSET(IFE);
m_core->cur_fifo_state.has_stalled = true;
@@ -765,13 +765,7 @@ inline uint32_t mb86235_device::get_transfer_reg(uint8_t which)
}
m_core->cur_fifo_state.has_stalled = false;
- uint32_t res = (uint32_t)m_core->fifoin.data[m_core->fifoin.rpos];
-
- m_core->fifoin.rpos++;
- m_core->fifoin.rpos &= FIFOIN_SIZE-1;
- m_core->fifoin.num--;
-
- return res;
+ return m_fifoin->pop();
}
}
}
@@ -827,24 +821,23 @@ inline void mb86235_device::set_transfer_reg(uint8_t which, uint32_t value)
break;
case 2: // FO0
FCLR(OFF);
- if(is_fifoout0_full() == true)
+ if(m_fifoout0)
{
- FSET(OFF);
- m_core->cur_fifo_state.has_stalled = true;
- if((m_core->st & RP) == 0)
- m_core->cur_fifo_state.pc = m_core->ppc;
-
- //else
- // fatalerror("check me (writes)");
- return;
- }
-
- m_core->cur_fifo_state.has_stalled = false;
- m_core->fifoout0.data[m_core->fifoin.wpos] = value;
-
- m_core->fifoout0.wpos++;
- m_core->fifoout0.wpos &= FIFOIN_SIZE-1;
- m_core->fifoout0.num++;
+ if(m_fifoout0->is_full())
+ {
+ FSET(OFF);
+ m_core->cur_fifo_state.has_stalled = true;
+ if((m_core->st & RP) == 0)
+ m_core->cur_fifo_state.pc = m_core->ppc;
+
+ //else
+ // fatalerror("check me (writes)");
+ return;
+ }
+
+ m_core->cur_fifo_state.has_stalled = false;
+ m_fifoout0->push(u32(value));
+ }
break;
case 4: m_core->pdr = value; break;
case 5: m_core->ddr = value; break;
@@ -1193,21 +1186,18 @@ void mb86235_device::do_control(uint32_t h, uint32_t l)
case 0x03: // CLRF
if(ef1 & 1) // clear fifo in (CLRFI)
{
- m_core->fifoin.wpos = 0;
- m_core->fifoin.rpos = 0;
- m_core->fifoin.num = 0;
+ if(m_fifoin)
+ m_fifoin->clear();
FSET(IFE);
FCLR(IFF);
m_core->cur_fifo_state.has_stalled = false;
}
if(ef1 & 2) // clear fifo0/1 out (CLRFO)
{
- m_core->fifoout0.wpos = 0;
- m_core->fifoout0.rpos = 0;
- m_core->fifoout0.num = 0;
- m_core->fifoout1.wpos = 0;
- m_core->fifoout1.rpos = 0;
- m_core->fifoout1.num = 0;
+ if(m_fifoout0)
+ m_fifoout0->clear();
+ if(m_fifoout1)
+ m_fifoout1->clear();
FSET(OFE);
FCLR(OFF);
m_core->cur_fifo_state.has_stalled = false;
diff --git a/src/devices/machine/gen_fifo.cpp b/src/devices/machine/gen_fifo.cpp
new file mode 100644
index 00000000000..639adacd571
--- /dev/null
+++ b/src/devices/machine/gen_fifo.cpp
@@ -0,0 +1,201 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+
+#include "emu.h"
+#include "gen_fifo.h"
+
+template<typename T> generic_fifo_device_base<T>::generic_fifo_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, type, tag, owner, clock),
+ m_empty_cb(*this),
+ m_full_cb(*this),
+ m_on_fifo_empty_pre_sync([](){}),
+ m_on_fifo_empty_post_sync([](){}),
+ m_on_fifo_unempty([](){}),
+ m_on_fifo_full_post_sync([](){}),
+ m_on_fifo_unfull([](){}),
+ m_on_push([](){}),
+ m_on_pop([](){}),
+ m_sync_empty(nullptr),
+ m_sync_full(nullptr),
+ m_size(0),
+ m_empty_triggered(false),
+ m_full_triggered(false)
+{
+}
+
+template<typename T> void generic_fifo_device_base<T>::clear()
+{
+ bool was_empty = is_empty();
+ bool was_full = m_size && is_full();
+ m_values.clear();
+ m_extra_values.clear();
+
+ if(m_sync_empty) {
+ m_sync_empty->adjust(attotime::never);
+ m_sync_full->adjust(attotime::never);
+ }
+
+ if(was_full)
+ m_full_cb(false);
+
+ if(m_full_triggered) {
+ m_full_triggered = false;
+ m_on_fifo_unfull();
+ }
+
+ if(!was_empty)
+ m_empty_cb(true);
+}
+
+template<typename T> void generic_fifo_device_base<T>::device_start()
+{
+ m_empty_cb.resolve_safe();
+ m_full_cb.resolve_safe();
+
+ m_sync_empty = timer_alloc(0);
+ m_sync_full = timer_alloc(1);
+
+ // This is not saving the fifo, let's hope it's empty...
+ save_item(NAME(m_size));
+ save_item(NAME(m_empty_triggered));
+ save_item(NAME(m_full_triggered));
+}
+
+template<typename T> void generic_fifo_device_base<T>::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
+{
+ switch(id) {
+ case T_FULL: {
+ // Add the extra values in if there's space
+ bool was_empty = is_empty();
+ bool was_full = is_full();
+
+ while(!m_extra_values.empty() && !is_full()) {
+ T t(std::move(m_extra_values.front()));
+ m_extra_values.erase(m_extra_values.begin());
+ m_values.emplace_back(std::move(t));
+ }
+
+ // Adjust devcb lines as needed
+ if(was_empty && !is_empty())
+ set_empty_cb(false);
+ if(!was_full && is_full())
+ set_full_cb(true);
+
+ // Are there still values that don't fit?
+ if(!m_extra_values.empty()) {
+ // If yes, stop the source if not done yet
+ if(!m_full_triggered) {
+ m_full_triggered = true;
+ m_on_fifo_full_post_sync();
+ }
+ }
+ break;
+ }
+
+ case T_EMPTY: {
+ // Sync was called for a fifo empty, is it still empty?
+ if(is_empty()) {
+ // If yes, stop the destination if not done yet
+ if(!m_empty_triggered) {
+ m_empty_triggered = true;
+ m_on_fifo_empty_post_sync();
+ }
+ }
+ break;
+ }
+ }
+}
+
+template<typename T> T generic_fifo_device_base<T>::pop()
+{
+ // Are we empty?
+ if(is_empty()) {
+ // First, trigger the sync
+ m_sync_empty->adjust(attotime::zero);
+ // Then fire the callback
+ m_on_fifo_empty_pre_sync();
+
+ return T();
+
+ } else {
+ // Prepare the value
+ bool was_full = is_full();
+ T t(std::move(m_values.front()));
+ m_values.erase(m_values.begin());
+
+ // If we have extra values and the source is stopped,
+ // push one in, and possibly restart the source.
+ if(!m_extra_values.empty()) {
+ T t1(std::move(m_extra_values.front()));
+ m_extra_values.erase(m_extra_values.begin());
+ m_values.emplace_back(std::move(t1));
+
+ if(m_extra_values.empty()) {
+ // We don't have any extra values left, we can unblock
+ // the source.
+ if(m_full_triggered) {
+ m_full_triggered = false;
+ m_on_fifo_unfull();
+ }
+ }
+ }
+
+ // Update the devcb lines
+ if(is_empty())
+ m_empty_cb(true);
+ if(was_full && !is_full())
+ m_full_cb(false);
+
+ // We did a pop
+ m_on_pop();
+ return std::move(t);
+ }
+}
+
+template<typename T> void generic_fifo_device_base<T>::push(T &&t)
+{
+ // Are we already overflowed?
+ if(!m_extra_values.empty())
+ // If yes, just add to the overflow queue
+ m_extra_values.emplace_back(std::move(t));
+
+ else if(is_full()) {
+ // Otherwise, are we full?
+
+ // If yes start the overflow queue
+ m_extra_values.emplace_back(std::move(t));
+
+ // And trigger the sync
+ m_sync_full->adjust(attotime::zero);
+
+ } else {
+ // Add the value to the fifo
+ bool was_empty = is_empty();
+ m_values.emplace_back(std::move(t));
+
+ // Update the devcb lines
+ if(was_empty)
+ m_empty_cb(false);
+ if(is_full())
+ m_full_cb(true);
+
+ // Unblock the destination if needed
+ if(m_empty_triggered) {
+ m_empty_triggered = false;
+ m_on_fifo_unempty();
+ }
+ }
+
+ // We did a push
+ m_on_push();
+}
+
+template class generic_fifo_device_base<u32>;
+
+generic_fifo_u32_device::generic_fifo_u32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ generic_fifo_device_base<u32>(mconfig, GENERIC_FIFO_U32, tag, owner, clock)
+{
+}
+
+DEFINE_DEVICE_TYPE(GENERIC_FIFO_U32, generic_fifo_u32_device, "generic_fifo_u32_device", "Generic fifo, u32 values")
+
diff --git a/src/devices/machine/gen_fifo.h b/src/devices/machine/gen_fifo.h
new file mode 100644
index 00000000000..0ba80fd5fc7
--- /dev/null
+++ b/src/devices/machine/gen_fifo.h
@@ -0,0 +1,222 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+
+#ifndef MAME_MACHINE_GEN_FIFO_H
+#define MAME_MACHINE_GEN_FIFO_H
+
+
+/* Generic fifo device with flow control
+ *
+ *
+ * To use it:
+ * - Create the device, put push/pop in the appropriate memory maps of
+ * the source (push) and destination (pop) devices
+ * - Connect the empty/full callbacks in the MCFG if needed
+ * - Call setup at init with the size and the callbacks
+ * - Enjoy
+ *
+ * The design is such that destination devices must be able to be
+ * halted and to retrigger a fifo read when asked to, while the source
+ * devices only need to be haltable. There is some leeway on the
+ * source devices, e.g. no values are ever lost, so one can rudely
+ * overflow the fifo when the source is not a simple executable
+ * device.
+ *
+ * The callbacks:
+ * - on_fifo_empty_pre_sync:
+ * Called on a pop with an empty fifo. Must ask the destination
+ * to try again (e.g. ->stall() or equivalent). The pop itself
+ * will then return zero. Triggers a machine-wide sync, because
+ * the source device may be behind and could push data in the
+ * remaining of its timeslice.
+ *
+ * - on_fifo_empty_post_sync:
+ * Called after the sync consecutive to a pop with an empty fifo.
+ * It means that even with the source device synced the fifo is
+ * still empty. The destination device should be halted.
+ *
+ * - on_fifo_unempty:
+ * Called when the fifo is filled again after a call to
+ * on_fifo_empty_post_sync. The destination device should be
+ * restarted, the pop will succeed this time.
+ *
+ * - on_fifo_full_post_sync:
+ * When the source pushes in a full fifo, the extra value is
+ * stored and a machine sync is triggered to give a chance to the
+ * destination device to pop some of the fifo data in its
+ * remaining timeslice. If after the sync the fifo is still full,
+ * that callback is triggered. The source device should be halted.
+ *
+ * - on_fifo_unfull:
+ * Called when the fifo again has free space after a call to
+ * on_fifo_full_post_sync. The source device should be restarted.
+ *
+ * - on_push:
+ * Called when a new value was just pushed. That callback is
+ * usually not needed, but it can be useful when the destination
+ * is not an executable device but something hardcoded
+ * (rasterizer, etc).
+ *
+ * - on_pop:
+ * Called when a new value was just pushed. That callback is
+ * usually not needed, but it can be useful when the source is not
+ * an executable device but something hardcoded.
+ *
+ * Note: setup can be called multiple times, each call overrides the
+ * previous and clears the fifo.
+ *
+ * Note: the fifo element type T must be copyable if one wants to use
+ * peek(). It must trivially copyable and of size 1, 2, 4 or 8 bytes
+ * to use the memory-map accessors. Otherwise only movability is
+ * required.
+ */
+
+
+#define MCFG_GENERIC_FIFO_EMPTY_CALLBACK(_devcb) \
+ devcb = &downcast<screen_device &>(*device).set_empty_cb(DEVCB_##_devcb);
+
+#define MCFG_GENERIC_FIFO_FULL_CALLBACK(_devcb) \
+ devcb = &downcast<screen_device &>(*device).set_full_cb(DEVCB_##_devcb);
+
+
+template<typename T> class generic_fifo_device_base : public device_t {
+public:
+ /* The general setup. Call be called multiple times, clears the fifo. */
+ void setup(size_t size,
+ std::function<void ()> on_fifo_empty_pre_sync,
+ std::function<void ()> on_fifo_empty_post_sync,
+ std::function<void ()> on_fifo_unempty,
+ std::function<void ()> on_fifo_full_post_sync,
+ std::function<void ()> on_fifo_unfull,
+ std::function<void ()> on_push = [](){},
+ std::function<void ()> on_pop = [](){}) {
+ m_on_fifo_empty_pre_sync = on_fifo_empty_pre_sync;
+ m_on_fifo_empty_post_sync = on_fifo_empty_post_sync;
+ m_on_fifo_unempty = on_fifo_unempty;
+ m_on_fifo_full_post_sync = on_fifo_full_post_sync;
+ m_on_fifo_unfull = on_fifo_unfull;
+ m_on_push = on_push;
+ m_on_pop = on_pop;
+
+ clear();
+ m_size = size;
+ }
+
+ /* Generic push/pop */
+ T pop();
+ void push(T &&value);
+
+ /* Indicates whether the fifo is empty or full. Note that a pop
+ on a full fifo does not ensure it will become non-full, there
+ may be extra values stored. Also, an empty fifo can fill up
+ from extra values later after a sync. */
+
+ bool is_empty() const { return m_values.empty(); }
+ bool is_full() const { return m_values.size() >= m_size; }
+
+ /* Empty the fifo. */
+ void clear();
+
+ /* Callbacks signalling empty (true)/nonempty (false) and full (true)/nonfull (false) */
+ template<class Object> devcb_base &set_empty_cb(Object &&object) { return m_empty_cb.set_callback(std::forward<Object>(object)); }
+ template<class Object> devcb_base &set_full_cb(Object &&object) { return m_full_cb.set_callback(std::forward<Object>(object)); }
+
+ /* Get the fifo current size - Note that real hardware usually
+ can't do that. May be bigger that the fifo size if some extra
+ values are stored. */
+ size_t size() const { return m_values.size() + m_extra_values.size(); }
+
+ /* Peek at a value in the fifo at an offset, 0 being the next
+ value to be popped, 1 the one following, etc - Note that real
+ hardware usually can't do that. Returns 0 or equivalent when
+ the offset is over the current fifo size. */
+ template <typename U=T> std::enable_if_t<(std::is_copy_constructible<T>::value && std::is_same<T, U>::value), T> peek(offs_t offset) const {
+ if(offset < m_values.size())
+ return m_values[offset];
+ offset -= m_values.size();
+ if(offset < m_extra_values.size())
+ return m_extra_values[offset];
+ return T();
+ }
+
+protected:
+ generic_fifo_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ virtual ~generic_fifo_device_base() = default;
+
+ /* These used to build memory accessors that can be put in a
+ memory map. They do the appropriate bit-identical type
+ conversions if you say make a fifo of floats and want to access
+ in with a 32-bits handler, which deals with 32-bits unsigned
+ integers. Don't be afraid by the apparently costly memcpy, the
+ compiler sees through it and removes it, and that's the only
+ standard-sanctioned way to do that.
+
+ They need to be upcalled in the deriving class from real
+ accessors though.
+ */
+
+ template <typename U> std::enable_if_t<(std::is_trivially_copyable<T>::value && sizeof(T) == sizeof(U)), void> write_gen(U data) {
+ T t;
+ memcpy(&t, &data, sizeof(data));
+ push(std::move(t));
+ }
+
+ template <typename U> std::enable_if_t<(std::is_trivially_copyable<T>::value && sizeof(T) == sizeof(U)), U> read_gen() {
+ T t(pop());
+ U data;
+ memcpy(&data, &t, sizeof(data));
+ return data;
+ }
+
+
+private:
+ // Timer IDs for sync on empty and full
+ enum timer_ids { T_EMPTY, T_FULL };
+
+ // Configured callbacks
+
+ devcb_write_line m_empty_cb;
+ devcb_write_line m_full_cb;
+
+ std::function<void ()> m_on_fifo_empty_pre_sync;
+ std::function<void ()> m_on_fifo_empty_post_sync;
+ std::function<void ()> m_on_fifo_unempty;
+ std::function<void ()> m_on_fifo_full_post_sync;
+ std::function<void ()> m_on_fifo_unfull;
+ std::function<void ()> m_on_push;
+ std::function<void ()> m_on_pop;
+
+ // The values are stored into two vectors for simplicity.
+ // m_values may become a rotating buffer when everything else
+ // works. m_extra_values should probably stay a vector, but could
+ // become a list.
+
+ std::vector<T> m_values;
+ std::vector<T> m_extra_values;
+
+ // The synchronization timers
+ emu_timer *m_sync_empty, *m_sync_full;
+
+ // Configured size of the fifo
+ size_t m_size;
+
+ // Notes whether the halting callbacks were triggered
+ bool m_empty_triggered, m_full_triggered;
+
+ virtual void device_start() override;
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
+};
+
+class generic_fifo_u32_device : public generic_fifo_device_base<u32>
+{
+public:
+ generic_fifo_u32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ virtual ~generic_fifo_u32_device() = default;
+
+ DECLARE_READ32_MEMBER(read) { return read_gen<u32>(); }
+ DECLARE_WRITE32_MEMBER(write) { write_gen(data); }
+};
+
+DECLARE_DEVICE_TYPE(GENERIC_FIFO_U32, generic_fifo_u32_device)
+
+#endif
diff --git a/src/mame/drivers/model1.cpp b/src/mame/drivers/model1.cpp
index 39bc2d1b2f6..636f9224799 100644
--- a/src/mame/drivers/model1.cpp
+++ b/src/mame/drivers/model1.cpp
@@ -181,8 +181,8 @@ Notes:
*1 - Unpopulated position for Fujitsu MB8421
D70615GD-16 - NEC uPD70615GD-16-S V60 CPU, running at 16.000MHz (QFP120, clock 32 / 2)
315-5546A - Lattice GAL16V8A (DIP20)
- 315-5571 - Fujitsu MB86233 Geometrizer (IC57/IC58, QFP160) \
- 315-5572 - Fujitsu MB86233 Geometrizer (different code) (IC60/IC66, QFP160) / According to test mode, these chips are the TGPs
+ 315-5571 - Fujitsu MB86233 Geometrizer (IC57/IC58, QFP160)
+ 315-5572 - Fujitsu MB86233 Geometrizer (different code) (IC60/IC66, QFP160)
COPRO - Fujitsu MB86233 Coprocessor (QFP160), differs depending on game:
315-5573 - Virtua Racing, Virtua Formula (original for above board part number)
315-5711 - Wing War, Star Wars Arcade, Netmerc
@@ -759,7 +759,8 @@ MACHINE_RESET_MEMBER(model1_state,model1)
{
membank("bank1")->set_base(memregion("maincpu")->base() + 0x1000000);
irq_init();
- tgp_reset(!strcmp(machine().system().name, "swa") || !strcmp(machine().system().name, "wingwar") || !strcmp(machine().system().name, "wingwaru") || !strcmp(machine().system().name, "wingwarj") || !strcmp(machine().system().name, "wingwar360") || !strcmp(machine().system().name, "netmerc"));
+ copro_reset();
+
if (!strcmp(machine().system().name, "swa") )
{
m_sound_irq = 0;
@@ -770,14 +771,6 @@ MACHINE_RESET_MEMBER(model1_state,model1)
}
}
-MACHINE_RESET_MEMBER(model1_state,model1_vr)
-{
- membank("bank1")->set_base(memregion("maincpu")->base() + 0x1000000);
- irq_init();
- vr_tgp_reset();
- m_sound_irq = 3;
-}
-
READ16_MEMBER(model1_state::network_ctl_r)
{
if(offset)
@@ -809,7 +802,7 @@ WRITE16_MEMBER(model1_state::md1_w)
// never executed
//if(0 && offset)
// return;
- if(true && m_dump)
+ if(false)
logerror("TGP: md1_w %x, %04x @ %04x (%x)\n", offset, data, mem_mask, m_maincpu->pc());
}
@@ -819,7 +812,7 @@ WRITE16_MEMBER(model1_state::md0_w)
// never executed
//if(0 && offset)
// return;
- if(true && m_dump)
+ if(false)
logerror("TGP: md0_w %x, %04x @ %04x (%x)\n", offset, data, mem_mask, m_maincpu->pc());
}
@@ -894,9 +887,9 @@ void model1_state::model1_mem(address_map &map)
map(0xc40000, 0xc40000).rw(m_m1uart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w));
map(0xc40002, 0xc40002).rw(m_m1uart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w));
- map(0xd00000, 0xd00001).rw(this, FUNC(model1_state::model1_tgp_copro_adr_r), FUNC(model1_state::model1_tgp_copro_adr_w));
- map(0xd20000, 0xd20003).w(this, FUNC(model1_state::model1_tgp_copro_ram_w));
- map(0xd80000, 0xd80003).w(this, FUNC(model1_state::model1_tgp_copro_w)).mirror(0x10);
+ map(0xd00000, 0xd00001).rw(this, FUNC(model1_state::v60_copro_ram_adr_r), FUNC(model1_state::v60_copro_ram_adr_w));
+ map(0xd20000, 0xd20003).w(this, FUNC(model1_state::v60_copro_ram_w));
+ map(0xd80000, 0xd80003).w(this, FUNC(model1_state::v60_copro_fifo_w)).mirror(0x10);
map(0xdc0000, 0xdc0003).r(this, FUNC(model1_state::fifoin_status_r));
map(0xe00000, 0xe00001).nopw(); // Watchdog? IRQ ack? Always 0x20, usually on irq
@@ -908,8 +901,8 @@ void model1_state::model1_mem(address_map &map)
void model1_state::model1_io(address_map &map)
{
- map(0xd20000, 0xd20003).r(this, FUNC(model1_state::model1_tgp_copro_ram_r));
- map(0xd80000, 0xd80003).r(this, FUNC(model1_state::model1_tgp_copro_r));
+ map(0xd20000, 0xd20003).r(this, FUNC(model1_state::v60_copro_ram_r));
+ map(0xd80000, 0xd80003).r(this, FUNC(model1_state::v60_copro_fifo_r));
}
void model1_state::model1_comm_mem(address_map &map)
@@ -921,60 +914,6 @@ void model1_state::model1_comm_mem(address_map &map)
map(0xb01002, 0xb01002).rw(m_m1comm, FUNC(m1comm_device::fg_r), FUNC(m1comm_device::fg_w));
}
-void model1_state::model1_vr_mem(address_map &map)
-{
- map(0x000000, 0x0fffff).rom();
- map(0x100000, 0x1fffff).bankr("bank1");
- map(0x200000, 0x2fffff).rom();
-
- map(0x400000, 0x40ffff).ram().w(this, FUNC(model1_state::mr2_w)).share("mr2");
- map(0x500000, 0x53ffff).ram().w(this, FUNC(model1_state::mr_w)).share("mr");
-
- map(0x600000, 0x60ffff).ram().w(this, FUNC(model1_state::md0_w)).share("display_list0");
- map(0x610000, 0x61ffff).ram().w(this, FUNC(model1_state::md1_w)).share("display_list1");
- map(0x680000, 0x680003).rw(this, FUNC(model1_state::model1_listctl_r), FUNC(model1_state::model1_listctl_w));
-
- map(0x700000, 0x70ffff).rw(m_tiles, FUNC(segas24_tile_device::tile_r), FUNC(segas24_tile_device::tile_w));
- map(0x720000, 0x720001).nopw(); // Unknown, always 0
- map(0x740000, 0x740001).nopw(); // Horizontal synchronization register
- map(0x760000, 0x760001).nopw(); // Vertical synchronization register
- map(0x770000, 0x770001).nopw(); // Video synchronization switch
- map(0x780000, 0x7fffff).rw(m_tiles, FUNC(segas24_tile_device::char_r), FUNC(segas24_tile_device::char_w));
-
- map(0x900000, 0x903fff).ram().w(this, FUNC(model1_state::p_w)).share("palette");
- map(0x910000, 0x91bfff).ram().share("color_xlat");
-
- map(0xb00000, 0xb00fff).rw(m_m1comm, FUNC(m1comm_device::share_r), FUNC(m1comm_device::share_w));
- map(0xb01000, 0xb01000).rw(m_m1comm, FUNC(m1comm_device::cn_r), FUNC(m1comm_device::cn_w));
- map(0xb01002, 0xb01002).rw(m_m1comm, FUNC(m1comm_device::fg_r), FUNC(m1comm_device::fg_w));
-
- map(0xc00000, 0xc0003f).rw(this, FUNC(model1_state::io_r), FUNC(model1_state::io_w));
-
- map(0xc00040, 0xc00043).rw(this, FUNC(model1_state::network_ctl_r), FUNC(model1_state::network_ctl_w));
-
- map(0xc00200, 0xc002ff).ram().share("nvram");
-
- map(0xc40000, 0xc40000).rw(m_m1uart, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w));
- map(0xc40002, 0xc40002).rw(m_m1uart, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w));
-
- map(0xd00000, 0xd00001).rw(this, FUNC(model1_state::model1_tgp_vr_adr_r), FUNC(model1_state::model1_tgp_vr_adr_w));
- map(0xd20000, 0xd20003).w(this, FUNC(model1_state::model1_vr_tgp_ram_w));
- map(0xd80000, 0xd80003).w(this, FUNC(model1_state::model1_vr_tgp_w)).mirror(0x10);
- map(0xdc0000, 0xdc0003).r(this, FUNC(model1_state::fifoin_status_r));
-
- map(0xe00000, 0xe00001).nopw(); // Watchdog? IRQ ack? Always 0x20, usually on irq
- map(0xe00004, 0xe00005).w(this, FUNC(model1_state::bank_w));
- map(0xe0000c, 0xe0000f).nopw();
-
- map(0xfc0000, 0xffffff).rom();
-}
-
-void model1_state::model1_vr_io(address_map &map)
-{
- map(0xd20000, 0xd20003).r(this, FUNC(model1_state::model1_vr_tgp_ram_r));
- map(0xd80000, 0xd80003).r(this, FUNC(model1_state::model1_vr_tgp_r));
-}
-
static INPUT_PORTS_START( vf )
PORT_START("IN.0")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
@@ -1125,20 +1064,27 @@ static INPUT_PORTS_START( swa )
INPUT_PORTS_END
#define MODEL1_CPU_BOARD \
- ROM_REGION( 0xe0000, "copro_data", 0 ) \
+ ROM_REGION32_LE( 0x40000, "copro_tables", 0 ) \
ROM_LOAD32_WORD("opr14742.bin", 0x000000, 0x20000, CRC(446a1085) SHA1(51b3f4d3a35a36087ea0ba4e26d6e7d17b6418e2) ) \
ROM_LOAD32_WORD("opr14743.bin", 0x000002, 0x20000, CRC(e8953554) SHA1(1499f8e30ac15affc66e6f04ae031bb8680d9260) ) \
- ROM_LOAD("opr14744.bin", 0x040000, 0x20000, CRC(730ea9e0) SHA1(651f1db4089a400d073b19ada299b4b08b08f372) ) \
- ROM_LOAD("opr14745.bin", 0x060000, 0x20000, CRC(4c934d96) SHA1(e3349ece0e47f684d61ad11bfea4a90602287350) ) \
- ROM_LOAD("opr14746.bin", 0x080000, 0x20000, CRC(2a266cbd) SHA1(34e047a93459406c22acf4c25089d1a4955f94ca) ) \
- ROM_LOAD("opr14747.bin", 0x0a0000, 0x20000, CRC(a4ad5e19) SHA1(7d7ec300eeb9a8de1590011e37108688c092f329) ) \
- ROM_LOAD("opr14748.bin", 0x0c0000, 0x20000, CRC(4a532cb8) SHA1(23280ebbcd6b2bc8a8e643a2d07a58d6598301b8) ) \
-\
+ \
+ ROM_REGION32_LE( 0x80000, "other_data", 0 ) \
+ /* 1/x table */ \
+ ROM_LOAD32_WORD("opr-14744.58", 0x000000, 0x20000, CRC(730ea9e0) SHA1(651f1db4089a400d073b19ada299b4b08b08f372) ) \
+ ROM_LOAD32_WORD("opr-14745.59", 0x000002, 0x20000, CRC(4c934d96) SHA1(e3349ece0e47f684d61ad11bfea4a90602287350) ) \
+ /* 1/sqrt(x) table */ \
+ ROM_LOAD32_WORD("opr-14746.62", 0x040000, 0x20000, CRC(2a266cbd) SHA1(34e047a93459406c22acf4c25089d1a4955f94ca) ) \
+ ROM_LOAD32_WORD("opr-14747.63", 0x040002, 0x20000, CRC(a4ad5e19) SHA1(7d7ec300eeb9a8de1590011e37108688c092f329) ) \
+ \
+ ROM_REGION16_LE( 0x20000, "other_other_data", 0 ) \
+ /* 1/(1+x) again, but bottom 16 bits only */ \
+ ROM_LOAD("opr14748.bin", 0x000000, 0x20000, CRC(4a532cb8) SHA1(23280ebbcd6b2bc8a8e643a2d07a58d6598301b8) ) \
+ \
ROM_REGION32_LE( 0x2000, "315_5571", 0) \
ROM_LOAD("315-5571.bin", 0, 0x2000, CRC(1233db2a) SHA1(06760409d40f3d9117fd3e7c7ab62dfd70aa2a4d) ) \
-\
+ \
ROM_REGION32_LE( 0x2000, "315_5572", 0) \
- ROM_LOAD("315-5572.bin", 0, 0x2000, CRC(0a534a3b) SHA1(b8c988bc414b3ad3cd036ba5a64b5ee04a4758b4) )
+ ROM_LOAD("315-5572.bin", 0, 0x2000, CRC(66785906) SHA1(d94a51eced65b0073fb39625927782bf264d271a) )
ROM_START( vf )
MODEL1_CPU_BOARD
@@ -1159,7 +1105,7 @@ ROM_START( vf )
ROM_LOAD16_BYTE( "mpr-16090.12", 0x1300000, 0x80000, CRC(90c76831) SHA1(5a3c25f2a131cfbb2ad067bef1ab7b1c95645d41) )
ROM_LOAD16_BYTE( "mpr-16091.13", 0x1300001, 0x80000, CRC(53115448) SHA1(af798d5b1fcb720d7288a5ac48839d9ace16a2f2) )
- ROM_REGION32_LE( 0x2000, "tgp", 0)
+ ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
ROM_LOAD("315-5724.bin", 0, 0x2000, NO_DUMP )
ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
@@ -1205,6 +1151,9 @@ ROM_START( vr )
ROM_LOAD16_BYTE( "mpr-14888.12", 0x1300000, 0x80000, CRC(04bfdc5b) SHA1(bb8788a761620d0440a62ae51c3b41f70a04b5e4) )
ROM_LOAD16_BYTE( "mpr-14889.13", 0x1300001, 0x80000, CRC(c49f0486) SHA1(cc2bb9059c016ba2c4f6e7508bd1687df07b8b48) )
+ ROM_REGION( 0x2000, "tgp_copro", 0 ) /* TGP program rom */
+ ROM_LOAD("315-5573.bin", 0, 0x2000, CRC(3335a19b) SHA1(72eedfcc799ec4c7534fd7415de6631087ff6731) )
+
ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
ROM_LOAD16_WORD_SWAP( "epr-14870a.7", 0x00000, 0x20000, CRC(919d9b75) SHA1(27be79881cc9a2b5cf37e18f1e2d87251426b428) )
@@ -1224,26 +1173,18 @@ ROM_START( vr )
ROM_LOAD32_WORD( "mpr-14896.32", 0xc00000, 0x200000, CRC(382091dc) SHA1(efa266f0f6bfe36ad1c365e588fff33b01e166dd) )
ROM_LOAD32_WORD( "mpr-14879.33", 0xc00002, 0x200000, CRC(74873195) SHA1(80705ec577d14570f9bba77cc26766f831c41f42) )
- ROM_REGION32_LE( 0x200000, "tgp_data", 0 ) /* TGP data roms */
+ ROM_REGION32_LE( 0x200000, "copro_data", 0 ) /* TGP data roms */
ROM_LOAD32_BYTE( "mpr-14898.39", 0x000000, 0x80000, CRC(61da2bb6) SHA1(7a12ba522d64a1aeec1ca6f5a87ee063692131f9) )
ROM_LOAD32_BYTE( "mpr-14899.40", 0x000001, 0x80000, CRC(2cd58bee) SHA1(73defec823de4244a387af55fea7210edc1b314f) )
ROM_LOAD32_BYTE( "mpr-14900.41", 0x000002, 0x80000, CRC(aa7c017d) SHA1(0fa2b59a8bb5f5907b2b2567e69d11c73b398dc1) )
ROM_LOAD32_BYTE( "mpr-14901.42", 0x000003, 0x80000, CRC(175b7a9a) SHA1(c86602e771cd49bab425b4ba7926d2f44858bd39) )
- ROM_REGION( 0x2000, "tgp", 0 ) /* TGP program rom */
- // The real internal TGP rom
- ROM_LOAD("315-5573.bin", 0, 0x2000, CRC(ec913af2) SHA1(a18bf6c9d7b35f8b9e513a7d279f13a30b32a961) )
-
- // this is the Daytona TGP program with some modifications needed for Virtua Racing
- // Kept here for now to avoid instantly breaking the game until the tgp is up to it
- ROM_LOAD("vr-tgp.bin", 0x000000, 0x2000, CRC(3de33c7f) SHA1(acecc779c9d8fe39ded6c22492be5b7c25fd52db) )
-
ROM_REGION( 0x100, "nvram", 0 ) // default nvram
ROM_LOAD( "vr_defaults.nv", 0x000, 0x100, CRC(5ccdc835) SHA1(7e809de470f78fb897b938ca2aee2e12f1c8f3a4) )
ROM_REGION ( 0x10000, "io_board", 0)
ROM_LOAD("epr-14869.25", 0x00000, 0x10000, CRC(6187cd7a) SHA1(b65fdd0ad31794a565a0ca4dc67a3f16b329fd71) )
- ROM_LOAD("epr-14869b.25", 0x00000, 0x10000, BAD_DUMP CRC(b410f22b) SHA1(75c5009ca4d21ebb53d54d4e3fb8aa55a4c74a07) ) // stray FFs at xx49, xx5F, xxC9, xxDF
+// ROM_LOAD("epr-14869b.25", 0x00000, 0x10000, BAD_DUMP CRC(b410f22b) SHA1(75c5009ca4d21ebb53d54d4e3fb8aa55a4c74a07) ) // stray FFs at xx49, xx5F, xxC9, xxDF
// there is also epr-14869c in model2 daytona
ROM_END
@@ -1266,6 +1207,9 @@ ROM_START( vformula )
ROM_LOAD16_BYTE( "mpr-14888.12", 0x1300000, 0x80000, CRC(04bfdc5b) SHA1(bb8788a761620d0440a62ae51c3b41f70a04b5e4) )
ROM_LOAD16_BYTE( "mpr-14889.13", 0x1300001, 0x80000, CRC(c49f0486) SHA1(cc2bb9059c016ba2c4f6e7508bd1687df07b8b48) )
+ ROM_REGION( 0x2000, "tgp_copro", 0 ) /* TGP program rom */
+ ROM_LOAD("315-5573.bin", 0, 0x2000, CRC(3335a19b) SHA1(72eedfcc799ec4c7534fd7415de6631087ff6731) )
+
ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
ROM_LOAD16_WORD_SWAP( "epr-14870a.7", 0x00000, 0x20000, CRC(919d9b75) SHA1(27be79881cc9a2b5cf37e18f1e2d87251426b428) )
@@ -1285,19 +1229,14 @@ ROM_START( vformula )
ROM_LOAD32_WORD( "mpr-14896.32", 0xc00000, 0x200000, CRC(382091dc) SHA1(efa266f0f6bfe36ad1c365e588fff33b01e166dd) )
ROM_LOAD32_WORD( "mpr-14879.33", 0xc00002, 0x200000, CRC(74873195) SHA1(80705ec577d14570f9bba77cc26766f831c41f42) )
- ROM_REGION32_LE( 0x200000, "tgp_data", 0 ) /* TGP data roms */
+ ROM_REGION32_LE( 0x200000, "copro_data", 0 ) /* TGP data roms */
ROM_LOAD32_BYTE( "mpr-14898.39", 0x000000, 0x80000, CRC(61da2bb6) SHA1(7a12ba522d64a1aeec1ca6f5a87ee063692131f9) )
ROM_LOAD32_BYTE( "mpr-14899.40", 0x000001, 0x80000, CRC(2cd58bee) SHA1(73defec823de4244a387af55fea7210edc1b314f) )
ROM_LOAD32_BYTE( "mpr-14900.41", 0x000002, 0x80000, CRC(aa7c017d) SHA1(0fa2b59a8bb5f5907b2b2567e69d11c73b398dc1) )
ROM_LOAD32_BYTE( "mpr-14901.42", 0x000003, 0x80000, CRC(175b7a9a) SHA1(c86602e771cd49bab425b4ba7926d2f44858bd39) )
- ROM_REGION( 0x2000, "tgp", 0 ) /* TGP program rom */
- // The real internal TGP rom
- ROM_LOAD("315-5573.bin", 0, 0x2000, CRC(ec913af2) SHA1(a18bf6c9d7b35f8b9e513a7d279f13a30b32a961) )
-
- // this is the Daytona TGP program with some modifications needed for Virtua Racing
- // Kept here for now to avoid instantly breaking the game until the tgp is up to it
- ROM_LOAD("vr-tgp.bin", 0x000000, 0x2000, CRC(3de33c7f) SHA1(acecc779c9d8fe39ded6c22492be5b7c25fd52db) )
+ ROM_REGION( 0x20000, "commboard", 0 ) /* Comms Board */
+ ROM_LOAD( "epr-15624.17", 0x00000, 0x20000, CRC(9b3ba315) SHA1(0cd0983cc8b2f2d6b41617d0d0a24cc6c188e62a) )
ROM_END
@@ -1312,7 +1251,7 @@ ROM_START( swa )
ROM_RELOAD( 0x000000, 0x80000 )
ROM_RELOAD( 0x080000, 0x80000 )
- ROM_REGION32_LE( 0x2000, "tgp", 0)
+ ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
@@ -1320,12 +1259,12 @@ ROM_START( swa )
ROM_RELOAD(0x80000, 0x20000)
ROM_REGION( 0x400000, M1AUDIO_MPCM1_REGION, 0 ) /* Samples */
- ROM_LOAD( "mpr-16486.bin", 0x000000, 0x200000, CRC(7df50533) SHA1(f2fb876738e37d70eb9005e5629a9ae89aa413a8) )
- ROM_LOAD( "mpr-16487.bin", 0x200000, 0x200000, CRC(31b28dfa) SHA1(bd1ac11bf2f9161f61f8af3b9ff4c2709b7ee700) )
+ ROM_LOAD( "mpr-16486.bin", 0x000000, 0x200000, CRC(7df50533) SHA1(f2fb876738e37d70eb9005e5629a9ae89aa413a8) )
+ ROM_LOAD( "mpr-16487.bin", 0x200000, 0x200000, CRC(31b28dfa) SHA1(bd1ac11bf2f9161f61f8af3b9ff4c2709b7ee700) )
ROM_REGION( 0x400000, M1AUDIO_MPCM2_REGION, 0 ) /* Samples */
- ROM_LOAD( "mpr-16484.bin", 0x000000, 0x200000, CRC(9d4c334d) SHA1(8b4d903f14559fed425d225bb23ccfe8da23cbd3) )
- ROM_LOAD( "mpr-16485.bin", 0x200000, 0x200000, CRC(95aadcad) SHA1(4276db655db9834692c3843eb96a3e3a89cb7252) )
+ ROM_LOAD( "mpr-16484.bin", 0x000000, 0x200000, CRC(9d4c334d) SHA1(8b4d903f14559fed425d225bb23ccfe8da23cbd3) )
+ ROM_LOAD( "mpr-16485.bin", 0x200000, 0x200000, CRC(95aadcad) SHA1(4276db655db9834692c3843eb96a3e3a89cb7252) )
ROM_REGION( 0x20000, "mpegcpu", 0 ) /* Z80 DSB code */
ROM_LOAD( "epr-16471.bin", 0x000000, 0x020000, CRC(f4ee84a4) SHA1(f12b214e6f195b0e5f49ba9f41d8e54bfcea9acc) )
@@ -1372,7 +1311,7 @@ ROM_START( wingwar )
ROM_LOAD16_BYTE( "mpr-16734.10", 0x1200000, 0x80000, CRC(f76371c1) SHA1(0ff082db3877383d0dd977dc60c932b725e3d164) )
ROM_LOAD16_BYTE( "mpr-16733.11", 0x1200001, 0x80000, CRC(e105847b) SHA1(8489a6c91fd6d1e9ba81e8eaf36c514da30dccbe) )
- ROM_REGION32_LE( 0x2000, "tgp", 0)
+ ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
@@ -1406,6 +1345,8 @@ ROM_START( wingwar )
ROM_END
ROM_START( wingwaru )
+ MODEL1_CPU_BOARD
+
ROM_REGION( 0x2000000, "maincpu", ROMREGION_ERASEFF ) /* v60 code */
ROM_LOAD16_BYTE( "epr-16729.14", 0x200000, 0x80000, CRC(7edec2cc) SHA1(3e423a868ca7c8475fbb5bc1a10526e69d94d865) )
ROM_LOAD16_BYTE( "epr-16730.15", 0x200001, 0x80000, CRC(bab24dee) SHA1(26c95139c1aa7f34b6a5cce39e5bd1dd2ef0dd49) )
@@ -1422,7 +1363,7 @@ ROM_START( wingwaru )
ROM_LOAD16_BYTE( "mpr-16734.10", 0x1200000, 0x80000, CRC(f76371c1) SHA1(0ff082db3877383d0dd977dc60c932b725e3d164) )
ROM_LOAD16_BYTE( "mpr-16733.11", 0x1200001, 0x80000, CRC(e105847b) SHA1(8489a6c91fd6d1e9ba81e8eaf36c514da30dccbe) )
- ROM_REGION32_LE( 0x2000, "tgp", 0)
+ ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
@@ -1474,7 +1415,7 @@ ROM_START( wingwarj )
ROM_LOAD16_BYTE( "mpr-16734.10", 0x1200000, 0x80000, CRC(f76371c1) SHA1(0ff082db3877383d0dd977dc60c932b725e3d164) )
ROM_LOAD16_BYTE( "mpr-16733.11", 0x1200001, 0x80000, CRC(e105847b) SHA1(8489a6c91fd6d1e9ba81e8eaf36c514da30dccbe) )
- ROM_REGION32_LE( 0x2000, "tgp", 0)
+ ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
@@ -1528,7 +1469,7 @@ ROM_START( wingwar360 )
ROM_LOAD16_BYTE( "mpr-16734.10", 0x1200000, 0x80000, CRC(f76371c1) SHA1(0ff082db3877383d0dd977dc60c932b725e3d164) )
ROM_LOAD16_BYTE( "mpr-16733.11", 0x1200001, 0x80000, CRC(e105847b) SHA1(8489a6c91fd6d1e9ba81e8eaf36c514da30dccbe) )
- ROM_REGION32_LE( 0x2000, "tgp", 0)
+ ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
@@ -1583,7 +1524,7 @@ ROM_START( netmerc )
ROM_LOAD16_BYTE( "epr-18126.ic10", 0x1200000, 0x80000, CRC(43dc5ca8) SHA1(249ed83b90b0237ceabbed814cd42dc60dc7a174) )
ROM_LOAD16_BYTE( "epr-18127.ic11", 0x1200001, 0x80000, CRC(d307a4ca) SHA1(5555235f740c1b09f6e1587d0fceb35b23d4a8a8) )
- ROM_REGION32_LE( 0x2000, "tgp", 0)
+ ROM_REGION32_LE( 0x2000, "tgp_copro", 0)
ROM_LOAD("315-5711.bin", 0, 0x2000, NO_DUMP )
ROM_REGION( 0xc0000, M1AUDIO_CPU_REGION, ROMREGION_BE|ROMREGION_16BIT ) /* 68K code */
@@ -1621,9 +1562,20 @@ MACHINE_CONFIG_START(model1_state::model1)
MCFG_CPU_IO_MAP(model1_io)
MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(model1_state,irq_callback)
+ MCFG_DEVICE_ADD("copro_fifo_in", GENERIC_FIFO_U32, 0)
+ MCFG_DEVICE_ADD("copro_fifo_out", GENERIC_FIFO_U32, 0)
+
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", model1_state, model1_interrupt, "screen", 0, 1)
MCFG_TIMER_DRIVER_ADD("iotimer", model1_state, io_command_acknowledge)
+#if 1
+ MCFG_CPU_ADD("tgp_copro", MB86233, 16000000)
+ MCFG_CPU_PROGRAM_MAP(copro_prog_map)
+ MCFG_CPU_DATA_MAP(copro_data_map)
+ MCFG_CPU_IO_MAP(copro_io_map)
+ MCFG_DEVICE_ADDRESS_MAP(mb86233_device::AS_RF, copro_rf_map)
+#endif
+
MCFG_MACHINE_START_OVERRIDE(model1_state,model1)
MCFG_MACHINE_RESET_OVERRIDE(model1_state,model1)
MCFG_NVRAM_ADD_0FILL("nvram")
@@ -1663,8 +1615,14 @@ MACHINE_CONFIG_START(model1_state::wingwar)
MCFG_DEVICE_BIOS("epr15112");
MACHINE_CONFIG_END
-MACHINE_CONFIG_START(model1_state::swa)
+MACHINE_CONFIG_START(model1_state::model1_hle)
model1(config);
+
+ MCFG_DEVICE_REMOVE("tgp_copro")
+MACHINE_CONFIG_END
+
+MACHINE_CONFIG_START(model1_state::swa)
+ model1_hle(config);
MCFG_SPEAKER_STANDARD_STEREO("dleft", "dright")
MCFG_DSBZ80_ADD(DSBZ80_TAG)
MCFG_SOUND_ROUTE(0, "dleft", 1.0)
@@ -1684,65 +1642,20 @@ void model1_state::polhemus_map(address_map &map)
}
MACHINE_CONFIG_START(model1_state::netmerc)
- model1(config);
+ model1_hle(config);
MCFG_CPU_ADD("polhemus", I386SX, 16000000)
MCFG_CPU_PROGRAM_MAP(polhemus_map)
MACHINE_CONFIG_END
-MACHINE_CONFIG_START(model1_state::model1_vr)
- MCFG_CPU_ADD("maincpu", V60, 16000000)
- MCFG_CPU_PROGRAM_MAP(model1_vr_mem)
- MCFG_CPU_IO_MAP(model1_vr_io)
- MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(model1_state,irq_callback)
-
- MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", model1_state, model1_interrupt, "screen", 0, 1)
- MCFG_TIMER_DRIVER_ADD("iotimer", model1_state, io_command_acknowledge)
-
- MCFG_CPU_ADD("tgp", MB86233, 16000000)
- MCFG_CPU_PROGRAM_MAP(model1_vr_tgp_map)
- MCFG_MB86233_FIFO_READ_CB(READ32(model1_state,copro_fifoin_pop))
- MCFG_MB86233_FIFO_READ_OK_CB(READLINE(model1_state,copro_fifoin_pop_ok))
- MCFG_MB86233_FIFO_WRITE_CB(WRITE32(model1_state,copro_fifoout_push))
- MCFG_MB86233_TABLE_REGION("copro_data")
-
- MCFG_MACHINE_START_OVERRIDE(model1_state,model1)
- MCFG_MACHINE_RESET_OVERRIDE(model1_state,model1_vr)
- MCFG_NVRAM_ADD_0FILL("nvram")
-
- MCFG_S24TILE_DEVICE_ADD("tile", 0x3fff)
- MCFG_S24TILE_DEVICE_PALETTE("palette")
-
- MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK )
- MCFG_SCREEN_RAW_PARAMS(XTAL(16'000'000), 656, 0/*+69*/, 496/*+69*/, 424, 0/*+25*/, 384/*+25*/)
- MCFG_SCREEN_UPDATE_DRIVER(model1_state, screen_update_model1)
- MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(model1_state, screen_vblank_model1))
-
- MCFG_PALETTE_ADD("palette", 8192)
- MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR)
-
- MCFG_VIDEO_START_OVERRIDE(model1_state,model1)
-
- MCFG_SEGAM1AUDIO_ADD(M1AUDIO_TAG)
- MCFG_SEGAM1AUDIO_RXD_HANDLER(DEVWRITELINE("m1uart", i8251_device, write_rxd))
-
- MCFG_DEVICE_ADD("m1uart", I8251, 8000000) // uPD71051C, clock unknown
- MCFG_I8251_TXD_HANDLER(DEVWRITELINE(M1AUDIO_TAG, segam1audio_device, write_txd))
-
- MCFG_CLOCK_ADD("m1uart_clock", 500000) // 16 times 31.25MHz (standard Sega/MIDI sound data rate)
- MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("m1uart", i8251_device, write_txc))
- MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("m1uart", i8251_device, write_rxc))
-MACHINE_CONFIG_END
-
MACHINE_CONFIG_START(model1_state::vr)
- model1_vr(config);
+ model1(config);
MCFG_M1COMM_ADD(M1COMM_TAG)
MCFG_DEVICE_BIOS("epr15112");
MACHINE_CONFIG_END
MACHINE_CONFIG_START(model1_state::vformula)
- model1_vr(config);
+ model1(config);
MCFG_M1COMM_ADD(M1COMM_TAG)
MCFG_DEVICE_BIOS("epr15624");
@@ -1812,12 +1725,12 @@ WRITE16_MEMBER(model1_state::r360_w)
}
}
-GAME( 1993, vf, 0, model1, vf, model1_state, 0, ROT0, "Sega", "Virtua Fighter", MACHINE_IMPERFECT_GRAPHICS )
-GAMEL(1992, vr, 0, vr, vr, model1_state, 0, ROT0, "Sega", "Virtua Racing", MACHINE_IMPERFECT_GRAPHICS, layout_vr )
-GAME( 1993, vformula, vr, vformula, vr, model1_state, 0, ROT0, "Sega", "Virtua Formula", MACHINE_IMPERFECT_GRAPHICS )
-GAME( 1993, swa, 0, swa, swa, model1_state, 0, ROT0, "Sega", "Star Wars Arcade", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND )
-GAME( 1994, wingwar, 0, wingwar, wingwar, model1_state, 0, ROT0, "Sega", "Wing War (World)", MACHINE_NOT_WORKING )
-GAME( 1994, wingwaru, wingwar, wingwar, wingwar, model1_state, 0, ROT0, "Sega", "Wing War (US)", MACHINE_NOT_WORKING )
-GAME( 1994, wingwarj, wingwar, wingwar, wingwar, model1_state, 0, ROT0, "Sega", "Wing War (Japan)", MACHINE_NOT_WORKING )
-GAME( 1994, wingwar360, wingwar, wingwar, wingwar, model1_state, wingwar360, ROT0, "Sega", "Wing War R360 (US)", MACHINE_NOT_WORKING )
-GAME( 1993, netmerc, 0, netmerc, vf, model1_state, 0, ROT0, "Sega", "Sega NetMerc", MACHINE_NOT_WORKING )
+GAME( 1993, vf, 0, model1_hle, vf, model1_state, 0, ROT0, "Sega", "Virtua Fighter", MACHINE_IMPERFECT_GRAPHICS )
+GAMEL(1992, vr, 0, vr, vr, model1_state, 0, ROT0, "Sega", "Virtua Racing", 0, layout_vr )
+GAME( 1993, vformula, vr, vformula, vr, model1_state, 0, ROT0, "Sega", "Virtua Formula", MACHINE_IMPERFECT_GRAPHICS )
+GAME( 1993, swa, 0, swa, swa, model1_state, 0, ROT0, "Sega", "Star Wars Arcade", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND )
+GAME( 1994, wingwar, 0, wingwar, wingwar, model1_state, 0, ROT0, "Sega", "Wing War (World)", MACHINE_NOT_WORKING )
+GAME( 1994, wingwaru, wingwar, wingwar, wingwar, model1_state, 0, ROT0, "Sega", "Wing War (US)", MACHINE_NOT_WORKING )
+GAME( 1994, wingwarj, wingwar, wingwar, wingwar, model1_state, 0, ROT0, "Sega", "Wing War (Japan)", MACHINE_NOT_WORKING )
+GAME( 1994, wingwar360, wingwar, wingwar, wingwar, model1_state, wingwar360, ROT0, "Sega", "Wing War R360 (US)", MACHINE_NOT_WORKING )
+GAME( 1993, netmerc, 0, netmerc, vf, model1_state, 0, ROT0, "Sega", "Sega NetMerc", MACHINE_NOT_WORKING )
diff --git a/src/mame/drivers/model2.cpp b/src/mame/drivers/model2.cpp
index 624bd2eb24d..e304ab9ed16 100644
--- a/src/mame/drivers/model2.cpp
+++ b/src/mame/drivers/model2.cpp
@@ -11,7 +11,6 @@
TODO:
- z-sort, focal distance, color gamma and Mip Mapping still needs to be properly sorted in the renderer;
- - FIFO needs to be properly emulated in the various CPU cores (we currently rely on some workarounds);
- sound comms still needs some work (sometimes m68k doesn't get some commands or play them with a delay);
- 2C games needs TGPx4 emulation;
- outputs and artwork (for gearbox indicators);
@@ -92,9 +91,6 @@
#include "cpu/i960/i960.h"
#include "cpu/m68000/m68000.h"
-#include "cpu/mb86233/mb86233.h"
-#include "cpu/mb86235/mb86235.h"
-#include "cpu/sharc/sharc.h"
#include "cpu/z80/z80.h"
#include "machine/clock.h"
#include "machine/cxd1095.h"
@@ -107,205 +103,6 @@
#include "speaker.h"
-enum {
- DSP_TYPE_TGP = 1,
- DSP_TYPE_SHARC = 2,
- DSP_TYPE_TGPX4 = 3
-};
-
-
-#define COPRO_FIFOIN_SIZE 32000
-bool model2_state::copro_fifoin_pop(device_t *device, uint32_t *result,uint32_t offset, uint32_t mem_mask)
-{
- uint32_t r;
-
- if (m_copro_fifoin_num == 0)
- {
- if (m_dsp_type == DSP_TYPE_TGP)
- return false;
-
- fatalerror("Copro FIFOIN underflow (at %08X)\n", device->safe_pc());
- }
-
- r = m_copro_fifoin_data[m_copro_fifoin_rpos++];
-
- if (m_copro_fifoin_rpos == COPRO_FIFOIN_SIZE)
- {
- m_copro_fifoin_rpos = 0;
- }
-
- m_copro_fifoin_num--;
- if (m_dsp_type == DSP_TYPE_SHARC)
- {
- if (m_copro_fifoin_num == 0)
- {
- dynamic_cast<adsp21062_device *>(device)->set_flag_input(0, ASSERT_LINE);
- }
- else
- {
- dynamic_cast<adsp21062_device *>(device)->set_flag_input(0, CLEAR_LINE);
- }
- }
-
- *result = r;
-
- return true;
-}
-
-READ_LINE_MEMBER(model2_state::copro_tgp_fifoin_pop_ok)
-{
- if (m_copro_fifoin_num == 0)
- {
- return CLEAR_LINE;
- }
-
- return ASSERT_LINE;
-}
-
-
-READ32_MEMBER(model2_state::copro_tgp_fifoin_pop)
-{
- uint32_t r = m_copro_fifoin_data[m_copro_fifoin_rpos++];
-
-
- if (m_copro_fifoin_rpos == COPRO_FIFOIN_SIZE)
- {
- m_copro_fifoin_rpos = 0;
- }
-
- m_copro_fifoin_num--;
-
- return r;
-}
-
-
-void model2_state::copro_fifoin_push(device_t *device, uint32_t data, uint32_t offset, uint32_t mem_mask)
-{
- if (m_copro_fifoin_num == COPRO_FIFOIN_SIZE)
- {
- fatalerror("Copro FIFOIN overflow (at %08X)\n", device->safe_pc());
- }
-
- //printf("COPRO FIFOIN at %08X, %08X, %f\n", device->safe_pc(), data, *(float*)&data);
-
- m_copro_fifoin_data[m_copro_fifoin_wpos++] = data;
- if (m_copro_fifoin_wpos == COPRO_FIFOIN_SIZE)
- {
- m_copro_fifoin_wpos = 0;
- }
-
- m_copro_fifoin_num++;
-
- // clear FIFO empty flag on SHARC
- if (m_dsp_type == DSP_TYPE_SHARC)
- {
- dynamic_cast<adsp21062_device *>(device)->set_flag_input(0, CLEAR_LINE);
- }
-}
-
-
-#define COPRO_FIFOOUT_SIZE 32000
-uint32_t model2_state::copro_fifoout_pop(address_space &space,uint32_t offset, uint32_t mem_mask)
-{
- uint32_t r;
-
- m_maincpu->i960_noburst();
-
- if (m_copro_fifoout_num == 0)
- {
- /* Reading from empty FIFO causes the i960 to enter wait state */
- m_maincpu->i960_stall();
-
- /* spin the main cpu and let the TGP catch up */
- // TODO: Daytona needs a much shorter spin time (like 25 usecs), but that breaks other games even moreso
- // @seealso http://www.mameworld.info/ubbthreads/showflat.php?Cat=&Number=358069&page=&view=&sb=5&o=&vc=1
- // Update: skytargt needs an ever smaller time otherwise gameplay is too slow.
- m_maincpu->spin_until_time(attotime::from_usec(1));
-
- // fix ld rN, (rN) case, ask desert, pltkids, zerogun ...
- return 0x00884000+offset*4;
- }
-
- r = m_copro_fifoout_data[m_copro_fifoout_rpos++];
-
- if (m_copro_fifoout_rpos == COPRO_FIFOOUT_SIZE)
- {
- m_copro_fifoout_rpos = 0;
- }
-
- m_copro_fifoout_num--;
-
-// logerror("COPRO FIFOOUT POP %08X, %f, %d\n", r, *(float*)&r,m_copro_fifoout_num);
-
- // set SHARC flag 1: 0 if space available, 1 if FIFO full
- if (m_dsp_type == DSP_TYPE_SHARC)
- {
- if (m_copro_fifoout_num == COPRO_FIFOOUT_SIZE)
- {
- machine().device<adsp21062_device>("dsp")->set_flag_input(1, ASSERT_LINE);
- }
- else
- {
- machine().device<adsp21062_device>("dsp")->set_flag_input(1, CLEAR_LINE);
- }
- }
-
- return r;
-}
-
-void model2_state::copro_fifoout_push(device_t *device, uint32_t data,uint32_t offset,uint32_t mem_mask)
-{
- if (m_copro_fifoout_num == COPRO_FIFOOUT_SIZE)
- {
- fatalerror("Copro FIFOOUT overflow (at %08X)\n", device->safe_pc());
- }
-
-// logerror("COPRO FIFOOUT PUSH %08X, %f, %d\n", data, *(float*)&data,m_copro_fifoout_num);
-
- m_copro_fifoout_data[m_copro_fifoout_wpos++] = data;
- if (m_copro_fifoout_wpos == COPRO_FIFOOUT_SIZE)
- {
- m_copro_fifoout_wpos = 0;
- }
-
- m_copro_fifoout_num++;
-
- // set SHARC flag 1: 0 if space available, 1 if FIFO full
- if (m_dsp_type == DSP_TYPE_SHARC)
- {
- if (m_copro_fifoout_num == COPRO_FIFOOUT_SIZE)
- {
- dynamic_cast<adsp21062_device *>(device)->set_flag_input(1, ASSERT_LINE);
-
- //device->execute().set_input_line(SHARC_INPUT_FLAG1, ASSERT_LINE);
- }
- else
- {
- dynamic_cast<adsp21062_device *>(device)->set_flag_input(1, CLEAR_LINE);
-
- //device->execute().set_input_line(SHARC_INPUT_FLAG1, CLEAR_LINE);
- }
- }
-}
-
-WRITE32_MEMBER(model2_state::copro_tgp_fifoout_push)
-{
- if (m_copro_fifoout_num == COPRO_FIFOOUT_SIZE)
- {
- fatalerror("Copro FIFOOUT overflow (at %08X)\n", m_tgp->pc());
- }
-
-// logerror("COPRO FIFOOUT PUSH %08X, %f, %d\n", data, *(float*)&data,m_copro_fifoout_num);
-
- m_copro_fifoout_data[m_copro_fifoout_wpos++] = data;
- if (m_copro_fifoout_wpos == COPRO_FIFOOUT_SIZE)
- {
- m_copro_fifoout_wpos = 0;
- }
-
- m_copro_fifoout_num++;
-}
-
/* Timers - these count down at 25 MHz and pull IRQ2 when they hit 0 */
READ32_MEMBER(model2_state::timers_r)
{
@@ -359,9 +156,6 @@ TIMER_DEVICE_CALLBACK_MEMBER(model2_state::model2_timer_cb)
MACHINE_START_MEMBER(model2_state,model2)
{
- m_copro_fifoin_data = make_unique_clear<uint32_t[]>(COPRO_FIFOIN_SIZE);
- m_copro_fifoout_data = make_unique_clear<uint32_t[]>(COPRO_FIFOOUT_SIZE);
-
m_port_1c00004 = 1;
m_port_1c00006 = 2;
m_port_1c00010 = 0;
@@ -388,20 +182,94 @@ MACHINE_START_MEMBER(model2_state,model2)
save_item(NAME(m_timerrun[2]));
save_item(NAME(m_timerrun[3]));
- save_item(NAME(m_copro_fifoin_rpos));
- save_item(NAME(m_copro_fifoin_wpos));
- save_item(NAME(m_copro_fifoin_num));
- save_item(NAME(m_copro_fifoout_rpos));
- save_item(NAME(m_copro_fifoout_wpos));
- save_item(NAME(m_copro_fifoout_num));
save_item(NAME(m_geo_write_start_address));
save_item(NAME(m_geo_read_start_address));
}
-MACHINE_START_MEMBER(model2_state,srallyc)
+MACHINE_START_MEMBER(model2_tgp_state,model2_tgp)
+{
+ MACHINE_START_CALL_MEMBER(model2);
+
+ m_copro_fifo_in->setup(16,
+ [this]() { m_copro_tgp->stall(); },
+ [this]() { m_copro_tgp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_copro_tgp->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); });
+ m_copro_fifo_out->setup(16,
+ [this]() { m_maincpu->i960_stall(); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); },
+ [this]() { m_copro_tgp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_copro_tgp->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); });
+}
+
+MACHINE_START_MEMBER(model2b_state,model2b)
{
MACHINE_START_CALL_MEMBER(model2);
+ m_copro_fifo_in->setup(16,
+ [this]() { },
+ [this]() { },
+ [this]() { },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); },
+ [this]() { m_copro_adsp->set_flag_input(0, m_copro_fifo_in->is_empty()); },
+ [this]() { m_copro_adsp->set_flag_input(0, m_copro_fifo_in->is_empty()); });
+ m_copro_fifo_out->setup(16,
+ [this]() { m_maincpu->i960_stall(); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); },
+ [this]() { },
+ [this]() { },
+ [this]() { m_copro_adsp->set_flag_input(1, m_copro_fifo_in->is_full()); },
+ [this]() { m_copro_adsp->set_flag_input(1, m_copro_fifo_in->is_full()); });
+}
+
+MACHINE_START_MEMBER(model2c_state,model2c)
+{
+ MACHINE_START_CALL_MEMBER(model2);
+
+ m_copro_fifo_in->setup(16,
+ [this]() { },
+ [this]() { },
+ [this]() { },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); });
+ m_copro_fifo_out->setup(16,
+ [this]() { m_maincpu->i960_stall(); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); },
+ [this]() { },
+ [this]() { });
+}
+
+MACHINE_START_MEMBER(model2_tgp_state,srallyc)
+{
+ MACHINE_START_CALL_MEMBER(model2_tgp);
+
+ m_port_1c00004 = 2;
+ m_port_1c00006 = 3;
+ m_port_1c00010 = 0;
+ m_port_1c00012 = 1;
+ m_port_1c00014 = 4;
+}
+
+MACHINE_START_MEMBER(model2b_state,srallyc)
+{
+ MACHINE_START_CALL_MEMBER(model2b);
+
+ m_port_1c00004 = 2;
+ m_port_1c00006 = 3;
+ m_port_1c00010 = 0;
+ m_port_1c00012 = 1;
+ m_port_1c00014 = 4;
+}
+
+MACHINE_START_MEMBER(model2c_state,srallyc)
+{
+ MACHINE_START_CALL_MEMBER(model2c);
+
m_port_1c00004 = 2;
m_port_1c00006 = 3;
m_port_1c00010 = 0;
@@ -443,26 +311,12 @@ MACHINE_RESET_MEMBER(model2_state,model2_common)
for (i=0;i<0x20000/4;i++)
m_bufferram[i] = 0x07800f0f;
- m_copro_fifoin_rpos = 0;
- m_copro_fifoin_wpos = 0;
- m_copro_fifoin_num = 0;
- m_copro_fifoout_rpos = 0;
- m_copro_fifoout_wpos = 0;
- m_copro_fifoout_num = 0;
+ m_copro_fifo_in->clear();
+ m_copro_fifo_out->clear();
m_geo_write_start_address = 0;
m_geo_read_start_address = 0;
}
-MACHINE_RESET_MEMBER(model2_state,model2o)
-{
- MACHINE_RESET_CALL_MEMBER(model2_common);
-
- // hold TGP in halt until we have code
- m_tgp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
-
- m_dsp_type = DSP_TYPE_TGP;
-}
-
MACHINE_RESET_MEMBER(model2_state,model2_scsp)
{
membank("bank4")->set_base(memregion("scsp")->base() + 0x200000);
@@ -474,51 +328,51 @@ MACHINE_RESET_MEMBER(model2_state,model2_scsp)
m_scsp->set_ram_base(m_soundram);
}
-MACHINE_RESET_MEMBER(model2_state,model2)
+MACHINE_RESET_MEMBER(model2_tgp_state,model2_tgp)
{
MACHINE_RESET_CALL_MEMBER(model2_common);
- MACHINE_RESET_CALL_MEMBER(model2_scsp);
// hold TGP in halt until we have code
- m_tgp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+ m_copro_tgp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+}
- m_dsp_type = DSP_TYPE_TGP;
+MACHINE_RESET_MEMBER(model2o_state,model2o)
+{
+ MACHINE_RESET_CALL_MEMBER(model2_tgp);
+}
+
+MACHINE_RESET_MEMBER(model2a_state,model2a)
+{
+ MACHINE_RESET_CALL_MEMBER(model2_tgp);
+ MACHINE_RESET_CALL_MEMBER(model2_scsp);
}
-MACHINE_RESET_MEMBER(model2_state,model2b)
+MACHINE_RESET_MEMBER(model2b_state,model2b)
{
MACHINE_RESET_CALL_MEMBER(model2_common);
MACHINE_RESET_CALL_MEMBER(model2_scsp);
- m_dsp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+ m_copro_adsp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
// set FIFOIN empty flag on SHARC
- m_dsp->set_input_line(SHARC_INPUT_FLAG0, ASSERT_LINE);
+ m_copro_adsp->set_input_line(SHARC_INPUT_FLAG0, ASSERT_LINE);
// clear FIFOOUT buffer full flag on SHARC
- m_dsp->set_input_line(SHARC_INPUT_FLAG1, CLEAR_LINE);
-
- m_dsp_type = DSP_TYPE_SHARC;
+ m_copro_adsp->set_input_line(SHARC_INPUT_FLAG1, CLEAR_LINE);
}
-MACHINE_RESET_MEMBER(model2_state,model2c)
+MACHINE_RESET_MEMBER(model2c_state,model2c)
{
MACHINE_RESET_CALL_MEMBER(model2_common);
MACHINE_RESET_CALL_MEMBER(model2_scsp);
- m_tgpx4->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
-
- m_dsp_type = DSP_TYPE_TGPX4;
-}
-
-static void chcolor(palette_device &palette, pen_t color, uint16_t data)
-{
- palette.set_pen_color(color, pal5bit(data >> 0), pal5bit(data >> 5), pal5bit(data >> 10));
+ m_copro_tgpx4->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
}
WRITE16_MEMBER(model2_state::palette_w)
{
COMBINE_DATA(&m_palram[offset]);
- chcolor(*m_palette, offset, m_palram[offset]);
+ u16 color = m_palram[offset];
+ m_palette->set_pen_color(offset, pal5bit(color >> 0), pal5bit(color >> 5), pal5bit(color >> 10));
}
READ16_MEMBER(model2_state::palette_r)
@@ -557,7 +411,7 @@ READ32_MEMBER(model2_state::fifo_control_2a_r)
{
uint32_t r = 0;
- if (m_copro_fifoout_num == 0)
+ if (m_copro_fifo_out->is_empty())
{
r |= 1;
}
@@ -779,38 +633,12 @@ WRITE32_MEMBER(model2_state::srallyc_devices_w)
}
}
-/*****************************************************************************/
-/* COPRO */
-
+// Coprocessor - Common
READ32_MEMBER(model2_state::copro_prg_r)
{
return 0xffffffff;
}
-
-WRITE32_MEMBER(model2_state::copro_prg_w)
-{
- if (m_coproctl & 0x80000000)
- {
- logerror("copro_prg_w: %08X: %08X\n", m_coprocnt, data);
- if (m_coprocnt & 1)
- {
- m_tgpx4_program[m_coprocnt / 2] &= 0xffffffffU;
- m_tgpx4_program[m_coprocnt / 2] |= u64(data) << 32;
- }
- else
- {
- m_tgpx4_program[m_coprocnt / 2] &= 0xffffffff00000000U;
- m_tgpx4_program[m_coprocnt / 2] |= data;
- }
- m_coprocnt++;
- }
- else
- {
- //osd_printf_debug("COPRO: push %08X\n", data);
- }
-}
-
READ32_MEMBER(model2_state::copro_ctl1_r)
{
return m_coproctl;
@@ -825,155 +653,259 @@ WRITE32_MEMBER(model2_state::copro_ctl1_w)
{
logerror("Start copro upload\n");
m_coprocnt = 0;
-
- if(m_dsp_type == DSP_TYPE_TGP)
- m_tgp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+ copro_halt();
}
else
{
logerror("Boot copro, %d dwords\n", m_coprocnt);
- switch(m_dsp_type)
- {
- case DSP_TYPE_TGP:
- // Model 2 / 2A games needs to reset TGP when exiting service mode
- m_tgp->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
- m_tgp->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
- break;
- case DSP_TYPE_SHARC:
- m_dsp->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
- break;
- case DSP_TYPE_TGPX4:
- m_tgpx4->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
- break;
- }
+ copro_boot();
}
}
COMBINE_DATA(&m_coproctl);
}
-WRITE32_MEMBER(model2_state::copro_function_port_w)
+
+
+// Coprocessor - TGP
+void model2_tgp_state::copro_tgp_prog_map(address_map &map)
+{
+ map(0x000, 0xfff).ram().share("copro_tgp_program");
+}
+
+void model2_tgp_state::copro_tgp_data_map(address_map &map)
+{
+ map(0x0000, 0x00ff).ram();
+ map(0x0200, 0x03ff).ram();
+}
+
+void model2_tgp_state::copro_tgp_bank_map(address_map &map)
+{
+ map(0x00020, 0x00023).rw(this, FUNC(model2_tgp_state::copro_sincos_r), FUNC(model2_tgp_state::copro_sincos_w));
+ map(0x00024, 0x00027).rw(this, FUNC(model2_tgp_state::copro_atan_r), FUNC(model2_tgp_state::copro_atan_w));
+ map(0x00028, 0x00029).rw(this, FUNC(model2_tgp_state::copro_inv_r), FUNC(model2_tgp_state::copro_inv_w));
+ map(0x0002a, 0x0002b).rw(this, FUNC(model2_tgp_state::copro_isqrt_r), FUNC(model2_tgp_state::copro_isqrt_w));
+
+ map(0x10000, 0x1ffff).rw(this, FUNC(model2_tgp_state::copro_tgp_memory_r), FUNC(model2_tgp_state::copro_tgp_memory_w));
+}
+
+void model2_tgp_state::copro_tgp_io_map(address_map &map)
+{
+ map(0x0000, 0xffff).m(m_copro_tgp_bank, FUNC(address_map_bank_device::amap32));
+}
+
+void model2_tgp_state::copro_tgp_rf_map(address_map &map)
+{
+ map(0x0, 0x0).nopw(); // leds? busy flag?
+ map(0x1, 0x1).r(m_copro_fifo_in, FUNC(generic_fifo_u32_device::read));
+ map(0x2, 0x2).w(m_copro_fifo_out, FUNC(generic_fifo_u32_device::write));
+ map(0x3, 0x3).w(this, FUNC(model2_tgp_state::copro_tgp_bank_w));
+}
+
+READ32_MEMBER(model2_tgp_state::copro_tgp_memory_r)
+{
+ offs_t adr = (m_copro_tgp_bank_reg & 0xff0000) | offset;
+
+ if(adr & 0x800000) {
+ adr &= (m_copro_data->bytes() >> 2) - 1;
+ return m_copro_data->as_u32(adr);
+ }
+
+ if(adr & 0x400000) {
+ adr &= 0x7fff;
+ return m_bufferram[adr];
+ }
+
+ return 0;
+}
+
+WRITE32_MEMBER(model2_tgp_state::copro_tgp_memory_w)
+{
+ offs_t adr = (m_copro_tgp_bank_reg & 0xff0000) | offset;
+ if(adr & 0x400000) {
+ adr &= 0x7fff;
+ COMBINE_DATA(&m_bufferram[adr]);
+ }
+}
+
+WRITE32_MEMBER(model2_tgp_state::copro_tgp_bank_w)
+{
+ COMBINE_DATA(&m_copro_tgp_bank_reg);
+ m_copro_tgp_bank->set_bank(m_copro_tgp_bank_reg & 0xc00000 ? 1 : 0);
+}
+
+WRITE32_MEMBER(model2_tgp_state::copro_sincos_w)
+{
+ COMBINE_DATA(&m_copro_sincos_base);
+}
+
+READ32_MEMBER(model2_tgp_state::copro_sincos_r)
+{
+ offs_t ang = m_copro_sincos_base + offset * 0x4000;
+ offs_t index = ang & 0x3fff;
+ if(ang & 0x4000)
+ index ^= 0x3fff;
+ u32 result = m_copro_tgp_tables[index];
+ if(ang & 0x8000)
+ result ^= 0x80000000;
+ return result;
+}
+
+WRITE32_MEMBER(model2_tgp_state::copro_inv_w)
+{
+ COMBINE_DATA(&m_copro_inv_base);
+}
+
+READ32_MEMBER(model2_tgp_state::copro_inv_r)
+{
+ offs_t index = ((m_copro_inv_base >> 9) & 0x3ffe) | (offset & 1);
+ u32 result = m_copro_tgp_tables[index | 0x8000];
+ u8 bexp = (m_copro_inv_base >> 23) & 0xff;
+ u8 exp = (result >> 23) + (0x7f - bexp);
+ result = (result & 0x807fffff) | (exp << 23);
+ if(m_copro_inv_base & 0x80000000)
+ result ^= 0x80000000;
+ return result;
+}
+
+WRITE32_MEMBER(model2_tgp_state::copro_isqrt_w)
+{
+ COMBINE_DATA(&m_copro_isqrt_base);
+}
+
+READ32_MEMBER(model2_tgp_state::copro_isqrt_r)
+{
+ offs_t index = 0x2000 ^ (((m_copro_isqrt_base>> 10) & 0x3ffe) | (offset & 1));
+ u32 result = m_copro_tgp_tables[index | 0xc000];
+ u8 bexp = (m_copro_isqrt_base >> 24) & 0x7f;
+ u8 exp = (result >> 23) + (0x3f - bexp);
+ result = (result & 0x807fffff) | (exp << 23);
+ if(!(offset & 1))
+ result &= 0x7fffffff;
+ return result;
+}
+
+WRITE32_MEMBER(model2_tgp_state::copro_atan_w)
+{
+ COMBINE_DATA(&m_copro_atan_base[offset]);
+ m_copro_tgp->gpio0_w((m_copro_atan_base[0] & 0x7fffffff) <= (m_copro_atan_base[1] & 0x7fffffff));
+}
+
+READ32_MEMBER(model2_tgp_state::copro_atan_r)
+{
+ u8 ie = 0x88 - (m_copro_atan_base[3] >> 23);
+
+ bool s0 = m_copro_atan_base[0] & 0x80000000;
+ bool s1 = m_copro_atan_base[1] & 0x80000000;
+ bool s2 = (m_copro_atan_base[0] & 0x7fffffff) <= (m_copro_atan_base[1] & 0x7fffffff);
+
+ offs_t im = m_copro_atan_base[3] & 0x7fffff;
+ offs_t index = ie <= 0x17 ? (im | 0x800000) >> ie : 0;
+ if(index == 0x4000)
+ index = 0x3fff;
+
+ u32 result = m_copro_tgp_tables[index | 0x4000];
+
+ if(s0 ^ s1 ^ s2)
+ result >>= 16;
+ if(s2)
+ result += 0x4000;
+ if((s0 && !s2) || (s1 && s2))
+ result += 0x8000;
+
+ return result & 0xffff;
+}
+
+WRITE32_MEMBER(model2_tgp_state::copro_function_port_w)
{
uint32_t d = data & 0x800fffff;
uint32_t a = (offset >> 2) & 0xff;
d |= a << 23;
- //logerror("copro_function_port_w: %08X, %08X, %08X\n", data, offset, mem_mask);
- if (m_dsp_type == DSP_TYPE_SHARC)
- copro_fifoin_push(machine().device("dsp"), d,offset,mem_mask);
- else if (m_dsp_type == DSP_TYPE_TGP)
- copro_fifoin_push(machine().device("tgp"), d,offset,mem_mask);
- else if (m_dsp_type == DSP_TYPE_TGPX4)
- {
- m_maincpu->i960_noburst();
+ m_copro_fifo_in->push(u32(d));
+}
- if (m_tgpx4->is_fifoin_full())
- {
- //fatalerror("model2.cpp: unsupported i960->tgpx4 fifo full");
- /* Writing to full FIFO causes the i960 to enter wait state */
- m_maincpu->i960_stall();
- /* spin the main cpu and let the TGP catch up */
- m_maincpu->spin_until_time(attotime::from_usec(1));
- return;
- }
+void model2_tgp_state::copro_halt()
+{
+ m_copro_tgp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+}
- m_tgpx4->fifoin_w(d);
- }
+void model2_tgp_state::copro_boot()
+{
+ m_copro_tgp->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
+ m_copro_tgp->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
}
-READ32_MEMBER(model2_state::copro_fifo_r)
+READ32_MEMBER(model2_tgp_state::copro_fifo_r)
{
- //logerror("copro_fifo_r: %08X, %08X\n", offset, mem_mask);
- if (m_dsp_type == DSP_TYPE_SHARC || m_dsp_type == DSP_TYPE_TGP)
+ m_maincpu->i960_noburst();
+ return m_copro_fifo_out->pop();
+}
+
+WRITE32_MEMBER(model2_tgp_state::copro_fifo_w)
+{
+ m_maincpu->i960_noburst();
+ if (m_coproctl & 0x80000000)
{
- return copro_fifoout_pop(space, offset, mem_mask);
+ m_copro_tgp_program[m_coprocnt] = data;
+ m_coprocnt++;
}
else
- {
- // TODO
-// printf("FIFO OUT read\n");
- if (m_tgpx4->is_fifoout0_empty())
- {
- /* Reading from empty FIFO causes the i960 to enter wait state */
- downcast<i960_cpu_device &>(*m_maincpu).i960_stall();
- /* spin the main cpu and let the TGP catch up */
- m_maincpu->spin_until_time(attotime::from_usec(1));
+ m_copro_fifo_in->push(u32(data));
+}
- return 0x00884000+offset*4;
- }
- else
- {
- return (uint32_t)(m_tgpx4->fifoout0_r());
- }
- }
- return 0;
+
+
+// Coprocessor - SHARC
+
+READ32_MEMBER(model2b_state::copro_sharc_buffer_r)
+{
+ return m_bufferram[offset & 0x7fff];
}
-READ32_MEMBER(model2c_state::fifo_control_2c_r)
+WRITE32_MEMBER(model2b_state::copro_sharc_buffer_w)
{
- return (m_tgpx4->is_fifoout0_empty() == true) ? 1 : 0;
+ m_bufferram[offset & 0x7fff] = data;
}
-WRITE32_MEMBER(model2_state::copro_fifo_w)
+void model2b_state::copro_sharc_map(address_map &map)
{
+ map(0x0400000, 0x0bfffff).r(m_copro_fifo_in, FUNC(generic_fifo_u32_device::read));
+ map(0x0c00000, 0x13fffff).w(m_copro_fifo_out, FUNC(generic_fifo_u32_device::write));
+ map(0x1400000, 0x1bfffff).rw(this, FUNC(model2b_state::copro_sharc_buffer_r), FUNC(model2b_state::copro_sharc_buffer_w));
+ map(0x1c00000, 0x1dfffff).rom().region("copro_data", 0);
+}
+
+void model2b_state::copro_halt()
+{
+}
+
+void model2b_state::copro_boot()
+{
+ m_copro_adsp->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
+}
+
+READ32_MEMBER(model2b_state::copro_fifo_r)
+{
+ m_maincpu->i960_noburst();
+ return m_copro_fifo_out->pop();
+}
+
+WRITE32_MEMBER(model2b_state::copro_fifo_w)
+{
+ m_maincpu->i960_noburst();
if (m_coproctl & 0x80000000)
{
- if (m_dsp_type == DSP_TYPE_SHARC)
- {
- machine().device<adsp21062_device>("dsp")->external_dma_write(m_coprocnt, data & 0xffff);
- }
- else if (m_dsp_type == DSP_TYPE_TGP)
- {
- m_tgp_program[m_coprocnt] = data;
- }
- else if (m_dsp_type == DSP_TYPE_TGPX4)
- {
- if (m_coprocnt & 1)
- {
- m_tgpx4_program[m_coprocnt / 2] &= 0xffffffffU;
- m_tgpx4_program[m_coprocnt / 2] |= u64(data) << 32;
- }
- else
- {
- m_tgpx4_program[m_coprocnt / 2] &= 0xffffffff00000000U;
- m_tgpx4_program[m_coprocnt / 2] |= data;
- }
- }
-
+ m_copro_adsp->external_dma_write(m_coprocnt, data & 0xffff);
m_coprocnt++;
}
else
{
-// if(m_coprocnt == 0)
-// return;
-
- //osd_printf_debug("copro_fifo_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_maincpu->pc());
- if (m_dsp_type == DSP_TYPE_SHARC)
- copro_fifoin_push(machine().device("dsp"), data,offset,mem_mask);
- else if (m_dsp_type == DSP_TYPE_TGP)
- copro_fifoin_push(machine().device("tgp"), data,offset,mem_mask);
- else if (m_dsp_type == DSP_TYPE_TGPX4)
- {
- m_maincpu->i960_noburst();
-
- if (m_tgpx4->is_fifoin_full())
- {
- //fatalerror("model2.cpp: unsupported i960->tgpx4 fifo full");
- /* Writing to full FIFO causes the i960 to enter wait state */
- m_maincpu->i960_stall();
- /* spin the main cpu and let the TGP catch up */
- m_maincpu->spin_until_time(attotime::from_usec(1));
- }
- else
- {
-// printf("push %08X at %08X\n", data, m_maincpu->pc());
- m_tgpx4->fifoin_w(data);
- }
- }
+ m_copro_fifo_in->push(u32(data));
}
}
-WRITE32_MEMBER(model2_state::copro_sharc_iop_w)
+WRITE32_MEMBER(model2b_state::copro_sharc_iop_w)
{
/* FIXME: clean this mess */
if ((strcmp(machine().system().name, "schamp" ) == 0) ||
@@ -987,13 +919,13 @@ WRITE32_MEMBER(model2_state::copro_sharc_iop_w)
(strcmp(machine().system().name, "vonj" ) == 0) ||
(strcmp(machine().system().name, "rchase2" ) == 0))
{
- machine().device<adsp21062_device>("dsp")->external_iop_write(offset, data);
+ m_copro_adsp->external_iop_write(offset, data);
}
else
{
if(offset == 0x10/4)
{
- machine().device<adsp21062_device>("dsp")->external_iop_write(offset, data);
+ m_copro_adsp->external_iop_write(offset, data);
return;
}
@@ -1004,14 +936,83 @@ WRITE32_MEMBER(model2_state::copro_sharc_iop_w)
else
{
m_iop_data |= (data & 0xffff) << 16;
- machine().device<adsp21062_device>("dsp")->external_iop_write(offset, m_iop_data);
+ m_copro_adsp->external_iop_write(offset, m_iop_data);
}
m_iop_write_num++;
}
}
+WRITE32_MEMBER(model2b_state::copro_function_port_w)
+{
+ uint32_t d = data & 0x800fffff;
+ uint32_t a = (offset >> 2) & 0xff;
+ d |= a << 23;
+
+ m_copro_fifo_in->push(u32(d));
+}
+
+
+
+// Coprocessor - TGPx4
+void model2c_state::copro_halt()
+{
+}
+
+void model2c_state::copro_boot()
+{
+ m_copro_tgpx4->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
+}
+
+READ32_MEMBER(model2c_state::copro_fifo_r)
+{
+ m_maincpu->i960_noburst();
+ return m_copro_fifo_out->pop();
+}
+
+WRITE32_MEMBER(model2c_state::copro_fifo_w)
+{
+ m_maincpu->i960_noburst();
+ if (m_coproctl & 0x80000000)
+ {
+ if (m_coprocnt & 1)
+ {
+ m_copro_tgpx4_program[m_coprocnt / 2] &= 0xffffffffU;
+ m_copro_tgpx4_program[m_coprocnt / 2] |= u64(data) << 32;
+ }
+ else
+ {
+ m_copro_tgpx4_program[m_coprocnt / 2] &= 0xffffffff00000000U;
+ m_copro_tgpx4_program[m_coprocnt / 2] |= data;
+ }
+
+ m_coprocnt++;
+ }
+ else
+ {
+ m_copro_fifo_in->push(u32(data));
+ }
+}
+
+WRITE32_MEMBER(model2c_state::copro_function_port_w)
+{
+ uint32_t d = data & 0x800fffff;
+ uint32_t a = (offset >> 2) & 0xff;
+ d |= a << 23;
+
+ m_copro_fifo_in->push(u32(d));
+}
+void model2c_state::copro_tgpx4_map(address_map &map)
+{
+ map(0x00000000, 0x00007fff).ram().share("copro_tgpx4_program");
+}
+void model2c_state::copro_tgpx4_data_map(address_map &map)
+{
+// map(0x00000000, 0x000003ff) internal RAM
+ map(0x00400000, 0x00407fff).ram().share("bufferram").mirror(0x003f8000);
+ map(0x00800000, 0x008fffff).rom().region("copro_data",0); // ROM data
+}
/*****************************************************************************/
@@ -1343,7 +1344,7 @@ WRITE32_MEMBER(model2_state::render_mode_w)
// osd_printf_debug("Mode = %08X\n", data);
}
-WRITE32_MEMBER(model2_state::model2o_tex_w0)
+WRITE32_MEMBER(model2_tgp_state::tex0_w)
{
if ( (offset & 1) == 0 )
{
@@ -1357,7 +1358,7 @@ WRITE32_MEMBER(model2_state::model2o_tex_w0)
}
}
-WRITE32_MEMBER(model2_state::model2o_tex_w1)
+WRITE32_MEMBER(model2_tgp_state::tex1_w)
{
if ( (offset & 1) == 0 )
{
@@ -1513,25 +1514,31 @@ READ8_MEMBER(model2o_state::model2o_in_r)
}
}
+/* model 2/2a common memory map */
+void model2_tgp_state::model2_tgp_mem(address_map &map)
+{
+ model2_base_mem(map);
+
+ map(0x00804000, 0x00807fff).rw(this, FUNC(model2_tgp_state::geo_prg_r), FUNC(model2_tgp_state::geo_prg_w));
+ map(0x00880000, 0x00883fff).w(this, FUNC(model2_tgp_state::copro_function_port_w));
+ map(0x00884000, 0x00887fff).rw(this, FUNC(model2_tgp_state::copro_fifo_r), FUNC(model2_tgp_state::copro_fifo_w));
+
+ map(0x00980000, 0x00980003).rw(this, FUNC(model2_tgp_state::copro_ctl1_r), FUNC(model2_tgp_state::copro_ctl1_w));
+ map(0x00980008, 0x0098000b).w(this, FUNC(model2_tgp_state::geo_ctl1_w));
+ map(0x009c0000, 0x009cffff).rw(this, FUNC(model2_tgp_state::model2_serial_r), FUNC(model2_tgp_state::model2_serial_w));
+
+ map(0x12000000, 0x121fffff).ram().w(this, FUNC(model2o_state::tex0_w)).mirror(0x200000).share("textureram0"); // texture RAM 0
+ map(0x12400000, 0x125fffff).ram().w(this, FUNC(model2o_state::tex1_w)).mirror(0x200000).share("textureram1"); // texture RAM 1
+}
+
/* original Model 2 overrides */
void model2o_state::model2o_mem(address_map &map)
{
- model2_base_mem(map);
+ model2_tgp_mem(map);
map(0x00200000, 0x0021ffff).ram();
map(0x00220000, 0x0023ffff).rom().region("maincpu", 0x20000);
-
- map(0x00804000, 0x00807fff).rw(this, FUNC(model2o_state::geo_prg_r), FUNC(model2o_state::geo_prg_w));
- map(0x00880000, 0x00883fff).w(this, FUNC(model2o_state::copro_function_port_w));
- map(0x00884000, 0x00887fff).rw(this, FUNC(model2o_state::copro_fifo_r), FUNC(model2o_state::copro_fifo_w));
-
- map(0x00980000, 0x00980003).rw(this, FUNC(model2o_state::copro_ctl1_r), FUNC(model2o_state::copro_ctl1_w));
map(0x00980004, 0x00980007).r(this, FUNC(model2o_state::fifo_control_2o_r));
- map(0x00980008, 0x0098000b).w(this, FUNC(model2o_state::geo_ctl1_w));
- map(0x009c0000, 0x009cffff).rw(this, FUNC(model2o_state::model2_serial_r), FUNC(model2o_state::model2_serial_w));
-
- map(0x12000000, 0x121fffff).ram().w(this, FUNC(model2o_state::model2o_tex_w0)).mirror(0x200000).share("textureram0"); // texture RAM 0
- map(0x12400000, 0x125fffff).ram().w(this, FUNC(model2o_state::model2o_tex_w1)).mirror(0x200000).share("textureram1"); // texture RAM 1
map(0x01c00000, 0x01c0001f).r(this, FUNC(model2o_state::model2o_in_r)).umask32(0x00ff00ff);
map(0x01c00040, 0x01c00043).r(this, FUNC(model2o_state::daytona_unk_r));
@@ -1603,10 +1610,11 @@ READ8_MEMBER(model2o_gtx_state::gtx_r)
return ROM[m_gtx_state*0x100000+offset];
}
-ADDRESS_MAP_START(model2o_gtx_state::model2o_gtx_mem)
- AM_IMPORT_FROM(model2o_mem)
- AM_RANGE(0x02c00000,0x02cfffff) AM_READ8(gtx_r,0xffffffff)
-ADDRESS_MAP_END
+void model2o_gtx_state::model2o_gtx_mem(address_map &map)
+{
+ model2o_mem(map);
+ map(0x02c00000,0x02cfffff).r(this, FUNC(model2o_gtx_state::gtx_r));
+}
/* TODO: read by Sonic the Fighters (bit 1), unknown purpose */
READ32_MEMBER(model2_state::copro_status_r)
@@ -1620,22 +1628,10 @@ READ32_MEMBER(model2_state::copro_status_r)
/* 2A-CRX overrides */
void model2a_state::model2a_crx_mem(address_map &map)
{
- model2_base_mem(map);
+ model2_tgp_mem(map);
map(0x00200000, 0x0023ffff).ram();
- map(0x00804000, 0x00807fff).rw(this, FUNC(model2a_state::geo_prg_r), FUNC(model2a_state::geo_prg_w));
- map(0x00880000, 0x00883fff).w(this, FUNC(model2a_state::copro_function_port_w));
- map(0x00884000, 0x00887fff).rw(this, FUNC(model2a_state::copro_fifo_r), FUNC(model2a_state::copro_fifo_w));
-
- map(0x00980000, 0x00980003).rw(this, FUNC(model2a_state::copro_ctl1_r), FUNC(model2a_state::copro_ctl1_w));
- map(0x00980008, 0x0098000b).w(this, FUNC(model2a_state::geo_ctl1_w));
- map(0x00980014, 0x00980017).r(this, FUNC(model2a_state::copro_status_r));
- map(0x009c0000, 0x009cffff).rw(this, FUNC(model2a_state::model2_serial_r), FUNC(model2a_state::model2_serial_w));
-
- map(0x12000000, 0x121fffff).ram().w(this, FUNC(model2a_state::model2o_tex_w0)).mirror(0x200000).share("textureram0"); // texture RAM 0
- map(0x12400000, 0x125fffff).ram().w(this, FUNC(model2a_state::model2o_tex_w1)).mirror(0x200000).share("textureram1"); // texture RAM 1
-
map(0x01c00000, 0x01c0001f).r(this, FUNC(model2a_state::model2_crx_in_r)).umask32(0x00ff00ff);
map(0x01c00000, 0x01c00003).w(this, FUNC(model2a_state::ctrl0_w));
map(0x01c00008, 0x01c0000f).nopw();
@@ -1709,7 +1705,6 @@ void model2c_state::model2c_crx_mem(address_map &map)
map(0x00884000, 0x00887fff).rw(this, FUNC(model2c_state::copro_fifo_r), FUNC(model2c_state::copro_fifo_w));
map(0x00980000, 0x00980003).rw(this, FUNC(model2c_state::copro_ctl1_r), FUNC(model2c_state::copro_ctl1_w));
- map(0x00980004, 0x00980007).r(this, FUNC(model2c_state::fifo_control_2c_r));
map(0x00980008, 0x0098000b).w(this, FUNC(model2c_state::geo_ctl1_w));
map(0x00980014, 0x00980017).r(this, FUNC(model2c_state::copro_status_r));
map(0x009c0000, 0x009cffff).rw(this, FUNC(model2c_state::model2_serial_r), FUNC(model2c_state::model2_serial_w));
@@ -2336,7 +2331,7 @@ WRITE_LINE_MEMBER(model2_state::sound_ready_w)
}
#endif
-TIMER_DEVICE_CALLBACK_MEMBER(model2_state::model2c_interrupt)
+TIMER_DEVICE_CALLBACK_MEMBER(model2c_state::model2c_interrupt)
{
int scanline = param;
@@ -2390,86 +2385,23 @@ WRITE16_MEMBER(model2_state::model2snd_ctrl)
}
}
-ADDRESS_MAP_START(model2_state::model2_snd)
- AM_RANGE(0x000000, 0x07ffff) AM_RAM AM_REGION("audiocpu", 0) AM_SHARE("soundram")
- AM_RANGE(0x100000, 0x100fff) AM_DEVREADWRITE("scsp", scsp_device, read, write)
- AM_RANGE(0x400000, 0x400001) AM_WRITE(model2snd_ctrl)
- AM_RANGE(0x600000, 0x67ffff) AM_ROM AM_REGION("audiocpu", 0x80000)
- AM_RANGE(0x800000, 0x9fffff) AM_ROM AM_REGION("scsp", 0)
- AM_RANGE(0xa00000, 0xdfffff) AM_ROMBANK("bank4")
- AM_RANGE(0xe00000, 0xffffff) AM_ROMBANK("bank5")
-ADDRESS_MAP_END
-
-
-WRITE8_MEMBER(model2_state::scsp_irq)
+void model2_state::model2_snd(address_map &map)
{
- m_audiocpu->set_input_line(offset, data);
+ map(0x000000, 0x07ffff).ram().region("audiocpu", 0).share("soundram");
+ map(0x100000, 0x100fff).rw(m_scsp, FUNC(scsp_device::read), FUNC(scsp_device::write));
+ map(0x400000, 0x400001).w(this, FUNC(model2_state::model2snd_ctrl));
+ map(0x600000, 0x67ffff).rom().region("audiocpu", 0x80000);
+ map(0x800000, 0x9fffff).rom().region("scsp", 0);
+ map(0xa00000, 0xdfffff).bankr("bank4");
+ map(0xe00000, 0xffffff).bankr("bank5");
}
-/*****************************************************************************/
-// SHARC memory maps
-
-READ32_MEMBER(model2_state::copro_sharc_input_fifo_r)
-{
- uint32_t result = 0;
- bool type;
-
- type = copro_fifoin_pop(machine().device("dsp"), &result,offset,mem_mask);
- if(type == false)
- printf("Read from empty FIFO?\n");
- return result;
-}
-
-WRITE32_MEMBER(model2_state::copro_sharc_output_fifo_w)
-{
- //osd_printf_debug("SHARC FIFOOUT push %08X\n", data);
- copro_fifoout_push(machine().device("dsp"), data,offset,mem_mask);
-}
-
-READ32_MEMBER(model2_state::copro_sharc_buffer_r)
-{
- return m_bufferram[offset & 0x7fff];
-}
-
-WRITE32_MEMBER(model2_state::copro_sharc_buffer_w)
-{
- m_bufferram[offset & 0x7fff] = data;
-}
-
-ADDRESS_MAP_START(model2_state::copro_sharc_map)
- AM_RANGE(0x0400000, 0x0bfffff) AM_READ(copro_sharc_input_fifo_r)
- AM_RANGE(0x0c00000, 0x13fffff) AM_WRITE(copro_sharc_output_fifo_w)
- AM_RANGE(0x1400000, 0x1bfffff) AM_READWRITE(copro_sharc_buffer_r, copro_sharc_buffer_w)
- AM_RANGE(0x1c00000, 0x1dfffff) AM_ROM AM_REGION("copro_data", 0)
-// AM_RANGE(0xffff8000, 0xffffffff) AM_READWRITE(copro_sharc_buffer_r, copro_sharc_buffer_w) // last bronx, cpu core bug?
-ADDRESS_MAP_END
-
-#if 0
-ADDRESS_MAP_START(model2_state::geo_sharc_map)
-ADDRESS_MAP_END
-#endif
-
-/*****************************************************************************/
-/* TGP memory maps */
-
-READ32_MEMBER(model2_state::copro_tgp_buffer_r)
-{
- return m_bufferram[offset & 0x7fff];
-}
-
-WRITE32_MEMBER(model2_state::copro_tgp_buffer_w)
+WRITE8_MEMBER(model2_state::scsp_irq)
{
- m_bufferram[offset&0x7fff] = data;
+ m_audiocpu->set_input_line(offset, data);
}
-ADDRESS_MAP_START(model2_state::copro_tgp_map)
- AM_RANGE(0x00000000, 0x00007fff) AM_RAM AM_SHARE("tgp_program")
- AM_RANGE(0x00400000, 0x00407fff) AM_READWRITE(copro_tgp_buffer_r, copro_tgp_buffer_w)
- AM_RANGE(0x00800000, 0x009fffff) AM_ROM AM_REGION("tgp", 0)
- AM_RANGE(0xff800000, 0xff9fffff) AM_ROM AM_REGION("tgp", 0)
-ADDRESS_MAP_END
-
/*****************************************************************************/
#define VIDEO_CLOCK XTAL(32'000'000)
@@ -2526,15 +2458,25 @@ MACHINE_CONFIG_START(model2o_state::model2o)
MCFG_CPU_PROGRAM_MAP(model2o_mem)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", model2_state, model2_interrupt, "screen", 0, 1)
- MCFG_CPU_ADD("tgp", MB86233, 16000000)
- MCFG_CPU_PROGRAM_MAP(copro_tgp_map)
- MCFG_MB86233_FIFO_READ_CB(READ32(model2_state,copro_tgp_fifoin_pop))
- MCFG_MB86233_FIFO_READ_OK_CB(READLINE(model2_state,copro_tgp_fifoin_pop_ok))
- MCFG_MB86233_FIFO_WRITE_CB(WRITE32(model2_state,copro_tgp_fifoout_push))
- MCFG_MB86233_TABLE_REGION("copro_data")
-
- MCFG_MACHINE_START_OVERRIDE(model2_state,model2)
- MCFG_MACHINE_RESET_OVERRIDE(model2_state,model2o)
+ MCFG_CPU_ADD("copro_tgp", MB86234, 16000000)
+ MCFG_CPU_PROGRAM_MAP(copro_tgp_prog_map)
+ MCFG_CPU_DATA_MAP(copro_tgp_data_map)
+ MCFG_CPU_IO_MAP(copro_tgp_io_map)
+ MCFG_DEVICE_ADDRESS_MAP(mb86233_device::AS_RF, copro_tgp_rf_map)
+
+ MCFG_DEVICE_ADD("copro_tgp_bank", ADDRESS_MAP_BANK, 0)
+ MCFG_DEVICE_PROGRAM_MAP(copro_tgp_bank_map)
+ MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
+ MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32)
+ MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(17)
+ MCFG_ADDRESS_MAP_BANK_SHIFT(-2)
+ MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000)
+
+ MCFG_DEVICE_ADD("copro_fifo_in", GENERIC_FIFO_U32, 0)
+ MCFG_DEVICE_ADD("copro_fifo_out", GENERIC_FIFO_U32, 0)
+
+ MCFG_MACHINE_START_OVERRIDE(model2_tgp_state,model2_tgp)
+ MCFG_MACHINE_RESET_OVERRIDE(model2o_state,model2o)
MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
MCFG_NVRAM_ADD_1FILL("backup1")
@@ -2629,15 +2571,25 @@ MACHINE_CONFIG_START(model2a_state::model2a)
MCFG_CPU_PROGRAM_MAP(model2a_crx_mem)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", model2_state, model2_interrupt, "screen", 0, 1)
- MCFG_CPU_ADD("tgp", MB86233, 16000000)
- MCFG_CPU_PROGRAM_MAP(copro_tgp_map)
- MCFG_MB86233_FIFO_READ_CB(READ32(model2_state,copro_tgp_fifoin_pop))
- MCFG_MB86233_FIFO_READ_OK_CB(READLINE(model2_state,copro_tgp_fifoin_pop_ok))
- MCFG_MB86233_FIFO_WRITE_CB(WRITE32(model2_state,copro_tgp_fifoout_push))
- MCFG_MB86233_TABLE_REGION("copro_data")
-
- MCFG_MACHINE_START_OVERRIDE(model2_state,model2)
- MCFG_MACHINE_RESET_OVERRIDE(model2_state,model2)
+ MCFG_CPU_ADD("copro_tgp", MB86234, 16000000)
+ MCFG_CPU_PROGRAM_MAP(copro_tgp_prog_map)
+ MCFG_CPU_DATA_MAP(copro_tgp_data_map)
+ MCFG_CPU_IO_MAP(copro_tgp_io_map)
+ MCFG_DEVICE_ADDRESS_MAP(mb86233_device::AS_RF, copro_tgp_rf_map)
+
+ MCFG_DEVICE_ADD("copro_tgp_bank", ADDRESS_MAP_BANK, 0)
+ MCFG_DEVICE_PROGRAM_MAP(copro_tgp_bank_map)
+ MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
+ MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(32)
+ MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(17)
+ MCFG_ADDRESS_MAP_BANK_SHIFT(-2)
+ MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000)
+
+ MCFG_DEVICE_ADD("copro_fifo_in", GENERIC_FIFO_U32, 0)
+ MCFG_DEVICE_ADD("copro_fifo_out", GENERIC_FIFO_U32, 0)
+
+ MCFG_MACHINE_START_OVERRIDE(model2_tgp_state,model2_tgp)
+ MCFG_MACHINE_RESET_OVERRIDE(model2a_state,model2a)
MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
MCFG_NVRAM_ADD_1FILL("backup1")
@@ -2651,7 +2603,7 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(model2a_state::manxtt)
model2a(config);
- MCFG_MACHINE_START_OVERRIDE(model2_state,srallyc)
+ MCFG_MACHINE_START_OVERRIDE(model2a_state,srallyc)
MACHINE_CONFIG_END
MACHINE_CONFIG_START(model2a_state::manxttdx) /* Includes a Model 1 Sound board for additional sounds - Deluxe version only */
@@ -2687,7 +2639,7 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(model2a_state::srallyc)
model2a(config);
- MCFG_MACHINE_START_OVERRIDE(model2_state,srallyc)
+ MCFG_MACHINE_START_OVERRIDE(model2a_state,srallyc)
sj25_0207_01(config);
MACHINE_CONFIG_END
@@ -2697,7 +2649,7 @@ MACHINE_CONFIG_START(model2b_state::model2b)
MCFG_CPU_PROGRAM_MAP(model2b_crx_mem)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", model2_state, model2_interrupt, "screen", 0, 1)
- MCFG_CPU_ADD("dsp", ADSP21062, 40000000)
+ MCFG_CPU_ADD("copro_adsp", ADSP21062, 40000000)
MCFG_SHARC_BOOT_MODE(BOOT_MODE_HOST)
MCFG_CPU_DATA_MAP(copro_sharc_map)
@@ -2707,8 +2659,11 @@ MACHINE_CONFIG_START(model2b_state::model2b)
MCFG_QUANTUM_TIME(attotime::from_hz(18000))
- MCFG_MACHINE_START_OVERRIDE(model2_state,model2)
- MCFG_MACHINE_RESET_OVERRIDE(model2_state,model2b)
+ MCFG_DEVICE_ADD("copro_fifo_in", GENERIC_FIFO_U32, 0)
+ MCFG_DEVICE_ADD("copro_fifo_out", GENERIC_FIFO_U32, 0)
+
+ MCFG_MACHINE_START_OVERRIDE(model2b_state,model2b)
+ MCFG_MACHINE_RESET_OVERRIDE(model2b_state,model2b)
MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
MCFG_NVRAM_ADD_1FILL("backup1")
@@ -2739,7 +2694,7 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(model2b_state::indy500)
model2b(config);
- MCFG_MACHINE_START_OVERRIDE(model2_state,srallyc)
+ MCFG_MACHINE_START_OVERRIDE(model2b_state,srallyc)
MACHINE_CONFIG_END
@@ -2764,31 +2719,23 @@ MACHINE_CONFIG_START(model2b_state::rchase2)
MCFG_DEVICE_ADD("ioexp", CXD1095, 0)
MACHINE_CONFIG_END
-
-void model2c_state::copro_tgpx4_map(address_map &map)
-{
- map(0x00000000, 0x00007fff).ram().share("tgpx4_program");
-}
-
-void model2c_state::copro_tgpx4_data_map(address_map &map)
-{
-// map(0x00000000, 0x000003ff) internal RAM
- map(0x00400000, 0x007fffff).rw(this, FUNC(model2_state::copro_tgp_buffer_r),FUNC(model2_state::copro_tgp_buffer_w)); // bufferram
- map(0x00800000, 0x008fffff).rom().region("copro_data",0); // ROM data
-}
-
/* 2C-CRX */
MACHINE_CONFIG_START(model2c_state::model2c)
MCFG_CPU_ADD("maincpu", I960, 25000000)
MCFG_CPU_PROGRAM_MAP(model2c_crx_mem)
- MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", model2_state, model2c_interrupt, "screen", 0, 1)
+ MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", model2c_state, model2c_interrupt, "screen", 0, 1)
- MCFG_CPU_ADD("tgpx4", MB86235, 40000000)
+ MCFG_CPU_ADD("copro_tgpx4", MB86235, 40000000)
MCFG_CPU_PROGRAM_MAP(copro_tgpx4_map)
MCFG_CPU_DATA_MAP(copro_tgpx4_data_map)
+ MCFG_MB86235_FIFOIN(":copro_fifo_in")
+ MCFG_MB86235_FIFOOUT0(":copro_fifo_out")
- MCFG_MACHINE_START_OVERRIDE(model2_state,model2)
- MCFG_MACHINE_RESET_OVERRIDE(model2_state,model2c)
+ MCFG_DEVICE_ADD("copro_fifo_in", GENERIC_FIFO_U32, 0)
+ MCFG_DEVICE_ADD("copro_fifo_out", GENERIC_FIFO_U32, 0)
+
+ MCFG_MACHINE_START_OVERRIDE(model2c_state,model2c)
+ MCFG_MACHINE_RESET_OVERRIDE(model2c_state,model2c)
MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
MCFG_NVRAM_ADD_1FILL("backup1")
@@ -2822,7 +2769,7 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(model2c_state::overrev2c)
model2c(config);
- MCFG_MACHINE_START_OVERRIDE(model2_state,srallyc)
+ MCFG_MACHINE_START_OVERRIDE(model2c_state,srallyc)
MACHINE_CONFIG_END
@@ -2842,25 +2789,31 @@ OPR-14747 / Linked to 315-5679B
*/
// TODO: roms 58/59 and 62/63 aren't really used so far, actually they should be 32_word loaded too?
+// the 'a' versions have the atan table fixed compared to model 1
#define MODEL2_CPU_BOARD \
- ROM_REGION( 0xc0000, "copro_data", 0 ) \
+ ROM_REGION32_LE( 0x40000, "copro_tgp_tables", 0 ) \
ROM_LOAD32_WORD("opr-14742a.45", 0x000000, 0x20000, CRC(90c6b117) SHA1(f46429fffcee17d056f56d5fe035a33f1fd6c27e) ) \
ROM_LOAD32_WORD("opr-14743a.46", 0x000002, 0x20000, CRC(ae7f446b) SHA1(5b9f1fc47caf21e061e930c0d72804e4ec8c7bca) ) \
- ROM_LOAD("opr-14744.58", 0x040000, 0x20000, CRC(730ea9e0) SHA1(651f1db4089a400d073b19ada299b4b08b08f372) ) \
- ROM_LOAD("opr-14745.59", 0x060000, 0x20000, CRC(4c934d96) SHA1(e3349ece0e47f684d61ad11bfea4a90602287350) ) \
- ROM_LOAD("opr-14746.62", 0x080000, 0x20000, CRC(2a266cbd) SHA1(34e047a93459406c22acf4c25089d1a4955f94ca) ) \
- ROM_LOAD("opr-14747.63", 0x0a0000, 0x20000, CRC(a4ad5e19) SHA1(7d7ec300eeb9a8de1590011e37108688c092f329) )
+ \
+ ROM_REGION32_LE( 0x80000, "other_data", 0 ) \
+ /* 1/x table */ \
+ ROM_LOAD32_WORD("opr-14744.58", 0x000000, 0x20000, CRC(730ea9e0) SHA1(651f1db4089a400d073b19ada299b4b08b08f372) ) \
+ ROM_LOAD32_WORD("opr-14745.59", 0x000002, 0x20000, CRC(4c934d96) SHA1(e3349ece0e47f684d61ad11bfea4a90602287350) ) \
+ /* 1/sqrt(x) table */ \
+ ROM_LOAD32_WORD("opr-14746.62", 0x040000, 0x20000, CRC(2a266cbd) SHA1(34e047a93459406c22acf4c25089d1a4955f94ca) ) \
+ ROM_LOAD32_WORD("opr-14747.63", 0x040002, 0x20000, CRC(a4ad5e19) SHA1(7d7ec300eeb9a8de1590011e37108688c092f329) )
/*
These are smt ROMs found on Sega Model 2A Video board
They are linked to a QFP208 IC labelled 315-5645
*/
// TODO: are these present on model2o too?
+// 1/(1+x) table, 0.19 input, 1.23 output (bottom 4 bits zero though, and first bit always 1, so 19 real bits)
#define MODEL2A_VID_BOARD \
- ROM_REGION( 0x180000, "video_unk", 0 ) \
- ROM_LOAD("mpr-16310.15", 0x000000, 0x80000, CRC(c078a780) SHA1(0ad5b49774172743e2708b7ca4c061acfe10957a) ) \
- ROM_LOAD("mpr-16311.16", 0x080000, 0x80000, CRC(452a492b) SHA1(88c2f6c2dbfd0c1b39a7bf15c74455fb68c7274e) ) \
- ROM_LOAD("mpr-16312.14", 0x100000, 0x80000, CRC(a25fef5b) SHA1(c6a37856b97f5bc4996cb6b66209f47af392cc38) )
+ ROM_REGION32_LE( 0x200000, "video_unk", ROMREGION_ERASE00 ) \
+ ROM_LOAD32_BYTE("mpr-16310.15", 0x000000, 0x80000, CRC(c078a780) SHA1(0ad5b49774172743e2708b7ca4c061acfe10957a) ) \
+ ROM_LOAD32_BYTE("mpr-16311.16", 0x000001, 0x80000, CRC(452a492b) SHA1(88c2f6c2dbfd0c1b39a7bf15c74455fb68c7274e) ) \
+ ROM_LOAD32_BYTE("mpr-16312.14", 0x000002, 0x80000, CRC(a25fef5b) SHA1(c6a37856b97f5bc4996cb6b66209f47af392cc38) )
/* Is there an undumped Zero Gunner with program roms EPR-20292 & EPR-20293? Numbering would suggest so, Japan Model2C or Model2A US? */
ROM_START( zeroguna ) /* Zero Gunner (Export), Model 2A */
@@ -2874,7 +2827,7 @@ ROM_START( zeroguna ) /* Zero Gunner (Export), Model 2A */
ROM_LOAD32_WORD("mpr-20294.9", 0x800000, 0x400000, CRC(a0bd1474) SHA1(c0c032adac69bd545e3aab481878b08f3c3edab8) )
ROM_LOAD32_WORD("mpr-20295.10", 0x800002, 0x400000, CRC(c548cced) SHA1(d34f2fc9b4481c75a6824aa4bdd3f1884188d35b) )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP data (COPRO sockets)
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_REGION( 0x800000, "polygons", 0 ) // Models
ROM_LOAD32_WORD("mpr-20298.17", 0x000000, 0x400000, CRC(8ab782fc) SHA1(595f6fc2e9c58ce9763d51798ceead8d470f0a33) )
@@ -2909,7 +2862,7 @@ ROM_START( zerogunaj ) /* Zero Gunner (Japan), Model 2A - Sega game ID# 833-1134
ROM_LOAD32_WORD("mpr-20294.9", 0x800000, 0x400000, CRC(a0bd1474) SHA1(c0c032adac69bd545e3aab481878b08f3c3edab8) )
ROM_LOAD32_WORD("mpr-20295.10", 0x800002, 0x400000, CRC(c548cced) SHA1(d34f2fc9b4481c75a6824aa4bdd3f1884188d35b) )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP data (COPRO sockets)
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x800000, "polygons", 0 ) // Models
ROM_LOAD32_WORD("mpr-20298.17", 0x000000, 0x400000, CRC(8ab782fc) SHA1(595f6fc2e9c58ce9763d51798ceead8d470f0a33) )
@@ -2952,7 +2905,7 @@ ROM_START( zerogun ) /* Zero Gunner (Export), Model 2B */
ROM_LOAD32_WORD("mpr-20301.27", 0x000000, 0x200000, CRC(52010fb2) SHA1(8dce67c6f9e48d749c64b11d4569df413dc40e07) )
ROM_LOAD32_WORD("mpr-20300.25", 0x000002, 0x200000, CRC(6f042792) SHA1(75db68e57ec3fbc7af377342eef81f26fae4e1c4) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("epr-20302.31", 0x080000, 0x80000, CRC(44ff50d2) SHA1(6ffec81042fd5708e8a5df47b63f9809f93bf0f8) )
@@ -2984,7 +2937,7 @@ ROM_START( zerogunj ) /* Zero Gunner (Japan), Model 2B */
ROM_LOAD32_WORD("mpr-20301.27", 0x000000, 0x200000, CRC(52010fb2) SHA1(8dce67c6f9e48d749c64b11d4569df413dc40e07) )
ROM_LOAD32_WORD("mpr-20300.25", 0x000002, 0x200000, CRC(6f042792) SHA1(75db68e57ec3fbc7af377342eef81f26fae4e1c4) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("epr-20302.31", 0x080000, 0x80000, CRC(44ff50d2) SHA1(6ffec81042fd5708e8a5df47b63f9809f93bf0f8) )
@@ -3008,7 +2961,7 @@ ROM_START( gunblade ) /* Gunblade NY Revision A, Model 2B, Sega game ID# 833-125
ROM_LOAD32_WORD("mpr-18976.9", 0x800000, 0x400000, CRC(c95c15eb) SHA1(892063e91b2ed20e0600d4b188da1e9f45a19692) )
ROM_LOAD32_WORD("mpr-18977.10", 0x800002, 0x400000, CRC(db8f5b6f) SHA1(c11d2c9e1e215aa7b2ebb777639c8cd651901f52) )
- ROM_REGION( 0x800000, "copro_data", 0 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc)
ROM_LOAD32_WORD("mpr-18986.29", 0x000000, 0x400000, CRC(04820f7b) SHA1(5eb6682399b358d77658d82e612b02b724e3f3e1) )
ROM_LOAD32_WORD("mpr-18987.30", 0x000002, 0x400000, CRC(2419367f) SHA1(0a04a1049d2da486dc9dbb97b383bd24259b78c8) )
@@ -3047,7 +3000,7 @@ ROM_START( vf2 ) /* Virtua Fighter 2 Version 2.1, Model 2A */
ROM_LOAD32_WORD( "mpr-17564.4", 0xc00000, 0x200000, CRC(d8062489) SHA1(57666b6937f79bb65c43ed02b04a454882d01e61) )
ROM_LOAD32_WORD( "mpr-17565.5", 0xc00002, 0x200000, CRC(0517c6e9) SHA1(d9ba93998286713758385033119416714674c8d8) )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP data (COPRO sockets)
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x2000000, "polygons", 0 ) // Models
ROM_LOAD32_WORD( "mpr-17554.16", 0x000000, 0x200000, CRC(27896d82) SHA1(c0624e58de2e427465daaa10dbb02ea2a1fd0f1b) )
@@ -3093,7 +3046,7 @@ ROM_START( vf2b ) /* Virtua Fighter 2 Revision B, Model 2A */
ROM_LOAD32_WORD( "mpr-17564.4", 0xc00000, 0x200000, CRC(d8062489) SHA1(57666b6937f79bb65c43ed02b04a454882d01e61) )
ROM_LOAD32_WORD( "mpr-17565.5", 0xc00002, 0x200000, CRC(0517c6e9) SHA1(d9ba93998286713758385033119416714674c8d8) )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP data (COPRO sockets)
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x2000000, "polygons", 0 ) // Models
ROM_LOAD32_WORD( "mpr-17554.16", 0x000000, 0x200000, CRC(27896d82) SHA1(c0624e58de2e427465daaa10dbb02ea2a1fd0f1b) )
@@ -3139,7 +3092,7 @@ ROM_START( vf2a ) /* Virtua Fighter 2 Revision A, Model 2A */
ROM_LOAD32_WORD( "mpr-17564.4", 0xc00000, 0x200000, CRC(d8062489) SHA1(57666b6937f79bb65c43ed02b04a454882d01e61) )
ROM_LOAD32_WORD( "mpr-17565.5", 0xc00002, 0x200000, CRC(0517c6e9) SHA1(d9ba93998286713758385033119416714674c8d8) )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP data (COPRO sockets)
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x2000000, "polygons", 0 ) // Models
ROM_LOAD32_WORD( "mpr-17554.16", 0x000000, 0x200000, CRC(27896d82) SHA1(c0624e58de2e427465daaa10dbb02ea2a1fd0f1b) )
@@ -3185,7 +3138,7 @@ ROM_START( vf2o ) /* Virtua Fighter 2, Model 2A */
ROM_LOAD32_WORD( "mpr-17564.4", 0xc00000, 0x200000, CRC(d8062489) SHA1(57666b6937f79bb65c43ed02b04a454882d01e61) )
ROM_LOAD32_WORD( "mpr-17565.5", 0xc00002, 0x200000, CRC(0517c6e9) SHA1(d9ba93998286713758385033119416714674c8d8) )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP data (COPRO sockets)
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x2000000, "polygons", 0 ) // Models
ROM_LOAD32_WORD( "mpr-17554.16", 0x000000, 0x200000, CRC(27896d82) SHA1(c0624e58de2e427465daaa10dbb02ea2a1fd0f1b) )
@@ -3228,7 +3181,7 @@ ROM_START( srallyc )
ROM_LOAD32_WORD( "mpr-17884.6", 0x800000, 0x200000, CRC(4cfc95e1) SHA1(81d927b8c4f9d0c4c5e29d676b30f30f83751fdc) )
ROM_LOAD32_WORD( "mpr-17885.7", 0x800002, 0x200000, CRC(a08d2467) SHA1(9449ac8f8f9ce8d8e536b05a91e46841fed7f2d0) )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD( "mpr-17754.28", 0x000000, 0x200000, CRC(81a84f67) SHA1(c0a9b690523a529e4015e9af10dc3fb2a1726f08) )
ROM_LOAD32_WORD( "mpr-17755.29", 0x000002, 0x200000, CRC(2a6e7da4) SHA1(e60803ae951489fe47d66731d15c32249ca547b4) )
@@ -3274,7 +3227,7 @@ ROM_START( srallycb ) /* Sega Rally Championship Revision B, Model 2A, Sega game
ROM_LOAD32_WORD( "mpr-17884.6", 0x800000, 0x200000, CRC(4cfc95e1) SHA1(81d927b8c4f9d0c4c5e29d676b30f30f83751fdc) )
ROM_LOAD32_WORD( "mpr-17885.7", 0x800002, 0x200000, CRC(a08d2467) SHA1(9449ac8f8f9ce8d8e536b05a91e46841fed7f2d0) )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD( "mpr-17754.28", 0x000000, 0x200000, CRC(81a84f67) SHA1(c0a9b690523a529e4015e9af10dc3fb2a1726f08) )
ROM_LOAD32_WORD( "mpr-17755.29", 0x000002, 0x200000, CRC(2a6e7da4) SHA1(e60803ae951489fe47d66731d15c32249ca547b4) )
@@ -3320,7 +3273,7 @@ ROM_START( srallycdx ) /* Sega Rally Championship DX Revision A, Model 2A - Sing
ROM_LOAD32_WORD( "mpr-17764a.6", 0x800000, 0x200000, CRC(dcb91e31) SHA1(2725268e97b9f4c14d56c040af38bc82f5020e3e) ) // IC 6 and 7 likely EPROMs
ROM_LOAD32_WORD( "mpr-17765a.7", 0x800002, 0x200000, CRC(b657dc48) SHA1(ae0f1bc6e2479fa51ca36f8be3a1785981c4dfe9) )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD( "mpr-17754.28", 0x000000, 0x200000, CRC(81a84f67) SHA1(c0a9b690523a529e4015e9af10dc3fb2a1726f08) )
ROM_LOAD32_WORD( "mpr-17755.29", 0x000002, 0x200000, CRC(2a6e7da4) SHA1(e60803ae951489fe47d66731d15c32249ca547b4) )
@@ -3370,7 +3323,7 @@ ROM_START( srallycdxa ) // Sega Rally Championship DX, Model 2A? - Single player
ROM_LOAD32_WORD( "epr-17764.6", 0x800000, 0x100000, CRC(68254fcf) SHA1(d90d962b5f81d6598fc9d94c44d9cee71767fc26) ) // NEC D27C8000D EPROM
ROM_LOAD32_WORD( "epr-17765.7", 0x800002, 0x100000, CRC(81112ea5) SHA1(a0251b4f5f18ae2e2d0576087a687dd7c2e49c34) ) // NEC D27C8000D EPROM
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD( "mpr-17754.28", 0x000000, 0x200000, CRC(81a84f67) SHA1(c0a9b690523a529e4015e9af10dc3fb2a1726f08) ) // not present in this rev memory test, why ?
ROM_LOAD32_WORD( "mpr-17755.29", 0x000002, 0x200000, CRC(2a6e7da4) SHA1(e60803ae951489fe47d66731d15c32249ca547b4) ) //
@@ -3468,7 +3421,7 @@ ROM_START( manxtt ) /* Manx TT Superbike Twin Revision D, Model 2A - Can be set
ROM_LOAD32_WORD( "mpr-18755.18", 0x800000, 0x200000, CRC(bf094d9e) SHA1(2cd7130b226a28098191a6caf6fd761bb0bfac7b) )
ROM_LOAD32_WORD( "mpr-18758.22", 0x800002, 0x200000, CRC(1b5473d0) SHA1(658e33503f6990f4d9a954c63efad5f53d15f3a4) )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD( "mpr-18761.28", 0x000000, 0x200000, CRC(4e39ec05) SHA1(50696cd320f1a6492e0c193713acbce085d959cd) )
ROM_LOAD32_WORD( "mpr-18762.29", 0x000002, 0x200000, CRC(4ab165d8) SHA1(7ff42a4c7236fec76f94f2d0c5537e503bcc98e5) )
@@ -3528,12 +3481,10 @@ ROM_START( manxttc ) /* Manx TT Superbike Twin Revision C, Model 2A */
ROM_LOAD32_WORD( "mpr-18755.18", 0x800000, 0x200000, CRC(bf094d9e) SHA1(2cd7130b226a28098191a6caf6fd761bb0bfac7b) )
ROM_LOAD32_WORD( "mpr-18758.22", 0x800002, 0x200000, CRC(1b5473d0) SHA1(658e33503f6990f4d9a954c63efad5f53d15f3a4) )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD( "mpr-18761.28", 0x000000, 0x200000, CRC(4e39ec05) SHA1(50696cd320f1a6492e0c193713acbce085d959cd) )
ROM_LOAD32_WORD( "mpr-18762.29", 0x000002, 0x200000, CRC(4ab165d8) SHA1(7ff42a4c7236fec76f94f2d0c5537e503bcc98e5) )
- ROM_REGION( 0x800000, "tgpextra", ROMREGION_ERASEFF) // Coprocessor Data ROM
-
ROM_REGION( 0x1000000, "textures", 0 ) // Textures
ROM_LOAD32_WORD( "mpr-18760.25", 0x000000, 0x200000, CRC(4e3a4a89) SHA1(bba6cd2a15b3f963388a3a87880da86b10f6e0a2) )
ROM_LOAD32_WORD( "mpr-18759.24", 0x000002, 0x200000, CRC(278d8742) SHA1(5f285fc8cfe88c00ba2bbe1b509b49abd38e00ec) )
@@ -3587,12 +3538,10 @@ ROM_START( motoraid ) /* Motor Raid, Model 2A, Sega game ID# 833-13232 MOTOR RAI
ROM_LOAD32_WORD( "mpr-20025.18", 0x1000000, 0x400000, CRC(d4ecd0be) SHA1(9df0d1db32b818dad28f9eeab3bc19c56d27ec6d) )
ROM_LOAD32_WORD( "mpr-20028.22", 0x1000002, 0x400000, CRC(3147e0e1) SHA1(9aa0e13c8dc5073a603279a538cc7662531dfd19) )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD( "epr-20011.28", 0x000000, 0x100000, CRC(794c026c) SHA1(85abd667491fd019ee18ba256fd580356f4e1fe9) )
ROM_LOAD32_WORD( "epr-20012.29", 0x000002, 0x100000, CRC(f53db4e3) SHA1(4474610eed52248e5e36be438eff5d39f076b134) )
- ROM_REGION( 0x800000, "tgpextra", ROMREGION_ERASEFF) // Coprocessor Data ROM
-
ROM_REGION( 0x1000000, "textures", 0 ) // Textures
ROM_LOAD32_WORD( "mpr-20022.25", 0x000000, 0x400000, CRC(9e47b3c2) SHA1(c73279e837f56c0417c07ba3c642af28fe9a24fa) )
ROM_LOAD32_WORD( "mpr-20021.24", 0x000002, 0x400000, CRC(3cbf36cb) SHA1(059cea17f9d6f5960d9fd869c36ffb6fcf230c1a) )
@@ -3640,12 +3589,10 @@ ROM_START( motoraiddx ) /* Motor Raid DX, Model 2A, Sega ROM board ID# 834-13231
ROM_LOAD32_WORD( "mpr-20025.18", 0x1000000, 0x400000, CRC(d4ecd0be) SHA1(9df0d1db32b818dad28f9eeab3bc19c56d27ec6d) )
ROM_LOAD32_WORD( "mpr-20028.22", 0x1000002, 0x400000, CRC(3147e0e1) SHA1(9aa0e13c8dc5073a603279a538cc7662531dfd19) )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD( "epr-20011.28", 0x000000, 0x100000, CRC(794c026c) SHA1(85abd667491fd019ee18ba256fd580356f4e1fe9) )
ROM_LOAD32_WORD( "epr-20012.29", 0x000002, 0x100000, CRC(f53db4e3) SHA1(4474610eed52248e5e36be438eff5d39f076b134) )
- ROM_REGION( 0x800000, "tgpextra", ROMREGION_ERASEFF) // Coprocessor Data ROM
-
ROM_REGION( 0x1000000, "textures", 0 ) // Textures
ROM_LOAD32_WORD( "mpr-20022.25", 0x000000, 0x400000, CRC(9e47b3c2) SHA1(c73279e837f56c0417c07ba3c642af28fe9a24fa) )
ROM_LOAD32_WORD( "mpr-20021.24", 0x000002, 0x400000, CRC(3cbf36cb) SHA1(059cea17f9d6f5960d9fd869c36ffb6fcf230c1a) )
@@ -3694,7 +3641,7 @@ ROM_START( skytargt ) /* Sky Target, Model 2A */
ROM_COPY( "main_data", 0x1000000, 0x1e00000, 0x100000 )
ROM_COPY( "main_data", 0x1000000, 0x1f00000, 0x100000 )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP data (COPRO sockets)
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_LOAD32_WORD( "mpr-18420.28", 0x000000, 0x200000, CRC(92b87817) SHA1(b6949b745d0bedeecd6d0240f8911cb345c16d8d) )
ROM_LOAD32_WORD( "mpr-18419.29", 0x000002, 0x200000, CRC(74542d87) SHA1(37230e96dd526fb47fcbde5778e5466d8955a969) )
@@ -3741,7 +3688,7 @@ ROM_START( vcop2 ) /* Virtua Cop 2, Model 2A, Sega Game ID# 833-12266, ROM board
ROM_COPY( "main_data", 0xc00000, 0xe00000, 0x100000 )
ROM_COPY( "main_data", 0xc00000, 0xf00000, 0x100000 )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP data (COPRO sockets)
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x2000000, "polygons", 0 ) // Models
ROM_LOAD32_WORD( "mpr-18513.16", 0x000000, 0x200000, CRC(777a3633) SHA1(edc2798c4d88975ce67b54fc0db008e7d24db6ef) )
@@ -3809,7 +3756,7 @@ ROM_START( dynamcop ) /* Dynamite Cop (Export), Model 2A, Sega Game ID# 833-1134
ROM_LOAD32_WORD("mpr-20791.4", 0x1800000, 0x400000, CRC(4883d0df) SHA1(b98af63e81f6c1b2766d7e96acbd1821bba000d4) )
ROM_LOAD32_WORD("mpr-20792.5", 0x1800002, 0x400000, CRC(47becfa2) SHA1(a333885872a64b322f3cb464a70352d73654b1b3) )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP data (COPRO sockets)
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x2000000, "polygons", 0 ) // Models
ROM_LOAD32_WORD("mpr-20799.16", 0x0000000, 0x400000, CRC(424571bf) SHA1(18a4e8d0e968fff3b645b59a0023b0ef38d51924) )
@@ -3860,7 +3807,7 @@ ROM_START( dyndeka2 ) /* Dynamite Deka 2 (Japan), Model 2A */
ROM_LOAD32_WORD("mpr-20791.4", 0x1800000, 0x400000, CRC(4883d0df) SHA1(b98af63e81f6c1b2766d7e96acbd1821bba000d4) )
ROM_LOAD32_WORD("mpr-20792.5", 0x1800002, 0x400000, CRC(47becfa2) SHA1(a333885872a64b322f3cb464a70352d73654b1b3) )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP data (COPRO sockets)
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x2000000, "polygons", 0 ) // Models
ROM_LOAD32_WORD("mpr-20799.16", 0x0000000, 0x400000, CRC(424571bf) SHA1(18a4e8d0e968fff3b645b59a0023b0ef38d51924) )
@@ -3927,7 +3874,7 @@ ROM_START( dynamcopb ) /* Dynamite Cop (Export), Model 2B */
ROM_LOAD32_WORD("mpr-20810.27", 0x0800000, 0x400000, CRC(838a10a7) SHA1(a658f1864829058b1d419e7c001e47cd0ab06a20) )
ROM_LOAD32_WORD("mpr-20808.26", 0x0800002, 0x400000, CRC(706bd495) SHA1(f857b303afda6301b19d97dfe5c313126261716e) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("epr-20811.30", 0x080000, 0x80000, CRC(a154b83e) SHA1(2640c6b6966f4a888329e583b6b713bd0e779b6b) )
@@ -3975,7 +3922,7 @@ ROM_START( dyndeka2b ) /* Dynamite Deka 2 (Japan), Model 2B */
ROM_LOAD32_WORD("mpr-20810.27", 0x0800000, 0x400000, CRC(838a10a7) SHA1(a658f1864829058b1d419e7c001e47cd0ab06a20) )
ROM_LOAD32_WORD("mpr-20808.26", 0x0800002, 0x400000, CRC(706bd495) SHA1(f857b303afda6301b19d97dfe5c313126261716e) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("epr-20811.30", 0x080000, 0x80000, CRC(a154b83e) SHA1(2640c6b6966f4a888329e583b6b713bd0e779b6b) )
@@ -4066,7 +4013,7 @@ ROM_START( schamp ) /* Sonic Championship, Model 2B - Sega ROM board ID# 834-127
ROM_COPY( "main_data", 0x1000000, 0x1e00000, 0x100000 )
ROM_COPY( "main_data", 0x1000000, 0x1f00000, 0x100000 )
- ROM_REGION( 0x800000, "copro_data", 0 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc)
ROM_LOAD32_WORD("mpr-19015.29", 0x000000, 0x200000, CRC(c74d99e3) SHA1(9914be9925b86af6af670745b5eba3a9e4f24af9) )
ROM_LOAD32_WORD("mpr-19016.30", 0x000002, 0x200000, CRC(746ae931) SHA1(a6f0f589ad174a34493ee24dc0cb509ead3aed70) )
@@ -4120,7 +4067,7 @@ ROM_START( sfight ) /* Sonic The Fighters, Model 2B */
ROM_COPY( "main_data", 0x1000000, 0x1e00000, 0x100000 )
ROM_COPY( "main_data", 0x1000000, 0x1f00000, 0x100000 )
- ROM_REGION( 0x800000, "copro_data", 0 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc)
ROM_LOAD32_WORD("mpr-19015.29", 0x000000, 0x200000, CRC(c74d99e3) SHA1(9914be9925b86af6af670745b5eba3a9e4f24af9) )
ROM_LOAD32_WORD("mpr-19016.30", 0x000002, 0x200000, CRC(746ae931) SHA1(a6f0f589ad174a34493ee24dc0cb509ead3aed70) )
@@ -4499,7 +4446,7 @@ ROM_START( lastbrnx ) /* Last Bronx Revision A (Export), Model 2B */
ROM_LOAD32_WORD("mpr-19055.27", 0x000000, 0x200000, CRC(85a57d49) SHA1(99c49fe135dc46fa861337b5bac654ae8478778a) )
ROM_LOAD32_WORD("mpr-19054.25", 0x000002, 0x200000, CRC(05366277) SHA1(f618e2b9b26a1f7eccebfc8f8e17ef8ad9029be8) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("mpr-19056.31", 0x080000, 0x80000, CRC(22a22918) SHA1(baa039cd86650b6cd81f295916c4d256e60cb29c) )
@@ -4528,7 +4475,7 @@ ROM_START( lastbrnxu ) /* Last Bronx Revision A (USA), Model 2B - Sega ROM board
ROM_LOAD32_WORD("mpr-19055.27", 0x000000, 0x200000, CRC(85a57d49) SHA1(99c49fe135dc46fa861337b5bac654ae8478778a) )
ROM_LOAD32_WORD("mpr-19054.25", 0x000002, 0x200000, CRC(05366277) SHA1(f618e2b9b26a1f7eccebfc8f8e17ef8ad9029be8) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("mpr-19056.31", 0x080000, 0x80000, CRC(22a22918) SHA1(baa039cd86650b6cd81f295916c4d256e60cb29c) )
@@ -4557,7 +4504,7 @@ ROM_START( lastbrnxj ) /* Last Bronx Revision A (Japan), Model 2B */
ROM_LOAD32_WORD("mpr-19055.27", 0x000000, 0x200000, CRC(85a57d49) SHA1(99c49fe135dc46fa861337b5bac654ae8478778a) )
ROM_LOAD32_WORD("mpr-19054.25", 0x000002, 0x200000, CRC(05366277) SHA1(f618e2b9b26a1f7eccebfc8f8e17ef8ad9029be8) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("mpr-19056.31", 0x080000, 0x80000, CRC(22a22918) SHA1(baa039cd86650b6cd81f295916c4d256e60cb29c) )
@@ -4576,7 +4523,7 @@ ROM_START( pltkidsa ) /* Pilot Kids, Model 2A */
ROM_LOAD32_WORD("mpr-21262.da0", 0x000000, 0x400000, CRC(aa71353e) SHA1(6eb5e8284734f01beec1dbbee049b6b7672e2504) )
ROM_LOAD32_WORD("mpr-21263.da1", 0x000002, 0x400000, CRC(d55d4509) SHA1(641db6ec3e9266f8265a4b541bcd8c2f7d164cc3) )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP data (COPRO sockets)
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x2000000, "polygons", 0 ) // Models
ROM_LOAD32_WORD("mpr-21264.tp0", 0x0000000, 0x400000, CRC(6b35204d) SHA1(3a07701b140eb3088fad29c8b2d9c1e1e7ef9471) )
@@ -4635,7 +4582,7 @@ ROM_START( pltkids ) /* Pilot Kids Revision A, Model 2B */
ROM_LOAD32_WORD("mpr-21275.tx3", 0x0800000, 0x400000, CRC(c4870b7c) SHA1(feb8a34acb620a36ed5aea92d22622a76d7e1b29) )
ROM_LOAD32_WORD("mpr-21273.tx2", 0x0800002, 0x400000, CRC(722ec8a2) SHA1(1a1dc92488cde6284a96acce80e47a9cceccde76) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("epr-21276.sd0", 0x080000, 0x080000, CRC(8f415bc3) SHA1(4e8e1ccbe025deca42fcf2582f3da46fa34780b7) )
@@ -4678,7 +4625,7 @@ ROM_START( indy500 ) /* Defaults to Twin (Stand Alone) Cab version. 2 credits t
ROM_COPY( "main_data", 0x1000000, 0x1e00000, 0x100000 )
ROM_COPY( "main_data", 0x1000000, 0x1f00000, 0x100000 )
- ROM_REGION( 0x800000, "copro_data", 0 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc)
ROM_LOAD32_WORD("epr-18249.29", 0x000000, 0x080000, CRC(a399f023) SHA1(8b453313c16d935701ed7dbf71c1607c40aede63) )
ROM_LOAD32_WORD("epr-18250.30", 0x000002, 0x080000, CRC(7479ad52) SHA1(d453e25709cd5970cd21bdc8b4785bc8eb5a50d7) )
@@ -4730,7 +4677,7 @@ ROM_START( indy500d ) /* Defaults to Deluxe (Stand Alone) Cab version. 3 credits
ROM_COPY( "main_data", 0x1000000, 0x1e00000, 0x100000 )
ROM_COPY( "main_data", 0x1000000, 0x1f00000, 0x100000 )
- ROM_REGION( 0x800000, "copro_data", 0 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc)
ROM_LOAD32_WORD("epr-18249.29", 0x000000, 0x080000, CRC(a399f023) SHA1(8b453313c16d935701ed7dbf71c1607c40aede63) )
ROM_LOAD32_WORD("epr-18250.30", 0x000002, 0x080000, CRC(7479ad52) SHA1(d453e25709cd5970cd21bdc8b4785bc8eb5a50d7) )
@@ -4782,7 +4729,7 @@ ROM_START( indy500to ) /* Defaults to Twin (Stand Alone) Cab version. 2 credits
ROM_COPY( "main_data", 0x1000000, 0x1e00000, 0x100000 )
ROM_COPY( "main_data", 0x1000000, 0x1f00000, 0x100000 )
- ROM_REGION( 0x800000, "copro_data", 0 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc)
ROM_LOAD32_WORD("epr-18249.29", 0x000000, 0x080000, CRC(a399f023) SHA1(8b453313c16d935701ed7dbf71c1607c40aede63) )
ROM_LOAD32_WORD("epr-18250.30", 0x000002, 0x080000, CRC(7479ad52) SHA1(d453e25709cd5970cd21bdc8b4785bc8eb5a50d7) )
@@ -4834,7 +4781,7 @@ ROM_START( waverunr ) /* Wave Runner Revision A (Japan), Model 2C, Sega Game ID#
ROM_COPY( "main_data", 0x1000000, 0x1e00000, 0x100000 )
ROM_COPY( "main_data", 0x1000000, 0x1f00000, 0x100000 )
- ROM_REGION( 0x800000, "copro_data", 0 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc)
ROM_LOAD32_WORD("epr-19280.29", 0x000000, 0x080000, CRC(c6b59fb9) SHA1(909663f440d19a34591d1f9707972c313e34f909) )
ROM_LOAD32_WORD("epr-19281.30", 0x000002, 0x080000, CRC(5a6110e7) SHA1(39ba8a35fdcfdd6c88b44ab392ca0e958da44767) )
@@ -4898,7 +4845,7 @@ ROM_START( rchase2 ) /* Rail Chase 2 Revision A, Model 2B. Sega game ID# 833-118
ROM_LOAD32_WORD("mpr-18043.5", 0xc00000, 0x200000, CRC(ff84dfd6) SHA1(82833bf4cb1f367aea5fec6cffb7023cbbd3c8cb) )
ROM_LOAD32_WORD("mpr-18044.6", 0xc00002, 0x200000, CRC(ab9b406d) SHA1(62e95ceea6f71eedbebae59e188aac03e6129e62) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASEFF ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASEFF ) // Copro extra data (collision/height map/etc)
/* empty?? */
ROM_REGION( 0x1000000, "polygons", 0 ) // Models
@@ -5071,7 +5018,7 @@ ROM_START( overrevb ) /* Over Rev Revision B, Model 2B, Sega Game ID# 836-13274,
ROM_LOAD32_WORD( "mpr-19994.9", 0x800000, 0x400000, CRC(e691fbd5) SHA1(b99c2f3f2a682966d792917dfcb8ed8e53bc0b7a) )
ROM_LOAD32_WORD( "mpr-19995.10", 0x800002, 0x400000, CRC(82a7828e) SHA1(4336a12a07a67f94091b4a9b491bab02c375dd15) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x800000, "polygons", 0 ) // Models
ROM_LOAD32_WORD( "mpr-19998.17", 0x000000, 0x200000, CRC(6a834574) SHA1(8be19bf42dbb157d6acde62a2018ef4c0d41aab4) )
@@ -5303,7 +5250,7 @@ ROM_START( doaa ) /* Dead or Alive Revision A, Model 2A, Sega Game ID# 833-11341
ROM_LOAD32_WORD("mpr-19313.6", 0x1800002, 0x200000, CRC(8c63055e) SHA1(9f375b3f4a8884163ffcf364989499f2cd21e18b) )
ROM_COPY("main_data", 0x1800000, 0x1c00000, 0x400000 )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP data (COPRO sockets)
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x2000000, "polygons", ROMREGION_ERASEFF ) // Models
ROM_LOAD32_WORD("mpr-19322.17", 0x0000000, 0x400000, CRC(d0e6ecf0) SHA1(1b87f6337b4286fd738856da899462e7baa92601) )
@@ -5358,7 +5305,7 @@ ROM_START( doa ) /* Dead or Alive Revision B, Model 2B, 837-12880 security board
ROM_LOAD32_WORD("mpr-19321.27", 0x000000, 0x400000, CRC(9c49e845) SHA1(344839640d9814263fa5ed00c2043cd6f18d5cb2) )
ROM_LOAD32_WORD("mpr-19320.25", 0x000002, 0x400000, CRC(190c017f) SHA1(4c3250b9abe39fc5c8fd0fcdb5fb7ea131434516) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("epr-19328.30", 0x080000, 0x80000, CRC(400bdbfb) SHA1(54db969fa54cf3c502d77aa6a6aaeef5d7db9f04) )
@@ -5389,7 +5336,7 @@ ROM_START( sgt24h ) /* Super GT 24h, Model 2B */
ROM_LOAD32_WORD("mpr-19153.27", 0x000000, 0x200000, CRC(136adfd0) SHA1(70ce4e609c8b003ff04518044c18d29089e6a353) )
ROM_LOAD32_WORD("mpr-19152.25", 0x000002, 0x200000, CRC(363769a2) SHA1(51b2f11a01fb72e151025771f8a8496993e605c2) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x20000, "cpu4", 0) // Communication program
ROM_LOAD16_WORD_SWAP("epr-18643a.7", 0x000000, 0x20000, CRC(b5e048ec) SHA1(8182e05a2ffebd590a936c1359c81e60caa79c2a) )
@@ -5414,7 +5361,7 @@ ROM_START( von ) /* Virtual On Cyber Troopers Revision B (US), Model 2B, Sega Ga
ROM_LOAD32_WORD("mpr-18650.9", 0x800000, 0x400000, CRC(89a855b9) SHA1(5096db1da1f7e175000e89fca2a1dd3fd53030ea) )
ROM_LOAD32_WORD("mpr-18651.10", 0x800002, 0x400000, CRC(f4c23107) SHA1(f65984614111b12dd414db80751efe64fcf5ef16) )
- ROM_REGION( 0x800000, "copro_data", 0 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc)
ROM_LOAD32_WORD("mpr-18662.29", 0x000000, 0x200000, CRC(a33d3335) SHA1(991bbe9dcbef8bfa96682e9d142623fc9b7c0879) )
ROM_LOAD32_WORD("mpr-18663.30", 0x000002, 0x200000, CRC(ea74a641) SHA1(a684e13c0afe2ef3f3108ae9b73389121368fc4e) )
@@ -5454,7 +5401,7 @@ ROM_START( vonj ) /* Virtual On Cyber Troopers Revision B (Japan), Model 2B */
ROM_LOAD32_WORD("mpr-18650.9", 0x800000, 0x400000, CRC(89a855b9) SHA1(5096db1da1f7e175000e89fca2a1dd3fd53030ea) )
ROM_LOAD32_WORD("mpr-18651.10", 0x800002, 0x400000, CRC(f4c23107) SHA1(f65984614111b12dd414db80751efe64fcf5ef16) )
- ROM_REGION( 0x800000, "copro_data", 0 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc)
ROM_LOAD32_WORD("mpr-18662.29", 0x000000, 0x200000, CRC(a33d3335) SHA1(991bbe9dcbef8bfa96682e9d142623fc9b7c0879) )
ROM_LOAD32_WORD("mpr-18663.30", 0x000002, 0x200000, CRC(ea74a641) SHA1(a684e13c0afe2ef3f3108ae9b73389121368fc4e) )
@@ -5506,7 +5453,7 @@ ROM_START( vstriker ) /* Virtua Striker Revision A, Model 2B */
ROM_LOAD32_WORD("mpr-18062.27", 0x000000, 0x200000, CRC(126e7de3) SHA1(0810364934dee8d5035cef623d01dfbacc64bf2b) )
ROM_LOAD32_WORD("mpr-18061.25", 0x000002, 0x200000, CRC(c37f1c67) SHA1(c917046c2d98af17c59ceb0ea4f89d215cc0ead8) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("epr-18072.31", 0x080000, 0x20000, CRC(73eabb58) SHA1(4f6d70d6e0d7b469c5f2527efb08f208f4aa017e) )
@@ -5542,7 +5489,7 @@ ROM_START( vstrikero ) /* Virtua Striker, Model 2B */
ROM_LOAD32_WORD("mpr-18062.27", 0x000000, 0x200000, CRC(126e7de3) SHA1(0810364934dee8d5035cef623d01dfbacc64bf2b) )
ROM_LOAD32_WORD("mpr-18061.25", 0x000002, 0x200000, CRC(c37f1c67) SHA1(c917046c2d98af17c59ceb0ea4f89d215cc0ead8) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("epr-18072.31", 0x080000, 0x20000, CRC(73eabb58) SHA1(4f6d70d6e0d7b469c5f2527efb08f208f4aa017e) )
@@ -5580,7 +5527,7 @@ ROM_START( dynabb ) /* Dynamite Baseball, Model 2B. Sega game ID# 833-12803 DYNA
ROM_LOAD32_WORD("mpr-19183.27", 0x000000, 0x400000, CRC(5e29074b) SHA1(f4dfa396653aeb649ec170c9584ea1a74377929a) )
ROM_LOAD32_WORD("mpr-19182.25", 0x000002, 0x400000, CRC(c899923d) SHA1(15cc86c885329227d3c19e9837363eaf6c38829b) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("epr-19184.31", 0x080000, 0x80000, CRC(c013a163) SHA1(c564df8295e3c19082ead0eb22478dc651e0b430) )
@@ -5618,7 +5565,7 @@ ROM_START( dynabb97 ) /* Dynamite Baseball 97 Revision A, Model 2B */
ROM_LOAD32_WORD("mpr-19848.27", 0x000000, 0x400000, CRC(4c0526b7) SHA1(e8db7125be8a052e41a00c69cc08ca0d75b3b96f) )
ROM_LOAD32_WORD("mpr-19847.25", 0x000002, 0x400000, CRC(fe55edbd) SHA1(b0b6135b23349d7d6ae007002d8df83748cab7b1) )
- ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 ) // Copro extra data (collision/height map/etc)
ROM_REGION( 0x100000, "audiocpu", 0 ) // Sound program
ROM_LOAD16_WORD_SWAP("epr-19849.31", 0x080000, 0x80000, CRC(b0d5bff0) SHA1(1fb824adaf3ed330a8039be726a87eb85c00abd7) )
@@ -5661,7 +5608,7 @@ ROM_START( fvipers ) /* Fighting Vipers Revision D, Model 2B, Sega Game ID# 833-
ROM_COPY( "main_data", 0x1800000, 0x1e00000, 0x100000 )
ROM_COPY( "main_data", 0x1800000, 0x1f00000, 0x100000 )
- ROM_REGION( 0x800000, "copro_data", 0 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc)
ROM_LOAD32_WORD("mpr-18622.29", 0x000000, 0x200000, CRC(c74d99e3) SHA1(9914be9925b86af6af670745b5eba3a9e4f24af9) )
ROM_LOAD32_WORD("mpr-18623.30", 0x000002, 0x200000, CRC(746ae931) SHA1(a6f0f589ad174a34493ee24dc0cb509ead3aed70) )
@@ -5720,7 +5667,7 @@ ROM_START( fvipersb ) /* Fighting Vipers Revision B, Model 2B, Sega Game ID# 833
ROM_COPY( "main_data", 0x1800000, 0x1e00000, 0x100000 )
ROM_COPY( "main_data", 0x1800000, 0x1f00000, 0x100000 )
- ROM_REGION( 0x800000, "copro_data", 0 ) // Coprocessor Data ROM
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc)
ROM_LOAD32_WORD("mpr-18622.29", 0x000000, 0x200000, CRC(c74d99e3) SHA1(9914be9925b86af6af670745b5eba3a9e4f24af9) )
ROM_LOAD32_WORD("mpr-18623.30", 0x000002, 0x200000, CRC(746ae931) SHA1(a6f0f589ad174a34493ee24dc0cb509ead3aed70) )
@@ -5768,7 +5715,7 @@ ROM_START( daytona ) /* Daytona USA (Japan, Revision A), Original Model 2 w/Mode
ROM_COPY( "main_data", 0x800000, 0xe00000, 0x100000 )
ROM_COPY( "main_data", 0x800000, 0xf00000, 0x100000 )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD("mpr-16537.ic28", 0x000000, 0x200000, CRC(36b7c35a) SHA1(b32fd1d3fc8983fb5f2a7b236b665a8c9b52769f) )
ROM_LOAD32_WORD("mpr-16536.ic29", 0x000002, 0x200000, CRC(6d6afed9) SHA1(2018468d7d849854b3d0cfbcd217317e2fc93555) )
@@ -5832,7 +5779,7 @@ ROM_START( daytonase ) /* Daytona USA (Japan, Revision A), Original Model 2 w/Mo
ROM_COPY( "main_data", 0x800000, 0xe00000, 0x100000 )
ROM_COPY( "main_data", 0x800000, 0xf00000, 0x100000 )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD("mpr-16537.ic28", 0x000000, 0x200000, CRC(36b7c35a) SHA1(b32fd1d3fc8983fb5f2a7b236b665a8c9b52769f) )
ROM_LOAD32_WORD("mpr-16536.ic29", 0x000002, 0x200000, CRC(6d6afed9) SHA1(2018468d7d849854b3d0cfbcd217317e2fc93555) )
@@ -5895,7 +5842,7 @@ ROM_START( daytona93 ) /* Daytona USA (Deluxe cabinet, '93 version. There is sai
ROM_COPY( "main_data", 0x900000, 0xe00000, 0x100000 )
ROM_COPY( "main_data", 0x900000, 0xf00000, 0x100000 )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD("mpr-16537.ic28", 0x000000, 0x200000, CRC(36b7c35a) SHA1(b32fd1d3fc8983fb5f2a7b236b665a8c9b52769f) )
ROM_LOAD32_WORD("mpr-16536.ic29", 0x000002, 0x200000, CRC(6d6afed9) SHA1(2018468d7d849854b3d0cfbcd217317e2fc93555) )
@@ -5959,7 +5906,7 @@ ROM_START( daytonas ) /* Daytona USA (With Saturn Adverts) */
ROM_COPY( "main_data", 0x800000, 0xe00000, 0x100000 )
ROM_COPY( "main_data", 0x800000, 0xf00000, 0x100000 )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD("mpr-16537.ic28", 0x000000, 0x200000, CRC(36b7c35a) SHA1(b32fd1d3fc8983fb5f2a7b236b665a8c9b52769f) )
ROM_LOAD32_WORD("mpr-16536.ic29", 0x000002, 0x200000, CRC(6d6afed9) SHA1(2018468d7d849854b3d0cfbcd217317e2fc93555) )
@@ -6025,7 +5972,7 @@ ROM_START( daytonat )/* Daytona USA (Japan, Turbo hack) */
ROM_COPY( "main_data", 0x800000, 0xe00000, 0x100000 )
ROM_COPY( "main_data", 0x800000, 0xf00000, 0x100000 )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD("mpr-16537.ic28", 0x000000, 0x200000, CRC(36b7c35a) SHA1(b32fd1d3fc8983fb5f2a7b236b665a8c9b52769f) )
ROM_LOAD32_WORD("mpr-16536.ic29", 0x000002, 0x200000, CRC(6d6afed9) SHA1(2018468d7d849854b3d0cfbcd217317e2fc93555) )
@@ -6089,7 +6036,7 @@ ROM_START( daytonata )/* Daytona USA (Japan, Turbo hack) */
ROM_COPY( "main_data", 0x800000, 0xe00000, 0x100000 )
ROM_COPY( "main_data", 0x800000, 0xf00000, 0x100000 )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD("mpr-16537.ic28", 0x000000, 0x200000, CRC(36b7c35a) SHA1(b32fd1d3fc8983fb5f2a7b236b665a8c9b52769f) )
ROM_LOAD32_WORD("mpr-16536.ic29", 0x000002, 0x200000, CRC(6d6afed9) SHA1(2018468d7d849854b3d0cfbcd217317e2fc93555) )
@@ -6164,7 +6111,7 @@ ROM_START( daytonam ) /* Daytona USA (Japan, To The MAXX) */
ROM_COPY( "main_data", 0x800000, 0xe00000, 0x100000 )
ROM_COPY( "main_data", 0x800000, 0xf00000, 0x100000 )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD("mpr-16537.ic28", 0x000000, 0x200000, CRC(36b7c35a) SHA1(b32fd1d3fc8983fb5f2a7b236b665a8c9b52769f) )
ROM_LOAD32_WORD("mpr-16536.ic29", 0x000002, 0x200000, CRC(6d6afed9) SHA1(2018468d7d849854b3d0cfbcd217317e2fc93555) )
@@ -6235,7 +6182,7 @@ ROM_START( daytonagtx )
ROM_LOAD32_WORD("bank0.bin", 0x000002, 0x080000, CRC(21b603b4) SHA1(3f8f83fbf2ce5055fa85075c95da617fe2a8738a) )
ROM_LOAD32_WORD("bank1.bin", 0x100002, 0x080000, CRC(c1971f23) SHA1(3db88552ff2166f6eb2a9200e8609b52c1266274) )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD("mpr-16537.ic28", 0x000000, 0x200000, CRC(36b7c35a) SHA1(b32fd1d3fc8983fb5f2a7b236b665a8c9b52769f) )
ROM_LOAD32_WORD("mpr-16536.ic29", 0x000002, 0x200000, CRC(6d6afed9) SHA1(2018468d7d849854b3d0cfbcd217317e2fc93555) )
@@ -6294,7 +6241,7 @@ ROM_START( vcop ) /* Virtua Cop Revision B, Model 2 */
ROM_LOAD32_WORD( "epr-17168a.6", 0x800000, 0x080000, CRC(59091a37) SHA1(14591c7015aaf126755be584aa94c04e6de222fa) )
ROM_LOAD32_WORD( "epr-17169a.7", 0x800002, 0x080000, CRC(0495808d) SHA1(5b86a9a68c2b52f942aa8d858ee7a491f546a921) )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP program
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 )
ROM_REGION( 0x1000000, "polygons", 0 ) // Models
ROM_LOAD32_WORD( "mpr-17159.16", 0x000000, 0x200000, CRC(e218727d) SHA1(1458d01d49936a0b8d497b62ff9ea940ca753b37) )
@@ -6337,7 +6284,7 @@ ROM_START( vcopa ) /* Virtua Cop Revision A, Model 2 */
ROM_LOAD32_WORD( "epr-17168a.6", 0x800000, 0x080000, CRC(59091a37) SHA1(14591c7015aaf126755be584aa94c04e6de222fa) )
ROM_LOAD32_WORD( "epr-17169a.7", 0x800002, 0x080000, CRC(0495808d) SHA1(5b86a9a68c2b52f942aa8d858ee7a491f546a921) )
- ROM_REGION( 0x800000, "tgp", ROMREGION_ERASE00 ) // TGP program
+ ROM_REGION( 0x800000, "copro_data", ROMREGION_ERASE00 )
ROM_REGION( 0x1000000, "polygons", 0 ) // Models
ROM_LOAD32_WORD( "mpr-17159.16", 0x000000, 0x200000, CRC(e218727d) SHA1(1458d01d49936a0b8d497b62ff9ea940ca753b37) )
@@ -6380,7 +6327,7 @@ ROM_START( desert ) /* Desert Tank, Model 2 */
ROM_LOAD32_WORD("epr-16978.6", 0x800000, 0x080000, CRC(38b3e574) SHA1(a1133df608b0fbb9c53bbeb29138650c87845d2c) )
ROM_LOAD32_WORD("epr-16979.7", 0x800002, 0x080000, CRC(c314eb8b) SHA1(0c851dedd5c42b026195faed7d028924698a8b27) )
- ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
+ ROM_REGION( 0x800000, "copro_data", 0 ) // Copro extra data (collision/height map/etc) (COPRO socket)
ROM_LOAD32_WORD("epr-16981.28", 0x000000, 0x080000, CRC(ae847571) SHA1(32d0f9e685667ae9fddacea0b9f4ad6fb3a6fdad) )
ROM_LOAD32_WORD("epr-16980.29", 0x000002, 0x080000, CRC(5239b864) SHA1(e889556e0f1ea80de52afff563b0923f87cef7ab) )
@@ -6441,12 +6388,12 @@ DRIVER_INIT_MEMBER(model2_state,doa)
DRIVER_INIT_MEMBER(model2_state,rchase2)
{
- m_maincpu->space(AS_PROGRAM).install_write_handler(0x01c00008, 0x01c0000b, write32_delegate(FUNC(model2_state::rchase2_devices_w),this));
+ m_maincpu->space(AS_PROGRAM).install_write_handler(0x01c00008, 0x01c0000b, write32_delegate(FUNC(model2_state::rchase2_devices_w), this));
}
DRIVER_INIT_MEMBER(model2_state,srallyc)
{
- m_maincpu->space(AS_PROGRAM).install_write_handler(0x01c00008, 0x01c0000b, write32_delegate(FUNC(model2_state::srallyc_devices_w),this));
+ m_maincpu->space(AS_PROGRAM).install_write_handler(0x01c00008, 0x01c0000b, write32_delegate(FUNC(model2_state::srallyc_devices_w), this));
}
diff --git a/src/mame/includes/model1.h b/src/mame/includes/model1.h
index 062fe7c876e..ce7762f4d44 100644
--- a/src/mame/includes/model1.h
+++ b/src/mame/includes/model1.h
@@ -11,6 +11,7 @@
#include "cpu/mb86233/mb86233.h"
#include "cpu/v60/v60.h"
#include "machine/i8251.h"
+#include "machine/gen_fifo.h"
#include "machine/m1comm.h"
#include "machine/timer.h"
#include "video/segaic24.h"
@@ -37,11 +38,14 @@ public:
, m_m1uart(*this, "m1uart")
, m_m1comm(*this, "m1comm")
, m_dsbz80(*this, DSBZ80_TAG)
- , m_tgp(*this, "tgp")
+ , m_tgp_copro(*this, "tgp_copro")
, m_screen(*this, "screen")
, m_io_timer(*this, "iotimer")
+ , m_copro_fifo_in(*this, "copro_fifo_in")
+ , m_copro_fifo_out(*this, "copro_fifo_out")
, m_poly_rom(*this, "polygons")
- , m_tgp_data(*this, "tgp_data")
+ , m_copro_tables(*this, "copro_tables")
+ , m_copro_data(*this, "copro_data")
, m_mr2(*this, "mr2")
, m_mr(*this, "mr")
, m_display_list0(*this, "display_list0")
@@ -59,7 +63,6 @@ public:
// Machine
DECLARE_MACHINE_START(model1);
DECLARE_MACHINE_RESET(model1);
- DECLARE_MACHINE_RESET(model1_vr);
DECLARE_READ16_MEMBER(network_ctl_r);
DECLARE_WRITE16_MEMBER(network_ctl_w);
@@ -81,25 +84,44 @@ public:
DECLARE_WRITE16_MEMBER(mr_w);
DECLARE_WRITE16_MEMBER(mr2_w);
- DECLARE_READ16_MEMBER(model1_tgp_copro_r);
- DECLARE_WRITE16_MEMBER(model1_tgp_copro_w);
- DECLARE_READ16_MEMBER(model1_tgp_copro_adr_r);
- DECLARE_WRITE16_MEMBER(model1_tgp_copro_adr_w);
- DECLARE_READ16_MEMBER(model1_tgp_copro_ram_r);
- DECLARE_WRITE16_MEMBER(model1_tgp_copro_ram_w);
- DECLARE_READ16_MEMBER(model1_tgp_vr_adr_r);
- DECLARE_WRITE16_MEMBER(model1_tgp_vr_adr_w);
- DECLARE_READ16_MEMBER(model1_vr_tgp_ram_r);
- DECLARE_WRITE16_MEMBER(model1_vr_tgp_ram_w);
- DECLARE_READ16_MEMBER(model1_vr_tgp_r);
- DECLARE_WRITE16_MEMBER(model1_vr_tgp_w);
+ DECLARE_READ16_MEMBER(v60_copro_fifo_r);
+ DECLARE_WRITE16_MEMBER(v60_copro_fifo_w);
+ DECLARE_READ16_MEMBER(v60_copro_ram_adr_r);
+ DECLARE_WRITE16_MEMBER(v60_copro_ram_adr_w);
+ DECLARE_READ16_MEMBER(v60_copro_ram_r);
+ DECLARE_WRITE16_MEMBER(v60_copro_ram_w);
DECLARE_READ32_MEMBER(copro_ram_r);
DECLARE_WRITE32_MEMBER(copro_ram_w);
- DECLARE_READ_LINE_MEMBER(copro_fifoin_pop_ok);
DECLARE_READ32_MEMBER(copro_fifoin_pop);
DECLARE_WRITE32_MEMBER(copro_fifoout_push);
+ DECLARE_WRITE32_MEMBER(copro_sincos_w);
+ DECLARE_READ32_MEMBER(copro_sincos_r);
+ DECLARE_WRITE32_MEMBER(copro_inv_w);
+ DECLARE_READ32_MEMBER(copro_inv_r);
+ DECLARE_WRITE32_MEMBER(copro_isqrt_w);
+ DECLARE_READ32_MEMBER(copro_isqrt_r);
+ DECLARE_WRITE32_MEMBER(copro_atan_w);
+ DECLARE_READ32_MEMBER(copro_atan_r);
+ DECLARE_WRITE32_MEMBER(copro_data_w);
+ DECLARE_READ32_MEMBER(copro_data_r);
+ DECLARE_WRITE32_MEMBER(copro_ramadr_w);
+ DECLARE_READ32_MEMBER(copro_ramadr_r);
+ DECLARE_WRITE32_MEMBER(copro_ramdata_w);
+ DECLARE_READ32_MEMBER(copro_ramdata_r);
+
+ void copro_hle_vf();
+ void copro_hle_swa();
+ void copro_reset();
+
+ u32 m_copro_sincos_base;
+ u32 m_copro_inv_base;
+ u32 m_copro_isqrt_base;
+ u32 m_copro_atan_base[4];
+ u32 m_copro_data_base;
+ u32 m_copro_ram_adr;
+
uint16_t m_r360_state;
DECLARE_DRIVER_INIT(wingwar360);
DECLARE_READ16_MEMBER(r360_r);
@@ -187,27 +209,32 @@ public:
};
void model1(machine_config &config);
- void wingwar(machine_config &config);
- void swa(machine_config &config);
- void netmerc(machine_config &config);
- void model1_vr(machine_config &config);
+
+ void model1_hle(machine_config &config);
void vr(machine_config &config);
void vformula(machine_config &config);
+ void swa(machine_config &config);
+ void netmerc(machine_config &config);
+ void wingwar(machine_config &config);
+
void model1_io(address_map &map);
void model1_mem(address_map &map);
void model1_comm_mem(address_map &map);
- void model1_vr_io(address_map &map);
- void model1_vr_mem(address_map &map);
- void model1_vr_tgp_map(address_map &map);
+
+ void copro_prog_map(address_map &map);
+ void copro_data_map(address_map &map);
+ void copro_external_map(address_map &map);
+ void copro_io_map(address_map &map);
+ void copro_rf_map(address_map &map);
+
void polhemus_map(address_map &map);
+
private:
// Machine
void irq_raise(int level);
void irq_init();
int m_last_irq;
- bool m_dump;
- bool m_swa;
uint8_t m_io_command;
@@ -217,12 +244,14 @@ private:
required_device<i8251_device> m_m1uart;
optional_device<m1comm_device> m_m1comm; // Model 1 communication board
optional_device<dsbz80_device> m_dsbz80; // Digital Sound Board
- optional_device<mb86233_cpu_device> m_tgp;
+ optional_device<mb86233_device> m_tgp_copro;
required_device<screen_device> m_screen;
required_device<timer_device> m_io_timer;
+ required_device<generic_fifo_u32_device> m_copro_fifo_in, m_copro_fifo_out;
required_region_ptr<uint32_t> m_poly_rom;
- optional_region_ptr<uint32_t> m_tgp_data;
+ required_region_ptr<uint32_t> m_copro_tables;
+ optional_memory_region m_copro_data;
required_shared_ptr<uint16_t> m_mr2;
required_shared_ptr<uint16_t> m_mr;
@@ -234,32 +263,16 @@ private:
int m_sound_irq;
// TGP FIFO
- uint32_t fifoout_pop();
void fifoout_push(uint32_t data);
void fifoout_push_f(float data);
uint32_t fifoin_pop();
- void fifoin_push(uint32_t data);
float fifoin_pop_f();
uint16_t ram_get_i();
float ram_get_f();
- void copro_fifoin_push(uint32_t data);
- uint32_t copro_fifoout_pop();
- void next_fn();
-
- uint32_t m_copro_r;
- uint32_t m_copro_w;
- int m_copro_fifoout_rpos;
- int m_copro_fifoout_wpos;
- uint32_t m_copro_fifoout_data[FIFO_SIZE];
- int m_copro_fifoout_num;
- int m_copro_fifoin_rpos;
- int m_copro_fifoin_wpos;
- uint32_t m_copro_fifoin_data[FIFO_SIZE];
- int m_copro_fifoin_num;
+ u32 m_v60_copro_fifo_r, m_v60_copro_fifo_w;
// TGP
- void vr_tgp_reset();
- void tgp_reset(bool swa);
+ void tgp_reset();
DECLARE_TGP_FUNCTION( fadd );
DECLARE_TGP_FUNCTION( fsub );
@@ -385,12 +398,8 @@ private:
quad_t *m_quadpt;
quad_t **m_quadind;
offs_t m_pushpc;
- int m_fifoin_rpos;
- int m_fifoin_wpos;
- uint32_t m_fifoin_data[FIFO_SIZE];
- int m_fifoin_cbcount;
+ u32 m_copro_hle_active_list_pos, m_copro_hle_active_list_length;
typedef void (model1_state::*tgp_func)();
- tgp_func m_fifoin_cb;
struct function
{
@@ -398,12 +407,12 @@ private:
int count;
};
+ static float tsin(s16 angle);
+ static float tcos(s16 angle);
+
static const struct function ftab_vf[];
static const struct function ftab_swa[];
- int32_t m_fifoout_rpos;
- int32_t m_fifoout_wpos;
- uint32_t m_fifoout_data[FIFO_SIZE];
- uint32_t m_list_length;
+ uint32_t m_copro_hle_list_length;
float m_cmat[12];
float m_mat_stack[MAT_STACK_SIZE][12];
float m_mat_vector[21][12];
@@ -426,15 +435,12 @@ private:
float m_tgp_int_py;
float m_tgp_int_pz;
uint32_t m_tgp_int_adr;
- uint16_t m_ram_adr;
- uint16_t m_ram_latch[2];
- uint16_t m_ram_scanadr;
- std::unique_ptr<uint32_t[]> m_ram_data;
+ uint16_t m_v60_copro_ram_adr;
+ uint16_t m_v60_copro_ram_latch[2];
+ uint16_t m_copro_hle_ram_scan_adr;
+ std::unique_ptr<uint32_t[]> m_copro_ram_data;
float m_tgp_vr_base[4];
- int m_puuu;
int m_ccount;
- uint32_t m_vr_r;
- uint32_t m_vr_w;
uint16_t m_listctl[2];
uint16_t *m_glist;
bool m_render_done;
@@ -442,6 +448,8 @@ private:
std::unique_ptr<uint16_t[]> m_tgp_ram;
std::unique_ptr<uint32_t[]> m_poly_ram;
+ void configure_fifos();
+
// Rendering helper functions
uint32_t readi(int adr) const;
int16_t readi16(int adr) const;
diff --git a/src/mame/includes/model2.h b/src/mame/includes/model2.h
index 288d597855c..82c2617d021 100644
--- a/src/mame/includes/model2.h
+++ b/src/mame/includes/model2.h
@@ -6,7 +6,11 @@
#include "machine/eepromser.h"
#include "machine/i8251.h"
#include "cpu/i960/i960.h"
+#include "cpu/mb86233/mb86233.h"
+#include "cpu/sharc/sharc.h"
#include "cpu/mb86235/mb86235.h"
+#include "machine/bankdev.h"
+#include "machine/gen_fifo.h"
#include "sound/scsp.h"
#include "machine/315-5881_crypt.h"
#include "machine/315-5838_317-0229_comp.h"
@@ -24,22 +28,19 @@ class model2_state : public driver_device
public:
model2_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_workram(*this, "workram"),
- m_bufferram(*this, "bufferram"),
m_textureram0(*this, "textureram0"),
m_textureram1(*this, "textureram1"),
+ m_workram(*this, "workram"),
+ m_bufferram(*this, "bufferram"),
m_soundram(*this, "soundram"),
- m_tgp_program(*this, "tgp_program"),
- m_tgpx4_program(*this, "tgpx4_program"),
m_maincpu(*this,"maincpu"),
m_dsbz80(*this, DSBZ80_TAG),
m_m1audio(*this, M1AUDIO_TAG),
m_uart(*this, "uart"),
m_m2comm(*this, "m2comm"),
m_audiocpu(*this, "audiocpu"),
- m_tgp(*this, "tgp"),
- m_dsp(*this, "dsp"),
- m_tgpx4(*this, "tgpx4"),
+ m_copro_fifo_in(*this, "copro_fifo_in"),
+ m_copro_fifo_out(*this, "copro_fifo_out"),
m_drivecpu(*this, "drivecpu"),
m_eeprom(*this, "eeprom"),
m_screen(*this, "screen"),
@@ -47,6 +48,7 @@ public:
m_scsp(*this, "scsp"),
m_cryptdevice(*this, "315_5881"),
m_0229crypt(*this, "317_0229"),
+ m_copro_data(*this, "copro_data"),
m_in(*this, "IN%u", 0),
m_dsw(*this, "DSW"),
m_steer(*this, "STEER"),
@@ -57,18 +59,41 @@ public:
m_lightgun_ports(*this, {"P1_Y", "P1_X", "P2_Y", "P2_X"})
{ }
- required_shared_ptr<uint32_t> m_workram;
- required_shared_ptr<uint32_t> m_bufferram;
- std::unique_ptr<uint16_t[]> m_palram;
- std::unique_ptr<uint16_t[]> m_colorxlat;
+ /* Public for access by the rendering functions */
required_shared_ptr<uint32_t> m_textureram0;
required_shared_ptr<uint32_t> m_textureram1;
+ std::unique_ptr<uint16_t[]> m_palram;
+ std::unique_ptr<uint16_t[]> m_colorxlat;
std::unique_ptr<uint16_t[]> m_lumaram;
+ uint8_t m_gamma_table[256];
+ model2_renderer *m_poly;
+
+ /* Public for access by the ioports */
+ DECLARE_CUSTOM_INPUT_MEMBER(daytona_gearbox_r);
+ DECLARE_CUSTOM_INPUT_MEMBER(rchase2_devices_r);
+
+ /* Public for access by MCFG */
+ TIMER_DEVICE_CALLBACK_MEMBER(model2_interrupt);
+ uint16_t crypt_read_callback(uint32_t addr);
+ DECLARE_MACHINE_START(model2);
+
+
+ /* Public for access by GAME() */
+ DECLARE_DRIVER_INIT(overrev);
+ DECLARE_DRIVER_INIT(pltkids);
+ DECLARE_DRIVER_INIT(rchase2);
+ DECLARE_DRIVER_INIT(manxttdx);
+ DECLARE_DRIVER_INIT(doa);
+ DECLARE_DRIVER_INIT(zerogun);
+ DECLARE_DRIVER_INIT(sgt24h);
+ DECLARE_DRIVER_INIT(srallyc);
+
+protected:
+ required_shared_ptr<uint32_t> m_workram;
+ required_shared_ptr<uint32_t> m_bufferram;
std::unique_ptr<uint16_t[]> m_fbvramA;
std::unique_ptr<uint16_t[]> m_fbvramB;
optional_shared_ptr<uint16_t> m_soundram;
- optional_shared_ptr<uint32_t> m_tgp_program;
- optional_shared_ptr<uint64_t> m_tgpx4_program;
required_device<i960_cpu_device> m_maincpu;
optional_device<dsbz80_device> m_dsbz80; // Z80-based MPEG Digital Sound Board
@@ -76,9 +101,8 @@ public:
required_device<i8251_device> m_uart;
optional_device<m2comm_device> m_m2comm; // Model 2 communication board
optional_device<cpu_device> m_audiocpu;
- optional_device<cpu_device> m_tgp;
- optional_device<cpu_device> m_dsp;
- optional_device<mb86235_device> m_tgpx4;
+ required_device<generic_fifo_u32_device> m_copro_fifo_in;
+ required_device<generic_fifo_u32_device> m_copro_fifo_out;
optional_device<cpu_device> m_drivecpu;
required_device<eeprom_serial_93cxx_device> m_eeprom;
required_device<screen_device> m_screen;
@@ -86,6 +110,7 @@ public:
optional_device<scsp_device> m_scsp;
optional_device<sega_315_5881_crypt_device> m_cryptdevice;
optional_device<sega_315_5838_comp_device> m_0229crypt;
+ optional_memory_region m_copro_data;
optional_ioport_array<5> m_in;
required_ioport m_dsw;
@@ -102,15 +127,6 @@ public:
timer_device *m_timers[4];
int m_ctrlmode;
int m_analog_channel;
- int m_dsp_type;
- int m_copro_fifoin_rpos;
- int m_copro_fifoin_wpos;
- std::unique_ptr<uint32_t[]> m_copro_fifoin_data;
- int m_copro_fifoin_num;
- int m_copro_fifoout_rpos;
- int m_copro_fifoout_wpos;
- std::unique_ptr<uint32_t[]> m_copro_fifoout_data;
- int m_copro_fifoout_num;
uint16_t m_cmd_data;
uint8_t m_driveio_comm_data;
int m_iop_write_num;
@@ -120,7 +136,6 @@ public:
uint32_t m_geo_read_start_address;
uint32_t m_geo_write_start_address;
- model2_renderer *m_poly;
raster_state *m_raster;
geo_state *m_geo;
bitmap_rgb32 m_sys24_bitmap;
@@ -130,9 +145,22 @@ public:
uint8_t m_gearsel;
uint8_t m_lightgun_mux;
+ // Coprocessor communications
+ DECLARE_READ32_MEMBER(copro_prg_r);
+ DECLARE_WRITE32_MEMBER(copro_prg_w);
+ DECLARE_READ32_MEMBER(copro_ctl1_r);
+ DECLARE_WRITE32_MEMBER(copro_ctl1_w);
+ DECLARE_READ32_MEMBER(copro_status_r);
+
+ // Geometrizer communications
+ DECLARE_WRITE32_MEMBER(geo_ctl1_w);
+ DECLARE_READ32_MEMBER(geo_prg_r);
+ DECLARE_WRITE32_MEMBER(geo_prg_w);
+ DECLARE_READ32_MEMBER(geo_r);
+ DECLARE_WRITE32_MEMBER(geo_w);
+
+ // Everything else
DECLARE_READ8_MEMBER(model2_crx_in_r);
- DECLARE_CUSTOM_INPUT_MEMBER(daytona_gearbox_r);
- DECLARE_CUSTOM_INPUT_MEMBER(rchase2_devices_r);
DECLARE_READ32_MEMBER(timers_r);
DECLARE_WRITE32_MEMBER(timers_w);
DECLARE_READ16_MEMBER(palette_r);
@@ -146,19 +174,6 @@ public:
DECLARE_WRITE32_MEMBER(videoctl_w);
DECLARE_WRITE32_MEMBER(rchase2_devices_w);
DECLARE_WRITE32_MEMBER(srallyc_devices_w);
- DECLARE_READ32_MEMBER(copro_prg_r);
- DECLARE_WRITE32_MEMBER(copro_prg_w);
- DECLARE_READ32_MEMBER(copro_ctl1_r);
- DECLARE_WRITE32_MEMBER(copro_ctl1_w);
- DECLARE_WRITE32_MEMBER(copro_function_port_w);
- DECLARE_READ32_MEMBER(copro_fifo_r);
- DECLARE_WRITE32_MEMBER(copro_fifo_w);
- DECLARE_WRITE32_MEMBER(copro_sharc_iop_w);
- DECLARE_WRITE32_MEMBER(geo_ctl1_w);
- DECLARE_READ32_MEMBER(geo_prg_r);
- DECLARE_WRITE32_MEMBER(geo_prg_w);
- DECLARE_READ32_MEMBER(geo_r);
- DECLARE_WRITE32_MEMBER(geo_w);
DECLARE_READ8_MEMBER(hotd_lightgun_r);
DECLARE_WRITE32_MEMBER(hotd_lightgun_w);
DECLARE_READ32_MEMBER(irq_request_r);
@@ -175,8 +190,6 @@ public:
void geo_init(memory_region *polygon_rom);
DECLARE_READ32_MEMBER(render_mode_r);
DECLARE_WRITE32_MEMBER(render_mode_w);
- DECLARE_WRITE32_MEMBER(model2o_tex_w0);
- DECLARE_WRITE32_MEMBER(model2o_tex_w1);
DECLARE_READ16_MEMBER(lumaram_r);
DECLARE_WRITE16_MEMBER(lumaram_w);
DECLARE_READ16_MEMBER(fbvram_bankA_r);
@@ -185,57 +198,24 @@ public:
DECLARE_WRITE16_MEMBER(fbvram_bankB_w);
DECLARE_WRITE32_MEMBER(model2_3d_zclip_w);
DECLARE_WRITE16_MEMBER(model2snd_ctrl);
- DECLARE_READ32_MEMBER(copro_sharc_input_fifo_r);
- DECLARE_WRITE32_MEMBER(copro_sharc_output_fifo_w);
- DECLARE_READ32_MEMBER(copro_sharc_buffer_r);
- DECLARE_WRITE32_MEMBER(copro_sharc_buffer_w);
- DECLARE_READ32_MEMBER(copro_tgp_buffer_r);
- DECLARE_WRITE32_MEMBER(copro_tgp_buffer_w);
DECLARE_READ8_MEMBER(tgpid_r);
- DECLARE_READ32_MEMBER(copro_status_r);
DECLARE_READ32_MEMBER(polygon_count_r);
DECLARE_READ8_MEMBER(driveio_portg_r);
DECLARE_READ8_MEMBER(driveio_porth_r);
DECLARE_WRITE8_MEMBER(driveio_port_w);
void push_geo_data(uint32_t data);
- DECLARE_DRIVER_INIT(overrev);
- DECLARE_DRIVER_INIT(pltkids);
- DECLARE_DRIVER_INIT(rchase2);
- DECLARE_DRIVER_INIT(manxttdx);
- DECLARE_DRIVER_INIT(srallyc);
- DECLARE_DRIVER_INIT(doa);
- DECLARE_DRIVER_INIT(zerogun);
- DECLARE_DRIVER_INIT(sgt24h);
- DECLARE_MACHINE_START(model2);
- DECLARE_MACHINE_START(srallyc);
- DECLARE_MACHINE_RESET(model2o);
DECLARE_VIDEO_START(model2);
- DECLARE_MACHINE_RESET(model2);
- DECLARE_MACHINE_RESET(model2b);
- DECLARE_MACHINE_RESET(model2c);
DECLARE_MACHINE_RESET(model2_common);
DECLARE_MACHINE_RESET(model2_scsp);
uint32_t screen_update_model2(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
// DECLARE_WRITE_LINE_MEMBER(screen_vblank_model2);
// DECLARE_WRITE_LINE_MEMBER(sound_ready_w);
TIMER_DEVICE_CALLBACK_MEMBER(model2_timer_cb);
- TIMER_DEVICE_CALLBACK_MEMBER(model2_interrupt);
- TIMER_DEVICE_CALLBACK_MEMBER(model2c_interrupt);
DECLARE_WRITE8_MEMBER(scsp_irq);
- DECLARE_READ_LINE_MEMBER(copro_tgp_fifoin_pop_ok);
- DECLARE_READ32_MEMBER(copro_tgp_fifoin_pop);
- DECLARE_WRITE32_MEMBER(copro_tgp_fifoout_push);
DECLARE_READ8_MEMBER(virtuacop_lightgun_r);
DECLARE_READ8_MEMBER(virtuacop_lightgun_offscreen_r);
- uint16_t crypt_read_callback(uint32_t addr);
-
- bool copro_fifoin_pop(device_t *device, uint32_t *result,uint32_t offset, uint32_t mem_mask);
- void copro_fifoin_push(device_t *device, uint32_t data, uint32_t offset, uint32_t mem_mask);
- uint32_t copro_fifoout_pop(address_space &space, uint32_t offset, uint32_t mem_mask);
- void copro_fifoout_push(device_t *device, uint32_t data,uint32_t offset,uint32_t mem_mask);
-
void model2_3d_frame_start( void );
void geo_parse( void );
void model2_3d_frame_end( bitmap_rgb32 &bitmap, const rectangle &cliprect );
@@ -246,8 +226,7 @@ public:
void model2_scsp(machine_config &config);
void sj25_0207_01(machine_config &config);
- void copro_sharc_map(address_map &map);
- void copro_tgp_map(address_map &map);
+
void drive_io_map(address_map &map);
void drive_map(address_map &map);
void geo_sharc_map(address_map &map);
@@ -255,33 +234,35 @@ public:
void model2_5881_mem(address_map &map);
void model2_snd(address_map &map);
- uint8_t m_gamma_table[256];
-
void debug_init();
void debug_commands( int ref, const std::vector<std::string> &params );
void debug_geo_dasm_command(int ref, const std::vector<std::string> &params);
void debug_tri_dump_command(int ref, const std::vector<std::string> &params);
void debug_help_command(int ref, const std::vector<std::string> &params);
-protected:
virtual void video_start() override;
-private:
- void tri_list_dump(FILE *dst);
-
uint32_t m_intreq;
uint32_t m_intena;
uint32_t m_coproctl;
uint32_t m_coprocnt;
- uint32_t m_geoctl;
- uint32_t m_geocnt;
- uint32_t m_videocontrol;
+
int m_port_1c00004;
int m_port_1c00006;
int m_port_1c00010;
int m_port_1c00012;
int m_port_1c00014;
+ virtual void copro_halt() = 0;
+ virtual void copro_boot() = 0;
+
+private:
+ void tri_list_dump(FILE *dst);
+
+ uint32_t m_geoctl;
+ uint32_t m_geocnt;
+ uint32_t m_videocontrol;
+
bool m_render_unk;
bool m_render_mode;
bool m_render_test_mode;
@@ -331,23 +312,96 @@ private:
/*****************************
*
- * Model 2
+ * Model 2/2A TGP support
+ *
+ *****************************/
+
+class model2_tgp_state : public model2_state
+{
+public:
+ model2_tgp_state(const machine_config &mconfig, device_type type, const char *tag)
+ : model2_state(mconfig, type, tag),
+ m_copro_tgp(*this, "copro_tgp"),
+ m_copro_tgp_program(*this, "copro_tgp_program"),
+ m_copro_tgp_tables(*this, "copro_tgp_tables"),
+ m_copro_tgp_bank(*this, "copro_tgp_bank")
+ {}
+
+ DECLARE_MACHINE_START(model2_tgp);
+ DECLARE_MACHINE_START(srallyc);
+
+protected:
+ required_device<mb86234_device> m_copro_tgp;
+ required_shared_ptr<uint32_t> m_copro_tgp_program;
+ required_region_ptr<uint32_t> m_copro_tgp_tables;
+ required_device<address_map_bank_device> m_copro_tgp_bank;
+
+ u32 m_copro_tgp_bank_reg;
+ u32 m_copro_sincos_base;
+ u32 m_copro_inv_base;
+ u32 m_copro_isqrt_base;
+ u32 m_copro_atan_base[4];
+
+ DECLARE_READ32_MEMBER(copro_tgp_buffer_r);
+ DECLARE_WRITE32_MEMBER(copro_tgp_buffer_w);
+ DECLARE_WRITE32_MEMBER(copro_function_port_w);
+ DECLARE_READ32_MEMBER(copro_fifo_r);
+ DECLARE_WRITE32_MEMBER(copro_fifo_w);
+ DECLARE_WRITE32_MEMBER(tex0_w);
+ DECLARE_WRITE32_MEMBER(tex1_w);
+
+ DECLARE_READ32_MEMBER(copro_tgp_fifoin_pop);
+ DECLARE_WRITE32_MEMBER(copro_tgp_fifoout_push);
+ DECLARE_WRITE32_MEMBER(copro_tgp_bank_w);
+ DECLARE_READ32_MEMBER(copro_tgp_memory_r);
+ DECLARE_WRITE32_MEMBER(copro_tgp_memory_w);
+
+ DECLARE_WRITE32_MEMBER(copro_sincos_w);
+ DECLARE_READ32_MEMBER(copro_sincos_r);
+ DECLARE_WRITE32_MEMBER(copro_inv_w);
+ DECLARE_READ32_MEMBER(copro_inv_r);
+ DECLARE_WRITE32_MEMBER(copro_isqrt_w);
+ DECLARE_READ32_MEMBER(copro_isqrt_r);
+ DECLARE_WRITE32_MEMBER(copro_atan_w);
+ DECLARE_READ32_MEMBER(copro_atan_r);
+
+ DECLARE_MACHINE_RESET(model2_tgp);
+
+ void model2_tgp_mem(address_map &map);
+
+ void copro_tgp_prog_map(address_map &map);
+ void copro_tgp_data_map(address_map &map);
+ void copro_tgp_bank_map(address_map &map);
+ void copro_tgp_io_map(address_map &map);
+ void copro_tgp_rf_map(address_map &map);
+
+ virtual void copro_halt() override;
+ virtual void copro_boot() override;
+};
+
+/*****************************
+ *
+ * Model 2 support
*
*****************************/
-class model2o_state : public model2_state
+class model2o_state : public model2_tgp_state
{
public:
model2o_state(const machine_config &mconfig, device_type type, const char *tag)
- : model2_state(mconfig, type, tag)
+ : model2_tgp_state(mconfig, type, tag)
{}
+ DECLARE_MACHINE_RESET(model2o);
+
+ void daytona(machine_config &config);
+ void model2o(machine_config &config);
+
+protected:
DECLARE_READ32_MEMBER(daytona_unk_r);
DECLARE_READ8_MEMBER(model2o_in_r);
DECLARE_READ32_MEMBER(fifo_control_2o_r);
- void daytona(machine_config &config);
- void model2o(machine_config &config);
void model2o_mem(address_map &map);
};
@@ -399,19 +453,23 @@ private:
*
*****************************/
-class model2a_state : public model2_state
+class model2a_state : public model2_tgp_state
{
public:
model2a_state(const machine_config &mconfig, device_type type, const char *tag)
- : model2_state(mconfig, type, tag)
+ : model2_tgp_state(mconfig, type, tag)
{}
+ DECLARE_MACHINE_RESET(model2a);
+
void manxtt(machine_config &config);
void manxttdx(machine_config &config);
void model2a(machine_config &config);
void model2a_0229(machine_config &config);
void model2a_5881(machine_config &config);
void srallyc(machine_config &config);
+
+protected:
void model2a_crx_mem(address_map &map);
void model2a_5881_mem(address_map &map);
};
@@ -426,19 +484,40 @@ class model2b_state : public model2_state
{
public:
model2b_state(const machine_config &mconfig, device_type type, const char *tag)
- : model2_state(mconfig, type, tag)
+ : model2_state(mconfig, type, tag),
+ m_copro_adsp(*this, "copro_adsp")
{}
+ DECLARE_MACHINE_RESET(model2b);
+ DECLARE_MACHINE_START(model2b);
+ DECLARE_MACHINE_START(srallyc);
+
void model2b(machine_config &config);
void model2b_0229(machine_config &config);
void model2b_5881(machine_config &config);
void indy500(machine_config &config);
void rchase2(machine_config &config);
+
+protected:
+ required_device<adsp21062_device> m_copro_adsp;
+
+ DECLARE_WRITE32_MEMBER(copro_function_port_w);
+ DECLARE_READ32_MEMBER(copro_fifo_r);
+ DECLARE_WRITE32_MEMBER(copro_fifo_w);
+ DECLARE_WRITE32_MEMBER(copro_sharc_iop_w);
+ DECLARE_READ32_MEMBER(copro_sharc_buffer_r);
+ DECLARE_WRITE32_MEMBER(copro_sharc_buffer_w);
+
void model2b_crx_mem(address_map &map);
void model2b_5881_mem(address_map &map);
// TODO: split into own class
void rchase2_iocpu_map(address_map &map);
void rchase2_ioport_map(address_map &map);
+
+ void copro_sharc_map(address_map &map);
+
+ virtual void copro_halt() override;
+ virtual void copro_boot() override;
};
/*****************************
@@ -451,19 +530,37 @@ class model2c_state : public model2_state
{
public:
model2c_state(const machine_config &mconfig, device_type type, const char *tag)
- : model2_state(mconfig, type, tag)
+ : model2_state(mconfig, type, tag),
+ m_copro_tgpx4(*this, "copro_tgpx4"),
+ m_copro_tgpx4_program(*this, "copro_tgpx4_program")
{}
- DECLARE_READ32_MEMBER(fifo_control_2c_r);
+ DECLARE_MACHINE_RESET(model2c);
+ DECLARE_MACHINE_START(model2c);
+ DECLARE_MACHINE_START(srallyc);
void model2c(machine_config &config);
void model2c_5881(machine_config &config);
void overrev2c(machine_config &config);
void stcc(machine_config &config);
+
+protected:
+ required_device<mb86235_device> m_copro_tgpx4;
+ required_shared_ptr<uint64_t> m_copro_tgpx4_program;
+
+ DECLARE_WRITE32_MEMBER(copro_function_port_w);
+ DECLARE_READ32_MEMBER(copro_fifo_r);
+ DECLARE_WRITE32_MEMBER(copro_fifo_w);
+
+ TIMER_DEVICE_CALLBACK_MEMBER(model2c_interrupt);
+
void model2c_crx_mem(address_map &map);
void model2c_5881_mem(address_map &map);
void copro_tgpx4_map(address_map &map);
void copro_tgpx4_data_map(address_map &map);
+
+ virtual void copro_halt() override;
+ virtual void copro_boot() override;
};
/*****************************
diff --git a/src/mame/machine/model1.cpp b/src/mame/machine/model1.cpp
index d5693f8d658..4c6b4c3fe2e 100644
--- a/src/mame/machine/model1.cpp
+++ b/src/mame/machine/model1.cpp
@@ -12,75 +12,27 @@
#define TGP_FUNCTION(name) void name()
-
-uint32_t model1_state::fifoout_pop()
+void model1_state::fifoout_push(u32 data)
{
- if(m_fifoout_wpos == m_fifoout_rpos) {
- fatalerror("TGP FIFOOUT underflow (%x)\n", safe_pc());
- }
- uint32_t v = m_fifoout_data[m_fifoout_rpos++];
- if(m_fifoout_rpos == FIFO_SIZE)
- m_fifoout_rpos = 0;
- return v;
-}
-
-
-void model1_state::fifoout_push(uint32_t data)
-{
- if(!m_puuu)
- logerror("TGP: Push %d\n", data);
- else
- m_puuu = 0;
- m_fifoout_data[m_fifoout_wpos++] = data;
- if(m_fifoout_wpos == FIFO_SIZE)
- m_fifoout_wpos = 0;
- if(m_fifoout_wpos == m_fifoout_rpos)
- logerror("TGP FIFOOUT overflow\n");
+ m_copro_fifo_out->push(u32(data));
}
void model1_state::fifoout_push_f(float data)
{
- m_puuu = 1;
-
- logerror("TGP: Push %f\n", (double) data);
- fifoout_push(f2u(data));
-}
-
-uint32_t model1_state::fifoin_pop()
-{
- if(m_fifoin_wpos == m_fifoin_rpos)
- logerror("TGP FIFOIN underflow\n");
- uint32_t v = m_fifoin_data[m_fifoin_rpos++];
- if(m_fifoin_rpos == FIFO_SIZE)
- m_fifoin_rpos = 0;
- return v;
+ m_copro_fifo_out->push(f2u(data));
}
-void model1_state::fifoin_push(uint32_t data)
+u32 model1_state::fifoin_pop()
{
- // logerror("TGP FIFOIN write %08x (%x)\n", data, safe_pc());
- m_fifoin_data[m_fifoin_wpos++] = data;
- if(m_fifoin_wpos == FIFO_SIZE)
- m_fifoin_wpos = 0;
- if(m_fifoin_wpos == m_fifoin_rpos)
- logerror("TGP FIFOIN overflow\n");
- m_fifoin_cbcount--;
- if(!m_fifoin_cbcount)
- (this->*m_fifoin_cb)();
+ return m_copro_fifo_in->pop();
}
float model1_state::fifoin_pop_f()
{
- return u2f(fifoin_pop());
-}
-
-void model1_state::next_fn()
-{
- m_fifoin_cbcount = 1;
- m_fifoin_cb = m_swa ? &model1_state::function_get_swa : &model1_state::function_get_vf;
+ return u2f(m_copro_fifo_in->pop());
}
-static float tcos(int16_t a)
+float model1_state::tcos(s16 a)
{
if(a == 16384 || a == -16384)
return 0;
@@ -92,7 +44,7 @@ static float tcos(int16_t a)
return cos(a*(2*M_PI/65536.0));
}
-static float tsin(int16_t a)
+float model1_state::tsin(s16 a)
{
if(a == 0 || a == -32768)
return 0;
@@ -104,14 +56,14 @@ static float tsin(int16_t a)
return sin(a*(2*M_PI/65536.0));
}
-uint16_t model1_state::ram_get_i()
+u16 model1_state::ram_get_i()
{
- return m_ram_data[m_ram_scanadr++];
+ return m_copro_ram_data[(m_copro_hle_ram_scan_adr++) & 0x7fff];
}
float model1_state::ram_get_f()
{
- return u2f(m_ram_data[m_ram_scanadr++]);
+ return u2f(m_copro_ram_data[(m_copro_hle_ram_scan_adr++) & 0x7fff]);
}
TGP_FUNCTION( model1_state::fadd )
@@ -121,7 +73,6 @@ TGP_FUNCTION( model1_state::fadd )
float r = a+b;
logerror("TGP fadd %f+%f=%f (%x)\n", a, b, r, m_pushpc);
fifoout_push_f(r);
- next_fn();
}
TGP_FUNCTION( model1_state::fsub )
@@ -129,10 +80,8 @@ TGP_FUNCTION( model1_state::fsub )
float a = fifoin_pop_f();
float b = fifoin_pop_f();
float r = a-b;
- m_dump = true;
logerror("TGP fsub %f-%f=%f (%x)\n", a, b, r, m_pushpc);
fifoout_push_f(r);
- next_fn();
}
TGP_FUNCTION( model1_state::fmul )
@@ -142,7 +91,6 @@ TGP_FUNCTION( model1_state::fmul )
float r = a*b;
logerror("TGP fmul %f*%f=%f (%x)\n", a, b, r, m_pushpc);
fifoout_push_f(r);
- next_fn();
}
TGP_FUNCTION( model1_state::fdiv )
@@ -153,7 +101,6 @@ TGP_FUNCTION( model1_state::fdiv )
float r = !b ? 0 : a * (1/b);
logerror("TGP fdiv %f/%f=%f (%x)\n", a, b, r, m_pushpc);
fifoout_push_f(r);
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_push )
@@ -163,7 +110,6 @@ TGP_FUNCTION( model1_state::matrix_push )
m_mat_stack_pos++;
}
logerror("TGP matrix_push (depth=%d, pc=%x)\n", m_mat_stack_pos, m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_pop )
@@ -173,7 +119,6 @@ TGP_FUNCTION( model1_state::matrix_pop )
memcpy(m_cmat, m_mat_stack[m_mat_stack_pos], sizeof(m_cmat));
}
logerror("TGP matrix_pop (depth=%d, pc=%x)\n", m_mat_stack_pos, m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_write )
@@ -184,14 +129,12 @@ TGP_FUNCTION( model1_state::matrix_write )
logerror("TGP matrix_write %f, %f, %f, %f, %f, %f, %f, %f, %f, %f, %f, %f) (%x)\n",
m_cmat[0], m_cmat[1], m_cmat[2], m_cmat[3], m_cmat[4], m_cmat[5], m_cmat[6], m_cmat[7], m_cmat[8], m_cmat[9], m_cmat[10], m_cmat[11],
m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::clear_stack )
{
logerror("TGP clear_stack (%x)\n", m_pushpc);
m_mat_stack_pos = 0;
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_mul )
@@ -224,7 +167,6 @@ TGP_FUNCTION( model1_state::matrix_mul )
m[11] = j*m_cmat[2] + k*m_cmat[5] + l*m_cmat[8] + m_cmat[11];
memcpy(m_cmat, m, sizeof(m));
- next_fn();
}
TGP_FUNCTION( model1_state::anglev )
@@ -236,15 +178,14 @@ TGP_FUNCTION( model1_state::anglev )
if(a>=0)
fifoout_push(0);
else
- fifoout_push((uint32_t)-32768);
+ fifoout_push((u32)-32768);
} else if(!a) {
if(b>=0)
fifoout_push(16384);
else
- fifoout_push((uint32_t)-16384);
+ fifoout_push((u32)-16384);
} else
- fifoout_push((int16_t)(atan2(b, a)*32768/M_PI));
- next_fn();
+ fifoout_push((s16)(atan2(b, a)*32768/M_PI));
}
TGP_FUNCTION( model1_state::triangle_normal )
@@ -277,7 +218,6 @@ TGP_FUNCTION( model1_state::triangle_normal )
fifoout_push_f(nx);
fifoout_push_f(ny);
fifoout_push_f(nz);
- next_fn();
}
TGP_FUNCTION( model1_state::normalize )
@@ -290,16 +230,13 @@ TGP_FUNCTION( model1_state::normalize )
fifoout_push_f(a/n);
fifoout_push_f(b/n);
fifoout_push_f(c/n);
- next_fn();
}
TGP_FUNCTION( model1_state::acc_seti )
{
int32_t a = fifoin_pop();
- m_dump = true;
logerror("TGP acc_seti %d (%x)\n", a, m_pushpc);
m_acc = a;
- next_fn();
}
TGP_FUNCTION( model1_state::track_select )
@@ -307,7 +244,6 @@ TGP_FUNCTION( model1_state::track_select )
int32_t a = fifoin_pop();
logerror("TGP track_select %d (%x)\n", a, m_pushpc);
m_tgp_vr_select = a;
- next_fn();
}
TGP_FUNCTION( model1_state::load_base )
@@ -318,7 +254,6 @@ TGP_FUNCTION( model1_state::load_base )
m_tgp_vr_base[3] = fifoin_pop_f();
logerror("TGP load_base %f, %f, %f, %f (%x)\n", m_tgp_vr_base[0], m_tgp_vr_base[1], m_tgp_vr_base[2], m_tgp_vr_base[3], m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::transpose )
@@ -329,8 +264,6 @@ TGP_FUNCTION( model1_state::transpose )
t = m_cmat[1]; m_cmat[1] = m_cmat[3]; m_cmat[3] = t;
t = m_cmat[2]; m_cmat[2] = m_cmat[6]; m_cmat[6] = t;
t = m_cmat[5]; m_cmat[5] = m_cmat[7]; m_cmat[7] = t;
-
- next_fn();
}
TGP_FUNCTION( model1_state::anglep )
@@ -346,15 +279,14 @@ TGP_FUNCTION( model1_state::anglep )
if(c>=0)
fifoout_push(0);
else
- fifoout_push((uint32_t)-32768);
+ fifoout_push((u32)-32768);
} else if(!c) {
if(d>=0)
fifoout_push(16384);
else
- fifoout_push((uint32_t)-16384);
+ fifoout_push((u32)-16384);
} else
- fifoout_push((int16_t)(atan2(d, c)*32768/M_PI));
- next_fn();
+ fifoout_push((s16)(atan2(d, c)*32768/M_PI));
}
TGP_FUNCTION( model1_state::matrix_ident )
@@ -364,7 +296,6 @@ TGP_FUNCTION( model1_state::matrix_ident )
m_cmat[0] = 1.0;
m_cmat[4] = 1.0;
m_cmat[8] = 1.0;
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_read )
@@ -374,7 +305,6 @@ TGP_FUNCTION( model1_state::matrix_read )
m_cmat[0], m_cmat[1], m_cmat[2], m_cmat[3], m_cmat[4], m_cmat[5], m_cmat[6], m_cmat[7], m_cmat[8], m_cmat[9], m_cmat[10], m_cmat[11], m_pushpc);
for(i=0; i<12; i++)
fifoout_push_f(m_cmat[i]);
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_trans )
@@ -388,7 +318,6 @@ TGP_FUNCTION( model1_state::matrix_trans )
m_cmat[ 9] += m_cmat[0]*a+m_cmat[3]*b+m_cmat[6]*c;
m_cmat[10] += m_cmat[1]*a+m_cmat[4]*b+m_cmat[7]*c;
m_cmat[11] += m_cmat[2]*a+m_cmat[5]*b+m_cmat[8]*c;
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_scale )
@@ -406,12 +335,11 @@ TGP_FUNCTION( model1_state::matrix_scale )
m_cmat[6] *= c;
m_cmat[7] *= c;
m_cmat[8] *= c;
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_rotx )
{
- int16_t a = fifoin_pop();
+ s16 a = fifoin_pop();
float s = tsin(a);
float c = tcos(a);
float t1, t2;
@@ -428,12 +356,11 @@ TGP_FUNCTION( model1_state::matrix_rotx )
t2 = m_cmat[8];
m_cmat[5] = c*t1-s*t2;
m_cmat[8] = s*t1+c*t2;
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_roty )
{
- int16_t a = fifoin_pop();
+ s16 a = fifoin_pop();
float s = tsin(a);
float c = tcos(a);
float t1, t2;
@@ -451,12 +378,11 @@ TGP_FUNCTION( model1_state::matrix_roty )
t2 = m_cmat[2];
m_cmat[8] = c*t1-s*t2;
m_cmat[2] = s*t1+c*t2;
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_rotz )
{
- int16_t a = fifoin_pop();
+ s16 a = fifoin_pop();
float s = tsin(a);
float c = tcos(a);
float t1, t2;
@@ -474,30 +400,28 @@ TGP_FUNCTION( model1_state::matrix_rotz )
t2 = m_cmat[5];
m_cmat[2] = c*t1-s*t2;
m_cmat[5] = s*t1+c*t2;
- next_fn();
}
TGP_FUNCTION( model1_state::track_read_quad )
{
- uint32_t a = fifoin_pop();
+ u32 a = fifoin_pop();
int offd;
logerror("TGP track_read_quad %d (%x)\n", a, m_pushpc);
- offd = m_tgp_data[0x20+m_tgp_vr_select] + 16*a;
- fifoout_push(m_tgp_data[offd]);
- fifoout_push(m_tgp_data[offd+1]);
- fifoout_push(m_tgp_data[offd+2]);
- fifoout_push(m_tgp_data[offd+3]);
- fifoout_push(m_tgp_data[offd+4]);
- fifoout_push(m_tgp_data[offd+5]);
- fifoout_push(m_tgp_data[offd+6]);
- fifoout_push(m_tgp_data[offd+7]);
- fifoout_push(m_tgp_data[offd+8]);
- fifoout_push(m_tgp_data[offd+9]);
- fifoout_push(m_tgp_data[offd+10]);
- fifoout_push(m_tgp_data[offd+11]);
- next_fn();
+ offd = m_copro_data->as_u32(0x20+m_tgp_vr_select) + 16*a;
+ fifoout_push(m_copro_data->as_u32(offd));
+ fifoout_push(m_copro_data->as_u32(offd+1));
+ fifoout_push(m_copro_data->as_u32(offd+2));
+ fifoout_push(m_copro_data->as_u32(offd+3));
+ fifoout_push(m_copro_data->as_u32(offd+4));
+ fifoout_push(m_copro_data->as_u32(offd+5));
+ fifoout_push(m_copro_data->as_u32(offd+6));
+ fifoout_push(m_copro_data->as_u32(offd+7));
+ fifoout_push(m_copro_data->as_u32(offd+8));
+ fifoout_push(m_copro_data->as_u32(offd+9));
+ fifoout_push(m_copro_data->as_u32(offd+10));
+ fifoout_push(m_copro_data->as_u32(offd+11));
}
TGP_FUNCTION( model1_state::intercept )
@@ -508,7 +432,7 @@ TGP_FUNCTION( model1_state::intercept )
float x2 = fifoin_pop_f();
float y2 = fifoin_pop_f();
float z2 = fifoin_pop_f();
- uint32_t idx = fifoin_pop();
+ u32 idx = fifoin_pop();
logerror("TGP intercept %f, %f, %f, %f, %f, %f, %x (%x)\n", x1, y1, z1, x2, y2, z2, idx, m_pushpc);
@@ -516,19 +440,19 @@ TGP_FUNCTION( model1_state::intercept )
float dy = y2-y1;
float dz = z2-z1;
- idx = m_tgp_data[0x10] + 2*idx;
- uint32_t count = m_tgp_data[idx];
- uint32_t adr = m_tgp_data[idx+1];
- uint32_t ret = 1;
+ idx = m_copro_data->as_u32(0x10) + 2*idx;
+ u32 count = m_copro_data->as_u32(idx);
+ u32 adr = m_copro_data->as_u32(idx+1);
+ u32 ret = 1;
for(unsigned int j=0; j<count; j++) {
float point[4][3];
for(int pt=0; pt<4; pt++)
for(int dim=0; dim<3; dim++)
- point[pt][dim] = u2f(m_tgp_data[adr++]);
+ point[pt][dim] = u2f(m_copro_data->as_u32(adr++));
float plane[4];
for(int dim=0; dim<4; dim++)
- plane[dim] = u2f(m_tgp_data[adr++]);
+ plane[dim] = u2f(m_copro_data->as_u32(adr++));
adr++; // 0, 1 or 2...
float den = dx * plane[0] + dy * plane[1] + dz * plane[2];
@@ -566,7 +490,6 @@ TGP_FUNCTION( model1_state::intercept )
m_tgp_int_adr = adr;
fifoout_push(ret);
- next_fn();
}
TGP_FUNCTION( model1_state::transform_point )
@@ -574,46 +497,44 @@ TGP_FUNCTION( model1_state::transform_point )
float x = fifoin_pop_f();
float y = fifoin_pop_f();
float z = fifoin_pop_f();
- logerror("TGP transform_point %f, %f, %f (%x)\n", x, y, z, m_pushpc);
+ logerror("TGP transform_point %f, %f, %f -> %f, %f, %f (%x)\n", x, y, z,
+ m_cmat[0]*x+m_cmat[3]*y+m_cmat[6]*z+m_cmat[9],
+ m_cmat[1]*x+m_cmat[4]*y+m_cmat[7]*z+m_cmat[10],
+ m_cmat[2]*x+m_cmat[5]*y+m_cmat[8]*z+m_cmat[11],
+ m_pushpc);
fifoout_push_f(m_cmat[0]*x+m_cmat[3]*y+m_cmat[6]*z+m_cmat[9]);
fifoout_push_f(m_cmat[1]*x+m_cmat[4]*y+m_cmat[7]*z+m_cmat[10]);
fifoout_push_f(m_cmat[2]*x+m_cmat[5]*y+m_cmat[8]*z+m_cmat[11]);
- next_fn();
}
TGP_FUNCTION( model1_state::fcos_m1 )
{
- int16_t a = fifoin_pop();
+ s16 a = fifoin_pop();
logerror("TGP fcos %d (%x)\n", a, m_pushpc);
fifoout_push_f(tcos(a));
- next_fn();
}
TGP_FUNCTION( model1_state::fsin_m1 )
{
- int16_t a = fifoin_pop();
+ s16 a = fifoin_pop();
logerror("TGP fsin %d (%x)\n", a, m_pushpc);
fifoout_push_f(tsin(a));
- next_fn();
}
TGP_FUNCTION( model1_state::fcosm_m1 )
{
- int16_t a = fifoin_pop();
+ s16 a = fifoin_pop();
float b = fifoin_pop_f();
logerror("TGP fcosm %d, %f (%x)\n", a, b, m_pushpc);
fifoout_push_f(b*tcos(a));
- next_fn();
}
TGP_FUNCTION( model1_state::fsinm_m1 )
{
- int16_t a = fifoin_pop();
+ s16 a = fifoin_pop();
float b = fifoin_pop_f();
- m_dump = true;
logerror("TGP fsinm %d, %f (%x)\n", a, b, m_pushpc);
fifoout_push_f(b*tsin(a));
- next_fn();
}
TGP_FUNCTION( model1_state::distance3 )
@@ -629,7 +550,6 @@ TGP_FUNCTION( model1_state::distance3 )
b -= e;
c -= f;
fifoout_push_f(sqrtf(a*a+b*b+c*c));
- next_fn();
}
TGP_FUNCTION( model1_state::ftoi )
@@ -637,7 +557,6 @@ TGP_FUNCTION( model1_state::ftoi )
float a = fifoin_pop_f();
logerror("TGP ftoi %f (%x)\n", a, m_pushpc);
fifoout_push((int)a);
- next_fn();
}
TGP_FUNCTION( model1_state::itof )
@@ -645,7 +564,6 @@ TGP_FUNCTION( model1_state::itof )
int32_t a = fifoin_pop();
logerror("TGP itof %d (%x)\n", a, m_pushpc);
fifoout_push_f(a);
- next_fn();
}
TGP_FUNCTION( model1_state::acc_set )
@@ -653,14 +571,12 @@ TGP_FUNCTION( model1_state::acc_set )
float a = fifoin_pop_f();
logerror("TGP acc_set %f (%x)\n", a, m_pushpc);
m_acc = a;
- next_fn();
}
TGP_FUNCTION( model1_state::acc_get )
{
logerror("TGP acc_get (%x)\n", m_pushpc);
fifoout_push_f(m_acc);
- next_fn();
}
TGP_FUNCTION( model1_state::acc_add )
@@ -668,7 +584,6 @@ TGP_FUNCTION( model1_state::acc_add )
float a = fifoin_pop_f();
logerror("TGP acc_add %f (%x)\n", a, m_pushpc);
m_acc += a;
- next_fn();
}
TGP_FUNCTION( model1_state::acc_sub )
@@ -676,7 +591,6 @@ TGP_FUNCTION( model1_state::acc_sub )
float a = fifoin_pop_f();
logerror("TGP acc_sub %f (%x)\n", a, m_pushpc);
m_acc -= a;
- next_fn();
}
TGP_FUNCTION( model1_state::acc_mul )
@@ -684,7 +598,6 @@ TGP_FUNCTION( model1_state::acc_mul )
float a = fifoin_pop_f();
logerror("TGP acc_mul %f (%x)\n", a, m_pushpc);
m_acc *= a;
- next_fn();
}
TGP_FUNCTION( model1_state::acc_div )
@@ -692,7 +605,6 @@ TGP_FUNCTION( model1_state::acc_div )
float a = fifoin_pop_f();
logerror("TGP acc_div %f (%x)\n", a, m_pushpc);
m_acc /= a;
- next_fn();
}
TGP_FUNCTION( model1_state::f42 )
@@ -711,7 +623,6 @@ TGP_FUNCTION( model1_state::f42 )
fifoout_push_f(0);
fifoout_push_f(0);
fifoout_push_f(0);
- next_fn();
}
@@ -730,14 +641,14 @@ TGP_FUNCTION( model1_state::xyz2rqf )
if(a>=0)
fifoout_push(0);
else
- fifoout_push((uint32_t)-32768);
+ fifoout_push((u32)-32768);
} else if(!a) {
if(c>=0)
fifoout_push(16384);
else
- fifoout_push((uint32_t)-16384);
+ fifoout_push((u32)-16384);
} else
- fifoout_push((int16_t)(atan2(c, a)*32768/M_PI));
+ fifoout_push((s16)(atan2(c, a)*32768/M_PI));
if(!b)
fifoout_push(0);
@@ -745,11 +656,9 @@ TGP_FUNCTION( model1_state::xyz2rqf )
if(b>=0)
fifoout_push(16384);
else
- fifoout_push((uint32_t)-16384);
+ fifoout_push((u32)-16384);
} else
- fifoout_push((int16_t)(atan2(b, norm)*32768/M_PI));
-
- next_fn();
+ fifoout_push((s16)(atan2(b, norm)*32768/M_PI));
}
TGP_FUNCTION( model1_state::f43 )
@@ -771,7 +680,6 @@ TGP_FUNCTION( model1_state::f43 )
fifoout_push_f(0);
fifoout_push_f(0);
fifoout_push_f(0);
- next_fn();
}
TGP_FUNCTION( model1_state::f43_swa )
@@ -786,21 +694,19 @@ TGP_FUNCTION( model1_state::f43_swa )
fifoout_push_f(0);
fifoout_push_f(0);
fifoout_push_f(0);
- next_fn();
}
TGP_FUNCTION( model1_state::track_read_tri )
{
- uint32_t a = fifoin_pop();
+ u32 a = fifoin_pop();
int offd;
logerror("TGP track_read_tri %d (%x)\n", a, m_pushpc);
- offd = m_tgp_data[0x20+m_tgp_vr_select] + 16*a;
- fifoout_push(m_tgp_data[offd+12]);
- fifoout_push(m_tgp_data[offd+13]);
- fifoout_push(m_tgp_data[offd+14]);
- next_fn();
+ offd = m_copro_data->as_u32(0x20+m_tgp_vr_select) + 16*a;
+ fifoout_push(m_copro_data->as_u32(offd+12));
+ fifoout_push(m_copro_data->as_u32(offd+13));
+ fifoout_push(m_copro_data->as_u32(offd+14));
}
TGP_FUNCTION( model1_state::matrix_sdir )
@@ -849,8 +755,6 @@ TGP_FUNCTION( model1_state::matrix_sdir )
m[8] = t[6]*m_cmat[2] + t[7]*m_cmat[5] + t[8]*m_cmat[8];
memcpy(m_cmat, m, sizeof(m));
-
- next_fn();
}
TGP_FUNCTION( model1_state::fsqrt )
@@ -858,7 +762,6 @@ TGP_FUNCTION( model1_state::fsqrt )
float a = fifoin_pop_f();
logerror("TGP fsqrt %f (%x)\n", a, m_pushpc);
fifoout_push_f(sqrtf(a));
- next_fn();
}
TGP_FUNCTION( model1_state::vlength )
@@ -872,7 +775,6 @@ TGP_FUNCTION( model1_state::vlength )
y -= m_tgp_vr_base[1];
z -= m_tgp_vr_base[2];
fifoout_push_f(sqrtf(x*x + y*y + z*z) - m_tgp_vr_base[3]);
- next_fn();
}
TGP_FUNCTION( model1_state::f47 )
@@ -883,19 +785,17 @@ TGP_FUNCTION( model1_state::f47 )
logerror("TGP f47 %f, %f, %f (%x)\n", a, b, c, m_pushpc);
fifoout_push_f(a+c);
fifoout_push_f(b+c);
- next_fn();
}
TGP_FUNCTION( model1_state::track_read_info )
{
- uint16_t a = fifoin_pop();
+ u16 a = fifoin_pop();
int offd;
logerror("TGP track_read_info %d (%x)\n", a, m_pushpc);
- offd = m_tgp_data[0x20+m_tgp_vr_select] + 16*a;
- fifoout_push(m_tgp_data[offd+15]);
- next_fn();
+ offd = m_copro_data->as_u32(0x20+m_tgp_vr_select) + 16*a;
+ fifoout_push(m_copro_data->as_u32(offd+15));
}
TGP_FUNCTION( model1_state::colbox_set )
@@ -925,7 +825,6 @@ TGP_FUNCTION( model1_state::colbox_set )
m_tgp_vr_cbox[ 9] = j;
m_tgp_vr_cbox[10] = k;
m_tgp_vr_cbox[11] = l;
- next_fn();
}
TGP_FUNCTION( model1_state::colbox_test )
@@ -941,7 +840,6 @@ TGP_FUNCTION( model1_state::colbox_test )
// #### Wrong, need to check with the tgp_vr_cbox coordinates
// Game only test sign, negative = collision
fifoout_push_f(-1);
- next_fn();
}
TGP_FUNCTION( model1_state::f49_swa )
@@ -959,7 +857,6 @@ TGP_FUNCTION( model1_state::f49_swa )
(void)e;
(void)f;
logerror("TGP f49_swa %f, %f, %f, %f, %f, %f (%x)\n", a, b, c, d, e, f, m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::f50_swa )
@@ -974,13 +871,11 @@ TGP_FUNCTION( model1_state::f50_swa )
(void)d;
logerror("TGP f50_swa %f, %f, %f, %f (%x)\n", a, b, c, d, m_pushpc);
fifoout_push_f(d);
- next_fn();
}
TGP_FUNCTION( model1_state::f52 )
{
logerror("TGP f52 (%x)\n", m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_rdir )
@@ -1014,7 +909,6 @@ TGP_FUNCTION( model1_state::matrix_rdir )
t2 = m_cmat[2];
m_cmat[8] = c*t1-a*t2;
m_cmat[2] = a*t1+c*t2;
- next_fn();
}
// A+(B-A)*t1 + (C-A)*t2 = P
@@ -1035,21 +929,21 @@ static void tri_calc_pq(float ax, float ay, float bx, float by, float cx, float
TGP_FUNCTION( model1_state::track_lookup )
{
float a = fifoin_pop_f();
- uint32_t b = fifoin_pop();
+ u32 b = fifoin_pop();
float c = fifoin_pop_f();
float d = fifoin_pop_f();
int offi, offd, len;
float dist;
int i;
- uint32_t entry;
+ u32 entry;
float height;
logerror("TGP track_lookup %f, 0x%x, %f, %f (%x)\n", a, b, c, d, m_pushpc);
- offi = m_tgp_data[0x10+m_tgp_vr_select] + b;
- offd = m_tgp_data[0x20+m_tgp_vr_select];
+ offi = m_copro_data->as_u32(0x10+m_tgp_vr_select) + b;
+ offd = m_copro_data->as_u32(0x20+m_tgp_vr_select);
- len = m_tgp_data[offi++];
+ len = m_copro_data->as_u32(offi++);
dist = -1;
@@ -1059,9 +953,9 @@ TGP_FUNCTION( model1_state::track_lookup )
for(i=0; i<len; i++) {
int j;
- int bpos = m_tgp_data[offi++];
+ int bpos = m_copro_data->as_u32(offi++);
int posd = offd + bpos*0x10;
- const float *pts = (const float *)&m_tgp_data[posd];
+ const float *pts = (const float *)&m_copro_data->as_u32(posd);
float ax = pts[12];
float ay = pts[14];
float az = pts[13];
@@ -1074,7 +968,7 @@ TGP_FUNCTION( model1_state::track_lookup )
float d = (a-z)*(a-z);
if(dist == -1 || d<dist) {
dist = d;
-// behaviour = m_tgp_data[posd+15];
+// behaviour = m_copro_data->as_u32(posd+15);
height = z;
entry = bpos+i;
}
@@ -1082,11 +976,9 @@ TGP_FUNCTION( model1_state::track_lookup )
}
}
- m_ram_data[0x0000] = 0; // non zero = still computing
- m_ram_data[0x8001] = f2u(height);
- m_ram_data[0x8002] = entry;
-
- next_fn();
+ m_copro_ram_data[0x0000] = 0; // non zero (ffffffff) = still searching
+ m_copro_ram_data[0x0001] = f2u(height);
+ m_copro_ram_data[0x0002] = entry;
}
TGP_FUNCTION( model1_state::f56 )
@@ -1097,7 +989,7 @@ TGP_FUNCTION( model1_state::f56 )
float d = fifoin_pop_f();
float e = fifoin_pop_f();
float f = fifoin_pop_f();
- uint32_t g = fifoin_pop();
+ u32 g = fifoin_pop();
(void)a;
(void)b;
(void)c;
@@ -1108,16 +1000,14 @@ TGP_FUNCTION( model1_state::f56 )
logerror("TGP f56 %f, %f, %f, %f, %f, %f, %d (%x)\n", a, b, c, d, e, f, g, m_pushpc);
fifoout_push(0);
- next_fn();
}
TGP_FUNCTION( model1_state::int_normal )
{
logerror("TGP int_normal (%x)\n", m_pushpc);
- fifoout_push_f(u2f(m_tgp_data[m_tgp_int_adr+12]));
- fifoout_push_f(u2f(m_tgp_data[m_tgp_int_adr+13]));
- fifoout_push_f(u2f(m_tgp_data[m_tgp_int_adr+14]));
- next_fn();
+ fifoout_push_f(u2f(m_copro_data->as_u32(m_tgp_int_adr+12)));
+ fifoout_push_f(u2f(m_copro_data->as_u32(m_tgp_int_adr+13)));
+ fifoout_push_f(u2f(m_copro_data->as_u32(m_tgp_int_adr+14)));
}
TGP_FUNCTION( model1_state::matrix_readt )
@@ -1126,14 +1016,12 @@ TGP_FUNCTION( model1_state::matrix_readt )
fifoout_push_f(m_cmat[9]);
fifoout_push_f(m_cmat[10]);
fifoout_push_f(m_cmat[11]);
- next_fn();
}
TGP_FUNCTION( model1_state::acc_geti )
{
logerror("TGP acc_geti (%x)\n", m_pushpc);
fifoout_push((int)m_acc);
- next_fn();
}
TGP_FUNCTION( model1_state::int_point )
@@ -1142,7 +1030,6 @@ TGP_FUNCTION( model1_state::int_point )
fifoout_push_f(m_tgp_int_px);
fifoout_push_f(m_tgp_int_py);
fifoout_push_f(m_tgp_int_pz);
- next_fn();
}
TGP_FUNCTION( model1_state::col_setcirc )
@@ -1154,7 +1041,6 @@ TGP_FUNCTION( model1_state::col_setcirc )
m_tgp_vr_circx = a;
m_tgp_vr_circy = b;
m_tgp_vr_circrad = c;
- next_fn();
}
TGP_FUNCTION( model1_state::col_testpt )
@@ -1166,7 +1052,6 @@ TGP_FUNCTION( model1_state::col_testpt )
x = a - m_tgp_vr_circx;
y = b - m_tgp_vr_circy;
fifoout_push_f(sqrtf(x*x+y*y) - m_tgp_vr_circrad);
- next_fn();
}
TGP_FUNCTION( model1_state::push_and_ident )
@@ -1180,7 +1065,6 @@ TGP_FUNCTION( model1_state::push_and_ident )
m_cmat[0] = 1.0;
m_cmat[4] = 1.0;
m_cmat[8] = 1.0;
- next_fn();
}
TGP_FUNCTION( model1_state::catmull_rom )
@@ -1214,7 +1098,6 @@ TGP_FUNCTION( model1_state::catmull_rom )
fifoout_push_f(a*w1+d*w2+g*w3+j*w4);
fifoout_push_f(b*w1+e*w2+h*w3+k*w4);
fifoout_push_f(c*w1+f*w2+i*w3+l*w4);
- next_fn();
}
TGP_FUNCTION( model1_state::distance )
@@ -1227,12 +1110,11 @@ TGP_FUNCTION( model1_state::distance )
c -= a;
d -= b;
fifoout_push_f(sqrtf(c*c+d*d));
- next_fn();
}
TGP_FUNCTION( model1_state::car_move )
{
- int16_t a = fifoin_pop();
+ s16 a = fifoin_pop();
float b = fifoin_pop_f();
float c = fifoin_pop_f();
float d = fifoin_pop_f();
@@ -1246,7 +1128,6 @@ TGP_FUNCTION( model1_state::car_move )
fifoout_push_f(dy);
fifoout_push_f(c+dx);
fifoout_push_f(d+dy);
- next_fn();
}
TGP_FUNCTION( model1_state::cpa )
@@ -1290,35 +1171,32 @@ TGP_FUNCTION( model1_state::cpa )
dv2 = dv_x*dv_x + dv_y*dv_y + dv_z*dv_z;
fifoout_push_f(sqrtf(dv2));
- next_fn();
}
TGP_FUNCTION( model1_state::vmat_store )
{
- uint32_t a = fifoin_pop();
+ u32 a = fifoin_pop();
if(a<21)
memcpy(m_mat_vector[a], m_cmat, sizeof(m_cmat));
else
logerror("TGP ERROR bad vector index\n");
logerror("TGP vmat_store %d (%x)\n", a, m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::vmat_restore )
{
- uint32_t a = fifoin_pop();
+ u32 a = fifoin_pop();
if(a<21)
memcpy(m_cmat, m_mat_vector[a], sizeof(m_cmat));
else
logerror("TGP ERROR bad vector index\n");
logerror("TGP vmat_restore %d (%x)\n", a, m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::vmat_mul )
{
- uint32_t a = fifoin_pop();
- uint32_t b = fifoin_pop();
+ u32 a = fifoin_pop();
+ u32 b = fifoin_pop();
if(a<21 && b<21) {
m_mat_vector[b][0] = m_mat_vector[a][ 0]*m_cmat[0] + m_mat_vector[a][ 1]*m_cmat[3] + m_mat_vector[a][ 2]*m_cmat[6];
m_mat_vector[b][1] = m_mat_vector[a][ 0]*m_cmat[1] + m_mat_vector[a][ 1]*m_cmat[4] + m_mat_vector[a][ 2]*m_cmat[7];
@@ -1335,12 +1213,11 @@ TGP_FUNCTION( model1_state::vmat_mul )
} else
logerror("TGP ERROR bad vector index\n");
logerror("TGP vmat_mul %d, %d (%x)\n", a, b, m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::vmat_read )
{
- uint32_t a = fifoin_pop();
+ u32 a = fifoin_pop();
logerror("TGP vmat_read %d (%x)\n", a, m_pushpc);
if(a<21) {
int i;
@@ -1352,7 +1229,6 @@ TGP_FUNCTION( model1_state::vmat_read )
for(i=0; i<12; i++)
fifoout_push_f(0);
}
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_rtrans )
@@ -1361,7 +1237,6 @@ TGP_FUNCTION( model1_state::matrix_rtrans )
fifoout_push_f(m_cmat[ 9]);
fifoout_push_f(m_cmat[10]);
fifoout_push_f(m_cmat[11]);
- next_fn();
}
TGP_FUNCTION( model1_state::matrix_unrot )
@@ -1371,41 +1246,36 @@ TGP_FUNCTION( model1_state::matrix_unrot )
m_cmat[0] = 1.0;
m_cmat[4] = 1.0;
m_cmat[8] = 1.0;
- next_fn();
}
TGP_FUNCTION( model1_state::f80 )
{
logerror("TGP f80 (%x)\n", m_pushpc);
// m_cmat[9] = m_cmat[10] = m_cmat[11] = 0;
- next_fn();
}
TGP_FUNCTION( model1_state::vmat_save )
{
- uint32_t a = fifoin_pop();
+ u32 a = fifoin_pop();
int i;
logerror("TGP vmat_save 0x%x (%x)\n", a, m_pushpc);
for(i=0; i<16; i++)
- memcpy(m_ram_data.get()+a+0x10*i, m_mat_vector[i], sizeof(m_cmat));
- next_fn();
+ memcpy(m_copro_ram_data.get()+a+0x10*i, m_mat_vector[i], sizeof(m_cmat));
}
TGP_FUNCTION( model1_state::vmat_load )
{
- uint32_t a = fifoin_pop();
+ u32 a = fifoin_pop();
int i;
logerror("TGP vmat_load 0x%x (%x)\n", a, m_pushpc);
for(i=0; i<16; i++)
- memcpy(m_mat_vector[i], m_ram_data.get()+a+0x10*i, sizeof(m_cmat));
- next_fn();
+ memcpy(m_mat_vector[i], m_copro_ram_data.get()+a+0x10*i, sizeof(m_cmat));
}
TGP_FUNCTION( model1_state::ram_setadr )
{
- m_ram_scanadr = fifoin_pop() - 0x8000;
- logerror("TGP f0 ram_setadr 0x%x (%x)\n", m_ram_scanadr+0x8000, m_pushpc);
- next_fn();
+ m_copro_hle_ram_scan_adr = fifoin_pop() - 0x8000;
+ logerror("TGP f0 ram_setadr 0x%x (%x)\n", m_copro_hle_ram_scan_adr+0x8000, m_pushpc);
}
TGP_FUNCTION( model1_state::groundbox_test )
@@ -1428,21 +1298,19 @@ TGP_FUNCTION( model1_state::groundbox_test )
fifoout_push(out_x);
fifoout_push(out_y);
fifoout_push(out_z);
- next_fn();
}
TGP_FUNCTION( model1_state::f89 )
{
- uint32_t a = fifoin_pop();
- uint32_t b = fifoin_pop();
- uint32_t c = fifoin_pop();
- uint32_t d = fifoin_pop();
+ u32 a = fifoin_pop();
+ u32 b = fifoin_pop();
+ u32 c = fifoin_pop();
+ u32 d = fifoin_pop();
(void)a;
(void)b;
(void)c;
logerror("TGP list set base 0x%x, 0x%x, %d, length=%d (%x)\n", a, b, c, d, m_pushpc);
- m_list_length = d;
- next_fn();
+ m_copro_hle_list_length = d;
}
TGP_FUNCTION( model1_state::f92 )
@@ -1456,7 +1324,6 @@ TGP_FUNCTION( model1_state::f92 )
(void)c;
(void)d;
logerror("TGP f92 %f, %f, %f, %f (%x)\n", a, b, c, d, m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::f93 )
@@ -1464,15 +1331,13 @@ TGP_FUNCTION( model1_state::f93 )
float a = fifoin_pop_f();
(void)a;
logerror("TGP f93 %f (%x)\n", a, m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::f94 )
{
- uint32_t a = fifoin_pop();
+ u32 a = fifoin_pop();
(void)a;
logerror("TGP f94 %d (%x)\n", a, m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::vmat_flatten )
@@ -1498,15 +1363,13 @@ TGP_FUNCTION( model1_state::vmat_flatten )
m_mat_vector[i][10] = m[ 9]*m_cmat[1] + m[10]*m_cmat[4] + m[11]*m_cmat[7] + m_cmat[10];
m_mat_vector[i][11] = m[ 9]*m_cmat[2] + m[10]*m_cmat[5] + m[11]*m_cmat[8] + m_cmat[11];
}
- next_fn();
}
TGP_FUNCTION( model1_state::vmat_load1 )
{
- uint32_t a = fifoin_pop();
+ u32 a = fifoin_pop();
logerror("TGP vmat_load1 0x%x (%x)\n", a, m_pushpc);
- memcpy(m_cmat, m_ram_data.get()+a, sizeof(m_cmat));
- next_fn();
+ memcpy(m_cmat, m_copro_ram_data.get()+a, sizeof(m_cmat));
}
TGP_FUNCTION( model1_state::ram_trans )
@@ -1518,42 +1381,28 @@ TGP_FUNCTION( model1_state::ram_trans )
m_cmat[ 9] += m_cmat[0]*a+m_cmat[3]*b+m_cmat[6]*c;
m_cmat[10] += m_cmat[1]*a+m_cmat[4]*b+m_cmat[7]*c;
m_cmat[11] += m_cmat[2]*a+m_cmat[5]*b+m_cmat[8]*c;
- next_fn();
-}
-
-TGP_FUNCTION( model1_state::f98_load )
-{
- int i;
- for(i=0; i<m_list_length; i++) {
- float f = fifoin_pop_f();
- (void)f;
- logerror("TGP load list (%2d/%2d) %f (%x)\n", i, m_list_length, f, m_pushpc);
- }
- next_fn();
}
TGP_FUNCTION( model1_state::f98 )
{
- uint32_t a = fifoin_pop();
+ u32 a = fifoin_pop();
(void)a;
logerror("TGP load list start %d (%x)\n", a, m_pushpc);
- m_fifoin_cbcount = m_list_length;
- m_fifoin_cb = &model1_state::f98_load;
+ m_copro_hle_active_list_length = m_copro_hle_list_length;
+ m_copro_hle_active_list_pos = 0;
}
TGP_FUNCTION( model1_state::f99 )
{
logerror("TGP f99 (%x)\n", m_pushpc);
- next_fn();
}
TGP_FUNCTION( model1_state::f100 )
{
int i;
logerror("TGP f100 get list (%x)\n", m_pushpc);
- for(i=0; i<m_list_length; i++)
+ for(i=0; i<m_copro_hle_list_length; i++)
fifoout_push_f((machine().rand() % 1000)/100.0);
- next_fn();
}
TGP_FUNCTION( model1_state::groundbox_set )
@@ -1573,8 +1422,6 @@ TGP_FUNCTION( model1_state::groundbox_set )
m_tgp_vf_ygnd = b;
m_tgp_vf_yflr = a;
m_tgp_vf_yjmp = c;
-
- next_fn();
}
TGP_FUNCTION( model1_state::f102 )
@@ -1585,17 +1432,17 @@ TGP_FUNCTION( model1_state::f102 )
float c = fifoin_pop_f();
float d = fifoin_pop_f();
float e = fifoin_pop_f();
- uint32_t f = fifoin_pop();
- uint32_t g = fifoin_pop();
- uint32_t h = fifoin_pop();
+ u32 f = fifoin_pop();
+ u32 g = fifoin_pop();
+ u32 h = fifoin_pop();
m_ccount++;
logerror("TGP f0 mve_calc %f, %f, %f, %f, %f, %d, %d, %d (%d) (%x)\n", a, b, c, d, e, f, g, h, m_ccount, m_pushpc);
- px = u2f(m_ram_data[m_ram_scanadr+0x16]);
- py = u2f(m_ram_data[m_ram_scanadr+0x17]);
- pz = u2f(m_ram_data[m_ram_scanadr+0x18]);
+ px = u2f(m_copro_ram_data[m_copro_hle_ram_scan_adr+0x16]);
+ py = u2f(m_copro_ram_data[m_copro_hle_ram_scan_adr+0x17]);
+ pz = u2f(m_copro_ram_data[m_copro_hle_ram_scan_adr+0x18]);
// memset(m_cmat, 0, sizeof(m_cmat));
// m_cmat[0] = 1.0;
@@ -1624,97 +1471,93 @@ TGP_FUNCTION( model1_state::f102 )
fifoout_push(f);
fifoout_push(g);
fifoout_push(h);
-
-
- next_fn();
}
TGP_FUNCTION( model1_state::f103 )
{
- m_ram_scanadr = fifoin_pop() - 0x8000;
- logerror("TGP f0 mve_setadr 0x%x (%x)\n", m_ram_scanadr, m_pushpc);
+ m_copro_hle_ram_scan_adr = fifoin_pop() - 0x8000;
+ logerror("TGP f0 mve_setadr 0x%x (%x)\n", m_copro_hle_ram_scan_adr, m_pushpc);
ram_get_i();
- next_fn();
}
-// Addresses in daytona's TGP program
+// Addresses in daytona's and VR's TGP programs
const struct model1_state::function model1_state::ftab_vf[] = {
- { &model1_state::fadd, 2 }, /* 0x00 */ // 0b5
- { &model1_state::fsub, 2 }, // 0ba
- { &model1_state::fmul, 2 }, // 0bf
- { &model1_state::fdiv, 2 }, // 0c4
- { nullptr, 0 }, // 0d2
- { &model1_state::matrix_push, 0 }, // 0e3
- { &model1_state::matrix_pop, 0 }, // 0f7
- { &model1_state::matrix_write, 12 }, // 106
- { &model1_state::clear_stack, 0 }, // 10a
- { &model1_state::matrix_mul, 12 }, // 10e
- { &model1_state::anglev, 2 }, // 154
- { nullptr, 0 }, // 15d
- { nullptr, 0 }, // 19f
- { &model1_state::track_select, 1 }, // 1b8
- { &model1_state::load_base, 4 }, // 1bb
- { &model1_state::anglep, 4 }, // 1c1
-
- { &model1_state::matrix_ident, 0 }, /* 0x10 */ // 1d2
- { &model1_state::matrix_read, 0 }, // 1d9
- { &model1_state::matrix_trans, 3 }, // 1dd
- { &model1_state::matrix_scale, 3 }, // 1f3
- { &model1_state::matrix_rotx, 1 }, // 20a
- { &model1_state::matrix_roty, 1 }, // 223
- { &model1_state::matrix_rotz, 1 }, // 23b
- { nullptr, 0 }, // 253
- { &model1_state::track_read_quad, 1 }, // 2aa
- { nullptr, 0 }, // 2b0
- { &model1_state::transform_point, 3 }, // 2b2
- { &model1_state::fsin_m1, 1 }, // 2cb
- { &model1_state::fcos_m1, 1 }, // 2ce
- { &model1_state::fsinm_m1, 2 }, // 2d1
- { &model1_state::fcosm_m1, 2 }, // 2d7
- { &model1_state::distance3, 6 }, // 2dd
-
- { nullptr, 0 }, /* 0x20 */ // 2ff
- { nullptr, 0 }, // 2ff
- { nullptr, 0 }, // 300
- { nullptr, 0 }, // 304
- { &model1_state::acc_set, 1 }, // 308
- { &model1_state::acc_get, 0 }, // 30a
- { &model1_state::acc_add, 1 }, // 30c
- { &model1_state::acc_sub, 1 }, // 311
- { &model1_state::acc_mul, 1 }, // 316
- { &model1_state::acc_div, 1 }, // 31b
- { &model1_state::f42, 3 }, // 329
- { &model1_state::f43, 6 }, // 36c
- { &model1_state::track_read_tri, 1 }, // 3c2
- { &model1_state::fsqrt, 1 }, // 3c7
- { &model1_state::vlength, 3 }, // 3cf
- { nullptr, 0 }, // 3ef
-
- { &model1_state::track_read_info, 1 }, /* 0x30 */ // 410
- { &model1_state::colbox_set, 12 }, // 413
- { &model1_state::colbox_test, 3 }, // 417
- { nullptr, 0 }, // 43b
- { nullptr, 0 }, // 44d
- { nullptr, 0 }, // 452
- { &model1_state::track_lookup, 4 }, // 457
- { nullptr, 0 }, // 51a
- { nullptr, 0 }, // 521
- { nullptr, 0 }, // 52f
- { nullptr, 0 }, // 53d
- { nullptr, 0 }, // 545
- { nullptr, 0 }, // 558
- { nullptr, 0 }, // 559
- { nullptr, 0 }, // 5c6
- { nullptr, 0 }, // 5e9
-
- { &model1_state::col_setcirc, 3 }, /* 0x40 */ // 5f3
- { &model1_state::col_testpt, 2 }, // 5fa
- { nullptr, 0 }, // 615
- { &model1_state::distance, 4 }, // 631
- { nullptr, 0 }, // 63f
- { nullptr, 0 }, // 643
- { nullptr, 0 }, // 64b
- { &model1_state::car_move, 4 }, // 661
+ { &model1_state::fadd, 2 }, /* 0x00 */ // 0b5 09b
+ { &model1_state::fsub, 2 }, // 0ba 0a0
+ { &model1_state::fmul, 2 }, // 0bf 0a5
+ { &model1_state::fdiv, 2 }, // 0c4 0aa
+ { nullptr, 0 }, // 0d2 0b9
+ { &model1_state::matrix_push, 0 }, // 0e3 0cc
+ { &model1_state::matrix_pop, 0 }, // 0f7 0e0
+ { &model1_state::matrix_write, 12 }, // 106 0ef
+ { &model1_state::clear_stack, 0 }, // 10a 0f4
+ { &model1_state::matrix_mul, 12 }, // 10e 0f8
+ { &model1_state::anglev, 2 }, // 154 13f
+ { nullptr, 0 }, // 15d 149
+ { nullptr, 0 }, // 19f 18a
+ { &model1_state::track_select, 1 }, // 1b8 1a5
+ { &model1_state::load_base, 4 }, // 1bb 1a8
+ { &model1_state::anglep, 4 }, // 1c1 1ae
+
+ { &model1_state::matrix_ident, 0 }, /* 0x10 */ // 1d2 1c1
+ { &model1_state::matrix_read, 0 }, // 1d9 1c8
+ { &model1_state::matrix_trans, 3 }, // 1dd 1d1
+ { &model1_state::matrix_scale, 3 }, // 1f3 1e8
+ { &model1_state::matrix_rotx, 1 }, // 20a 200
+ { &model1_state::matrix_roty, 1 }, // 223 21a
+ { &model1_state::matrix_rotz, 1 }, // 23b 233
+ { nullptr, 0 }, // 253 24c
+ { &model1_state::track_read_quad, 1 }, // 2aa 2a8
+ { nullptr, 0 }, // 2b0 2b0
+ { &model1_state::transform_point, 3 }, // 2b2 2b4
+ { &model1_state::fsin_m1, 1 }, // 2cb 2d7
+ { &model1_state::fcos_m1, 1 }, // 2ce 2df
+ { &model1_state::fsinm_m1, 2 }, // 2d1 2e7
+ { &model1_state::fcosm_m1, 2 }, // 2d7 2f1
+ { &model1_state::distance3, 6 }, // 2dd 2fb
+
+ { nullptr, 0 }, /* 0x20 */ // 2ff 31e
+ { nullptr, 0 }, // 2ff 31e
+ { nullptr, 0 }, // 300 31f
+ { nullptr, 0 }, // 304 323
+ { &model1_state::acc_set, 1 }, // 308 327
+ { &model1_state::acc_get, 0 }, // 30a 32a
+ { &model1_state::acc_add, 1 }, // 30c 32e
+ { &model1_state::acc_sub, 1 }, // 311 333
+ { &model1_state::acc_mul, 1 }, // 316 338
+ { &model1_state::acc_div, 1 }, // 31b 33d
+ { &model1_state::f42, 3 }, // 329 34b
+ { &model1_state::f43, 6 }, // 36c 38f
+ { &model1_state::track_read_tri, 1 }, // 3c2 3e2
+ { &model1_state::fsqrt, 1 }, // 3c7 3e9
+ { &model1_state::vlength, 3 }, // 3cf 3f2
+ { nullptr, 0 }, // 3ef 411
+
+ { &model1_state::track_read_info, 1 }, /* 0x30 */ // 410 431
+ { &model1_state::colbox_set, 12 }, // 413 436
+ { &model1_state::colbox_test, 3 }, // 417 43b
+ { nullptr, 0 }, // 43b 463
+ { nullptr, 0 }, // 44d 478
+ { nullptr, 0 }, // 452 47d
+ { &model1_state::track_lookup, 4 }, // 457 482
+ { nullptr, 0 }, // 51a 522
+ { nullptr, 0 }, // 521 527
+ { nullptr, 0 }, // 52f 535
+ { nullptr, 0 }, // 53d 543
+ { nullptr, 0 }, // 545 54c
+ { nullptr, 0 }, // 558 55e
+ { nullptr, 0 }, // 559 55f
+ { nullptr, 0 }, // 5c6 5cd
+ { nullptr, 0 }, // 5e9 5f4
+
+ { &model1_state::col_setcirc, 3 }, /* 0x40 */ // 5f3 5fe
+ { &model1_state::col_testpt, 2 }, // 5fa 603
+ { nullptr, 0 }, // 615 61e
+ { &model1_state::distance, 4 }, // 631 639
+ { nullptr, 0 }, // 63f 648
+ { nullptr, 0 }, // 643 64e
+ { nullptr, 0 }, // 64b 657
+ { &model1_state::car_move, 4 }, // 661 66e
{ &model1_state::cpa, 12 }, // 7d9
{ nullptr, 0 },
{ &model1_state::vmat_store, 1 },
@@ -1829,346 +1672,349 @@ const struct model1_state::function model1_state::ftab_swa[] = {
{ &model1_state::catmull_rom, 13 }
};
-
-TGP_FUNCTION( model1_state::dump )
+void model1_state::copro_hle_vf()
{
- logerror("TGP FIFOIN write %08x (%x)\n", fifoin_pop(), m_pushpc);
- m_fifoin_cbcount = 1;
- m_fifoin_cb = &model1_state::dump;
-}
+ if(m_copro_hle_active_list_length) {
+ while(m_copro_hle_active_list_pos < m_copro_hle_active_list_length && !m_copro_fifo_in->is_empty()) {
+ u32 v = m_copro_fifo_in->pop();
+ m_copro_hle_active_list_pos++;
+ logerror("TGP load list %d/%d: %08x\n", m_copro_hle_active_list_pos, m_copro_hle_active_list_length, v);
+ }
+ if(m_copro_hle_active_list_pos == m_copro_hle_active_list_length)
+ m_copro_hle_active_list_pos = m_copro_hle_active_list_length = 0;
+ if(m_copro_fifo_in->is_empty())
+ return;
+ }
-TGP_FUNCTION( model1_state::function_get_vf )
-{
- uint32_t f = fifoin_pop() >> 23;
+ next:
+ u32 f = m_copro_fifo_in->peek(0) >> 23; // Extracts the exponent of the ieee float
- if(m_fifoout_rpos != m_fifoout_wpos) {
- int count = m_fifoout_wpos - m_fifoout_rpos;
- if(count < 0)
- count += FIFO_SIZE;
- logerror("TGP function called with sizeout = %d\n", count);
- }
- if(ARRAY_LENGTH(ftab_vf) > f && nullptr != ftab_vf[f].cb) {
- m_fifoin_cbcount = ftab_vf[f].count;
- m_fifoin_cb = model1_state::ftab_vf[f].cb;
- // logerror("TGP function %d request, %d parameters\n", f, m_fifoin_cbcount);
- if(!m_fifoin_cbcount)
- (this->*m_fifoin_cb)();
- } else {
- logerror("TGP function %d unimplemented (%x)\n", f, m_pushpc);
- m_fifoin_cbcount = 1;
- m_fifoin_cb = &model1_state::dump;
- }
-}
+ // logerror("function %02x size %d/%d\n", f, int(m_copro_fifo_in->size() - 1), ftab_vf[f].count);
-TGP_FUNCTION( model1_state::function_get_swa )
-{
- uint32_t f = fifoin_pop();
+ if(f < ARRAY_LENGTH(ftab_vf) && ftab_vf[f].cb != nullptr) {
+ unsigned np = ftab_vf[f].count;
+ if(m_copro_fifo_in->size() >= np+1) {
+ m_copro_fifo_in->pop();
+ (this->*ftab_vf[f].cb)();
+ if(!m_copro_fifo_in->is_empty())
+ goto next;
+ }
- if(m_fifoout_rpos != m_fifoout_wpos) {
- int count = m_fifoout_wpos - m_fifoout_rpos;
- if(count < 0)
- count += FIFO_SIZE;
- logerror("TGP function called with sizeout = %d\n", count);
- }
- if(ARRAY_LENGTH(ftab_swa) > f && nullptr != ftab_swa[f].cb) {
- m_fifoin_cbcount = ftab_swa[f].count;
- m_fifoin_cb = model1_state::ftab_swa[f].cb;
- // logerror("TGP function %d request, %d parameters\n", f, m_fifoin_cbcount);
- if(!m_fifoin_cbcount)
- (this->*m_fifoin_cb)();
} else {
logerror("TGP function %d unimplemented (%x)\n", f, m_pushpc);
- m_fifoin_cbcount = 1;
- m_fifoin_cb = &model1_state::dump;
+ m_copro_fifo_in->pop();
}
}
-READ16_MEMBER(model1_state::model1_tgp_copro_r)
-{
- if(!offset) {
- m_copro_r = fifoout_pop();
- return m_copro_r;
- } else
- return m_copro_r >> 16;
-}
-
-WRITE16_MEMBER(model1_state::model1_tgp_copro_w)
-{
- if(offset) {
- m_copro_w = (m_copro_w & 0x0000ffff) | (data << 16);
- m_pushpc = m_maincpu->pc();
- fifoin_push(m_copro_w);
- } else
- m_copro_w = (m_copro_w & 0xffff0000) | data;
-}
-
-READ16_MEMBER(model1_state::model1_tgp_copro_adr_r)
-{
- return m_ram_adr;
-}
-
-WRITE16_MEMBER(model1_state::model1_tgp_copro_adr_w)
+void model1_state::copro_hle_swa()
{
- COMBINE_DATA(&m_ram_adr);
-}
+ u32 f = m_copro_fifo_in->peek(0);
-READ16_MEMBER(model1_state::model1_tgp_copro_ram_r)
-{
- if(!offset) {
- logerror("TGP f0 ram read %04x, %08x (%f) (%x)\n", m_ram_adr, m_ram_data[m_ram_adr], u2f(m_ram_data[m_ram_adr]), m_maincpu->pc());
- return m_ram_data[m_ram_adr];
- } else
- return m_ram_data[m_ram_adr++] >> 16;
-}
+ if(f < ARRAY_LENGTH(ftab_swa) && ftab_swa[f].cb != nullptr) {
+ unsigned np = ftab_swa[f].count;
+ if(m_copro_fifo_in->size() >= np+1) {
+ m_copro_fifo_in->pop();
+ (this->*ftab_swa[f].cb)();
+ }
-WRITE16_MEMBER(model1_state::model1_tgp_copro_ram_w)
-{
- COMBINE_DATA(m_ram_latch+offset);
- if(offset) {
- uint32_t v = m_ram_latch[0]|(m_ram_latch[1]<<16);
- logerror("TGP f0 ram write %04x, %08x (%f) (%x)\n", m_ram_adr, v, u2f(v), m_maincpu->pc());
- m_ram_data[m_ram_adr] = v;
- m_ram_adr++;
+ } else {
+ logerror("TGP function %d unimplemented (%x)\n", f, m_pushpc);
+ m_copro_fifo_in->pop();
}
}
MACHINE_START_MEMBER(model1_state,model1)
{
m_digits.resolve();
- m_ram_data = std::make_unique<uint32_t[]>(0x10000);
+ m_copro_ram_data = std::make_unique<u32[]>(0x8000);
m_io_command = 0;
- save_pointer(NAME(m_ram_data.get()), 0x10000);
- save_item(NAME(m_ram_adr));
- save_item(NAME(m_ram_scanadr));
- save_item(NAME(m_ram_latch));
- save_item(NAME(m_fifoout_rpos));
- save_item(NAME(m_fifoout_wpos));
- save_item(NAME(m_fifoout_data));
- save_item(NAME(m_fifoin_rpos));
- save_item(NAME(m_fifoin_wpos));
- save_item(NAME(m_fifoin_data));
+ save_pointer(NAME(m_copro_ram_data.get()), 0x8000);
+ save_item(NAME(m_v60_copro_ram_adr));
+ save_item(NAME(m_copro_hle_ram_scan_adr));
+ save_item(NAME(m_v60_copro_ram_latch));
save_item(NAME(m_cmat));
save_item(NAME(m_mat_stack));
save_item(NAME(m_mat_vector));
save_item(NAME(m_mat_stack_pos));
save_item(NAME(m_acc));
- save_item(NAME(m_list_length));
+ save_item(NAME(m_copro_hle_list_length));
+ save_item(NAME(m_copro_hle_active_list_length));
+ save_item(NAME(m_copro_hle_active_list_pos));
save_item(NAME(m_io_command));
-}
-
-void model1_state::tgp_reset(bool swa)
-{
- m_ram_adr = 0;
- memset(m_ram_data.get(), 0, 0x10000*4);
- m_fifoout_rpos = 0;
- m_fifoout_wpos = 0;
- m_fifoin_rpos = 0;
- m_fifoin_wpos = 0;
+ if(m_tgp_copro) {
+ m_copro_fifo_in->setup(16,
+ [this]() { m_tgp_copro->stall(); },
+ [this]() { m_tgp_copro->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_tgp_copro->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); });
+ m_copro_fifo_out->setup(16,
+ [this]() { m_maincpu->stall(); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); },
+ [this]() { m_tgp_copro->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_tgp_copro->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); });
- m_acc = 0;
- m_mat_stack_pos = 0;
- memset(m_cmat, 0, sizeof(m_cmat));
- m_cmat[0] = 1.0;
- m_cmat[4] = 1.0;
- m_cmat[8] = 1.0;
-
- m_dump = false;
- m_swa = swa;
- next_fn();
+ } else {
+ bool is_swa =
+ !strcmp(machine().system().name, "swa") ||
+ !strcmp(machine().system().name, "wingwar") ||
+ !strcmp(machine().system().name, "wingwaru") ||
+ !strcmp(machine().system().name, "wingwarj") ||
+ !strcmp(machine().system().name, "wingwar360") ||
+ !strcmp(machine().system().name, "netmerc");
+
+ std::function<void ()> push_cb;
+ if(is_swa)
+ push_cb = [this]() { copro_hle_swa(); };
+ else
+ push_cb = [this]() { copro_hle_vf(); };
+
+ m_copro_fifo_in->setup(16,
+ [](){},
+ [](){},
+ [](){},
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); },
+ push_cb);
+ m_copro_fifo_out->setup(16,
+ [this]() { m_maincpu->stall(); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); },
+ [this]() { m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); },
+ [](){},
+ [](){});
+ }
}
-/*********************************** Virtua Racing ***********************************/
-
+void model1_state::copro_reset()
+{
+ m_v60_copro_ram_adr = 0;
+ m_copro_ram_adr = 0;
+ m_copro_sincos_base = 0;
+ m_copro_inv_base = 0;
+ m_copro_isqrt_base = 0;
+ std::fill(std::begin(m_copro_atan_base), std::end(m_copro_atan_base), 0);
+ std::fill(std::begin(m_v60_copro_ram_latch), std::end(m_v60_copro_ram_latch), 0);
+ memset(m_copro_ram_data.get(), 0, 0x8000*4);
+
+ if(!m_tgp_copro) {
+ m_acc = 0;
+ m_mat_stack_pos = 0;
+ m_copro_hle_active_list_length = 0;
+ m_copro_hle_active_list_pos = 0;
+ m_copro_hle_list_length = 0;
+
+ memset(m_cmat, 0, sizeof(m_cmat));
+ m_cmat[0] = 1.0;
+ m_cmat[4] = 1.0;
+ m_cmat[8] = 1.0;
+ }
+}
-void model1_state::vr_tgp_reset()
+READ16_MEMBER(model1_state::v60_copro_ram_adr_r)
{
- m_ram_adr = 0;
- memset(m_ram_data.get(), 0, 0x8000*4);
-
- m_copro_fifoout_rpos = 0;
- m_copro_fifoout_wpos = 0;
- m_copro_fifoout_num = 0;
- m_copro_fifoin_rpos = 0;
- m_copro_fifoin_wpos = 0;
- m_copro_fifoin_num = 0;
+ return m_v60_copro_ram_adr;
}
-/* FIFO */
-READ_LINE_MEMBER(model1_state::copro_fifoin_pop_ok)
+WRITE16_MEMBER(model1_state::v60_copro_ram_adr_w)
{
- if (m_copro_fifoin_num == 0)
- {
- return CLEAR_LINE;
- }
-
- return ASSERT_LINE;
+ COMBINE_DATA(&m_v60_copro_ram_adr);
}
-READ32_MEMBER(model1_state::copro_fifoin_pop)
+READ16_MEMBER(model1_state::v60_copro_ram_r)
{
- uint32_t r = m_copro_fifoin_data[m_copro_fifoin_rpos++];
+ u16 r;
- if (m_copro_fifoin_rpos == FIFO_SIZE)
- {
- m_copro_fifoin_rpos = 0;
- }
+ if (!offset)
+ r = m_copro_ram_data[m_v60_copro_ram_adr & 0x7fff];
+
+ else {
+ r = m_copro_ram_data[m_v60_copro_ram_adr & 0x7fff] >> 16;
- m_copro_fifoin_num--;
+ if(m_v60_copro_ram_adr & 0x8000)
+ m_v60_copro_ram_adr ++;
+ }
return r;
}
-
-void model1_state::copro_fifoin_push(uint32_t data)
+WRITE16_MEMBER(model1_state::v60_copro_ram_w)
{
- if (m_copro_fifoin_num == FIFO_SIZE)
- {
- fatalerror("Copro FIFOIN overflow (at %08X)\n", safe_pc());
- }
+ COMBINE_DATA(m_v60_copro_ram_latch + offset);
- m_copro_fifoin_data[m_copro_fifoin_wpos++] = data;
-
- if (m_copro_fifoin_wpos == FIFO_SIZE)
- {
- m_copro_fifoin_wpos = 0;
+ if (offset) {
+ u32 v = m_v60_copro_ram_latch[0] | (m_v60_copro_ram_latch[1] << 16);
+ m_copro_ram_data[m_v60_copro_ram_adr & 0x7fff] = v;
+ if(m_v60_copro_ram_adr & 0x8000)
+ m_v60_copro_ram_adr++;
}
-
- m_copro_fifoin_num++;
}
-uint32_t model1_state::copro_fifoout_pop()
+READ16_MEMBER(model1_state::v60_copro_fifo_r)
{
- if (m_copro_fifoout_num == 0)
- {
- // Reading from empty FIFO causes the v60 to enter wait state
- m_maincpu->stall();
-
- machine().scheduler().synchronize();
+ if (!offset) {
+ m_v60_copro_fifo_r = m_copro_fifo_out->pop();
+ return m_v60_copro_fifo_r;
- return 0;
- }
-
- uint32_t r = m_copro_fifoout_data[m_copro_fifoout_rpos++];
-
- if (m_copro_fifoout_rpos == FIFO_SIZE)
- {
- m_copro_fifoout_rpos = 0;
- }
+ } else
+ return m_v60_copro_fifo_r >> 16;
+}
- m_copro_fifoout_num--;
+WRITE16_MEMBER(model1_state::v60_copro_fifo_w)
+{
+ if(offset) {
+ m_v60_copro_fifo_w = (m_v60_copro_fifo_w & 0x0000ffff) | (data << 16);
+ m_pushpc = m_maincpu->pc();
+ m_copro_fifo_in->push(u32(m_v60_copro_fifo_w));
- return r;
+ } else
+ m_v60_copro_fifo_w = (m_v60_copro_fifo_w & 0xffff0000) | data;
}
-WRITE32_MEMBER(model1_state::copro_fifoout_push)
+/* Coprocessor TGP memory map */
+void model1_state::copro_prog_map(address_map &map)
{
- if (m_copro_fifoout_num == FIFO_SIZE)
- {
- fatalerror("Copro FIFOOUT overflow (at %08X)\n", m_tgp->pc());
- }
+ map(0x000, 0x7ff).rom();
+}
- m_copro_fifoout_data[m_copro_fifoout_wpos++] = data;
+void model1_state::copro_data_map(address_map &map)
+{
+ map(0x0000, 0x00ff).ram();
+ map(0x0100, 0x0100).r(m_copro_fifo_in, FUNC(generic_fifo_u32_device::read));
- if (m_copro_fifoout_wpos == FIFO_SIZE)
- {
- m_copro_fifoout_wpos = 0;
- }
+ map(0x0200, 0x03ff).ram();
+ map(0x0400, 0x0400).w(m_copro_fifo_out, FUNC(generic_fifo_u32_device::write));
+}
- m_copro_fifoout_num++;
+void model1_state::copro_io_map(address_map &map)
+{
+ map(0x0008, 0x0008).rw(this, FUNC(model1_state::copro_ramadr_r), FUNC(model1_state::copro_ramadr_w));
+ map(0x0009, 0x0009).rw(this, FUNC(model1_state::copro_ramdata_r), FUNC(model1_state::copro_ramdata_w));
+ map(0x0020, 0x0023).rw(this, FUNC(model1_state::copro_sincos_r), FUNC(model1_state::copro_sincos_w));
+ map(0x0024, 0x0027).rw(this, FUNC(model1_state::copro_atan_r), FUNC(model1_state::copro_atan_w));
+ map(0x0028, 0x0029).rw(this, FUNC(model1_state::copro_inv_r), FUNC(model1_state::copro_inv_w));
+ map(0x002a, 0x002b).rw(this, FUNC(model1_state::copro_isqrt_r), FUNC(model1_state::copro_isqrt_w));
+ map(0x002e, 0x002e).w(this, FUNC(model1_state::copro_data_w));
+ map(0x8000, 0xffff).r(this, FUNC(model1_state::copro_data_r));
}
-READ32_MEMBER(model1_state::copro_ram_r)
+void model1_state::copro_rf_map(address_map &map)
{
- return m_ram_data[offset & 0x7fff];
+ map(0x0, 0x0).nopw(); // leds? busy flag?
}
-WRITE32_MEMBER(model1_state::copro_ram_w)
+WRITE32_MEMBER(model1_state::copro_ramadr_w)
{
- m_ram_data[offset&0x7fff] = data;
+ COMBINE_DATA(&m_copro_ram_adr);
}
-READ16_MEMBER(model1_state::model1_tgp_vr_adr_r)
+READ32_MEMBER(model1_state::copro_ramadr_r)
{
- if ( m_ram_adr == 0 && m_copro_fifoin_num != 0 )
- {
- /* spin the main cpu and let the TGP catch up */
- m_maincpu->spin_until_time(attotime::from_usec(100));
- }
+ return m_copro_ram_adr;
+}
- return m_ram_adr;
+WRITE32_MEMBER(model1_state::copro_ramdata_w)
+{
+ COMBINE_DATA(&m_copro_ram_data[m_copro_ram_adr & 0x7fff]);
+ m_copro_ram_adr ++;
}
-WRITE16_MEMBER(model1_state::model1_tgp_vr_adr_w)
+READ32_MEMBER(model1_state::copro_ramdata_r)
{
- COMBINE_DATA(&m_ram_adr);
+ u32 val = m_copro_ram_data[m_copro_ram_adr & 0x7fff];
+ m_copro_ram_adr ++;
+ return val;
}
-READ16_MEMBER(model1_state::model1_vr_tgp_ram_r)
+
+
+WRITE32_MEMBER(model1_state::copro_sincos_w)
{
- uint16_t r;
+ COMBINE_DATA(&m_copro_sincos_base);
+}
- if (!offset)
- {
- r = m_ram_data[m_ram_adr&0x7fff];
- }
- else
- {
- r = m_ram_data[m_ram_adr&0x7fff] >> 16;
+READ32_MEMBER(model1_state::copro_sincos_r)
+{
+ offs_t ang = m_copro_sincos_base + offset * 0x4000;
+ offs_t index = ang & 0x3fff;
+ if(ang & 0x4000)
+ index ^= 0x3fff;
+ u32 result = m_copro_tables[index];
+ if(ang & 0x8000)
+ result ^= 0x80000000;
+ return result;
+}
- if ( m_ram_adr == 0 && r == 0xffff )
- {
- /* if the TGP is busy, spin some more */
- m_maincpu->spin_until_time(attotime::from_usec(100));
- }
+WRITE32_MEMBER(model1_state::copro_inv_w)
+{
+ COMBINE_DATA(&m_copro_inv_base);
+}
- if ( m_ram_adr & 0x8000 )
- m_ram_adr++;
- }
+READ32_MEMBER(model1_state::copro_inv_r)
+{
+ offs_t index = ((m_copro_inv_base >> 9) & 0x3ffe) | (offset & 1);
+ u32 result = m_copro_tables[index | 0x8000];
+ u8 bexp = (m_copro_inv_base >> 23) & 0xff;
+ u8 exp = (result >> 23) + (0x7f - bexp);
+ result = (result & 0x807fffff) | (exp << 23);
+ if(m_copro_inv_base & 0x80000000)
+ result ^= 0x80000000;
+ return result;
+}
- return r;
+WRITE32_MEMBER(model1_state::copro_isqrt_w)
+{
+ COMBINE_DATA(&m_copro_isqrt_base);
}
-WRITE16_MEMBER(model1_state::model1_vr_tgp_ram_w)
+READ32_MEMBER(model1_state::copro_isqrt_r)
{
- COMBINE_DATA(m_ram_latch+offset);
+ offs_t index = 0x2000 ^ (((m_copro_isqrt_base>> 10) & 0x3ffe) | (offset & 1));
+ u32 result = m_copro_tables[index | 0xc000];
+ u8 bexp = (m_copro_isqrt_base >> 24) & 0x7f;
+ u8 exp = (result >> 23) + (0x3f - bexp);
+ result = (result & 0x807fffff) | (exp << 23);
+ if(!(offset & 1))
+ result &= 0x7fffffff;
+ return result;
+}
- if (offset)
- {
- uint32_t v = m_ram_latch[0]|(m_ram_latch[1]<<16);
- m_ram_data[m_ram_adr&0x7fff] = v;
- if ( m_ram_adr & 0x8000 )
- m_ram_adr++;
- }
+WRITE32_MEMBER(model1_state::copro_atan_w)
+{
+ COMBINE_DATA(&m_copro_atan_base[offset]);
}
-READ16_MEMBER(model1_state::model1_vr_tgp_r)
+READ32_MEMBER(model1_state::copro_atan_r)
{
- if (!offset)
- {
- m_vr_r = copro_fifoout_pop();
- return m_vr_r;
- }
- else
- return m_vr_r >> 16;
+ offs_t index = (m_copro_atan_base[3] << 1);
+ if(index == 0x4000)
+ index = 0x3fff;
+ u32 result = m_copro_tables[index | 0x4000];
+
+ bool s0 = m_copro_atan_base[0] & 0x80000000;
+ bool s1 = m_copro_atan_base[1] & 0x80000000;
+ bool s2 = m_copro_atan_base[2] & 0x80000000;
+
+ if(s0 ^ s1 ^ s2)
+ result >>= 16;
+ if(s2)
+ result += 0x4000;
+ if((s0 && !s2) || (s1 && s2))
+ result += 0x8000;
+
+ return result & 0xffff;
}
-WRITE16_MEMBER(model1_state::model1_vr_tgp_w)
+WRITE32_MEMBER(model1_state::copro_data_w)
{
- if (offset)
- {
- m_vr_w = (m_vr_w & 0x0000ffff) | (data << 16);
- copro_fifoin_push(m_vr_w);
- }
- else
- m_vr_w = (m_vr_w & 0xffff0000) | data;
+ COMBINE_DATA(&m_copro_data_base);
}
-/* TGP memory map */
-void model1_state::model1_vr_tgp_map(address_map &map)
+READ32_MEMBER(model1_state::copro_data_r)
{
- map(0x00000000, 0x000007ff).ram().region("tgp", 0);
- map(0x00400000, 0x00407fff).rw(this, FUNC(model1_state::copro_ram_r), FUNC(model1_state::copro_ram_w));
- map(0xff800000, 0xff87ffff).rom().region("tgp_data", 0);
+ offs_t index = (m_copro_data_base & ~0x7fff) | offset;
+ index &= (m_copro_data->bytes() >> 2) - 1;
+ return m_copro_data->as_u32(index);
}