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author Patrick Mackinlay <pmackinlay@hotmail.com>2019-12-18 12:22:15 +0700
committer Patrick Mackinlay <pmackinlay@hotmail.com>2019-12-18 12:22:15 +0700
commit190d1f3ccbfc4b82d5b9a20aa7996bc7073bee29 (patch)
treefe14982d9ef5e19c6ec1ef0cdc210cae5b47cf9e
parente6133c887159fffd6c52e13a25eb4ffa0635bf37 (diff)
mips1: revert unnecessary/unwanted initialization (nw)
All of these variables are either: 1. Already initialized in the constructor or start/reset; or 2. Guarded against read-before-write by program logic; or 3. Documented as being in an undefined state at device power-up. Regarding the last point, my view is that if the documentation states the value is unpredictable/undefined at power up, I'd rather not initialize it to an arbitrary value. The absence of initialization in the code counts as documenting this behaviour, or conversely, initializing it to an arbitrary zero documents something which is not factual. While there is an argument for consistency in emulation, I'd rather expose and address any such undocumented hardware behaviour. I believe the only required and missing initialization here is for integer register zero, which was indeed a bug. If there are any other test cases which fail after this reversion, please let me know and I'll investigate and address them.
-rw-r--r--src/devices/cpu/mips/mips1.cpp5
-rw-r--r--src/devices/cpu/mips/mips1.h30
2 files changed, 16 insertions, 19 deletions
diff --git a/src/devices/cpu/mips/mips1.cpp b/src/devices/cpu/mips/mips1.cpp
index ca3363fcd32..c2a34e47e73 100644
--- a/src/devices/cpu/mips/mips1.cpp
+++ b/src/devices/cpu/mips/mips1.cpp
@@ -184,8 +184,7 @@ void mips1core_device_base::device_start()
// initialise cpu id register
m_cop0[COP0_PRId] = m_cpurev;
- std::fill(std::begin(m_cop0), std::end(m_cop0), 0);
- std::fill(std::begin(m_r), std::end(m_r), 0);
+ m_r[0] = 0;
}
void r3041_device::device_start()
@@ -1198,8 +1197,6 @@ void mips1_device_base::device_start()
state_add(MIPS1_F0 + i, util::string_format("F%d", i * 2).c_str(), m_f[i]);
}
- std::fill(std::begin(m_f), std::end(m_f), 0);
-
save_item(NAME(m_reset_time));
save_item(NAME(m_tlb));
diff --git a/src/devices/cpu/mips/mips1.h b/src/devices/cpu/mips/mips1.h
index b84f69aeb26..b3cdeedcdf3 100644
--- a/src/devices/cpu/mips/mips1.h
+++ b/src/devices/cpu/mips/mips1.h
@@ -206,23 +206,23 @@ protected:
const address_space_config m_icache_config;
const address_space_config m_dcache_config;
- int m_data_spacenum= 0;
+ int m_data_spacenum;
// configuration
- u32 m_cpurev= 0;
- endianness_t m_endianness= ENDIANNESS_BIG;
+ u32 const m_cpurev;
+ endianness_t m_endianness;
// core registers
- u32 m_pc= 0;
+ u32 m_pc;
u32 m_r[32];
- u32 m_hi= 0;
- u32 m_lo = 0;
+ u32 m_hi;
+ u32 m_lo;
// cop0 registers
u32 m_cop0[32];
// internal stuff
- int m_icount = 0;
+ int m_icount;
enum branch_state_t : unsigned
{
NONE = 0,
@@ -230,8 +230,8 @@ protected:
BRANCH = 2, // branch instruction active
EXCEPTION = 3, // exception triggered
}
- m_branch_state = NONE;
- u32 m_branch_target = 0;
+ m_branch_state;
+ u32 m_branch_target;
// cache memory
size_t const m_icache_size;
@@ -239,7 +239,7 @@ protected:
// I/O
devcb_read_line m_in_brcond[4];
- bool m_bus_error = false;
+ bool m_bus_error;
};
class mips1_device_base : public mips1core_device_base
@@ -307,17 +307,17 @@ protected:
template <typename T> void set_cop1_reg(unsigned const reg, T const data);
private:
- u64 m_reset_time = 0;
+ u64 m_reset_time;
u32 m_tlb[64][2]; // 0 is hi, 1 is lo
unsigned m_tlb_mru[3][64];
// cop1 registers
u64 m_f[16];
- u32 m_fcr0 = 0;
- u32 m_fcr30 = 0;
- u32 m_fcr31 = 0;
+ u32 m_fcr0;
+ u32 m_fcr30;
+ u32 m_fcr31;
- unsigned m_fpu_irq = 0;
+ unsigned m_fpu_irq;
};
class r2000_device : public mips1_device_base