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author David Haywood <28625134+DavidHaywood@users.noreply.github.com>2017-12-11 15:57:21 +0000
committer David Haywood <28625134+DavidHaywood@users.noreply.github.com>2017-12-11 15:57:21 +0000
commit151db37cda2376563404bfc43103d39c0f25ec49 (patch)
tree04fc7a8a0d129125bc028ba5e5a28ed04fa80018
parent92291b516d11b3138211905d08916b59d8d5922a (diff)
igs036 seems to be derived from a 946 type core based on using MPU not MMU, change it to be such.
-rw-r--r--src/devices/cpu/arm7/arm7.cpp38
-rw-r--r--src/devices/cpu/arm7/arm7.h16
2 files changed, 25 insertions, 29 deletions
diff --git a/src/devices/cpu/arm7/arm7.cpp b/src/devices/cpu/arm7/arm7.cpp
index 7a3a7ba30db..19530ed9e66 100644
--- a/src/devices/cpu/arm7/arm7.cpp
+++ b/src/devices/cpu/arm7/arm7.cpp
@@ -148,14 +148,16 @@ arm920t_cpu_device::arm920t_cpu_device(const machine_config &mconfig, const char
}
-arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : arm9_cpu_device(mconfig, ARM946ES, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE),
+
+
+arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+ : arm9_cpu_device(mconfig, type, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE),
cp15_control(0x78)
{
m_copro_id = ARM9_COPRO_ID_MFR_ARM
- | ARM9_COPRO_ID_ARCH_V5TE
- | ARM9_COPRO_ID_PART_ARM946
- | ARM9_COPRO_ID_STEP_ARM946_A0;
+ | ARM9_COPRO_ID_ARCH_V5TE
+ | ARM9_COPRO_ID_PART_ARM946
+ | ARM9_COPRO_ID_STEP_ARM946_A0;
memset(ITCM, 0, 0x8000);
memset(DTCM, 0, 0x4000);
@@ -169,6 +171,17 @@ arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const ch
cp15_itcm_reg = cp15_dtcm_reg = 0;
}
+arm946es_cpu_device::arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : arm946es_cpu_device(mconfig, ARM946ES, tag, owner, clock)
+{
+}
+
+// unknown configuration, but uses MPU not MMU, so closer to ARM946ES
+igs036_cpu_device::igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : arm946es_cpu_device(mconfig, IGS036, tag, owner, clock)
+{
+}
+
pxa255_cpu_device::pxa255_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, PXA255, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E | ARCHFLAG_XSCALE, ENDIANNESS_LITTLE)
{
@@ -189,13 +202,6 @@ sa1110_cpu_device::sa1110_cpu_device(const machine_config &mconfig, const char *
| ARM9_COPRO_ID_STEP_SA1110_A0;
}
-// unknown configuration
-igs036_cpu_device::igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : arm9_cpu_device(mconfig, IGS036, tag, owner, clock, 5, ARCHFLAG_T | ARCHFLAG_E, ENDIANNESS_LITTLE)
-{
-}
-
-
device_memory_interface::space_config_vector arm7_cpu_device::memory_space_config() const
{
return space_config_vector {
@@ -1459,14 +1465,6 @@ uint8_t arm946es_cpu_device::arm7_cpu_read8(uint32_t addr)
return m_program->read_byte(addr);
}
-WRITE32_MEMBER(igs036_cpu_device::arm7_rt_w_callback)
-{
- arm7_cpu_device::arm7_rt_w_callback(space, offset, data, mem_mask);
- /* disable the MMU for now, it doesn't seem to set up valid mappings
- so could be entirely different here */
- COPRO_CTRL &= ~COPRO_CTRL_MMU_EN;
-}
-
void arm7_cpu_device::arm7_dt_r_callback(uint32_t insn, uint32_t *prn)
{
uint8_t cpn = (insn >> 8) & 0xF;
diff --git a/src/devices/cpu/arm7/arm7.h b/src/devices/cpu/arm7/arm7.h
index f6eecc4e4e1..a0711fed9ec 100644
--- a/src/devices/cpu/arm7/arm7.h
+++ b/src/devices/cpu/arm7/arm7.h
@@ -614,6 +614,7 @@ class arm946es_cpu_device : public arm9_cpu_device
public:
// construction/destruction
arm946es_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// 946E-S has Protection Unit instead of ARM MMU so CP15 is quite different
virtual DECLARE_READ32_MEMBER( arm7_rt_r_callback ) override;
@@ -635,6 +636,12 @@ private:
void RefreshDTCM();
};
+class igs036_cpu_device : public arm946es_cpu_device
+{
+public:
+ // construction/destruction
+ igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
class pxa255_cpu_device : public arm7_cpu_device
{
@@ -651,15 +658,6 @@ public:
sa1110_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
-class igs036_cpu_device : public arm9_cpu_device
-{
-public:
- // construction/destruction
- igs036_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual DECLARE_WRITE32_MEMBER( arm7_rt_w_callback ) override;
-};
-
-
DECLARE_DEVICE_TYPE(ARM7, arm7_cpu_device)
DECLARE_DEVICE_TYPE(ARM7_BE, arm7_be_cpu_device)
DECLARE_DEVICE_TYPE(ARM7500, arm7500_cpu_device)