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author Vas Crabb <vas@vastheman.com>2016-12-25 13:54:27 +1100
committer Vas Crabb <vas@vastheman.com>2016-12-25 13:57:31 +1100
commit127fd9b427df4c1af31e3513e32f14c80e3d29cc (patch)
treeef6bd2e4747e1a1a49895a47a8d9f1e7f37dbeca
parentad50cf5fd48de1baf9334a8d844fe456b5799b5b (diff)
first srcclean pass (nw)
-rw-r--r--hash/neogeo.xml2
-rw-r--r--hash/pcw.xml20
-rw-r--r--makefile2
-rw-r--r--src/devices/bus/a7800/a78_slot.cpp2
-rw-r--r--src/devices/bus/amiga/zorro/buddha.cpp26
-rw-r--r--src/devices/bus/apricot/keyboard/hle.cpp6
-rw-r--r--src/devices/bus/coco/coco_t4426.cpp6
-rw-r--r--src/devices/cpu/drcbex64.cpp2
-rw-r--r--src/devices/cpu/i960/i960.cpp16
-rw-r--r--src/devices/cpu/m68000/m68kcpu.h2
-rw-r--r--src/devices/cpu/m68000/makefile4
-rw-r--r--src/devices/cpu/m6805/m6805.cpp4
-rw-r--r--src/devices/cpu/m6805/m6805.h4
-rw-r--r--src/devices/cpu/mb86235/mb86235.cpp6
-rw-r--r--src/devices/cpu/mb86235/mb86235.h26
-rw-r--r--src/devices/cpu/mb86235/mb86235drc.cpp338
-rw-r--r--src/devices/cpu/mb86235/mb86235fe.cpp312
-rw-r--r--src/devices/cpu/powerpc/ppccom.cpp4
-rw-r--r--src/devices/cpu/powerpc/ppcdrc.cpp12
-rw-r--r--src/devices/cpu/tms32025/tms32025.cpp2
-rw-r--r--src/devices/machine/68230pit.cpp10
-rw-r--r--src/devices/machine/68230pit.h90
-rw-r--r--src/devices/machine/netlist.cpp2
-rw-r--r--src/devices/machine/netlist.h6
-rw-r--r--src/devices/machine/z80scc.h2
-rw-r--r--src/devices/sound/dac76.cpp2
-rw-r--r--src/devices/sound/votrax.cpp32
-rw-r--r--src/devices/video/ef9369.cpp2
-rw-r--r--src/devices/video/ef9369.h4
-rw-r--r--src/devices/video/zeus2.cpp10
-rw-r--r--src/frontend/mame/mame.cpp2
-rw-r--r--src/frontend/mame/ui/filesel.cpp4
-rw-r--r--src/lib/netlist/build/makefile14
-rw-r--r--src/lib/netlist/devices/net_lib.cpp10
-rw-r--r--src/lib/netlist/devices/nld_2102A.cpp4
-rw-r--r--src/lib/netlist/devices/nld_2102A.h28
-rw-r--r--src/lib/netlist/devices/nld_2716.cpp8
-rw-r--r--src/lib/netlist/devices/nld_2716.h26
-rw-r--r--src/lib/netlist/devices/nld_74107.h2
-rw-r--r--src/lib/netlist/devices/nld_74161.cpp16
-rw-r--r--src/lib/netlist/devices/nld_74161.h16
-rw-r--r--src/lib/netlist/devices/nld_74165.h26
-rw-r--r--src/lib/netlist/devices/nld_74166.h28
-rw-r--r--src/lib/netlist/devices/nld_74174.h18
-rw-r--r--src/lib/netlist/devices/nld_74175.h14
-rw-r--r--src/lib/netlist/devices/nld_74192.h18
-rw-r--r--src/lib/netlist/devices/nld_74193.h14
-rw-r--r--src/lib/netlist/devices/nld_74194.h22
-rw-r--r--src/lib/netlist/devices/nld_74365.h18
-rw-r--r--src/lib/netlist/devices/nld_7473.cpp58
-rw-r--r--src/lib/netlist/devices/nld_7473.h16
-rw-r--r--src/lib/netlist/devices/nld_7475.cpp2
-rw-r--r--src/lib/netlist/devices/nld_7475.h24
-rw-r--r--src/lib/netlist/devices/nld_7485.h22
-rw-r--r--src/lib/netlist/devices/nld_82S115.cpp2
-rw-r--r--src/lib/netlist/devices/nld_82S115.h26
-rw-r--r--src/lib/netlist/devices/nld_82S123.cpp6
-rw-r--r--src/lib/netlist/devices/nld_82S123.h14
-rw-r--r--src/lib/netlist/devices/nld_82S126.cpp6
-rw-r--r--src/lib/netlist/devices/nld_82S126.h22
-rw-r--r--src/lib/netlist/devices/nld_9312.h26
-rw-r--r--src/lib/netlist/devices/nld_9316.h4
-rw-r--r--src/lib/netlist/devices/nld_9322.h22
-rw-r--r--src/lib/netlist/devices/nld_am2847.cpp2
-rw-r--r--src/lib/netlist/devices/nld_am2847.h20
-rw-r--r--src/lib/netlist/devices/nld_dm9334.h14
-rw-r--r--src/lib/netlist/devices/nld_tristate.cpp56
-rw-r--r--src/lib/netlist/devices/nld_tristate.h24
-rw-r--r--src/lib/netlist/macro/nlm_ttl74xx.h14
-rw-r--r--src/mame/audio/csd.cpp2
-rw-r--r--src/mame/audio/csd.h2
-rw-r--r--src/mame/audio/dcs.cpp2
-rw-r--r--src/mame/drivers/aristmk5.cpp142
-rw-r--r--src/mame/drivers/atarittl.cpp14
-rw-r--r--src/mame/drivers/beezer.cpp32
-rw-r--r--src/mame/drivers/by35.cpp2
-rw-r--r--src/mame/drivers/ccastles.cpp16
-rw-r--r--src/mame/drivers/coco12.cpp2
-rw-r--r--src/mame/drivers/ddealer.cpp2
-rw-r--r--src/mame/drivers/esq5505.cpp8
-rw-r--r--src/mame/drivers/fccpu20.cpp44
-rw-r--r--src/mame/drivers/fccpu30.cpp4
-rw-r--r--src/mame/drivers/fromance.cpp2
-rw-r--r--src/mame/drivers/gkigt.cpp40
-rw-r--r--src/mame/drivers/guab.cpp28
-rw-r--r--src/mame/drivers/hazeltin.cpp238
-rw-r--r--src/mame/drivers/hh_cop400.cpp2
-rw-r--r--src/mame/drivers/kaneko16.cpp2
-rw-r--r--src/mame/drivers/ladybug.cpp2
-rw-r--r--src/mame/drivers/lwriter.cpp32
-rw-r--r--[-rwxr-xr-x]src/mame/drivers/mac128.cpp36
-rw-r--r--[-rwxr-xr-x]src/mame/drivers/micro20.cpp52
-rw-r--r--src/mame/drivers/model1.cpp46
-rw-r--r--src/mame/drivers/model2.cpp10
-rw-r--r--src/mame/drivers/nmk16.cpp2
-rw-r--r--src/mame/drivers/pg685.cpp2
-rw-r--r--src/mame/drivers/pgm3.cpp34
-rw-r--r--src/mame/drivers/playmark.cpp4
-rw-r--r--src/mame/drivers/rainbow.cpp100
-rw-r--r--src/mame/drivers/savquest.cpp2
-rw-r--r--src/mame/drivers/segas16b.cpp6
-rw-r--r--src/mame/drivers/seta.cpp4
-rw-r--r--src/mame/drivers/shootout.cpp36
-rw-r--r--src/mame/drivers/slapfght.cpp2
-rw-r--r--src/mame/drivers/srmp2.cpp2
-rw-r--r--src/mame/drivers/tail2nos.cpp14
-rw-r--r--src/mame/drivers/tmnt.cpp4
-rw-r--r--src/mame/drivers/tnzs.cpp80
-rw-r--r--src/mame/drivers/tosh1000.cpp26
-rw-r--r--src/mame/drivers/zwackery.cpp18
-rw-r--r--src/mame/includes/bublbobl.h2
-rw-r--r--src/mame/includes/fromance.h2
-rw-r--r--src/mame/includes/kaneko16.h2
-rw-r--r--src/mame/includes/playmark.h2
-rw-r--r--src/mame/includes/slapfght.h2
-rw-r--r--src/mame/includes/tail2nos.h4
-rw-r--r--src/mame/includes/tnzs.h4
-rw-r--r--src/mame/machine/archimds.cpp16
-rw-r--r--src/mame/machine/bublbobl.cpp14
-rw-r--r--src/mame/machine/epos.cpp4
-rw-r--r--src/mame/machine/leland.cpp2
-rw-r--r--src/mame/machine/m2comm.h6
-rw-r--r--src/mame/machine/midwayic.cpp14
-rw-r--r--src/mame/machine/naomigd.cpp12
-rw-r--r--src/mame/machine/nl_hazelvid.cpp100
-rw-r--r--src/mame/machine/xbox.cpp6
-rw-r--r--src/mame/mame.lst16
-rw-r--r--src/mame/nl.lst2
-rw-r--r--src/mame/video/fromance.cpp12
-rw-r--r--src/mame/video/leland.cpp4
-rw-r--r--src/osd/modules/font/font_dwrite.cpp2
-rw-r--r--src/osd/modules/render/bgfx/shaders/makefile2
132 files changed, 1476 insertions, 1476 deletions
diff --git a/hash/neogeo.xml b/hash/neogeo.xml
index 85efc934b2e..3bf83488f92 100644
--- a/hash/neogeo.xml
+++ b/hash/neogeo.xml
@@ -4829,7 +4829,7 @@
</dataarea>
</part>
</software>
-
+
<!--
ID-0096
. NGM-096
diff --git a/hash/pcw.xml b/hash/pcw.xml
index e7b007184e7..654f4466fdb 100644
--- a/hash/pcw.xml
+++ b/hash/pcw.xml
@@ -1513,16 +1513,16 @@
</software>
<!--
- <software name="sirlance">
- <description>Sir Lancelot (Spa)</description>
- <year>1985</year>
- <publisher>OMK</publisher>
- <part name="flop1" interface="floppy_3">
- <dataarea name="flop" size="194816">
- <rom name="sirlancelot_pcw.dsk" size="194816" crc="c47fb488" sha1="18d09cab70d50e0e9b2682ea751258fa47841120" offset="0" />
- </dataarea>
- </part>
- </software>
+ <software name="sirlance">
+ <description>Sir Lancelot (Spa)</description>
+ <year>1985</year>
+ <publisher>OMK</publisher>
+ <part name="flop1" interface="floppy_3">
+ <dataarea name="flop" size="194816">
+ <rom name="sirlancelot_pcw.dsk" size="194816" crc="c47fb488" sha1="18d09cab70d50e0e9b2682ea751258fa47841120" offset="0" />
+ </dataarea>
+ </part>
+ </software>
-->
<software name="sirperce">
diff --git a/makefile b/makefile
index 1b3e5851e5b..f2a998e29af 100644
--- a/makefile
+++ b/makefile
@@ -804,7 +804,7 @@ SCRIPTS += scripts/target/$(TARGET)/mess.lua
endif
ifndef SOURCES
-ifdef PROJECT
+ifdef PROJECT
SCRIPTS += projects/$(PROJECT)/scripts/target/$(TARGET)/$(SUBTARGET_FULL).lua
else
SCRIPTS += scripts/target/$(TARGET)/$(SUBTARGET_FULL).lua
diff --git a/src/devices/bus/a7800/a78_slot.cpp b/src/devices/bus/a7800/a78_slot.cpp
index 4bf77f178ae..a9208c91764 100644
--- a/src/devices/bus/a7800/a78_slot.cpp
+++ b/src/devices/bus/a7800/a78_slot.cpp
@@ -432,7 +432,7 @@ image_init_result a78_cart_slot_device::call_load()
m_type = A78_ABSOLUTE;
// (for now) mirror ram implies no bankswitch format is used
else if ((mapper & 0x0080) == 0x0080)
- m_type = A78_TYPE8;
+ m_type = A78_TYPE8;
logerror("Cart type: 0x%x\n", m_type);
diff --git a/src/devices/bus/amiga/zorro/buddha.cpp b/src/devices/bus/amiga/zorro/buddha.cpp
index 87a1f0e9a90..bbfe7adf82b 100644
--- a/src/devices/bus/amiga/zorro/buddha.cpp
+++ b/src/devices/bus/amiga/zorro/buddha.cpp
@@ -6,19 +6,19 @@
Zorro-II IDE controller
- The 'speed' register is used to select the IDE timing according to
- the following table (bits 7-5 are used):
-
- 0 497ns 7c to select, IOR/IOW after 172ns 2c
- 1 639ns 9c to select, IOR/IOW after 243ns 3c
- 2 781ns 11c to select, IOR/IOW after 314ns 4c
- 3 355ns 5c to select, IOR/IOW after 101ns 1c
- 4 355ns 5c to select, IOR/IOW after 172ns 2c
- 5 355ns 5c to select, IOR/IOW after 243ns 3c
- 6 1065ns 15c to select, IOR/IOW after 314ns 4c
- 7 355ns 5c to select, IOR/IOW after 101ns 1c
-
- c = clock cycles. This isn't emulated.
+ The 'speed' register is used to select the IDE timing according to
+ the following table (bits 7-5 are used):
+
+ 0 497ns 7c to select, IOR/IOW after 172ns 2c
+ 1 639ns 9c to select, IOR/IOW after 243ns 3c
+ 2 781ns 11c to select, IOR/IOW after 314ns 4c
+ 3 355ns 5c to select, IOR/IOW after 101ns 1c
+ 4 355ns 5c to select, IOR/IOW after 172ns 2c
+ 5 355ns 5c to select, IOR/IOW after 243ns 3c
+ 6 1065ns 15c to select, IOR/IOW after 314ns 4c
+ 7 355ns 5c to select, IOR/IOW after 101ns 1c
+
+ c = clock cycles. This isn't emulated.
***************************************************************************/
diff --git a/src/devices/bus/apricot/keyboard/hle.cpp b/src/devices/bus/apricot/keyboard/hle.cpp
index 72d8abc771d..ff2f9ffe28e 100644
--- a/src/devices/bus/apricot/keyboard/hle.cpp
+++ b/src/devices/bus/apricot/keyboard/hle.cpp
@@ -5,9 +5,9 @@
ACT Apricot Keyboard (HLE)
TODO:
- - MicroScreen emulation
- - Mouse emulation
- - LEDs
+ - MicroScreen emulation
+ - Mouse emulation
+ - LEDs
Keyboard to System:
- 01-60: Key make codes
diff --git a/src/devices/bus/coco/coco_t4426.cpp b/src/devices/bus/coco/coco_t4426.cpp
index 4a1185e1d0c..601e6887413 100644
--- a/src/devices/bus/coco/coco_t4426.cpp
+++ b/src/devices/bus/coco/coco_t4426.cpp
@@ -71,7 +71,7 @@
#define UART_TAG "acia"
#define PIA_TAG "pia"
-#define CARTSLOT_TAG "t4426"
+#define CARTSLOT_TAG "t4426"
/***************************************************************************
IMPLEMENTATION
@@ -85,8 +85,8 @@ MACHINE_CONFIG_END
ROM_START( coco_t4426 )
ROM_REGION(0x8000, CARTSLOT_TAG, ROMREGION_ERASE00)
- // First of 8 banked ROM:s TODO: Add the banking and the other ROM:s
- ROM_LOAD("tercoED4426-0-8549-5.3.bin", 0x0000, 0x2000, CRC(45665428) SHA1(ff49a79275772c4c4ab1ae29db662c9b10a744a7))
+ // First of 8 banked ROM:s TODO: Add the banking and the other ROM:s
+ ROM_LOAD("tercoED4426-0-8549-5.3.bin", 0x0000, 0x2000, CRC(45665428) SHA1(ff49a79275772c4c4ab1ae29db662c9b10a744a7))
// Main cartridge ROM
ROM_LOAD("tercoPMOS4426-8549-4.31.bin", 0x2000, 0x1000, CRC(bc65c45c) SHA1(e50cfd1d61e29fe05eb795d8bf6303e7b91ed8e5))
diff --git a/src/devices/cpu/drcbex64.cpp b/src/devices/cpu/drcbex64.cpp
index fd4afc729a3..2cc08888eb2 100644
--- a/src/devices/cpu/drcbex64.cpp
+++ b/src/devices/cpu/drcbex64.cpp
@@ -289,7 +289,7 @@ static uint8_t float_register_map[REG_F_COUNT] =
{
#ifdef X64_WINDOWS_ABI
REG_XMM6, REG_XMM7, REG_XMM8, REG_XMM9, REG_XMM10, REG_XMM11, REG_XMM12, REG_XMM13, REG_XMM14, REG_XMM15
-#else
+#else
// on AMD x64 ABI, XMM0-7 are FP function args. since this code has no args, and we
// save/restore them around CALLC, they should be safe for our use.
REG_XMM0, REG_XMM1, REG_XMM2, REG_XMM3, REG_XMM4, REG_XMM5, REG_XMM6, REG_XMM7
diff --git a/src/devices/cpu/i960/i960.cpp b/src/devices/cpu/i960/i960.cpp
index 83ebbe93797..9bc4386d182 100644
--- a/src/devices/cpu/i960/i960.cpp
+++ b/src/devices/cpu/i960/i960.cpp
@@ -105,8 +105,8 @@ uint32_t i960_cpu_device::get_ea(uint32_t opcode)
switch(mode) {
case 0x4:
return m_r[abase];
-
- case 0x5: // address of this instruction + the offset dword + 8
+
+ case 0x5: // address of this instruction + the offset dword + 8
// which in reality is "address of next instruction + the offset dword"
ret = m_direct->read_dword(m_IP);
m_IP += 4;
@@ -657,7 +657,7 @@ void i960_cpu_device::execute_op(uint32_t opcode)
m_icount--;
bxx(opcode, 7);
break;
-
+
case 0x18: // faultno
m_icount--;
if(!(m_AC & 7)) {
@@ -1126,10 +1126,10 @@ void i960_cpu_device::execute_op(uint32_t opcode)
cmp_s(t1, t2);
set_ri(opcode, t2-1);
break;
-
+
case 0xc: // scanbyte
m_icount -= 2;
- m_AC &= ~7; // clear CC
+ m_AC &= ~7; // clear CC
t1 = get_1_ri(opcode);
t2 = get_2_ri(opcode);
if ((t1 & 0xff000000) == (t2 & 0xff000000) ||
@@ -1379,15 +1379,15 @@ void i960_cpu_device::execute_op(uint32_t opcode)
switch((opcode >> 7) & 0xf) {
case 0x0: // calls
t1 = get_1_ri(opcode);
- t2 = m_program->read_dword(m_SAT + 152); // get pointer to system procedure table
+ t2 = m_program->read_dword(m_SAT + 152); // get pointer to system procedure table
t2 = m_program->read_dword(t2 + 48 + (t1 * 4));
if ((t2 & 3) != 0)
{
fatalerror("I960: system calls that jump into supervisor mode aren't yet supported\n");
}
- do_call(t2, 0, m_r[I960_SP]);
+ do_call(t2, 0, m_r[I960_SP]);
break;
-
+
case 0xd: // flushreg
if (m_rcache_pos > 4)
{
diff --git a/src/devices/cpu/m68000/m68kcpu.h b/src/devices/cpu/m68000/m68kcpu.h
index d8c977cca7b..4326735cd1b 100644
--- a/src/devices/cpu/m68000/m68kcpu.h
+++ b/src/devices/cpu/m68000/m68kcpu.h
@@ -697,7 +697,7 @@ static inline uint32_t m68ki_ic_readimm16(m68000_base_device *m68k, uint32_t add
uint32_t data = m68k->read32(address & ~3);
- //printf("m68k: doing cache fill at %08x (tag %08x idx %d)\n", address, tag, idx);
+ //printf("m68k: doing cache fill at %08x (tag %08x idx %d)\n", address, tag, idx);
// if no buserror occurred, validate the tag
if (!m68k->mmu_tmp_buserror_occurred)
diff --git a/src/devices/cpu/m68000/makefile b/src/devices/cpu/m68000/makefile
index be25a067a78..e98bbe8778e 100644
--- a/src/devices/cpu/m68000/makefile
+++ b/src/devices/cpu/m68000/makefile
@@ -23,7 +23,7 @@ clean:
-@rm -f m68kmake$(EXE)
-@rm -f m68kmake.o
-@rm -f m68kops.*
-
+
m68kmake.o: m68kmake.cpp
$(SILENT) $(CC) -x c++ -std=c++11 -o "$@" -c "$<"
@@ -31,7 +31,7 @@ m68kmake$(EXE) : m68kmake.o
@echo Linking $@...
$(SILENT) $(CXX) -lstdc++ $^ -o $@
-m68kops.cpp: m68kmake$(EXE) m68k_in.cpp
+m68kops.cpp: m68kmake$(EXE) m68k_in.cpp
@echo Generating M68K source files...
$(SILENT) ./m68kmake$(EXE) . m68k_in.cpp
diff --git a/src/devices/cpu/m6805/m6805.cpp b/src/devices/cpu/m6805/m6805.cpp
index 95c18c417a7..278505b8c1e 100644
--- a/src/devices/cpu/m6805/m6805.cpp
+++ b/src/devices/cpu/m6805/m6805.cpp
@@ -421,7 +421,7 @@ m6805_base_device::m6805_base_device(const machine_config &mconfig, const char *
{
}
-
+
void m6805_base_device::device_start()
{
@@ -1110,7 +1110,7 @@ void m68705_new_device::device_start()
m_portA_cb_w.resolve_safe();
m_portB_cb_w.resolve_safe();
m_portC_cb_w.resolve_safe();
-
+
m_portA_cb_r.resolve_safe(0xff);
m_portB_cb_r.resolve_safe(0xff);
m_portC_cb_r.resolve_safe(0xff);
diff --git a/src/devices/cpu/m6805/m6805.h b/src/devices/cpu/m6805/m6805.h
index 63920b758b4..24b75f57158 100644
--- a/src/devices/cpu/m6805/m6805.h
+++ b/src/devices/cpu/m6805/m6805.h
@@ -438,9 +438,9 @@ protected:
// device-level overrides
virtual void device_start() override;
-// virtual void execute_set_input(int inputnum, int state) override;
+// virtual void execute_set_input(int inputnum, int state) override;
-// virtual void interrupt() override;
+// virtual void interrupt() override;
};
// ======================> hd63705_device
diff --git a/src/devices/cpu/mb86235/mb86235.cpp b/src/devices/cpu/mb86235/mb86235.cpp
index 5e22794da28..44a1d596310 100644
--- a/src/devices/cpu/mb86235/mb86235.cpp
+++ b/src/devices/cpu/mb86235/mb86235.cpp
@@ -17,7 +17,7 @@
#include "mb86235fe.h"
-#define ENABLE_DRC 0
+#define ENABLE_DRC 0
#define CACHE_SIZE (1 * 1024 * 1024)
@@ -243,7 +243,7 @@ void mb86235_device::fifoin_w(uint64_t data)
printf("FIFOIN push %08X%08X\n", (uint32_t)(data >> 32), (uint32_t)(data));
m_core->fifoin.data[m_core->fifoin.wpos] = data;
-
+
m_core->fifoin.wpos++;
m_core->fifoin.wpos &= FIFOIN_SIZE-1;
m_core->fifoin.num++;
@@ -285,4 +285,4 @@ bool mb86235_device::is_fifoout0_empty()
#else
return false;
#endif
-} \ No newline at end of file
+}
diff --git a/src/devices/cpu/mb86235/mb86235.h b/src/devices/cpu/mb86235/mb86235.h
index dac55fe382a..99c008ae88e 100644
--- a/src/devices/cpu/mb86235/mb86235.h
+++ b/src/devices/cpu/mb86235/mb86235.h
@@ -19,19 +19,19 @@ class mb86235_frontend;
-#define OP_USERFLAG_FIFOIN 0x1
-#define OP_USERFLAG_FIFOOUT0 0x2
-#define OP_USERFLAG_FIFOOUT1 0x4
-#define OP_USERFLAG_REPEAT 0x8
-#define OP_USERFLAG_REPEATED_OP 0x10
-#define OP_USERFLAG_PR_MASK 0x300
-#define OP_USERFLAG_PR_INC 0x100
-#define OP_USERFLAG_PR_DEC 0x200
-#define OP_USERFLAG_PR_ZERO 0x300
-#define OP_USERFLAG_PW_MASK 0xc00
-#define OP_USERFLAG_PW_INC 0x400
-#define OP_USERFLAG_PW_DEC 0x800
-#define OP_USERFLAG_PW_ZERO 0xc00
+#define OP_USERFLAG_FIFOIN 0x1
+#define OP_USERFLAG_FIFOOUT0 0x2
+#define OP_USERFLAG_FIFOOUT1 0x4
+#define OP_USERFLAG_REPEAT 0x8
+#define OP_USERFLAG_REPEATED_OP 0x10
+#define OP_USERFLAG_PR_MASK 0x300
+#define OP_USERFLAG_PR_INC 0x100
+#define OP_USERFLAG_PR_DEC 0x200
+#define OP_USERFLAG_PR_ZERO 0x300
+#define OP_USERFLAG_PW_MASK 0xc00
+#define OP_USERFLAG_PW_INC 0x400
+#define OP_USERFLAG_PW_DEC 0x800
+#define OP_USERFLAG_PW_ZERO 0xc00
class mb86235_device : public cpu_device
diff --git a/src/devices/cpu/mb86235/mb86235drc.cpp b/src/devices/cpu/mb86235/mb86235drc.cpp
index 1ea7ac6b708..0a27c23eafc 100644
--- a/src/devices/cpu/mb86235/mb86235drc.cpp
+++ b/src/devices/cpu/mb86235/mb86235drc.cpp
@@ -16,8 +16,8 @@
#include "cpu/drcumlsh.h"
/*
- TODO:
- - check jump condition before parallel ALU/MUL (flags!)
+ TODO:
+ - check jump condition before parallel ALU/MUL (flags!)
*/
@@ -38,55 +38,55 @@ using namespace uml;
#define EXECUTE_RESET_CACHE 3
-#define AR(reg) mem(&m_core->ar[(reg)])
-#define AA(reg) m_regmap[(reg)]
-#define AB(reg) m_regmap[(reg)+8]
-#define MA(reg) m_regmap[(reg)+16]
-#define MB(reg) m_regmap[(reg)+24]
-#define FLAGS_AZ mem(&m_core->flags.az)
-#define FLAGS_AN mem(&m_core->flags.an)
-#define FLAGS_AV mem(&m_core->flags.av)
-#define FLAGS_AU mem(&m_core->flags.au)
-#define FLAGS_AD mem(&m_core->flags.ad)
-#define FLAGS_ZC mem(&m_core->flags.zc)
-#define FLAGS_IL mem(&m_core->flags.il)
-#define FLAGS_NR mem(&m_core->flags.nr)
-#define FLAGS_ZD mem(&m_core->flags.zd)
-#define FLAGS_MN mem(&m_core->flags.mn)
-#define FLAGS_MZ mem(&m_core->flags.mz)
-#define FLAGS_MV mem(&m_core->flags.mv)
-#define FLAGS_MU mem(&m_core->flags.mu)
-#define FLAGS_MD mem(&m_core->flags.md)
-
-#define PRP mem(&m_core->prp)
-#define PWP mem(&m_core->pwp)
-#define RPC mem(&m_core->rpc)
-#define LPC mem(&m_core->lpc)
-
-#define AZ_CALC_REQUIRED ((desc->regreq[1] & 0x1) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AN_CALC_REQUIRED ((desc->regreq[1] & 0x2) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AV_CALC_REQUIRED ((desc->regreq[1] & 0x4) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AU_CALC_REQUIRED ((desc->regreq[1] & 0x8) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AD_CALC_REQUIRED ((desc->regreq[1] & 0x10) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define ZC_CALC_REQUIRED ((desc->regreq[1] & 0x20) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define IL_CALC_REQUIRED ((desc->regreq[1] & 0x40) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define NR_CALC_REQUIRED ((desc->regreq[1] & 0x80) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define ZD_CALC_REQUIRED ((desc->regreq[1] & 0x100) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MN_CALC_REQUIRED ((desc->regreq[1] & 0x200) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MZ_CALC_REQUIRED ((desc->regreq[1] & 0x400) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MV_CALC_REQUIRED ((desc->regreq[1] & 0x800) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MU_CALC_REQUIRED ((desc->regreq[1] & 0x1000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MD_CALC_REQUIRED ((desc->regreq[1] & 0x2000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-
-#define FIFOIN_RPOS mem(&m_core->fifoin.rpos)
-#define FIFOIN_WPOS mem(&m_core->fifoin.wpos)
-#define FIFOIN_NUM mem(&m_core->fifoin.num)
-#define FIFOOUT0_RPOS mem(&m_core->fifoout0.rpos)
-#define FIFOOUT0_WPOS mem(&m_core->fifoout0.wpos)
-#define FIFOOUT0_NUM mem(&m_core->fifoout0.num)
-#define FIFOOUT1_RPOS mem(&m_core->fifoout1.rpos)
-#define FIFOOUT1_WPOS mem(&m_core->fifoout1.wpos)
-#define FIFOOUT1_NUM mem(&m_core->fifoout1.num)
+#define AR(reg) mem(&m_core->ar[(reg)])
+#define AA(reg) m_regmap[(reg)]
+#define AB(reg) m_regmap[(reg)+8]
+#define MA(reg) m_regmap[(reg)+16]
+#define MB(reg) m_regmap[(reg)+24]
+#define FLAGS_AZ mem(&m_core->flags.az)
+#define FLAGS_AN mem(&m_core->flags.an)
+#define FLAGS_AV mem(&m_core->flags.av)
+#define FLAGS_AU mem(&m_core->flags.au)
+#define FLAGS_AD mem(&m_core->flags.ad)
+#define FLAGS_ZC mem(&m_core->flags.zc)
+#define FLAGS_IL mem(&m_core->flags.il)
+#define FLAGS_NR mem(&m_core->flags.nr)
+#define FLAGS_ZD mem(&m_core->flags.zd)
+#define FLAGS_MN mem(&m_core->flags.mn)
+#define FLAGS_MZ mem(&m_core->flags.mz)
+#define FLAGS_MV mem(&m_core->flags.mv)
+#define FLAGS_MU mem(&m_core->flags.mu)
+#define FLAGS_MD mem(&m_core->flags.md)
+
+#define PRP mem(&m_core->prp)
+#define PWP mem(&m_core->pwp)
+#define RPC mem(&m_core->rpc)
+#define LPC mem(&m_core->lpc)
+
+#define AZ_CALC_REQUIRED ((desc->regreq[1] & 0x1) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AN_CALC_REQUIRED ((desc->regreq[1] & 0x2) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AV_CALC_REQUIRED ((desc->regreq[1] & 0x4) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AU_CALC_REQUIRED ((desc->regreq[1] & 0x8) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AD_CALC_REQUIRED ((desc->regreq[1] & 0x10) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define ZC_CALC_REQUIRED ((desc->regreq[1] & 0x20) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define IL_CALC_REQUIRED ((desc->regreq[1] & 0x40) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define NR_CALC_REQUIRED ((desc->regreq[1] & 0x80) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define ZD_CALC_REQUIRED ((desc->regreq[1] & 0x100) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MN_CALC_REQUIRED ((desc->regreq[1] & 0x200) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MZ_CALC_REQUIRED ((desc->regreq[1] & 0x400) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MV_CALC_REQUIRED ((desc->regreq[1] & 0x800) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MU_CALC_REQUIRED ((desc->regreq[1] & 0x1000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MD_CALC_REQUIRED ((desc->regreq[1] & 0x2000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+
+#define FIFOIN_RPOS mem(&m_core->fifoin.rpos)
+#define FIFOIN_WPOS mem(&m_core->fifoin.wpos)
+#define FIFOIN_NUM mem(&m_core->fifoin.num)
+#define FIFOOUT0_RPOS mem(&m_core->fifoout0.rpos)
+#define FIFOOUT0_WPOS mem(&m_core->fifoout0.wpos)
+#define FIFOOUT0_NUM mem(&m_core->fifoout0.num)
+#define FIFOOUT1_RPOS mem(&m_core->fifoout1.rpos)
+#define FIFOOUT1_WPOS mem(&m_core->fifoout1.wpos)
+#define FIFOOUT1_NUM mem(&m_core->fifoout1.num)
inline void mb86235_device::alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name)
@@ -631,17 +631,17 @@ void mb86235_device::generate_ea(drcuml_block *block, compiler_state *compiler,
switch (md)
{
- case 0x0: // @ARx
+ case 0x0: // @ARx
UML_MOV(block, I0, AR(arx));
break;
- case 0x1: // @ARx++
+ case 0x1: // @ARx++
UML_MOV(block, I0, AR(arx));
UML_ADD(block, AR(arx), AR(arx), 1);
break;
- case 0x4: // @ARx+ARy
+ case 0x4: // @ARx+ARy
UML_ADD(block, I0, AR(arx), AR(ary));
break;
- case 0xa: // @ARx+disp12
+ case 0xa: // @ARx+disp12
UML_ADD(block, I0, AR(arx), disp);
break;
@@ -672,11 +672,11 @@ void mb86235_device::generate_reg_read(drcuml_block *block, compiler_state *comp
UML_MOV(block, dst, AB(reg & 7));
break;
- case 0x30: // PR
+ case 0x30: // PR
UML_LOAD(block, dst, m_core->pr, PRP, SIZE_DWORD, SCALE_x4);
break;
- case 0x31: // FI
+ case 0x31: // FI
UML_CALLH(block, *m_read_fifo_in);
UML_MOV(block, dst, I0);
break;
@@ -702,15 +702,15 @@ void mb86235_device::generate_reg_write(drcuml_block *block, compiler_state *com
UML_MOV(block, AA(reg & 7), src);
break;
- case 0x10: // EB
+ case 0x10: // EB
UML_MOV(block, mem(&m_core->eb), src);
break;
- case 0x13: // EO
+ case 0x13: // EO
UML_MOV(block, mem(&m_core->eo), src);
break;
- case 0x14: // SP
+ case 0x14: // SP
UML_MOV(block, mem(&m_core->sp), src);
break;
@@ -729,28 +729,28 @@ void mb86235_device::generate_reg_write(drcuml_block *block, compiler_state *com
UML_MOV(block, AB(reg & 7), src);
break;
- case 0x30: // PR
+ case 0x30: // PR
UML_STORE(block, m_core->pr, PWP, src, SIZE_DWORD, SCALE_x4);
break;
- case 0x32: // FO0
+ case 0x32: // FO0
UML_MOV(block, I0, src);
UML_CALLH(block, *m_write_fifo_out0);
break;
- case 0x34: // PDR
+ case 0x34: // PDR
UML_MOV(block, mem(&m_core->pdr), src);
break;
- case 0x35: // DDR
+ case 0x35: // DDR
UML_MOV(block, mem(&m_core->ddr), src);
break;
- case 0x36: // PRP
+ case 0x36: // PRP
UML_MOV(block, PRP, src);
break;
- case 0x37: // PWP
+ case 0x37: // PWP
UML_MOV(block, PWP, src);
break;
@@ -788,9 +788,9 @@ bool mb86235_device::aluop_has_result(int aluop)
{
switch (aluop)
{
- case 0x04: // FCMP
- case 0x07: // NOP
- case 0x14: // CMP
+ case 0x04: // FCMP
+ case 0x07: // NOP
+ case 0x14: // CMP
return false;
default:
@@ -874,7 +874,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
UML_LABEL(block, not_full);
}
-
+
switch ((opcode >> 61) & 7)
{
@@ -900,7 +900,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
if (mul_temp) UML_MOV(block, get_alu_output((opcode >> 27) & 0x1f), mem(&m_core->multemp));
break;
}
- case 2: // ALU / MUL / control
+ case 2: // ALU / MUL / control
{
generate_pre_control(block, compiler, desc);
generate_alu(block, compiler, desc, (opcode >> 42) & 0x7ffff, false);
@@ -979,17 +979,17 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
{
switch ((desc->userflags & OP_USERFLAG_PR_MASK) >> 8)
{
- case 1: // PR++
+ case 1: // PR++
UML_ADD(block, PRP, PRP, 1);
UML_CMP(block, PRP, 24);
UML_MOVc(block, COND_GE, PRP, 0);
break;
- case 2: // PR--
+ case 2: // PR--
UML_SUB(block, PRP, PRP, 1);
UML_CMP(block, PRP, 0);
UML_MOVc(block, COND_L, PRP, 23);
break;
- case 3: // PR#0
+ case 3: // PR#0
UML_MOV(block, PRP, 0);
break;
}
@@ -999,17 +999,17 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
{
switch ((desc->userflags & OP_USERFLAG_PW_MASK) >> 10)
{
- case 1: // PW++
+ case 1: // PW++
UML_ADD(block, PWP, PWP, 1);
UML_CMP(block, PWP, 24);
UML_MOVc(block, COND_GE, PWP, 0);
break;
- case 2: // PW--
+ case 2: // PW--
UML_SUB(block, PWP, PWP, 1);
UML_CMP(block, PWP, 0);
UML_MOVc(block, COND_L, PWP, 23);
break;
- case 3: // PW#0
+ case 3: // PW#0
UML_MOV(block, PWP, 0);
break;
}
@@ -1047,7 +1047,7 @@ void mb86235_device::generate_alumul_input(drcuml_block *block, compiler_state *
else
UML_MOV(block, dst, AA(reg & 7));
break;
-
+
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
if (mul)
UML_MOV(block, dst, MB(reg & 7));
@@ -1055,51 +1055,51 @@ void mb86235_device::generate_alumul_input(drcuml_block *block, compiler_state *
UML_MOV(block, dst, AB(reg & 7));
break;
- case 0x10: // PR
- case 0x11: // PR++
- case 0x12: // PR--
- case 0x13: // PR#0
+ case 0x10: // PR
+ case 0x11: // PR++
+ case 0x12: // PR--
+ case 0x13: // PR#0
UML_LOAD(block, dst, m_core->pr, PRP, SIZE_DWORD, SCALE_x4);
break;
- case 0x18: // 0 / -1.0E+0
+ case 0x18: // 0 / -1.0E+0
if (fp)
UML_MOV(block, dst, 0xbf800000);
else
UML_MOV(block, dst, 0);
break;
- case 0x19: // 1 / 0.0E+0
+ case 0x19: // 1 / 0.0E+0
if (fp)
UML_MOV(block, dst, 0);
else
UML_MOV(block, dst, 1);
break;
- case 0x1a: // -1 / 0.5+0
+ case 0x1a: // -1 / 0.5+0
if (fp)
UML_MOV(block, dst, 0x3f000000);
else
UML_MOV(block, dst, -1);
break;
- case 0x1b: // 1.0E+0
+ case 0x1b: // 1.0E+0
UML_MOV(block, dst, 0x3f800000);
break;
- case 0x1c: // 1.5E+0
+ case 0x1c: // 1.5E+0
UML_MOV(block, dst, 0x3fc00000);
break;
- case 0x1d: // 2.0E+0
+ case 0x1d: // 2.0E+0
UML_MOV(block, dst, 0x40000000);
break;
- case 0x1e: // 3.0E+0
+ case 0x1e: // 3.0E+0
UML_MOV(block, dst, 0x40400000);
break;
- case 0x1f: // 5.0E+0
+ case 0x1f: // 5.0E+0
UML_MOV(block, dst, 0x40a00000);
break;
@@ -1159,9 +1159,9 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
int io = aluop & 0x1f;
int op = (aluop >> 14) & 0x1f;
- switch (op)
+ switch (op)
{
- case 0x00: // FADD
+ case 0x00: // FADD
generate_alumul_input(block, compiler, desc, i2, I0, true, false);
UML_FSCOPYI(block, F0, I0);
UML_FSCOPYI(block, F1, get_alu1_input(i1));
@@ -1176,7 +1176,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
// TODO: AD flag
break;
- case 0x02: // FSUB
+ case 0x02: // FSUB
generate_alumul_input(block, compiler, desc, i2, I0, true, false);
UML_FSCOPYI(block, F0, I0);
UML_FSCOPYI(block, F1, get_alu1_input(i1));
@@ -1191,7 +1191,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
// TODO: AD flag
break;
- case 0x04: // FCMP
+ case 0x04: // FCMP
generate_alumul_input(block, compiler, desc, i2, I0, true, false);
UML_FSCOPYI(block, F0, I0);
UML_FSCOPYI(block, F1, get_alu1_input(i1));
@@ -1203,14 +1203,14 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
// TODO: AD flag
break;
- case 0x05: // FABS
+ case 0x05: // FABS
UML_AND(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), get_alu1_input(i1), 0x7fffffff);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
if (AN_CALC_REQUIRED) UML_MOV(block, FLAGS_AN, 0);
// TODO: AD flag
break;
- case 0x06: // FABC
+ case 0x06: // FABC
generate_alumul_input(block, compiler, desc, i2, I0, true, false);
UML_AND(block, I0, I0, 0x7fffffff);
UML_AND(block, I1, get_alu1_input(i1), 0x7fffffff);
@@ -1223,10 +1223,10 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
// TODO: AD flag
break;
- case 0x07: // NOP
+ case 0x07: // NOP
break;
- case 0x0d: // CIF
+ case 0x0d: // CIF
generate_alumul_input(block, compiler, desc, i1, I1, true, false);
UML_FSFRINT(block, F0, I1, SIZE_DWORD);
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
@@ -1236,7 +1236,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
UML_ICOPYFS(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), F0);
break;
- case 0x0e: // CFI
+ case 0x0e: // CFI
{
code_label truncate = compiler->labelnum++;
code_label end = compiler->labelnum++;
@@ -1248,7 +1248,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
UML_LABEL(block, truncate);
UML_FSTOINT(block, I0, F0, SIZE_DWORD, ROUND_TRUNC);
UML_LABEL(block, end);
-
+
UML_CMP(block, I0, 0xff800000);
UML_MOVc(block, COND_L, I0, 0xff800000);
if (AV_CALC_REQUIRED) UML_MOVc(block, COND_L, FLAGS_AV, 1);
@@ -1263,7 +1263,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
}
- case 0x10: // ADD
+ case 0x10: // ADD
generate_alumul_input(block, compiler, desc, i2, I1, false, false);
UML_ADD(block, I0, I1, get_alu1_input(i1));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
@@ -1277,7 +1277,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0);
break;
- case 0x12: // SUB
+ case 0x12: // SUB
generate_alumul_input(block, compiler, desc, i2, I1, false, false);
UML_SUB(block, I0, I1, get_alu1_input(i1));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
@@ -1291,7 +1291,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0);
break;
- case 0x14: // CMP
+ case 0x14: // CMP
generate_alumul_input(block, compiler, desc, i2, I1, false, false);
UML_SUB(block, I0, I1, get_alu1_input(i1));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
@@ -1305,11 +1305,11 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
}
break;
- case 0x16: // ATR
+ case 0x16: // ATR
UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), get_alu1_input(i1));
break;
- case 0x18: // AND
+ case 0x18: // AND
generate_alumul_input(block, compiler, desc, i2, I0, false, false);
UML_AND(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0, get_alu1_input(i1));
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN);
@@ -1318,7 +1318,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
if (AU_CALC_REQUIRED) UML_MOV(block, FLAGS_AU, 0);
break;
- case 0x1c: // LSR
+ case 0x1c: // LSR
generate_alumul_input(block, compiler, desc, i1, I0, false, false);
UML_SHR(block, I0, I0, i2);
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
@@ -1330,7 +1330,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
UML_MOV(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0);
break;
- case 0x1d: // LSL
+ case 0x1d: // LSL
generate_alumul_input(block, compiler, desc, i1, I0, false, false);
UML_SHL(block, I0, I0, i2);
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
@@ -1438,13 +1438,13 @@ void mb86235_device::generate_branch_target(drcuml_block *block, compiler_state
{
case 0x0: break;
case 0x1: break;
- case 0x2: // ARx
+ case 0x2: // ARx
{
int reg = (ef2 >> 6) & 7;
UML_MOV(block, I0, AR(reg));
break;
}
- case 0x4: // Axx
+ case 0x4: // Axx
{
int reg = (ef2 >> 6) & 7;
if (ef2 & 0x400)
@@ -1464,59 +1464,59 @@ void mb86235_device::generate_condition(drcuml_block *block, compiler_state *com
{
switch (cc)
{
- case 0x00: // MN
+ case 0x00: // MN
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MN, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x01: // MZ
+ case 0x01: // MZ
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MZ, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x02: // MV
+ case 0x02: // MV
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MV, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x03: // MU
+ case 0x03: // MU
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MU, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x04: // ZD
+ case 0x04: // ZD
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_ZD, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x05: // NR
+ case 0x05: // NR
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_NR, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x06: // IL
+ case 0x06: // IL
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_IL, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x07: // ZC
+ case 0x07: // ZC
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_ZC, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x08: // AN
+ case 0x08: // AN
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AN, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x09: // AZ
+ case 0x09: // AZ
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AZ, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x0a: // AV
+ case 0x0a: // AV
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AV, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x0b: // AU
+ case 0x0b: // AU
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AU, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x0c: // MD
+ case 0x0c: // MD
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_MD, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
- case 0x0d: // AD
+ case 0x0d: // AD
UML_CMP(block, condtemp ? mem(&m_core->condtemp) : FLAGS_AD, 0);
UML_JMPc(block, n ? COND_NE : COND_E, skip_label);
break;
@@ -1533,22 +1533,22 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
int ef1 = (op >> 16) & 0x3f;
int ef2 = op & 0xffff;
int cop = (op >> 22) & 0x1f;
-// int rel12 = (op & 0x800) ? (0xfffff000 | (op & 0xfff)) : (op & 0xfff);
+// int rel12 = (op & 0x800) ? (0xfffff000 | (op & 0xfff)) : (op & 0xfff);
switch (cop)
{
- case 0x00: // NOP
+ case 0x00: // NOP
break;
- case 0x03: //
- if (ef1 == 1) // CLRFI
+ case 0x03: //
+ if (ef1 == 1) // CLRFI
UML_CALLH(block, *m_clear_fifo_in);
- else if (ef1 == 2) // CLRFO
+ else if (ef1 == 2) // CLRFO
{
UML_CALLH(block, *m_clear_fifo_out0);
UML_CALLH(block, *m_clear_fifo_out1);
}
- else if (ef1 == 3) // CLRF
+ else if (ef1 == 3) // CLRF
{
UML_CALLH(block, *m_clear_fifo_in);
UML_CALLH(block, *m_clear_fifo_out0);
@@ -1556,11 +1556,11 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
}
break;
- case 0x08: // SETM #imm16
+ case 0x08: // SETM #imm16
UML_MOV(block, mem(&m_core->mod), ef2);
break;
- case 0x10: // DBcc
+ case 0x10: // DBcc
{
code_label skip_label = compiler->labelnum++;
@@ -1571,7 +1571,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
break;
}
- case 0x11: // DBNcc
+ case 0x11: // DBNcc
{
code_label skip_label = compiler->labelnum++;
@@ -1582,14 +1582,14 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
break;
}
- case 0x12: // DJMP
+ case 0x12: // DJMP
{
generate_branch_target(block, compiler, desc, (op >> 12) & 0xf, ef2);
generate_branch(block, compiler, desc);
break;
}
- case 0x1a: // DCALL
+ case 0x1a: // DCALL
{
// push PC
code_label no_overflow = compiler->labelnum++;
@@ -1601,13 +1601,13 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
UML_LABEL(block, no_overflow);
UML_STORE(block, m_core->pcs, mem(&m_core->pcs_ptr), desc->pc + 2, SIZE_DWORD, SCALE_x4);
UML_ADD(block, mem(&m_core->pcs_ptr), mem(&m_core->pcs_ptr), 1);
-
+
generate_branch_target(block, compiler, desc, (op >> 12) & 0xf, ef2);
generate_branch(block, compiler, desc);
break;
}
- case 0x1b: // DRET
+ case 0x1b: // DRET
{
// pop PC
code_label no_underflow = compiler->labelnum++;
@@ -1619,7 +1619,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
UML_LABEL(block, no_underflow);
UML_SUB(block, mem(&m_core->pcs_ptr), mem(&m_core->pcs_ptr), 1);
UML_LOAD(block, I0, m_core->pcs, mem(&m_core->pcs_ptr), SIZE_DWORD, SCALE_x4);
-
+
generate_branch(block, compiler, desc);
break;
}
@@ -1642,7 +1642,7 @@ void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compile
int ary = (opcode >> 4) & 7;
int disp5 = (opcode >> 7) & 0x1f;
int trm = (opcode >> 26) & 1;
-// int dir = (opcode >> 25) & 1;
+// int dir = (opcode >> 25) & 1;
if (trm == 0)
{
@@ -1660,7 +1660,7 @@ void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compile
else
{
generate_ea(block, compiler, desc, md, sr & 7, ary, disp5);
- if (sr & 0x20) // RAM-B
+ if (sr & 0x20) // RAM-B
{
UML_SHL(block, I0, I0, 2);
UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO);
@@ -1678,7 +1678,7 @@ void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compile
else
{
generate_ea(block, compiler, desc, md, dr & 7, ary, disp5);
- if (dr & 0x20) // RAM-B
+ if (dr & 0x20) // RAM-B
{
UML_SHL(block, I0, I0, 2);
UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO);
@@ -1719,7 +1719,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
int disp14 = (opcode >> 7) & 0x3fff;
if (disp14 & 0x2000) disp14 |= 0xffffc000;
- if (op == 0) // MOV2
+ if (op == 0) // MOV2
{
if (trm == 0)
{
@@ -1737,7 +1737,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
else
{
generate_ea(block, compiler, desc, md, sr & 7, ary, disp14);
- if (sr & 0x20) // RAM-B
+ if (sr & 0x20) // RAM-B
{
UML_SHL(block, I0, I0, 2);
UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO);
@@ -1745,7 +1745,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
else // RAM-A
{
UML_CALLH(block, *m_read_abus);
- }
+ }
}
if ((dr & 0x40) == 0)
@@ -1755,7 +1755,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
else
{
generate_ea(block, compiler, desc, md, dr & 7, ary, disp14);
- if (dr & 0x20) // RAM-B
+ if (dr & 0x20) // RAM-B
{
UML_SHL(block, I0, I0, 2);
UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO);
@@ -1791,7 +1791,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
UML_ADD(block, mem(&m_core->eo), mem(&m_core->eo), disp14);
}
}
- else if (op == 2) // MOV4
+ else if (op == 2) // MOV4
{
fatalerror("generate_xfer2 MOV4 at %08X (%08X%08X)", desc->pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode));
}
@@ -1809,7 +1809,7 @@ void mb86235_device::generate_xfer3(drcuml_block *block, compiler_state *compile
uint64_t opcode = desc->opptr.q[0];
uint32_t imm = (uint32_t)(opcode >> 27);
- int dr = (opcode >> 19) & 0x7f;
+ int dr = (opcode >> 19) & 0x7f;
int ary = (opcode >> 4) & 7;
int md = opcode & 0xf;
@@ -1819,17 +1819,17 @@ void mb86235_device::generate_xfer3(drcuml_block *block, compiler_state *compile
switch (dr >> 5)
{
case 0:
- case 1: // reg
+ case 1: // reg
generate_reg_write(block, compiler, desc, dr & 0x3f, uml::parameter(imm));
break;
- case 2: // RAM-A
+ case 2: // RAM-A
generate_ea(block, compiler, desc, md, dr & 7, ary, disp);
UML_MOV(block, I1, imm);
UML_CALLH(block, *m_write_abus);
break;
- case 3: // RAM-B
+ case 3: // RAM-B
generate_ea(block, compiler, desc, md, dr & 7, ary, disp);
UML_SHL(block, I0, I0, 2);
UML_WRITE(block, I0, imm, SIZE_DWORD, SPACE_IO);
@@ -1847,38 +1847,38 @@ void mb86235_device::generate_pre_control(drcuml_block *block, compiler_state *c
switch (cop)
{
- case 0x10: // DBcc
- case 0x11: // DBNcc
- case 0x18: // DCcc
- case 0x19: // DCNcc
+ case 0x10: // DBcc
+ case 0x11: // DBNcc
+ case 0x18: // DCcc
+ case 0x19: // DCNcc
switch (ef1)
{
- case 0x00: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MN); break; // MN
- case 0x01: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MZ); break; // MZ
- case 0x02: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MV); break; // MV
- case 0x03: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MU); break; // MU
- case 0x04: UML_MOV(block, mem(&m_core->condtemp), FLAGS_ZD); break; // ZD
- case 0x05: UML_MOV(block, mem(&m_core->condtemp), FLAGS_NR); break; // NR
- case 0x06: UML_MOV(block, mem(&m_core->condtemp), FLAGS_IL); break; // IL
- case 0x07: UML_MOV(block, mem(&m_core->condtemp), FLAGS_ZC); break; // ZC
- case 0x08: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AN); break; // AN
- case 0x09: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AZ); break; // AZ
- case 0x0a: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AV); break; // AV
- case 0x0b: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AU); break; // AU
- case 0x0c: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MD); break; // MD
- case 0x0d: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AD); break; // AD
+ case 0x00: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MN); break; // MN
+ case 0x01: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MZ); break; // MZ
+ case 0x02: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MV); break; // MV
+ case 0x03: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MU); break; // MU
+ case 0x04: UML_MOV(block, mem(&m_core->condtemp), FLAGS_ZD); break; // ZD
+ case 0x05: UML_MOV(block, mem(&m_core->condtemp), FLAGS_NR); break; // NR
+ case 0x06: UML_MOV(block, mem(&m_core->condtemp), FLAGS_IL); break; // IL
+ case 0x07: UML_MOV(block, mem(&m_core->condtemp), FLAGS_ZC); break; // ZC
+ case 0x08: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AN); break; // AN
+ case 0x09: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AZ); break; // AZ
+ case 0x0a: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AV); break; // AV
+ case 0x0b: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AU); break; // AU
+ case 0x0c: UML_MOV(block, mem(&m_core->condtemp), FLAGS_MD); break; // MD
+ case 0x0d: UML_MOV(block, mem(&m_core->condtemp), FLAGS_AD); break; // AD
default:
fatalerror("generate_pre_control: unimplemented cc %02X at %08X", ef1, desc->pc);
break;
}
break;
- case 0x14: // DBBC ARx:y, rel12
+ case 0x14: // DBBC ARx:y, rel12
// TODO: copy ARx
UML_MOV(block, mem(&m_core->condtemp), AR((ef2 >> 13) & 7));
break;
- case 0x15: // DBBS ARx:y, rel12
+ case 0x15: // DBBS ARx:y, rel12
// TODO: copy ARx
UML_MOV(block, mem(&m_core->condtemp), AR((ef2 >> 13) & 7));
break;
diff --git a/src/devices/cpu/mb86235/mb86235fe.cpp b/src/devices/cpu/mb86235/mb86235fe.cpp
index f5343109a2e..f55fb0934bf 100644
--- a/src/devices/cpu/mb86235/mb86235fe.cpp
+++ b/src/devices/cpu/mb86235/mb86235fe.cpp
@@ -11,45 +11,45 @@
#include "mb86235fe.h"
-#define AA_USED(desc,x) do { (desc).regin[0] |= 1 << (x); } while(0)
-#define AA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (x); } while(0)
-#define AB_USED(desc,x) do { (desc).regin[0] |= 1 << (8+(x)); } while(0)
-#define AB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (8+(x)); } while(0)
-#define MA_USED(desc,x) do { (desc).regin[0] |= 1 << (16+(x)); } while(0)
-#define MA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (16+(x)); } while(0)
-#define MB_USED(desc,x) do { (desc).regin[0] |= 1 << (24+(x)); } while(0)
-#define MB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (24+(x)); } while(0)
-#define AR_USED(desc,x) do { (desc).regin[1] |= 1 << (24+(x)); } while(0)
-#define AR_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << (24+(x)); } while(0)
-
-#define AZ_USED(desc) do { (desc).regin[1] |= 1 << 0; } while (0)
-#define AZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 0; } while (0)
-#define AN_USED(desc) do { (desc).regin[1] |= 1 << 1; } while (0)
-#define AN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 1; } while (0)
-#define AV_USED(desc) do { (desc).regin[1] |= 1 << 2; } while (0)
-#define AV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 2; } while (0)
-#define AU_USED(desc) do { (desc).regin[1] |= 1 << 3; } while (0)
-#define AU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 3; } while (0)
-#define AD_USED(desc) do { (desc).regin[1] |= 1 << 4; } while (0)
-#define AD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 4; } while (0)
-#define ZC_USED(desc) do { (desc).regin[1] |= 1 << 5; } while (0)
-#define ZC_MODIFIED(desc) do { (desc).regout[1] |= 1 << 5; } while (0)
-#define IL_USED(desc) do { (desc).regin[1] |= 1 << 6; } while (0)
-#define IL_MODIFIED(desc) do { (desc).regout[1] |= 1 << 6; } while (0)
-#define NR_USED(desc) do { (desc).regin[1] |= 1 << 7; } while (0)
-#define NR_MODIFIED(desc) do { (desc).regout[1] |= 1 << 7; } while (0)
-#define ZD_USED(desc) do { (desc).regin[1] |= 1 << 8; } while (0)
-#define ZD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 8; } while (0)
-#define MN_USED(desc) do { (desc).regin[1] |= 1 << 9; } while (0)
-#define MN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 9; } while (0)
-#define MZ_USED(desc) do { (desc).regin[1] |= 1 << 10; } while (0)
-#define MZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 10; } while (0)
-#define MV_USED(desc) do { (desc).regin[1] |= 1 << 11; } while (0)
-#define MV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 11; } while (0)
-#define MU_USED(desc) do { (desc).regin[1] |= 1 << 12; } while (0)
-#define MU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 12; } while (0)
-#define MD_USED(desc) do { (desc).regin[1] |= 1 << 13; } while (0)
-#define MD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 13; } while (0)
+#define AA_USED(desc,x) do { (desc).regin[0] |= 1 << (x); } while(0)
+#define AA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (x); } while(0)
+#define AB_USED(desc,x) do { (desc).regin[0] |= 1 << (8+(x)); } while(0)
+#define AB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (8+(x)); } while(0)
+#define MA_USED(desc,x) do { (desc).regin[0] |= 1 << (16+(x)); } while(0)
+#define MA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (16+(x)); } while(0)
+#define MB_USED(desc,x) do { (desc).regin[0] |= 1 << (24+(x)); } while(0)
+#define MB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (24+(x)); } while(0)
+#define AR_USED(desc,x) do { (desc).regin[1] |= 1 << (24+(x)); } while(0)
+#define AR_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << (24+(x)); } while(0)
+
+#define AZ_USED(desc) do { (desc).regin[1] |= 1 << 0; } while (0)
+#define AZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 0; } while (0)
+#define AN_USED(desc) do { (desc).regin[1] |= 1 << 1; } while (0)
+#define AN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 1; } while (0)
+#define AV_USED(desc) do { (desc).regin[1] |= 1 << 2; } while (0)
+#define AV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 2; } while (0)
+#define AU_USED(desc) do { (desc).regin[1] |= 1 << 3; } while (0)
+#define AU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 3; } while (0)
+#define AD_USED(desc) do { (desc).regin[1] |= 1 << 4; } while (0)
+#define AD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 4; } while (0)
+#define ZC_USED(desc) do { (desc).regin[1] |= 1 << 5; } while (0)
+#define ZC_MODIFIED(desc) do { (desc).regout[1] |= 1 << 5; } while (0)
+#define IL_USED(desc) do { (desc).regin[1] |= 1 << 6; } while (0)
+#define IL_MODIFIED(desc) do { (desc).regout[1] |= 1 << 6; } while (0)
+#define NR_USED(desc) do { (desc).regin[1] |= 1 << 7; } while (0)
+#define NR_MODIFIED(desc) do { (desc).regout[1] |= 1 << 7; } while (0)
+#define ZD_USED(desc) do { (desc).regin[1] |= 1 << 8; } while (0)
+#define ZD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 8; } while (0)
+#define MN_USED(desc) do { (desc).regin[1] |= 1 << 9; } while (0)
+#define MN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 9; } while (0)
+#define MZ_USED(desc) do { (desc).regin[1] |= 1 << 10; } while (0)
+#define MZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 10; } while (0)
+#define MV_USED(desc) do { (desc).regin[1] |= 1 << 11; } while (0)
+#define MV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 11; } while (0)
+#define MU_USED(desc) do { (desc).regin[1] |= 1 << 12; } while (0)
+#define MU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 12; } while (0)
+#define MD_USED(desc) do { (desc).regin[1] |= 1 << 13; } while (0)
+#define MD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 13; } while (0)
mb86235_frontend::mb86235_frontend(mb86235_device *core, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
@@ -137,18 +137,18 @@ void mb86235_frontend::describe_alu_input(opcode_desc &desc, int reg)
AB_USED(desc, reg & 7);
break;
- case 0x10: // PR
+ case 0x10: // PR
break;
- case 0x11: // PR++
+ case 0x11: // PR++
desc.userflags &= ~OP_USERFLAG_PR_MASK;
desc.userflags |= OP_USERFLAG_PR_INC;
break;
- case 0x12: // PR--
+ case 0x12: // PR--
desc.userflags &= ~OP_USERFLAG_PR_MASK;
desc.userflags |= OP_USERFLAG_PR_DEC;
break;
- case 0x13: // PR#0
+ case 0x13: // PR#0
desc.userflags &= ~OP_USERFLAG_PR_MASK;
desc.userflags |= OP_USERFLAG_PR_ZERO;
break;
@@ -171,23 +171,23 @@ void mb86235_frontend::describe_mul_input(opcode_desc &desc, int reg)
MB_USED(desc, reg & 7);
break;
- case 0x10: // PR
+ case 0x10: // PR
break;
- case 0x11: // PR++
- if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority
+ case 0x11: // PR++
+ if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority
{
desc.userflags |= OP_USERFLAG_PR_INC;
}
break;
- case 0x12: // PR--
- if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority
+ case 0x12: // PR--
+ if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority
{
desc.userflags |= OP_USERFLAG_PR_DEC;
}
break;
- case 0x13: // PR#0
- if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority
+ case 0x13: // PR#0
+ if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority
{
desc.userflags |= OP_USERFLAG_PR_ZERO;
}
@@ -248,31 +248,31 @@ void mb86235_frontend::describe_reg_read(opcode_desc &desc, int reg)
AB_USED(desc, reg & 7);
break;
- case 0x31: // FI
+ case 0x31: // FI
desc.userflags |= OP_USERFLAG_FIFOIN;
- desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target
+ desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target
break;
- case 0x32: // FO0
+ case 0x32: // FO0
break;
- case 0x33: // FO1
+ case 0x33: // FO1
break;
- case 0x10: // EB
- case 0x11: // EBU
- case 0x12: // EBL
- case 0x13: // EO
- case 0x15: // ST
- case 0x16: // MOD
- case 0x17: // LRPC
- case 0x34: // PDR
- case 0x35: // DDR
- case 0x36: // PRP
- case 0x37: // PWP
+ case 0x10: // EB
+ case 0x11: // EBU
+ case 0x12: // EBL
+ case 0x13: // EO
+ case 0x15: // ST
+ case 0x16: // MOD
+ case 0x17: // LRPC
+ case 0x34: // PDR
+ case 0x35: // DDR
+ case 0x36: // PRP
+ case 0x37: // PWP
break;
- case 0x30: // PR
- if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU and MUL PR updates have higher priority
+ case 0x30: // PR
+ if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU and MUL PR updates have higher priority
{
desc.userflags |= OP_USERFLAG_PR_INC;
}
@@ -305,32 +305,32 @@ void mb86235_frontend::describe_reg_write(opcode_desc &desc, int reg)
AB_MODIFIED(desc, reg & 7);
break;
- case 0x31: // FI
+ case 0x31: // FI
break;
- case 0x32: // FO0
+ case 0x32: // FO0
desc.userflags |= OP_USERFLAG_FIFOOUT0;
- desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target
+ desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target
break;
- case 0x33: // FO1
+ case 0x33: // FO1
desc.userflags |= OP_USERFLAG_FIFOOUT1;
- desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target
+ desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target
break;
- case 0x10: // EB
- case 0x11: // EBU
- case 0x12: // EBL
- case 0x13: // EO
- case 0x15: // ST
- case 0x16: // MOD
- case 0x17: // LRPC
- case 0x34: // PDR
- case 0x35: // DDR
- case 0x36: // PRP
- case 0x37: // PWP
+ case 0x10: // EB
+ case 0x11: // EBU
+ case 0x12: // EBL
+ case 0x13: // EO
+ case 0x15: // ST
+ case 0x16: // MOD
+ case 0x17: // LRPC
+ case 0x34: // PDR
+ case 0x35: // DDR
+ case 0x36: // PRP
+ case 0x37: // PWP
break;
- case 0x30: // PR
+ case 0x30: // PR
desc.userflags &= ~OP_USERFLAG_PW_MASK;
desc.userflags |= OP_USERFLAG_PW_INC;
break;
@@ -347,14 +347,14 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
switch (op)
{
- case 0x00: // FADD
+ case 0x00: // FADD
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x01: // FADDZ
+ case 0x01: // FADDZ
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
ZC_MODIFIED(desc);
AN_MODIFIED(desc);
@@ -363,7 +363,7 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x02: // FSUB
+ case 0x02: // FSUB
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
@@ -371,7 +371,7 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x03: // FSUBZ
+ case 0x03: // FSUBZ
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
ZC_MODIFIED(desc);
AN_MODIFIED(desc);
@@ -380,7 +380,7 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x04: // FCMP
+ case 0x04: // FCMP
describe_alu_input(desc, i1); describe_alu_input(desc, i2);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
@@ -388,36 +388,36 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x05: // FABS
+ case 0x05: // FABS
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x06: // FABC
+ case 0x06: // FABC
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x07: // NOP
+ case 0x07: // NOP
break;
- case 0x08: // FEA
+ case 0x08: // FEA
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x09: // FES
+ case 0x09: // FES
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x0a: // FRCP
+ case 0x0a: // FRCP
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
ZD_MODIFIED(desc);
AN_MODIFIED(desc);
@@ -425,7 +425,7 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x0b: // FRSQ
+ case 0x0b: // FRSQ
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
NR_MODIFIED(desc);
AN_MODIFIED(desc);
@@ -433,26 +433,26 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AU_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x0c: // FLOG
+ case 0x0c: // FLOG
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
IL_MODIFIED(desc);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x0d: // CIF
+ case 0x0d: // CIF
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
break;
- case 0x0e: // CFI
+ case 0x0e: // CFI
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AD_MODIFIED(desc);
break;
- case 0x0f: // CFIB
+ case 0x0f: // CFIB
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
@@ -460,99 +460,99 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop)
AD_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x10: // ADD
+ case 0x10: // ADD
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
break;
- case 0x11: // ADDZ
+ case 0x11: // ADDZ
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
ZC_MODIFIED(desc);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
break;
- case 0x12: // SUB
+ case 0x12: // SUB
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
break;
- case 0x13: // SUBZ
+ case 0x13: // SUBZ
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
ZC_MODIFIED(desc);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
break;
- case 0x14: // CMP
+ case 0x14: // CMP
describe_alu_input(desc, i1); describe_alu_input(desc, i2);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
break;
- case 0x15: // ABS
+ case 0x15: // ABS
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
break;
- case 0x16: // ATR
+ case 0x16: // ATR
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
break;
- case 0x17: // ATRZ
+ case 0x17: // ATRZ
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
ZC_MODIFIED(desc);
break;
- case 0x18: // AND
+ case 0x18: // AND
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x19: // OR
+ case 0x19: // OR
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x1a: // XOR
+ case 0x1a: // XOR
describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x1b: // NOT
+ case 0x1b: // NOT
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x1c: // LSR
+ case 0x1c: // LSR
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x1d: // LSL
+ case 0x1d: // LSL
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
AV_MODIFIED(desc);
AU_MODIFIED(desc);
break;
- case 0x1e: // ASR
+ case 0x1e: // ASR
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
break;
- case 0x1f: // ASL
+ case 0x1f: // ASL
describe_alu_input(desc, i1); describe_alumul_output(desc, io);
AN_MODIFIED(desc);
AZ_MODIFIED(desc);
@@ -593,51 +593,51 @@ void mb86235_frontend::describe_ea(opcode_desc &desc, int md, int arx, int ary,
{
switch (md)
{
- case 0x0: // @ARx
+ case 0x0: // @ARx
AR_USED(desc, arx);
break;
- case 0x1: // @ARx++
+ case 0x1: // @ARx++
AR_USED(desc, arx); AR_MODIFIED(desc, arx);
break;
- case 0x2: // @ARx--
+ case 0x2: // @ARx--
AR_USED(desc, arx); AR_MODIFIED(desc, arx);
break;
- case 0x3: // @ARx++disp
+ case 0x3: // @ARx++disp
AR_USED(desc, arx); AR_MODIFIED(desc, arx);
break;
- case 0x4: // @ARx+ARy
+ case 0x4: // @ARx+ARy
AR_USED(desc, arx); AR_USED(desc, ary);
break;
- case 0x5: // @ARx+ARy++
+ case 0x5: // @ARx+ARy++
AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary);
break;
- case 0x6: // @ARx+ARy--
+ case 0x6: // @ARx+ARy--
AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary);
break;
- case 0x7: // @ARx+ARy++disp
+ case 0x7: // @ARx+ARy++disp
AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary);
break;
- case 0x8: // @ARx+ARyU
+ case 0x8: // @ARx+ARyU
AR_USED(desc, arx); AR_USED(desc, ary);
break;
- case 0x9: // @ARx+ARyL
+ case 0x9: // @ARx+ARyL
AR_USED(desc, arx); AR_USED(desc, ary);
break;
- case 0xa: // @ARx+disp
+ case 0xa: // @ARx+disp
AR_USED(desc, arx);
break;
- case 0xb: // @ARx+ARy+disp
+ case 0xb: // @ARx+ARy+disp
AR_USED(desc, arx); AR_USED(desc, ary);
break;
- case 0xc: // @disp
+ case 0xc: // @disp
break;
- case 0xd: // @ARx+[ARy++]
+ case 0xd: // @ARx+[ARy++]
AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary);
break;
- case 0xe: // @ARx+[ARy--]
+ case 0xe: // @ARx+[ARy--]
AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary);
break;
- case 0xf: // @ARx+[ARy++disp]
+ case 0xf: // @ARx+[ARy++disp]
AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary);
break;
}
@@ -717,7 +717,7 @@ void mb86235_frontend::describe_xfer2(opcode_desc &desc)
int md = opcode & 0xf;
int disp14 = (opcode >> 7) & 0x3fff;
- if (op == 0) // MOV2
+ if (op == 0) // MOV2
{
if (trm == 0)
{
@@ -760,7 +760,7 @@ void mb86235_frontend::describe_xfer2(opcode_desc &desc)
}
}
}
- else if (op == 2) // MOV4
+ else if (op == 2) // MOV4
{
fatalerror("mb86235_frontend: describe_xfer2 MOV4 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode));
}
@@ -785,12 +785,12 @@ void mb86235_frontend::describe_xfer3(opcode_desc &desc)
switch (dr >> 5)
{
case 0:
- case 1: // reg
+ case 1: // reg
describe_reg_write(desc, dr & 0x3f);
break;
- case 2: // RAM-A
- case 3: // RAM-B
+ case 2: // RAM-A
+ case 3: // RAM-B
desc.flags |= OPFLAG_WRITES_MEMORY;
describe_ea(desc, md, dr & 7, ary, disp);
break;
@@ -806,56 +806,56 @@ void mb86235_frontend::describe_control(opcode_desc &desc)
switch (cop)
{
- case 0x00: // NOP
+ case 0x00: // NOP
break;
- case 0x01: // REP
- if (ef1 != 0) // ARx
+ case 0x01: // REP
+ if (ef1 != 0) // ARx
AR_USED(desc, (ef2 >> 12) & 7);
desc.userflags |= OP_USERFLAG_REPEAT;
break;
- case 0x02: // SETL
- if (ef1 != 0) // ARx
+ case 0x02: // SETL
+ if (ef1 != 0) // ARx
AR_USED(desc, (ef2 >> 12) & 7);
break;
- case 0x03: // CLRFI/CLRFO/CLRF
+ case 0x03: // CLRFI/CLRFO/CLRF
break;
- case 0x04: // PUSH
+ case 0x04: // PUSH
describe_reg_read(desc, (ef2 >> 6) & 0x3f);
break;
- case 0x05: // POP
+ case 0x05: // POP
describe_reg_write(desc, (ef2 >> 6) & 0x3f);
break;
- case 0x08: // SETM #imm16
+ case 0x08: // SETM #imm16
break;
- case 0x09: // SETM #imm3, CBSA
+ case 0x09: // SETM #imm3, CBSA
break;
- case 0x0a: // SETM #imm3, CBSB
+ case 0x0a: // SETM #imm3, CBSB
break;
- case 0x0b: // SETM #imm1, RF
+ case 0x0b: // SETM #imm1, RF
break;
- case 0x0c: // SETM #imm1, RDY
+ case 0x0c: // SETM #imm1, RDY
break;
- case 0x0d: // SETM #imm1, WAIT
+ case 0x0d: // SETM #imm1, WAIT
break;
- case 0x13: // DBLP rel12
+ case 0x13: // DBLP rel12
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.targetpc = desc.pc + rel12;
desc.delayslots = 1;
break;
- case 0x14: // DBBC ARx:y, rel12
+ case 0x14: // DBBC ARx:y, rel12
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.targetpc = desc.pc + rel12;
desc.delayslots = 1;
AR_USED(desc, ((desc.opptr.q[0] >> 13) & 7));
break;
- case 0x15: // DBBS ARx:y, rel12
+ case 0x15: // DBBS ARx:y, rel12
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.targetpc = desc.pc + rel12;
desc.delayslots = 1;
AR_USED(desc, ((desc.opptr.q[0] >> 13) & 7));
break;
- case 0x1b: // DRET
+ case 0x1b: // DRET
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
desc.delayslots = 1;
@@ -919,4 +919,4 @@ void mb86235_frontend::describe_control(opcode_desc &desc)
break;
}
}
-} \ No newline at end of file
+}
diff --git a/src/devices/cpu/powerpc/ppccom.cpp b/src/devices/cpu/powerpc/ppccom.cpp
index bea641ad95f..bcdc17ae9a1 100644
--- a/src/devices/cpu/powerpc/ppccom.cpp
+++ b/src/devices/cpu/powerpc/ppccom.cpp
@@ -1505,7 +1505,7 @@ void ppc_device::ppccom_tlb_flush()
void ppc_device::ppccom_get_dsisr()
{
int intent = 0;
-
+
if (m_core->param1 & 1)
{
intent = TRANSLATE_WRITE;
@@ -1514,7 +1514,7 @@ void ppc_device::ppccom_get_dsisr()
{
intent = TRANSLATE_READ;
}
-
+
m_core->param1 = ppccom_translate_address_internal(intent, m_core->param0);
}
diff --git a/src/devices/cpu/powerpc/ppcdrc.cpp b/src/devices/cpu/powerpc/ppcdrc.cpp
index 58cc8c7dc57..4ebf89a61f8 100644
--- a/src/devices/cpu/powerpc/ppcdrc.cpp
+++ b/src/devices/cpu/powerpc/ppcdrc.cpp
@@ -791,9 +791,9 @@ void ppc_device::static_generate_tlb_mismatch()
{
// DAR gets the address, DSISR gets the 'reason' flags
UML_MOV(block, SPR32(SPROEA_DAR), mem(&m_core->param0)); // mov [dar],[param0]
- m_core->param1 = 0; // always a read here
- UML_CALLC(block, (c_function)cfunc_ppccom_get_dsisr, this); // get DSISR to param1
- UML_MOV(block, SPR32(SPROEA_DSISR), mem(&m_core->param1)); // move [dsisr], [param1]
+ m_core->param1 = 0; // always a read here
+ UML_CALLC(block, (c_function)cfunc_ppccom_get_dsisr, this); // get DSISR to param1
+ UML_MOV(block, SPR32(SPROEA_DSISR), mem(&m_core->param1)); // move [dsisr], [param1]
UML_EXH(block, *m_exception[EXCEPTION_ISI], I0); // exh isi,i0
}
else
@@ -1408,9 +1408,9 @@ void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite
{
m_core->param1 = 0;
}
- UML_CALLC(block, (c_function)cfunc_ppccom_get_dsisr, this); // get DSISR to param1
- UML_MOV(block, SPR32(SPROEA_DSISR), mem(&m_core->param1)); // move [dsisr], [param1]
- UML_EXH(block, *m_exception[EXCEPTION_DSI], I0); // exh dsi,i0
+ UML_CALLC(block, (c_function)cfunc_ppccom_get_dsisr, this); // get DSISR to param1
+ UML_MOV(block, SPR32(SPROEA_DSISR), mem(&m_core->param1)); // move [dsisr], [param1]
+ UML_EXH(block, *m_exception[EXCEPTION_DSI], I0); // exh dsi,i0
}
}
diff --git a/src/devices/cpu/tms32025/tms32025.cpp b/src/devices/cpu/tms32025/tms32025.cpp
index 7b8e2352d33..0f3984f7927 100644
--- a/src/devices/cpu/tms32025/tms32025.cpp
+++ b/src/devices/cpu/tms32025/tms32025.cpp
@@ -1798,7 +1798,7 @@ void tms32025_device::device_reset()
m_data->install_ram(0x0200, 0x02ff, m_b0);
}
common_reset();
-
+
}
void tms32026_device::device_reset()
diff --git a/src/devices/machine/68230pit.cpp b/src/devices/machine/68230pit.cpp
index 0b3888ca47d..ab6cbd09a1d 100644
--- a/src/devices/machine/68230pit.cpp
+++ b/src/devices/machine/68230pit.cpp
@@ -215,7 +215,7 @@ uint8_t pit68230_device::irq_tiack()
}
/*
- * trigger_interrupt - called when a potential interrupt condition occurs
+ * trigger_interrupt - called when a potential interrupt condition occurs
* but will only generate an interrupt when the PIT is programmed to do so.
*/
void pit68230_device::trigger_interrupt(int source)
@@ -241,7 +241,7 @@ void pit68230_device::trigger_interrupt(int source)
void pit68230_device::tick_clock()
{
if (m_tcr & REG_TCR_TIMER_ENABLE)
- {
+ {
if (m_cntr-- == 0) // Zero detect
{
LOGINT(("Timer reached zero!\n"));
@@ -612,8 +612,8 @@ void pit68230_device::wr_pitreg_tcr(uint8_t data)
{
m_cntr = 0;
if (pen == 1)
- {
- LOG(("PC2 enable/disable TBD\n"));
+ {
+ LOG(("PC2 enable/disable TBD\n"));
}
if (clk == 1)
{
@@ -659,7 +659,7 @@ void pit68230_device::wr_pitreg_cprl(uint8_t data)
void pit68230_device::wr_pitreg_tsr(uint8_t data)
{
LOG(("%s(%02x) \"%s\": \n", FUNCNAME, data, tag()));
- if (data & 1)
+ if (data & 1)
{
m_tsr = 0; // A write resets the TSR;
m_tirq_out_cb(CLEAR_LINE);
diff --git a/src/devices/machine/68230pit.h b/src/devices/machine/68230pit.h
index 92bfe062b43..30850abb39b 100644
--- a/src/devices/machine/68230pit.h
+++ b/src/devices/machine/68230pit.h
@@ -216,61 +216,61 @@ class pit68230_device : public device_t//, public device_execute_interface
protected:
enum { // PGCR - Port Global Control register
- REG_PGCR_MODE_MASK = 0xc0,
- REG_PGCR_MODE_0 = 0x00, // 0 0 Unidirectional 8 bit mode
- REG_PGCR_MODE_1 = 0x40, // 0 1 Unidirectional 16 bit mode
- REG_PGCR_MODE_2 = 0x80, // 1 0 Bidirectional 8 bit mode
- REG_PGCR_MODE_3 = 0xc0, // 1 1 Bidirectional 16 bit mode
- REG_PGCR_H34_ENABLE = 0x20,
- REG_PGCR_H12_ENABLE = 0x10,
- REG_PGCR_H4_SENSE = 0x80,
- REG_PGCR_H3_SENSE = 0x40,
- REG_PGCR_H2_SENSE = 0x20,
- REG_PGCR_H1_SENSE = 0x10,
+ REG_PGCR_MODE_MASK = 0xc0,
+ REG_PGCR_MODE_0 = 0x00, // 0 0 Unidirectional 8 bit mode
+ REG_PGCR_MODE_1 = 0x40, // 0 1 Unidirectional 16 bit mode
+ REG_PGCR_MODE_2 = 0x80, // 1 0 Bidirectional 8 bit mode
+ REG_PGCR_MODE_3 = 0xc0, // 1 1 Bidirectional 16 bit mode
+ REG_PGCR_H34_ENABLE = 0x20,
+ REG_PGCR_H12_ENABLE = 0x10,
+ REG_PGCR_H4_SENSE = 0x80,
+ REG_PGCR_H3_SENSE = 0x40,
+ REG_PGCR_H2_SENSE = 0x20,
+ REG_PGCR_H1_SENSE = 0x10,
};
enum {
- REG_PACR_SUBMODE_MASK = 0xc0,
- REG_PACR_SUBMODE_0 = 0x00, // 0 0
- REG_PACR_SUBMODE_1 = 0x40, // 0 1
- REG_PACR_SUBMODE_2 = 0x80, // 1 0
- REG_PACR_SUBMODE_3 = 0xc0, // 1 1
- REG_PACR_H2_CTRL_MASK = 0x38,
- REG_PACR_H2_CTRL_IN_OUT = 0x20, // H2 sense always cleared if set
- REG_PACR_H2_CTRL_OUT_00 = 0x20, // H2 output negated
- REG_PACR_H2_CTRL_OUT_01 = 0x28, // H2 output asserted
- REG_PACR_H2_CTRL_OUT_10 = 0x30, // H2 output in interlocked input handshake protocol
- REG_PACR_H2_CTRL_OUT_11 = 0x38, // H2 output in pulsed input handshake protocol
- REG_PACR_H2_INT_ENABLE = 0x04,
- REG_PACR_H1_SVCR_ENABLE = 0x02,
- REG_PACR_H1_STATUS_CTRL = 0x01,
+ REG_PACR_SUBMODE_MASK = 0xc0,
+ REG_PACR_SUBMODE_0 = 0x00, // 0 0
+ REG_PACR_SUBMODE_1 = 0x40, // 0 1
+ REG_PACR_SUBMODE_2 = 0x80, // 1 0
+ REG_PACR_SUBMODE_3 = 0xc0, // 1 1
+ REG_PACR_H2_CTRL_MASK = 0x38,
+ REG_PACR_H2_CTRL_IN_OUT = 0x20, // H2 sense always cleared if set
+ REG_PACR_H2_CTRL_OUT_00 = 0x20, // H2 output negated
+ REG_PACR_H2_CTRL_OUT_01 = 0x28, // H2 output asserted
+ REG_PACR_H2_CTRL_OUT_10 = 0x30, // H2 output in interlocked input handshake protocol
+ REG_PACR_H2_CTRL_OUT_11 = 0x38, // H2 output in pulsed input handshake protocol
+ REG_PACR_H2_INT_ENABLE = 0x04,
+ REG_PACR_H1_SVCR_ENABLE = 0x02,
+ REG_PACR_H1_STATUS_CTRL = 0x01,
};
enum {
- REG_PBCR_SUBMODE_MASK = 0xc0,
- REG_PBCR_SUBMODE_00 = 0x00, // 0 0
- REG_PBCR_SUBMODE_01 = 0x40, // 0 1
- REG_PBCR_SUBMODE_10 = 0x80, // 1 0
- REG_PBCR_SUBMODE_11 = 0xc0, // 1 1
- REG_PBCR_SUBMODE_1X = 0x80, // submode 2 or 3
- REG_PBCR_H4_CTRL_MASK = 0x38,
- REG_PBCR_H4_CTRL_IN_OUT = 0x20, // H4 sense always cleared if set
- REG_PBCR_H4_CTRL_OUT_00 = 0x20, // H4 output negated
- REG_PBCR_H4_CTRL_OUT_01 = 0x28, // H4 output asserted
- REG_PBCR_H4_CTRL_OUT_10 = 0x30, // H4 output in interlocked input handshake protocol
- REG_PBCR_H4_CTRL_OUT_11 = 0x38, // H4 output in pulsed input handshake protocol
- REG_PBCR_H4_INT_ENABLE = 0x04,
+ REG_PBCR_SUBMODE_MASK = 0xc0,
+ REG_PBCR_SUBMODE_00 = 0x00, // 0 0
+ REG_PBCR_SUBMODE_01 = 0x40, // 0 1
+ REG_PBCR_SUBMODE_10 = 0x80, // 1 0
+ REG_PBCR_SUBMODE_11 = 0xc0, // 1 1
+ REG_PBCR_SUBMODE_1X = 0x80, // submode 2 or 3
+ REG_PBCR_H4_CTRL_MASK = 0x38,
+ REG_PBCR_H4_CTRL_IN_OUT = 0x20, // H4 sense always cleared if set
+ REG_PBCR_H4_CTRL_OUT_00 = 0x20, // H4 output negated
+ REG_PBCR_H4_CTRL_OUT_01 = 0x28, // H4 output asserted
+ REG_PBCR_H4_CTRL_OUT_10 = 0x30, // H4 output in interlocked input handshake protocol
+ REG_PBCR_H4_CTRL_OUT_11 = 0x38, // H4 output in pulsed input handshake protocol
+ REG_PBCR_H4_INT_ENABLE = 0x04,
REG_PBCR_H3_SVCRQ_ENABLE= 0x02,
- REG_PBCR_H3_STATUS_CTRL = 0x01,
+ REG_PBCR_H3_STATUS_CTRL = 0x01,
};
enum {
- REG_PCDR_TIN_BIT = 2, // BIT number
- REG_PCDR_TIN = 0x04 // bit position
+ REG_PCDR_TIN_BIT = 2, // BIT number
+ REG_PCDR_TIN = 0x04 // bit position
};
enum {
- REG_TCR_TIMER_ENABLE = 0x01
+ REG_TCR_TIMER_ENABLE = 0x01
};
enum { // TCR - Timer Control register
@@ -333,10 +333,10 @@ protected:
uint8_t m_pbdr; // Port B Data register
uint8_t m_pcdr; // Port C Data register
uint8_t m_psr; // Port Status Register
- uint8_t m_tcr; // Timer Control Register
+ uint8_t m_tcr; // Timer Control Register
uint8_t m_tivr; // Timer Interrupt Vector register
- int m_cpr; // Counter Preload Registers (3 x 8 = 24 bits)
- int m_cntr; // - The 24 bit Counter
+ int m_cpr; // Counter Preload Registers (3 x 8 = 24 bits)
+ int m_cntr; // - The 24 bit Counter
uint8_t m_tsr; // Timer Status Register
diff --git a/src/devices/machine/netlist.cpp b/src/devices/machine/netlist.cpp
index 2301ec49a4f..9f321b52751 100644
--- a/src/devices/machine/netlist.cpp
+++ b/src/devices/machine/netlist.cpp
@@ -249,7 +249,7 @@ void netlist_ram_pointer_t::device_start()
fatalerror("device %s wrong parameter type for %s\n", basetag(), m_param_name.cstr());
}
- m_data = (*m_param)();
+ m_data = (*m_param)();
}
// ----------------------------------------------------------------------------------------
diff --git a/src/devices/machine/netlist.h b/src/devices/machine/netlist.h
index 3a223541091..e4cee9a87fd 100644
--- a/src/devices/machine/netlist.h
+++ b/src/devices/machine/netlist.h
@@ -422,7 +422,7 @@ private:
// ----------------------------------------------------------------------------------------
class netlist_mame_int_input_t : public device_t,
- public netlist_mame_sub_interface
+ public netlist_mame_sub_interface
{
public:
@@ -514,7 +514,7 @@ private:
// ----------------------------------------------------------------------------------------
class netlist_mame_rom_t : public device_t,
- public netlist_mame_sub_interface
+ public netlist_mame_sub_interface
{
public:
@@ -544,7 +544,7 @@ private:
// ----------------------------------------------------------------------------------------
class netlist_ram_pointer_t: public device_t,
- public netlist_mame_sub_interface
+ public netlist_mame_sub_interface
{
public:
diff --git a/src/devices/machine/z80scc.h b/src/devices/machine/z80scc.h
index 496c82f4d45..ce9fa3074f3 100644
--- a/src/devices/machine/z80scc.h
+++ b/src/devices/machine/z80scc.h
@@ -409,7 +409,7 @@ protected:
WR1_RX_INT_MODE_MASK = 0x18,
WR1_RX_INT_DISABLE = 0x00,
WR1_RX_INT_FIRST = 0x08,
- WR1_RX_INT_ALL = 0x10,
+ WR1_RX_INT_ALL = 0x10,
WR1_RX_INT_PARITY = 0x18,
WR1_WRDY_ON_RX_TX = 0x20,
WR1_WRDY_FUNCTION = 0x40,
diff --git a/src/devices/sound/dac76.cpp b/src/devices/sound/dac76.cpp
index 965b74473e6..67fc452b260 100644
--- a/src/devices/sound/dac76.cpp
+++ b/src/devices/sound/dac76.cpp
@@ -33,7 +33,7 @@ const device_type DAC76 = &device_creator<dac76_device>;
// dac76_device - constructor
//-------------------------------------------------
-dac76_device::dac76_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+dac76_device::dac76_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, DAC76, "DAC-76 COMDAC", tag, owner, clock, "dac76", __FILE__),
device_sound_interface(mconfig, *this),
m_stream(nullptr),
diff --git a/src/devices/sound/votrax.cpp b/src/devices/sound/votrax.cpp
index b368a35ea54..bde5fbd6086 100644
--- a/src/devices/sound/votrax.cpp
+++ b/src/devices/sound/votrax.cpp
@@ -17,11 +17,11 @@
0 - - - sram write pulse
i1.o = glottal impulse
-i2.o = white noise
+i2.o = white noise
tp1 = phi clock (tied to f2q rom access)
*/
-
+
#include "emu.h"
#include "votrax.h"
@@ -51,7 +51,7 @@ const char *const votrax_sc01_device::s_phone_table[64] =
// ladder. There is first a transistor to ground, then a series of
// seven transistors one quarter the size of the first one, then it
// finishes by an active resistor to +9V.
-//
+//
// The terminal of the transistor to ground is used as a middle value.
// Index 0 is at that value. Index 1 is at 0V. Index 2 to 8 start at
// just after the resistor down the latter. Indices 9+ are the middle
@@ -438,23 +438,23 @@ void votrax_sc01_device::chip_update()
// The formants are frozen on a pause phone unless both voice and
// noise volumes are zero.
if(tick_208 && (!m_rom_pause || !(m_filt_fa || m_filt_va))) {
- // interpolate(m_cur_va, m_rom_va);
+ // interpolate(m_cur_va, m_rom_va);
interpolate(m_cur_fc, m_rom_fc);
interpolate(m_cur_f1, m_rom_f1);
interpolate(m_cur_f2, m_rom_f2);
interpolate(m_cur_f2q, m_rom_f2q);
interpolate(m_cur_f3, m_rom_f3);
- // logerror("int fa=%x va=%x fc=%x f1=%x f2=%02x f2q=%02x f3=%x\n", m_cur_fa >> 4, m_cur_va >> 4, m_cur_fc >> 4, m_cur_f1 >> 4, m_cur_f2 >> 3, m_cur_f2q >> 4, m_cur_f3 >> 4);
- }
+ // logerror("int fa=%x va=%x fc=%x f1=%x f2=%02x f2q=%02x f3=%x\n", m_cur_fa >> 4, m_cur_va >> 4, m_cur_fc >> 4, m_cur_f1 >> 4, m_cur_f2 >> 3, m_cur_f2q >> 4, m_cur_f3 >> 4);
+ }
// Non-formant update. Same bug there, va should be updated, not fc.
if(tick_625) {
if(m_ticks >= m_rom_vd)
interpolate(m_cur_fa, m_rom_fa);
if(m_ticks >= m_rom_cld)
- // interpolate(m_cur_fc, m_rom_fc);
+ // interpolate(m_cur_fc, m_rom_fc);
interpolate(m_cur_va, m_rom_va);
- // logerror("int fa=%x va=%x fc=%x f1=%x f2=%02x f2q=%02x f3=%x\n", m_cur_fa >> 4, m_cur_va >> 4, m_cur_fc >> 4, m_cur_f1 >> 4, m_cur_f2 >> 3, m_cur_f2q >> 4, m_cur_f3 >> 4);
+ // logerror("int fa=%x va=%x fc=%x f1=%x f2=%02x f2q=%02x f3=%x\n", m_cur_fa >> 4, m_cur_va >> 4, m_cur_fc >> 4, m_cur_f1 >> 4, m_cur_f2 >> 3, m_cur_f2q >> 4, m_cur_f3 >> 4);
}
// Closure counter, reset every other tick in theory when not
@@ -466,7 +466,7 @@ void votrax_sc01_device::chip_update()
if(!m_cur_closure && (m_filt_fa || m_filt_va))
m_closure = 0;
else if(m_closure != 7 << 2)
- m_closure ++;
+ m_closure ++;
// Pitch counter. Equality comparison, so it's possible to make
// it miss by manipulating the inflection inputs, but it'll wrap.
@@ -486,7 +486,7 @@ void votrax_sc01_device::chip_update()
m_noise = ((m_noise << 1) & 0x7ffe) | inp;
m_cur_noise = !(((m_noise >> 14) ^ (m_noise >> 13)) & 1);
- // logerror("tick %02x.%03x 625=%d 208=%d pitch=%02x.%x ns=%04x ni=%d noise=%d cl=%x.%x clf=%d/%d\n", m_ticks, m_phonetick, tick_625, tick_208, m_pitch >> 2, m_pitch & 3, m_noise, inp, m_cur_noise, m_closure >> 2, m_closure & 3, m_rom_closure, m_cur_closure);
+ // logerror("tick %02x.%03x 625=%d 208=%d pitch=%02x.%x ns=%04x ni=%d noise=%d cl=%x.%x clf=%d/%d\n", m_ticks, m_phonetick, tick_625, tick_208, m_pitch >> 2, m_pitch & 3, m_noise, inp, m_cur_noise, m_closure >> 2, m_closure & 3, m_rom_closure, m_cur_closure);
}
void votrax_sc01_device::filters_commit(bool force)
@@ -600,7 +600,7 @@ stream_sample_t votrax_sc01_device::analog_calc()
double n2 = n * m_filt_fc / 15.0;
shift_hist(n2, m_noise_3);
- // 8. Apply the f2 filter, noise half,
+ // 8. Apply the f2 filter, noise half,
n2 = apply_filter(m_noise_3, m_noise_4, m_f2n_a, m_f2n_b);
shift_hist(n2, m_noise_4);
@@ -893,7 +893,7 @@ void votrax_sc01_device::build_lowpass_filter(double *a, double *b,
/*
Used to shape the white noise
-
+
+-------------------------------------------------------------------+
| |
+--|C1|--+---------|C3|----------+--|C4|--+ |
@@ -902,10 +902,10 @@ void votrax_sc01_device::build_lowpass_filter(double *a, double *b,
-|R0|-+--+-\ | | | | |\ | (1) (1) |
| >--+--(2)-+--|C2|--+---(2)-+--+-\ | | | |
0-++/ | | >--+--(2)--+--|C5|--+---(2)--+
- |/ Vo 0-++/
+ |/ Vo 0-++/
|/
Equivalent:
-
+
+------------------|R5|-------------------+
| |
+--|C1|--+---------|C3|----------+--|C4|--+
@@ -914,7 +914,7 @@ void votrax_sc01_device::build_lowpass_filter(double *a, double *b,
-|R0|-+--+-\ | | |\ |
| >--+---------|R2|----------+--+-\ |
0-++/ | | >--+
- |/ Vo 0-++/
+ |/ Vo 0-++/
|/
We assume r0 = r2
@@ -980,7 +980,7 @@ void votrax_sc01_device::build_injection_filter(double *a, double *b,
double c2b, // Switched cap, over first amp-op, bottom
double c3, // Cap between the two op-amps
double c4) // Cap over second op-amp
-{
+{
// First compute the three coefficients of H(s) = (k0 + k2*s)/(k1 - k2*s)
double k0 = m_cclock * c2t;
double k1 = m_cclock * (c1b * c3 / c2t - c2t);
diff --git a/src/devices/video/ef9369.cpp b/src/devices/video/ef9369.cpp
index d373fea132f..7d97888b845 100644
--- a/src/devices/video/ef9369.cpp
+++ b/src/devices/video/ef9369.cpp
@@ -100,5 +100,5 @@ WRITE8_MEMBER( ef9369_device::data_w )
WRITE8_MEMBER( ef9369_device::address_w )
{
- m_address = data & 0x1f; // 5-bit
+ m_address = data & 0x1f; // 5-bit
}
diff --git a/src/devices/video/ef9369.h b/src/devices/video/ef9369.h
index d31c447dba4..3689e8c6f00 100644
--- a/src/devices/video/ef9369.h
+++ b/src/devices/video/ef9369.h
@@ -48,7 +48,7 @@
//**************************************************************************
typedef device_delegate<void (int entry, bool m, uint8_t ca, uint8_t cb, uint8_t cc)> ef9369_color_update_delegate;
-#define EF9369_COLOR_UPDATE(name) void name(int entry, bool m, uint8_t ca, uint8_t cb, uint8_t cc)
+#define EF9369_COLOR_UPDATE(name) void name(int entry, bool m, uint8_t ca, uint8_t cb, uint8_t cc)
// ======================> ef9369_device
@@ -76,7 +76,7 @@ private:
ef9369_color_update_delegate m_color_update_cb;
// state
- uint8_t m_ca[NUMCOLORS], m_cb[NUMCOLORS], m_cc[NUMCOLORS]; // actually 4-bit
+ uint8_t m_ca[NUMCOLORS], m_cb[NUMCOLORS], m_cc[NUMCOLORS]; // actually 4-bit
bool m_m[NUMCOLORS];
int m_address;
};
diff --git a/src/devices/video/zeus2.cpp b/src/devices/video/zeus2.cpp
index 01806e7be3c..45750a15d4d 100644
--- a/src/devices/video/zeus2.cpp
+++ b/src/devices/video/zeus2.cpp
@@ -716,7 +716,7 @@ void zeus2_device::zeus2_register_update(offs_t offset, uint32_t oldval, int log
}
/* make sure we log anything else */
//else if (logit || m_zeusbase[0x50] != 0x0)
- // logerror("\tw[50]=%08X [5E]=%08X\n", m_zeusbase[0x50], m_zeusbase[0x5e]);
+ // logerror("\tw[50]=%08X [5E]=%08X\n", m_zeusbase[0x50], m_zeusbase[0x5e]);
}
}
break;
@@ -1634,14 +1634,14 @@ void zeus2_renderer::zeus2_draw_quad(const uint32_t *databuffer, uint32_t texdat
vert[i].p[0] += m_state->zeus_point[2];
}
//if (0)
- // //vert[i].p[0] += m_state->zbase;
- // vert[i].p[0] += reinterpret_cast<float&>(m_state->m_zeusbase[0x63]);
+ // //vert[i].p[0] += m_state->zbase;
+ // vert[i].p[0] += reinterpret_cast<float&>(m_state->m_zeusbase[0x63]);
//else {
int shift;
shift = 1024 >> m_state->m_zeusbase[0x6c];
vert[i].p[0] += shift;
- // //float zScale = reinterpret_cast<float&>(m_state->m_zeusbase[0x63]);
- // //vert[i].p[0] += zScale;
+ // //float zScale = reinterpret_cast<float&>(m_state->m_zeusbase[0x63]);
+ // //vert[i].p[0] += zScale;
//}
vert[i].p[2] += (texdata >> 16) << 2;
diff --git a/src/frontend/mame/mame.cpp b/src/frontend/mame/mame.cpp
index 31d8fb447e0..c8e73eba670 100644
--- a/src/frontend/mame/mame.cpp
+++ b/src/frontend/mame/mame.cpp
@@ -155,7 +155,7 @@ void mame_machine_manager::start_luaengine()
std::string error_string;
m_plugins->set_value("console", "1", OPTION_PRIORITY_CMDLINE, error_string);
}
-
+
m_lua->initialize();
{
diff --git a/src/frontend/mame/ui/filesel.cpp b/src/frontend/mame/ui/filesel.cpp
index 2efe4e0e24f..6bd84863db7 100644
--- a/src/frontend/mame/ui/filesel.cpp
+++ b/src/frontend/mame/ui/filesel.cpp
@@ -336,7 +336,7 @@ void menu_file_selector::populate(float &customtop, float &custombottom)
// mark first filename entry
first = m_entrylist.size() + 1;
-
+
// build the menu for each item
if (err == osd_file::error::NONE)
{
@@ -361,7 +361,7 @@ void menu_file_selector::populate(float &customtop, float &custombottom)
// sort the menu entries
std::wstring_convert<std::codecvt_utf8<wchar_t>> conv;
const std::collate<wchar_t>& coll = std::use_facet<std::collate<wchar_t>>(std::locale());
- std::sort(m_entrylist.begin()+first, m_entrylist.end(), [&coll, &conv](file_selector_entry const &x, file_selector_entry const &y)
+ std::sort(m_entrylist.begin()+first, m_entrylist.end(), [&coll, &conv](file_selector_entry const &x, file_selector_entry const &y)
{
std::wstring xstr = conv.from_bytes(x.basename);
std::wstring ystr = conv.from_bytes(y.basename);
diff --git a/src/lib/netlist/build/makefile b/src/lib/netlist/build/makefile
index 44c981fd332..f9710655d26 100644
--- a/src/lib/netlist/build/makefile
+++ b/src/lib/netlist/build/makefile
@@ -143,7 +143,7 @@ clean:
nltool: $(OBJ)/prg/nltool.o $(OBJS)
@echo Linking $@...
- $(LD) -o $@ $(LDFLAGS) $^ $(LIBS)
+ $(LD) -o $@ $(LDFLAGS) $^ $(LIBS)
nlwav: $(OBJ)/prg/nlwav.o $(OBJS)
@echo Linking $@...
@@ -164,14 +164,14 @@ maketree: $(sort $(OBJDIRS))
.PHONY: clang mingw doc
-clang:
+clang:
$(MAKE) CC=clang++ LD=clang++ CEXTRAFLAGS="-Weverything -Werror -Wno-padded -Wno-weak-vtables -Wno-missing-variable-declarations -Wconversion -Wno-c++98-compat -Wno-float-equal -Wno-cast-align -Wno-global-constructors -Wno-c++98-compat-pedantic -Wno-exit-time-destructors -Wno-format-nonliteral -Wno-weak-template-vtables"
-#
-# FIXME: -Wno-weak-vtables -Wno-missing-variable-declarations -Wno-conversion -Wno-exit-time-destructors
-#
+#
+# FIXME: -Wno-weak-vtables -Wno-missing-variable-declarations -Wno-conversion -Wno-exit-time-destructors
+#
-mingw:
+mingw:
$(MAKE) LDEXTRAFLAGS="-Wl,--subsystem,console" LIBS= MD=@mkdir.exe SHELL=sh.exe
#
@@ -210,7 +210,7 @@ $(OBJ)/%.o: $(SRC)/%.cpp
@echo Compiling $<...
@$(CC) $(CDEFS) $(CFLAGS) -c $< -o $@
-$(OBJ)/%.pp: $(SRC)/%.cpp
+$(OBJ)/%.pp: $(SRC)/%.cpp
@echo Compiling $<...
@$(CC) $(CDEFS) $(CFLAGS) -E $< -o $@
diff --git a/src/lib/netlist/devices/net_lib.cpp b/src/lib/netlist/devices/net_lib.cpp
index fbff8508574..b989fdd73c9 100644
--- a/src/lib/netlist/devices/net_lib.cpp
+++ b/src/lib/netlist/devices/net_lib.cpp
@@ -143,8 +143,8 @@ static void initialize_factory(factory_list_t &factory)
ENTRYX(9312, TTL_9312, "-")
ENTRYX(9316, TTL_9316, "+CLK,ENP,ENT,CLRQ,LOADQ,A,B,C,D")
ENTRYX(9322, TTL_9322, "-")
- ENTRYX(9334, TTL_9334, "+CQ,EQ,D,A0,A1,A2")
- ENTRYX(AM2847, TTL_AM2847, "+CP,INA,INB,INC,IND,RCA,RCB,RCC,RCD")
+ ENTRYX(9334, TTL_9334, "+CQ,EQ,D,A0,A1,A2")
+ ENTRYX(AM2847, TTL_AM2847, "+CP,INA,INB,INC,IND,RCA,RCB,RCC,RCD")
ENTRYX(CD4020, CD4020, "")
ENTRYX(CD4066_GATE, CD4066_GATE, "")
/* entries with suffix WI are legacy only */
@@ -153,8 +153,8 @@ static void initialize_factory(factory_list_t &factory)
ENTRYX(NE555, NE555, "-")
ENTRYX(r2r_dac, R2R_DAC, "+VIN,R,N")
ENTRYX(tristate, TTL_TRISTATE, "+CEQ1,D1,CEQ2,D2")
- ENTRYX(tristate3, TTL_TRISTATE3, "-")
- ENTRYX(2102A_dip, RAM_2102A_DIP, "-")
+ ENTRYX(tristate3, TTL_TRISTATE3, "-")
+ ENTRYX(2102A_dip, RAM_2102A_DIP, "-")
ENTRYX(2716_dip, EPROM_2716_DIP, "-")
ENTRYX(4538_dip, CD4538_DIP, "-")
ENTRYX(7448_dip, TTL_7448_DIP, "-")
@@ -191,7 +191,7 @@ static void initialize_factory(factory_list_t &factory)
ENTRYX(9316_dip, TTL_9316_DIP, "-")
ENTRYX(9322_dip, TTL_9322_DIP, "-")
ENTRYX(9334_dip, TTL_9334_DIP, "-")
- ENTRYX(AM2847_dip, TTL_AM2847_DIP, "-")
+ ENTRYX(AM2847_dip, TTL_AM2847_DIP, "-")
ENTRYX(SN74LS629_dip, SN74LS629_DIP, "1.CAP1,2.CAP2")
ENTRYX(NE555_dip, NE555_DIP, "-")
ENTRYX(MM5837_dip, MM5837_DIP, "-")
diff --git a/src/lib/netlist/devices/nld_2102A.cpp b/src/lib/netlist/devices/nld_2102A.cpp
index 45a7ee53c34..da8ffc3cc1d 100644
--- a/src/lib/netlist/devices/nld_2102A.cpp
+++ b/src/lib/netlist/devices/nld_2102A.cpp
@@ -7,8 +7,8 @@
#include "nld_2102A.h"
-#define ADDR2BYTE(a) ((a) >> 3)
-#define ADDR2BIT(a) ((a) & 0x7)
+#define ADDR2BYTE(a) ((a) >> 3)
+#define ADDR2BIT(a) ((a) & 0x7)
namespace netlist
{
diff --git a/src/lib/netlist/devices/nld_2102A.h b/src/lib/netlist/devices/nld_2102A.h
index fe2feebf38e..bec20f9bd8c 100644
--- a/src/lib/netlist/devices/nld_2102A.h
+++ b/src/lib/netlist/devices/nld_2102A.h
@@ -26,20 +26,20 @@
#include "nl_setup.h"
-#define RAM_2102A(name, cCEQ, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cA9, cRWQ, cDI) \
- NET_REGISTER_DEV(RAM_2102A, name) \
- NET_CONNECT(name, CEQ, cCEQ) \
- NET_CONNECT(name, A0, cA0) \
- NET_CONNECT(name, A1, cA1) \
- NET_CONNECT(name, A2, cA2) \
- NET_CONNECT(name, A3, cA3) \
- NET_CONNECT(name, A4, cA4) \
- NET_CONNECT(name, A5, cA5) \
- NET_CONNECT(name, A6, cA6) \
- NET_CONNECT(name, A7, cA7) \
- NET_CONNECT(name, A8, cA8) \
- NET_CONNECT(name, A9, cA9) \
- NET_CONNECT(name, RWQ, cRWQ) \
+#define RAM_2102A(name, cCEQ, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cA9, cRWQ, cDI) \
+ NET_REGISTER_DEV(RAM_2102A, name) \
+ NET_CONNECT(name, CEQ, cCEQ) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, A4, cA4) \
+ NET_CONNECT(name, A5, cA5) \
+ NET_CONNECT(name, A6, cA6) \
+ NET_CONNECT(name, A7, cA7) \
+ NET_CONNECT(name, A8, cA8) \
+ NET_CONNECT(name, A9, cA9) \
+ NET_CONNECT(name, RWQ, cRWQ) \
NET_CONNECT(name, DI, cDI)
#define RAM_2102A_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_2716.cpp b/src/lib/netlist/devices/nld_2716.cpp
index 45cedba592b..68cf4dcc134 100644
--- a/src/lib/netlist/devices/nld_2716.cpp
+++ b/src/lib/netlist/devices/nld_2716.cpp
@@ -78,10 +78,10 @@ namespace netlist
for (std::size_t i=0; i<11; i++)
a |= (m_A[i]() << i);
- if (m_ROM() != nullptr)
- {
- d = ((std::uint_fast8_t*)(m_ROM()))[a];
- }
+ if (m_ROM() != nullptr)
+ {
+ d = ((std::uint_fast8_t*)(m_ROM()))[a];
+ }
if (m_last_EPQ)
delay = NLTIME_FROM_NS(120);
diff --git a/src/lib/netlist/devices/nld_2716.h b/src/lib/netlist/devices/nld_2716.h
index 72a02a2166e..c96c726c11d 100644
--- a/src/lib/netlist/devices/nld_2716.h
+++ b/src/lib/netlist/devices/nld_2716.h
@@ -30,20 +30,20 @@
#include "nl_setup.h"
-#define EPROM_2716(name, cGQ, cEPQ, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cA9, cA10) \
+#define EPROM_2716(name, cGQ, cEPQ, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cA9, cA10) \
NET_REGISTER_DEV(EPROM_2716, name) \
- NET_CONNECT(name, GQ, cGQ) \
- NET_CONNECT(name, EPQ, cEPQ) \
- NET_CONNECT(name, A0, cA0) \
- NET_CONNECT(name, A1, cA1) \
- NET_CONNECT(name, A2, cA2) \
- NET_CONNECT(name, A3, cA3) \
- NET_CONNECT(name, A4, cA4) \
- NET_CONNECT(name, A5, cA5) \
- NET_CONNECT(name, A6, cA6) \
- NET_CONNECT(name, A7, cA7) \
- NET_CONNECT(name, A8, cA8) \
- NET_CONNECT(name, A9, cA9) \
+ NET_CONNECT(name, GQ, cGQ) \
+ NET_CONNECT(name, EPQ, cEPQ) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, A4, cA4) \
+ NET_CONNECT(name, A5, cA5) \
+ NET_CONNECT(name, A6, cA6) \
+ NET_CONNECT(name, A7, cA7) \
+ NET_CONNECT(name, A8, cA8) \
+ NET_CONNECT(name, A9, cA9) \
NET_CONNECT(name, A10, cA10)
#define EPROM_2716_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_74107.h b/src/lib/netlist/devices/nld_74107.h
index d6e10fc95a4..ed940f8170f 100644
--- a/src/lib/netlist/devices/nld_74107.h
+++ b/src/lib/netlist/devices/nld_74107.h
@@ -76,7 +76,7 @@
#define TTL_74107(name, cCLK, cJ, cK, cCLRQ) \
TTL_74107A(name, cCLK, cJ, cK, cCLRQ)
-#define TTL_74107_DIP(name) \
+#define TTL_74107_DIP(name) \
NET_REGISTER_DEV(TTL_74107_DIP, name)
#endif /* NLD_74107_H_ */
diff --git a/src/lib/netlist/devices/nld_74161.cpp b/src/lib/netlist/devices/nld_74161.cpp
index 4d616d93015..d6e31f36417 100644
--- a/src/lib/netlist/devices/nld_74161.cpp
+++ b/src/lib/netlist/devices/nld_74161.cpp
@@ -96,31 +96,31 @@ namespace netlist
netlist_sig_t tRippleCarryOut = 0;
if (!m_CLRQ())
{
- m_cnt = 0;
+ m_cnt = 0;
}
else if (m_CLK() && !m_last_CLK)
{
if (!m_LOADQ())
{
- m_cnt = (m_D() << 3) | (m_C() << 2)
+ m_cnt = (m_D() << 3) | (m_C() << 2)
| (m_B() << 1) | (m_A() << 0);
- }
+ }
else if (m_ENABLET() && m_ENABLEP())
{
m_cnt++;
if (m_cnt > MAXCNT)
m_cnt = 0;
- }
+ }
}
if (m_ENABLET() && (m_cnt == MAXCNT))
- {
- tRippleCarryOut = 1;
- }
+ {
+ tRippleCarryOut = 1;
+ }
m_last_CLK = m_CLK();
- for (std::size_t i=0; i<4; i++)
+ for (std::size_t i=0; i<4; i++)
m_Q[i].push((m_cnt >> i) & 1, delay[i]);
m_RCO.push(tRippleCarryOut, NLTIME_FROM_NS(20)); //FIXME
diff --git a/src/lib/netlist/devices/nld_74161.h b/src/lib/netlist/devices/nld_74161.h
index efff5466593..1a6b6b2ca87 100644
--- a/src/lib/netlist/devices/nld_74161.h
+++ b/src/lib/netlist/devices/nld_74161.h
@@ -28,14 +28,14 @@
#include "nl_setup.h"
#define TTL_74161(name, cA, cB, cC, cD, cCLRQ, cLOADQ, cCLK, cENABLEP, cENABLET) \
- NET_REGISTER_DEV(TTL_74161, name) \
- NET_CONNECT(name, A, cA) \
- NET_CONNECT(name, B, cB) \
- NET_CONNECT(name, C, cC) \
- NET_CONNECT(name, D, cD) \
- NET_CONNECT(name, CLRQ, cCLRQ) \
- NET_CONNECT(name, LOADQ, cLOADQ) \
- NET_CONNECT(name, CLK, cCLK) \
+ NET_REGISTER_DEV(TTL_74161, name) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, CLRQ, cCLRQ) \
+ NET_CONNECT(name, LOADQ, cLOADQ) \
+ NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, ENABLEP, cENABLEP) \
NET_CONNECT(name, ENABLET, cENABLET)
diff --git a/src/lib/netlist/devices/nld_74165.h b/src/lib/netlist/devices/nld_74165.h
index a724cb81da7..30970f5a20e 100644
--- a/src/lib/netlist/devices/nld_74165.h
+++ b/src/lib/netlist/devices/nld_74165.h
@@ -29,19 +29,19 @@
#include "nl_setup.h"
-#define TTL_74165(name, cCLK, cCLKINH, cSH_LDQ, cSER, cA, cB, cC, cD, cE, cF, cG, cH) \
- NET_REGISTER_DEV(TTL_74165, name) \
- NET_CONNECT(name, CLK, cCLK) \
- NET_CONNECT(name, CLKINH, cCLKINH) \
- NET_CONNECT(name, SH_LDQ, cSH_LDQ) \
- NET_CONNECT(name, SER, cSER) \
- NET_CONNECT(name, A, cA) \
- NET_CONNECT(name, B, cB) \
- NET_CONNECT(name, C, cC) \
- NET_CONNECT(name, D, cD) \
- NET_CONNECT(name, E, cE) \
- NET_CONNECT(name, F, cF) \
- NET_CONNECT(name, G, cG) \
+#define TTL_74165(name, cCLK, cCLKINH, cSH_LDQ, cSER, cA, cB, cC, cD, cE, cF, cG, cH) \
+ NET_REGISTER_DEV(TTL_74165, name) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, CLKINH, cCLKINH) \
+ NET_CONNECT(name, SH_LDQ, cSH_LDQ) \
+ NET_CONNECT(name, SER, cSER) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, E, cE) \
+ NET_CONNECT(name, F, cF) \
+ NET_CONNECT(name, G, cG) \
NET_CONNECT(name, H, cH)
#define TTL_74165_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_74166.h b/src/lib/netlist/devices/nld_74166.h
index 0bd3d7eaadd..bf5bbc8d0d8 100644
--- a/src/lib/netlist/devices/nld_74166.h
+++ b/src/lib/netlist/devices/nld_74166.h
@@ -29,20 +29,20 @@
#include "nl_setup.h"
-#define TTL_74166(name, cCLK, cCLKINH, cSH_LDQ, cSER, cA, cB, cC, cD, cE, cF, cG, cH, cCLRQ) \
- NET_REGISTER_DEV(TTL_74166, name) \
- NET_CONNECT(name, CLK, cCLK) \
- NET_CONNECT(name, CLKINH, cCLKINH) \
- NET_CONNECT(name, SH_LDQ, cSH_LDQ) \
- NET_CONNECT(name, SER, cSER) \
- NET_CONNECT(name, A, cA) \
- NET_CONNECT(name, B, cB) \
- NET_CONNECT(name, C, cC) \
- NET_CONNECT(name, D, cD) \
- NET_CONNECT(name, E, cE) \
- NET_CONNECT(name, F, cF) \
- NET_CONNECT(name, G, cG) \
- NET_CONNECT(name, H, cH) \
+#define TTL_74166(name, cCLK, cCLKINH, cSH_LDQ, cSER, cA, cB, cC, cD, cE, cF, cG, cH, cCLRQ) \
+ NET_REGISTER_DEV(TTL_74166, name) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, CLKINH, cCLKINH) \
+ NET_CONNECT(name, SH_LDQ, cSH_LDQ) \
+ NET_CONNECT(name, SER, cSER) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, E, cE) \
+ NET_CONNECT(name, F, cF) \
+ NET_CONNECT(name, G, cG) \
+ NET_CONNECT(name, H, cH) \
NET_CONNECT(name, CLRQ, cCLRQ)
#define TTL_74166_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_74174.h b/src/lib/netlist/devices/nld_74174.h
index 50398607f88..43125b6af96 100644
--- a/src/lib/netlist/devices/nld_74174.h
+++ b/src/lib/netlist/devices/nld_74174.h
@@ -38,15 +38,15 @@
#include "nl_setup.h"
-#define TTL_74174(name, cCLK, cD1, cD2, cD3, cD4, cD5, cD6, cCLRQ) \
- NET_REGISTER_DEV(TTL_74174, name) \
- NET_CONNECT(name, CLK, cCLK) \
- NET_CONNECT(name, D1, cD1) \
- NET_CONNECT(name, D2, cD2) \
- NET_CONNECT(name, D3, cD3) \
- NET_CONNECT(name, D4, cD4) \
- NET_CONNECT(name, D5, cD5) \
- NET_CONNECT(name, D6, cD6) \
+#define TTL_74174(name, cCLK, cD1, cD2, cD3, cD4, cD5, cD6, cCLRQ) \
+ NET_REGISTER_DEV(TTL_74174, name) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, D1, cD1) \
+ NET_CONNECT(name, D2, cD2) \
+ NET_CONNECT(name, D3, cD3) \
+ NET_CONNECT(name, D4, cD4) \
+ NET_CONNECT(name, D5, cD5) \
+ NET_CONNECT(name, D6, cD6) \
NET_CONNECT(name, CLRQ, cCLRQ)
#define TTL_74174_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_74175.h b/src/lib/netlist/devices/nld_74175.h
index 9487bc926ab..27dd01a2360 100644
--- a/src/lib/netlist/devices/nld_74175.h
+++ b/src/lib/netlist/devices/nld_74175.h
@@ -38,13 +38,13 @@
#include "nl_setup.h"
-#define TTL_74175(name, cCLK, cD1, cD2, cD3, cD4, cCLRQ) \
- NET_REGISTER_DEV(TTL_74175, name) \
- NET_CONNECT(name, CLK, cCLK) \
- NET_CONNECT(name, D1, cD1) \
- NET_CONNECT(name, D2, cD2) \
- NET_CONNECT(name, D3, cD3) \
- NET_CONNECT(name, D4, cD4) \
+#define TTL_74175(name, cCLK, cD1, cD2, cD3, cD4, cCLRQ) \
+ NET_REGISTER_DEV(TTL_74175, name) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, D1, cD1) \
+ NET_CONNECT(name, D2, cD2) \
+ NET_CONNECT(name, D3, cD3) \
+ NET_CONNECT(name, D4, cD4) \
NET_CONNECT(name, CLRQ, cCLRQ)
#define TTL_74175_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_74192.h b/src/lib/netlist/devices/nld_74192.h
index 1afb152961a..8c82006fe6c 100644
--- a/src/lib/netlist/devices/nld_74192.h
+++ b/src/lib/netlist/devices/nld_74192.h
@@ -31,15 +31,15 @@
#include "nl_setup.h"
-#define TTL_74192(name, cA, cB, cC, cD, cCLEAR, cLOADQ, cCU, cCD) \
- NET_REGISTER_DEV(TTL_74192, name) \
- NET_CONNECT(name, A, cA) \
- NET_CONNECT(name, B, cB) \
- NET_CONNECT(name, C, cC) \
- NET_CONNECT(name, D, cD) \
- NET_CONNECT(name, CLEAR, cCLEAR) \
- NET_CONNECT(name, LOADQ, cLOADQ) \
- NET_CONNECT(name, CU, cCU) \
+#define TTL_74192(name, cA, cB, cC, cD, cCLEAR, cLOADQ, cCU, cCD) \
+ NET_REGISTER_DEV(TTL_74192, name) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, CLEAR, cCLEAR) \
+ NET_CONNECT(name, LOADQ, cLOADQ) \
+ NET_CONNECT(name, CU, cCU) \
NET_CONNECT(name, CD, cCD)
#define TTL_74192_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_74193.h b/src/lib/netlist/devices/nld_74193.h
index f89eb782911..53b6165e9f9 100644
--- a/src/lib/netlist/devices/nld_74193.h
+++ b/src/lib/netlist/devices/nld_74193.h
@@ -28,15 +28,15 @@
#include "nl_setup.h"
-#define TTL_74193(name, cA, cB, cC, cD, cCLEAR, cLOADQ, cCU, cCD) \
- NET_REGISTER_DEV(TTL_74193, name) \
- NET_CONNECT(name, A, cA) \
- NET_CONNECT(name, B, cB) \
- NET_CONNECT(name, C, cC) \
- NET_CONNECT(name, D, cD) \
+#define TTL_74193(name, cA, cB, cC, cD, cCLEAR, cLOADQ, cCU, cCD) \
+ NET_REGISTER_DEV(TTL_74193, name) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
NET_CONNECT(name, CLEAR, cCLEAR) \
NET_CONNECT(name, LOADQ, cLOADQ) \
- NET_CONNECT(name, CU, cCU) \
+ NET_CONNECT(name, CU, cCU) \
NET_CONNECT(name, CD, cCD)
#define TTL_74193_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_74194.h b/src/lib/netlist/devices/nld_74194.h
index 703cf85a916..3207495c725 100644
--- a/src/lib/netlist/devices/nld_74194.h
+++ b/src/lib/netlist/devices/nld_74194.h
@@ -28,17 +28,17 @@
#include "nl_setup.h"
-#define TTL_74194(name, cCLK, cS0, cS1, cSRIN, cA, cB, cC, cD, cSLIN, cCLRQ) \
- NET_REGISTER_DEV(TTL_74194, name) \
- NET_CONNECT(name, CLK, cCLK) \
- NET_CONNECT(name, S0, cS0) \
- NET_CONNECT(name, S1, cC1) \
- NET_CONNECT(name, SRIN, cSRIN) \
- NET_CONNECT(name, A, cA) \
- NET_CONNECT(name, B, cB) \
- NET_CONNECT(name, C, cC) \
- NET_CONNECT(name, D, cD) \
- NET_CONNECT(name, SLIN, cSLIN) \
+#define TTL_74194(name, cCLK, cS0, cS1, cSRIN, cA, cB, cC, cD, cSLIN, cCLRQ) \
+ NET_REGISTER_DEV(TTL_74194, name) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, S0, cS0) \
+ NET_CONNECT(name, S1, cC1) \
+ NET_CONNECT(name, SRIN, cSRIN) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, SLIN, cSLIN) \
NET_CONNECT(name, CLRQ, cCLRQ)
#define TTL_74194_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_74365.h b/src/lib/netlist/devices/nld_74365.h
index 65bfd1a2a57..2a7fb230e5e 100644
--- a/src/lib/netlist/devices/nld_74365.h
+++ b/src/lib/netlist/devices/nld_74365.h
@@ -27,15 +27,15 @@
#include "nl_setup.h"
-#define TTL_74365(name, cG1Q, cG2Q, cA1, cA2, cA3, cA4, cA5, cA6) \
- NET_REGISTER_DEV(TTL_74365, name) \
- NET_CONNECT(name, G1Q, cG1Q) \
- NET_CONNECT(name, G2Q, cG2Q) \
- NET_CONNECT(name, A1, cA1) \
- NET_CONNECT(name, A2, cA2) \
- NET_CONNECT(name, A3, cA3) \
- NET_CONNECT(name, A4, cA4) \
- NET_CONNECT(name, A5, cA5) \
+#define TTL_74365(name, cG1Q, cG2Q, cA1, cA2, cA3, cA4, cA5, cA6) \
+ NET_REGISTER_DEV(TTL_74365, name) \
+ NET_CONNECT(name, G1Q, cG1Q) \
+ NET_CONNECT(name, G2Q, cG2Q) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, A4, cA4) \
+ NET_CONNECT(name, A5, cA5) \
NET_CONNECT(name, A6, cA6)
#define TTL_74365_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_7473.cpp b/src/lib/netlist/devices/nld_7473.cpp
index e65e8676065..fc73b97c201 100644
--- a/src/lib/netlist/devices/nld_7473.cpp
+++ b/src/lib/netlist/devices/nld_7473.cpp
@@ -18,14 +18,14 @@ namespace netlist
, m_J(*this, "J")
, m_K(*this, "K")
, m_CLRQ(*this, "CLRQ")
- , m_last_CLK(*this, "m_last_CLK", 0)
- , m_q(*this, "m_q", 0)
+ , m_last_CLK(*this, "m_last_CLK", 0)
+ , m_q(*this, "m_q", 0)
, m_Q(*this, "Q")
, m_QQ(*this, "QQ")
{
}
- NETLIB_RESETI();
+ NETLIB_RESETI();
NETLIB_UPDATEI();
public:
@@ -34,10 +34,10 @@ namespace netlist
logic_input_t m_K;
logic_input_t m_CLRQ;
- state_var<unsigned> m_last_CLK;
- state_var<unsigned> m_q;
+ state_var<unsigned> m_last_CLK;
+ state_var<unsigned> m_q;
- logic_output_t m_Q;
+ logic_output_t m_Q;
logic_output_t m_QQ;
};
@@ -104,38 +104,38 @@ namespace netlist
NETLIB_SUB(7473A) m_2;
};
- NETLIB_RESET(7473)
- {
- m_last_CLK = 0;
- }
+ NETLIB_RESET(7473)
+ {
+ m_last_CLK = 0;
+ }
- NETLIB_UPDATE(7473)
+ NETLIB_UPDATE(7473)
{
const auto JK = (m_J() << 1) | m_K();
if (m_CLRQ())
{
if (!m_CLK() && m_last_CLK)
- {
- switch (JK)
- {
- case 1: // (!m_J) & m_K))
- m_q = 0;
- break;
- case 2: // (m_J) & !m_K))
- m_q = 1;
- break;
- case 3: // (m_J) & m_K))
- m_q ^= 1;
- break;
- default:
- case 0:
- break;
- }
- }
+ {
+ switch (JK)
+ {
+ case 1: // (!m_J) & m_K))
+ m_q = 0;
+ break;
+ case 2: // (m_J) & !m_K))
+ m_q = 1;
+ break;
+ case 3: // (m_J) & m_K))
+ m_q ^= 1;
+ break;
+ default:
+ case 0:
+ break;
+ }
+ }
}
- m_last_CLK = m_CLK();
+ m_last_CLK = m_CLK();
m_Q.push(m_q, NLTIME_FROM_NS(20)); // FIXME: timing
m_QQ.push(m_q ^ 1, NLTIME_FROM_NS(20)); // FIXME: timing
diff --git a/src/lib/netlist/devices/nld_7473.h b/src/lib/netlist/devices/nld_7473.h
index 58927048e2e..344e768cc44 100644
--- a/src/lib/netlist/devices/nld_7473.h
+++ b/src/lib/netlist/devices/nld_7473.h
@@ -62,21 +62,21 @@
#include "nl_setup.h"
-#define TTL_7473(name, cCLK, cJ, cK, cCLRQ) \
- NET_REGISTER_DEV(TTL_7473, name) \
- NET_CONNECT(name, CLK, cCLK) \
- NET_CONNECT(name, J, cJ) \
- NET_CONNECT(name, K, cK) \
+#define TTL_7473(name, cCLK, cJ, cK, cCLRQ) \
+ NET_REGISTER_DEV(TTL_7473, name) \
+ NET_CONNECT(name, CLK, cCLK) \
+ NET_CONNECT(name, J, cJ) \
+ NET_CONNECT(name, K, cK) \
NET_CONNECT(name, CLRQ, cCLRQ)
-#define TTL_7473A(name, cCLK, cJ, cK, cCLRQ) \
+#define TTL_7473A(name, cCLK, cJ, cK, cCLRQ) \
TTL_7473(name, cCLK, cJ, cK, cCLRQ)
-#define TTL_7473_DIP(name) \
+#define TTL_7473_DIP(name) \
NET_REGISTER_DEV(TTL_7473_DIP, name)
-#define TTL_7473A_DIP(name) \
+#define TTL_7473A_DIP(name) \
NET_REGISTER_DEV(TTL_7473A_DIP, name)
#endif /* NLD_7473_H_ */
diff --git a/src/lib/netlist/devices/nld_7475.cpp b/src/lib/netlist/devices/nld_7475.cpp
index e788824f940..3c26c1ce439 100644
--- a/src/lib/netlist/devices/nld_7475.cpp
+++ b/src/lib/netlist/devices/nld_7475.cpp
@@ -128,7 +128,7 @@ namespace netlist
m_last_Q = 0;
}
- NETLIB_UPDATE(7477)
+ NETLIB_UPDATE(7477)
{
netlist_sig_t c1c2 = m_C1C2();
netlist_sig_t c3c4 = m_C3C4();
diff --git a/src/lib/netlist/devices/nld_7475.h b/src/lib/netlist/devices/nld_7475.h
index ea7d668acd5..5689d6aa1e8 100644
--- a/src/lib/netlist/devices/nld_7475.h
+++ b/src/lib/netlist/devices/nld_7475.h
@@ -37,26 +37,26 @@
#include "nl_setup.h"
-#define PARAMS_7475_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
- NET_CONNECT(name, C1C2, cC1C2) \
- NET_CONNECT(name, C3C4, cC3C4) \
- NET_CONNECT(name, D1, cD1) \
- NET_CONNECT(name, D2, cD2) \
- NET_CONNECT(name, D3, cD3) \
+#define PARAMS_7475_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
+ NET_CONNECT(name, C1C2, cC1C2) \
+ NET_CONNECT(name, C3C4, cC3C4) \
+ NET_CONNECT(name, D1, cD1) \
+ NET_CONNECT(name, D2, cD2) \
+ NET_CONNECT(name, D3, cD3) \
NET_CONNECT(name, D4, cD4)
-#define TTL_7475(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
- NET_REGISTER_DEV(TTL_7475, name) \
+#define TTL_7475(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
+ NET_REGISTER_DEV(TTL_7475, name) \
PARAMS_7475_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4)
-#define TTL_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
- NET_REGISTER_DEV(TTL_7477, name) \
+#define TTL_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4) \
+ NET_REGISTER_DEV(TTL_7477, name) \
PARAMS_7475_7477(name, cC1C2, cC3C4, cD1, cD2, cD3, cD4)
-#define TTL_7475_DIP(name) \
+#define TTL_7475_DIP(name) \
NET_REGISTER_DEV(TTL_7475_DIP, name)
-#define TTL_7477_DIP(name) \
+#define TTL_7477_DIP(name) \
NET_REGISTER_DEV(TTL_7477_DIP, name)
#endif /* NLD_7475_H_ */
diff --git a/src/lib/netlist/devices/nld_7485.h b/src/lib/netlist/devices/nld_7485.h
index d97a323e416..77ff6b0d530 100644
--- a/src/lib/netlist/devices/nld_7485.h
+++ b/src/lib/netlist/devices/nld_7485.h
@@ -26,17 +26,17 @@
#include "nl_setup.h"
#define TTL_7485(name, cA0, cA1, cA2, cA3, cB0, cB1, cB2, cB3, cLTIN, cEQIN, cGTIN) \
- NET_REGISTER_DEV(TTL_7485, name) \
- NET_CONNECT(name, A0, cA0) \
- NET_CONNECT(name, A1, cA1) \
- NET_CONNECT(name, A2, cA2) \
- NET_CONNECT(name, A3, cA3) \
- NET_CONNECT(name, B0, cB0) \
- NET_CONNECT(name, B1, cB1) \
- NET_CONNECT(name, B2, cB2) \
- NET_CONNECT(name, B3, cB3) \
- NET_CONNECT(name, LTIN, cLTIN) \
- NET_CONNECT(name, EQIN, cEQIN) \
+ NET_REGISTER_DEV(TTL_7485, name) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, B0, cB0) \
+ NET_CONNECT(name, B1, cB1) \
+ NET_CONNECT(name, B2, cB2) \
+ NET_CONNECT(name, B3, cB3) \
+ NET_CONNECT(name, LTIN, cLTIN) \
+ NET_CONNECT(name, EQIN, cEQIN) \
NET_CONNECT(name, GTIN, cGTIN)
#define TTL_7485_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_82S115.cpp b/src/lib/netlist/devices/nld_82S115.cpp
index a4a375ee364..873acef549d 100644
--- a/src/lib/netlist/devices/nld_82S115.cpp
+++ b/src/lib/netlist/devices/nld_82S115.cpp
@@ -101,7 +101,7 @@ namespace netlist
m_last_O = o;
- // FIXME: Outputs are tristate. This needs to be properly implemented
+ // FIXME: Outputs are tristate. This needs to be properly implemented
for (std::size_t i=0; i<8; i++)
m_O[i].push((o >> i) & 1, NLTIME_FROM_NS(40)); // FIXME: Timing
}
diff --git a/src/lib/netlist/devices/nld_82S115.h b/src/lib/netlist/devices/nld_82S115.h
index 34ab5bf2534..e8b538dbc95 100644
--- a/src/lib/netlist/devices/nld_82S115.h
+++ b/src/lib/netlist/devices/nld_82S115.h
@@ -30,19 +30,19 @@
#include "nl_setup.h"
-#define PROM_82S115(name, cCE1, cCE2Q, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cSTROBE) \
- NET_REGISTER_DEV(PROM_82S115, name) \
- NET_CONNECT(name, CE1Q, cCE1Q) \
- NET_CONNECT(name, CE2Q, cCE2Q) \
- NET_CONNECT(name, A0, cA0) \
- NET_CONNECT(name, A1, cA1) \
- NET_CONNECT(name, A2, cA2) \
- NET_CONNECT(name, A3, cA3) \
- NET_CONNECT(name, A4, cA4) \
- NET_CONNECT(name, A5, cA5) \
- NET_CONNECT(name, A6, cA6) \
- NET_CONNECT(name, A7, cA7) \
- NET_CONNECT(name, A8, cA8) \
+#define PROM_82S115(name, cCE1, cCE2Q, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7, cA8, cSTROBE) \
+ NET_REGISTER_DEV(PROM_82S115, name) \
+ NET_CONNECT(name, CE1Q, cCE1Q) \
+ NET_CONNECT(name, CE2Q, cCE2Q) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, A4, cA4) \
+ NET_CONNECT(name, A5, cA5) \
+ NET_CONNECT(name, A6, cA6) \
+ NET_CONNECT(name, A7, cA7) \
+ NET_CONNECT(name, A8, cA8) \
NET_CONNECT(name, STROBE, cSTROBE)
#define PROM_82S115_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_82S123.cpp b/src/lib/netlist/devices/nld_82S123.cpp
index c4a54dd79c5..ab0a58b1b59 100644
--- a/src/lib/netlist/devices/nld_82S123.cpp
+++ b/src/lib/netlist/devices/nld_82S123.cpp
@@ -66,13 +66,13 @@ namespace netlist
for (std::size_t i=0; i<5; i++)
a |= (m_A[i]() << i);
- if (m_ROM() != nullptr)
- o = ((std::uint_fast8_t*)(m_ROM()))[a];
+ if (m_ROM() != nullptr)
+ o = ((std::uint_fast8_t*)(m_ROM()))[a];
delay = NLTIME_FROM_NS(50);
}
- // FIXME: Outputs are tristate. This needs to be properly implemented
+ // FIXME: Outputs are tristate. This needs to be properly implemented
for (std::size_t i=0; i<8; i++)
m_O[i].push((o >> i) & 1, delay);
}
diff --git a/src/lib/netlist/devices/nld_82S123.h b/src/lib/netlist/devices/nld_82S123.h
index 08130009ec7..a04e169ae93 100644
--- a/src/lib/netlist/devices/nld_82S123.h
+++ b/src/lib/netlist/devices/nld_82S123.h
@@ -27,13 +27,13 @@
#include "nl_setup.h"
-#define PROM_82S123(name, cCEQ, cA0, cA1, cA2, cA3, cA4) \
- NET_REGISTER_DEV(PROM_82S123, name) \
- NET_CONNECT(name, CEQ, cCEQ) \
- NET_CONNECT(name, A0, cA0) \
- NET_CONNECT(name, A1, cA1) \
- NET_CONNECT(name, A2, cA2) \
- NET_CONNECT(name, A3, cA3) \
+#define PROM_82S123(name, cCEQ, cA0, cA1, cA2, cA3, cA4) \
+ NET_REGISTER_DEV(PROM_82S123, name) \
+ NET_CONNECT(name, CEQ, cCEQ) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4)
#define PROM_82S123_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_82S126.cpp b/src/lib/netlist/devices/nld_82S126.cpp
index 9d481a8a877..dd1d6ad0dc8 100644
--- a/src/lib/netlist/devices/nld_82S126.cpp
+++ b/src/lib/netlist/devices/nld_82S126.cpp
@@ -68,13 +68,13 @@ namespace netlist
for (std::size_t i=0; i<8; i++)
a |= (m_A[i]() << i);
- if (m_ROM() != nullptr)
- o = ((std::uint_fast8_t*)(m_ROM()))[a];
+ if (m_ROM() != nullptr)
+ o = ((std::uint_fast8_t*)(m_ROM()))[a];
delay = NLTIME_FROM_NS(50);
}
- // FIXME: Outputs are tristate. This needs to be properly implemented
+ // FIXME: Outputs are tristate. This needs to be properly implemented
for (std::size_t i=0; i<4; i++)
m_O[i].push((o >> i) & 1, delay);
}
diff --git a/src/lib/netlist/devices/nld_82S126.h b/src/lib/netlist/devices/nld_82S126.h
index 5da2398e3c3..27dd2217497 100644
--- a/src/lib/netlist/devices/nld_82S126.h
+++ b/src/lib/netlist/devices/nld_82S126.h
@@ -26,17 +26,17 @@
#include "nl_setup.h"
-#define PROM_82S126(name, cCE1Q, cCE2Q, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7) \
- NET_REGISTER_DEV(PROM_82S126, name) \
- NET_CONNECT(name, CE1Q, cCE1Q) \
- NET_CONNECT(name, CE2Q, cCE2Q) \
- NET_CONNECT(name, A0, cA0) \
- NET_CONNECT(name, A1, cA1) \
- NET_CONNECT(name, A2, cA2) \
- NET_CONNECT(name, A3, cA3) \
- NET_CONNECT(name, A4, cA4) \
- NET_CONNECT(name, A5, cA5) \
- NET_CONNECT(name, A6, cA6) \
+#define PROM_82S126(name, cCE1Q, cCE2Q, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7) \
+ NET_REGISTER_DEV(PROM_82S126, name) \
+ NET_CONNECT(name, CE1Q, cCE1Q) \
+ NET_CONNECT(name, CE2Q, cCE2Q) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, A4, cA4) \
+ NET_CONNECT(name, A5, cA5) \
+ NET_CONNECT(name, A6, cA6) \
NET_CONNECT(name, A7, cA7)
#define PROM_82S126_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_9312.h b/src/lib/netlist/devices/nld_9312.h
index c5f4104edd4..5608ba9aefb 100644
--- a/src/lib/netlist/devices/nld_9312.h
+++ b/src/lib/netlist/devices/nld_9312.h
@@ -39,19 +39,19 @@
#include "nl_setup.h"
-#define TTL_9312(name, cA, cB, cC, cD0, cD1, cD2, cD3, cD4, cD5, cD6, cD7, cSTROBE) \
- NET_REGISTER_DEV(TTL_9312, name) \
- NET_CONNECT(name, A, cA) \
- NET_CONNECT(name, B, cB) \
- NET_CONNECT(name, C, cC) \
- NET_CONNECT(name, D0, cD0) \
- NET_CONNECT(name, D1, cD1) \
- NET_CONNECT(name, D2, cD2) \
- NET_CONNECT(name, D3, cD3) \
- NET_CONNECT(name, D4, cD4) \
- NET_CONNECT(name, D5, cD5) \
- NET_CONNECT(name, D6, cD6) \
- NET_CONNECT(name, D7, cD7) \
+#define TTL_9312(name, cA, cB, cC, cD0, cD1, cD2, cD3, cD4, cD5, cD6, cD7, cSTROBE) \
+ NET_REGISTER_DEV(TTL_9312, name) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D0, cD0) \
+ NET_CONNECT(name, D1, cD1) \
+ NET_CONNECT(name, D2, cD2) \
+ NET_CONNECT(name, D3, cD3) \
+ NET_CONNECT(name, D4, cD4) \
+ NET_CONNECT(name, D5, cD5) \
+ NET_CONNECT(name, D6, cD6) \
+ NET_CONNECT(name, D7, cD7) \
NET_CONNECT(name, STROBE, cSTROBE)
#define TTL_9312_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_9316.h b/src/lib/netlist/devices/nld_9316.h
index ce5951bf85b..b0be896a6bd 100644
--- a/src/lib/netlist/devices/nld_9316.h
+++ b/src/lib/netlist/devices/nld_9316.h
@@ -44,8 +44,8 @@
*
* Naming conventions follow National Semiconductor datasheet
*
- * TODO: DM74161 is compatible to DM9316 (both asynchronous clear)
- * DM74163 has asynchronous clear (on L to H transition of clock)
+ * TODO: DM74161 is compatible to DM9316 (both asynchronous clear)
+ * DM74163 has asynchronous clear (on L to H transition of clock)
*/
#ifndef NLD_9316_H_
diff --git a/src/lib/netlist/devices/nld_9322.h b/src/lib/netlist/devices/nld_9322.h
index e47bb9eda32..08ec6efcd93 100644
--- a/src/lib/netlist/devices/nld_9322.h
+++ b/src/lib/netlist/devices/nld_9322.h
@@ -23,17 +23,17 @@
#include "nl_setup.h"
-#define TTL_9322(name, cSELECT, cA1, cB1, cA2, cB2, cA3, cB3, cA4, cB4, cSTROBE) \
- NET_REGISTER_DEV(TTL_9322, name) \
- NET_CONNECT(name, SELECT, cSELECT) \
- NET_CONNECT(name, A1, cA1) \
- NET_CONNECT(name, B1, cB1) \
- NET_CONNECT(name, A2, cA2) \
- NET_CONNECT(name, B2, cB2) \
- NET_CONNECT(name, A3, cA3) \
- NET_CONNECT(name, B3, cB3) \
- NET_CONNECT(name, A4, cA4) \
- NET_CONNECT(name, B4, cB4) \
+#define TTL_9322(name, cSELECT, cA1, cB1, cA2, cB2, cA3, cB3, cA4, cB4, cSTROBE) \
+ NET_REGISTER_DEV(TTL_9322, name) \
+ NET_CONNECT(name, SELECT, cSELECT) \
+ NET_CONNECT(name, A1, cA1) \
+ NET_CONNECT(name, B1, cB1) \
+ NET_CONNECT(name, A2, cA2) \
+ NET_CONNECT(name, B2, cB2) \
+ NET_CONNECT(name, A3, cA3) \
+ NET_CONNECT(name, B3, cB3) \
+ NET_CONNECT(name, A4, cA4) \
+ NET_CONNECT(name, B4, cB4) \
NET_CONNECT(name, STROBE, cSTROBE)
#define TTL_9322_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_am2847.cpp b/src/lib/netlist/devices/nld_am2847.cpp
index b831b196798..ec4eafc8dd6 100644
--- a/src/lib/netlist/devices/nld_am2847.cpp
+++ b/src/lib/netlist/devices/nld_am2847.cpp
@@ -105,7 +105,7 @@ namespace netlist
m_C.shift();
m_D.shift();
}
- m_last_CP = m_CP();
+ m_last_CP = m_CP();
}
inline NETLIB_FUNC_VOID(Am2847_shifter, shift, (void))
diff --git a/src/lib/netlist/devices/nld_am2847.h b/src/lib/netlist/devices/nld_am2847.h
index 2429db98123..a820961ea2c 100644
--- a/src/lib/netlist/devices/nld_am2847.h
+++ b/src/lib/netlist/devices/nld_am2847.h
@@ -23,16 +23,16 @@
#include "nl_setup.h"
-#define TTL_AM2847(name, cCP, cINA, cINB, cINC, cIND, cRCA, cRCB, cRCC, cRCD) \
- NET_REGISTER_DEV(TTL_AM2847, name) \
- NET_CONNECT(name, CP, cCP) \
- NET_CONNECT(name, INA, cINA) \
- NET_CONNECT(name, INB, cINB) \
- NET_CONNECT(name, INC, cINC) \
- NET_CONNECT(name, IND, cIND) \
- NET_CONNECT(name, RCA, cRCA) \
- NET_CONNECT(name, RCB, cRCB) \
- NET_CONNECT(name, RCC, cRCC) \
+#define TTL_AM2847(name, cCP, cINA, cINB, cINC, cIND, cRCA, cRCB, cRCC, cRCD) \
+ NET_REGISTER_DEV(TTL_AM2847, name) \
+ NET_CONNECT(name, CP, cCP) \
+ NET_CONNECT(name, INA, cINA) \
+ NET_CONNECT(name, INB, cINB) \
+ NET_CONNECT(name, INC, cINC) \
+ NET_CONNECT(name, IND, cIND) \
+ NET_CONNECT(name, RCA, cRCA) \
+ NET_CONNECT(name, RCB, cRCB) \
+ NET_CONNECT(name, RCC, cRCC) \
NET_CONNECT(name, RCD, cRCD)
#define TTL_AM2847_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_dm9334.h b/src/lib/netlist/devices/nld_dm9334.h
index 0a896b66d6d..813ea225add 100644
--- a/src/lib/netlist/devices/nld_dm9334.h
+++ b/src/lib/netlist/devices/nld_dm9334.h
@@ -67,13 +67,13 @@
#include "nl_setup.h"
-#define TTL_9334(name, cCQ, cEQ, cD, cA0, cA1, cA2) \
- NET_REGISTER_DEV(TTL_9334, name) \
- NET_CONNECT(name, CQ, cCQ) \
- NET_CONNECT(name, EQ, cEQ) \
- NET_CONNECT(name, D, cD) \
- NET_CONNECT(name, A0, cA0) \
- NET_CONNECT(name, A1, cA1) \
+#define TTL_9334(name, cCQ, cEQ, cD, cA0, cA1, cA2) \
+ NET_REGISTER_DEV(TTL_9334, name) \
+ NET_CONNECT(name, CQ, cCQ) \
+ NET_CONNECT(name, EQ, cEQ) \
+ NET_CONNECT(name, D, cD) \
+ NET_CONNECT(name, A0, cA0) \
+ NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2)
#define TTL_9334_DIP(name) \
diff --git a/src/lib/netlist/devices/nld_tristate.cpp b/src/lib/netlist/devices/nld_tristate.cpp
index 571f5f8c334..db21468685e 100644
--- a/src/lib/netlist/devices/nld_tristate.cpp
+++ b/src/lib/netlist/devices/nld_tristate.cpp
@@ -28,24 +28,24 @@ namespace netlist
logic_output_t m_Q;
};
- NETLIB_OBJECT(tristate3)
- {
- NETLIB_CONSTRUCTOR(tristate3)
- , m_CEQ(*this, {{ "CEQ1", "CEQ2", "CEQ3" }} )
- , m_D(*this, {{ "D1", "D2", "D3" }} )
- , m_Q(*this, "Q")
- {
- }
+ NETLIB_OBJECT(tristate3)
+ {
+ NETLIB_CONSTRUCTOR(tristate3)
+ , m_CEQ(*this, {{ "CEQ1", "CEQ2", "CEQ3" }} )
+ , m_D(*this, {{ "D1", "D2", "D3" }} )
+ , m_Q(*this, "Q")
+ {
+ }
- NETLIB_UPDATEI();
+ NETLIB_UPDATEI();
- protected:
- object_array_t<logic_input_t, 3> m_CEQ;
- object_array_t<logic_input_t, 3> m_D;
- logic_output_t m_Q;
- };
+ protected:
+ object_array_t<logic_input_t, 3> m_CEQ;
+ object_array_t<logic_input_t, 3> m_D;
+ logic_output_t m_Q;
+ };
- NETLIB_UPDATE(tristate)
+ NETLIB_UPDATE(tristate)
{
unsigned q = 0;
if (!m_CEQ[0]())
@@ -56,21 +56,21 @@ namespace netlist
m_Q.push(q, NLTIME_FROM_NS(1));
}
- NETLIB_UPDATE(tristate3)
- {
- unsigned q = 0;
- if (!m_CEQ[0]())
- q |= m_D[0]();
- if (!m_CEQ[1]())
- q |= m_D[1]();
- if (!m_CEQ[2]())
- q |= m_D[2]();
+ NETLIB_UPDATE(tristate3)
+ {
+ unsigned q = 0;
+ if (!m_CEQ[0]())
+ q |= m_D[0]();
+ if (!m_CEQ[1]())
+ q |= m_D[1]();
+ if (!m_CEQ[2]())
+ q |= m_D[2]();
- m_Q.push(q, NLTIME_FROM_NS(1));
- }
+ m_Q.push(q, NLTIME_FROM_NS(1));
+ }
- NETLIB_DEVICE_IMPL(tristate)
- NETLIB_DEVICE_IMPL(tristate3)
+ NETLIB_DEVICE_IMPL(tristate)
+ NETLIB_DEVICE_IMPL(tristate3)
} //namespace devices
} // namespace netlist
diff --git a/src/lib/netlist/devices/nld_tristate.h b/src/lib/netlist/devices/nld_tristate.h
index e0e40491d8f..604ae7f03fd 100644
--- a/src/lib/netlist/devices/nld_tristate.h
+++ b/src/lib/netlist/devices/nld_tristate.h
@@ -12,20 +12,20 @@
#include "nl_setup.h"
-#define TTL_TRISTATE(name, cCEQ1, cD1, cCEQ2, cD2) \
- NET_REGISTER_DEV(TTL_TRISTATE, name) \
- NET_CONNECT(name, CEQ1, cCEQ1) \
- NET_CONNECT(name, D1, cD1) \
- NET_CONNECT(name, CEQ2, cCEQ2) \
+#define TTL_TRISTATE(name, cCEQ1, cD1, cCEQ2, cD2) \
+ NET_REGISTER_DEV(TTL_TRISTATE, name) \
+ NET_CONNECT(name, CEQ1, cCEQ1) \
+ NET_CONNECT(name, D1, cD1) \
+ NET_CONNECT(name, CEQ2, cCEQ2) \
NET_CONNECT(name, D2, cD2)
-#define TTL_TRISTATE3(name, cCEQ1, cD1, cCEQ2, cD2, cCEQ3, cD3) \
- NET_REGISTER_DEV(TTL_TRISTATE3, name) \
- NET_CONNECT(name, CEQ1, cCEQ1) \
- NET_CONNECT(name, D1, cD1) \
- NET_CONNECT(name, CEQ2, cCEQ2) \
+#define TTL_TRISTATE3(name, cCEQ1, cD1, cCEQ2, cD2, cCEQ3, cD3) \
+ NET_REGISTER_DEV(TTL_TRISTATE3, name) \
+ NET_CONNECT(name, CEQ1, cCEQ1) \
+ NET_CONNECT(name, D1, cD1) \
+ NET_CONNECT(name, CEQ2, cCEQ2) \
NET_CONNECT(name, D2, cD2) \
- NET_CONNECT(name, CEQ3, cCEQ3) \
- NET_CONNECT(name, D3, cD3)
+ NET_CONNECT(name, CEQ3, cCEQ3) \
+ NET_CONNECT(name, D3, cD3)
#endif /* NLD_TRISTATE_H_ */
diff --git a/src/lib/netlist/macro/nlm_ttl74xx.h b/src/lib/netlist/macro/nlm_ttl74xx.h
index 22ee8890c19..44b3db63bd3 100644
--- a/src/lib/netlist/macro/nlm_ttl74xx.h
+++ b/src/lib/netlist/macro/nlm_ttl74xx.h
@@ -189,15 +189,15 @@
#define TTL_74260_GATE(name) \
NET_REGISTER_DEV(TTL_74260_GATE, name)
-#define TTL_74260_NOR(name, cA, cB, cC, cD, cE) \
- NET_REGISTER_DEV(TTL_74260_NOR, name) \
- NET_CONNECT(name, A, cA) \
- NET_CONNECT(name, B, cB) \
- NET_CONNECT(name, C, cC) \
- NET_CONNECT(name, D, cD) \
+#define TTL_74260_NOR(name, cA, cB, cC, cD, cE) \
+ NET_REGISTER_DEV(TTL_74260_NOR, name) \
+ NET_CONNECT(name, A, cA) \
+ NET_CONNECT(name, B, cB) \
+ NET_CONNECT(name, C, cC) \
+ NET_CONNECT(name, D, cD) \
NET_CONNECT(name, E, cE)
-#define TTL_74260_DIP(name) \
+#define TTL_74260_DIP(name) \
NET_REGISTER_DEV(TTL_74260_DIP, name)
/* ----------------------------------------------------------------------------
diff --git a/src/mame/audio/csd.cpp b/src/mame/audio/csd.cpp
index 63c8c2b877f..47cc6c8589f 100644
--- a/src/mame/audio/csd.cpp
+++ b/src/mame/audio/csd.cpp
@@ -2,7 +2,7 @@
// copyright-holders: Aaron Giles
/***************************************************************************
- Cheap Squeak Deluxe / Artificial Artist Sound Board
+ Cheap Squeak Deluxe / Artificial Artist Sound Board
***************************************************************************/
diff --git a/src/mame/audio/csd.h b/src/mame/audio/csd.h
index 097d231d2bf..a8febae22c2 100644
--- a/src/mame/audio/csd.h
+++ b/src/mame/audio/csd.h
@@ -2,7 +2,7 @@
// copyright-holders: Aaron Giles
/***************************************************************************
- Cheap Squeak Deluxe / Artificial Artist Sound Board
+ Cheap Squeak Deluxe / Artificial Artist Sound Board
***************************************************************************/
diff --git a/src/mame/audio/dcs.cpp b/src/mame/audio/dcs.cpp
index f71e0ba27c4..4e084d83280 100644
--- a/src/mame/audio/dcs.cpp
+++ b/src/mame/audio/dcs.cpp
@@ -246,7 +246,7 @@ enum
#define DSIO_DM_PG ((m_dsio.reg[2] >> 0) & 0x7ff)
-#define DSIO_BANK_END 0x7ff
+#define DSIO_BANK_END 0x7ff
/* these macros are used to reference the DENVER ASIC */
#define DENV_DSP_SPEED ((m_dsio.reg[1] >> 2) & 3) /* read only: 1=33.33MHz */
diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp
index dc519cf1897..4b385c086a2 100644
--- a/src/mame/drivers/aristmk5.cpp
+++ b/src/mame/drivers/aristmk5.cpp
@@ -1007,7 +1007,7 @@ MACHINE_CONFIG_END
ROM_LOAD( "a562838.u65", 0x000200, 0x000157, CRC(f2f3c40a) SHA1(b795dfa5cc4e8127c3f3a0906664910d1325ec92) ) \
ROM_LOAD( "a562840.u22", 0x000400, 0x000157, CRC(941d4cdb) SHA1(1ca091fba69e92f262dbb3d40f515703c8981793) ) \
-
+
ROM_START( aristmk5 )
ARISTOCRAT_MK5_BIOS
@@ -1563,14 +1563,14 @@ ROM_START( chickna5u )
ARISTOCRAT_MK5_BIOS
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
- ROM_LOAD32_WORD( "rhg073003.u7", 0x000000, 0x080000, CRC(06558129) SHA1(be726c0d35776faf1ecd20eb0a193e68a1fb1a84) )
- ROM_LOAD32_WORD( "rhg073003.u11", 0x000002, 0x080000, CRC(0eadf5d4) SHA1(b783f6e1911fc098d1b4d1d8c75862e031078e5b) )
- ROM_LOAD32_WORD( "rhg073003.u8", 0x100000, 0x080000, CRC(683e96bc) SHA1(bca8e87bea9f7044fa29dc4518e2ac5b429e3313) )
- ROM_LOAD32_WORD( "rhg073003.u12", 0x100002, 0x080000, CRC(8313b03b) SHA1(d2a91bae8063d89ec9a1edab6df3e6711719d2c2) )
- ROM_LOAD32_WORD( "rhg073003.u9", 0x200000, 0x080000, CRC(9c08aefa) SHA1(fe3ffa8eb308ab216cc08dd2ce51113b4ef74c4a) )
- ROM_LOAD32_WORD( "rhg073003.u13", 0x200002, 0x080000, CRC(69fd4f89) SHA1(4e0469caecf9293197a4a5de960eb9dcfee39ca3) )
- ROM_LOAD32_WORD( "rhg073003.u10", 0x300000, 0x080000, CRC(9aae49d7) SHA1(5cf87b747ea7561766fe0ffc15967fea657b252b) )
- ROM_LOAD32_WORD( "rhg073003.u14", 0x300002, 0x080000, CRC(240f7759) SHA1(1fa5ba0185b027101dae207ec5d28b07d3d73fc2) )
+ ROM_LOAD32_WORD( "rhg073003.u7", 0x000000, 0x080000, CRC(06558129) SHA1(be726c0d35776faf1ecd20eb0a193e68a1fb1a84) )
+ ROM_LOAD32_WORD( "rhg073003.u11", 0x000002, 0x080000, CRC(0eadf5d4) SHA1(b783f6e1911fc098d1b4d1d8c75862e031078e5b) )
+ ROM_LOAD32_WORD( "rhg073003.u8", 0x100000, 0x080000, CRC(683e96bc) SHA1(bca8e87bea9f7044fa29dc4518e2ac5b429e3313) )
+ ROM_LOAD32_WORD( "rhg073003.u12", 0x100002, 0x080000, CRC(8313b03b) SHA1(d2a91bae8063d89ec9a1edab6df3e6711719d2c2) )
+ ROM_LOAD32_WORD( "rhg073003.u9", 0x200000, 0x080000, CRC(9c08aefa) SHA1(fe3ffa8eb308ab216cc08dd2ce51113b4ef74c4a) )
+ ROM_LOAD32_WORD( "rhg073003.u13", 0x200002, 0x080000, CRC(69fd4f89) SHA1(4e0469caecf9293197a4a5de960eb9dcfee39ca3) )
+ ROM_LOAD32_WORD( "rhg073003.u10", 0x300000, 0x080000, CRC(9aae49d7) SHA1(5cf87b747ea7561766fe0ffc15967fea657b252b) )
+ ROM_LOAD32_WORD( "rhg073003.u14", 0x300002, 0x080000, CRC(240f7759) SHA1(1fa5ba0185b027101dae207ec5d28b07d3d73fc2) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
@@ -1669,18 +1669,18 @@ ROM_START( cuckoou )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(415b9c77) SHA1(86a3b3aabd81f5fcf767dd53f7034f7d58f2020e) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(415b9c77) SHA1(86a3b3aabd81f5fcf767dd53f7034f7d58f2020e) )
+
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(64c895fe) SHA1(12c75338dd1b2260d0581744cef1b705c718727f) )
-
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(64c895fe) SHA1(12c75338dd1b2260d0581744cef1b705c718727f) )
+
ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
@@ -1848,18 +1848,18 @@ ROM_START( dolphntru )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(1fc27753) SHA1(7e5008faaf115dc506481430272285117c989d8e) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(1fc27753) SHA1(7e5008faaf115dc506481430272285117c989d8e) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(0063e5ca) SHA1(a3d7b636bc9d792e93d11cb2babf24fbdd6d7776) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(0063e5ca) SHA1(a3d7b636bc9d792e93d11cb2babf24fbdd6d7776) )
ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
@@ -2174,18 +2174,18 @@ ROM_START( incasunu )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(b3efdb60) SHA1(f219175019b7237f1e2d132f36803097f2a1d174) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(b3efdb60) SHA1(f219175019b7237f1e2d132f36803097f2a1d174) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(a68e890e) SHA1(8ab087a09cfee8d3e2d84b1003b6798c7223be03) )
-
- ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(a68e890e) SHA1(8ab087a09cfee8d3e2d84b1003b6798c7223be03) )
+
+ ROM_REGION( 0x20, "rtc", 0 )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
ROM_START( incasunsp )
@@ -2449,18 +2449,18 @@ ROM_START( magimask )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(6e485bbc) SHA1(3d6c8d120c69ed2804f267c50681974f73e1ee51) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(6e485bbc) SHA1(3d6c8d120c69ed2804f267c50681974f73e1ee51) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(538c7523) SHA1(1e6516b77daf855e397c1ec590e73637ce3b8406) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(538c7523) SHA1(1e6516b77daf855e397c1ec590e73637ce3b8406) )
- ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_REGION( 0x20, "rtc", 0 )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
@@ -2494,18 +2494,18 @@ ROM_START( magimaska )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(a10501f9) SHA1(34fdcd16bd7dc474baadc0836e2083abaf589549) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(a10501f9) SHA1(34fdcd16bd7dc474baadc0836e2083abaf589549) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(5365446b) SHA1(9ae7a72d0ed3e7f7523a2e0a8f0dc014c6490438) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(5365446b) SHA1(9ae7a72d0ed3e7f7523a2e0a8f0dc014c6490438) )
- ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_REGION( 0x20, "rtc", 0 )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
@@ -2602,15 +2602,15 @@ ROM_START( minemine )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(8421e7c2) SHA1(fc1b07d5b7aadafc4a0f2e4dfa698e7c72340717) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(8421e7c2) SHA1(fc1b07d5b7aadafc4a0f2e4dfa698e7c72340717) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(883f5023) SHA1(e526e337b5b0fc77091b4946b503b56307c390e9) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(883f5023) SHA1(e526e337b5b0fc77091b4946b503b56307c390e9) )
ROM_REGION( 0x20, "rtc", 0 )
ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
@@ -2804,18 +2804,18 @@ ROM_START( partygrs )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(a10501f9) SHA1(34fdcd16bd7dc474baadc0836e2083abaf589549) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(a10501f9) SHA1(34fdcd16bd7dc474baadc0836e2083abaf589549) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(fec1b1df) SHA1(5981e2961692d4c8633afea4ecb4828eabba65bd) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(fec1b1df) SHA1(5981e2961692d4c8633afea4ecb4828eabba65bd) )
ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
@@ -2955,15 +2955,15 @@ ROM_START( pengpayu )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(8421e7c2) SHA1(fc1b07d5b7aadafc4a0f2e4dfa698e7c72340717) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(8421e7c2) SHA1(fc1b07d5b7aadafc4a0f2e4dfa698e7c72340717) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(4e5b9702) SHA1(b2b645db80c4ece24fae8ce6fb660e77ac8e5810) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(4e5b9702) SHA1(b2b645db80c4ece24fae8ce6fb660e77ac8e5810) )
ROM_REGION( 0x20, "rtc", 0 )
ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
@@ -3146,16 +3146,16 @@ ROM_START( qnileu )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(1fc27753) SHA1(7e5008faaf115dc506481430272285117c989d8e) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(1fc27753) SHA1(7e5008faaf115dc506481430272285117c989d8e) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(5a7bb53a) SHA1(cdac900925d0ee8f98209a377b9f8760de0c2883) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(5a7bb53a) SHA1(cdac900925d0ee8f98209a377b9f8760de0c2883) )
ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
@@ -3428,8 +3428,8 @@ ROM_END
ROM_START( topbana )
ARISTOCRAT_MK5_BIOS
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
- ROM_LOAD32_WORD( "0100550v.u11", 0x000002, 0x080000, CRC(1c64b3b6) SHA1(80bbc6e3f47ab932e9c07e0c6063197a2d8e81f7) )
- ROM_LOAD32_WORD( "0100550v.u7", 0x000000, 0x080000, CRC(9c5e2d66) SHA1(658143706c0e1f3b43b3ec301da1052363fe5244) )
+ ROM_LOAD32_WORD( "0100550v.u11", 0x000002, 0x080000, CRC(1c64b3b6) SHA1(80bbc6e3f47ab932e9c07e0c6063197a2d8e81f7) )
+ ROM_LOAD32_WORD( "0100550v.u7", 0x000000, 0x080000, CRC(9c5e2d66) SHA1(658143706c0e1f3b43b3ec301da1052363fe5244) )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
@@ -3696,18 +3696,18 @@ ROM_START( wcougaru )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 ) /* ARM Code */
ROM_REGION( 0x200000, "vram", ROMREGION_ERASE00 )
ROM_REGION( 0x20000*4, "sram", ROMREGION_ERASE00 )
-
+
ROM_REGION16_BE( 0x100, "eeprom0", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
-
+ ROM_LOAD16_WORD_SWAP( "eeprom0", 0x000000, 0x000100, CRC(fea8a821) SHA1(c744cac6af7621524fc3a2b0a9a135a32b33c81b) )
+
ROM_REGION16_BE( 0x100, "eeprom1", 0 )
- ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(8421e7c2) SHA1(fc1b07d5b7aadafc4a0f2e4dfa698e7c72340717) )
+ ROM_LOAD16_WORD_SWAP( "eeprom1", 0x000000, 0x000100, CRC(8421e7c2) SHA1(fc1b07d5b7aadafc4a0f2e4dfa698e7c72340717) )
ROM_REGION( 0x80000, "nvram", 0 )
- ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(dfe52286) SHA1(db31fb64e2fff8aa5ba0cc6d3d73860e8019406c) )
+ ROM_LOAD( "nvram", 0x000000, 0x080000, CRC(dfe52286) SHA1(db31fb64e2fff8aa5ba0cc6d3d73860e8019406c) )
ROM_REGION( 0x20, "rtc", 0 )
- ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
+ ROM_LOAD( "rtc", 0x000000, 0x00001f, CRC(6909acb0) SHA1(6a4589599cd1c477e916474e7b029e9a4e92019b) )
ROM_END
diff --git a/src/mame/drivers/atarittl.cpp b/src/mame/drivers/atarittl.cpp
index 76879130827..061baad3cc0 100644
--- a/src/mame/drivers/atarittl.cpp
+++ b/src/mame/drivers/atarittl.cpp
@@ -57,15 +57,15 @@
netlist system per-game:
TM-057 (Stunt Cycle)
- 4136 Quad General-Purpose Operational Amplifiers
+ 4136 Quad General-Purpose Operational Amplifiers
TM-055 (Indy 4)
- 7406 Hex Inverter Buffers/Drivers with O.C. H.V. Outputs (note: Might not be needed, could just clone from 7404)
- 7414 Hex Schmitt-Trigger Inverters
- 7417 Hex Buffers/Drivers
- 74164 8-bit Serial-In, Parallel-Out Shift Register
- 9301 1-of-10 Decoder
- LM339 Quad Comparator
+ 7406 Hex Inverter Buffers/Drivers with O.C. H.V. Outputs (note: Might not be needed, could just clone from 7404)
+ 7414 Hex Schmitt-Trigger Inverters
+ 7417 Hex Buffers/Drivers
+ 74164 8-bit Serial-In, Parallel-Out Shift Register
+ 9301 1-of-10 Decoder
+ LM339 Quad Comparator
***************************************************************************/
diff --git a/src/mame/drivers/beezer.cpp b/src/mame/drivers/beezer.cpp
index e4a8ff812b7..cc6e0a58bd8 100644
--- a/src/mame/drivers/beezer.cpp
+++ b/src/mame/drivers/beezer.cpp
@@ -3,23 +3,23 @@
// thanks-to: Jonathan Gevaryahu
/***************************************************************************
- Beezer
+ Beezer
- (c) 1982 Tong Electronic
+ (c) 1982 Tong Electronic
- Notes:
- - To enter test mode, hold down 1P Start and 2P Start, then reset
- - One of the ROMs contains a message that this game was created
- by "Pacific Polytechnical Corporation, Santa Cruz"
+ Notes:
+ - To enter test mode, hold down 1P Start and 2P Start, then reset
+ - One of the ROMs contains a message that this game was created
+ by "Pacific Polytechnical Corporation, Santa Cruz"
- TODO:
- - Improve sound (filters? A reference recording would be nice)
- - Schematics in the sound area seem incomplete, there are
- several unknown connections
- - Watchdog timing (controlled by a 555)
- - Figure out differences between the two sets (test mode isn't
- working in beezer1, instruction screen is different)
- - Verify accuracy of colors
+ TODO:
+ - Improve sound (filters? A reference recording would be nice)
+ - Schematics in the sound area seem incomplete, there are
+ several unknown connections
+ - Watchdog timing (controlled by a 555)
+ - Figure out differences between the two sets (test mode isn't
+ working in beezer1, instruction screen is different)
+ - Verify accuracy of colors
***************************************************************************/
@@ -154,8 +154,8 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, beezer_state )
AM_RANGE(0x1000, 0x1007) AM_MIRROR(0x07f8) AM_DEVREADWRITE("ptm", ptm6840_device, read, write)
AM_RANGE(0x1800, 0x180f) AM_MIRROR(0x07f0) AM_DEVREADWRITE("via_u18", via6522_device, read, write)
AM_RANGE(0x8000, 0x8003) AM_MIRROR(0x1ffc) AM_WRITE(dac_w)
-// AM_RANGE(0xa000, 0xbfff) AM_ROM // 2d (can be ram, unpopulated)
-// AM_RANGE(0xc000, 0xdfff) AM_ROM // 4d (unpopulated)
+// AM_RANGE(0xa000, 0xbfff) AM_ROM // 2d (can be ram, unpopulated)
+// AM_RANGE(0xc000, 0xdfff) AM_ROM // 4d (unpopulated)
AM_RANGE(0xe000, 0xffff) AM_ROM AM_REGION("audiocpu", 0) // 6d
ADDRESS_MAP_END
diff --git a/src/mame/drivers/by35.cpp b/src/mame/drivers/by35.cpp
index 58755594b42..b5fbb39cbd8 100644
--- a/src/mame/drivers/by35.cpp
+++ b/src/mame/drivers/by35.cpp
@@ -2306,7 +2306,7 @@ ROM_START(uboat65)
ROM_RELOAD(0x28000, 0x8000)
ROM_RELOAD(0x38000, 0x8000)
ROM_REGION(0x10000, "cpu2", 0)
- ROM_LOAD("snd_u8.bin", 0x8000, 0x8000, CRC(d00fd4fd) SHA1(23f6b7c5d60821eb7fa2fdcfc85caeb536eef99a))
+ ROM_LOAD("snd_u8.bin", 0x8000, 0x8000, CRC(d00fd4fd) SHA1(23f6b7c5d60821eb7fa2fdcfc85caeb536eef99a))
ROM_END
/*--------------------------------
/ Big Ball Bowling (Bowler)
diff --git a/src/mame/drivers/ccastles.cpp b/src/mame/drivers/ccastles.cpp
index 0a3da1df0f5..ef9c31078fc 100644
--- a/src/mame/drivers/ccastles.cpp
+++ b/src/mame/drivers/ccastles.cpp
@@ -361,10 +361,10 @@ static INPUT_PORTS_START( ccastles )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_TILT )
PORT_SERVICE( 0x10, IP_ACTIVE_LOW )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, ccastles_state,get_vblank, nullptr)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Left Jump/1P Start Upright") PORT_CONDITION("IN1",0x20,EQUALS,0x00) /* left Jump, non-cocktail start1 */
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("1P Jump") PORT_CONDITION("IN1",0x20,EQUALS,0x20) /* 1p Jump, cocktail */
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Right Jump/2P Start Upright") PORT_CONDITION("IN1",0x20,EQUALS,0x00) /* right Jump, non-cocktail start2 */
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL PORT_NAME("2P Jump") PORT_CONDITION("IN1",0x20,EQUALS,0x20) /* 2p Jump, cocktail */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Left Jump/1P Start Upright") PORT_CONDITION("IN1",0x20,EQUALS,0x00) /* left Jump, non-cocktail start1 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("1P Jump") PORT_CONDITION("IN1",0x20,EQUALS,0x20) /* 1p Jump, cocktail */
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Right Jump/2P Start Upright") PORT_CONDITION("IN1",0x20,EQUALS,0x00) /* right Jump, non-cocktail start2 */
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL PORT_NAME("2P Jump") PORT_CONDITION("IN1",0x20,EQUALS,0x20) /* 2p Jump, cocktail */
PORT_START("IN1") /* IN1 */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
@@ -376,8 +376,8 @@ static INPUT_PORTS_START( ccastles )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("1P Start Cocktail") /* cocktail only */
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("2P Start Cocktail") /* cocktail only */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("1P Start Cocktail") /* cocktail only */
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("2P Start Cocktail") /* cocktail only */
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) )
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x20, DEF_STR( Cocktail ) )
@@ -390,10 +390,10 @@ static INPUT_PORTS_START( ccastles )
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(10) PORT_KEYDELTA(30)
PORT_START("LETA2")
- PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_COCKTAIL PORT_SENSITIVITY(10) PORT_KEYDELTA(30) PORT_REVERSE /* cocktail only */
+ PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_COCKTAIL PORT_SENSITIVITY(10) PORT_KEYDELTA(30) PORT_REVERSE /* cocktail only */
PORT_START("LETA3")
- PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_COCKTAIL PORT_SENSITIVITY(10) PORT_KEYDELTA(30) /* cocktail only */
+ PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_COCKTAIL PORT_SENSITIVITY(10) PORT_KEYDELTA(30) /* cocktail only */
INPUT_PORTS_END
diff --git a/src/mame/drivers/coco12.cpp b/src/mame/drivers/coco12.cpp
index af52bc2da74..5c3239b1030 100644
--- a/src/mame/drivers/coco12.cpp
+++ b/src/mame/drivers/coco12.cpp
@@ -470,4 +470,4 @@ COMP( 1985?, coco2b, coco, 0, coco2b, coco, driver_device,
COMP( 1984, cp400, coco, 0, cp400, coco, driver_device, 0, "Prologica", "CP400", 0)
COMP( 1984, lzcolor64, coco, 0, coco, coco, driver_device, 0, "Digiponto", "LZ Color64", 0)
COMP( 1984, mx1600, coco, 0, coco, coco, driver_device, 0, "Dynacom", "MX-1600", 0)
-COMP( 1986, t4426, coco, 0, t4426, coco, driver_device, 0, "Terco AB", "Terco 4426 CNC Programming station", MACHINE_NOT_WORKING)
+COMP( 1986, t4426, coco, 0, t4426, coco, driver_device, 0, "Terco AB", "Terco 4426 CNC Programming station", MACHINE_NOT_WORKING)
diff --git a/src/mame/drivers/ddealer.cpp b/src/mame/drivers/ddealer.cpp
index 284146145e4..6ecf09b766a 100644
--- a/src/mame/drivers/ddealer.cpp
+++ b/src/mame/drivers/ddealer.cpp
@@ -288,7 +288,7 @@ uint32_t ddealer_state::screen_update(screen_device &screen, bitmap_ind16 &bitma
combined, the flipscreen case makes things more
difficult to understand */
bool const flip = flip_screen();
-
+
if (!flip)
{
if (m_vregs[0xcc / 2] & 0x80)
diff --git a/src/mame/drivers/esq5505.cpp b/src/mame/drivers/esq5505.cpp
index 0dcd32508cd..a1703e291f3 100644
--- a/src/mame/drivers/esq5505.cpp
+++ b/src/mame/drivers/esq5505.cpp
@@ -925,16 +925,16 @@ ROM_END
ROM_START( sq2 )
ROM_REGION(0x40000, "osrom", 0)
- ROM_LOAD16_BYTE( "sq232_2.03_9193_lower.u27", 0x000000, 0x010000, CRC(e37fbc2c) SHA1(4a74f3540756745073c8768b384905db03da47c0) )
- ROM_LOAD16_BYTE( "sq232_2.03_cbcd_upper.u32", 0x000001, 0x020000, CRC(5a7dc228) SHA1(d25adecc0dbba93a094c49fae105dcc7aad317f1) )
+ ROM_LOAD16_BYTE( "sq232_2.03_9193_lower.u27", 0x000000, 0x010000, CRC(e37fbc2c) SHA1(4a74f3540756745073c8768b384905db03da47c0) )
+ ROM_LOAD16_BYTE( "sq232_2.03_cbcd_upper.u32", 0x000001, 0x020000, CRC(5a7dc228) SHA1(d25adecc0dbba93a094c49fae105dcc7aad317f1) )
ROM_REGION(0x200000, "waverom", 0)
ROM_LOAD16_BYTE( "sq1-u25.bin", 0x000001, 0x080000, CRC(26312451) SHA1(9f947a11592fd8420fc581914bf16e7ade75390c) )
ROM_LOAD16_BYTE( "sq1-u26.bin", 0x100001, 0x080000, CRC(2edaa9dc) SHA1(72fead505c4f44e5736ff7d545d72dfa37d613e2) )
ROM_REGION(0x200000, "waverom2", ROMREGION_ERASE00) // BS=1 region (16-bit)
- ROM_LOAD( "rom2.u39", 0x000000, 0x100000, CRC(8d1b5e91) SHA1(12991083a6c574133a1a799813fa4573a33d2297) )
- ROM_LOAD( "rom3.u38", 0x100000, 0x100000, CRC(cb9875ce) SHA1(82021bdc34953e9be97d45746a813d7882250ae0) )
+ ROM_LOAD( "rom2.u39", 0x000000, 0x100000, CRC(8d1b5e91) SHA1(12991083a6c574133a1a799813fa4573a33d2297) )
+ ROM_LOAD( "rom3.u38", 0x100000, 0x100000, CRC(cb9875ce) SHA1(82021bdc34953e9be97d45746a813d7882250ae0) )
ROM_REGION(0x80000, "nibbles", ROMREGION_ERASE00)
ROM_END
diff --git a/src/mame/drivers/fccpu20.cpp b/src/mame/drivers/fccpu20.cpp
index 80159365985..07496323f33 100644
--- a/src/mame/drivers/fccpu20.cpp
+++ b/src/mame/drivers/fccpu20.cpp
@@ -91,32 +91,32 @@
* PIT #1 hardware wiring
* ----------------------------------------------------------
* PA0-PA3 TBC
- * PA4-PA7
- * H1-H4
- * PB0-PB2
- * PB3-PB4
- * PB5
- * PB6-PB7
- * PC0,PC1
- * PC4,PC7
- * PC2
- * PC3
- * PC5
- * PC6
+ * PA4-PA7
+ * H1-H4
+ * PB0-PB2
+ * PB3-PB4
+ * PB5
+ * PB6-PB7
+ * PC0,PC1
+ * PC4,PC7
+ * PC2
+ * PC3
+ * PC5
+ * PC6
*
* PIT #2 hardware setup wiring
* ----------------------------------------------------------
* PA0-PA7 TBC
- * H1-H4
- * PB0-PB2
- * PB3-PB7
- * PC0-PC1
- * PC2
- * PC3
- * PC4
- * PC5
- * PC6
- * PC7
+ * H1-H4
+ * PB0-PB2
+ * PB3-PB7
+ * PC0-PC1
+ * PC2
+ * PC3
+ * PC4
+ * PC5
+ * PC6
+ * PC7
*
*---------------------------------------------------------------------------
* TODO:
diff --git a/src/mame/drivers/fccpu30.cpp b/src/mame/drivers/fccpu30.cpp
index 1812a500fdb..f07e9e0a5b9 100644
--- a/src/mame/drivers/fccpu30.cpp
+++ b/src/mame/drivers/fccpu30.cpp
@@ -699,7 +699,7 @@ static MACHINE_CONFIG_START (cpu30, cpu30_state)
MCFG_PIT68230_PB_OUTPUT_CB(WRITE8(cpu30_state, flop_dmac_w))
MCFG_PIT68230_PC_INPUT_CB(READ8(cpu30_state, pit1c_r))
MCFG_PIT68230_PC_OUTPUT_CB(WRITE8(cpu30_state, pit1c_w))
-// MCFG_PIT68230_TIMER_IRQ_CB(DEVWRITELINE("fga002", fga002_device, lirq2_w)) // The timer interrupt seems to silence the terminal interrupt, needs invectigation
+// MCFG_PIT68230_TIMER_IRQ_CB(DEVWRITELINE("fga002", fga002_device, lirq2_w)) // The timer interrupt seems to silence the terminal interrupt, needs invectigation
MCFG_DEVICE_ADD ("pit2", PIT68230, XTAL_16MHz / 2) // Th PIT clock is not verified on schema but reversed from behaviour
MCFG_PIT68230_PB_INPUT_CB(READ8(cpu30_state, board_mem_id_rd))
@@ -707,7 +707,7 @@ static MACHINE_CONFIG_START (cpu30, cpu30_state)
MCFG_PIT68230_PA_OUTPUT_CB(WRITE8(cpu30_state, pit2a_w))
MCFG_PIT68230_PC_INPUT_CB(READ8(cpu30_state, pit2c_r))
MCFG_PIT68230_PC_OUTPUT_CB(WRITE8(cpu30_state, pit2c_w))
-// MCFG_PIT68230_TIMER_IRQ_CB(DEVWRITELINE("fga002", fga002_device, lirq3_w)) // The timer interrupt seems to silence the terminal interrupt, needs invectigation
+// MCFG_PIT68230_TIMER_IRQ_CB(DEVWRITELINE("fga002", fga002_device, lirq3_w)) // The timer interrupt seems to silence the terminal interrupt, needs invectigation
/* FGA-002, Force Gate Array */
MCFG_FGA002_ADD("fga002", 0)
diff --git a/src/mame/drivers/fromance.cpp b/src/mame/drivers/fromance.cpp
index d36ea891740..01e6df8a7a8 100644
--- a/src/mame/drivers/fromance.cpp
+++ b/src/mame/drivers/fromance.cpp
@@ -890,7 +890,7 @@ MACHINE_START_MEMBER(fromance_state,fromance)
save_item(NAME(m_directionflag));
save_item(NAME(m_commanddata));
save_item(NAME(m_portselect));
-
+
save_item(NAME(m_adpcm_reset));
save_item(NAME(m_adpcm_data));
save_item(NAME(m_vclk_left));
diff --git a/src/mame/drivers/gkigt.cpp b/src/mame/drivers/gkigt.cpp
index 33662299a10..9ea66279d0c 100644
--- a/src/mame/drivers/gkigt.cpp
+++ b/src/mame/drivers/gkigt.cpp
@@ -79,8 +79,8 @@ PCB board that connects to 044 boards via J6 & J7
or 039 EPROM + SIMM software
More chips (from eBay auction):
- 2x Phillips / NXT 28C94 quad UART (8 serial channels total)
- ADV476 256 color RAMDAC
+ 2x Phillips / NXT 28C94 quad UART (8 serial channels total)
+ ADV476 256 color RAMDAC
*/
#include "emu.h"
@@ -105,7 +105,7 @@ public:
DECLARE_READ32_MEMBER(igt_gk_28010008_r)
{
- return rand(); // don't quite understand this one
+ return rand(); // don't quite understand this one
};
DECLARE_READ32_MEMBER(igt_gk_28030000_r)
@@ -140,11 +140,11 @@ WRITE32_MEMBER(igt_gameking_state::clut_w)
{
case 0: m_r = (data>>16) & 0xff; m_state++; break;
case 1: m_g = (data>>16) & 0xff; m_state++; break;
- case 2:
- m_b = (data>>16) & 0xff;
+ case 2:
+ m_b = (data>>16) & 0xff;
//printf("CLUT: color %d = R %d G %d B %d\n", m_offset, m_r, m_g, m_b);
m_palette->set_pen_color(m_offset, m_r<<18 | m_g<<10 | m_b<<2);
- m_state = 0;
+ m_state = 0;
break;
}
}
@@ -192,13 +192,13 @@ static ADDRESS_MAP_START( igt_gameking_mem, AS_PROGRAM, 32, igt_gameking_state )
AM_RANGE(0x08000000, 0x081fffff) AM_ROM AM_REGION("game", 0)
AM_RANGE(0x10000000, 0x10ffffff) AM_RAM
-
- AM_RANGE(0x18000000, 0x181fffff) AM_RAM // igtsc writes from 18000000 to 1817ffff, ms3 all the way to 181fffff.
+
+ AM_RANGE(0x18000000, 0x181fffff) AM_RAM // igtsc writes from 18000000 to 1817ffff, ms3 all the way to 181fffff.
// 28010000-2801007f: first 28C94 QUART
AM_RANGE(0x28010008, 0x2801000b) AM_READ(igt_gk_28010008_r)
- AM_RANGE(0x28010030, 0x28010033) AM_READ(uart_status_r) // channel D
- AM_RANGE(0x28010034, 0x28010037) AM_WRITE(uart_w) // channel D
+ AM_RANGE(0x28010030, 0x28010033) AM_READ(uart_status_r) // channel D
+ AM_RANGE(0x28010034, 0x28010037) AM_WRITE(uart_w) // channel D
// 28020000-2802007f: second 28C94 QUART
AM_RANGE(0x28030000, 0x28030003) AM_READ(igt_gk_28030000_r)
AM_RANGE(0x28040000, 0x2804ffff) AM_RAM
@@ -206,7 +206,7 @@ static ADDRESS_MAP_START( igt_gameking_mem, AS_PROGRAM, 32, igt_gameking_state )
AM_RANGE(0x28060000, 0x28060003) AM_WRITE(clut_w)
AM_RANGE(0x28060004, 0x28060007) AM_WRITE(clut_mask_w)
- AM_RANGE(0xa1000000, 0xa1011fff) AM_RAM // used by gkkey for restart IAC
+ AM_RANGE(0xa1000000, 0xa1011fff) AM_RAM // used by gkkey for restart IAC
ADDRESS_MAP_END
@@ -259,22 +259,22 @@ MACHINE_CONFIG_END
ROM_START( ms3 )
ROM_REGION( 0x80000, "maincpu", 0 )
- ROM_LOAD( "3b5060ax.u8", 0x000000, 0x080000, CRC(aff8d874) SHA1(1cb972759ee12c944a1cfdbe68848c9b2e64a4d3) )
+ ROM_LOAD( "3b5060ax.u8", 0x000000, 0x080000, CRC(aff8d874) SHA1(1cb972759ee12c944a1cfdbe68848c9b2e64a4d3) )
ROM_REGION32_LE( 0x200000, "game", 0 )
- ROM_LOAD16_BYTE( "ea5006ax.u21", 0x000000, 0x080000, CRC(9109b2e2) SHA1(daa1f01315caf6e08c3cf8b0e4925c86d2cd8dc3) )
- ROM_LOAD16_BYTE( "ea5006ax.u5", 0x000001, 0x080000, CRC(66c33cf6) SHA1(600f75ab112348f43b38cafd6f871559372f2807) )
+ ROM_LOAD16_BYTE( "ea5006ax.u21", 0x000000, 0x080000, CRC(9109b2e2) SHA1(daa1f01315caf6e08c3cf8b0e4925c86d2cd8dc3) )
+ ROM_LOAD16_BYTE( "ea5006ax.u5", 0x000001, 0x080000, CRC(66c33cf6) SHA1(600f75ab112348f43b38cafd6f871559372f2807) )
ROM_REGION( 0x100000, "cg", 0 )
- ROM_LOAD16_BYTE( "1g5032ax.u48", 0x000000, 0x040000, CRC(aba6002f) SHA1(2ed51aa8bbc1e703cd63f633d745dfa4fa7f3dd0) )
- ROM_LOAD16_BYTE( "1g5032ax.u47", 0x000001, 0x040000, CRC(605a71ec) SHA1(13fe64c611c0903a7b79d8680de3ac81f3226a67) )
+ ROM_LOAD16_BYTE( "1g5032ax.u48", 0x000000, 0x040000, CRC(aba6002f) SHA1(2ed51aa8bbc1e703cd63f633d745dfa4fa7f3dd0) )
+ ROM_LOAD16_BYTE( "1g5032ax.u47", 0x000001, 0x040000, CRC(605a71ec) SHA1(13fe64c611c0903a7b79d8680de3ac81f3226a67) )
ROM_REGION( 0x200000, "plx", 0 )
- ROM_LOAD16_BYTE( "1g5032ax.u20", 0x000000, 0x100000, CRC(517e7478) SHA1(316a8e48ad6502f9508b06f900555d53ef40b464) )
- ROM_LOAD16_BYTE( "1g5032ax.u4", 0x000001, 0x100000, CRC(e67c878f) SHA1(b03f8d28924351e96bb9f24d32f0e4a40a51910c) )
-
+ ROM_LOAD16_BYTE( "1g5032ax.u20", 0x000000, 0x100000, CRC(517e7478) SHA1(316a8e48ad6502f9508b06f900555d53ef40b464) )
+ ROM_LOAD16_BYTE( "1g5032ax.u4", 0x000001, 0x100000, CRC(e67c878f) SHA1(b03f8d28924351e96bb9f24d32f0e4a40a51910c) )
+
ROM_REGION( 0x200000, "snd", 0 )
- ROM_LOAD( "1h5053xx.u6", 0x000000, 0x080000, CRC(6735c65a) SHA1(198cacec5441aa615c0de63a0b4e47265636bcee) )
+ ROM_LOAD( "1h5053xx.u6", 0x000000, 0x080000, CRC(6735c65a) SHA1(198cacec5441aa615c0de63a0b4e47265636bcee) )
ROM_END
ROM_START( ms72c )
diff --git a/src/mame/drivers/guab.cpp b/src/mame/drivers/guab.cpp
index 957b3f629eb..3fae6e696cc 100644
--- a/src/mame/drivers/guab.cpp
+++ b/src/mame/drivers/guab.cpp
@@ -355,36 +355,36 @@ WRITE8_MEMBER( guab_state::output2_w )
{
output().set_value("led_8", BIT(data, 0));
output().set_value("led_9", BIT(data, 1));
- output().set_value("led_10", BIT(data, 2)); // start (ten up: start)
+ output().set_value("led_10", BIT(data, 2)); // start (ten up: start)
output().set_value("led_11", BIT(data, 3)); // (ten up: feature 6)
output().set_value("led_12", BIT(data, 4)); // (ten up: feature 11)
output().set_value("led_13", BIT(data, 5)); // (ten up: feature 13)
- output().set_value("led_14", BIT(data, 6)); // lamp a (ten up: feature 12)
- output().set_value("led_15", BIT(data, 7)); // lamp b (ten up: pass)
+ output().set_value("led_14", BIT(data, 6)); // lamp a (ten up: feature 12)
+ output().set_value("led_15", BIT(data, 7)); // lamp b (ten up: pass)
}
WRITE8_MEMBER( guab_state::output3_w )
{
- output().set_value("led_16", BIT(data, 0)); // select (ten up: collect)
+ output().set_value("led_16", BIT(data, 0)); // select (ten up: collect)
output().set_value("led_17", BIT(data, 1)); // (ten up: feature 14)
output().set_value("led_18", BIT(data, 2)); // (ten up: feature 9)
output().set_value("led_19", BIT(data, 3)); // (ten up: lamp a)
- output().set_value("led_20", BIT(data, 4)); // lamp c (ten up: lamp b)
- output().set_value("led_21", BIT(data, 5)); // lamp d (ten up: lamp c)
+ output().set_value("led_20", BIT(data, 4)); // lamp c (ten up: lamp b)
+ output().set_value("led_21", BIT(data, 5)); // lamp d (ten up: lamp c)
output().set_value("led_22", BIT(data, 6));
output().set_value("led_23", BIT(data, 7));
}
WRITE8_MEMBER( guab_state::output4_w )
{
- output().set_value("led_24", BIT(data, 0)); // feature 1 (ten up: feature 1)
- output().set_value("led_25", BIT(data, 1)); // feature 2 (ten up: feature 10)
- output().set_value("led_26", BIT(data, 2)); // feature 3 (ten up: feature 7)
- output().set_value("led_27", BIT(data, 3)); // feature 4 (ten up: feature 2)
- output().set_value("led_28", BIT(data, 4)); // feature 5 (ten up: feature 8)
- output().set_value("led_29", BIT(data, 5)); // feature 6 (ten up: feature 3)
- output().set_value("led_30", BIT(data, 6)); // feature 7 (ten up: feature 4)
- output().set_value("led_31", BIT(data, 7)); // feature 8 (ten up: feature 5)
+ output().set_value("led_24", BIT(data, 0)); // feature 1 (ten up: feature 1)
+ output().set_value("led_25", BIT(data, 1)); // feature 2 (ten up: feature 10)
+ output().set_value("led_26", BIT(data, 2)); // feature 3 (ten up: feature 7)
+ output().set_value("led_27", BIT(data, 3)); // feature 4 (ten up: feature 2)
+ output().set_value("led_28", BIT(data, 4)); // feature 5 (ten up: feature 8)
+ output().set_value("led_29", BIT(data, 5)); // feature 6 (ten up: feature 3)
+ output().set_value("led_30", BIT(data, 6)); // feature 7 (ten up: feature 4)
+ output().set_value("led_31", BIT(data, 7)); // feature 8 (ten up: feature 5)
}
WRITE8_MEMBER( guab_state::output5_w )
diff --git a/src/mame/drivers/hazeltin.cpp b/src/mame/drivers/hazeltin.cpp
index b8f1ff8ee03..6c4a20110d1 100644
--- a/src/mame/drivers/hazeltin.cpp
+++ b/src/mame/drivers/hazeltin.cpp
@@ -34,7 +34,7 @@ References:
#include "netlist/devices/net_lib.h"
#define CPU_TAG "maincpu"
-#define NETLIST_TAG "videobrd"
+#define NETLIST_TAG "videobrd"
#define UART_TAG "uart"
#define BAUDGEN_TAG "baudgen"
#define KBDC_TAG "ay53600"
@@ -44,16 +44,16 @@ References:
#define MISCKEYS_TAG "misc_keys"
#define SCREEN_TAG "screen"
#define BAUD_PROM_TAG "u39"
-#define NL_PROM_TAG "videobrd:u71"
-#define NL_EPROM_TAG "videobrd:u78"
-#define VIDEO_PROM_TAG "u71"
-#define CHAR_EPROM_TAG "u78"
-#define VIDEO_OUT_TAG "videobrd:video_out"
-#define VBLANK_OUT_TAG "videobrd:vblank"
+#define NL_PROM_TAG "videobrd:u71"
+#define NL_EPROM_TAG "videobrd:u78"
+#define VIDEO_PROM_TAG "u71"
+#define CHAR_EPROM_TAG "u78"
+#define VIDEO_OUT_TAG "videobrd:video_out"
+#define VBLANK_OUT_TAG "videobrd:vblank"
#define TVINTERQ_OUT_TAG "videobrd:tvinterq"
-#define VIDEO_CLOCK (XTAL_33_264MHz/2)
-#define VIDEOBRD_CLOCK (XTAL_33_264MHz*30)
+#define VIDEO_CLOCK (XTAL_33_264MHz/2)
+#define VIDEOBRD_CLOCK (XTAL_33_264MHz*30)
#define SR2_FULL_DUPLEX (0x01)
#define SR2_UPPER_ONLY (0x08)
@@ -97,28 +97,28 @@ public:
, m_u27(*this, "videobrd:u27")
, m_u28(*this, "videobrd:u28")
, m_u29(*this, "videobrd:u29")
- , m_cpu_db0(*this, "videobrd:cpu_db0")
- , m_cpu_db1(*this, "videobrd:cpu_db1")
- , m_cpu_db2(*this, "videobrd:cpu_db2")
- , m_cpu_db3(*this, "videobrd:cpu_db3")
- , m_cpu_db4(*this, "videobrd:cpu_db4")
- , m_cpu_db5(*this, "videobrd:cpu_db5")
- , m_cpu_db6(*this, "videobrd:cpu_db6")
- , m_cpu_db7(*this, "videobrd:cpu_db7")
- , m_cpu_ba4(*this, "videobrd:cpu_ba4")
- , m_cpu_iowq(*this, "videobrd:cpu_iowq")
- , m_video_out(*this, VIDEO_OUT_TAG)
- , m_vblank_out(*this, VBLANK_OUT_TAG)
- , m_tvinterq_out(*this, TVINTERQ_OUT_TAG)
- , m_uart(*this, UART_TAG)
+ , m_cpu_db0(*this, "videobrd:cpu_db0")
+ , m_cpu_db1(*this, "videobrd:cpu_db1")
+ , m_cpu_db2(*this, "videobrd:cpu_db2")
+ , m_cpu_db3(*this, "videobrd:cpu_db3")
+ , m_cpu_db4(*this, "videobrd:cpu_db4")
+ , m_cpu_db5(*this, "videobrd:cpu_db5")
+ , m_cpu_db6(*this, "videobrd:cpu_db6")
+ , m_cpu_db7(*this, "videobrd:cpu_db7")
+ , m_cpu_ba4(*this, "videobrd:cpu_ba4")
+ , m_cpu_iowq(*this, "videobrd:cpu_iowq")
+ , m_video_out(*this, VIDEO_OUT_TAG)
+ , m_vblank_out(*this, VBLANK_OUT_TAG)
+ , m_tvinterq_out(*this, TVINTERQ_OUT_TAG)
+ , m_uart(*this, UART_TAG)
, m_kbdc(*this, KBDC_TAG)
, m_baud_dips(*this, BAUDPORT_TAG)
, m_baud_prom(*this, BAUD_PROM_TAG)
, m_misc_dips(*this, MISCPORT_TAG)
, m_kbd_misc_keys(*this, MISCKEYS_TAG)
, m_screen(*this, SCREEN_TAG)
- , m_iowq_timer(nullptr)
- , m_status_reg_3(0)
+ , m_iowq_timer(nullptr)
+ , m_status_reg_3(0)
, m_kbd_status_latch(0)
, m_refresh_address(0)
, m_screen_buf(nullptr)
@@ -126,16 +126,16 @@ public:
, m_last_hpos(0)
, m_last_vpos(0)
, m_last_fraction(0.0)
- {
+ {
}
virtual void machine_start() override;
virtual void machine_reset() override;
- virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
- static const device_timer_id TIMER_IOWQ = 0;
+ static const device_timer_id TIMER_IOWQ = 0;
- uint32_t screen_update_hazl1500(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
+ uint32_t screen_update_hazl1500(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_WRITE_LINE_MEMBER(com5016_fr_w);
@@ -157,9 +157,9 @@ public:
DECLARE_WRITE8_MEMBER(refresh_address_w);
- NETDEV_ANALOG_CALLBACK_MEMBER(video_out_cb);
- NETDEV_ANALOG_CALLBACK_MEMBER(vblank_cb);
- NETDEV_ANALOG_CALLBACK_MEMBER(tvinterq_cb);
+ NETDEV_ANALOG_CALLBACK_MEMBER(video_out_cb);
+ NETDEV_ANALOG_CALLBACK_MEMBER(vblank_cb);
+ NETDEV_ANALOG_CALLBACK_MEMBER(tvinterq_cb);
private:
required_device<cpu_device> m_maincpu;
@@ -182,20 +182,20 @@ private:
required_device<netlist_ram_pointer_t> m_u27;
required_device<netlist_ram_pointer_t> m_u28;
required_device<netlist_ram_pointer_t> m_u29;
- required_device<netlist_mame_logic_input_t> m_cpu_db0;
- required_device<netlist_mame_logic_input_t> m_cpu_db1;
- required_device<netlist_mame_logic_input_t> m_cpu_db2;
- required_device<netlist_mame_logic_input_t> m_cpu_db3;
- required_device<netlist_mame_logic_input_t> m_cpu_db4;
- required_device<netlist_mame_logic_input_t> m_cpu_db5;
- required_device<netlist_mame_logic_input_t> m_cpu_db6;
- required_device<netlist_mame_logic_input_t> m_cpu_db7;
- required_device<netlist_mame_logic_input_t> m_cpu_ba4;
- required_device<netlist_mame_logic_input_t> m_cpu_iowq;
- required_device<netlist_mame_analog_output_t> m_video_out;
- required_device<netlist_mame_analog_output_t> m_vblank_out;
- required_device<netlist_mame_analog_output_t> m_tvinterq_out;
- required_device<ay31015_device> m_uart;
+ required_device<netlist_mame_logic_input_t> m_cpu_db0;
+ required_device<netlist_mame_logic_input_t> m_cpu_db1;
+ required_device<netlist_mame_logic_input_t> m_cpu_db2;
+ required_device<netlist_mame_logic_input_t> m_cpu_db3;
+ required_device<netlist_mame_logic_input_t> m_cpu_db4;
+ required_device<netlist_mame_logic_input_t> m_cpu_db5;
+ required_device<netlist_mame_logic_input_t> m_cpu_db6;
+ required_device<netlist_mame_logic_input_t> m_cpu_db7;
+ required_device<netlist_mame_logic_input_t> m_cpu_ba4;
+ required_device<netlist_mame_logic_input_t> m_cpu_iowq;
+ required_device<netlist_mame_analog_output_t> m_video_out;
+ required_device<netlist_mame_analog_output_t> m_vblank_out;
+ required_device<netlist_mame_analog_output_t> m_tvinterq_out;
+ required_device<ay31015_device> m_uart;
required_device<ay3600_device> m_kbdc;
required_ioport m_baud_dips;
required_region_ptr<uint8_t> m_baud_prom;
@@ -204,16 +204,16 @@ private:
required_device<screen_device> m_screen;
- emu_timer* m_iowq_timer;
+ emu_timer* m_iowq_timer;
- uint8_t m_status_reg_3;
+ uint8_t m_status_reg_3;
uint8_t m_kbd_status_latch;
uint8_t m_refresh_address;
std::unique_ptr<float[]> m_screen_buf;
- double m_last_beam;
+ double m_last_beam;
int m_last_hpos;
int m_last_vpos;
double m_last_fraction;
@@ -223,10 +223,10 @@ void hazl1500_state::machine_start()
{
m_screen_buf = std::make_unique<float[]>(SCREEN_HTOTAL * SCREEN_VTOTAL);
- m_iowq_timer = timer_alloc(TIMER_IOWQ);
- m_iowq_timer->adjust(attotime::never);
+ m_iowq_timer = timer_alloc(TIMER_IOWQ);
+ m_iowq_timer->adjust(attotime::never);
- save_item(NAME(m_status_reg_3));
+ save_item(NAME(m_status_reg_3));
save_item(NAME(m_kbd_status_latch));
save_item(NAME(m_refresh_address));
save_item(NAME(m_last_beam));
@@ -243,8 +243,8 @@ void hazl1500_state::machine_reset()
void hazl1500_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
- m_cpu_iowq->write(1);
- m_cpu_ba4->write(1);
+ m_cpu_iowq->write(1);
+ m_cpu_ba4->write(1);
}
WRITE_LINE_MEMBER( hazl1500_state::com5016_fr_w )
@@ -269,9 +269,9 @@ uint32_t hazl1500_state::screen_update_hazl1500(screen_device &screen, bitmap_rg
uint32_t *scanline = &bitmap.pix32(y);
pixindex = y * SCREEN_HTOTAL;
for (int x = 0; x < SCREEN_HTOTAL; x++)
- //*scanline++ = 0xff000000 | (uint8_t(m_screen_buf[pixindex++] * 0.5) * 0x010101);
- *scanline++ = 0xff000000 | (uint8_t(m_screen_buf[pixindex++] * 63.0) * 0x010101);
- }
+ //*scanline++ = 0xff000000 | (uint8_t(m_screen_buf[pixindex++] * 0.5) * 0x010101);
+ *scanline++ = 0xff000000 | (uint8_t(m_screen_buf[pixindex++] * 63.0) * 0x010101);
+ }
return 0;
}
@@ -297,11 +297,11 @@ READ8_MEMBER( hazl1500_state::ram_r )
WRITE8_MEMBER( hazl1500_state::ram_w )
{
- uint8_t* chips[2][8] =
- {
- { m_u29->ptr(), m_u28->ptr(), m_u27->ptr(), m_u26->ptr(), m_u25->ptr(), m_u24->ptr(), m_u23->ptr(), m_u22->ptr() },
- { m_u16->ptr(), m_u15->ptr(), m_u14->ptr(), m_u13->ptr(), m_u12->ptr(), m_u11->ptr(), m_u10->ptr(), m_u9->ptr() }
- };
+ uint8_t* chips[2][8] =
+ {
+ { m_u29->ptr(), m_u28->ptr(), m_u27->ptr(), m_u26->ptr(), m_u25->ptr(), m_u24->ptr(), m_u23->ptr(), m_u22->ptr() },
+ { m_u16->ptr(), m_u15->ptr(), m_u14->ptr(), m_u13->ptr(), m_u12->ptr(), m_u11->ptr(), m_u10->ptr(), m_u9->ptr() }
+ };
int bank = ((offset & 0x400) != 0 ? 1 : 0);
const int byte_pos = (offset >> 3) & 0x7f;
@@ -388,30 +388,30 @@ WRITE_LINE_MEMBER(hazl1500_state::ay3600_data_ready_w)
NETDEV_ANALOG_CALLBACK_MEMBER(hazl1500_state::vblank_cb)
{
- synchronize();
- if (int(data) > 1)
- {
- m_kbd_status_latch &= ~KBD_STATUS_TV_UB;
- }
- else
- {
- m_kbd_status_latch |= KBD_STATUS_TV_UB;
- }
+ synchronize();
+ if (int(data) > 1)
+ {
+ m_kbd_status_latch &= ~KBD_STATUS_TV_UB;
+ }
+ else
+ {
+ m_kbd_status_latch |= KBD_STATUS_TV_UB;
+ }
}
NETDEV_ANALOG_CALLBACK_MEMBER(hazl1500_state::tvinterq_cb)
{
- synchronize();
- if (int(data) > 1)
- {
- m_kbd_status_latch &= ~KBD_STATUS_TV_INT;
- m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
- }
- else
- {
- m_kbd_status_latch |= KBD_STATUS_TV_INT;
- m_maincpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
- }
+ synchronize();
+ if (int(data) > 1)
+ {
+ m_kbd_status_latch &= ~KBD_STATUS_TV_INT;
+ m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
+ }
+ else
+ {
+ m_kbd_status_latch |= KBD_STATUS_TV_INT;
+ m_maincpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
+ }
}
NETDEV_ANALOG_CALLBACK_MEMBER(hazl1500_state::video_out_cb)
@@ -426,8 +426,8 @@ NETDEV_ANALOG_CALLBACK_MEMBER(hazl1500_state::video_out_cb)
pixel_index -= 16; // take back 16 clock cycles to honor the circuitry god whose ark this is
if (pixel_index < 0)
{
- m_last_beam = float(data);
- m_last_hpos = 0;
+ m_last_beam = float(data);
+ m_last_hpos = 0;
m_last_vpos = 0;
m_last_fraction = 0.0;
return;
@@ -447,27 +447,27 @@ NETDEV_ANALOG_CALLBACK_MEMBER(hazl1500_state::video_out_cb)
m_screen_buf[last_index++] = float(m_last_beam);
}
- m_last_beam = float(data);
- m_last_hpos = hpos;
+ m_last_beam = float(data);
+ m_last_hpos = hpos;
m_last_vpos = vpos;
m_last_fraction = pixel_fraction;
}
WRITE8_MEMBER(hazl1500_state::refresh_address_w)
{
- synchronize();
- //printf("refresh: %02x, %d, %d\n", data, m_screen->hpos(), m_screen->vpos());
- m_iowq_timer->adjust(attotime::from_hz(XTAL_18MHz/9));
- m_cpu_iowq->write(0);
- m_cpu_ba4->write(0);
- m_cpu_db0->write((data >> 0) & 1);
- m_cpu_db1->write((data >> 1) & 1);
- m_cpu_db2->write((data >> 2) & 1);
- m_cpu_db3->write((data >> 3) & 1);
- m_cpu_db4->write((data >> 4) & 1);
- m_cpu_db5->write((data >> 5) & 1);
- m_cpu_db6->write((data >> 6) & 1);
- m_cpu_db7->write((data >> 7) & 1);
+ synchronize();
+ //printf("refresh: %02x, %d, %d\n", data, m_screen->hpos(), m_screen->vpos());
+ m_iowq_timer->adjust(attotime::from_hz(XTAL_18MHz/9));
+ m_cpu_iowq->write(0);
+ m_cpu_ba4->write(0);
+ m_cpu_db0->write((data >> 0) & 1);
+ m_cpu_db1->write((data >> 1) & 1);
+ m_cpu_db2->write((data >> 2) & 1);
+ m_cpu_db3->write((data >> 3) & 1);
+ m_cpu_db4->write((data >> 4) & 1);
+ m_cpu_db5->write((data >> 5) & 1);
+ m_cpu_db6->write((data >> 6) & 1);
+ m_cpu_db7->write((data >> 7) & 1);
}
static ADDRESS_MAP_START(hazl1500_mem, AS_PROGRAM, 8, hazl1500_state)
@@ -694,12 +694,12 @@ static MACHINE_CONFIG_START( hazl1500, hazl1500_state )
/* video hardware */
MCFG_SCREEN_ADD(SCREEN_TAG, RASTER)
MCFG_SCREEN_UPDATE_DRIVER(hazl1500_state, screen_update_hazl1500)
- //MCFG_SCREEN_RAW_PARAMS(XTAL_33_264MHz / 2,
- // SCREEN_HTOTAL, SCREEN_HSTART, SCREEN_HSTART + SCREEN_HDISP,
- // SCREEN_VTOTAL, SCREEN_VSTART, SCREEN_VSTART + SCREEN_VDISP); // TODO: Figure out exact visibility
- MCFG_SCREEN_RAW_PARAMS(XTAL_33_264MHz / 2,
- SCREEN_HTOTAL, 0, SCREEN_HTOTAL,
- SCREEN_VTOTAL, 0, SCREEN_VTOTAL);
+ //MCFG_SCREEN_RAW_PARAMS(XTAL_33_264MHz / 2,
+ // SCREEN_HTOTAL, SCREEN_HSTART, SCREEN_HSTART + SCREEN_HDISP,
+ // SCREEN_VTOTAL, SCREEN_VSTART, SCREEN_VSTART + SCREEN_VDISP); // TODO: Figure out exact visibility
+ MCFG_SCREEN_RAW_PARAMS(XTAL_33_264MHz / 2,
+ SCREEN_HTOTAL, 0, SCREEN_HTOTAL,
+ SCREEN_VTOTAL, 0, SCREEN_VTOTAL);
MCFG_PALETTE_ADD_MONOCHROME("palette")
MCFG_GFXDECODE_ADD("gfxdecode", "palette", hazl1500)
@@ -735,20 +735,20 @@ static MACHINE_CONFIG_START( hazl1500, hazl1500_state )
MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u15", "u15")
MCFG_NETLIST_RAM_POINTER(NETLIST_TAG, "u16", "u16")
- MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_iowq", "cpu_iowq.IN", 0)
- MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_ba4", "cpu_ba4.IN", 0)
- MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db0", "cpu_db0.IN", 0)
- MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db1", "cpu_db1.IN", 0)
- MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db2", "cpu_db2.IN", 0)
- MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db3", "cpu_db3.IN", 0)
- MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db4", "cpu_db4.IN", 0)
- MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db5", "cpu_db5.IN", 0)
- MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db6", "cpu_db6.IN", 0)
- MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db7", "cpu_db7.IN", 0)
-
- MCFG_NETLIST_ANALOG_OUTPUT(NETLIST_TAG, "video_out", "video_out", hazl1500_state, video_out_cb, "")
- MCFG_NETLIST_ANALOG_OUTPUT(NETLIST_TAG, "vblank", "vblank", hazl1500_state, vblank_cb, "")
- MCFG_NETLIST_ANALOG_OUTPUT(NETLIST_TAG, "tvinterq", "tvinterq", hazl1500_state, tvinterq_cb, "")
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_iowq", "cpu_iowq.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_ba4", "cpu_ba4.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db0", "cpu_db0.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db1", "cpu_db1.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db2", "cpu_db2.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db3", "cpu_db3.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db4", "cpu_db4.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db5", "cpu_db5.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db6", "cpu_db6.IN", 0)
+ MCFG_NETLIST_LOGIC_INPUT(NETLIST_TAG, "cpu_db7", "cpu_db7.IN", 0)
+
+ MCFG_NETLIST_ANALOG_OUTPUT(NETLIST_TAG, "video_out", "video_out", hazl1500_state, video_out_cb, "")
+ MCFG_NETLIST_ANALOG_OUTPUT(NETLIST_TAG, "vblank", "vblank", hazl1500_state, vblank_cb, "")
+ MCFG_NETLIST_ANALOG_OUTPUT(NETLIST_TAG, "tvinterq", "tvinterq", hazl1500_state, tvinterq_cb, "")
/* keyboard controller */
MCFG_DEVICE_ADD(KBDC_TAG, AY3600, 0)
diff --git a/src/mame/drivers/hh_cop400.cpp b/src/mame/drivers/hh_cop400.cpp
index 1933eb2990f..28be622fcbf 100644
--- a/src/mame/drivers/hh_cop400.cpp
+++ b/src/mame/drivers/hh_cop400.cpp
@@ -1152,7 +1152,7 @@ MACHINE_CONFIG_END
National Semiconductor QuizKid Racer (COP420 version)
* COP420 MCU label COP420-NPG/N
* 8-digit 7seg led display(1 custom digit), 1 green led, no sound
-
+
This is the COP420 version, the first release was on a MM5799 MCU.
***************************************************************************/
diff --git a/src/mame/drivers/kaneko16.cpp b/src/mame/drivers/kaneko16.cpp
index 6f08c3d4d28..45355963f6d 100644
--- a/src/mame/drivers/kaneko16.cpp
+++ b/src/mame/drivers/kaneko16.cpp
@@ -2567,7 +2567,7 @@ explanation ingame.
void kaneko16_berlwall_state::patch_protection(uint32_t bra_offset,uint16_t bra_value,uint16_t checksum)
{
uint16_t *ROM = (uint16_t *)memregion("maincpu")->base();
-
+
ROM[bra_offset/2] = bra_value;
ROM[0x3fffe/2] = checksum;
}
diff --git a/src/mame/drivers/ladybug.cpp b/src/mame/drivers/ladybug.cpp
index e32a7c6b9f7..b8d00dbd78e 100644
--- a/src/mame/drivers/ladybug.cpp
+++ b/src/mame/drivers/ladybug.cpp
@@ -615,7 +615,7 @@ ROM_START( ladybugb2 ) // bootleg by Model Racing, PCB marked CS299, manual name
ROM_LOAD( "l9.f7", 0x0000, 0x1000, CRC(77b1da1e) SHA1(58cb82417396a3d96acfc864f091b1a5988f228d) )
ROM_LOAD( "l0.h7", 0x1000, 0x1000, CRC(aa82e00b) SHA1(83a5b745e58844b6dd7d05dfe9dbb5959aaf5c40) )
- ROM_REGION( 0x2000, "gfx2", 0 )
+ ROM_REGION( 0x2000, "gfx2", 0 )
ROM_LOAD( "l8.l7", 0x0000, 0x1000, CRC(8b99910b) SHA1(0bc812cf872f04eacedb50feed53f1aa8a1f24b9) )
ROM_LOAD( "l7.m7", 0x1000, 0x1000, CRC(86a5b448) SHA1(f8585a6fcf921e3e21f112dd2de474cb53cef290) )
diff --git a/src/mame/drivers/lwriter.cpp b/src/mame/drivers/lwriter.cpp
index a981cae8826..7cf46040af8 100644
--- a/src/mame/drivers/lwriter.cpp
+++ b/src/mame/drivers/lwriter.cpp
@@ -4,8 +4,8 @@
Apple LaserWriter II NT driver
- TODO:
- - Figure out what VIA pins is connected to switch on front that selects LocalTalk
+ TODO:
+ - Figure out what VIA pins is connected to switch on front that selects LocalTalk
- Let the board identify itself to a emulated mac driver so it displays the printer icon on the desktop
- Everything else
@@ -13,11 +13,11 @@
/*
* Hardware: 68000@11.16 MHz
8530 SCC
- 6523 TPI or 6522 VIA on newer pcb:s
- 2MB DRAM
- 2KB SRAM
- custom 335-0022 EEPROM
- 1MB ROM
+ 6523 TPI or 6522 VIA on newer pcb:s
+ 2MB DRAM
+ 2KB SRAM
+ custom 335-0022 EEPROM
+ 1MB ROM
+------------------------------------------------------------------------------------------------------------------------+=====+
| 1 2 3 4 5 6 7 8 9 10 11 | #
@@ -58,7 +58,7 @@
+------------------------------------------------------------------------------------------------------------------------+=====+
*/
-#define TPI 0 //The TPI is used on the original M6009 board but the first dump is from a newer that uses a VIA
+#define TPI 0 //The TPI is used on the original M6009 board but the first dump is from a newer that uses a VIA
#include "emu.h"
#include "cpu/m68000/m68000.h"
@@ -69,7 +69,7 @@
#include "machine/6525tpi.h"
#else
#include "machine/6522via.h"
-#endif
+#endif
class lwriter_state : public driver_device
{
@@ -105,7 +105,7 @@ static ADDRESS_MAP_START (maincpu_map, AS_PROGRAM, 16, lwriter_state)
AM_RANGE(0x00000000, 0x00000007) AM_ROM AM_READ(bootvect_r) /* ROM mirror just during reset */
AM_RANGE(0x00000000, 0x00000007) AM_RAM AM_WRITE(bootvect_w) /* After first write we act as RAM */
AM_RANGE(0x00000008, 0x001fffff) AM_RAM /* 2 Mb DRAM */
- AM_RANGE(0x00200000, 0x003fffff) AM_ROM AM_REGION("roms", 0)
+ AM_RANGE(0x00200000, 0x003fffff) AM_ROM AM_REGION("roms", 0)
AM_RANGE(0x00c00000, 0x00c00001) AM_DEVWRITE8("scc", scc8530_device, ca_w, 0x00ff)
AM_RANGE(0x00c00004, 0x00c00005) AM_DEVWRITE8("scc", scc8530_device, da_w, 0x00ff)
@@ -186,14 +186,14 @@ MACHINE_CONFIG_END
/* SCC init sequence
* :scc B Reg 09 <- c0 - Master Interrupt Control - Device reset
* -
- * :scc A Reg 0f <- 00 - External/Status Control Bits - Disable all
- * :scc B Reg 05 <- 02 - Tx setup: 5 bits, Tx disable, RTS:1 DTR:0
- * :scc B Reg 05 <- 00 - Tx setup: 5 bits, Tx disable, RTS:0 DTR:0
+ * :scc A Reg 0f <- 00 - External/Status Control Bits - Disable all
+ * :scc B Reg 05 <- 02 - Tx setup: 5 bits, Tx disable, RTS:1 DTR:0
+ * :scc B Reg 05 <- 00 - Tx setup: 5 bits, Tx disable, RTS:0 DTR:0
* -
* :scc A Reg 09 <- c0 - Master Interrupt Control - Device reset
*
* -
- * :scc A Reg 0f <- 00 - External/Status Control Bits - Disable all
+ * :scc A Reg 0f <- 00 - External/Status Control Bits - Disable all
* :scc A Reg 04 <- 4c - Setting up Asynchrounous mode: 2 Stop bits, No parity, 16x clock
* :scc A Reg 0b <- 50 - Clock Mode Control - TTL clk on RTxC, Rx and Tx clks from BRG, TRxC is input
* :scc A Reg 0e <- 00 - Misc Control Bits - BRG clk is RTxC, BRG is disabled
@@ -202,7 +202,7 @@ MACHINE_CONFIG_END
* :scc A Reg 0e <- 01 - BRG enabled with external clk from RTxC
* :scc A Reg 0a <- 00 - Synchronous parameters, all turned off
* :scc A Reg 03 <- c1 - Rx setup: 8 bits, Rx enabled
- * :scc A Reg 05 <- 6a - Tx setup: 8 bits, Tx enable, RTS:1 DTR:0
+ * :scc A Reg 05 <- 6a - Tx setup: 8 bits, Tx enable, RTS:1 DTR:0
* -
* :scc A Reg 01 <- 00 - Rx interrupt disabled
* :scc A Reg 01 <- 30 - Wait/Ready on receive, Rx int an all characters, parity affect vector
@@ -212,7 +212,7 @@ MACHINE_CONFIG_END
* :scc A Reg 00 <- 30 - Error Reset command
* :scc A Reg 00 <- 30 - Error Reset command
* - last three loops
-*/
+*/
ROM_START(lwriter)
ROM_REGION16_BE (0x1000000, "roms", 0)
diff --git a/src/mame/drivers/mac128.cpp b/src/mame/drivers/mac128.cpp
index 1089e3cf9bb..44aa12ddd3b 100755..100644
--- a/src/mame/drivers/mac128.cpp
+++ b/src/mame/drivers/mac128.cpp
@@ -1517,7 +1517,7 @@ ROM_START( mac128k )
ROM_REGION16_BE(0x100000, "bootrom", 0)
// Apple used at least 3 manufacturers for these ROMs, but they're always Apple part numbers 342-0220-A and 342-0221-A
ROMX_LOAD("342-0220-a.u6d", 0x00000, 0x08000, CRC(198210ad) SHA1(2590ff4af5ac0361babdf0dc5da18e2eecad454a), ROM_SKIP(1) )
- ROMX_LOAD("342-0221-a.u8d", 0x00001, 0x08000, CRC(fd2665c2) SHA1(8507932a854bd28196a17785c8b1851cb53eaf64), ROM_SKIP(1) )
+ ROMX_LOAD("342-0221-a.u8d", 0x00001, 0x08000, CRC(fd2665c2) SHA1(8507932a854bd28196a17785c8b1851cb53eaf64), ROM_SKIP(1) )
/* Labels seen in the wild:
VTi:
"<VTi logo along side> // 416 VH 2605 // 23256-1020 // 342-0220-A // (C)APPLE 83 // KOREA-AE"
@@ -1528,7 +1528,7 @@ ROM_START( mac128k )
Hitachi:
[can't find reference for rom-hi]
"<Hitachi 'target' logo> 8413 // 3256 016 JAPAN // (C)APPLE 83 // 342-0221-A"
-
+
References:
http://www.vintagecomputer.net/apple/Macintosh/Macintosh_motherboard.jpg
https://upload.wikimedia.org/wikipedia/commons/3/34/Macintosh-motherboard.jpg
@@ -1613,32 +1613,32 @@ ROM_START( mac512ke ) // 512ke has been observed with any of the v3, v2 or v1 ma
1st version (Lonely Hearts, checksum 4D 1E EE E1)
Bug in the SCSI driver; won't boot if external drive is turned off. We only produced about
one and a half months worth of these.
-
+
2nd version (Lonely Heifers, checksum 4D 1E EA E1):
Fixed boot bug. This version is the vast majority of beige Macintosh Pluses.
-
+
3rd version (Loud Harmonicas, checksum 4D 1F 81 72):
Fixed bug for drives that return Unit Attention on power up or reset. Basically took the
SCSI bus Reset command out of the boot sequence loop, so it will only reset once
- during boot sequence.
+ during boot sequence.
*/
/* Labels seen in the wild:
v3/4d1f8172:
- 'ROM-HI' @ U6D:
- "VLSI // 740 SA 1262 // 23512-1054 // 342-0341-C // (C)APPLE '83-'86 // KOREA A"
- "342-0341-C // (C)APPLE 85,86 // (M)AMI 8849MBL // PHILLIPINES"
- 'ROM-LO' @ U8D:
- "VLSI // 740 SA 1342 // 23512-1055 // 342-0342-B // (C)APPLE '83-'86 // KOREA A"
- "<VLSI logo>VLSI // 8905AV 0 AS759 // 23512-1055 // 342-0342-B // (C)APPLE '85-'86"
+ 'ROM-HI' @ U6D:
+ "VLSI // 740 SA 1262 // 23512-1054 // 342-0341-C // (C)APPLE '83-'86 // KOREA A"
+ "342-0341-C // (C)APPLE 85,86 // (M)AMI 8849MBL // PHILLIPINES"
+ 'ROM-LO' @ U8D:
+ "VLSI // 740 SA 1342 // 23512-1055 // 342-0342-B // (C)APPLE '83-'86 // KOREA A"
+ "<VLSI logo>VLSI // 8905AV 0 AS759 // 23512-1055 // 342-0342-B // (C)APPLE '85-'86"
v2/4d1eeae1:
- 'ROM-HI' @ U6D:
- "VTI // 624 V0 8636 // 23512-1010 // 342-0341-B // (C)APPLE '85 // MEXICO R"
- 'ROM-LO' @ U8D:
- "VTI // 622 V0 B637 // 23512-1007 // 342-0342-A // (C)APPLE '83-'85 // KOREA A"
+ 'ROM-HI' @ U6D:
+ "VTI // 624 V0 8636 // 23512-1010 // 342-0341-B // (C)APPLE '85 // MEXICO R"
+ 'ROM-LO' @ U8D:
+ "VTI // 622 V0 B637 // 23512-1007 // 342-0342-A // (C)APPLE '83-'85 // KOREA A"
v1/4d1eeee1:
- 'ROM-HI' @ U6D:
- GUESSED, since this ROM is very rare: "VTI // 62? V0 86?? // 23512-1008 // 342-0341-A // (C)APPLE '83-'85 // KOREA A"
- 'ROM-LO' @ U8D is same as v2/4d1eeae1 'ROM-LO' @ U8D
+ 'ROM-HI' @ U6D:
+ GUESSED, since this ROM is very rare: "VTI // 62? V0 86?? // 23512-1008 // 342-0341-A // (C)APPLE '83-'85 // KOREA A"
+ 'ROM-LO' @ U8D is same as v2/4d1eeae1 'ROM-LO' @ U8D
*/
ROM_END
diff --git a/src/mame/drivers/micro20.cpp b/src/mame/drivers/micro20.cpp
index 3a642f66a2c..7b4c03c27e7 100755..100644
--- a/src/mame/drivers/micro20.cpp
+++ b/src/mame/drivers/micro20.cpp
@@ -4,9 +4,9 @@
micro20.cpp
GMX Micro 20 single-board computer
-
+
68020 + 68881 FPU
-
+
800a5e = end of initial 68020 torture test
****************************************************************************/
@@ -22,9 +22,9 @@
#define MAINCPU_TAG "maincpu"
#define DUART_A_TAG "duarta"
#define DUART_B_TAG "duartb"
-#define RTC_TAG "rtc"
-#define FDC_TAG "fdc"
-#define PIT_TAG "pit"
+#define RTC_TAG "rtc"
+#define FDC_TAG "fdc"
+#define PIT_TAG "pit"
class micro20_state : public driver_device
{
@@ -44,13 +44,13 @@ public:
required_shared_ptr<uint32_t> m_mainram;
required_device<pit68230_device> m_pit;
required_device<msm58321_device> m_rtc;
-
+
virtual void machine_start() override;
virtual void machine_reset() override;
-
+
DECLARE_WRITE_LINE_MEMBER(m68k_reset_callback);
DECLARE_READ32_MEMBER(buserror_r);
-
+
TIMER_DEVICE_CALLBACK_MEMBER(micro20_timer);
DECLARE_WRITE_LINE_MEMBER(h4_w);
DECLARE_WRITE8_MEMBER(portb_w);
@@ -68,13 +68,13 @@ void micro20_state::machine_reset()
{
u32 *pROM = (uint32_t *)m_rom->base();
u32 *pRAM = (uint32_t *)m_mainram.target();
-
+
pRAM[0] = pROM[2];
pRAM[1] = pROM[3];
m_maincpu->reset();
-
+
m_maincpu->set_reset_callback(write_line_delegate(FUNC(micro20_state::m68k_reset_callback),this));
-
+
m_tin = 0;
}
@@ -100,12 +100,12 @@ WRITE8_MEMBER(micro20_state::portb_w)
m_rtc->d0_w((data & 1) ? ASSERT_LINE : CLEAR_LINE);
m_rtc->d1_w((data & 2) ? ASSERT_LINE : CLEAR_LINE);
m_rtc->d2_w((data & 4) ? ASSERT_LINE : CLEAR_LINE);
- m_rtc->d3_w((data & 8) ? ASSERT_LINE : CLEAR_LINE);
+ m_rtc->d3_w((data & 8) ? ASSERT_LINE : CLEAR_LINE);
}
WRITE8_MEMBER(micro20_state::portc_w)
{
- // MSM58321 CS1 and CS2 are tied to /RST, inverted RESET.
+ // MSM58321 CS1 and CS2 are tied to /RST, inverted RESET.
// So they're always high when the system is not reset.
m_rtc->cs1_w(ASSERT_LINE);
m_rtc->cs2_w(ASSERT_LINE);
@@ -130,12 +130,12 @@ static ADDRESS_MAP_START(micro20_map, AS_PROGRAM, 32, micro20_state )
AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_SHARE("mainram")
AM_RANGE(0x00200000, 0x002fffff) AM_READ(buserror_r)
AM_RANGE(0x00800000, 0x0083ffff) AM_ROM AM_REGION("bootrom", 0)
- AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, status_r, cmd_w, 0xff000000)
- AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, track_r, track_w, 0x00ff0000)
- AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, sector_r, sector_w, 0x0000ff00)
- AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, data_r, data_w, 0x000000ff)
+ AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, status_r, cmd_w, 0xff000000)
+ AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, track_r, track_w, 0x00ff0000)
+ AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, sector_r, sector_w, 0x0000ff00)
+ AM_RANGE(0xffff8000, 0xffff8003) AM_DEVREADWRITE8(FDC_TAG, wd1772_t, data_r, data_w, 0x000000ff)
AM_RANGE(0xffff8080, 0xffff808f) AM_DEVREADWRITE8(DUART_A_TAG, mc68681_device, read, write, 0xffffffff)
- AM_RANGE(0xffff80a0, 0xffff80af) AM_DEVREADWRITE8(DUART_B_TAG, mc68681_device, read, write, 0xffffffff)
+ AM_RANGE(0xffff80a0, 0xffff80af) AM_DEVREADWRITE8(DUART_B_TAG, mc68681_device, read, write, 0xffffffff)
AM_RANGE(0xffff80c0, 0xffff80df) AM_DEVREADWRITE8(PIT_TAG, pit68230_device, read, write, 0xffffffff)
ADDRESS_MAP_END
@@ -143,7 +143,7 @@ static MACHINE_CONFIG_START( micro20, micro20_state )
/* basic machine hardware */
MCFG_CPU_ADD(MAINCPU_TAG, M68020, XTAL_16_67MHz)
MCFG_CPU_PROGRAM_MAP(micro20_map)
-
+
MCFG_MC68681_ADD(DUART_A_TAG, XTAL_3_6864MHz)
MCFG_MC68681_A_TX_CALLBACK(DEVWRITELINE("rs232", rs232_port_device, write_txd))
@@ -151,14 +151,14 @@ static MACHINE_CONFIG_START( micro20, micro20_state )
MCFG_RS232_RXD_HANDLER(DEVWRITELINE(DUART_A_TAG, mc68681_device, rx_a_w))
MCFG_MC68681_ADD(DUART_B_TAG, XTAL_3_6864MHz)
-
+
MCFG_WD1772_ADD(FDC_TAG, XTAL_16_67MHz / 2)
-
+
MCFG_DEVICE_ADD(PIT_TAG, PIT68230, XTAL_16_67MHz / 2)
MCFG_PIT68230_H4_CB(WRITELINE(micro20_state, h4_w))
MCFG_PIT68230_PB_OUTPUT_CB(WRITE8(micro20_state, portb_w))
MCFG_PIT68230_PC_OUTPUT_CB(WRITE8(micro20_state, portc_w))
-
+
MCFG_DEVICE_ADD(RTC_TAG, MSM58321, XTAL_32_768kHz)
MCFG_MSM58321_DEFAULT_24H(false)
MCFG_MSM58321_D0_HANDLER(DEVWRITELINE(PIT_TAG, pit68230_device, pb0_w))
@@ -182,10 +182,10 @@ INPUT_PORTS_END
ROM_START( micro20 )
ROM_REGION32_BE(0x40000, "bootrom", 0)
- ROM_LOAD32_BYTE( "d00-07_u6_6791.bin", 0x000003, 0x010000, CRC(63d66ea1) SHA1(c5dfbc4d81920e1d2e981c52c1af3d486d382a35) )
- ROM_LOAD32_BYTE( "d08-15_u8_0dc6.bin", 0x000002, 0x010000, CRC(d62ef21f) SHA1(2779d430b1a0b835807627e707d46547b29ef579) )
- ROM_LOAD32_BYTE( "d16-23_u10_e5b0.bin", 0x000001, 0x010000, CRC(cd7acf86) SHA1(db994ed714a1079fbb66616355e8f18d2d1a2005) )
- ROM_LOAD32_BYTE( "d24-31_u13_d115.bin", 0x000000, 0x010000, CRC(3646d943) SHA1(97ee54063e2fe49fef2ff68d0f2e39345a75eac5) )
+ ROM_LOAD32_BYTE( "d00-07_u6_6791.bin", 0x000003, 0x010000, CRC(63d66ea1) SHA1(c5dfbc4d81920e1d2e981c52c1af3d486d382a35) )
+ ROM_LOAD32_BYTE( "d08-15_u8_0dc6.bin", 0x000002, 0x010000, CRC(d62ef21f) SHA1(2779d430b1a0b835807627e707d46547b29ef579) )
+ ROM_LOAD32_BYTE( "d16-23_u10_e5b0.bin", 0x000001, 0x010000, CRC(cd7acf86) SHA1(db994ed714a1079fbb66616355e8f18d2d1a2005) )
+ ROM_LOAD32_BYTE( "d24-31_u13_d115.bin", 0x000000, 0x010000, CRC(3646d943) SHA1(97ee54063e2fe49fef2ff68d0f2e39345a75eac5) )
ROM_END
COMP( 1984, micro20, 0, 0, micro20, micro20, driver_device, 0, "GMX", "Micro 20", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
diff --git a/src/mame/drivers/model1.cpp b/src/mame/drivers/model1.cpp
index 82aaebdfb48..02f8c8ac4bf 100644
--- a/src/mame/drivers/model1.cpp
+++ b/src/mame/drivers/model1.cpp
@@ -1683,28 +1683,28 @@ READ16_MEMBER(model1_state::r360_r)
WRITE16_MEMBER(model1_state::r360_w)
{
/*
- this uses the feedback board protocol
- command group B - these seem to be gamestates
-
- bf = init
- be = attract
- bd = setup #1 (lower safety bar etc.)
- bc = setup #2 (push emergency button)
- bb = ready to go
- ba = ingame
- b9 = game over
-
- results:
- 40 = default status
- 41 = * (setup #1 ack)
- 42 = lowered safety bar
- 43 = closed belt
- 44 = lever up
- 45 = pushed button
- 46 = game start
- 47 = game over
- 48 = lever down
- 49 = released belt
+ this uses the feedback board protocol
+ command group B - these seem to be gamestates
+
+ bf = init
+ be = attract
+ bd = setup #1 (lower safety bar etc.)
+ bc = setup #2 (push emergency button)
+ bb = ready to go
+ ba = ingame
+ b9 = game over
+
+ results:
+ 40 = default status
+ 41 = * (setup #1 ack)
+ 42 = lowered safety bar
+ 43 = closed belt
+ 44 = lever up
+ 45 = pushed button
+ 46 = game start
+ 47 = game over
+ 48 = lever down
+ 49 = released belt
*/
switch (data & 0xff)
{
@@ -1716,7 +1716,7 @@ WRITE16_MEMBER(model1_state::r360_w)
case 0xbd:
m_r360_state = ~0x44;
break;
-
+
case 0xbc:
m_r360_state = ~0x45;
break;
diff --git a/src/mame/drivers/model2.cpp b/src/mame/drivers/model2.cpp
index f1998941f15..5be07f60c5d 100644
--- a/src/mame/drivers/model2.cpp
+++ b/src/mame/drivers/model2.cpp
@@ -773,7 +773,7 @@ READ32_MEMBER(model2_state::copro_fifo_r)
else
{
// TODO
-// printf("FIFO OUT read\n");
+// printf("FIFO OUT read\n");
if (m_tgpx4->is_fifoout0_empty())
{
/* Reading from empty FIFO causes the i960 to enter wait state */
@@ -840,7 +840,7 @@ WRITE32_MEMBER(model2_state::copro_fifo_w)
}
else
{
-// printf("push %08X at %08X\n", data, space.device().safe_pc());
+// printf("push %08X at %08X\n", data, space.device().safe_pc());
m_tgpx4->fifoin_w(data);
}
}
@@ -3167,7 +3167,7 @@ ROM_START( srallycdx ) /* Sega Rally Championship DX Revision A, Model 2A - Sing
ROM_LOAD32_WORD( "mpr-17747.11", 0x000002, 0x200000, CRC(543593fd) SHA1(5ba63a77e9fc70569af21d50b3171bc8ff4522b8) )
ROM_LOAD32_WORD( "mpr-17744.8", 0x400000, 0x200000, CRC(71fed098) SHA1(1d187cad375121a45348d640edd3cc7dce658d28) )
ROM_LOAD32_WORD( "mpr-17745.9", 0x400002, 0x200000, CRC(8ecca705) SHA1(ed2b3298aad6f4e52dc672a0168183e457564b43) )
- ROM_LOAD32_WORD( "mpr-17764a.6", 0x800000, 0x200000, CRC(dcb91e31) SHA1(2725268e97b9f4c14d56c040af38bc82f5020e3e) ) // IC 6 and 7 likely EPROMs
+ ROM_LOAD32_WORD( "mpr-17764a.6", 0x800000, 0x200000, CRC(dcb91e31) SHA1(2725268e97b9f4c14d56c040af38bc82f5020e3e) ) // IC 6 and 7 likely EPROMs
ROM_LOAD32_WORD( "mpr-17765a.7", 0x800002, 0x200000, CRC(b657dc48) SHA1(ae0f1bc6e2479fa51ca36f8be3a1785981c4dfe9) )
ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
@@ -3221,8 +3221,8 @@ ROM_START( srallycdxa ) // Sega Rally Championship DX, Model 2A? - Single player
ROM_LOAD32_WORD( "epr-17765.7", 0x800002, 0x100000, CRC(81112ea5) SHA1(a0251b4f5f18ae2e2d0576087a687dd7c2e49c34) ) // NEC D27C8000D EPROM
ROM_REGION( 0x800000, "tgp", 0 ) // TGP program? (COPRO socket)
- ROM_LOAD32_WORD( "mpr-17754.28", 0x000000, 0x200000, CRC(81a84f67) SHA1(c0a9b690523a529e4015e9af10dc3fb2a1726f08) ) // not present in this rev memory test, why ?
- ROM_LOAD32_WORD( "mpr-17755.29", 0x000002, 0x200000, CRC(2a6e7da4) SHA1(e60803ae951489fe47d66731d15c32249ca547b4) ) //
+ ROM_LOAD32_WORD( "mpr-17754.28", 0x000000, 0x200000, CRC(81a84f67) SHA1(c0a9b690523a529e4015e9af10dc3fb2a1726f08) ) // not present in this rev memory test, why ?
+ ROM_LOAD32_WORD( "mpr-17755.29", 0x000002, 0x200000, CRC(2a6e7da4) SHA1(e60803ae951489fe47d66731d15c32249ca547b4) ) //
ROM_REGION( 0x010000, "drivecpu", 0 ) // Drive I/O program
ROM_LOAD( "epr-17762.ic12", 0x000000, 0x010000, NO_DUMP ) /* Need to verify actual EPR-xxxx number, might be EPR-17759 */
diff --git a/src/mame/drivers/nmk16.cpp b/src/mame/drivers/nmk16.cpp
index c11895d572b..50046220893 100644
--- a/src/mame/drivers/nmk16.cpp
+++ b/src/mame/drivers/nmk16.cpp
@@ -1134,7 +1134,7 @@ static ADDRESS_MAP_START( atombjt_map, AS_PROGRAM, 16, nmk16_state )
AM_RANGE(0x0c2014, 0x0c2015) AM_READ(atombjt_unkr_r)
AM_RANGE(0x0c2016, 0x0c2017) AM_READ_PORT("DSW1")
AM_RANGE(0x0c2018, 0x0c2019) AM_READ_PORT("DSW2")
-// AM_RANGE(0x0c201c, 0x0c201d) // oki banking related?
+// AM_RANGE(0x0c201c, 0x0c201d) // oki banking related?
AM_RANGE(0x0c201e, 0x0c201f) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("mainram")
AM_RANGE(0x100000, 0x101fff) AM_RAM
diff --git a/src/mame/drivers/pg685.cpp b/src/mame/drivers/pg685.cpp
index 9681dcd4ea7..8cfbfa7e2d3 100644
--- a/src/mame/drivers/pg685.cpp
+++ b/src/mame/drivers/pg685.cpp
@@ -490,7 +490,7 @@ static MACHINE_CONFIG_START( pg685, pg685_state )
// MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(zorba_state, fdc_drq_w))
MCFG_FLOPPY_DRIVE_ADD("fdc:0", pg685_floppies, "525qd", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_SOUND(true)
-
+
// harddisk
MCFG_DEVICE_ADD("hdc", WD2010, XTAL_10MHz / 2) // divider guessed
MCFG_WD2010_OUT_INTRQ_CB(DEVWRITELINE("mainpic", pic8259_device, ir3_w))
diff --git a/src/mame/drivers/pgm3.cpp b/src/mame/drivers/pgm3.cpp
index bf7adba35c5..218dd683b5d 100644
--- a/src/mame/drivers/pgm3.cpp
+++ b/src/mame/drivers/pgm3.cpp
@@ -8,8 +8,8 @@
Knights of Valour 3 HD
according to Xing Xing
- "The main cpu of PGM3 whiched coded as 'SOC38' is an ARM1176@800M designed by SOCLE(http://www.socle-tech.com/). Not much infomation is available on this asic"
-
+ "The main cpu of PGM3 whiched coded as 'SOC38' is an ARM1176@800M designed by SOCLE(http://www.socle-tech.com/). Not much infomation is available on this asic"
+
there is likely a 512KBytes encrypted bootloader(u-boot?) inside the cpu which load the kernel&initrd from the external SD card.
however, according to
@@ -22,14 +22,14 @@
Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
-0C2000000 EB 3C 90 6D 6B 64 6F 73 66 73 00 00 02 04 04 00 <.mkdosfs......
-0C2000010 02 00 02 00 00 F8 00 01 3F 00 FF 00 00 00 00 00 .......?......
-0C2000020 00 00 04 00 00 00 29 4C 88 BA 7C 20 20 20 20 20 ......)L|
+0C2000000 EB 3C 90 6D 6B 64 6F 73 66 73 00 00 02 04 04 00 ë<.mkdosfs......
+0C2000010 02 00 02 00 00 F8 00 01 3F 00 FF 00 00 00 00 00 .....ø..?.ÿ.....
+0C2000020 00 00 04 00 00 00 29 4C 88 BA 7C 20 20 20 20 20 ......)L.º|
0C2000030 20 20 20 20 20 20 46 41 54 31 36 20 20 20 0E 1F FAT16 ..
-0C2000040 BE 5B 7C AC 22 C0 74 0B 56 B4 0E BB 07 00 CD 10 [|"t.V....
-0C2000050 5E EB F0 32 E4 CD 16 CD 19 EB FE 54 68 69 73 20 ^2..This
+0C2000040 BE 5B 7C AC 22 C0 74 0B 56 B4 0E BB 07 00 CD 10 ¾[|¬"Àt.V´.»..Í.
+0C2000050 5E EB F0 32 E4 CD 16 CD 19 EB FE 54 68 69 73 20 ^ëð2äÍ.Í.ëþThis
0C2000060 69 73 20 6E 6F 74 20 61 20 62 6F 6F 74 61 62 6C is not a bootabl
-0C2000070 65 20 64 69 73 6B 2E 20 20 50 6C 65 61 73 65 20 e disk. Please
+0C2000070 65 20 64 69 73 6B 2E 20 20 50 6C 65 61 73 65 20 e disk. Please
0C2000080 69 6E 73 65 72 74 20 61 20 62 6F 6F 74 61 62 6C insert a bootabl
0C2000090 65 20 66 6C 6F 70 70 79 20 61 6E 64 0D 0A 70 72 e floppy and..pr
0C20000A0 65 73 73 20 61 6E 79 20 6B 65 79 20 74 6F 20 74 ess any key to t
@@ -41,10 +41,10 @@
DSW:
- 1: OFF = Game mode / ON = Test mode
- 2: OFF = JAMMA / ON = JVS
- 3: OFF = 16/9 (1280x720) / ON = 4/3 (800x600)
- 4: NO USE
+ 1: OFF = Game mode / ON = Test mode
+ 2: OFF = JAMMA / ON = JVS
+ 3: OFF = 16/9 (1280x720) / ON = 4/3 (800x600)
+ 4: NO USE
todo: add other hardware details?
@@ -125,7 +125,7 @@ ROM_START( kov3hd )
// does it boot from the card, or is there an internal rom?
DISK_REGION( "card" )
- DISK_IMAGE( "kov3hd_v105", 0, SHA1(c185888c59880805bb76b5c0a42b05c614dcff37) )
+ DISK_IMAGE( "kov3hd_v105", 0, SHA1(c185888c59880805bb76b5c0a42b05c614dcff37) )
ROM_END
ROM_START( kov3hd104 )
@@ -133,7 +133,7 @@ ROM_START( kov3hd104 )
// does it boot from the card, or is there an internal rom?
DISK_REGION( "card" )
- DISK_IMAGE( "kov3hd_m104", 0, SHA1(899b3b81825e6f23ae8f39aa67ad5b019f387cf9) )
+ DISK_IMAGE( "kov3hd_m104", 0, SHA1(899b3b81825e6f23ae8f39aa67ad5b019f387cf9) )
ROM_END
ROM_START( kov3hd103 )
@@ -141,7 +141,7 @@ ROM_START( kov3hd103 )
// does it boot from the card, or is there an internal rom?
DISK_REGION( "card" )
- DISK_IMAGE( "kov3hd_m103", 0, SHA1(0d4fd981f477cd5ed62609b875f4ddec939a2bb0) )
+ DISK_IMAGE( "kov3hd_m103", 0, SHA1(0d4fd981f477cd5ed62609b875f4ddec939a2bb0) )
ROM_END
ROM_START( kov3hd102 )
@@ -149,7 +149,7 @@ ROM_START( kov3hd102 )
// does it boot from the card, or is there an internal rom?
DISK_REGION( "card" )
- DISK_IMAGE( "kov3hd_m102", 0, SHA1(a5a872f9add5527b94019ec77ff1cd0f167f040f) )
+ DISK_IMAGE( "kov3hd_m102", 0, SHA1(a5a872f9add5527b94019ec77ff1cd0f167f040f) )
ROM_END
ROM_START( kov3hd101 )
@@ -157,7 +157,7 @@ ROM_START( kov3hd101 )
// does it boot from the card, or is there an internal rom?
DISK_REGION( "card" )
- DISK_IMAGE( "kov3hd_m101", 0, SHA1(086d6f1b8b2c01a8670fd6480da44b9c507f6e08) )
+ DISK_IMAGE( "kov3hd_m101", 0, SHA1(086d6f1b8b2c01a8670fd6480da44b9c507f6e08) )
ROM_END
diff --git a/src/mame/drivers/playmark.cpp b/src/mame/drivers/playmark.cpp
index cc094efa456..55c5040121c 100644
--- a/src/mame/drivers/playmark.cpp
+++ b/src/mame/drivers/playmark.cpp
@@ -416,7 +416,7 @@ static ADDRESS_MAP_START( oki_map, AS_0, 8, playmark_state )
AM_RANGE(0x20000, 0x3ffff) AM_ROMBANK("okibank")
ADDRESS_MAP_END
-
+
static INPUT_PORTS_START( bigtwin )
PORT_START("SYSTEM")
@@ -1307,7 +1307,7 @@ static MACHINE_CONFIG_START( wbeachvl, playmark_state )
MCFG_PIC16C5x_WRITE_B_CB(WRITE8(playmark_state, playmark_oki_w))
MCFG_PIC16C5x_READ_C_CB(READ8(playmark_state, playmark_snd_flag_r))
MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, playmark_snd_control_w))
-// MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, hrdtimes_snd_control_w)) // probably closer to this, but this only supports 2 sample bank bits
+// MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, hrdtimes_snd_control_w)) // probably closer to this, but this only supports 2 sample bank bits
MCFG_PIC16C5x_T0_CB(READLINE(playmark_state, PIC16C5X_T0_clk_r))
MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
diff --git a/src/mame/drivers/rainbow.cpp b/src/mame/drivers/rainbow.cpp
index 9a0887d1c6e..1e7df99de34 100644
--- a/src/mame/drivers/rainbow.cpp
+++ b/src/mame/drivers/rainbow.cpp
@@ -34,16 +34,16 @@ SCREEN 1 vs. SCREEN 2 IN EMULATION
// The type of monochrome monitor (VR-210 A, B or C) is selectable via another DIP (coarsly simulates a phosphor color).
BUGS
-- GDC diagnostic disk fails on 9 of 13 tests (tests 4 and 6 - 13).
+- GDC diagnostic disk fails on 9 of 13 tests (tests 4 and 6 - 13).
Details
a. (Rainbow driver) : interaction between DEC's external hardware and the NEC 7220 isn't fully understood (see page 173 of AA-AE36A)
- It is also unclear what port $50 actually does when it 'synchronizes R-M-W cycles'.
+ It is also unclear what port $50 actually does when it 'synchronizes R-M-W cycles'.
For now, we provide sane defaults for both vector and bitmap units without disturbing display mode(s) or the NEC 7220.
b. the HBLANK / VBLANK ratio is plainly wrong (quick test / subtest #6),
-c. IRQs are flagged as 'erratic' (quick test / subtest #12).
+c. IRQs are flagged as 'erratic' (quick test / subtest #12).
d. (7220) : incorrect fifo stati are handed out (GDC reports FIFO_EMPTY instead of _FULL when quick test #4 floods the queue)
-e. (7220) : RDAT with MOD 2 used extensively here, but unimplemented (modes other than 0 undocumented by NEC / Intel)
+e. (7220) : RDAT with MOD 2 used extensively here, but unimplemented (modes other than 0 undocumented by NEC / Intel)
UNIMPLEMENTED:
- Rainbow 100 A palette quirks (2 bit palette... applies to certain modes only)
@@ -61,13 +61,13 @@ To obtain pixel exact graphics use 'Graphics Only' in Video Options plus comman
Programs with initialization / redraw / reentrance problems (invocation order after reset matters in emulation):
- CANON (high resolution + vectors), Solitaire (SOLIT.EXE) and GDEMO (from GRPHCS.ARC, interactive graphics interpreter '85),
- plus 'Monitor Aligment' (from the GDC test disk). Sloppy programming or a bug related to a) to e)...?
+ plus 'Monitor Aligment' (from the GDC test disk). Sloppy programming or a bug related to a) to e)...?
Quote from Haze: "if you have 2 screens running at different refresh rates one of them won't update properly
- (the partial update system gets very confused because it expects both the screens to end at the same time
+ (the partial update system gets very confused because it expects both the screens to end at the same time
and if that isn't the case large parts of one screen end up not updating at all)
-The following games work well: MMIND (MasterMind), (G)OTELO (requires GSX), PACMAN, SCRAM (last one uses scroll extensively).
+The following games work well: MMIND (MasterMind), (G)OTELO (requires GSX), PACMAN, SCRAM (last one uses scroll extensively).
*/
// license:GPL-2.0+
@@ -305,21 +305,21 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND).
****************************************************************************/
#define RD51_MAX_HEAD 8
#define RD51_MAX_CYLINDER 1024
-#define RD51_SECTORS_PER_TRACK 17
+#define RD51_SECTORS_PER_TRACK 17
#define RTC_ENABLED
// Tested drivers (from Suitable Solutions distribution disk and Latrobe archive), preferred first -
// File.........Version / author ------------------- YY/YYYY ----- Read only RTC_BASE ---- Platform
// RBCLIK21.COM Author: Vincent Esser. With source.. 4 digits (Y2K)..Y.......$fc000/fe000..100-B (default cfg.)
-// CLIKA.COM .. V1.03A (C) 1987 Suitable Solutions.. 2 digits........N (*)...$ed000........100-A
+// CLIKA.COM .. V1.03A (C) 1987 Suitable Solutions.. 2 digits........N (*)...$ed000........100-A
// CLIKCLOK.COM V1.01 (C) 1986,87 Suitable Solutions 2 digits........N (*)...$fc000/fe000..100-B (default " )
-// CLIKF4.COM . V1.0 (C) 1986 Suitable Solutions... 2 digits........N (*)...$f4000........100-B (alternate " )
-// (*) Time or date changes are not persistent in emulation. To prove the setter works, changes are logged.
+// CLIKF4.COM . V1.0 (C) 1986 Suitable Solutions... 2 digits........N (*)...$f4000........100-B (alternate " )
+// (*) Time or date changes are not persistent in emulation. To prove the setter works, changes are logged.
-// (Y2K) DS1315 unit only holds 2 digits, so Vincent Esser's freeware employs a windowing technique.
-// While Suitable's DOS 3.10 accepts dates > 2000, don't take that for granted with software from the 80s.
+// (Y2K) DS1315 unit only holds 2 digits, so Vincent Esser's freeware employs a windowing technique.
+// While Suitable's DOS 3.10 accepts dates > 2000, don't take that for granted with software from the 80s.
#ifdef ASSUME_MODEL_A_HARDWARE
- #define RTC_BASE 0xED000
+ #define RTC_BASE 0xED000
// Define standard and maximum RAM sizes (A model):
#define MOTHERBOARD_RAM 0x0ffff // 64 K base RAM (100-A)
@@ -329,7 +329,7 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND).
#define OLD_RAM_BOARD_PRESENT
#else
#define RTC_BASE 0xFC000 // (default configuration, also covers FE000+)
-// #define RTC_BASE 0xF4000 // (alternate configuration) - ClikClok V1.0 / CLIKF4.COM
+// #define RTC_BASE 0xF4000 // (alternate configuration) - ClikClok V1.0 / CLIKF4.COM
// DEC-100-B probes until a 'flaky' area is found (BOOT ROM around F400:0E04).
// It is no longer possible to key in the RAM size from within the 100-B BIOS.
@@ -725,10 +725,10 @@ private:
// THIS MACRO * RESETS * the PATTERN TO DEFAULT.
// NOTE 2: m_patmult MUST BE LOADED BEFORE !!
#define OPTION_RESET_PATTERNS \
-m_vpat = 0xff; \
+m_vpat = 0xff; \
if(m_patmult == 0) m_patmult = 0x01;\
if(m_patcnt == 0) m_patcnt = m_patmult;\
-if(m_patidx == 0) m_patidx = 7;
+if(m_patidx == 0) m_patidx = 7;
// GDC RESET MACRO - used in "machine_reset" & GDC_EXTRA_REGISTER_w !
@@ -741,11 +741,11 @@ m_color_map_changed = true; \
for(int i=0; i <256; i++) { m_GDC_SCROLL_BUFFER[i] = i; }; \
m_GDC_scroll_index = 0; \
m_GDC_write_buffer_index = 0; \
-m_GDC_WRITE_MASK = 0x00; \
+m_GDC_WRITE_MASK = 0x00; \
m_GDC_ALU_PS_REGISTER = 0x0F; \
m_GDC_FG_BG = 0xF0; \
m_GDC_MODE_REGISTER &= GDC_MODE_VECTOR | GDC_MODE_HIGHRES | GDC_MODE_ENABLE_WRITES | GDC_MODE_READONLY_SCROLL_MAP;\
-m_GDC_MODE_REGISTER |= GDC_MODE_ENABLE_VIDEO; \
+m_GDC_MODE_REGISTER |= GDC_MODE_ENABLE_VIDEO; \
printf("\n** OPTION GRFX. RESET **\n");
UPD7220_DISPLAY_PIXELS_MEMBER( rainbow_state::hgdc_display_pixels )
@@ -766,11 +766,11 @@ UPD7220_DISPLAY_PIXELS_MEMBER( rainbow_state::hgdc_display_pixels )
uint8_t pen;
if(m_ONBOARD_GRAPHICS_SELECTED && (m_inp13->read() != DUAL_MONITOR) )
- {
+ {
for(xi=0;xi<16;xi++) // blank screen when VT102 output active (..)
- {
+ {
if (bitmap.cliprect().contains(x + xi, y))
- bitmap.pix32(y, x + xi) = 0;
+ bitmap.pix32(y, x + xi) = 0;
}
return; // no output from graphics option
}
@@ -852,7 +852,7 @@ void rainbow_state::machine_start()
rom[0xf4000 + 0x135e] = 0x00; // Floppy / RX-50 workaround: in case of Z80 RESPONSE FAILURE ($80 bit set in AL), do not block floppy access.
rom[0xf4000 + 0x198F] = 0xeb; // cond.JMP to uncond.JMP (disables error message 60...)
-
+
rom[0xf4000 + 0x315D] = 0x00; // AND DL,0 (make sure DL is zero before ROM_Initialize7201)
rom[0xf4000 + 0x315E] = 0xe2;
rom[0xf4000 + 0x315F] = 0x02;
@@ -1090,7 +1090,7 @@ INPUT_PORTS_END
void rainbow_state::machine_reset()
{
- // 'F3' (in partial emulation) here replaces 'CTRL-SETUP' (soft reboot on an original Rainbow)
+ // 'F3' (in partial emulation) here replaces 'CTRL-SETUP' (soft reboot on an original Rainbow)
// FIXME: BIOS reports error 19 when CTRL-SETUP is pressed (Z80 or flags aren't fully reset then?)
popmessage("Reset");
@@ -1117,7 +1117,7 @@ void rainbow_state::machine_reset()
#ifdef RTC_ENABLED
// *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-A' ***************************************
program.install_read_handler(RTC_BASE, RTC_BASE, read8_delegate(FUNC(rainbow_state::rtc_r), this));
- program.install_write_handler(RTC_BASE + 0xFE, RTC_BASE + 0xFF, write8_delegate(FUNC(rainbow_state::rtc_w), this));
+ program.install_write_handler(RTC_BASE + 0xFE, RTC_BASE + 0xFF, write8_delegate(FUNC(rainbow_state::rtc_w), this));
// *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-A' ***************************************
#endif
@@ -1134,7 +1134,7 @@ void rainbow_state::machine_reset()
#ifdef RTC_ENABLED
// *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-B' ***************************************
- // No address space needed ( -> IRQs must be disabled to block ROM accesses during reads ).
+ // No address space needed ( -> IRQs must be disabled to block ROM accesses during reads ).
program.install_read_handler(RTC_BASE, RTC_BASE + 0x2104, read8_delegate(FUNC(rainbow_state::rtc_r), this));
// *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-B' ***************************************
#endif
@@ -1196,10 +1196,10 @@ void rainbow_state::machine_reset()
// *********** NEC 7220 DISPLAY CONTROLLER [ OPTIONAL ]
OPTION_GRFX_RESET
-
+
OPTION_RESET_PATTERNS
- for(int i=0; i <32; i++) { m_GDC_COLOR_MAP[i] = 0x00; };
+ for(int i=0; i <32; i++) { m_GDC_COLOR_MAP[i] = 0x00; };
m_GDC_color_map_index = 0;
m_color_map_changed = true;
// *********** Z80
@@ -1343,7 +1343,7 @@ void rainbow_state::lower_8088_irq(int ref)
// IRQ service for 7201 (commm / printer)
void rainbow_state::update_mpsc_irq()
{
- if (m_mpsc_irq == 0)
+ if (m_mpsc_irq == 0)
lower_8088_irq(IRQ_COMM_PTR_INTR_L);
else
raise_8088_irq(IRQ_COMM_PTR_INTR_L);
@@ -1368,7 +1368,7 @@ WRITE8_MEMBER(rainbow_state::comm_bitrate_w)
// PORT 0x0e : Printer bit rates
WRITE8_MEMBER(rainbow_state::printer_bitrate_w)
{
- m_dbrg_B->str_w(data & 7); // bits 0 - 2
+ m_dbrg_B->str_w(data & 7); // bits 0 - 2
m_dbrg_B->stt_w(data & 7); // TX and RX rate cannot be programmed independently.
printf("\n(PRINTER) RECEIVE / TRANSMIT bitrate = %02x HEX\n",data & 7);
@@ -1388,7 +1388,7 @@ WRITE_LINE_MEMBER(rainbow_state::com8116_a_ft_w)
WRITE_LINE_MEMBER(rainbow_state::com8116_b_fr_w)
{
- m_mpsc->rxcb_w(state);
+ m_mpsc->rxcb_w(state);
}
WRITE_LINE_MEMBER(rainbow_state::com8116_b_ft_w)
@@ -1469,8 +1469,8 @@ WRITE8_MEMBER(rainbow_state::ext_ram_w)
// ------------------------ClikClok (for 100-A; DS1315) ------------------------------------------
// Version for 100-A plugs into NVRAM chip socket. There is a socket on the ClikClok for the NVRAM
-// Requires a short program from the Suitable Solutions ClikClok distribution disk (CLIKA.COM)
-// - also needed to set time/date (*). Reads $ed000, writes ed0fe/ed0ff.
+// Requires a short program from the Suitable Solutions ClikClok distribution disk (CLIKA.COM)
+// - also needed to set time/date (*). Reads $ed000, writes ed0fe/ed0ff.
WRITE8_MEMBER(rainbow_state::rtc_w)
{
if((m_inp11->read() == 0x01)) // if enabled...
@@ -1494,9 +1494,9 @@ WRITE8_MEMBER(rainbow_state::rtc_w)
}
m_p_vol_ram[offset] = data; // Poke value into VOL_RAM.
}
-
+
// ------------------------ClikClok (for 100-B; DS1315) ------------------------------------------------
-// Add-on hardware, occupies one of the EPROM sockets of the 100-B. TODO: check address decoders on board
+// Add-on hardware, occupies one of the EPROM sockets of the 100-B. TODO: check address decoders on board
// Requires CLIKCLOK.COM or RBCLIK21.COM (freeware from Latrobe). Uses FC000/FE000.
READ8_MEMBER(rainbow_state::rtc_r)
{
@@ -1505,10 +1505,10 @@ READ8_MEMBER(rainbow_state::rtc_r)
switch (offset)
{
#ifdef ASSUME_RAINBOW_A_HARDWARE
- case 0x00: // read time/date from 0xED000 (ClikClok for 100-A)
+ case 0x00: // read time/date from 0xED000 (ClikClok for 100-A)
if (m_rtc->chip_enable())
return m_rtc->read_data(space, 0) & 0x01;
- else
+ else
m_rtc->chip_reset();
#else
// Transfer data to DS1315 (data = offset):
@@ -1548,7 +1548,7 @@ READ8_MEMBER(rainbow_state::rtc_r)
}
#ifdef ASSUME_RAINBOW_A_HARDWARE
- return m_p_vol_ram[offset]; // return volatile RAM
+ return m_p_vol_ram[offset]; // return volatile RAM
#else
uint8_t *rom = memregion("maincpu")->base();
return rom[RTC_BASE + offset]; // return ROM
@@ -2237,7 +2237,7 @@ READ8_MEMBER(rainbow_state::z80_generalstat_r)
int fdc_write_gate = 0;
int last_dir = 0;
-// printf("\nFLOPPY %02d - ", m_unit);
+// printf("\nFLOPPY %02d - ", m_unit);
if (m_fdc)
{
track = m_fdc->track_r(space, 0);
@@ -2460,7 +2460,7 @@ IRQ_CALLBACK_MEMBER(rainbow_state::irq_callback)
if (i == IRQ_8088_VBL) // If VBL IRQ acknowledged...
m_crtc->MHFU(MHFU_RESET); // ...reset counter (also: DC012_W)
- if (i == IRQ_COMM_PTR_INTR_L)
+ if (i == IRQ_COMM_PTR_INTR_L)
m_mpsc->m1_r(); // serial interrupt acknowledge
intnum = vectors[i] | m_irq_high;
@@ -2540,8 +2540,8 @@ WRITE_LINE_MEMBER(rainbow_state::GDC_vblank_irq)
}
case COLOR_MONITOR:
-
- if(!(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_VIDEO))
+
+ if(!(m_GDC_MODE_REGISTER & GDC_MODE_ENABLE_VIDEO))
red = blue = 0; // Page 21 of PDF AA-AE36A (PDF) explains why
red = uint8_t( red * 17 * ( (255-video_levels[ red ] ) / 255.0f) );
green = uint8_t( mono * 17 * ( (255-video_levels[ mono ]) / 255.0f) ); // BCC-17 cable (red, mono -> green, blue)
@@ -2597,7 +2597,7 @@ WRITE_LINE_MEMBER(rainbow_state::clear_video_interrupt)
// Reflects bits from 'diagnostic_w' (1:1), except test jumpers
READ8_MEMBER(rainbow_state::diagnostic_r) // 8088 (port 0A READ). Fig.4-29 + table 4-15
-{
+{
return ((m_diagnostic & (0xf1)) |
m_inp1->read() |
m_inp2->read() |
@@ -2655,7 +2655,7 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
}
// BIT 3: PARITY (1 enables parity test on memory board. Usually 64K per bank). -> ext_ram_w.
- if(data & 0x08)
+ if(data & 0x08)
printf("\n*** PARITY TEST [on RAM EXTENSION] - (bit 3 - diagnostic_w) ");
// MISSING BITS (* not vital for normal operation, see diag.disk) -
@@ -2941,9 +2941,9 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
// read/modify/write memory cycles of the Graphics Option to those of the GDC." (?)
if( data & 1 ) // PDF QV069 suggests 1 -> 0 -> 1. Most programs just set bit 0 (PACMAN).
- {
+ {
// Graphics option software reset (separate from GDC reset...)
- OPTION_GRFX_RESET
+ OPTION_GRFX_RESET
OPTION_RESET_PATTERNS
}
break;
@@ -3182,12 +3182,12 @@ MCFG_PALETTE_ADD("palette2", 32)
MCFG_SCREEN_ADD("screen2", RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK | VIDEO_ALWAYS_UPDATE)
-// VR241 color monitor is specified for 20 MHz bandwidth ( 60 Hz / 15.72 kHz horizontal rate )
+// VR241 color monitor is specified for 20 MHz bandwidth ( 60 Hz / 15.72 kHz horizontal rate )
// - sufficient for 800 x 240 non-interlaced at 60 Hz (non interlaced).
-//MCFG_SCREEN_RAW_PARAMS(31188000 / 2 , 992, 0, 800, 262, 0, 240)
+//MCFG_SCREEN_RAW_PARAMS(31188000 / 2 , 992, 0, 800, 262, 0, 240)
// Alternate configuration:
-MCFG_SCREEN_RAW_PARAMS(31188000 / 4 , 496, 0, 400, 262, 0, 240)
+MCFG_SCREEN_RAW_PARAMS(31188000 / 4 , 496, 0, 400, 262, 0, 240)
MCFG_SCREEN_UPDATE_DEVICE("upd7220", upd7220_device, screen_update)
@@ -3228,7 +3228,7 @@ MCFG_DEVICE_ADD("com8116_a", COM8116, XTAL_5_0688MHz) // Baud rate generator
MCFG_COM8116_FR_HANDLER(WRITELINE(rainbow_state, com8116_a_fr_w))
MCFG_COM8116_FT_HANDLER(WRITELINE(rainbow_state, com8116_a_ft_w))
-MCFG_DEVICE_ADD("com8116_b", COM8116, XTAL_5_0688MHz) // Baud rate generator B
+MCFG_DEVICE_ADD("com8116_b", COM8116, XTAL_5_0688MHz) // Baud rate generator B
MCFG_COM8116_FR_HANDLER(WRITELINE(rainbow_state, com8116_b_fr_w))
MCFG_COM8116_FT_HANDLER(WRITELINE(rainbow_state, com8116_b_ft_w))
diff --git a/src/mame/drivers/savquest.cpp b/src/mame/drivers/savquest.cpp
index 89d9b887199..3d20a6ff9b2 100644
--- a/src/mame/drivers/savquest.cpp
+++ b/src/mame/drivers/savquest.cpp
@@ -9,7 +9,7 @@
TODO:
- currently asserts by selecting a s3 video bank above 1M (register 0x6a)z
-
+
- The version is labeled "SQ05" in the filesystem but has the 1999 release year.
Other components are labeled "v0.5", but the game doesn't boot far enough to see if
any graphics have version information. There appears to also be a "Savage Quest 2.1" which
diff --git a/src/mame/drivers/segas16b.cpp b/src/mame/drivers/segas16b.cpp
index ff1c4b66d4d..391d399d1f1 100644
--- a/src/mame/drivers/segas16b.cpp
+++ b/src/mame/drivers/segas16b.cpp
@@ -6453,13 +6453,13 @@ ROM_START( goldnaxe2 )
ROM_REGION( 0x1000, "mcu", 0 ) // Intel i8751 protection MCU
/* NOT CURRENTLY USED
-
+
this chip was faulty, the internal checksum routine fails. actual code looks like it should be 99.99% the
same as the 'goldnaxe' set but unused areas have different garbage fill data, so finding the bad bits is
- difficult.
+ difficult.
Calculated checksum: 5F8F
- File checksum: 5E8F */
+ File checksum: 5E8F */
ROM_LOAD( "317-0112.c2", 0x00000, 0x1000, BAD_DUMP CRC(d8f2f1c0) SHA1(04594ed5558af63cde62de6cc4020b35b8a5889e) )
ROM_END
diff --git a/src/mame/drivers/seta.cpp b/src/mame/drivers/seta.cpp
index 5724b698d4e..f292518cda7 100644
--- a/src/mame/drivers/seta.cpp
+++ b/src/mame/drivers/seta.cpp
@@ -1999,11 +1999,11 @@ static ADDRESS_MAP_START( wrofaero_map, AS_PROGRAM, 16, seta_state )
#endif
AM_RANGE(0xe00000, 0xe00001) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w)
AM_RANGE(0xf00000, 0xf00001) AM_WRITENOP // ? Sound IRQ Ack
-ADDRESS_MAP_END
+ADDRESS_MAP_END
static ADDRESS_MAP_START( zombraid_map, AS_PROGRAM, 16, seta_state )
AM_IMPORT_FROM( wrofaero_map )
- AM_RANGE(0x300000, 0x30ffff) AM_RAM AM_SHARE("nvram") // actually 8K x8 SRAM
+ AM_RANGE(0x300000, 0x30ffff) AM_RAM AM_SHARE("nvram") // actually 8K x8 SRAM
ADDRESS_MAP_END
READ16_MEMBER(seta_state::zingzipbl_unknown_r)
diff --git a/src/mame/drivers/shootout.cpp b/src/mame/drivers/shootout.cpp
index ec1565abaec..e839031a544 100644
--- a/src/mame/drivers/shootout.cpp
+++ b/src/mame/drivers/shootout.cpp
@@ -16,9 +16,9 @@
strangely features the same encryption as used on the DE-0219 board. It
also has some edited graphics.
- The DE-0219 PCB seems to have only one 12 MHz XTAL, some images with recognizable XTAL value can be found here:
- - http://www.jammarcade.net/images/2016/04/Shootout.jpg
- - http://thumbs.picclick.com/00/s/MTIwMFgxNjAw/z/7iIAAOSw5ClXxbrB/$/Data-East-Shootout-Arcade-Video-Game-Pcb-Circuit-_57.jpg
+ The DE-0219 PCB seems to have only one 12 MHz XTAL, some images with recognizable XTAL value can be found here:
+ - http://www.jammarcade.net/images/2016/04/Shootout.jpg
+ - http://thumbs.picclick.com/00/s/MTIwMFgxNjAw/z/7iIAAOSw5ClXxbrB/$/Data-East-Shootout-Arcade-Video-Game-Pcb-Circuit-_57.jpg
Driver by:
@@ -29,8 +29,8 @@
TODO:
- Lots of unmapped memory reads and writes (sprram or vram mirrors, perhaps...), bg_vram is also read.
- - Does the korean bootleg really have the DECO 222 CPU? I think it should use the shootclr.003 prom to decrypt the opcodes.
- Something like -> rom [addr] = (rom [addr] & 0x0F) | proms [rom [addr] >> 4]]);
+ - Does the korean bootleg really have the DECO 222 CPU? I think it should use the shootclr.003 prom to decrypt the opcodes.
+ Something like -> rom [addr] = (rom [addr] & 0x0F) | proms [rom [addr] >> 4]]);
*******************************************************************************/
@@ -76,15 +76,15 @@ WRITE8_MEMBER(shootout_state::flipscreen_w)
}
/*
- This is actually a double BCD counter (2 BCD digits packet in a byte)...
- The first write is always 0x40, then when a coin is inserted it starts to count from 0x01 up to 0x99.
- When it reaches 99 credits, 0x99 is always written...
+ This is actually a double BCD counter (2 BCD digits packet in a byte)...
+ The first write is always 0x40, then when a coin is inserted it starts to count from 0x01 up to 0x99.
+ When it reaches 99 credits, 0x99 is always written...
- On the shootoutj and shootoutb sets, it works as above but it counts up to 0x09 instead of 0x99 (Single BCD digit).
+ On the shootoutj and shootoutb sets, it works as above but it counts up to 0x09 instead of 0x99 (Single BCD digit).
- Note:
- This should be an input for a BCD to 7-segment decoder (e.g. a 74LS47), but all the PCBs I've seen don't have 'onboard'
- display(s), so this was implemented as normal "coin counter" (after all, they both have the same goal: count credits ;))
+ Note:
+ This should be an input for a BCD to 7-segment decoder (e.g. a 74LS47), but all the PCBs I've seen don't have 'onboard'
+ display(s), so this was implemented as normal "coin counter" (after all, they both have the same goal: count credits ;))
*/
WRITE8_MEMBER(shootout_state::coincounter_w)
{
@@ -93,7 +93,7 @@ WRITE8_MEMBER(shootout_state::coincounter_w)
// Do a coin pulse
machine().bookkeeping().coin_counter_w(0, 0);
machine().bookkeeping().coin_counter_w(0, 1);
-
+
m_ccnt_old_val = data;
}
}
@@ -282,9 +282,9 @@ static MACHINE_CONFIG_START( shootout, shootout_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
- // Guessed parameters based on the 12 MHz XTAL, but they seem resonable (TODO: Real PCB measurements)
+ // Guessed parameters based on the 12 MHz XTAL, but they seem resonable (TODO: Real PCB measurements)
MCFG_SCREEN_RAW_PARAMS (XTAL_12MHz / 2, 384, 0, 256, 262, 8, 248)
-
+
MCFG_SCREEN_UPDATE_DRIVER(shootout_state, screen_update_shootout)
MCFG_SCREEN_PALETTE("palette")
@@ -311,10 +311,10 @@ static MACHINE_CONFIG_START( shootouj, shootout_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
-
- // Guessed parameters based on the 12 MHz XTAL, but they seem resonable (TODO: Real PCB measurements)
+
+ // Guessed parameters based on the 12 MHz XTAL, but they seem resonable (TODO: Real PCB measurements)
MCFG_SCREEN_RAW_PARAMS (XTAL_12MHz / 2, 384, 0, 256, 262, 8, 248)
-
+
MCFG_SCREEN_UPDATE_DRIVER(shootout_state, screen_update_shootouj)
MCFG_SCREEN_PALETTE("palette")
diff --git a/src/mame/drivers/slapfght.cpp b/src/mame/drivers/slapfght.cpp
index d1606942322..65520599436 100644
--- a/src/mame/drivers/slapfght.cpp
+++ b/src/mame/drivers/slapfght.cpp
@@ -991,7 +991,7 @@ static MACHINE_CONFIG_START( tigerh, slapfght_state )
MCFG_M68705_PORTA_W_CB(WRITE8(slapfght_state, tigerh_mcu_porta_w))
MCFG_M68705_PORTB_W_CB(WRITE8(slapfght_state, tigerh_mcu_portb_w))
MCFG_M68705_PORTC_R_CB(READ8(slapfght_state, tigerh_mcu_portc_r))
-
+
MCFG_QUANTUM_PERFECT_CPU("maincpu")
diff --git a/src/mame/drivers/srmp2.cpp b/src/mame/drivers/srmp2.cpp
index 9c3a8b88ac7..55108fca811 100644
--- a/src/mame/drivers/srmp2.cpp
+++ b/src/mame/drivers/srmp2.cpp
@@ -215,7 +215,7 @@ WRITE8_MEMBER(srmp2_state::adpcm_code_w)
m_adpcm_eptr += (m_adpcm_bank * 0x10000);
//printf("%02x %08x %08x %08x\n",data,m_adpcm_sptr,m_adpcm_eptr,((m_adpcm_bank * 0x10000) + (data << 2) + 0));
-
+
m_msm->reset_w(0);
m_adpcm_data = -1;
}
diff --git a/src/mame/drivers/tail2nos.cpp b/src/mame/drivers/tail2nos.cpp
index 7c2b3651c41..ffee9010381 100644
--- a/src/mame/drivers/tail2nos.cpp
+++ b/src/mame/drivers/tail2nos.cpp
@@ -26,7 +26,7 @@ WRITE8_MEMBER(tail2nos_state::sound_command_w)
WRITE8_MEMBER(tail2nos_state::sound_semaphore_w)
{
- m_pending_command = 0;
+ m_pending_command = 0;
}
READ8_MEMBER(tail2nos_state::sound_semaphore_r)
@@ -55,8 +55,8 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, tail2nos_state )
AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1")
AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("DSW")
AM_RANGE(0xfff008, 0xfff009) AM_READWRITE8(sound_semaphore_r,sound_command_w,0x00ff)
-// AM_RANGE(0xfff020, 0xfff023) V-System CRTC
-// AM_RANGE(0xfff030, 0xfff031) link comms
+// AM_RANGE(0xfff020, 0xfff023) V-System CRTC
+// AM_RANGE(0xfff030, 0xfff031) link comms
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, tail2nos_state )
@@ -78,7 +78,7 @@ CUSTOM_INPUT_MEMBER(tail2nos_state::analog_in_r)
{
int num = (uintptr_t)param;
int delta = ioport(num ? "AN1" : "AN0")->read();
-
+
return delta >> 5;
}
@@ -104,9 +104,9 @@ static INPUT_PORTS_START( tail2nos )
PORT_START("IN1")
PORT_BIT( 0x0070, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, tail2nos_state,analog_in_r, (void *)1) PORT_CONDITION("DSW", 0x4000, NOTEQUALS, 0x4000)
- PORT_BIT( 0x0070, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("DSW", 0x4000, EQUALS, 0x4000)
+ PORT_BIT( 0x0070, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("DSW", 0x4000, EQUALS, 0x4000)
PORT_BIT( 0xff8f, IP_ACTIVE_LOW, IPT_UNKNOWN )
-
+
PORT_START("AN0")
PORT_BIT( 0xff, 0, IPT_AD_STICK_Z ) PORT_SENSITIVITY(10) PORT_KEYDELTA(5) PORT_NAME("Brake (original BD)") PORT_CONDITION("DSW", 0x4000, NOTEQUALS, 0x4000)
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("DSW", 0x4000, EQUALS, 0x4000)
@@ -114,7 +114,7 @@ static INPUT_PORTS_START( tail2nos )
PORT_START("AN1")
PORT_BIT( 0xff, 0, IPT_AD_STICK_Z ) PORT_SENSITIVITY(10) PORT_KEYDELTA(5) PORT_NAME("Accelerate (original BD)") PORT_CONDITION("DSW", 0x4000, NOTEQUALS, 0x4000)
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("DSW", 0x4000, EQUALS, 0x4000)
-
+
PORT_START("DSW")
PORT_DIPNAME( 0x000f, 0x0000, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
PORT_DIPSETTING( 0x0009, DEF_STR( 5C_1C ) )
diff --git a/src/mame/drivers/tmnt.cpp b/src/mame/drivers/tmnt.cpp
index 6070c0f3507..0c4dfafd384 100644
--- a/src/mame/drivers/tmnt.cpp
+++ b/src/mame/drivers/tmnt.cpp
@@ -1696,8 +1696,8 @@ static INPUT_PORTS_START( ssriders )
INPUT_PORTS_END
static INPUT_PORTS_START( ssridr4p )
- PORT_INCLUDE( ssriders )
-
+ PORT_INCLUDE( ssriders )
+
PORT_MODIFY("COINS")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 )
diff --git a/src/mame/drivers/tnzs.cpp b/src/mame/drivers/tnzs.cpp
index 80186c9ef89..ce778c89b0e 100644
--- a/src/mame/drivers/tnzs.cpp
+++ b/src/mame/drivers/tnzs.cpp
@@ -763,8 +763,8 @@ static ADDRESS_MAP_START( tnzs_sub_map, AS_PROGRAM, 8, tnzs_mcu_state )
AM_RANGE(0xc000, 0xc001) AM_READWRITE(mcu_r, mcu_w) /* not present in insectx */
AM_RANGE(0xa000, 0xa000) AM_WRITE(bankswitch1_w)
AM_RANGE(0xf000, 0xf003) AM_READ(analog_r) /* paddles in arkanoid2/plumppop. The ports are */
- /* read but not used by the other games, and are not read at */
- /* all by insectx. */
+ /* read but not used by the other games, and are not read at */
+ /* all by insectx. */
AM_IMPORT_FROM(base_sub_map)
ADDRESS_MAP_END
@@ -1697,49 +1697,49 @@ MACHINE_CONFIG_END
PCBs
***************************************************************************/
-/* The TNZS/Seta hardware has a variety of somewhat different pcbs, all of
- which have both Seta and Taito Part numbers.
- All pcbs have Z80B processors and one 6264 mainram chip and an X1-001
- and X1-002 video chip and an X1-004 I/O? Chip, and four PALs
-
-Seta# Taito#s CPUS RxM2 ROM1 MCU? Video ram PROMs SETA X1 GFXROMs QUADRATURE ESD. PROT Games Picture
-P0-022-A K1100245A J1100108A 2xZ80B 512/256 512/256 8042 4x6116 Yes, 2 03 23c1000 uPD4701AC 3x X2-003 arkanoid2, plumppop(A) http://www.classicarcaderesource.com/RevengeOfDoh3.jpg
-P0-025-A K1100241A J1100107A 2xZ80B 512/256 512/256 8042 4x6116 Yes, 2 03 23c1000 N/A 3x X2-003 drtoppel,extermatn,chukatai(B) http://arcade.ym2149.com/pcb/taito/drtoppel_pcb_partside.jpg
-P0-028-A K1100416A J1100332A 2xZ80B 512/256 512/256 8042 4x6116 No 05,06 23c1000 N/A 3x X2-004 chukatai(B) http://i.ebayimg.com/images/g/AhoAAOSw-FZXj5A5/s-l1600.jpg
-P0-038A M6100309A 3xZ80B 512/256 512/256 NONE 1x6164 No 05,06 23c1000 N/A 3x X2-003 kageki http://i.ebayimg.com/images/a/(KGrHqJ,!lwE6C8-G97lBOjOu9mwVw~~/s-l1600.jpg
-P0-041-1 CA403001A 2xZ80B 61256 27c1000 8742 1x6164 No 05,06 27c1000 N/A 5x X2-005 tnzsop(C) http://arcade.ym2149.com/pcb/taito/tnzs_pcb3_partside.jpg
-P0-041-A K1100356A J1100156A 2xZ80B 61256 27c1000 8042 1x6164 No 05,06 23c1000 N/A 5x X2-005 tnzs(j,u)o http://arcade.ym2149.com/pcb/taito/tnzs_pcb1_partside.jpg
-P0-043A M6100356A 3xZ80B* 61256 27512** NONE 1x6164 No 05,06 LH534000(C) N/A 4x X2-004 tnzs(j,u), kabukiz http://arcade.ym2149.com/pcb/taito/tnzs_pcb2_mainboard_partside.jpg
-P0-056A K1100476A J1100201A 3xZ80B EMPTY*3 27c1000 NONE 1x6164 No 05,06 LH534000 U43??? 5x X2-005 insectx(D) http://www.jammarcade.net/images/2014/04/InsectorX.jpg
+/* The TNZS/Seta hardware has a variety of somewhat different pcbs, all of
+ which have both Seta and Taito Part numbers.
+ All pcbs have Z80B processors and one 6264 mainram chip and an X1-001
+ and X1-002 video chip and an X1-004 I/O? Chip, and four PALs
+
+Seta# Taito#s CPUS RxM2 ROM1 MCU? Video ram PROMs SETA X1 GFXROMs QUADRATURE ESD. PROT Games Picture
+P0-022-A K1100245A J1100108A 2xZ80B 512/256 512/256 8042 4x6116 Yes, 2 03 23c1000 uPD4701AC 3x X2-003 arkanoid2, plumppop(A) http://www.classicarcaderesource.com/RevengeOfDoh3.jpg
+P0-025-A K1100241A J1100107A 2xZ80B 512/256 512/256 8042 4x6116 Yes, 2 03 23c1000 N/A 3x X2-003 drtoppel,extermatn,chukatai(B) http://arcade.ym2149.com/pcb/taito/drtoppel_pcb_partside.jpg
+P0-028-A K1100416A J1100332A 2xZ80B 512/256 512/256 8042 4x6116 No 05,06 23c1000 N/A 3x X2-004 chukatai(B) http://i.ebayimg.com/images/g/AhoAAOSw-FZXj5A5/s-l1600.jpg
+P0-038A M6100309A 3xZ80B 512/256 512/256 NONE 1x6164 No 05,06 23c1000 N/A 3x X2-003 kageki http://i.ebayimg.com/images/a/(KGrHqJ,!lwE6C8-G97lBOjOu9mwVw~~/s-l1600.jpg
+P0-041-1 CA403001A 2xZ80B 61256 27c1000 8742 1x6164 No 05,06 27c1000 N/A 5x X2-005 tnzsop(C) http://arcade.ym2149.com/pcb/taito/tnzs_pcb3_partside.jpg
+P0-041-A K1100356A J1100156A 2xZ80B 61256 27c1000 8042 1x6164 No 05,06 23c1000 N/A 5x X2-005 tnzs(j,u)o http://arcade.ym2149.com/pcb/taito/tnzs_pcb1_partside.jpg
+P0-043A M6100356A 3xZ80B* 61256 27512** NONE 1x6164 No 05,06 LH534000(C) N/A 4x X2-004 tnzs(j,u), kabukiz http://arcade.ym2149.com/pcb/taito/tnzs_pcb2_mainboard_partside.jpg
+P0-056A K1100476A J1100201A 3xZ80B EMPTY*3 27c1000 NONE 1x6164 No 05,06 LH534000 U43??? 5x X2-005 insectx(D) http://www.jammarcade.net/images/2014/04/InsectorX.jpg
(A) It is very likely plumppop also uses this P0-022-A PCB, as the game reads
- the quadratures the same way as arkanoid2 does.
- arkanoid2 only has 1 x2-003 ESD protection resistor pack populated, but the
- PCB can have 3, the other two (for more joysticks/buttons?) are not
- populated. arkanoid2's second maincpu socket is also empty, but this is
- clearly not the case for plumppop.
+ the quadratures the same way as arkanoid2 does.
+ arkanoid2 only has 1 x2-003 ESD protection resistor pack populated, but the
+ PCB can have 3, the other two (for more joysticks/buttons?) are not
+ populated. arkanoid2's second maincpu socket is also empty, but this is
+ clearly not the case for plumppop.
(B) chukatai has one set which unlike its earlier sets uses the P0-025-A
- PCB, but with a daughterboard which converts four of the 23c1000 gfx ROM
- sockets into 8 27c1000 eprom sockets, and DOES use color PROMs!
- The other pcb set uses P0-028-A pcb and 23c1000 mask roms and color RAM,
- but has lower rom id numbers. The higher numbered set was likely created
- by Taito to 'use up' a stock of older P0-025-A pcbs.
+ PCB, but with a daughterboard which converts four of the 23c1000 gfx ROM
+ sockets into 8 27c1000 eprom sockets, and DOES use color PROMs!
+ The other pcb set uses P0-028-A pcb and 23c1000 mask roms and color RAM,
+ but has lower rom id numbers. The higher numbered set was likely created
+ by Taito to 'use up' a stock of older P0-025-A pcbs.
(C) This is a development/prototype PCB, hence it has 32 pin sockets for the
- gfx ROMs as 27c1000 eproms, instead of 28 pin sockets for 23c1000 mask
- ROMs. It also uses an (unprotected?) 8742 MCU.
- Another curious thing is the Taito ID number may have accidentally been
- printed in backwards order, i.e should be C1100304A which fits the pattern
- of the other boards.
+ gfx ROMs as 27c1000 eproms, instead of 28 pin sockets for 23c1000 mask
+ ROMs. It also uses an (unprotected?) 8742 MCU.
+ Another curious thing is the Taito ID number may have accidentally been
+ printed in backwards order, i.e should be C1100304A which fits the pattern
+ of the other boards.
(D) InsectorX has a lot of rework on its PCB, two greenwires for each of the
- two LH534000 mask ROMs, and four wires connected to the X1-004 I/O chip
- pins 18, 19, 20, and 21, connecting it to 4 pins of a dip16 chip @ U43
- with its markings sanded off. Is this chip at U43 a tiny MCU?
-* tnzs(j,u) uses a sub board with a z80b and 23c1000 mask ROMs on it for gfx,
- plugged into the four LH534000 mask ROM sockets and the 2nd z80 socket.
- Like Kageki's P0-038A mainboard, this mainboard has a third z80 on it which
- acts in place of the 8x42 mcu used by the older tnzs sets.
-** This is a 28-pin 27512 in a 32-pin socket which alternately holds a 27c1000.
-*3 This is unpopulated, but the pcb can accept a 61256 SRAM here.
+ two LH534000 mask ROMs, and four wires connected to the X1-004 I/O chip
+ pins 18, 19, 20, and 21, connecting it to 4 pins of a dip16 chip @ U43
+ with its markings sanded off. Is this chip at U43 a tiny MCU?
+* tnzs(j,u) uses a sub board with a z80b and 23c1000 mask ROMs on it for gfx,
+ plugged into the four LH534000 mask ROM sockets and the 2nd z80 socket.
+ Like Kageki's P0-038A mainboard, this mainboard has a third z80 on it which
+ acts in place of the 8x42 mcu used by the older tnzs sets.
+** This is a 28-pin 27512 in a 32-pin socket which alternately holds a 27c1000.
+*3 This is unpopulated, but the pcb can accept a 61256 SRAM here.
*/
diff --git a/src/mame/drivers/tosh1000.cpp b/src/mame/drivers/tosh1000.cpp
index 376241770ab..ee0150afd99 100644
--- a/src/mame/drivers/tosh1000.cpp
+++ b/src/mame/drivers/tosh1000.cpp
@@ -4,16 +4,16 @@
Toshiba T1000 portable
- 80C88 CPU @ 5 MHz [OKI MSM80C88A-10GS-K (56 pin PQFP)]
- 512KB RAM + 16KB video RAM
- 32KB BIOS ROM [Toshiba TC54256AD]
- 256KB MS-DOS 2.11 ROM [Toshiba TC534000]
- SuperIO chip (Toshiba T7885) = 82C84 + 82C88 + 82C59 + upd765 + 82C53 + 82C37 + 82C55
- Real Time Clock chip: TC8521
- Keyboard controller: 80C50
- RS232C controller: 8250
+ 80C88 CPU @ 5 MHz [OKI MSM80C88A-10GS-K (56 pin PQFP)]
+ 512KB RAM + 16KB video RAM
+ 32KB BIOS ROM [Toshiba TC54256AD]
+ 256KB MS-DOS 2.11 ROM [Toshiba TC534000]
+ SuperIO chip (Toshiba T7885) = 82C84 + 82C88 + 82C59 + upd765 + 82C53 + 82C37 + 82C55
+ Real Time Clock chip: TC8521
+ Keyboard controller: 80C50
+ RS232C controller: 8250
- NB: dumps of ROM-DOS and CGA chargen are missing.
+ NB: dumps of ROM-DOS and CGA chargen are missing.
***************************************************************************/
@@ -49,7 +49,7 @@ class tosh1000_state : public driver_device
public:
tosh1000_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
- , m_maincpu(*this, "maincpu")
+ , m_maincpu(*this, "maincpu")
, m_bankdev(*this, "romdos")
{ }
@@ -80,8 +80,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( tosh1000_io, AS_IO, 8, tosh1000_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x00ff) AM_DEVICE("mb", ibm5160_mb_device, map)
- AM_RANGE(0x00c8, 0x00c8) AM_NOP // ROM-DOS page select [p. B-15]
- AM_RANGE(0x00e0, 0x00ef) AM_NOP // ???
+ AM_RANGE(0x00c8, 0x00c8) AM_NOP // ROM-DOS page select [p. B-15]
+ AM_RANGE(0x00e0, 0x00ef) AM_NOP // ???
AM_RANGE(0x02c0, 0x02cf) AM_DEVREADWRITE("rtc", rp5c01_device, read, write)
ADDRESS_MAP_END
@@ -112,7 +112,7 @@ static MACHINE_CONFIG_START( tosh1000, tosh1000_state )
MCFG_ISA8_SLOT_ADD("mb:isa", "isa3", pc_isa8_cards, "lpt", false)
MCFG_ISA8_SLOT_ADD("mb:isa", "isa4", pc_isa8_cards, "com", false)
-// MCFG_SOFTWARE_LIST_ADD("flop_list","tosh1000")
+// MCFG_SOFTWARE_LIST_ADD("flop_list","tosh1000")
MCFG_PC_KBDC_SLOT_ADD("mb:pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_KEYTRONIC_PC3270)
diff --git a/src/mame/drivers/zwackery.cpp b/src/mame/drivers/zwackery.cpp
index 6d5ac907181..de221d8a790 100644
--- a/src/mame/drivers/zwackery.cpp
+++ b/src/mame/drivers/zwackery.cpp
@@ -2,18 +2,18 @@
// copyright-holders: Aaron Giles, Bryan McPhail
/***************************************************************************
- Zwackery
+ Zwackery
- © 1984 Midway
+ © 1984 Midway
- The hardware consists of the following boards:
- - Venus CPU (B084-91668-A385)
- - Venus Video (B084-91675-A385)
- - Venus Background (B084-91672-A385)
- - Artificial Artist (B084-91671-A385)
+ The hardware consists of the following boards:
+ - Venus CPU (B084-91668-A385)
+ - Venus Video (B084-91675-A385)
+ - Venus Background (B084-91672-A385)
+ - Artificial Artist (B084-91671-A385)
- TODO:
- - Accurate screen timings
+ TODO:
+ - Accurate screen timings
***************************************************************************/
diff --git a/src/mame/includes/bublbobl.h b/src/mame/includes/bublbobl.h
index 643c5eee679..26168aca158 100644
--- a/src/mame/includes/bublbobl.h
+++ b/src/mame/includes/bublbobl.h
@@ -30,7 +30,7 @@ public:
m_slave(*this, "slave"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
- m_soundlatch(*this, "soundlatch")
+ m_soundlatch(*this, "soundlatch")
{ }
/* memory pointers */
diff --git a/src/mame/includes/fromance.h b/src/mame/includes/fromance.h
index 5e80e4d4c75..4f1256bbce3 100644
--- a/src/mame/includes/fromance.h
+++ b/src/mame/includes/fromance.h
@@ -50,7 +50,7 @@ public:
uint8_t m_crtc_register;
uint8_t m_crtc_data[0x10];
emu_timer *m_crtc_timer;
-
+
/* misc */
uint8_t m_directionflag;
uint8_t m_commanddata;
diff --git a/src/mame/includes/kaneko16.h b/src/mame/includes/kaneko16.h
index c8eb487869f..5cc0efa34fa 100644
--- a/src/mame/includes/kaneko16.h
+++ b/src/mame/includes/kaneko16.h
@@ -171,7 +171,7 @@ public:
DECLARE_VIDEO_START(berlwall);
uint32_t screen_update_berlwall(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void kaneko16_render_15bpp_bitmap(bitmap_rgb32 &bitmap, const rectangle &cliprect);
-
+
void patch_protection(uint32_t bra_offset,uint16_t bra_value,uint16_t checksum);
};
diff --git a/src/mame/includes/playmark.h b/src/mame/includes/playmark.h
index 09f3842a499..1a86acdf68c 100644
--- a/src/mame/includes/playmark.h
+++ b/src/mame/includes/playmark.h
@@ -53,7 +53,7 @@ public:
uint8_t m_oki_control;
uint8_t m_oki_command;
uint8_t m_dispenser_latch;
- int m_oki_numbanks;
+ int m_oki_numbanks;
void configure_oki_banks();
/* devices */
diff --git a/src/mame/includes/slapfght.h b/src/mame/includes/slapfght.h
index c587045e64c..9b3a66f37cf 100644
--- a/src/mame/includes/slapfght.h
+++ b/src/mame/includes/slapfght.h
@@ -100,7 +100,7 @@ public:
DECLARE_READ8_MEMBER(tigerh_mcu_porta_r);
DECLARE_WRITE8_MEMBER(tigerh_mcu_porta_w);
-
+
DECLARE_WRITE8_MEMBER(tigerh_mcu_portb_w);
DECLARE_WRITE8_MEMBER(slapfght_mcu_portb_w);
diff --git a/src/mame/includes/tail2nos.h b/src/mame/includes/tail2nos.h
index 4b63964ba9a..3bf2cc0203d 100644
--- a/src/mame/includes/tail2nos.h
+++ b/src/mame/includes/tail2nos.h
@@ -34,8 +34,8 @@ public:
int m_txbank;
int m_txpalette;
int m_video_enable;
- uint8_t m_pending_command;
-
+ uint8_t m_pending_command;
+
/* devices */
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_audiocpu;
diff --git a/src/mame/includes/tnzs.h b/src/mame/includes/tnzs.h
index 7a418ce226f..673ae0d6951 100644
--- a/src/mame/includes/tnzs.h
+++ b/src/mame/includes/tnzs.h
@@ -88,7 +88,7 @@ protected:
required_ioport m_in2;
int m_input_select;
- bool m_lockout_level;
+ bool m_lockout_level;
};
class tnzs_state : public tnzs_mcu_state
@@ -246,4 +246,4 @@ protected:
required_memory_bank m_audiobank;
};
-#endif // MAME_INCLUDES_TNZS_H \ No newline at end of file
+#endif // MAME_INCLUDES_TNZS_H
diff --git a/src/mame/machine/archimds.cpp b/src/mame/machine/archimds.cpp
index b57bed81f45..deeba18ae49 100644
--- a/src/mame/machine/archimds.cpp
+++ b/src/mame/machine/archimds.cpp
@@ -298,7 +298,7 @@ void archimedes_state::archimedes_reset()
m_ioc_regs[IRQ_STATUS_B] = 0x00; //set up IL[1] On
m_ioc_regs[FIQ_STATUS] = 0x80; //set up Force FIQ
m_ioc_regs[CONTROL] = 0xff;
-
+
m_vidc_vblank_time = 10000; // set a stupidly high time so it doesn't fire off
m_vbl_timer->adjust(attotime::never);
}
@@ -923,7 +923,7 @@ void archimedes_state::vidc_dynamic_res_change()
visarea.min_y = 0;
visarea.max_x = m_vidc_regs[VIDC_HBER] - m_vidc_regs[VIDC_HBSR] - 1;
visarea.max_y = (m_vidc_regs[VIDC_VBER] - m_vidc_regs[VIDC_VBSR]) * (m_vidc_interlace+1);
-
+
m_vidc_vblank_time = m_vidc_regs[VIDC_VBER] * (m_vidc_interlace+1);
//logerror("Configuring: htotal %d vtotal %d border %d x %d display origin %d x %d vblank = %d\n",
// m_vidc_regs[VIDC_HCR], m_vidc_regs[VIDC_VCR],
@@ -932,7 +932,7 @@ void archimedes_state::vidc_dynamic_res_change()
// m_vidc_vblank_time);
refresh = HZ_TO_ATTOSECONDS(pixel_rate[m_vidc_pixel_clk]) * m_vidc_regs[VIDC_HCR] * m_vidc_regs[VIDC_VCR];
-
+
m_screen->configure(m_vidc_regs[VIDC_HCR], m_vidc_regs[VIDC_VCR] * (m_vidc_interlace+1), visarea, refresh);
}
}
@@ -996,7 +996,7 @@ WRITE32_MEMBER(archimedes_state::archimedes_vidc_w)
m_palette->set_pen_color((reg >> 2) + 0x100 + i, pal4bit(r), pal4bit(g), pal4bit(b) );
}
}
-
+
// update partials
machine().first_screen()->update_partial(machine().first_screen()->vpos());
}
@@ -1120,17 +1120,17 @@ WRITE32_MEMBER(archimedes_state::archimedes_memc_w)
if ((data>>11) & 1)
{
//printf("MEMC: Starting audio DMA at %d uSec, buffer from %x to %x\n", ((m_vidc_regs[0xc0]&0xff)-2)*8, m_vidc_sndstart, m_vidc_sndend);
-
- #if 0 // more correct to manuals, but breaks ertictac/poizone
+
+ #if 0 // more correct to manuals, but breaks ertictac/poizone
m_snd_timer->adjust(attotime::zero, 0, attotime::from_usec(((m_vidc_regs[0xc0]&0xff)-2)*8));
- #else // original formula, definitely wrong in at least some cases
+ #else // original formula, definitely wrong in at least some cases
double sndhz;
/* FIXME: is the frequency correct? */
sndhz = (250000.0 / 2) / (double)((m_vidc_regs[0xc0]&0xff)+2);
m_snd_timer->adjust(attotime::zero, 0, attotime::from_hz(sndhz));
#endif
-
+
m_vidc_sndcur = m_vidc_sndstart;
m_vidc_sndendcur = m_vidc_sndend;
}
diff --git a/src/mame/machine/bublbobl.cpp b/src/mame/machine/bublbobl.cpp
index 8ca3f92b53a..76a76af1f4d 100644
--- a/src/mame/machine/bublbobl.cpp
+++ b/src/mame/machine/bublbobl.cpp
@@ -78,7 +78,7 @@ READ8_MEMBER(bublbobl_state::tokio_mcu_r)
m_mcu_sent = false;
-// printf("%s: tokio_mcu_r %02x\n", space.machine().describe_context(), m_from_mcu);
+// printf("%s: tokio_mcu_r %02x\n", space.machine().describe_context(), m_from_mcu);
return m_from_mcu;
}
@@ -88,7 +88,7 @@ WRITE8_MEMBER(bublbobl_state::tokio_mcu_w)
if (!m_mcu)
return;
-// printf("%s: tokio_mcu_w %02x\n", space.machine().describe_context(), data);
+// printf("%s: tokio_mcu_w %02x\n", space.machine().describe_context(), data);
m_from_main = data;
m_main_sent = true;
@@ -99,13 +99,13 @@ WRITE8_MEMBER(bublbobl_state::tokio_mcu_w)
READ8_MEMBER(bublbobl_state::tokio_mcu_porta_r)
{
-// printf("tokio_mcu_porta_r\n");
+// printf("tokio_mcu_porta_r\n");
return m_to_mcu_latch;
}
WRITE8_MEMBER(bublbobl_state::tokio_mcu_porta_w)
{
-// printf("tokio_mcu_porta_w %02x\n", data);
+// printf("tokio_mcu_porta_w %02x\n", data);
m_from_mcu_latch = data;
}
@@ -121,7 +121,7 @@ READ8_MEMBER(bublbobl_state::tokio_mcu_portc_r)
ret ^= 0x3; // inverted logic compared to tigerh
-// printf("%s: tokio_mcu_portc_r %02x\n", space.machine().describe_context(), ret);
+// printf("%s: tokio_mcu_portc_r %02x\n", space.machine().describe_context(), ret);
return ret;
}
@@ -129,7 +129,7 @@ READ8_MEMBER(bublbobl_state::tokio_mcu_portc_r)
WRITE8_MEMBER(bublbobl_state::tokio_mcu_portb_w)
{
-// printf("tokio_mcu_portb_w %02x\n", data);
+// printf("tokio_mcu_portb_w %02x\n", data);
if ((mem_mask & 0x02) && (~data & 0x02) && (m_old_portB & 0x02))
{
@@ -143,7 +143,7 @@ WRITE8_MEMBER(bublbobl_state::tokio_mcu_portb_w)
{
m_from_mcu = m_from_mcu_latch;
m_mcu_sent = true;
- // printf("sent %02x\n", m_from_mcu);
+ // printf("sent %02x\n", m_from_mcu);
}
m_old_portB = data;
diff --git a/src/mame/machine/epos.cpp b/src/mame/machine/epos.cpp
index ba9dd48a3af..3ead45d89be 100644
--- a/src/mame/machine/epos.cpp
+++ b/src/mame/machine/epos.cpp
@@ -17,13 +17,13 @@ READ8_MEMBER(pacman_state::epos_decryption_w)
switch (m_counter)
{
- case 0x08:
+ case 0x08:
case 0x09:
case 0x0A:
case 0x0B:
membank("bank1")->set_entry(m_counter & 3);
break;
-
+
default:
logerror("Invalid counter = %02X\n", m_counter);
break;
diff --git a/src/mame/machine/leland.cpp b/src/mame/machine/leland.cpp
index 6f844c9dd11..ae9972572be 100644
--- a/src/mame/machine/leland.cpp
+++ b/src/mame/machine/leland.cpp
@@ -385,7 +385,7 @@ MACHINE_START_MEMBER(leland_state,ataxx)
/* start scanline interrupts going */
m_master_int_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(leland_state::ataxx_interrupt_callback),this));
-
+
save_item(NAME(m_wcol_enable));
save_item(NAME(m_dial_last_input));
save_item(NAME(m_dial_last_result));
diff --git a/src/mame/machine/m2comm.h b/src/mame/machine/m2comm.h
index 1d5b64ca0ab..0b9cc9731fb 100644
--- a/src/mame/machine/m2comm.h
+++ b/src/mame/machine/m2comm.h
@@ -55,9 +55,9 @@ protected:
private:
uint8_t m_shared[0x4000]; // 16k shared memory
- uint8_t m_zfg; // z80 flip gate - bit 0 switches memory banks, bit7 is connected to FG bit 0
- uint8_t m_cn; // bit0 is used to enable/disable the comm board
- uint8_t m_fg; // i960 flip gate - bit0 is stored, bit7 is connected to ZFG bit 0
+ uint8_t m_zfg; // z80 flip gate - bit 0 switches memory banks, bit7 is connected to FG bit 0
+ uint8_t m_cn; // bit0 is used to enable/disable the comm board
+ uint8_t m_fg; // i960 flip gate - bit0 is stored, bit7 is connected to ZFG bit 0
emu_file m_line_rx; // rx line - can be either differential, simple serial or toslink
emu_file m_line_tx; // tx line - is differential, simple serial and toslink
diff --git a/src/mame/machine/midwayic.cpp b/src/mame/machine/midwayic.cpp
index 49c64294ba4..583434e7f58 100644
--- a/src/mame/machine/midwayic.cpp
+++ b/src/mame/machine/midwayic.cpp
@@ -223,43 +223,43 @@ void midway_serial_pic_emu_device::device_start()
READ_LINE_MEMBER(midway_serial_pic_emu_device::PIC16C5X_T0_clk_r)
{
-// printf("%s: PIC16C5X_T0_clk_r\n", machine().describe_context());
+// printf("%s: PIC16C5X_T0_clk_r\n", machine().describe_context());
return 0;
}
READ8_MEMBER(midway_serial_pic_emu_device::read_a)
{
-// printf("%s: read_a\n", space.machine().describe_context());
+// printf("%s: read_a\n", space.machine().describe_context());
return 0x00;
}
READ8_MEMBER(midway_serial_pic_emu_device::read_b)
{
-// printf("%s: read_b\n", space.machine().describe_context());
+// printf("%s: read_b\n", space.machine().describe_context());
return 0x00;
}
READ8_MEMBER(midway_serial_pic_emu_device::read_c)
{
// used
-// printf("%s: read_c\n", space.machine().describe_context());
+// printf("%s: read_c\n", space.machine().describe_context());
return 0x00;
}
WRITE8_MEMBER(midway_serial_pic_emu_device::write_a)
{
-// printf("%s: write_a %02x\n", space.machine().describe_context(), data);
+// printf("%s: write_a %02x\n", space.machine().describe_context(), data);
}
WRITE8_MEMBER(midway_serial_pic_emu_device::write_b)
{
-// printf("%s: write_b %02x\n", space.machine().describe_context(), data);
+// printf("%s: write_b %02x\n", space.machine().describe_context(), data);
}
WRITE8_MEMBER(midway_serial_pic_emu_device::write_c)
{
// used
-// printf("%s: write_c %02x\n", space.machine().describe_context(), data);
+// printf("%s: write_c %02x\n", space.machine().describe_context(), data);
}
static MACHINE_CONFIG_FRAGMENT( midway_pic )
diff --git a/src/mame/machine/naomigd.cpp b/src/mame/machine/naomigd.cpp
index 329ff6211f2..d82eb9d0166 100644
--- a/src/mame/machine/naomigd.cpp
+++ b/src/mame/machine/naomigd.cpp
@@ -50,7 +50,7 @@ DIMM controller registers
20 5F7048 |
24 5F704C 16bit Interrupt register
-------c ---b---a
- a - IRQ to DIMM (SH4 IRL3): 0 set / 1 clear
+ a - IRQ to DIMM (SH4 IRL3): 0 set / 1 clear
b - unk, mask of a ???
c - IRQ to NAOMI (HOLLY EXT 3): 0 set / 1 clear (write 0 from NAOMI seems ignored)
@@ -60,18 +60,18 @@ DIMM controller registers
c - unk, set to 1 in VxWorks, 0 in 1.02
d - unk, checked for == 1 in 1.02
-2A 8bit possible DES decryption area size 8 MSB bits (16MB units number)
+2A 8bit possible DES decryption area size 8 MSB bits (16MB units number)
VxWorks firmwares set this to ((DIMMsize >> 24) - 1), 1.02 set it to FF
-2C 32bit SDRAM config
-30 32bit DES key low
-34 32bit DES key high
+2C 32bit SDRAM config
+30 32bit DES key low
+34 32bit DES key high
SH4 IO port A bits
-------------------
9 select input, 0 - main/lower board, 1 - option/upper board (IDE, Net, PIC)
0 1
-0 DIMM SPD clk JP? 0 - enable IDE
+0 DIMM SPD clk JP? 0 - enable IDE
1 DIMM SPD data JP? 0 - enable Network
2 93C46 DI PIC16 D0
3 93C46 CS PIC16 D1
diff --git a/src/mame/machine/nl_hazelvid.cpp b/src/mame/machine/nl_hazelvid.cpp
index 1bbfa2f1bc5..e6c3a1180dd 100644
--- a/src/mame/machine/nl_hazelvid.cpp
+++ b/src/mame/machine/nl_hazelvid.cpp
@@ -60,8 +60,8 @@ NETLIST_START(hazelvid)
ALIAS(vidbus, u72.Q6)
TTL_7404_INVERT(u59_5, u72.Q7)
- TTL_7400_NAND(u83_1, high, vstrobe)
- ALIAS(char_line_clk, u83_1.Q)
+ TTL_7400_NAND(u83_1, high, vstrobe)
+ ALIAS(char_line_clk, u83_1.Q)
/* Character line counter */
TTL_74161(u84, low, low, low, low, high, u83_3.Q, char_line_clk, high, high)
@@ -72,25 +72,25 @@ NETLIST_START(hazelvid)
TTL_7400_NAND(u83_3, u84.QB, u84.QD)
TTL_7404_INVERT(u92_5, u90.QD)
- TTL_7410_NAND(u89_3, u90.QD, u90.QC, u90.QA)
+ TTL_7410_NAND(u89_3, u90.QD, u90.QC, u90.QA)
- /* Character row counter */
+ /* Character row counter */
TTL_74161(u90, low, low, low, low, high, u89_3.Q, u92_3.Q, high, high)
TTL_7404_INVERT(u92_3, u84.QD)
- TTL_7404_INVERT(u92_1, u90.QB)
+ TTL_7404_INVERT(u92_1, u90.QB)
TTL_7474(u95_2, u92_5.Q, u95_2.QQ, high, high)
- TTL_7411_AND(u91_3, u84.QA, u84.QD, u90.QB)
- TTL_7411_AND(u91_1, u92_1.Q, u90.QA, u84.QC)
+ TTL_7411_AND(u91_3, u84.QA, u84.QD, u90.QB)
+ TTL_7411_AND(u91_1, u92_1.Q, u90.QA, u84.QC)
- TTL_7404_INVERT(u92_2, u90.QC)
- TTL_7411_AND(u91_2, u95_2.QQ, u92_2.Q, u92_5.Q)
- TTL_7404_INVERT(u92_6, u91_2.Q)
+ TTL_7404_INVERT(u92_2, u90.QC)
+ TTL_7411_AND(u91_2, u95_2.QQ, u92_2.Q, u92_5.Q)
+ TTL_7404_INVERT(u92_6, u91_2.Q)
- /* Vertical blanking and drive */
- TTL_7473(u85_vdrive, char_line_clk, u91_1.Q, u91_3.Q, u85_vblankq.QQ)
- TTL_7473(u85_vblankq, char_line_clk, u92_6.Q, u91_2.Q, high)
+ /* Vertical blanking and drive */
+ TTL_7473(u85_vdrive, char_line_clk, u91_1.Q, u91_3.Q, u85_vblankq.QQ)
+ TTL_7473(u85_vblankq, char_line_clk, u92_6.Q, u91_2.Q, high)
/* Outgoing signals */
TTL_7404_INVERT(u73_4, hdriveq)
@@ -111,9 +111,9 @@ NETLIST_START(hazelvid)
TTL_7402_NOR(u60_2, hblank, u85_vblankq.QQ)
ALIAS(clr_vid_sr, u60_2.Q)
- TTL_7404_INVERT(u92_4, u84.QB)
- TTL_74260_NOR(u82_2, u85_vblankq.QQ, u92_3.Q, u84.QC, u92_4.Q, u84.QA)
- TTL_7400_NAND(u83_2, vstrobe, u82_2.Q)
+ TTL_7404_INVERT(u92_4, u84.QB)
+ TTL_74260_NOR(u82_2, u85_vblankq.QQ, u92_3.Q, u84.QC, u92_4.Q, u84.QA)
+ TTL_7400_NAND(u83_2, vstrobe, u82_2.Q)
ALIAS(sync_bus_disable_q, u83_2.Q)
ALIAS(vdrive, u85_vdrive.Q)
@@ -121,28 +121,28 @@ NETLIST_START(hazelvid)
ALIAS(vdriveq, u73_5.Q)
TTL_7474(u95_1, u84.QD, u85_vblankq.QQ, high, high)
- ALIAS(vblank, u95_1.Q)
+ ALIAS(vblank, u95_1.Q)
- TTL_74260_NOR(u82_1, u85_vblankq.QQ, u92_4.Q, u84.QD, u84.QC, low)
- TTL_7404_INVERT(u61_3, u82_1.Q)
- ALIAS(tvinterq, u61_3.Q)
+ TTL_74260_NOR(u82_1, u85_vblankq.QQ, u92_4.Q, u84.QD, u84.QC, low)
+ TTL_7404_INVERT(u61_3, u82_1.Q)
+ ALIAS(tvinterq, u61_3.Q)
- TTL_INPUT(cpu_iowq, 1)
- TTL_INPUT(cpu_ba4, 1)
- TTL_7432_OR(u36_1, cpu_iowq, cpu_ba4)
+ TTL_INPUT(cpu_iowq, 1)
+ TTL_INPUT(cpu_ba4, 1)
+ TTL_7432_OR(u36_1, cpu_iowq, cpu_ba4)
/* Character address counter */
TTL_74193(u7, low, low, low, low, low, u36_1.Q, cntclk, high)
TTL_74193(u5, cpu_db0, cpu_db1, cpu_db2, cpu_db3, low, u36_1.Q, u7.CARRYQ, u7.BORROWQ)
TTL_74193(u3, cpu_db4, cpu_db5, cpu_db6, cpu_db7, low, u36_1.Q, u5.CARRYQ, u5.BORROWQ)
- TTL_74365(u6, low, ncntbenq, u7.QA, u7.QB, u7.QC, u7.QD, u5.QA, u5.QB)
- TTL_74365(u4, low, ncntbenq, u5.QC, u5.QD, u3.QA, u3.QB, u3.QC, low)
+ TTL_74365(u6, low, ncntbenq, u7.QA, u7.QB, u7.QC, u7.QD, u5.QA, u5.QB)
+ TTL_74365(u4, low, ncntbenq, u5.QC, u5.QD, u3.QA, u3.QB, u3.QC, low)
ALIAS(ba0, u6.Y1)
ALIAS(ba1, u6.Y2)
ALIAS(ba2, u6.Y3)
ALIAS(ba3, u6.Y4)
- ALIAS(ba4, u6.Y5)
+ ALIAS(ba4, u6.Y5)
ALIAS(ba5, u6.Y6)
ALIAS(ba6, u4.Y1)
ALIAS(ba7, u4.Y2)
@@ -151,17 +151,17 @@ NETLIST_START(hazelvid)
ALIAS(ba10, u4.Y5)
/* Video RAM */
- TTL_INPUT(memwq, 1)
- TTL_INPUT(mrq, 1)
- TTL_INPUT(ba13, 0)
-
- TTL_7432_OR(u36_2, memwq, memwq)
- TTL_7400_NAND(u37_2, u36_2.Q, mrq)
- TTL_7400_NAND(u37_3, u37_2.Q, ba13)
- TTL_7400_NAND(u37_4, u37_3.Q, ncntbenq)
- TTL_7404_INVERT(u17_2, u4.Y5)
- TTL_7400_NAND(u30_2, u17_2.Q, u37_4.Q)
- TTL_7400_NAND(u37_1, u4.Y5, u37_4.Q)
+ TTL_INPUT(memwq, 1)
+ TTL_INPUT(mrq, 1)
+ TTL_INPUT(ba13, 0)
+
+ TTL_7432_OR(u36_2, memwq, memwq)
+ TTL_7400_NAND(u37_2, u36_2.Q, mrq)
+ TTL_7400_NAND(u37_3, u37_2.Q, ba13)
+ TTL_7400_NAND(u37_4, u37_3.Q, ncntbenq)
+ TTL_7404_INVERT(u17_2, u4.Y5)
+ TTL_7400_NAND(u30_2, u17_2.Q, u37_4.Q)
+ TTL_7400_NAND(u37_1, u4.Y5, u37_4.Q)
TTL_INPUT(rwq, 1)
/* Lower 1K */
@@ -182,18 +182,18 @@ NETLIST_START(hazelvid)
RAM_2102A(u13, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u13.DO)
RAM_2102A(u14, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u14.DO)
RAM_2102A(u15, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u15.DO)
- RAM_2102A(u16, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u16.DO)
-
- TTL_INPUT(cpu_db0, 0)
- TTL_INPUT(cpu_db1, 0)
- TTL_INPUT(cpu_db2, 0)
- TTL_INPUT(cpu_db3, 0)
- TTL_INPUT(cpu_db4, 0)
- TTL_INPUT(cpu_db5, 0)
- TTL_INPUT(cpu_db6, 0)
- TTL_INPUT(cpu_db7, 0)
-
- TTL_TRISTATE(db0, u30_2.Q, u29.DO, u37_1.Q, u16.DO)
+ RAM_2102A(u16, u37_1.Q, ba0, ba1, ba2, ba3, ba4, ba5, ba6, ba7, ba8, ba9, rwq, u16.DO)
+
+ TTL_INPUT(cpu_db0, 0)
+ TTL_INPUT(cpu_db1, 0)
+ TTL_INPUT(cpu_db2, 0)
+ TTL_INPUT(cpu_db3, 0)
+ TTL_INPUT(cpu_db4, 0)
+ TTL_INPUT(cpu_db5, 0)
+ TTL_INPUT(cpu_db6, 0)
+ TTL_INPUT(cpu_db7, 0)
+
+ TTL_TRISTATE(db0, u30_2.Q, u29.DO, u37_1.Q, u16.DO)
TTL_TRISTATE(db1, u30_2.Q, u28.DO, u37_1.Q, u15.DO)
TTL_TRISTATE(db2, u30_2.Q, u27.DO, u37_1.Q, u14.DO)
TTL_TRISTATE(db3, u30_2.Q, u26.DO, u37_1.Q, u13.DO)
@@ -209,7 +209,7 @@ NETLIST_START(hazelvid)
TTL_74175(u58, dot, db4.Q, db5.Q, db6.Q, db7.Q, high) // most signifcant 4 bits of each character
TTL_AM2847(u57, lbc, u58.Q1, u58.Q2, u58.Q3, u58.Q4, sync_bus_disable_q, sync_bus_disable_q, sync_bus_disable_q, sync_bus_disable_q)
- TTL_74174(u66, ndot, u67.OUTA, u67.OUTB, u67.OUTC, u67.OUTD, u57.OUTA, u57.OUTB, high)
+ TTL_74174(u66, ndot, u67.OUTA, u67.OUTB, u67.OUTC, u67.OUTD, u57.OUTA, u57.OUTB, high)
TTL_74175(u56, ndot, u57.OUTC, clr_vid_sr, u79_1.Q, u57.OUTD, high)
TTL_7400_NAND(u79_1, u56.Q4, clr_vid_sr)
ALIAS(fgbit_q, u56.Q3Q)
diff --git a/src/mame/machine/xbox.cpp b/src/mame/machine/xbox.cpp
index 7e3ddf3ae63..4405046c13a 100644
--- a/src/mame/machine/xbox.cpp
+++ b/src/mame/machine/xbox.cpp
@@ -21,9 +21,9 @@
#define LOG_PCI
//#define LOG_AUDIO
-const xbox_base_state::debugger_constants xbox_base_state::debugp[] = {
- { 0x66232714, {0x8003aae0, 0x5c, 0x1c, 0x28, 0x210, 8, 0x28, 0x1c} },
- { 0x49d8055a, {0x8003aae0, 0x5c, 0x1c, 0x28, 0x210, 8, 0x28, 0x1c} }
+const xbox_base_state::debugger_constants xbox_base_state::debugp[] = {
+ { 0x66232714, {0x8003aae0, 0x5c, 0x1c, 0x28, 0x210, 8, 0x28, 0x1c} },
+ { 0x49d8055a, {0x8003aae0, 0x5c, 0x1c, 0x28, 0x210, 8, 0x28, 0x1c} }
};
int xbox_base_state::find_bios_index(running_machine &mach)
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index e59fa1f4aab..38d44e14191 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -9613,7 +9613,7 @@ cocoe // Color Computer (Extended BASIC 1.0)
cp400 // Prologica CP400
lzcolor64 // Digiponto LZ Color64
mx1600 // Dynacom MX-1600
-t4426 // Terco T4426 CNC programming station
+t4426 // Terco T4426 CNC programming station
@source:coco3.cpp
coco3 // Color Computer 3 (NTSC)
@@ -11995,7 +11995,7 @@ sd1 // 1990 SD-1
sd132 // 1991 SD-1 32
sq1 // 1990 SQ-1
sqrack // 1990 SQ-Rack
-sq2 // 1991 SQ-2
+sq2 // 1991 SQ-2
vfx // 1989 VFX
vfxsd // 1989 VFX-SD
@@ -13387,7 +13387,7 @@ gkigtez //
gkkey //
igtsc //
ms72c //
-ms3 //
+ms3 //
@source:gladiatr.cpp
gcastle // QB (c) 1986 Taito Corporation (prototype?)
@@ -17331,7 +17331,7 @@ trojanr // 4/1986 (c) 1986 + Romstar
fball //
@source:lwriter.cpp
-lwriter // Apple LaserWriter
+lwriter // Apple LaserWriter
@source:lynx.cpp
lynx // Atari Lynx Handheld
@@ -28864,7 +28864,7 @@ quizkofk // 0080 (c) 1995 Saurus
ragnagrd // 0218 (c) 1996 Saurus
rbff1 // 0095 (c) 1995 SNK
rbff1a // 0095 (c) 1995 SNK
-rbff1k // 0095 (c) 1995 SNK
+rbff1k // 0095 (c) 1995 SNK
rbff2 // 0240 (c) 1998 SNK
rbff2h // 0240 (c) 1998 SNK
rbff2k // 0140 Censored Korean release of rbff2
@@ -29607,8 +29607,8 @@ ssam88s //
sx16 // Sanyo SX-16
zdsupers //
ncrpc4i // NCR PC4i
-laser_turbo_xt // 1988 VTech Laser Turbo XT
-laser_xt3 // 1989 VTech Laser XT/3
+laser_turbo_xt // 1988 VTech Laser Turbo XT
+laser_xt3 // 1989 VTech Laser XT/3
@source:pc100.cpp
pc100 //
@@ -35841,7 +35841,7 @@ outzonecv // TP-O18 (c) 1990 Toaplan (TP-015 conversion)
rallybik // B45 / TP-O12 (c) 1988 Taito
samesame // TP-O17 (c) 1989 Toaplan
samesame2 // TP-O17 (c) 1989 Toaplan
-samesamenh // hack
+samesamenh // hack
truxton // B65 / TP-O13B (c) 1988 Taito
vimana // TP-O19 (c) 1991 Toaplan (+ Tecmo license when set to Japan)
vimanaj // TP-O19 (c) 1991 Toaplan (+ Tecmo license when set to Japan)
diff --git a/src/mame/nl.lst b/src/mame/nl.lst
index cdf5be14295..ddd06391742 100644
--- a/src/mame/nl.lst
+++ b/src/mame/nl.lst
@@ -61,4 +61,4 @@ spelunkrj // (c) 1985 licensed from Broderbund
yanchamr // (c) 1986 (Japan)
youjyudn // (c) 1986 (Japan)
-hazl1500 \ No newline at end of file
+hazl1500
diff --git a/src/mame/video/fromance.cpp b/src/mame/video/fromance.cpp
index d94982d4ca5..a42eb221506 100644
--- a/src/mame/video/fromance.cpp
+++ b/src/mame/video/fromance.cpp
@@ -217,7 +217,7 @@ WRITE8_MEMBER(fromance_state::fromance_scroll_w)
}
else
{
-
+
switch (offset)
{
case 0:
@@ -273,12 +273,12 @@ void fromance_state::crtc_refresh()
visarea.min_y = 0;
visarea.max_x = ((m_crtc_data[0]+1)*4) - 1;
visarea.max_y = 240 - 1;
-
+
refresh = HZ_TO_ATTOSECONDS(60);
-
- m_screen->configure(512, 256, visarea, refresh);
+
+ m_screen->configure(512, 256, visarea, refresh);
}
-
+
WRITE8_MEMBER(fromance_state::fromance_crtc_data_w)
{
m_crtc_data[m_crtc_register] = data;
@@ -288,7 +288,7 @@ WRITE8_MEMBER(fromance_state::fromance_crtc_data_w)
case 0x00:
crtc_refresh();
break;
-
+
case 0x0b:
// TODO: actually is never > 0x80?
m_crtc_timer->adjust(m_screen->time_until_vblank_start(), (data > 0x80) ? 2 : 1);
diff --git a/src/mame/video/leland.cpp b/src/mame/video/leland.cpp
index a4befb9668f..7f51b56b7c7 100644
--- a/src/mame/video/leland.cpp
+++ b/src/mame/video/leland.cpp
@@ -71,7 +71,7 @@ VIDEO_START_MEMBER(leland_state,leland)
save_item(NAME(m_gfxbank));
save_item(NAME(m_last_scanline));
for (uint8_t i = 0; i < 2; i++)
- {
+ {
save_item(NAME(m_vram_state[i].m_addr), i);
save_item(NAME(m_vram_state[i].m_latch), i);
}
@@ -90,7 +90,7 @@ VIDEO_START_MEMBER(leland_state,ataxx)
save_item(NAME(m_xscroll));
save_item(NAME(m_yscroll));
for (uint8_t i = 0; i < 2; i++)
- {
+ {
save_item(NAME(m_vram_state[i].m_addr), i);
save_item(NAME(m_vram_state[i].m_latch), i);
}
diff --git a/src/osd/modules/font/font_dwrite.cpp b/src/osd/modules/font/font_dwrite.cpp
index 84b8926fe9d..732316738e7 100644
--- a/src/osd/modules/font/font_dwrite.cpp
+++ b/src/osd/modules/font/font_dwrite.cpp
@@ -80,7 +80,7 @@ HRESULT SaveBitmap(IWICBitmap* bitmap, GUID pixelFormat, const WCHAR *filename)
ComPtr<ID2D1Factory1> d2dfactory;
ComPtr<IDWriteFactory> dwriteFactory;
ComPtr<IWICImagingFactory> wicFactory;
-
+
OSD_DYNAMIC_API(dwrite, "dwrite.dll");
OSD_DYNAMIC_API(d2d1, "d2d1.dll");
OSD_DYNAMIC_API_FN(dwrite, HRESULT, WINAPI, DWriteCreateFactory, DWRITE_FACTORY_TYPE, REFIID, IUnknown **);
diff --git a/src/osd/modules/render/bgfx/shaders/makefile b/src/osd/modules/render/bgfx/shaders/makefile
index 792ef5647fd..1ca45471b9b 100644
--- a/src/osd/modules/render/bgfx/shaders/makefile
+++ b/src/osd/modules/render/bgfx/shaders/makefile
@@ -32,5 +32,5 @@ endif
@make -s --no-print-directory TARGET=3 clean all
@make -s --no-print-directory TARGET=4 clean all
@make -s --no-print-directory TARGET=5 clean all
-
+
.PHONY: main rebuild $(SUBDIRS)