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author AJR <ajrhacker@users.noreply.github.com>2018-02-01 09:42:15 -0500
committer AJR <ajrhacker@users.noreply.github.com>2018-02-01 09:42:49 -0500
commit0d9e607d56ee4c58247c3c27127a8029e40bdaed (patch)
treef6b0204e397bbfa0d854f27f90bced798451e0b3
parenta74b5ab46763f5069c0b8fdf3a84a4fbe0213cfa (diff)
v100: Start hooking up interrupts and keyboard (nw)
-rw-r--r--src/mame/drivers/v100.cpp167
1 files changed, 159 insertions, 8 deletions
diff --git a/src/mame/drivers/v100.cpp b/src/mame/drivers/v100.cpp
index f78e6530191..b6dd311994c 100644
--- a/src/mame/drivers/v100.cpp
+++ b/src/mame/drivers/v100.cpp
@@ -37,11 +37,17 @@ public:
, m_picu(*this, "picu")
, m_p_chargen(*this, "chargen")
, m_videoram(*this, "videoram")
+ , m_key_row(*this, "ROW%u", 0)
{ }
- template<int n> DECLARE_WRITE8_MEMBER(brg_w);
+ template<int N> DECLARE_WRITE8_MEMBER(brg_w);
DECLARE_READ8_MEMBER(earom_r);
+ DECLARE_WRITE8_MEMBER(port30_w);
+ DECLARE_READ8_MEMBER(keyboard_r);
+ DECLARE_WRITE8_MEMBER(key_row_w);
+ DECLARE_WRITE8_MEMBER(port48_w);
DECLARE_WRITE8_MEMBER(picu_w);
+ template<int N> DECLARE_WRITE_LINE_MEMBER(picu_r_w);
IRQ_CALLBACK_MEMBER(irq_ack);
DECLARE_WRITE8_MEMBER(ppi_porta_w);
@@ -59,6 +65,9 @@ private:
required_device<i8214_device> m_picu;
required_region_ptr<u8> m_p_chargen;
required_shared_ptr<u8> m_videoram;
+ optional_ioport_array<16> m_key_row;
+
+ u8 m_active_row;
};
u32 v100_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
@@ -146,13 +155,16 @@ void v100_state::machine_start()
{
m_picu->inte_w(1);
m_picu->etlg_w(1);
+
+ m_active_row = 0;
+ save_item(NAME(m_active_row));
}
-template<int n>
+template<int N>
WRITE8_MEMBER(v100_state::brg_w)
{
- m_brg[n]->str_w(data & 0x0f);
- m_brg[n]->stt_w(data >> 4);
+ m_brg[N]->str_w(data & 0x0f);
+ m_brg[N]->stt_w(data >> 4);
}
READ8_MEMBER(v100_state::earom_r)
@@ -160,12 +172,40 @@ READ8_MEMBER(v100_state::earom_r)
return m_earom->data_r();
}
+WRITE8_MEMBER(v100_state::port30_w)
+{
+ // D6 = cursor/text blinking?
+
+ //logerror("Writing %02X to port 30\n", data);
+}
+
+READ8_MEMBER(v100_state::keyboard_r)
+{
+ return m_key_row[m_active_row & 15].read_safe(0xff);
+}
+
+WRITE8_MEMBER(v100_state::key_row_w)
+{
+ m_active_row = data;
+}
+
+WRITE8_MEMBER(v100_state::port48_w)
+{
+ //logerror("Writing %02X to port 48\n", data);
+}
+
WRITE8_MEMBER(v100_state::picu_w)
{
m_picu->b_w((data & 0x0e) >> 1);
m_picu->sgs_w(BIT(data, 4));
}
+template<int N>
+WRITE_LINE_MEMBER(v100_state::picu_r_w)
+{
+ m_picu->r_w(N, state);
+}
+
IRQ_CALLBACK_MEMBER(v100_state::irq_ack)
{
m_maincpu->set_input_line(0, CLEAR_LINE);
@@ -177,7 +217,7 @@ WRITE8_MEMBER(v100_state::ppi_porta_w)
m_vtac->set_clock_scale(BIT(data, 5) ? 0.5 : 1.0);
m_screen->set_clock_scale(BIT(data, 5) ? 0.5 : 1.0);
- logerror("Writing %02X to PPI port A\n", data);
+ //logerror("Writing %02X to PPI port A\n", data);
}
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, v100_state )
@@ -196,15 +236,124 @@ static ADDRESS_MAP_START( io_map, AS_IO, 8, v100_state )
AM_RANGE(0x15, 0x15) AM_DEVREADWRITE("usart2", i8251_device, status_r, control_w)
AM_RANGE(0x16, 0x16) AM_WRITE(brg_w<1>)
AM_RANGE(0x20, 0x20) AM_READ(earom_r)
- // 0x30 - write ???
- AM_RANGE(0x40, 0x40) AM_NOP // read/write ???
- // 0x48 - write ???
+ AM_RANGE(0x30, 0x30) AM_WRITE(port30_w)
+ AM_RANGE(0x40, 0x40) AM_READWRITE(keyboard_r, key_row_w)
+ AM_RANGE(0x48, 0x48) AM_WRITE(port48_w)
AM_RANGE(0x60, 0x60) AM_WRITE(picu_w)
AM_RANGE(0x70, 0x73) AM_DEVREADWRITE("ppi", i8255_device, read, write)
ADDRESS_MAP_END
static INPUT_PORTS_START( v100 )
+ PORT_START("ROW0")
+ PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Set-Up") PORT_CODE(KEYCODE_F1)
+ PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
+
+ PORT_START("ROW1")
+ PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
+
+ PORT_START("ROW2")
+ PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
+
+ PORT_START("ROW3")
+ PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
+
+ PORT_START("ROW4")
+ PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
+
+ PORT_START("ROW5")
+ PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
+
+ PORT_START("ROW6")
+ PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
+
+ PORT_START("ROW7")
+ PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
+
+ PORT_START("ROW8")
+ PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
+
+ PORT_START("ROW9")
+ PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
+
+ PORT_START("ROW10")
+ PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
+ PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
INPUT_PORTS_END
@@ -235,6 +384,8 @@ MACHINE_CONFIG_START(v100_state::v100)
MCFG_DEVICE_ADD("vtac", CRT5037, XTAL(47'736'000))
MCFG_TMS9927_CHAR_WIDTH(CHAR_WIDTH)
MCFG_VIDEO_SET_SCREEN("screen")
+ MCFG_TMS9927_HSYN_CALLBACK(WRITELINE(v100_state, picu_r_w<7>)) MCFG_DEVCB_INVERT
+ MCFG_TMS9927_VSYN_CALLBACK(WRITELINE(v100_state, picu_r_w<6>)) MCFG_DEVCB_INVERT
MCFG_DEVICE_ADD("picu", I8214, XTAL(47'736'000) / 12)
MCFG_I8214_INT_CALLBACK(ASSERTLINE("maincpu", 0))