diff options
author | 2022-02-27 14:10:05 +0000 | |
---|---|---|
committer | 2022-02-27 09:10:05 -0500 | |
commit | 029f4232fe9779cbe7d2f9cf2d3e991108da75dc (patch) | |
tree | 2904693a986dd03f3acb6912c510c81fe76a0176 | |
parent | 716b02a61318e49fdee67e467653503c988a17d8 (diff) |
t11: jumps to register cause trap to 4 (#9346)
-rw-r--r-- | src/devices/cpu/t11/t11.h | 2 | ||||
-rw-r--r-- | src/devices/cpu/t11/t11ops.hxx | 36 | ||||
-rw-r--r-- | src/devices/cpu/t11/t11table.hxx | 18 |
3 files changed, 30 insertions, 26 deletions
diff --git a/src/devices/cpu/t11/t11.h b/src/devices/cpu/t11/t11.h index e2a30ce7cb5..cf83f65638e 100644 --- a/src/devices/cpu/t11/t11.h +++ b/src/devices/cpu/t11/t11.h @@ -115,6 +115,7 @@ protected: inline int POP(); void t11_check_irqs(); void take_interrupt(uint8_t vector); + void trap_to(uint16_t vector); typedef void ( t11_device::*opcode_func )(uint16_t op); static const opcode_func s_opcode_table[65536 >> 3]; @@ -122,6 +123,7 @@ protected: void op_0000(uint16_t op); void halt(uint16_t op); void illegal(uint16_t op); + void illegal4(uint16_t op); void jmp_rgd(uint16_t op); void jmp_in(uint16_t op); void jmp_ind(uint16_t op); diff --git a/src/devices/cpu/t11/t11ops.hxx b/src/devices/cpu/t11/t11ops.hxx index e2ce4f200b7..450f485a2e4 100644 --- a/src/devices/cpu/t11/t11ops.hxx +++ b/src/devices/cpu/t11/t11ops.hxx @@ -269,6 +269,14 @@ #define XOR_M(d) int sreg, dreg, source, dest, result, ea; GET_SREG; source = REGW(sreg); GET_DW_##d; CLR_NZV; result = dest ^ source; SETW_NZ; PUT_DW_EA(result) +void t11_device::trap_to(uint16_t vector) +{ + PUSH(PSW); + PUSH(PC); + PC = RWORD(vector); + PSW = RWORD(vector + 2); + t11_check_irqs(); +} void t11_device::op_0000(uint16_t op) { @@ -277,8 +285,8 @@ void t11_device::op_0000(uint16_t op) case 0x00: /* HALT */ halt(op); break; case 0x01: /* WAIT */ m_icount = 0; m_wait_state = 1; break; case 0x02: /* RTI */ m_icount -= 24; PC = POP(); PSW = POP(); t11_check_irqs(); break; - case 0x03: /* BPT */ m_icount -= 48; PUSH(PSW); PUSH(PC); PC = RWORD(0x0c); PSW = RWORD(0x0e); t11_check_irqs(); break; - case 0x04: /* IOT */ m_icount -= 48; PUSH(PSW); PUSH(PC); PC = RWORD(0x10); PSW = RWORD(0x12); t11_check_irqs(); break; + case 0x03: /* BPT */ m_icount -= 48; trap_to(0x0c); break; + case 0x04: /* IOT */ m_icount -= 48; trap_to(0x10); break; case 0x05: /* RESET */ m_out_reset_func(ASSERT_LINE); m_out_reset_func(CLEAR_LINE); m_icount -= 110; break; case 0x06: /* RTT */ m_icount -= 33; PC = POP(); PSW = POP(); t11_check_irqs(); break; case 0x07: /* MFPT */ REGB(0) = 4; break; @@ -300,11 +308,13 @@ void t11_device::halt(uint16_t op) void t11_device::illegal(uint16_t op) { m_icount -= 48; - PUSH(PSW); - PUSH(PC); - PC = RWORD(0x08); - PSW = RWORD(0x0a); - t11_check_irqs(); + trap_to(0x08); +} + +void t11_device::illegal4(uint16_t op) +{ + m_icount -= 48; + trap_to(0x04); } void t11_device::mark(uint16_t op) @@ -901,21 +911,13 @@ void t11_device::bcs(uint16_t op) { m_icount -= 12; { BR( GET_C); } } void t11_device::emt(uint16_t op) { m_icount -= 48; - PUSH(PSW); - PUSH(PC); - PC = RWORD(0x18); - PSW = RWORD(0x1a); - t11_check_irqs(); + trap_to(0x18); } void t11_device::trap(uint16_t op) { m_icount -= 48; - PUSH(PSW); - PUSH(PC); - PC = RWORD(0x1c); - PSW = RWORD(0x1e); - t11_check_irqs(); + trap_to(0x1c); } void t11_device::clrb_rg(uint16_t op) { m_icount -= 12; { CLRB_R(RG); } } diff --git a/src/devices/cpu/t11/t11table.hxx b/src/devices/cpu/t11/t11table.hxx index 14a5ec825f1..48ebf95c5ce 100644 --- a/src/devices/cpu/t11/t11table.hxx +++ b/src/devices/cpu/t11/t11table.hxx @@ -26,7 +26,7 @@ const t11_device::opcode_func t11_device::s_opcode_table[65536 >> 3] = { /* 0x0000 */ OP(op_0000), OP(halt), OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal), - OP(illegal), OP(jmp_rgd), OP(jmp_in), OP(jmp_ind), OP(jmp_de), OP(jmp_ded), OP(jmp_ix), OP(jmp_ixd), + OP(illegal4), OP(jmp_rgd), OP(jmp_in), OP(jmp_ind), OP(jmp_de), OP(jmp_ded), OP(jmp_ix), OP(jmp_ixd), OP(rts), OP(illegal), OP(illegal), OP(illegal), OP(ccc), OP(ccc), OP(scc), OP(scc), OP(swab_rg), OP(swab_rgd), OP(swab_in), OP(swab_ind), OP(swab_de), OP(swab_ded), OP(swab_ix), OP(swab_ixd), /* 0x0100 */ @@ -65,15 +65,15 @@ const t11_device::opcode_func t11_device::s_opcode_table[65536 >> 3] = OP(ble), OP(ble), OP(ble), OP(ble), OP(ble), OP(ble), OP(ble), OP(ble), OP(ble), OP(ble), OP(ble), OP(ble), OP(ble), OP(ble), OP(ble), OP(ble), /* 0x0800 */ - OP(illegal), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), - OP(illegal), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), - OP(illegal), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), - OP(illegal), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), + OP(illegal4), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), + OP(illegal4), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), + OP(illegal4), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), + OP(illegal4), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), /* 0x0900 */ - OP(illegal), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), - OP(illegal), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), - OP(illegal), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), - OP(illegal), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), + OP(illegal4), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), + OP(illegal4), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), + OP(illegal4), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), + OP(illegal4), OP(jsr_rgd), OP(jsr_in), OP(jsr_ind), OP(jsr_de), OP(jsr_ded), OP(jsr_ix), OP(jsr_ixd), /* 0x0a00 */ OP(clr_rg), OP(clr_rgd), OP(clr_in), OP(clr_ind), OP(clr_de), OP(clr_ded), OP(clr_ix), OP(clr_ixd), OP(com_rg), OP(com_rgd), OP(com_in), OP(com_ind), OP(com_de), OP(com_ded), OP(com_ix), OP(com_ixd), |