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authorGravatarGravatar mooglyguy <therealmogminer@gmail.com>2015-11-20 17:15:30 +0100
committerGravatarGravatar mooglyguy <therealmogminer@gmail.com>2015-11-20 17:15:30 +0100
commit33d35d3658976e9c8a4e69844b0b4b73b6e2d851 (patch) (github)
treeb0db84b7a00fded3a28e6f909f72b4ced65a9721
parent0f0bc30e703d47aee3f2e65a53e3eace2388fcaa (diff)
downloadmame-wof.tar.bz2
mame-wof.zip
Fix remainder of this == NULL checks from Tafoids runwof
-rw-r--r--src/mame/drivers/aleck64.cpp7
-rw-r--r--src/mame/drivers/arsystems.cpp23
-rw-r--r--src/mame/drivers/n64.cpp6
-rw-r--r--src/mame/drivers/ninjakd2.cpp68
-rw-r--r--src/mame/drivers/prestige.cpp6
-rw-r--r--src/mame/drivers/segas16a.cpp19
-rw-r--r--src/mame/includes/n64.h58
-rw-r--r--src/mame/includes/ninjakd2.h2
-rw-r--r--src/mame/includes/vsnes.h21
-rw-r--r--src/mame/machine/n64.cpp280
-rw-r--r--src/mame/machine/vsnes.cpp17
-rw-r--r--src/mame/video/n64.cpp18
-rw-r--r--src/mame/video/n64.h34
-rw-r--r--src/mame/video/rdptpipe.cpp2
-rw-r--r--src/mame/video/sega16sp.cpp11
-rw-r--r--src/mame/video/sega16sp.h3
16 files changed, 328 insertions, 247 deletions
diff --git a/src/mame/drivers/aleck64.cpp b/src/mame/drivers/aleck64.cpp
index 26499c7b9b2..c86157b6e6a 100644
--- a/src/mame/drivers/aleck64.cpp
+++ b/src/mame/drivers/aleck64.cpp
@@ -184,15 +184,18 @@ public:
m_e90_pal(*this,"e90pal"),
m_dip_read_offset(0) { }
- optional_shared_ptr<UINT32> m_e90_vram;
- optional_shared_ptr<UINT32> m_e90_pal;
DECLARE_DRIVER_INIT(aleck64);
DECLARE_WRITE32_MEMBER(aleck_dips_w);
DECLARE_READ32_MEMBER(aleck_dips_r);
DECLARE_READ16_MEMBER(e90_prot_r);
DECLARE_WRITE16_MEMBER(e90_prot_w);
+
UINT32 screen_update_e90(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
+protected:
+ optional_shared_ptr<UINT32> m_e90_vram;
+ optional_shared_ptr<UINT32> m_e90_pal;
+
private:
UINT32 m_dip_read_offset;
};
diff --git a/src/mame/drivers/arsystems.cpp b/src/mame/drivers/arsystems.cpp
index c017004843f..c3496f125cb 100644
--- a/src/mame/drivers/arsystems.cpp
+++ b/src/mame/drivers/arsystems.cpp
@@ -62,9 +62,10 @@ class arcadia_amiga_state : public amiga_state
{
public:
arcadia_amiga_state(const machine_config &mconfig, device_type type, const char *tag)
- : amiga_state(mconfig, type, tag) { }
-
- UINT8 m_coin_counter[2];
+ : amiga_state(mconfig, type, tag)
+ , m_bios_region(*this, "user2")
+ {
+ }
DECLARE_WRITE16_MEMBER(arcadia_multibios_change_game);
DECLARE_CUSTOM_INPUT_MEMBER(coin_counter_r);
@@ -91,6 +92,10 @@ public:
protected:
virtual void machine_reset();
+
+ optional_memory_region m_bios_region;
+
+ UINT8 m_coin_counter[2];
};
@@ -922,12 +927,16 @@ DRIVER_INIT_MEMBER( arcadia_amiga_state, arcadia )
m_agnus_id = AGNUS_HR_NTSC;
m_denise_id = DENISE;
- /* OnePlay bios is encrypted, TenPlay is not */
- UINT16 *biosrom = (UINT16 *)memregion("user2")->base();
+ if (m_bios_region != NULL)
+ {
+ /* OnePlay bios is encrypted, TenPlay is not */
+ UINT16 *rom = (UINT16 *)m_bios_region->base();
- if (biosrom)
- if (biosrom[0] != 0x4afc)
+ if (rom[0] != 0x4afc)
+ {
generic_decode("user2", 6, 1, 0, 2, 3, 4, 5, 7);
+ }
+ }
}
diff --git a/src/mame/drivers/n64.cpp b/src/mame/drivers/n64.cpp
index 645483f470a..57ddd0cd934 100644
--- a/src/mame/drivers/n64.cpp
+++ b/src/mame/drivers/n64.cpp
@@ -334,8 +334,10 @@ DEVICE_IMAGE_LOAD_MEMBER(n64_mess_state,n64_cart)
//printf("Loading\n");
UINT8 data[0x30800];
battery_image->battery_load(data, 0x30800, 0x00);
- //memcpy(n64_sram, data, 0x20000);
- memcpy(memshare("sram")->ptr(), data, 0x20000);
+ if (m_sram != NULL)
+ {
+ memcpy(m_sram, data, 0x20000);
+ }
memcpy(periphs->m_save_data.eeprom, data + 0x20000, 0x800);
memcpy(periphs->m_save_data.mempak[0], data + 0x20800, 0x8000);
memcpy(periphs->m_save_data.mempak[1], data + 0x28800, 0x8000);
diff --git a/src/mame/drivers/ninjakd2.cpp b/src/mame/drivers/ninjakd2.cpp
index 2944bc5ff16..53d78037b31 100644
--- a/src/mame/drivers/ninjakd2.cpp
+++ b/src/mame/drivers/ninjakd2.cpp
@@ -172,36 +172,50 @@ TODO:
SAMPLES_START_CB_MEMBER(ninjakd2_state::ninjakd2_init_samples)
{
- const UINT8* const rom = memregion("pcm")->base();
- const int length = memregion("pcm")->bytes();
+ if (m_pcm_region == NULL)
+ {
+ return;
+ }
+
+ const UINT8* const rom = m_pcm_region->base();
+ const int length = m_pcm_region->bytes();
INT16* sampledata = auto_alloc_array(machine(), INT16, length);
// convert unsigned 8-bit PCM to signed 16-bit
for (int i = 0; i < length; ++i)
+ {
sampledata[i] = rom[i] << 7;
+ }
m_sampledata = sampledata;
}
WRITE8_MEMBER(ninjakd2_state::ninjakd2_pcm_play_w)
{
- const UINT8* const rom = memregion("pcm")->base();
-
// only Ninja Kid II uses this
- if (rom)
+ if (m_pcm_region == NULL)
+ {
+ return;
+ }
+
+ const UINT8* const rom = m_pcm_region->base();
+ const int length = m_pcm_region->bytes();
+ const int start = data << 8;
+
+ // find end of sample
+ int end = start;
+ while (end < length && rom[end] != 0x00)
+ {
+ ++end;
+ }
+
+ if (end - start)
+ {
+ m_pcm->start_raw(0, &m_sampledata[start], end - start, NE555_FREQUENCY);
+ }
+ else
{
- const int length = memregion("pcm")->bytes();
- const int start = data << 8;
-
- // find end of sample
- int end = start;
- while (end < length && rom[end] != 0x00)
- ++end;
-
- if (end - start)
- m_pcm->start_raw(0, &m_sampledata[start], end - start, NE555_FREQUENCY);
- else
- m_pcm->stop(0);
+ m_pcm->stop(0);
}
}
@@ -453,6 +467,13 @@ static ADDRESS_MAP_START( ninjakd2_sound_cpu, AS_PROGRAM, 8, ninjakd2_state )
AM_RANGE(0xf000, 0xf000) AM_WRITE(ninjakd2_pcm_play_w)
ADDRESS_MAP_END
+static ADDRESS_MAP_START( ninjakid_nopcm_sound_cpu, AS_PROGRAM, 8, ninjakd2_state )
+ AM_RANGE(0x0000, 0x7fff) AM_ROM
+ AM_RANGE(0x8000, 0xbfff) AM_ROM
+ AM_RANGE(0xc000, 0xc7ff) AM_RAM
+ AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_byte_r)
+ AM_RANGE(0xf000, 0xf000) AM_NOP
+ADDRESS_MAP_END
static ADDRESS_MAP_START( decrypted_opcodes_map, AS_DECRYPTED_OPCODES, 8, ninjakd2_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_SHARE("decrypted_opcodes")
@@ -972,6 +993,9 @@ static MACHINE_CONFIG_DERIVED( mnight, ninjakd2_core )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(mnight_main_cpu)
+ MCFG_CPU_MODIFY("soundcpu")
+ MCFG_CPU_PROGRAM_MAP(ninjakid_nopcm_sound_cpu)
+
/* video hardware */
MCFG_VIDEO_START_OVERRIDE(ninjakd2_state,mnight)
@@ -980,11 +1004,13 @@ static MACHINE_CONFIG_DERIVED( mnight, ninjakd2_core )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( arkarea, ninjakd2_core )
-
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(mnight_main_cpu)
+ MCFG_CPU_MODIFY("soundcpu")
+ MCFG_CPU_PROGRAM_MAP(ninjakid_nopcm_sound_cpu)
+
/* video hardware */
MCFG_VIDEO_START_OVERRIDE(ninjakd2_state,arkarea)
@@ -998,6 +1024,9 @@ static MACHINE_CONFIG_DERIVED( robokid, mnight )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(robokid_main_cpu)
+ MCFG_CPU_MODIFY("soundcpu")
+ MCFG_CPU_PROGRAM_MAP(ninjakid_nopcm_sound_cpu)
+
/* video hardware */
MCFG_GFXDECODE_MODIFY("gfxdecode", robokid)
MCFG_PALETTE_MODIFY("palette")
@@ -1016,6 +1045,9 @@ static MACHINE_CONFIG_DERIVED( omegaf, robokid )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(omegaf_main_cpu)
+ MCFG_CPU_MODIFY("soundcpu")
+ MCFG_CPU_PROGRAM_MAP(ninjakid_nopcm_sound_cpu)
+
MCFG_MACHINE_START_OVERRIDE(ninjakd2_state,omegaf)
MCFG_MACHINE_RESET_OVERRIDE(ninjakd2_state,omegaf)
diff --git a/src/mame/drivers/prestige.cpp b/src/mame/drivers/prestige.cpp
index e033a1e2a75..5fb8bb408ad 100644
--- a/src/mame/drivers/prestige.cpp
+++ b/src/mame/drivers/prestige.cpp
@@ -622,7 +622,11 @@ void prestige_state::machine_start()
m_cart_rom = memregion(region_tag.assign(m_cart->tag()).append(GENERIC_ROM_REGION_TAG).c_str());
UINT8 *rom = memregion("maincpu")->base();
- UINT8 *cart = m_cart_rom->base();
+ UINT8 *cart = NULL;
+ if (m_cart_rom != NULL)
+ {
+ cart = m_cart_rom->base();
+ }
UINT8 *ram = m_ram->pointer();
memset(ram, 0x00, m_ram->size());
diff --git a/src/mame/drivers/segas16a.cpp b/src/mame/drivers/segas16a.cpp
index 4a1ddcce8ca..7e668ff17c5 100644
--- a/src/mame/drivers/segas16a.cpp
+++ b/src/mame/drivers/segas16a.cpp
@@ -988,6 +988,13 @@ static ADDRESS_MAP_START( sound_portmap, AS_IO, 8, segas16a_state )
AM_RANGE(0xc0, 0xc0) AM_MIRROR(0x3f) AM_READ(sound_data_r)
ADDRESS_MAP_END
+static ADDRESS_MAP_START( sound_no7751_portmap, AS_IO, 8, segas16a_state )
+ ADDRESS_MAP_UNMAP_HIGH
+ ADDRESS_MAP_GLOBAL_MASK(0xff)
+ AM_RANGE(0x00, 0x01) AM_MIRROR(0x3e) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
+ AM_RANGE(0x80, 0x80) AM_MIRROR(0x3f) AM_NOP
+ AM_RANGE(0xc0, 0xc0) AM_MIRROR(0x3f) AM_READ(sound_data_r)
+ADDRESS_MAP_END
//**************************************************************************
@@ -1964,6 +1971,9 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( system16a_no7751, system16a )
+ MCFG_CPU_MODIFY("soundcpu")
+ MCFG_CPU_IO_MAP(sound_no7751_portmap)
+
MCFG_DEVICE_REMOVE("n7751")
MCFG_DEVICE_REMOVE("dac")
@@ -1987,6 +1997,9 @@ MACHINE_CONFIG_END
*/
static MACHINE_CONFIG_DERIVED( system16a_fd1089a_no7751, system16a_fd1089a )
+ MCFG_CPU_MODIFY("soundcpu")
+ MCFG_CPU_IO_MAP(sound_no7751_portmap)
+
MCFG_DEVICE_REMOVE("n7751")
MCFG_DEVICE_REMOVE("dac")
@@ -1995,6 +2008,9 @@ static MACHINE_CONFIG_DERIVED( system16a_fd1089a_no7751, system16a_fd1089a )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( system16a_fd1089b_no7751, system16a_fd1089b )
+ MCFG_CPU_MODIFY("soundcpu")
+ MCFG_CPU_IO_MAP(sound_no7751_portmap)
+
MCFG_DEVICE_REMOVE("n7751")
MCFG_DEVICE_REMOVE("dac")
@@ -2003,6 +2019,9 @@ static MACHINE_CONFIG_DERIVED( system16a_fd1089b_no7751, system16a_fd1089b )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( system16a_fd1094_no7751, system16a_fd1094 )
+ MCFG_CPU_MODIFY("soundcpu")
+ MCFG_CPU_IO_MAP(sound_no7751_portmap)
+
MCFG_DEVICE_REMOVE("n7751")
MCFG_DEVICE_REMOVE("dac")
diff --git a/src/mame/includes/n64.h b/src/mame/includes/n64.h
index 46f941beb3c..c0350b33d08 100644
--- a/src/mame/includes/n64.h
+++ b/src/mame/includes/n64.h
@@ -4,10 +4,9 @@
#define _INCLUDES_N64_H_
#include "cpu/rsp/rsp.h"
+#include "cpu/mips/mips3.h"
#include "sound/dmadac.h"
-/*----------- forward decls -----------*/
-
/*----------- driver state -----------*/
class n64_rdp;
@@ -16,11 +15,15 @@ class n64_state : public driver_device
{
public:
n64_state(const machine_config &mconfig, device_type type, const char *tag)
- : driver_device(mconfig, type, tag) ,
- m_maincpu(*this, "maincpu") { }
-
- /* video-related */
- n64_rdp *m_rdp;
+ : driver_device(mconfig, type, tag)
+ , m_vr4300(*this, "maincpu")
+ , m_rsp(*this, "rsp")
+ , m_sram(*this, "sram")
+ , m_rdram(*this, "rdram")
+ , m_rsp_imem(*this, "rsp_imem")
+ , m_rsp_dmem(*this, "rsp_dmem")
+ {
+ }
virtual void machine_start();
virtual void machine_reset();
@@ -29,7 +32,25 @@ public:
UINT32 screen_update_n64(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void screen_eof_n64(screen_device &screen, bool state);
- required_device<cpu_device> m_maincpu;
+
+ // Getters
+ n64_rdp* rdp() { return m_rdp; }
+ UINT32* rdram() { return m_rdram; }
+ UINT32* sram() { return m_sram; }
+ UINT32* rsp_imem() { return m_rsp_imem; }
+ UINT32* rsp_dmem() { return m_rsp_dmem; }
+
+protected:
+ required_device<mips3_device> m_vr4300;
+ required_device<rsp_device> m_rsp;
+
+ optional_shared_ptr<UINT32> m_sram;
+ required_shared_ptr<UINT32> m_rdram;
+ required_shared_ptr<UINT32> m_rsp_imem;
+ required_shared_ptr<UINT32> m_rsp_dmem;
+
+ /* video-related */
+ n64_rdp *m_rdp;
};
/*----------- devices -----------*/
@@ -98,7 +119,6 @@ public:
void ai_timer_tick();
void pi_dma_tick();
void si_dma_tick();
- void vi_scanline_tick();
void reset_tick();
void video_update(bitmap_rgb32 &bitmap);
@@ -137,15 +157,22 @@ public:
void poll_reset_button(bool button);
UINT32 dp_clock;
+
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
private:
- address_space *mem_map;
- device_t *maincpu;
- device_t *rspcpu;
+ n64_state* m_n64;
+ address_space *m_mem_map;
+ mips3_device *m_vr4300;
+ rsp_device *m_rsp;
+
+ UINT32 *m_rdram;
+ UINT32 *m_sram;
+ UINT32 *m_rsp_imem;
+ UINT32 *m_rsp_dmem;
void clear_rcp_interrupt(int interrupt);
@@ -371,13 +398,6 @@ const unsigned int ddStartOffset[16] =
{0x0,0x5F15E0,0xB79D00,0x10801A0,0x1523720,0x1963D80,0x1D414C0,0x20BBCE0,
0x23196E0,0x28A1E00,0x2DF5DC0,0x3299340,0x36D99A0,0x3AB70E0,0x3E31900,0x4149200};
-
-
-extern UINT32 *n64_sram;
-extern UINT32 *rdram;
-extern UINT32 *rsp_imem;
-extern UINT32 *rsp_dmem;
-
extern void dp_full_sync(running_machine &machine);
#endif
diff --git a/src/mame/includes/ninjakd2.h b/src/mame/includes/ninjakd2.h
index b2d15ca1980..5561e94c82c 100644
--- a/src/mame/includes/ninjakd2.h
+++ b/src/mame/includes/ninjakd2.h
@@ -16,6 +16,7 @@ public:
m_maincpu(*this,"maincpu"),
m_soundcpu(*this, "soundcpu"),
m_pcm(*this, "pcm"),
+ m_pcm_region(*this, "pcm"),
m_bg_videoram(*this, "bg_videoram"),
m_fg_videoram(*this, "fg_videoram"),
m_spriteram(*this, "spriteram"),
@@ -28,6 +29,7 @@ public:
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_soundcpu;
optional_device<samples_device> m_pcm;
+ optional_memory_region m_pcm_region;
optional_shared_ptr<UINT8> m_bg_videoram;
required_shared_ptr<UINT8> m_fg_videoram;
required_shared_ptr<UINT8> m_spriteram;
diff --git a/src/mame/includes/vsnes.h b/src/mame/includes/vsnes.h
index ef280e2ec2d..a7e1b8e6db6 100644
--- a/src/mame/includes/vsnes.h
+++ b/src/mame/includes/vsnes.h
@@ -6,14 +6,16 @@ class vsnes_state : public driver_device
{
public:
vsnes_state(const machine_config &mconfig, device_type type, const char *tag)
- : driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu"),
- m_subcpu(*this, "sub"),
- m_ppu1(*this, "ppu1"),
- m_ppu2(*this, "ppu2"),
- m_work_ram(*this, "work_ram"),
- m_work_ram_1(*this, "work_ram_1")
- { }
+ : driver_device(mconfig, type, tag)
+ , m_maincpu(*this, "maincpu")
+ , m_subcpu(*this, "sub")
+ , m_ppu1(*this, "ppu1")
+ , m_ppu2(*this, "ppu2")
+ , m_work_ram(*this, "work_ram")
+ , m_work_ram_1(*this, "work_ram_1")
+ , m_gfx1_rom(*this, "gfx1")
+ {
+ }
required_device<cpu_device> m_maincpu;
optional_device<cpu_device> m_subcpu;
@@ -22,6 +24,9 @@ public:
required_shared_ptr<UINT8> m_work_ram;
optional_shared_ptr<UINT8> m_work_ram_1;
+
+ optional_memory_region m_gfx1_rom;
+
int m_coin;
int m_do_vrom_bank;
int m_input_latch[4];
diff --git a/src/mame/machine/n64.cpp b/src/mame/machine/n64.cpp
index a57db69e0b6..0806baee4ab 100644
--- a/src/mame/machine/n64.cpp
+++ b/src/mame/machine/n64.cpp
@@ -9,17 +9,9 @@
#include "includes/n64.h"
#include "video/n64.h"
-UINT32 *n64_sram;
-UINT32 *rdram;
-UINT32 *rsp_imem;
-UINT32 *rsp_dmem;
-
// device type definition
const device_type N64PERIPH = &device_creator<n64_periphs>;
-
-
-
n64_periphs::n64_periphs(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, N64PERIPH, "N64 Periphal Chips", tag, owner, clock, "n64_periphs", __FILE__)
, device_video_interface(mconfig, *this)
@@ -49,11 +41,11 @@ TIMER_CALLBACK_MEMBER(n64_periphs::reset_timer_callback)
void n64_periphs::reset_tick()
{
reset_timer->adjust(attotime::never);
- maincpu->reset();
- maincpu->execute().set_input_line(INPUT_LINE_IRQ2, CLEAR_LINE);
- rspcpu->reset();
- rspcpu->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
- rspcpu->state().set_state_int(RSP_SR, rspcpu->state().state_int(RSP_SR) | RSP_STATUS_HALT);
+ m_vr4300->reset();
+ m_vr4300->set_input_line(INPUT_LINE_IRQ2, CLEAR_LINE);
+ m_rsp->reset();
+ m_rsp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+ m_rsp->set_state_int(RSP_SR, m_rsp->state_int(RSP_SR) | RSP_STATUS_HALT);
reset_held = false;
cic_status = 0;
memset(pif_ram, 0, sizeof(pif_ram));
@@ -104,7 +96,7 @@ void n64_periphs::poll_reset_button(bool button)
reset_held = button;
if(!old_held && reset_held)
{
- machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ2, ASSERT_LINE);
+ m_vr4300->set_input_line(INPUT_LINE_IRQ2, ASSERT_LINE);
}
else if(old_held && reset_held)
{
@@ -123,15 +115,21 @@ void n64_periphs::device_start()
si_dma_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::si_dma_callback),this));
vi_scanline_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::vi_scanline_callback),this));
reset_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::reset_timer_callback),this));
+ m_n64 = machine().driver_data<n64_state>();
}
void n64_periphs::device_reset()
{
UINT32 *cart = (UINT32*)machine().root_device().memregion("user2")->base();
- maincpu = machine().device("maincpu");
- rspcpu = machine().device("rsp");
- mem_map = &maincpu->memory().space(AS_PROGRAM);
+ m_vr4300 = machine().device<mips3_device>("maincpu");
+ m_rsp = machine().device<rsp_device>("rsp");
+ m_mem_map = &m_vr4300->space(AS_PROGRAM);
+
+ m_rdram = m_n64->rdram();
+ m_rsp_imem = m_n64->rsp_imem();
+ m_rsp_dmem = m_n64->rsp_dmem();
+ m_sram = m_n64->sram();
mi_version = 0x01010101;
mi_interrupt = 0;
@@ -238,7 +236,7 @@ void n64_periphs::device_reset()
pif_ram[0x26] = 0x3f;
pif_ram[0x27] = 0x3f;
cic_type=2;
- mem_map->write_dword(0x00000318, 0x800000); /* RDRAM Size */
+ m_mem_map->write_dword(0x00000318, 0x800000); /* RDRAM Size */
if (boot_checksum == U64(0x00000000001ff230))
{
@@ -274,7 +272,7 @@ void n64_periphs::device_reset()
pif_ram[0x26] = 0x91;
pif_ram[0x27] = 0x3f;
cic_type=5;
- mem_map->write_dword(0x000003f0, 0x800000);
+ m_mem_map->write_dword(0x000003f0, 0x800000);
}
else if (boot_checksum == U64(0x000000d6d5de4ba0))
{
@@ -329,7 +327,7 @@ READ32_MEMBER( n64_periphs::mi_reg_r )
break;
default:
- logerror("mi_reg_r: %08X, %08X at %08X\n", offset, mem_mask, mem_map->device().safe_pc());
+ logerror("mi_reg_r: %08X, %08X at %08X\n", offset, mem_mask, m_vr4300->pc());
break;
}
@@ -414,7 +412,7 @@ WRITE32_MEMBER( n64_periphs::mi_reg_w )
}
default:
- logerror("mi_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
+ logerror("mi_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_vr4300->pc());
break;
}
}
@@ -428,11 +426,11 @@ void n64_periphs::check_interrupts()
{
if (mi_intr_mask & mi_interrupt)
{
- machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
+ m_vr4300->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
}
else
{
- machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
+ m_vr4300->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
}
}
@@ -529,7 +527,7 @@ READ32_MEMBER( n64_periphs::rdram_reg_r )
{
if(offset > 0x24/4)
{
- logerror("rdram_reg_r: %08X, %08X at %08X\n", offset, mem_mask, maincpu->safe_pc());
+ logerror("rdram_reg_r: %08X, %08X at %08X\n", offset, mem_mask, m_vr4300->pc());
return 0;
}
return rdram_regs[offset];
@@ -539,7 +537,7 @@ WRITE32_MEMBER( n64_periphs::rdram_reg_w )
{
if(offset > 0x24/4)
{
- logerror("rdram_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
+ logerror("rdram_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_vr4300->pc());
return;
}
COMBINE_DATA(&rdram_regs[offset]);
@@ -570,7 +568,7 @@ void n64_periphs::sp_dma(int direction)
length = 0x1000 - (sp_mem_addr & 0xfff);
}
- UINT32 *sp_mem[2] = { rsp_dmem, rsp_imem };
+ UINT32 *sp_mem[2] = { m_rsp_dmem, m_rsp_imem };
int sp_mem_page = (sp_mem_addr >> 12) & 1;
if(direction == 0)// RDRAM -> I/DMEM
@@ -582,7 +580,7 @@ void n64_periphs::sp_dma(int direction)
for(int i = 0; i < length / 4; i++)
{
- sp_mem[sp_mem_page][(dst + i) & 0x3ff] = rdram[src + i];
+ sp_mem[sp_mem_page][(dst + i) & 0x3ff] = m_rdram[src + i];
}
sp_mem_addr += length;
@@ -600,7 +598,7 @@ void n64_periphs::sp_dma(int direction)
for(int i = 0; i < length / 4; i++)
{
- rdram[dst + i] = sp_mem[sp_mem_page][(src + i) & 0x3ff];
+ m_rdram[dst + i] = sp_mem[sp_mem_page][(src + i) & 0x3ff];
}
sp_mem_addr += length;
@@ -615,15 +613,15 @@ WRITE32_MEMBER(n64_periphs::sp_set_status)
{
if (data & 0x1)
{
- rspcpu->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
- rspcpu->state().set_state_int(RSP_SR, rspcpu->state().state_int(RSP_SR) | RSP_STATUS_HALT);
+ m_rsp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+ m_rsp->set_state_int(RSP_SR, m_rsp->state_int(RSP_SR) | RSP_STATUS_HALT);
}
if (data & 0x2)
{
- rspcpu->state().set_state_int(RSP_SR, rspcpu->state().state_int(RSP_SR) | RSP_STATUS_BROKE);
+ m_rsp->set_state_int(RSP_SR, m_rsp->state_int(RSP_SR) | RSP_STATUS_BROKE);
- if (rspcpu->state().state_int(RSP_SR) & RSP_STATUS_INTR_BREAK)
+ if (m_rsp->state_int(RSP_SR) & RSP_STATUS_INTR_BREAK)
{
signal_rcp_interrupt(SP_INTERRUPT);
}
@@ -632,99 +630,73 @@ WRITE32_MEMBER(n64_periphs::sp_set_status)
READ32_MEMBER(n64_periphs::sp_reg_r)
{
- UINT32 ret = 0;
switch (offset)
{
case 0x00/4: // SP_MEM_ADDR_REG
- ret = sp_mem_addr;
- break;
+ return sp_mem_addr;
case 0x04/4: // SP_DRAM_ADDR_REG
- ret = sp_dram_addr;
- break;
+ return sp_dram_addr;
case 0x08/4: // SP_RD_LEN_REG
- ret = (sp_dma_skip << 20) | (sp_dma_count << 12) | sp_dma_length;
- break;
+ return (sp_dma_skip << 20) | (sp_dma_count << 12) | sp_dma_length;
case 0x10/4: // SP_STATUS_REG
- ret = rspcpu->state().state_int(RSP_SR);
- break;
+ return m_rsp->state_int(RSP_SR);
case 0x14/4: // SP_DMA_FULL_REG
- ret = 0;
- break;
+ return 0;
case 0x18/4: // SP_DMA_BUSY_REG
- ret = 0;
- break;
+ return 0;
case 0x1c/4: // SP_SEMAPHORE_REG
- machine().device("maincpu")->execute().yield();
+ m_vr4300->yield();
if( sp_semaphore )
{
- ret = 1;
+ return 1;
}
else
{
sp_semaphore = 1;
- ret = 0;
+ return 0;
}
break;
case 0x20/4: // DP_CMD_START
- {
- n64_state *state = machine().driver_data<n64_state>();
- ret = state->m_rdp->get_start();
- break;
- }
+ return m_n64->rdp()->get_start();
case 0x24/4: // DP_CMD_END
- {
- n64_state *state = machine().driver_data<n64_state>();
- ret = state->m_rdp->get_end();
- break;
- }
+ return m_n64->rdp()->get_end();
case 0x28/4: // DP_CMD_CURRENT
- {
- n64_state *state = machine().driver_data<n64_state>();
- ret = state->m_rdp->get_current();
- break;
- }
+ return m_n64->rdp()->get_current();
case 0x34/4: // DP_CMD_BUSY
case 0x38/4: // DP_CMD_PIPE_BUSY
case 0x3c/4: // DP_CMD_TMEM_BUSY
- break;
+ return 0;
case 0x2c/4: // DP_CMD_STATUS
- {
- n64_state *state = machine().driver_data<n64_state>();
- ret = state->m_rdp->get_status();
- break;
- }
+ return m_n64->rdp()->get_status();
case 0x30/4: // DP_CMD_CLOCK
- {
- if(!(machine().driver_data<n64_state>()->m_rdp->get_status() & DP_STATUS_FREEZE))
+ if(!(m_n64->rdp()->get_status() & DP_STATUS_FREEZE))
{
dp_clock += 13;
- ret = dp_clock;
+ return dp_clock;
}
break;
- }
case 0x40000/4: // PC
- ret = rspcpu->state().state_int(RSP_PC) & 0x00000fff;
- break;
+ return m_rsp->state_int(RSP_PC) & 0x00000fff;
default:
- logerror("sp_reg_r: %08X at %08X\n", offset, maincpu->safe_pc());
+ logerror("sp_reg_r: %08X at %08X\n", offset, m_vr4300->pc());
break;
}
- return ret;
+ return 0;
}
@@ -758,17 +730,17 @@ WRITE32_MEMBER(n64_periphs::sp_reg_w )
case 0x10/4: // RSP_STATUS_REG
{
- UINT32 oldstatus = rspcpu->state().state_int(RSP_SR);
+ UINT32 oldstatus = m_rsp->state_int(RSP_SR);
UINT32 newstatus = oldstatus;
if (data & 0x00000001) // clear halt
{
- rspcpu->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
+ m_rsp->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
newstatus &= ~RSP_STATUS_HALT;
}
if (data & 0x00000002) // set halt
{
- rspcpu->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+ m_rsp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
newstatus |= RSP_STATUS_HALT;
}
if (data & 0x00000004)
@@ -792,8 +764,8 @@ WRITE32_MEMBER(n64_periphs::sp_reg_w )
newstatus |= RSP_STATUS_SSTEP; // set single step
if(!(oldstatus & (RSP_STATUS_BROKE | RSP_STATUS_HALT)))
{
- rspcpu->state().set_state_int(RSP_STEPCNT, 1 );
- machine().device("rsp")->execute().yield();
+ m_rsp->set_state_int(RSP_STEPCNT, 1 );
+ m_rsp->yield();
}
}
if (data & 0x00000080)
@@ -868,7 +840,7 @@ WRITE32_MEMBER(n64_periphs::sp_reg_w )
{
newstatus |= RSP_STATUS_SIGNAL7; // set signal 7
}
- rspcpu->state().set_state_int(RSP_SR, newstatus);
+ m_rsp->set_state_int(RSP_SR, newstatus);
break;
}
@@ -880,7 +852,7 @@ WRITE32_MEMBER(n64_periphs::sp_reg_w )
break;
default:
- logerror("sp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
+ logerror("sp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_vr4300->pc());
break;
}
}
@@ -889,18 +861,18 @@ WRITE32_MEMBER(n64_periphs::sp_reg_w )
switch (offset & 0xffff)
{
case 0x00/4: // SP_PC_REG
- if( rspcpu->state().state_int(RSP_NEXTPC) != 0xffffffff )
+ if( m_rsp->state_int(RSP_NEXTPC) != 0xffffffff )
{
- rspcpu->state().set_state_int(RSP_NEXTPC, 0x1000 | (data & 0xfff));
+ m_rsp->set_state_int(RSP_NEXTPC, 0x1000 | (data & 0xfff));
}
else
{
- rspcpu->state().set_state_int(RSP_PC, 0x1000 | (data & 0xfff));
+ m_rsp->set_state_int(RSP_PC, 0x1000 | (data & 0xfff));
}
break;
default:
- logerror("sp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
+ logerror("sp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_vr4300->pc());
break;
}
}
@@ -916,85 +888,77 @@ void dp_full_sync(running_machine &machine)
READ32_MEMBER( n64_periphs::dp_reg_r )
{
- n64_state *state = space.machine().driver_data<n64_state>();
- UINT32 ret = 0;
-
switch (offset)
{
case 0x00/4: // DP_START_REG
- ret = state->m_rdp->get_start();
- break;
+ return m_n64->rdp()->get_start();
case 0x04/4: // DP_END_REG
- ret = state->m_rdp->get_end();
- break;
+ return m_n64->rdp()->get_end();
case 0x08/4: // DP_CURRENT_REG
- ret = state->m_rdp->get_current();
- break;
+ return m_n64->rdp()->get_current();
case 0x0c/4: // DP_STATUS_REG
- ret = state->m_rdp->get_status();
- break;
+ return m_n64->rdp()->get_status();
case 0x10/4: // DP_CLOCK_REG
- {
- if(!(state->m_rdp->get_status() & DP_STATUS_FREEZE))
+ if(!(m_n64->rdp()->get_status() & DP_STATUS_FREEZE))
{
dp_clock += 13;
- ret = dp_clock;
+ return dp_clock;
}
break;
- }
default:
- logerror("dp_reg_r: %08X, %08X at %08X\n", offset, mem_mask, safe_pc());
+ logerror("dp_reg_r: %08X, %08X at %08X\n", offset, mem_mask, m_vr4300->pc());
break;
}
- return ret;
+ return 0;
}
WRITE32_MEMBER( n64_periphs::dp_reg_w )
{
- n64_state *state = space.machine().driver_data<n64_state>();
- UINT32 status = state->m_rdp->get_status();
+ UINT32 status = m_n64->rdp()->get_status();
switch (offset)
{
case 0x00/4: // DP_START_REG
if(status & DP_STATUS_START_VALID)
+ {
break;
+ }
else
{
- state->m_rdp->set_status(status | DP_STATUS_START_VALID);
- state->m_rdp->set_start(data & ~7);
+ m_n64->rdp()->set_status(status | DP_STATUS_START_VALID);
+ m_n64->rdp()->set_start(data & ~7);
}
break;
case 0x04/4: // DP_END_REG
if(status & DP_STATUS_START_VALID)
{
- state->m_rdp->set_status(status & ~DP_STATUS_START_VALID);
- state->m_rdp->set_current(state->m_rdp->get_start());
- state->m_rdp->set_end(data & ~7);
+ m_n64->rdp()->set_status(status & ~DP_STATUS_START_VALID);
+ m_n64->rdp()->set_current(m_n64->rdp()->get_start());
+ m_n64->rdp()->set_end(data & ~7);
g_profiler.start(PROFILER_USER1);
- state->m_rdp->process_command_list();
+ m_n64->rdp()->process_command_list();
g_profiler.stop();
break;
}
else
{
- state->m_rdp->set_end(data & ~7);
+ m_n64->rdp()->set_end(data & ~7);
g_profiler.start(PROFILER_USER1);
- state->m_rdp->process_command_list();
+ m_n64->rdp()->process_command_list();
g_profiler.stop();
break;
}
case 0x0c/4: // DP_STATUS_REG
{
- UINT32 current_status = state->m_rdp->get_status();
+ UINT32 current_status = m_n64->rdp()->get_status();
if (data & 0x00000001) current_status &= ~DP_STATUS_XBUS_DMA;
if (data & 0x00000002) current_status |= DP_STATUS_XBUS_DMA;
if (data & 0x00000004) current_status &= ~DP_STATUS_FREEZE;
@@ -1002,23 +966,18 @@ WRITE32_MEMBER( n64_periphs::dp_reg_w )
if (data & 0x00000010) current_status &= ~DP_STATUS_FLUSH;
if (data & 0x00000020) current_status |= DP_STATUS_FLUSH;
if (data & 0x00000200) dp_clock = 0;
- state->m_rdp->set_status(current_status);
+ m_n64->rdp()->set_status(current_status);
break;
}
default:
- logerror("dp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, safe_pc());
+ logerror("dp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_vr4300->pc());
break;
}
}
TIMER_CALLBACK_MEMBER(n64_periphs::vi_scanline_callback)
{
- machine().device<n64_periphs>("rcp")->vi_scanline_tick();
-}
-
-void n64_periphs::vi_scanline_tick()
-{
signal_rcp_interrupt(VI_INTERRUPT);
vi_scanline_timer->adjust(m_screen->time_until_pos(vi_intr >> 1));
}
@@ -1124,7 +1083,7 @@ READ32_MEMBER( n64_periphs::vi_reg_r )
break;
default:
- logerror("vi_reg_r: %08X, %08X at %08X\n", offset, mem_mask, maincpu->safe_pc());
+ logerror("vi_reg_r: %08X, %08X at %08X\n", offset, mem_mask, m_vr4300->pc());
break;
}
@@ -1152,7 +1111,6 @@ WRITE32_MEMBER( n64_periphs::vi_reg_w )
vi_recalculate_resolution();
}
vi_width = data;
- //state->m_rdp->m_misc_state.m_fb_width = data;
break;
case 0x0c/4: // VI_INTR_REG
@@ -1214,7 +1172,7 @@ WRITE32_MEMBER( n64_periphs::vi_reg_w )
*/
default:
- logerror("vi_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
+ logerror("vi_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_vr4300->pc());
break;
}
}
@@ -1289,7 +1247,7 @@ n64_periphs::AUDIO_DMA *n64_periphs::ai_fifo_get_top()
void n64_periphs::ai_dma()
{
- INT16 *ram = (INT16*)rdram;
+ INT16 *ram = (INT16*)m_rdram;
AUDIO_DMA *current = ai_fifo_get_top();
attotime period;
@@ -1365,7 +1323,7 @@ READ32_MEMBER( n64_periphs::ai_reg_r )
break;
default:
- logerror("ai_reg_r: %08X, %08X at %08X\n", offset, mem_mask, maincpu->safe_pc());
+ logerror("ai_reg_r: %08X, %08X at %08X\n", offset, mem_mask, m_vr4300->pc());
break;
}
@@ -1404,7 +1362,7 @@ WRITE32_MEMBER( n64_periphs::ai_reg_w )
break;
default:
- logerror("ai_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
+ logerror("ai_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_vr4300->pc());
break;
}
}
@@ -1414,15 +1372,15 @@ WRITE32_MEMBER( n64_periphs::ai_reg_w )
TIMER_CALLBACK_MEMBER(n64_periphs::pi_dma_callback)
{
- machine().device<n64_periphs>("rcp")->pi_dma_tick();
- machine().device("rsp")->execute().yield();
+ pi_dma_tick();
+ m_rsp->yield();
}
void n64_periphs::pi_dma_tick()
{
bool update_bm = false;
UINT16 *cart16;
- UINT16 *dram16 = (UINT16*)rdram;
+ UINT16 *dram16 = (UINT16*)m_rdram;
UINT32 cart_addr = (pi_cart_addr & 0x0fffffff) >> 1;
UINT32 dram_addr = (pi_dram_addr & 0x007fffff) >> 1;
@@ -1441,7 +1399,7 @@ void n64_periphs::pi_dma_tick()
}
else if((cart_addr & 0x04000000) == 0x04000000)
{
- cart16 = (UINT16*)n64_sram;
+ cart16 = (UINT16*)m_sram;
cart_addr = (pi_cart_addr & 0x0001ffff) >> 1;
}
else if((cart_addr & 0x03000000) == 0x03000000 && dd_present)
@@ -1549,7 +1507,7 @@ READ32_MEMBER( n64_periphs::pi_reg_r )
break;
default:
- logerror("pi_reg_r: %08X, %08X at %08X\n", offset, mem_mask, maincpu->safe_pc());
+ logerror("pi_reg_r: %08X, %08X at %08X\n", offset, mem_mask, m_vr4300->pc());
break;
}
@@ -1574,14 +1532,14 @@ WRITE32_MEMBER( n64_periphs::pi_reg_w )
dd_status_reg &= ~DD_ASIC_STATUS_DREQ;
dd_status_reg &= ~DD_ASIC_STATUS_BM_INT;
//logerror("Clearing DREQ, INT\n");
- machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
+ m_vr4300->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
}
if(pi_cart_addr == 0x05000000 && dd_present)
{
dd_status_reg &= ~DD_ASIC_STATUS_C2_XFER;
dd_status_reg &= ~DD_ASIC_STATUS_BM_INT;
//logerror("Clearing C2, INT\n");
- machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
+ m_vr4300->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
}
break;
}
@@ -1658,7 +1616,7 @@ WRITE32_MEMBER( n64_periphs::pi_reg_w )
break;
default:
- logerror("pi_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
+ logerror("pi_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_vr4300->pc());
break;
}
}
@@ -1669,21 +1627,21 @@ READ32_MEMBER( n64_periphs::ri_reg_r )
{
if(offset == 0x0C/4) // RI_SELECT
{
- /* This is to 'simulate' the time that RDRAM initialization
+ /* This is to 'simulate' the time that RDRAM initialization
would take if the RI registers were not set to skip the RDRAM
testing during device reset. Proper simulation would require
- emulating the RDRAM modules and bus stalls for the mips cpu.
+ emulating the RDRAM modules and bus stalls for the mips cpu.
The cycle amount chosen represents 1/2 second, which is not
necessarily the time for RDRAM initialization, but rather the
time recommended for letting the SI devices settle after startup.
This allows the initialization routines for the SI to see that a
proper amount of time has passed since system startup. */
- machine().device<mips3_device>("maincpu")->burn_cycles(93750000/2);
+ m_vr4300->burn_cycles(93750000/2);
}
if(offset > 0x1c/4)
{
- logerror("ri_reg_r: %08X, %08X at %08X\n", offset, mem_mask, maincpu->safe_pc());
+ logerror("ri_reg_r: %08X, %08X at %08X\n", offset, mem_mask, m_vr4300->pc());
return 0;
}
return ri_regs[offset];
@@ -1693,7 +1651,7 @@ WRITE32_MEMBER( n64_periphs::ri_reg_w )
{
if(offset > 0x1c/4)
{
- logerror("ri_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
+ logerror("ri_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, m_vr4300->pc());
return;
}
COMBINE_DATA(&ri_regs[offset]);
@@ -2138,7 +2096,7 @@ void n64_periphs::pif_dma(int direction)
if (direction) // RDRAM -> PIF RAM
{
- UINT32 *src = (UINT32*)&rdram[(si_dram_addr & 0x1fffffff) / 4];
+ UINT32 *src = m_rdram + ((si_dram_addr & 0x1fffffff) / 4);
for(int i = 0; i < 64; i+=4)
{
@@ -2155,7 +2113,7 @@ void n64_periphs::pif_dma(int direction)
{
handle_pif();
- UINT32 *dst = (UINT32*)&rdram[(si_dram_addr & 0x1fffffff) / 4];
+ UINT32 *dst = m_rdram + ((si_dram_addr & 0x1fffffff) / 4);
for(int i = 0; i < 64; i+=4)
{
@@ -2315,7 +2273,7 @@ void n64_periphs::dd_update_bm()
}
//logerror("DD Write, Sending Interrupt\n");
dd_status_reg |= DD_ASIC_STATUS_BM_INT;
- machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
+ m_vr4300->set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
return;
}
else // dd read, BM Mode 1
@@ -2359,7 +2317,7 @@ void n64_periphs::dd_update_bm()
}
//logerror("DD Read, Sending Interrupt\n");
dd_status_reg |= DD_ASIC_STATUS_BM_INT;
- machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
+ m_vr4300->set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
return;
}
}
@@ -2452,7 +2410,7 @@ READ32_MEMBER( n64_periphs::dd_reg_r )
{
dd_status_reg &= ~DD_ASIC_STATUS_BM_INT;
//logerror("DD Read Gap, Clearing INT\n");
- machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
+ m_vr4300->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
dd_update_bm();
}
break;
@@ -2623,7 +2581,7 @@ WRITE32_MEMBER( n64_periphs::dd_reg_w )
}
//logerror("Sending MECHA Int\n");
dd_status_reg |= DD_ASIC_STATUS_MECHA_INT;
- machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
+ m_vr4300->set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
break;
case 0x10/4: // BM Status
@@ -2664,7 +2622,7 @@ WRITE32_MEMBER( n64_periphs::dd_reg_w )
if(!(dd_status_reg & DD_ASIC_STATUS_BM_INT) && !(dd_status_reg & DD_ASIC_STATUS_MECHA_INT))
{
//logerror("DD Status, Clearing INT\n");
- machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
+ m_vr4300->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
}
if(data & DD_BM_START)
{
@@ -2742,7 +2700,14 @@ void n64_state::n64_machine_stop()
device_image_interface *image = dynamic_cast<device_image_interface *>(periphs->m_nvram_image);
UINT8 data[0x30800];
- memcpy(data, n64_sram, 0x20000);
+ if (m_sram != NULL)
+ {
+ memset(data, 0, 0x20000);
+ }
+ else
+ {
+ memcpy(data, m_sram, 0x20000);
+ }
memcpy(data + 0x20000, periphs->m_save_data.eeprom, 0x800);
memcpy(data + 0x20800, periphs->m_save_data.mempak[0], 0x8000);
memcpy(data + 0x28800, periphs->m_save_data.mempak[1], 0x8000);
@@ -2751,21 +2716,16 @@ void n64_state::n64_machine_stop()
void n64_state::machine_start()
{
- rdram = reinterpret_cast<UINT32 *>(memshare("rdram")->ptr());
- n64_sram = reinterpret_cast<UINT32 *>(memshare("sram")->ptr());
- rsp_imem = reinterpret_cast<UINT32 *>(memshare("rsp_imem")->ptr());
- rsp_dmem = reinterpret_cast<UINT32 *>(memshare("rsp_dmem")->ptr());
-
- dynamic_cast<mips3_device *>(machine().device("maincpu"))->mips3drc_set_options(MIPS3DRC_COMPATIBLE_OPTIONS);
+ m_vr4300->mips3drc_set_options(MIPS3DRC_COMPATIBLE_OPTIONS);
/* configure fast RAM regions */
- dynamic_cast<mips3_device *>(machine().device("maincpu"))->add_fastram(0x00000000, 0x007fffff, FALSE, rdram);
+ m_vr4300->add_fastram(0x00000000, 0x007fffff, FALSE, m_rdram);
rsp_device *rsp = machine().device<rsp_device>("rsp");
rsp->rspdrc_set_options(RSPDRC_STRICT_VERIFY);
rsp->rspdrc_flush_drc_cache();
- rsp->rsp_add_dmem(rsp_dmem);
- rsp->rsp_add_imem(rsp_imem);
+ rsp->rsp_add_dmem(m_rsp_dmem);
+ rsp->rsp_add_imem(m_rsp_imem);
/* add a hook for battery save */
machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(n64_state::n64_machine_stop),this));
@@ -2773,5 +2733,5 @@ void n64_state::machine_start()
void n64_state::machine_reset()
{
- machine().device("rsp")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+ m_rsp->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
}
diff --git a/src/mame/machine/vsnes.cpp b/src/mame/machine/vsnes.cpp
index 8e210a75c95..f723c30cdb7 100644
--- a/src/mame/machine/vsnes.cpp
+++ b/src/mame/machine/vsnes.cpp
@@ -197,14 +197,23 @@ MACHINE_START_MEMBER(vsnes_state,vsnes)
ppu1_space.install_readwrite_handler(0x2000, 0x3eff, read8_delegate(FUNC(vsnes_state::vsnes_nt0_r),this), write8_delegate(FUNC(vsnes_state::vsnes_nt0_w),this));
- m_vrom[0] = memregion("gfx1")->base();
- m_vrom_size[0] = memregion("gfx1")->bytes();
- m_vrom_banks = m_vrom_size[0] / 0x400;
+ if (m_gfx1_rom != NULL)
+ {
+ m_vrom[0] = memregion("gfx1")->base();
+ m_vrom_size[0] = memregion("gfx1")->bytes();
+ m_vrom_banks = m_vrom_size[0] / 0x400;
+ }
+ else
+ {
+ m_vrom[0] = NULL;
+ m_vrom_size[0] = 0;
+ m_vrom_banks = 0;
+ }
/* establish chr banks */
/* bank 1 is used already! */
/* DRIVER_INIT is called first - means we can handle this different for VRAM games! */
- if (NULL != m_vrom[0])
+ if (m_vrom[0] != NULL)
{
for (i = 0; i < 8; i++)
{
diff --git a/src/mame/video/n64.cpp b/src/mame/video/n64.cpp
index 786f09f2f24..b83baa532ff 100644
--- a/src/mame/video/n64.cpp
+++ b/src/mame/video/n64.cpp
@@ -91,7 +91,7 @@ INT32 n64_rdp::get_alpha_cvg(INT32 comb_alpha, rdp_span_aux* userdata, const rdp
void n64_state::video_start()
{
- m_rdp = auto_alloc(machine(), n64_rdp(*this));
+ m_rdp = auto_alloc(machine(), n64_rdp(*this, m_rdram, m_rsp_dmem));
m_rdp->set_machine(machine());
m_rdp->init_internal_state();
@@ -203,7 +203,7 @@ void n64_periphs::video_update16(bitmap_rgb32 &bitmap)
//INT32 dither_filter = (n64->vi_control >> 16) & 1;
//INT32 vibuffering = ((n64->vi_control & 2) && fsaa && divot);
- UINT16* frame_buffer = (UINT16*)&rdram[(vi_origin & 0xffffff) >> 2];
+ UINT16* frame_buffer = (UINT16*)&m_rdram[(vi_origin & 0xffffff) >> 2];
//UINT32 hb = ((n64->vi_origin & 0xffffff) >> 2) >> 1;
//UINT8* hidden_buffer = &m_hidden_bits[hb];
@@ -261,7 +261,7 @@ void n64_periphs::video_update32(bitmap_rgb32 &bitmap)
INT32 gamma_dither = (vi_control >> 2) & 1;
//INT32 vibuffering = ((n64->vi_control & 2) && fsaa && divot);
- UINT32* frame_buffer32 = (UINT32*)&rdram[(vi_origin & 0xffffff) >> 2];
+ UINT32* frame_buffer32 = (UINT32*)&m_rdram[(vi_origin & 0xffffff) >> 2];
const INT32 hdiff = (vi_hstart & 0x3ff) - ((vi_hstart >> 16) & 0x3ff);
const float hcoeff = ((float)(vi_xscale & 0xfff) / (1 << 10));
@@ -843,7 +843,7 @@ void n64_rdp::z_store(const rdp_poly_state &object, UINT32 zcurpixel, UINT32 dzc
UINT16 zval = m_z_com_table[z & 0x3ffff]|(enc >> 2);
if(zcurpixel <= MEM16_LIMIT)
{
- ((UINT16*)rdram)[zcurpixel ^ WORD_ADDR_XOR] = zval;
+ ((UINT16*)m_rdram)[zcurpixel ^ WORD_ADDR_XOR] = zval;
}
if(dzcurpixel <= MEM8_LIMIT)
{
@@ -1099,11 +1099,11 @@ UINT32 n64_rdp::read_data(UINT32 address)
{
if (m_status & 0x1) // XBUS_DMEM_DMA enabled
{
- return rsp_dmem[(address & 0xfff) / 4];
+ return m_dmem[(address & 0xfff) / 4];
}
else
{
- return rdram[((address & 0xffffff) / 4)];
+ return m_rdram[((address & 0xffffff) / 4)];
}
}
@@ -3124,10 +3124,14 @@ void n64_rdp::process_command_list()
/*****************************************************************************/
-n64_rdp::n64_rdp(n64_state &state) : poly_manager<UINT32, rdp_poly_state, 8, 32000>(state.machine())
+n64_rdp::n64_rdp(n64_state &state, UINT32* rdram, UINT32* dmem) : poly_manager<UINT32, rdp_poly_state, 8, 32000>(state.machine())
{
ignore = false;
dolog = false;
+
+ m_rdram = rdram;
+ m_dmem = dmem;
+
m_aux_buf_ptr = 0;
m_aux_buf = NULL;
m_pipe_clean = true;
diff --git a/src/mame/video/n64.h b/src/mame/video/n64.h
index 8c5a5e9f753..4f097afca9c 100644
--- a/src/mame/video/n64.h
+++ b/src/mame/video/n64.h
@@ -69,26 +69,26 @@
#endif
#if RDP_RANGE_CHECK
-#define RREADADDR8(in) ((rdp_range_check((in))) ? 0 : (((UINT8*)rdram)[(in) ^ BYTE_ADDR_XOR]))
-#define RREADIDX16(in) ((rdp_range_check((in) << 1)) ? 0 : (((UINT16*)rdram)[(in) ^ WORD_ADDR_XOR]))
-#define RREADIDX32(in) ((rdp_range_check((in) << 2)) ? 0 : rdram[(in)])
+#define RREADADDR8(in) ((rdp_range_check((in))) ? 0 : (((UINT8*)m_rdram)[(in) ^ BYTE_ADDR_XOR]))
+#define RREADIDX16(in) ((rdp_range_check((in) << 1)) ? 0 : (((UINT16*)m_rdram)[(in) ^ WORD_ADDR_XOR]))
+#define RREADIDX32(in) ((rdp_range_check((in) << 2)) ? 0 : m_rdram[(in)])
-#define RWRITEADDR8(in, val) if(rdp_range_check((in))) { printf("Write8: Address %08x out of range!\n", (in)); fflush(stdout); fatalerror("Address %08x out of range!\n", (in)); } else { ((UINT8*)rdram)[(in) ^ BYTE_ADDR_XOR] = val;}
-#define RWRITEIDX16(in, val) if(rdp_range_check((in) << 1)) { printf("Write16: Address %08x out of range!\n", ((object.m_misc_state.m_fb_address >> 1) + curpixel) << 1); fflush(stdout); fatalerror("Address out of range\n"); } else { ((UINT16*)rdram)[(in) ^ WORD_ADDR_XOR] = val;}
-#define RWRITEIDX32(in, val) if(rdp_range_check((in) << 2)) { printf("Write32: Address %08x out of range!\n", (in) << 2); fflush(stdout); fatalerror("Address %08x out of range!\n", (in) << 2); } else { rdram[(in)] = val;}
+#define RWRITEADDR8(in, val) if(rdp_range_check((in))) { printf("Write8: Address %08x out of range!\n", (in)); fflush(stdout); fatalerror("Address %08x out of range!\n", (in)); } else { ((UINT8*)m_rdram)[(in) ^ BYTE_ADDR_XOR] = val;}
+#define RWRITEIDX16(in, val) if(rdp_range_check((in) << 1)) { printf("Write16: Address %08x out of range!\n", ((object.m_misc_state.m_fb_address >> 1) + curpixel) << 1); fflush(stdout); fatalerror("Address out of range\n"); } else { ((UINT16*)m_rdram)[(in) ^ WORD_ADDR_XOR] = val;}
+#define RWRITEIDX32(in, val) if(rdp_range_check((in) << 2)) { printf("Write32: Address %08x out of range!\n", (in) << 2); fflush(stdout); fatalerror("Address %08x out of range!\n", (in) << 2); } else { m_rdram[(in)] = val;}
#else
-#define RREADADDR8(in) (((UINT8*)rdram)[(in) ^ BYTE_ADDR_XOR])
-#define RREADIDX16(in) (((UINT16*)rdram)[(in) ^ WORD_ADDR_XOR])
-#define RREADIDX32(in) (rdram[(in)])
+#define RREADADDR8(in) (((UINT8*)m_rdram)[(in) ^ BYTE_ADDR_XOR])
+#define RREADIDX16(in) (((UINT16*)m_rdram)[(in) ^ WORD_ADDR_XOR])
+#define RREADIDX32(in) (m_rdram[(in)])
-#define RWRITEADDR8(in, val) ((UINT8*)rdram)[(in) ^ BYTE_ADDR_XOR] = val;
-#define RWRITEIDX16(in, val) ((UINT16*)rdram)[(in) ^ WORD_ADDR_XOR] = val;
-#define RWRITEIDX32(in, val) rdram[(in)] = val
+#define RWRITEADDR8(in, val) ((UINT8*)m_rdram)[(in) ^ BYTE_ADDR_XOR] = val;
+#define RWRITEIDX16(in, val) ((UINT16*)m_rdram)[(in) ^ WORD_ADDR_XOR] = val;
+#define RWRITEIDX32(in, val) m_rdram[(in)] = val
#endif
-#define U_RREADADDR8(in) (((UINT8*)rdram)[(in) ^ BYTE_ADDR_XOR])
-#define U_RREADIDX16(in) (((UINT16*)rdram)[(in) ^ WORD_ADDR_XOR])
-#define U_RREADIDX32(in) (rdram[(in)])
+#define U_RREADADDR8(in) (((UINT8*)m_rdram)[(in) ^ BYTE_ADDR_XOR])
+#define U_RREADIDX16(in) (((UINT16*)m_rdram)[(in) ^ WORD_ADDR_XOR])
+#define U_RREADIDX32(in) (m_rdram[(in)])
#define GETLOWCOL(x) (((x) & 0x3e) << 2)
#define GETMEDCOL(x) (((x) & 0x7c0) >> 3)
@@ -133,7 +133,7 @@ typedef void (*rdp_command_t)(UINT32 w1, UINT32 w2);
class n64_rdp : public poly_manager<UINT32, rdp_poly_state, 8, 32000>
{
public:
- n64_rdp(n64_state &state);
+ n64_rdp(n64_state &state, UINT32* rdram, UINT32* dmem);
running_machine &machine() const { assert(m_machine != NULL); return *m_machine; }
@@ -334,6 +334,8 @@ private:
compute_cvg_t m_compute_cvg[2];
running_machine* m_machine;
+ UINT32* m_rdram;
+ UINT32* m_dmem;
combine_modes_t m_combine;
bool m_pending_mode_block;
diff --git a/src/mame/video/rdptpipe.cpp b/src/mame/video/rdptpipe.cpp
index 17182c97dab..b8371c0c0d7 100644
--- a/src/mame/video/rdptpipe.cpp
+++ b/src/mame/video/rdptpipe.cpp
@@ -25,7 +25,7 @@ void n64_texture_pipe_t::set_machine(running_machine &machine)
{
n64_state* state = machine.driver_data<n64_state>();
- m_rdp = state->m_rdp;
+ m_rdp = state->rdp();
for(INT32 i = 0; i < 0x10000; i++)
{
diff --git a/src/mame/video/sega16sp.cpp b/src/mame/video/sega16sp.cpp
index cb92a10a212..34b3579afe7 100644
--- a/src/mame/video/sega16sp.cpp
+++ b/src/mame/video/sega16sp.cpp
@@ -826,6 +826,7 @@ void bootleg_sys16a_sprite_device::draw(bitmap_ind16 &bitmap, const rectangle &c
sega_sys16b_sprite_device::sega_sys16b_sprite_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: sega_16bit_sprite_device(mconfig, SEGA_SYS16B_SPRITES, "Sega System 16B Sprites", tag, owner, "sega_16bit_sprite", __FILE__)
+ , m_sprite_region(*this, tag)
{
set_local_origin(184, 0x00, -184, 0);
}
@@ -867,9 +868,15 @@ void sega_sys16b_sprite_device::draw(bitmap_ind16 &bitmap, const rectangle &clip
// Note that the zooming described below is 100% accurate to the real board.
//
+ // if the game does not have sprites, don't try to draw anything
+ if (m_sprite_region == NULL)
+ {
+ return;
+ }
+
// render the sprites in order
- const UINT16 *spritebase = reinterpret_cast<const UINT16 *>(region()->base());
- UINT8 numbanks = region()->bytes() / 0x20000;
+ const UINT16 *spritebase = reinterpret_cast<const UINT16 *>(m_sprite_region->base());
+ UINT8 numbanks = m_sprite_region->bytes() / 0x20000;
UINT16 *ramend = spriteram() + spriteram_elements();
for (UINT16 *data = spriteram(); data < ramend; data += 8)
{
diff --git a/src/mame/video/sega16sp.h b/src/mame/video/sega16sp.h
index ed190d5aeec..6960ccdadbe 100644
--- a/src/mame/video/sega16sp.h
+++ b/src/mame/video/sega16sp.h
@@ -201,6 +201,9 @@ public:
protected:
// subclass overrides
virtual void draw(bitmap_ind16 &bitmap, const rectangle &cliprect);
+
+ // memory regions
+ optional_memory_region m_sprite_region;
};