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author AJR <ajrhacker@users.noreply.github.com>2021-08-13 19:56:57 -0400
committer AJR <ajrhacker@users.noreply.github.com>2021-08-13 19:56:57 -0400
commit10262d869bef3a917e64977edd254f302d733430 (patch)
tree527c263a026071f328e5d3c58ce6f3866e034e58
parentee0fe3ee35e7976fae2d0cbc902714eca62d57f1 (diff)
swim1, swim2: Implement callback for DAT1BYTE output
-rw-r--r--src/devices/machine/applefdintf.cpp4
-rw-r--r--src/devices/machine/applefdintf.h5
-rw-r--r--src/devices/machine/swim1.cpp24
-rw-r--r--src/devices/machine/swim2.cpp24
-rw-r--r--src/mame/drivers/mac.cpp4
5 files changed, 59 insertions, 2 deletions
diff --git a/src/devices/machine/applefdintf.cpp b/src/devices/machine/applefdintf.cpp
index 2dc9fcec319..d81f77562d3 100644
--- a/src/devices/machine/applefdintf.cpp
+++ b/src/devices/machine/applefdintf.cpp
@@ -52,7 +52,8 @@ applefdintf_device::applefdintf_device(const machine_config &mconfig, device_typ
m_phases_cb(*this),
m_devsel_cb(*this),
m_sel35_cb(*this),
- m_hdsel_cb(*this)
+ m_hdsel_cb(*this),
+ m_dat1byte_cb(*this)
{
}
@@ -62,6 +63,7 @@ void applefdintf_device::device_start()
m_devsel_cb.resolve_safe();
m_sel35_cb.resolve_safe();
m_hdsel_cb.resolve_safe();
+ m_dat1byte_cb.resolve_safe();
save_item(NAME(m_phases));
save_item(NAME(m_phases_input));
}
diff --git a/src/devices/machine/applefdintf.h b/src/devices/machine/applefdintf.h
index 063006b59fd..97f5bc19b22 100644
--- a/src/devices/machine/applefdintf.h
+++ b/src/devices/machine/applefdintf.h
@@ -39,6 +39,9 @@ public:
// hdsel line when present and in output mode (active high)
auto hdsel_cb() { return m_hdsel_cb.bind(); }
+ // dat1byte line when present (active high)
+ auto dat1byte_cb() { return m_dat1byte_cb.bind(); }
+
// floppy selection input, to be updated according to the previous callbacks,
// nullptr if none selected
virtual void set_floppy(floppy_image_device *floppy) = 0;
@@ -94,7 +97,7 @@ public:
protected:
devcb_write8 m_phases_cb, m_devsel_cb;
- devcb_write_line m_sel35_cb, m_hdsel_cb;
+ devcb_write_line m_sel35_cb, m_hdsel_cb, m_dat1byte_cb;
// Current phase value in the bottom bits, input/output flags in the top bits
u8 m_phases;
diff --git a/src/devices/machine/swim1.cpp b/src/devices/machine/swim1.cpp
index cb847fd50c6..57afba463f4 100644
--- a/src/devices/machine/swim1.cpp
+++ b/src/devices/machine/swim1.cpp
@@ -100,6 +100,7 @@ void swim1_device::device_reset()
m_devsel_cb(0);
m_sel35_cb(true);
m_hdsel_cb(false);
+ m_dat1byte_cb(0);
}
void swim1_device::set_floppy(floppy_image_device *floppy)
@@ -310,6 +311,8 @@ void swim1_device::ism_write(offs_t offset, u8 data)
m_ism_mode &= ~data;
m_ism_param_idx = 0;
ism_show_mode();
+ if(data & 0x10)
+ m_dat1byte_cb((m_ism_fifo_pos != 0) ? 1 : 0);
if(!(m_ism_mode & 0x40)) {
logerror("switch to iwm\n");
u8 ism_devsel = m_ism_mode & 0x80 ? (m_ism_mode >> 1) & 3 : 0;
@@ -321,6 +324,8 @@ void swim1_device::ism_write(offs_t offset, u8 data)
case 0x7:
m_ism_mode |= data;
ism_show_mode();
+ if(data & 0x10)
+ m_dat1byte_cb((m_ism_fifo_pos != 2) ? 1 : 0);
break;
default:
@@ -598,6 +603,7 @@ attotime swim1_device::cycles_to_time(u64 cycles) const
void swim1_device::ism_fifo_clear()
{
m_ism_fifo_pos = 0;
+ m_dat1byte_cb((m_ism_mode & 0x10) ? 1 : 0);
ism_crc_clear();
}
@@ -606,6 +612,15 @@ bool swim1_device::ism_fifo_push(u16 data)
if(m_ism_fifo_pos == 2)
return true;
m_ism_fifo[m_ism_fifo_pos ++] = data;
+ if(m_ism_mode & 0x10) {
+ // write
+ if(m_ism_fifo_pos == 2)
+ m_dat1byte_cb(0);
+ } else {
+ // read
+ if(m_ism_fifo_pos == 1)
+ m_dat1byte_cb(1);
+ }
return false;
}
@@ -616,6 +631,15 @@ u16 swim1_device::ism_fifo_pop()
u16 r = m_ism_fifo[0];
m_ism_fifo[0] = m_ism_fifo[1];
m_ism_fifo_pos --;
+ if(m_ism_mode & 0x10) {
+ // write
+ if(m_ism_fifo_pos == 1)
+ m_dat1byte_cb(1);
+ } else {
+ // read
+ if(m_ism_fifo_pos == 0)
+ m_dat1byte_cb(0);
+ }
return r;
}
diff --git a/src/devices/machine/swim2.cpp b/src/devices/machine/swim2.cpp
index 69b718a4cef..c4b8ee387f4 100644
--- a/src/devices/machine/swim2.cpp
+++ b/src/devices/machine/swim2.cpp
@@ -70,6 +70,7 @@ void swim2_device::device_reset()
m_devsel_cb(0);
m_sel35_cb(true);
m_hdsel_cb(false);
+ m_dat1byte_cb(0);
m_flux_write_start = 0;
m_flux_write_count = 0;
std::fill(m_flux_write.begin(), m_flux_write.end(), 0);
@@ -282,11 +283,15 @@ void swim2_device::write(offs_t offset, u8 data)
m_mode |= 0x40;
m_param_idx = 0;
show_mode();
+ if(data & 0x10)
+ m_dat1byte_cb((m_fifo_pos != 0) ? 1 : 0);
break;
case 7: // mode set
m_mode |= data;
show_mode();
+ if(data & 0x10)
+ m_dat1byte_cb((m_fifo_pos != 2) ? 1 : 0);
break;
default:
@@ -367,6 +372,7 @@ attotime swim2_device::cycles_to_time(u64 cycles) const
void swim2_device::fifo_clear()
{
m_fifo_pos = 0;
+ m_dat1byte_cb((m_mode & 0x10) ? 1 : 0);
crc_clear();
}
@@ -375,6 +381,15 @@ bool swim2_device::fifo_push(u16 data)
if(m_fifo_pos == 2)
return true;
m_fifo[m_fifo_pos ++] = data;
+ if(m_mode & 0x10) {
+ // write
+ if(m_fifo_pos == 2)
+ m_dat1byte_cb(0);
+ } else {
+ // read
+ if(m_fifo_pos == 1)
+ m_dat1byte_cb(1);
+ }
return false;
}
@@ -385,6 +400,15 @@ u16 swim2_device::fifo_pop()
u16 r = m_fifo[0];
m_fifo[0] = m_fifo[1];
m_fifo_pos --;
+ if(m_mode & 0x10) {
+ // write
+ if(m_fifo_pos == 1)
+ m_dat1byte_cb(1);
+ } else {
+ // read
+ if(m_fifo_pos == 0)
+ m_dat1byte_cb(0);
+ }
return r;
}
diff --git a/src/mame/drivers/mac.cpp b/src/mame/drivers/mac.cpp
index dea97b69281..8391e40b503 100644
--- a/src/mame/drivers/mac.cpp
+++ b/src/mame/drivers/mac.cpp
@@ -882,12 +882,16 @@ void mac_state::maciifx(machine_config &config)
sccpic.hint_callback().set(FUNC(mac_state::oss_interrupt<7>));
m_scc->intrq_callback().set("sccpic", FUNC(applepic_device::pint_w));
+ //m_scc->dtr_reqa_callback().set("sccpic", FUNC(applepic_device::reqa_w));
+ //m_scc->dtr_reqb_callback().set("sccpic", FUNC(applepic_device::reqb_w));
applepic_device &swimpic(APPLEPIC(config, "swimpic", C15M));
swimpic.prd_callback().set(m_fdc, FUNC(applefdintf_device::read));
swimpic.pwr_callback().set(m_fdc, FUNC(applefdintf_device::write));
swimpic.hint_callback().set(FUNC(mac_state::oss_interrupt<6>));
+ m_fdc->dat1byte_cb().set("swimpic", FUNC(applepic_device::reqa_w));
+
RAM(config, m_ram);
m_ram->set_default_size("4M");
m_ram->set_extra_options("8M,16M,32M,64M,96M,128M");