diff options
author | Aaron Giles <aaron@aarongiles.com> | 2021-04-13 22:42:30 -0700 |
---|---|---|
committer | Aaron Giles <aaron@aarongiles.com> | 2021-04-13 22:42:30 -0700 |
commit | 2843b3739446528ec3f3cca4b7156f3789e20be0 (patch) | |
tree | eeda56e30c8b4568138dc2fab21de12aaed814b8 | |
parent | 889693e57e99a2d7d149aa60fc1de3036aa9f0ad (diff) |
Replace STRUCT_MEMBER usage from cpu devices with structured saves. Allow unions to be saved in the same manner as structs. Fix pointer saves.
27 files changed, 580 insertions, 471 deletions
diff --git a/src/devices/bus/hp_dio/hp98620.cpp b/src/devices/bus/hp_dio/hp98620.cpp index 6a58ef2af78..69106073bc5 100644 --- a/src/devices/bus/hp_dio/hp98620.cpp +++ b/src/devices/bus/hp_dio/hp98620.cpp @@ -36,26 +36,16 @@ dio16_98620_device::dio16_98620_device(const machine_config &mconfig, device_typ void dio16_98620_device::device_start() { m_installed_io = false; +} - save_item(STRUCT_MEMBER(m_regs, address)); - save_item(STRUCT_MEMBER(m_regs, tc)); - save_item(STRUCT_MEMBER(m_regs, control)); - save_item(STRUCT_MEMBER(m_regs, irq_level)); - save_item(STRUCT_MEMBER(m_regs, tsz)); - save_item(STRUCT_MEMBER(m_regs, subcount)); - save_item(STRUCT_MEMBER(m_regs, irq)); - save_item(STRUCT_MEMBER(m_regs, ie)); - save_item(STRUCT_MEMBER(m_regs, armed)); - save_item(STRUCT_MEMBER(m_regs, dma_out)); - save_item(STRUCT_MEMBER(m_regs, dma_pri)); - save_item(STRUCT_MEMBER(m_regs, lword)); - save_item(STRUCT_MEMBER(m_regs, word)); - - save_item(NAME(m_installed_io)); - save_item(NAME(m_control)); - save_item(NAME(m_data)); - save_item(NAME(m_irq_state)); - save_item(NAME(m_dmar)); +void dio16_98620_device::device_register_save(save_registrar &save) +{ + save.reg(NAME(m_installed_io)) + .reg(NAME(m_control)) + .reg(NAME(m_data)) + .reg(NAME(m_irq_state)) + .reg(NAME(m_dmar)) + .reg(NAME(m_regs)); } void dio16_98620_device::device_reset() diff --git a/src/devices/bus/hp_dio/hp98620.h b/src/devices/bus/hp_dio/hp98620.h index d8779f0e852..90318858e44 100644 --- a/src/devices/bus/hp_dio/hp98620.h +++ b/src/devices/bus/hp_dio/hp98620.h @@ -25,6 +25,7 @@ protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_register_save(save_registrar &save) override; uint16_t dma_r(offs_t offset); void dma_w(offs_t offset, uint16_t data); @@ -119,6 +120,23 @@ private: bool dma_pri = false; // TODO bool lword = false; bool word = false; + + void register_save(save_registrar &save) + { + save.reg(NAME(address)) + .reg(NAME(tc)) + .reg(NAME(control)) + .reg(NAME(irq_level)) + .reg(NAME(tsz)) + .reg(NAME(subcount)) + .reg(NAME(irq)) + .reg(NAME(ie)) + .reg(NAME(armed)) + .reg(NAME(dma_out)) + .reg(NAME(dma_pri)) + .reg(NAME(lword)) + .reg(NAME(word)); + } } m_regs[2]; bool m_dmar[2]; diff --git a/src/devices/bus/snes/sdd1.cpp b/src/devices/bus/snes/sdd1.cpp index 3b60be87609..65857afc8ce 100644 --- a/src/devices/bus/snes/sdd1.cpp +++ b/src/devices/bus/snes/sdd1.cpp @@ -430,18 +430,15 @@ void sns_rom_sdd1_device::device_start() m_buffer.data = std::make_unique<uint8_t[]>(0x10000); m_buffer.ready = 0; +} - save_item(NAME(m_sdd1_enable)); - save_item(NAME(m_xfer_enable)); - save_item(NAME(m_mmc)); - - save_item(STRUCT_MEMBER(m_dma, addr)); - save_item(STRUCT_MEMBER(m_dma, size)); - - save_pointer(NAME(m_buffer.data), 0x10000); - save_item(NAME(m_buffer.offset)); - save_item(NAME(m_buffer.size)); - save_item(NAME(m_buffer.ready)); +void sns_rom_sdd1_device::device_register_save(save_registrar &save) +{ + save.reg(NAME(m_sdd1_enable)) + .reg(NAME(m_xfer_enable)) + .reg(NAME(m_mmc)) + .reg(NAME(m_dma)) + .reg(NAME(m_buffer)); // TODO: save remaining decomp-related items so to fix support if we try to save mid-decompression... } diff --git a/src/devices/bus/snes/sdd1.h b/src/devices/bus/snes/sdd1.h index 5164a169f65..68d9beaacee 100644 --- a/src/devices/bus/snes/sdd1.h +++ b/src/devices/bus/snes/sdd1.h @@ -32,6 +32,7 @@ protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_register_save(save_registrar &save) override; // misc classes for the S-DD1 @@ -169,6 +170,8 @@ protected: { uint32_t addr; // $43x2-$43x4 -- DMA transfer address uint16_t size; // $43x5-$43x6 -- DMA transfer size + + void register_save(save_registrar &save) { save.reg(NAME(addr)).reg(NAME(size)); } } m_dma[8]; std::unique_ptr<SDD1_emu> m_sdd1emu; @@ -179,6 +182,8 @@ protected: uint16_t offset; // read index into S-DD1 decompression buffer uint32_t size; // length of data buffer; reads decrement counter, set ready to false at 0 uint8_t ready; // 1 when data[] is valid; 0 to invoke sdd1emu.decompress() + + void register_save(save_registrar &save) { save.reg(NAME(data), 0x10000).reg(NAME(offset)).reg(NAME(size)).reg(NAME(ready)); } } m_buffer; }; diff --git a/src/devices/bus/vcs/dpc.cpp b/src/devices/bus/vcs/dpc.cpp index 7709fe44e5a..9a7ee2156fd 100644 --- a/src/devices/bus/vcs/dpc.cpp +++ b/src/devices/bus/vcs/dpc.cpp @@ -34,20 +34,16 @@ void dpc_device::device_start() { m_oscillator = timer_alloc(TIMER_OSC); m_oscillator->reset(); +} - save_item(STRUCT_MEMBER(m_df, top)); - save_item(STRUCT_MEMBER(m_df, bottom)); - save_item(STRUCT_MEMBER(m_df, low)); - save_item(STRUCT_MEMBER(m_df, high)); - save_item(STRUCT_MEMBER(m_df, flag)); - save_item(STRUCT_MEMBER(m_df, music_mode)); - save_item(STRUCT_MEMBER(m_df, osc_clk)); - - save_item(NAME(m_movamt)); - save_item(NAME(m_latch_62)); - save_item(NAME(m_latch_64)); - save_item(NAME(m_dlc)); - save_item(NAME(m_shift_reg)); +void dpc_device::device_register_save(save_registrar &save) +{ + save.reg(NAME(m_df)) + .reg(NAME(m_movamt)) + .reg(NAME(m_latch_62)) + .reg(NAME(m_latch_64)) + .reg(NAME(m_dlc)) + .reg(NAME(m_shift_reg)); } void dpc_device::device_reset() diff --git a/src/devices/bus/vcs/dpc.h b/src/devices/bus/vcs/dpc.h index 19dc7f34dd2..9cd7426f1e9 100644 --- a/src/devices/bus/vcs/dpc.h +++ b/src/devices/bus/vcs/dpc.h @@ -37,11 +37,23 @@ protected: uint8_t flag; uint8_t music_mode; /* Only used by data fetchers 5,6, and 7 */ uint8_t osc_clk; /* Only used by data fetchers 5,6, and 7 */ + + void register_save(save_registrar &save) + { + save.reg(NAME(top)) + .reg(NAME(bottom)) + .reg(NAME(low)) + .reg(NAME(high)) + .reg(NAME(flag)) + .reg(NAME(music_mode)) + .reg(NAME(osc_clk)); + } }; // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_register_save(save_registrar &save) override; virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; df_t m_df[8]; diff --git a/src/devices/cpu/arm7/arm7.cpp b/src/devices/cpu/arm7/arm7.cpp index 107bae63a95..844fe93d86c 100644 --- a/src/devices/cpu/arm7/arm7.cpp +++ b/src/devices/cpu/arm7/arm7.cpp @@ -927,47 +927,6 @@ void arm7_cpu_device::device_start() m_prptr = [this](offs_t address) -> const void * { return m_cachebe.read_ptr(address); }; } - save_item(NAME(m_insn_prefetch_depth)); - save_item(NAME(m_insn_prefetch_count)); - save_item(NAME(m_insn_prefetch_index)); - save_item(NAME(m_insn_prefetch_buffer)); - save_item(NAME(m_insn_prefetch_address)); - save_item(NAME(m_insn_prefetch_valid)); - save_item(NAME(m_tlb_log)); - save_item(NAME(m_actual_log)); - save_item(NAME(m_r)); - save_item(NAME(m_pendingIrq)); - save_item(NAME(m_pendingFiq)); - save_item(NAME(m_pendingAbtD)); - save_item(NAME(m_pendingAbtP)); - save_item(NAME(m_pendingUnd)); - save_item(NAME(m_pendingSwi)); - save_item(NAME(m_pending_interrupt)); - save_item(NAME(m_control)); - save_item(NAME(m_tlbBase)); - save_item(NAME(m_tlb_base_mask)); - save_item(NAME(m_faultStatus)); - save_item(NAME(m_faultAddress)); - save_item(NAME(m_fcsePID)); - save_item(NAME(m_pid_offset)); - save_item(NAME(m_domainAccessControl)); - save_item(NAME(m_decoded_access_control)); - save_item(STRUCT_MEMBER(m_dtlb_entries, valid)); - save_item(STRUCT_MEMBER(m_dtlb_entries, domain)); - save_item(STRUCT_MEMBER(m_dtlb_entries, access)); - save_item(STRUCT_MEMBER(m_dtlb_entries, table_bits)); - save_item(STRUCT_MEMBER(m_dtlb_entries, base_addr)); - save_item(STRUCT_MEMBER(m_dtlb_entries, type)); - save_item(STRUCT_MEMBER(m_itlb_entries, valid)); - save_item(STRUCT_MEMBER(m_itlb_entries, domain)); - save_item(STRUCT_MEMBER(m_itlb_entries, access)); - save_item(STRUCT_MEMBER(m_itlb_entries, table_bits)); - save_item(STRUCT_MEMBER(m_itlb_entries, base_addr)); - save_item(STRUCT_MEMBER(m_itlb_entries, type)); - save_item(NAME(m_dtlb_entry_index)); - save_item(NAME(m_itlb_entry_index)); - machine().save().register_postload(save_prepost_delegate(FUNC(arm7_cpu_device::postload), this)); - set_icountptr(m_icount); state_add( ARM7_PC, "PC", m_pc).callexport().formatstr("%08X"); @@ -1029,6 +988,41 @@ void arm7_cpu_device::device_start() } } +void arm7_cpu_device::device_register_save(save_registrar &save) +{ + save.reg(NAME(m_insn_prefetch_depth)) + .reg(NAME(m_insn_prefetch_count)) + .reg(NAME(m_insn_prefetch_index)) + .reg(NAME(m_insn_prefetch_buffer)) + .reg(NAME(m_insn_prefetch_address)) + .reg(NAME(m_insn_prefetch_valid)) + .reg(NAME(m_tlb_log)) + .reg(NAME(m_actual_log)) + .reg(NAME(m_r)) + .reg(NAME(m_pendingIrq)) + .reg(NAME(m_pendingFiq)) + .reg(NAME(m_pendingAbtD)) + .reg(NAME(m_pendingAbtP)) + .reg(NAME(m_pendingUnd)) + .reg(NAME(m_pendingSwi)) + .reg(NAME(m_pending_interrupt)) + .reg(NAME(m_control)) + .reg(NAME(m_tlbBase)) + .reg(NAME(m_tlb_base_mask)) + .reg(NAME(m_faultStatus)) + .reg(NAME(m_faultAddress)) + .reg(NAME(m_fcsePID)) + .reg(NAME(m_pid_offset)) + .reg(NAME(m_domainAccessControl)) + .reg(NAME(m_decoded_access_control)) + .reg(NAME(m_dtlb_entries)) + .reg(NAME(m_itlb_entries)) + .reg(NAME(m_dtlb_entry_index)) + .reg(NAME(m_itlb_entry_index)); + + machine().save().register_postload(save_prepost_delegate(FUNC(arm7_cpu_device::postload), this)); +} + void arm946es_cpu_device::device_start() { diff --git a/src/devices/cpu/arm7/arm7.h b/src/devices/cpu/arm7/arm7.h index 34f8c53960f..8dca9e074af 100644 --- a/src/devices/cpu/arm7/arm7.h +++ b/src/devices/cpu/arm7/arm7.h @@ -120,6 +120,7 @@ protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_register_save(save_registrar &save) override; // device_execute_interface overrides virtual uint32_t execute_min_cycles() const noexcept override { return 3; } @@ -180,6 +181,16 @@ protected: uint32_t table_bits; uint32_t base_addr; uint8_t type; + + void register_save(save_registrar &save) + { + save.reg(NAME(valid)) + .reg(NAME(domain)) + .reg(NAME(access)) + .reg(NAME(table_bits)) + .reg(NAME(base_addr)) + .reg(NAME(type)); + } }; tlb_entry m_dtlb_entries[0x2000]; tlb_entry m_itlb_entries[0x2000]; diff --git a/src/devices/cpu/dspp/dspp.cpp b/src/devices/cpu/dspp/dspp.cpp index ac7ece3cfb5..2f348251fc5 100644 --- a/src/devices/cpu/dspp/dspp.cpp +++ b/src/devices/cpu/dspp/dspp.cpp @@ -176,68 +176,6 @@ void dspp_device::device_start() state_add(DSPP_R0 + regnum, tempstr.format("R%d", regnum), m_src2val[REGBASE + regnum]); #endif - // Register our state for saving - save_item(NAME(m_core->m_pc)); - save_item(NAME(m_core->m_stack)); - save_item(NAME(m_core->m_stack_ptr)); - save_item(NAME(m_core->m_rbase)); - save_item(NAME(m_core->m_acc)); - save_item(NAME(m_core->m_tclock)); - - save_item(NAME(m_core->m_flag_carry)); - save_item(NAME(m_core->m_flag_zero)); - save_item(NAME(m_core->m_flag_neg)); - save_item(NAME(m_core->m_flag_over)); - save_item(NAME(m_core->m_flag_exact)); - save_item(NAME(m_core->m_flag_audlock)); - save_item(NAME(m_core->m_flag_sleep)); - - save_item(NAME(m_outputs)); - save_item(NAME(m_output_fifo_start)); - save_item(NAME(m_output_fifo_count)); - - save_item(STRUCT_MEMBER(m_fifo_dma, m_current_addr)); - save_item(STRUCT_MEMBER(m_fifo_dma, m_current_count)); - save_item(STRUCT_MEMBER(m_fifo_dma, m_next_addr)); - save_item(STRUCT_MEMBER(m_fifo_dma, m_next_count)); - save_item(STRUCT_MEMBER(m_fifo_dma, m_prev_value)); - save_item(STRUCT_MEMBER(m_fifo_dma, m_prev_current)); - save_item(STRUCT_MEMBER(m_fifo_dma, m_go_forever)); - save_item(STRUCT_MEMBER(m_fifo_dma, m_next_valid)); - save_item(STRUCT_MEMBER(m_fifo_dma, m_reserved)); - save_item(STRUCT_MEMBER(m_fifo_dma, m_fifo)); - save_item(STRUCT_MEMBER(m_fifo_dma, m_dma_ptr)); - save_item(STRUCT_MEMBER(m_fifo_dma, m_dspi_ptr)); - save_item(STRUCT_MEMBER(m_fifo_dma, m_depth)); - - save_item(NAME(m_last_frame_clock)); - save_item(NAME(m_last_osc_count)); - save_item(NAME(m_osc_phase)); - save_item(NAME(m_osc_freq)); - - save_item(NAME(m_core->m_partial_int)); - - save_item(NAME(m_core->m_dspx_control)); - save_item(NAME(m_dspx_reset)); - save_item(NAME(m_dspx_int_enable)); - save_item(NAME(m_dspx_channel_enable)); - save_item(NAME(m_dspx_channel_complete)); - save_item(NAME(m_dspx_channel_direction)); - save_item(NAME(m_dspx_channel_8bit)); - save_item(NAME(m_dspx_channel_sqxd)); - save_item(NAME(m_dspx_shadow_current_addr)); - save_item(NAME(m_dspx_shadow_current_count)); - save_item(NAME(m_dspx_shadow_next_addr)); - save_item(NAME(m_dspx_shadow_next_count)); - save_item(NAME(m_dspx_dmanext_int)); - save_item(NAME(m_dspx_dmanext_enable)); - save_item(NAME(m_dspx_consumed_int)); - save_item(NAME(m_dspx_consumed_enable)); - save_item(NAME(m_dspx_underover_int)); - save_item(NAME(m_dspx_underover_enable)); - save_item(NAME(m_dspx_audio_time)); - save_item(NAME(m_dspx_audio_duration)); - // Set our instruction counter set_icountptr(m_core->m_icount); @@ -246,6 +184,47 @@ void dspp_device::device_start() //------------------------------------------------- +// device_register_save - register our state for +// saving +//------------------------------------------------- + +void dspp_device::device_register_save(save_registrar &save) +{ + save.reg(NAME(*m_core)) + .reg(NAME(m_fifo_dma)) + + .reg(NAME(m_outputs)) + .reg(NAME(m_output_fifo_start)) + .reg(NAME(m_output_fifo_count)) + + .reg(NAME(m_last_frame_clock)) + .reg(NAME(m_last_osc_count)) + .reg(NAME(m_osc_phase)) + .reg(NAME(m_osc_freq)) + + .reg(NAME(m_dspx_reset)) + .reg(NAME(m_dspx_int_enable)) + .reg(NAME(m_dspx_channel_enable)) + .reg(NAME(m_dspx_channel_complete)) + .reg(NAME(m_dspx_channel_direction)) + .reg(NAME(m_dspx_channel_8bit)) + .reg(NAME(m_dspx_channel_sqxd)) + .reg(NAME(m_dspx_shadow_current_addr)) + .reg(NAME(m_dspx_shadow_current_count)) + .reg(NAME(m_dspx_shadow_next_addr)) + .reg(NAME(m_dspx_shadow_next_count)) + .reg(NAME(m_dspx_dmanext_int)) + .reg(NAME(m_dspx_dmanext_enable)) + .reg(NAME(m_dspx_consumed_int)) + .reg(NAME(m_dspx_consumed_enable)) + .reg(NAME(m_dspx_underover_int)) + .reg(NAME(m_dspx_underover_enable)) + .reg(NAME(m_dspx_audio_time)) + .reg(NAME(m_dspx_audio_duration)); +} + + +//------------------------------------------------- // device_reset - reset the device //------------------------------------------------- diff --git a/src/devices/cpu/dspp/dspp.h b/src/devices/cpu/dspp/dspp.h index 68492fb7f40..6fe8e8d52b1 100644 --- a/src/devices/cpu/dspp/dspp.h +++ b/src/devices/cpu/dspp/dspp.h @@ -76,6 +76,7 @@ protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_register_save(save_registrar &save) override; // device_execute_interface overrides virtual uint32_t execute_min_cycles() const noexcept override; @@ -243,6 +244,29 @@ private: // External control registers uint32_t m_dspx_control; + + void register_save(save_registrar &save) + { + save.reg(NAME(m_pc)) + .reg(NAME(m_stack)) + .reg(NAME(m_stack_ptr)) + .reg(NAME(m_rbase)) + .reg(NAME(m_acc)) + .reg(NAME(m_tclock)) + + .reg(NAME(m_flag_carry)) + .reg(NAME(m_flag_zero)) + .reg(NAME(m_flag_neg)) + .reg(NAME(m_flag_over)) + .reg(NAME(m_flag_exact)) + .reg(NAME(m_flag_audlock)) + .reg(NAME(m_flag_sleep)) + + .reg(NAME(m_partial_int)) + + .reg(NAME(m_dspx_control)); + } + } * m_core; // DMA @@ -261,6 +285,23 @@ private: uint32_t m_dma_ptr; uint32_t m_dspi_ptr; uint32_t m_depth; + + void register_save(save_registrar &save) + { + save.reg(NAME(m_current_addr)) + .reg(NAME(m_current_count)) + .reg(NAME(m_next_addr)) + .reg(NAME(m_next_count)) + .reg(NAME(m_prev_value)) + .reg(NAME(m_prev_current)) + .reg(NAME(m_go_forever)) + .reg(NAME(m_next_valid)) + .reg(NAME(m_reserved)) + .reg(NAME(m_fifo)) + .reg(NAME(m_dma_ptr)) + .reg(NAME(m_dspi_ptr)) + .reg(NAME(m_depth)); + } } m_fifo_dma[NUM_DMA_CHANNELS]; // Oscillator diff --git a/src/devices/cpu/h8/h8_dma.cpp b/src/devices/cpu/h8/h8_dma.cpp index d70cced09f3..9e2f2dc00b5 100644 --- a/src/devices/cpu/h8/h8_dma.cpp +++ b/src/devices/cpu/h8/h8_dma.cpp @@ -150,25 +150,21 @@ void h8_dma_channel_device::set_info(const char *_intc, int _irq_base, int v0, i void h8_dma_channel_device::device_start() { - save_item(STRUCT_MEMBER(state, source)); - save_item(STRUCT_MEMBER(state, dest)); - save_item(STRUCT_MEMBER(state, incs)); - save_item(STRUCT_MEMBER(state, incd)); - save_item(STRUCT_MEMBER(state, count)); - save_item(STRUCT_MEMBER(state, id)); - save_item(STRUCT_MEMBER(state, autoreq)); - save_item(STRUCT_MEMBER(state, suspended)); - save_item(STRUCT_MEMBER(state, mode_16)); - save_item(NAME(mar)); - save_item(NAME(ioar)); - save_item(NAME(etcr)); - save_item(NAME(dmacr)); - save_item(NAME(dtcr)); - save_item(NAME(dta)); - save_item(NAME(dte)); - save_item(NAME(dtie)); - save_item(NAME(fae)); - save_item(NAME(sae)); +} + +void h8_dma_channel_device::device_register_save(save_registrar &save) +{ + save.reg(NAME(state)) + .reg(NAME(mar)) + .reg(NAME(ioar)) + .reg(NAME(etcr)) + .reg(NAME(dmacr)) + .reg(NAME(dtcr)) + .reg(NAME(dta)) + .reg(NAME(dte)) + .reg(NAME(dtie)) + .reg(NAME(fae)) + .reg(NAME(sae)); } void h8_dma_channel_device::device_reset() diff --git a/src/devices/cpu/h8/h8_dma.h b/src/devices/cpu/h8/h8_dma.h index 4a4eeda837b..fc80f4f9006 100644 --- a/src/devices/cpu/h8/h8_dma.h +++ b/src/devices/cpu/h8/h8_dma.h @@ -24,6 +24,19 @@ struct h8_dma_state { bool autoreq; // activate by auto-request bool suspended; bool mode_16; + + void register_save(save_registrar &save) + { + save.reg(NAME(source)) + .reg(NAME(dest)) + .reg(NAME(incs)) + .reg(NAME(incd)) + .reg(NAME(count)) + .reg(NAME(id)) + .reg(NAME(autoreq)) + .reg(NAME(suspended)) + .reg(NAME(mode_16)); + } }; class h8_dma_channel_device; @@ -157,6 +170,7 @@ protected: virtual void device_start() override; virtual void device_reset() override; + virtual void device_register_save(save_registrar &save) override; void h8h_sync(); // call set_bcr with contents from DTCR void start(int submodule); diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp index e8fdf6a12ea..cf3ab4c5d5c 100644 --- a/src/devices/cpu/i386/i386.cpp +++ b/src/devices/cpu/i386/i386.cpp @@ -1949,72 +1949,6 @@ void i386_device::i386_common_init() zero_state(); - save_item(NAME(m_reg.d)); - save_item(STRUCT_MEMBER(m_sreg, selector)); - save_item(STRUCT_MEMBER(m_sreg, base)); - save_item(STRUCT_MEMBER(m_sreg, limit)); - save_item(STRUCT_MEMBER(m_sreg, flags)); - save_item(STRUCT_MEMBER(m_sreg, d)); - save_item(NAME(m_eip)); - save_item(NAME(m_prev_eip)); - - save_item(NAME(m_CF)); - save_item(NAME(m_DF)); - save_item(NAME(m_SF)); - save_item(NAME(m_OF)); - save_item(NAME(m_ZF)); - save_item(NAME(m_PF)); - save_item(NAME(m_AF)); - save_item(NAME(m_IF)); - save_item(NAME(m_TF)); - save_item(NAME(m_IOP1)); - save_item(NAME(m_IOP2)); - save_item(NAME(m_NT)); - save_item(NAME(m_RF)); - save_item(NAME(m_VM)); - save_item(NAME(m_AC)); - save_item(NAME(m_VIF)); - save_item(NAME(m_VIP)); - save_item(NAME(m_ID)); - - save_item(NAME(m_CPL)); - - save_item(NAME(m_auto_clear_RF)); - save_item(NAME(m_performed_intersegment_jump)); - - save_item(NAME(m_cr)); - save_item(NAME(m_dr)); - save_item(NAME(m_tr)); - - save_item(NAME(m_idtr.base)); - save_item(NAME(m_idtr.limit)); - save_item(NAME(m_gdtr.base)); - save_item(NAME(m_gdtr.limit)); - save_item(NAME(m_task.base)); - save_item(NAME(m_task.segment)); - save_item(NAME(m_task.limit)); - save_item(NAME(m_task.flags)); - save_item(NAME(m_ldtr.base)); - save_item(NAME(m_ldtr.segment)); - save_item(NAME(m_ldtr.limit)); - save_item(NAME(m_ldtr.flags)); - - save_item(NAME(m_segment_override)); - - save_item(NAME(m_irq_state)); - save_item(NAME(m_a20_mask)); - - save_item(NAME(m_mxcsr)); - - save_item(NAME(m_smm)); - save_item(NAME(m_smi)); - save_item(NAME(m_smi_latched)); - save_item(NAME(m_nmi_masked)); - save_item(NAME(m_nmi_latched)); - save_item(NAME(m_smbase)); - save_item(NAME(m_lock)); - machine().save().register_postload(save_prepost_delegate(FUNC(i386_device::i386_postload), this)); - m_smiact.resolve_safe(); m_ferr_handler.resolve_safe(); m_ferr_handler(0); @@ -2026,6 +1960,64 @@ void i386_device::i386_common_init() }); } +void i386_device::device_register_save(save_registrar &save) +{ + save.reg(NAME(m_reg)) + .reg(NAME(m_sreg)) + .reg(NAME(m_eip)) + .reg(NAME(m_prev_eip)) + + .reg(NAME(m_CF)) + .reg(NAME(m_DF)) + .reg(NAME(m_SF)) + .reg(NAME(m_OF)) + .reg(NAME(m_ZF)) + .reg(NAME(m_PF)) + .reg(NAME(m_AF)) + .reg(NAME(m_IF)) + .reg(NAME(m_TF)) + .reg(NAME(m_IOP1)) + .reg(NAME(m_IOP2)) + .reg(NAME(m_NT)) + .reg(NAME(m_RF)) + .reg(NAME(m_VM)) + .reg(NAME(m_AC)) + .reg(NAME(m_VIF)) + .reg(NAME(m_VIP)) + .reg(NAME(m_ID)) + + .reg(NAME(m_CPL)) + + .reg(NAME(m_auto_clear_RF)) + .reg(NAME(m_performed_intersegment_jump)) + + .reg(NAME(m_cr)) + .reg(NAME(m_dr)) + .reg(NAME(m_tr)) + + .reg(NAME(m_idtr)) + .reg(NAME(m_gdtr)) + .reg(NAME(m_task)) + .reg(NAME(m_ldtr)) + + .reg(NAME(m_segment_override)) + + .reg(NAME(m_irq_state)) + .reg(NAME(m_a20_mask)) + + .reg(NAME(m_mxcsr)) + + .reg(NAME(m_smm)) + .reg(NAME(m_smi)) + .reg(NAME(m_smi_latched)) + .reg(NAME(m_nmi_masked)) + .reg(NAME(m_nmi_latched)) + .reg(NAME(m_smbase)) + .reg(NAME(m_lock)); + + machine().save().register_postload(save_prepost_delegate(FUNC(i386_device::i386_postload), this)); +} + void i386_device::device_start() { i386_common_init(); diff --git a/src/devices/cpu/i386/i386.h b/src/devices/cpu/i386/i386.h index 64730816b66..312537cd1f3 100644 --- a/src/devices/cpu/i386/i386.h +++ b/src/devices/cpu/i386/i386.h @@ -47,6 +47,7 @@ protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_register_save(save_registrar &save) override; virtual void device_debug_setup() override; // device_execute_interface overrides @@ -104,6 +105,8 @@ protected: uint32_t d[8]; uint16_t w[16]; uint8_t b[32]; + + void register_save(save_registrar &save) { save.reg(NAME(d)); } }; struct I386_SREG { @@ -113,11 +116,26 @@ protected: uint32_t limit; int d; // Operand size bool valid; + + void register_save(save_registrar &save) + { + save.reg(NAME(selector)) + .reg(NAME(base)) + .reg(NAME(limit)) + .reg(NAME(flags)) + .reg(NAME(d)); + } }; struct I386_SYS_TABLE { uint32_t base; uint16_t limit; + + void register_save(save_registrar &save) + { + save.reg(NAME(base)) + .reg(NAME(limit)); + } }; struct I386_SEG_DESC { @@ -125,8 +143,17 @@ protected: uint16_t flags; uint32_t base; uint32_t limit; + + void register_save(save_registrar &save) + { + save.reg(NAME(segment)) + .reg(NAME(flags)) + .reg(NAME(base)) + .reg(NAME(limit)); + } }; + union XMM_REG { uint8_t b[16]; uint16_t w[8]; diff --git a/src/devices/cpu/i8089/i8089_channel.cpp b/src/devices/cpu/i8089/i8089_channel.cpp index 2da1ac9d076..476b756c9a8 100644 --- a/src/devices/cpu/i8089/i8089_channel.cpp +++ b/src/devices/cpu/i8089/i8089_channel.cpp @@ -75,16 +75,21 @@ void i8089_channel_device::device_start() // resolve callbacks m_write_sintr.resolve_safe(); +} +//------------------------------------------------- +// device_register_save - register for save states +//------------------------------------------------- + +void i8089_channel_device::device_register_save(save_registrar &save) +{ // register for save states - save_item(NAME(m_xfer_pending)); - save_item(NAME(m_dma_value)); - save_item(NAME(m_dma_state)); - save_item(NAME(m_drq)); - save_item(NAME(m_prio)); - - save_item(STRUCT_MEMBER(m_r, w)); - save_item(STRUCT_MEMBER(m_r, t)); + save.reg(NAME(m_xfer_pending)) + .reg(NAME(m_dma_value)) + .reg(NAME(m_dma_state)) + .reg(NAME(m_drq)) + .reg(NAME(m_prio)) + .reg(NAME(m_r)); } //------------------------------------------------- diff --git a/src/devices/cpu/i8089/i8089_channel.h b/src/devices/cpu/i8089/i8089_channel.h index 89aa511193b..56d0f7da742 100644 --- a/src/devices/cpu/i8089/i8089_channel.h +++ b/src/devices/cpu/i8089/i8089_channel.h @@ -71,6 +71,8 @@ public: { uint32_t w; // 20-bit address bool t; // tag-bit + + void register_save(save_registrar &save) { save.reg(NAME(w)).reg(NAME(t)); } } m_r[11]; @@ -78,6 +80,7 @@ protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_register_save(save_registrar &save) override; private: diff --git a/src/devices/cpu/i86/i186.cpp b/src/devices/cpu/i86/i186.cpp index 0c15e41cbbc..7f45cb8d8c9 100644 --- a/src/devices/cpu/i86/i186.cpp +++ b/src/devices/cpu/i86/i186.cpp @@ -633,35 +633,6 @@ void i80186_cpu_device::device_start() state_add( I80186_I3CON, "I3CON", m_intr.ext[3] ).formatstr("%04X"); state_add( I80186_POLLSTS, "POLLSTS", m_intr.poll_status ).formatstr("%04X"); - // register for savestates - save_item(STRUCT_MEMBER(m_timer, control)); - save_item(STRUCT_MEMBER(m_timer, maxA)); - save_item(STRUCT_MEMBER(m_timer, maxB)); - save_item(STRUCT_MEMBER(m_timer, count)); - save_item(STRUCT_MEMBER(m_dma, source)); - save_item(STRUCT_MEMBER(m_dma, dest)); - save_item(STRUCT_MEMBER(m_dma, count)); - save_item(STRUCT_MEMBER(m_dma, control)); - save_item(NAME(m_intr.vector)); - save_item(NAME(m_intr.pending)); - save_item(NAME(m_intr.ack_mask)); - save_item(NAME(m_intr.priority_mask)); - save_item(NAME(m_intr.in_service)); - save_item(NAME(m_intr.request)); - save_item(NAME(m_intr.status)); - save_item(NAME(m_intr.poll_status)); - save_item(NAME(m_intr.timer)); - save_item(NAME(m_intr.dma)); - save_item(NAME(m_intr.ext)); - save_item(NAME(m_intr.ext_state)); - save_item(NAME(m_mem.lower)); - save_item(NAME(m_mem.upper)); - save_item(NAME(m_mem.middle)); - save_item(NAME(m_mem.middle_size)); - save_item(NAME(m_mem.peripheral)); - save_item(NAME(m_reloc)); - save_item(NAME(m_last_dma)); - // zerofill memset(m_timer, 0, sizeof(m_timer)); memset(m_dma, 0, sizeof(m_dma)); @@ -682,6 +653,19 @@ void i80186_cpu_device::device_start() m_irmx_irq_ack.resolve(); } +void i80186_cpu_device::device_register_save(save_registrar &save) +{ + i8086_common_cpu_device::device_register_save(save); + + // register for savestates + save.reg(NAME(m_timer)) + .reg(NAME(m_dma)) + .reg(NAME(m_intr)) + .reg(NAME(m_mem)) + .reg(NAME(m_reloc)) + .reg(NAME(m_last_dma)); +} + void i80186_cpu_device::device_reset() { i8086_common_cpu_device::device_reset(); diff --git a/src/devices/cpu/i86/i186.h b/src/devices/cpu/i86/i186.h index 1ef28afca6e..f17cfcc2caf 100644 --- a/src/devices/cpu/i86/i186.h +++ b/src/devices/cpu/i86/i186.h @@ -64,6 +64,7 @@ protected: virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 2); } virtual void execute_run() override; virtual void device_start() override; + virtual void device_register_save(save_registrar &save) override; virtual void device_reset() override; virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; virtual uint32_t execute_input_lines() const noexcept override { return 1; } @@ -103,6 +104,8 @@ private: uint16_t middle; uint16_t middle_size; uint16_t peripheral; + + void register_save(save_registrar &save) { save.reg(NAME(lower)).reg(NAME(upper)).reg(NAME(middle)).reg(NAME(middle_size)).reg(NAME(peripheral)); } }; struct timer_state @@ -112,6 +115,8 @@ private: uint16_t maxB; uint16_t count; emu_timer *int_timer; + + void register_save(save_registrar &save) { save.reg(NAME(control)).reg(NAME(maxA)).reg(NAME(maxB)).reg(NAME(count)); } }; struct dma_state @@ -121,6 +126,8 @@ private: uint32_t dest; uint16_t count; uint16_t control; + + void register_save(save_registrar &save) { save.reg(NAME(source)).reg(NAME(dest)).reg(NAME(count)).reg(NAME(control)); } }; struct intr_state @@ -137,6 +144,22 @@ private: uint16_t dma[2]; uint16_t ext[4]; uint8_t ext_state; + + void register_save(save_registrar &save) + { + save.reg(NAME(vector)) + .reg(NAME(pending)) + .reg(NAME(ack_mask)) + .reg(NAME(priority_mask)) + .reg(NAME(in_service)) + .reg(NAME(request)) + .reg(NAME(status)) + .reg(NAME(poll_status)) + .reg(NAME(timer)) + .reg(NAME(dma)) + .reg(NAME(ext)) + .reg(NAME(ext_state)); + } }; timer_state m_timer[3]; diff --git a/src/devices/cpu/i86/i286.cpp b/src/devices/cpu/i86/i286.cpp index dfa37f022f8..e009d812ec9 100644 --- a/src/devices/cpu/i86/i286.cpp +++ b/src/devices/cpu/i86/i286.cpp @@ -222,26 +222,6 @@ void i80286_cpu_device::device_reset() void i80286_cpu_device::device_start() { i8086_common_cpu_device::device_start(); - save_item(NAME(m_trap_level)); - save_item(NAME(m_msw)); - save_item(NAME(m_base)); - save_item(NAME(m_limit)); - save_item(NAME(m_rights)); - save_item(NAME(m_valid)); - save_item(NAME(m_gdtr.base)); - save_item(NAME(m_gdtr.limit)); - save_item(NAME(m_idtr.base)); - save_item(NAME(m_idtr.limit)); - save_item(NAME(m_ldtr.sel)); - save_item(NAME(m_ldtr.base)); - save_item(NAME(m_ldtr.limit)); - save_item(NAME(m_ldtr.rights)); - save_item(NAME(m_tr.sel)); - save_item(NAME(m_tr.base)); - save_item(NAME(m_tr.limit)); - save_item(NAME(m_tr.rights)); - save_item(NAME(m_amask)); - save_item(NAME(m_shutdown)); state_add( I286_ES, "ES", m_sregs[ES] ).formatstr("%04X"); state_add( I286_ES_BASE, "ESBASE", m_base[ES]).formatstr("%06X"); @@ -281,6 +261,24 @@ void i80286_cpu_device::device_start() m_out_shutdown_func.resolve_safe(); } +void i80286_cpu_device::device_register_save(save_registrar &save) +{ + i8086_common_cpu_device::device_register_save(save); + + save.reg(NAME(m_trap_level)) + .reg(NAME(m_msw)) + .reg(NAME(m_base)) + .reg(NAME(m_limit)) + .reg(NAME(m_rights)) + .reg(NAME(m_valid)) + .reg(NAME(m_gdtr)) + .reg(NAME(m_idtr)) + .reg(NAME(m_ldtr)) + .reg(NAME(m_tr)) + .reg(NAME(m_amask)) + .reg(NAME(m_shutdown)); +} + device_memory_interface::space_config_vector i80286_cpu_device::memory_space_config() const { if(has_configured_map(AS_OPCODES)) diff --git a/src/devices/cpu/i86/i286.h b/src/devices/cpu/i86/i286.h index 489e7beb099..a7319cc81f0 100644 --- a/src/devices/cpu/i86/i286.h +++ b/src/devices/cpu/i86/i286.h @@ -90,6 +90,7 @@ protected: virtual void execute_run() override; virtual void device_reset() override; virtual void device_start() override; + virtual void device_register_save(save_registrar &save) override; // device_state_interface overrides virtual void state_import(const device_state_entry &entry) override; @@ -135,12 +136,14 @@ private: struct { uint32_t base; uint16_t limit; + void register_save(save_registrar &save) { save.reg(NAME(base)).reg(NAME(limit)); } } m_gdtr, m_idtr; struct { uint16_t sel; uint32_t base; uint16_t limit; uint8_t rights; + void register_save(save_registrar &save) { save.reg(NAME(sel)).reg(NAME(base)).reg(NAME(limit)).reg(NAME(rights)); } } m_ldtr, m_tr; uint32_t TRAP(uint16_t fault, uint16_t code) { return ((((uint32_t)fault&0xffff)<<16)|(code&0xffff)); } diff --git a/src/devices/cpu/i86/i86.cpp b/src/devices/cpu/i86/i86.cpp index de5aceba216..7ccfc44ae5d 100644 --- a/src/devices/cpu/i86/i86.cpp +++ b/src/devices/cpu/i86/i86.cpp @@ -478,31 +478,6 @@ void i8086_common_cpu_device::device_start() } m_io = &space(AS_IO); - save_item(NAME(m_regs.w)); - save_item(NAME(m_sregs)); - save_item(NAME(m_ip)); - save_item(NAME(m_prev_ip)); - save_item(NAME(m_TF)); - save_item(NAME(m_IF)); - save_item(NAME(m_DF)); - save_item(NAME(m_MF)); - save_item(NAME(m_NT)); - save_item(NAME(m_IOPL)); - save_item(NAME(m_SignVal)); - save_item(NAME(m_int_vector)); - save_item(NAME(m_pending_irq)); - save_item(NAME(m_nmi_state)); - save_item(NAME(m_irq_state)); - save_item(NAME(m_AuxVal)); - save_item(NAME(m_OverVal)); - save_item(NAME(m_ZeroVal)); - save_item(NAME(m_CarryVal)); - save_item(NAME(m_ParityVal)); - save_item(NAME(m_seg_prefix)); - save_item(NAME(m_seg_prefix_next)); - save_item(NAME(m_prefix_seg)); - save_item(NAME(m_halt)); - // Register state for debugger state_add( I8086_IP, "IP", m_ip ).callimport().formatstr("%04X"); state_add( I8086_AX, "AX", m_regs.w[AX] ).formatstr("%04X"); @@ -530,6 +505,34 @@ void i8086_common_cpu_device::device_start() m_lock_handler.resolve_safe(); } +void i8086_common_cpu_device::device_register_save(save_registrar &save) +{ + save.reg(NAME(m_regs)) + .reg(NAME(m_sregs)) + .reg(NAME(m_ip)) + .reg(NAME(m_prev_ip)) + .reg(NAME(m_TF)) + .reg(NAME(m_IF)) + .reg(NAME(m_DF)) + .reg(NAME(m_MF)) + .reg(NAME(m_NT)) + .reg(NAME(m_IOPL)) + .reg(NAME(m_SignVal)) + .reg(NAME(m_int_vector)) + .reg(NAME(m_pending_irq)) + .reg(NAME(m_nmi_state)) + .reg(NAME(m_irq_state)) + .reg(NAME(m_AuxVal)) + .reg(NAME(m_OverVal)) + .reg(NAME(m_ZeroVal)) + .reg(NAME(m_CarryVal)) + .reg(NAME(m_ParityVal)) + .reg(NAME(m_seg_prefix)) + .reg(NAME(m_seg_prefix_next)) + .reg(NAME(m_prefix_seg)) + .reg(NAME(m_halt)); +} + void i8086_common_cpu_device::device_reset() { diff --git a/src/devices/cpu/i86/i86.h b/src/devices/cpu/i86/i86.h index f08a8e0c2ba..b37b5674ef9 100644 --- a/src/devices/cpu/i86/i86.h +++ b/src/devices/cpu/i86/i86.h @@ -113,6 +113,7 @@ protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_register_save(save_registrar &save) override; // device_execute_interface overrides virtual uint32_t execute_min_cycles() const noexcept override { return 1; } @@ -249,6 +250,8 @@ protected: { /* eight general registers */ uint16_t w[8]; /* viewed as 16 bits registers */ uint8_t b[16]; /* or as 8 bit registers */ + + void register_save(save_registrar &save) { save.reg(NAME(w)); } } m_regs; enum BREGS { diff --git a/src/devices/cpu/mcs96/i8x9x.cpp b/src/devices/cpu/mcs96/i8x9x.cpp index 792cc1378bb..9572e51a21f 100644 --- a/src/devices/cpu/mcs96/i8x9x.cpp +++ b/src/devices/cpu/mcs96/i8x9x.cpp @@ -77,36 +77,36 @@ void i8x9x_device::device_start() state_add(I8X9X_IOC1, "IOC1", ioc1); state_add<u8>(I8X9X_IOS0, "IOS0", [this]() -> u8 { return ios0; }, [this](u8 data) { ios0_w(data); }); state_add(I8X9X_IOS1, "IOS1", ios1); +} - save_item(STRUCT_MEMBER(hso_info, command)); - save_item(STRUCT_MEMBER(hso_info, time)); - save_item(NAME(hso_cam_hold.command)); - save_item(NAME(hso_cam_hold.time)); - - save_item(NAME(base_timer2)); - save_item(NAME(ad_done)); - save_item(NAME(hsi_mode)); - save_item(NAME(hsi_status)); - save_item(NAME(hso_command)); - save_item(NAME(ad_command)); - save_item(NAME(hso_active)); - save_item(NAME(hso_time)); - save_item(NAME(ad_result)); - save_item(NAME(port1)); - save_item(NAME(port2)); - save_item(NAME(pwm_control)); - save_item(NAME(ios0)); - save_item(NAME(ios1)); - save_item(NAME(ioc0)); - save_item(NAME(ioc1)); - save_item(NAME(extint)); - save_item(NAME(sbuf)); - save_item(NAME(sp_con)); - save_item(NAME(sp_stat)); - save_item(NAME(serial_send_buf)); - save_item(NAME(serial_send_timer)); - save_item(NAME(baud_reg)); - save_item(NAME(brh)); +void i8x9x_device::device_register_save(save_registrar &save) +{ + save.reg(NAME(hso_info)) + .reg(NAME(hso_cam_hold)) + .reg(NAME(base_timer2)) + .reg(NAME(ad_done)) + .reg(NAME(hsi_mode)) + .reg(NAME(hsi_status)) + .reg(NAME(hso_command)) + .reg(NAME(ad_command)) + .reg(NAME(hso_active)) + .reg(NAME(hso_time)) + .reg(NAME(ad_result)) + .reg(NAME(port1)) + .reg(NAME(port2)) + .reg(NAME(pwm_control)) + .reg(NAME(ios0)) + .reg(NAME(ios1)) + .reg(NAME(ioc0)) + .reg(NAME(ioc1)) + .reg(NAME(extint)) + .reg(NAME(sbuf)) + .reg(NAME(sp_con)) + .reg(NAME(sp_stat)) + .reg(NAME(serial_send_buf)) + .reg(NAME(serial_send_timer)) + .reg(NAME(baud_reg)) + .reg(NAME(brh)); } void i8x9x_device::device_reset() diff --git a/src/devices/cpu/mcs96/i8x9x.h b/src/devices/cpu/mcs96/i8x9x.h index 5f4ab03f8a5..1363406eef7 100644 --- a/src/devices/cpu/mcs96/i8x9x.h +++ b/src/devices/cpu/mcs96/i8x9x.h @@ -73,6 +73,7 @@ protected: virtual void device_resolve_objects() override; virtual void device_start() override; virtual void device_reset() override; + virtual void device_register_save(save_registrar &save) override; virtual uint32_t execute_input_lines() const noexcept override { return 5; } virtual void execute_set_input(int linenum, int state) override; @@ -126,6 +127,7 @@ private: struct hso_cam_entry { u8 command; u16 time; + void register_save(save_registrar &save) { save.reg(NAME(command)).reg(NAME(time)); } }; devcb_read16::array<8> m_ach_cb; diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp index ded941af415..87034bdeb4c 100644 --- a/src/devices/cpu/sharc/sharc.cpp +++ b/src/devices/cpu/sharc/sharc.cpp @@ -669,113 +669,6 @@ void adsp21062_device::device_start() m_core->fp0 = 0.0f; m_core->fp1 = 1.0f; - save_item(NAME(m_core->pc)); - save_pointer(NAME(&m_core->r[0].r), std::size(m_core->r)); - save_pointer(NAME(&m_core->reg_alt[0].r), std::size(m_core->reg_alt)); - save_item(NAME(m_core->mrf)); - save_item(NAME(m_core->mrb)); - - save_item(NAME(m_core->pcstack)); - save_item(NAME(m_core->lcstack)); - save_item(NAME(m_core->lastack)); - save_item(NAME(m_core->lstkp)); - - save_item(NAME(m_core->faddr)); - save_item(NAME(m_core->daddr)); - save_item(NAME(m_core->pcstk)); - save_item(NAME(m_core->pcstkp)); - save_item(NAME(m_core->laddr.addr)); - save_item(NAME(m_core->laddr.code)); - save_item(NAME(m_core->laddr.loop_type)); - save_item(NAME(m_core->curlcntr)); - save_item(NAME(m_core->lcntr)); - - save_item(NAME(m_core->dag1.i)); - save_item(NAME(m_core->dag1.m)); - save_item(NAME(m_core->dag1.b)); - save_item(NAME(m_core->dag1.l)); - save_item(NAME(m_core->dag2.i)); - save_item(NAME(m_core->dag2.m)); - save_item(NAME(m_core->dag2.b)); - save_item(NAME(m_core->dag2.l)); - save_item(NAME(m_core->dag1_alt.i)); - save_item(NAME(m_core->dag1_alt.m)); - save_item(NAME(m_core->dag1_alt.b)); - save_item(NAME(m_core->dag1_alt.l)); - save_item(NAME(m_core->dag2_alt.i)); - save_item(NAME(m_core->dag2_alt.m)); - save_item(NAME(m_core->dag2_alt.b)); - save_item(NAME(m_core->dag2_alt.l)); - - save_item(STRUCT_MEMBER(m_core->dma, control)); - save_item(STRUCT_MEMBER(m_core->dma, int_index)); - save_item(STRUCT_MEMBER(m_core->dma, int_modifier)); - save_item(STRUCT_MEMBER(m_core->dma, int_count)); - save_item(STRUCT_MEMBER(m_core->dma, chain_ptr)); - save_item(STRUCT_MEMBER(m_core->dma, gen_purpose)); - save_item(STRUCT_MEMBER(m_core->dma, ext_index)); - save_item(STRUCT_MEMBER(m_core->dma, ext_modifier)); - save_item(STRUCT_MEMBER(m_core->dma, ext_count)); - - save_item(NAME(m_core->mode1)); - save_item(NAME(m_core->mode2)); - save_item(NAME(m_core->astat)); - save_item(NAME(m_core->stky)); - save_item(NAME(m_core->irptl)); - save_item(NAME(m_core->imask)); - save_item(NAME(m_core->imaskp)); - save_item(NAME(m_core->ustat1)); - save_item(NAME(m_core->ustat2)); - - save_item(NAME(m_core->flag)); - - save_item(NAME(m_core->syscon)); - save_item(NAME(m_core->sysstat)); - - save_item(STRUCT_MEMBER(m_core->status_stack, mode1)); - save_item(STRUCT_MEMBER(m_core->status_stack, astat)); - save_item(NAME(m_core->status_stkp)); - - save_item(NAME(m_core->px)); - - save_item(NAME(m_core->opcode)); - - save_item(NAME(m_core->nfaddr)); - - save_item(NAME(m_core->idle)); - save_item(NAME(m_core->irq_pending)); - save_item(NAME(m_core->active_irq_num)); - - save_item(STRUCT_MEMBER(m_core->dma_op, src)); - save_item(STRUCT_MEMBER(m_core->dma_op, dst)); - save_item(STRUCT_MEMBER(m_core->dma_op, chain_ptr)); - save_item(STRUCT_MEMBER(m_core->dma_op, src_modifier)); - save_item(STRUCT_MEMBER(m_core->dma_op, dst_modifier)); - save_item(STRUCT_MEMBER(m_core->dma_op, src_count)); - save_item(STRUCT_MEMBER(m_core->dma_op, dst_count)); - save_item(STRUCT_MEMBER(m_core->dma_op, pmode)); - save_item(STRUCT_MEMBER(m_core->dma_op, chained_direction)); - save_item(STRUCT_MEMBER(m_core->dma_op, active)); - - save_item(NAME(m_core->dma_status)); - - save_item(NAME(m_core->interrupt_active)); - - save_item(NAME(m_core->iop_delayed_reg)); - save_item(NAME(m_core->iop_delayed_data)); - - save_item(NAME(m_core->delay_slot1)); - save_item(NAME(m_core->delay_slot2)); - - save_item(NAME(m_core->systemreg_latency_cycles)); - save_item(NAME(m_core->systemreg_latency_reg)); - save_item(NAME(m_core->systemreg_latency_data)); - save_item(NAME(m_core->systemreg_previous_data)); - - save_item(NAME(m_core->astat_old)); - save_item(NAME(m_core->astat_old_old)); - save_item(NAME(m_core->astat_old_old_old)); - state_add( SHARC_PC, "PC", m_core->pc).formatstr("%08X"); state_add( SHARC_PCSTK, "PCSTK", m_core->pcstk).formatstr("%08X"); state_add( SHARC_PCSTKP, "PCSTKP", m_core->pcstkp).formatstr("%08X"); @@ -883,6 +776,90 @@ void adsp21062_device::device_start() set_icountptr(m_core->icount); } +void adsp21062_device::device_register_save(save_registrar &save) +{ + save.reg(NAME(*m_core)); +} + + +SAVE_TYPE_AS_INT(adsp21062_device::SHARC_REG); +void adsp21062_device::sharc_internal_state::register_save(save_registrar &save) +{ + save.reg(NAME(pc)) + .reg(NAME(r)) + .reg(NAME(reg_alt)) + .reg(NAME(mrf)) + .reg(NAME(mrb)) + + .reg(NAME(pcstack)) + .reg(NAME(lcstack)) + .reg(NAME(lastack)) + .reg(NAME(lstkp)) + + .reg(NAME(faddr)) + .reg(NAME(daddr)) + .reg(NAME(pcstk)) + .reg(NAME(pcstkp)) + .reg(NAME(laddr)) + .reg(NAME(curlcntr)) + .reg(NAME(lcntr)) + + .reg(NAME(dag1)) + .reg(NAME(dag2)) + .reg(NAME(dag1_alt)) + .reg(NAME(dag2_alt)) + .reg(NAME(dma)) + + .reg(NAME(mode1)) + .reg(NAME(mode2)) + .reg(NAME(astat)) + .reg(NAME(stky)) + .reg(NAME(irptl)) + .reg(NAME(imask)) + .reg(NAME(imaskp)) + .reg(NAME(ustat1)) + .reg(NAME(ustat2)) + + .reg(NAME(flag)) + + .reg(NAME(syscon)) + .reg(NAME(sysstat)) + + .reg(NAME(status_stack)) + .reg(NAME(status_stkp)) + + .reg(NAME(px)) + + .reg(NAME(opcode)) + + .reg(NAME(nfaddr)) + + .reg(NAME(idle)) + .reg(NAME(irq_pending)) + .reg(NAME(active_irq_num)) + + .reg(NAME(dma_op)) + + .reg(NAME(dma_status)) + + .reg(NAME(interrupt_active)) + + .reg(NAME(iop_delayed_reg)) + .reg(NAME(iop_delayed_data)) + + .reg(NAME(delay_slot1)) + .reg(NAME(delay_slot2)) + + .reg(NAME(systemreg_latency_cycles)) + .reg(NAME(systemreg_latency_reg)) + .reg(NAME(systemreg_latency_data)) + .reg(NAME(systemreg_previous_data)) + + .reg(NAME(astat_old)) + .reg(NAME(astat_old_old)) + .reg(NAME(astat_old_old_old)); +} + void adsp21062_device::device_reset() { memset(m_block0, 0, 0x8000 * sizeof(uint32_t)); diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 6c9292c5193..ad8bfbe3fb8 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -72,7 +72,6 @@ #define OP_USERFLAG_ASTAT_DELAY_COPY 0x001ff000 #define OP_USERFLAG_CALL 0x10000000 - class sharc_frontend; class adsp21062_device : public cpu_device @@ -208,6 +207,7 @@ protected: // device-level overrides virtual void device_start() override; virtual void device_reset() override; + virtual void device_register_save(save_registrar &save) override; // device_execute_interface overrides virtual uint32_t execute_min_cycles() const noexcept override { return 8; } @@ -229,6 +229,8 @@ private: uint32_t m[8]; uint32_t b[8]; uint32_t l[8]; + + void register_save(save_registrar &save) { save.reg(NAME(i)).reg(NAME(m)).reg(NAME(b)).reg(NAME(l)); } }; union SHARC_REG @@ -248,6 +250,19 @@ private: uint32_t ext_index; uint32_t ext_modifier; uint32_t ext_count; + + void register_save(save_registrar &save) + { + save.reg(NAME(control)) + .reg(NAME(int_index)) + .reg(NAME(int_modifier)) + .reg(NAME(int_count)) + .reg(NAME(chain_ptr)) + .reg(NAME(gen_purpose)) + .reg(NAME(ext_index)) + .reg(NAME(ext_modifier)) + .reg(NAME(ext_count)); + } }; struct SHARC_LADDR @@ -255,6 +270,8 @@ private: uint32_t addr; uint32_t code; uint32_t loop_type; + + void register_save(save_registrar &save) { save.reg(NAME(addr)).reg(NAME(code)).reg(NAME(loop_type)); } }; struct SHARC_DMA_OP @@ -270,6 +287,20 @@ private: int32_t chained_direction; emu_timer *timer; bool active; + + void register_save(save_registrar &save) + { + save.reg(NAME(src)) + .reg(NAME(dst)) + .reg(NAME(chain_ptr)) + .reg(NAME(src_modifier)) + .reg(NAME(dst_modifier)) + .reg(NAME(src_count)) + .reg(NAME(dst_count)) + .reg(NAME(pmode)) + .reg(NAME(chained_direction)) + .reg(NAME(active)); + } }; @@ -363,6 +394,8 @@ private: { uint32_t mode1; uint32_t astat; + + void register_save(save_registrar &save) { save.reg(NAME(mode1)).reg(NAME(astat)); } } status_stack[5]; int32_t status_stkp; @@ -418,6 +451,8 @@ private: uint32_t force_recompile; uint32_t cache_dirty; + + void register_save(save_registrar &save); }; sharc_internal_state* m_core; @@ -650,7 +685,6 @@ private: uint32_t do_condition_astat_bits(int condition); }; - DECLARE_DEVICE_TYPE(ADSP21062, adsp21062_device) #endif // MAME_CPU_SHARC_SHARC_H diff --git a/src/emu/save.h b/src/emu/save.h index 39c0ada0982..892c6e6ce89 100644 --- a/src/emu/save.h +++ b/src/emu/save.h @@ -240,6 +240,12 @@ public: return *this; } + // bool as a special case + save_registrar ®(bool &data, char const *name) + { + return register_internal(&data, save_registered_item::TYPE_BOOL, sizeof(data), name); + } + // signed integral types template<typename T> std::enable_if_t<is_signed_int_like<T>::value, save_registrar> ®(T &data, char const *name) @@ -286,8 +292,7 @@ public: return *this; } - // std::arrays -- these are containers with a single item representing the underlying data, - // which is replicated across the whole array + // std::arrays -- these identically to arrays template<typename T, std::size_t N> save_registrar ®(std::array<T, N> &data, char const *name) { @@ -296,7 +301,19 @@ public: return *this; } - // std::vectors -- these are treated as arrays, with the size coming from the vector + // pointers -- treat as an array with a specific count + template<typename T> + save_registrar ®(T *data, char const *name, std::size_t count) + { + if (data == nullptr) + throw emu_fatalerror("Passed null pointer to save state registration."); + + save_registrar container(*this, save_registered_item::save_type(count), sizeof(data[0]), name, &data[0]); + container.reg(data[0], ""); + return *this; + } + + // std::vectors -- these are treated as arrays, but wrapped template<typename T> save_registrar ®(std::vector<T> &data, char const *name) { @@ -327,20 +344,8 @@ public: return *this; } - // pointers - template<typename T> - save_registrar ®(T *dataptr, char const *name, std::size_t count) - { - if (dataptr == nullptr) - throw emu_fatalerror("Passed null pointer to save state registration."); - - save_registrar container(*this, save_registered_item::save_type(count), sizeof(dataptr), name, &dataptr, dataptr); - container.reg(dataptr[0], ""); - return *this; - } - - // structures (must have a register_save method) - template<typename T, std::enable_if_t<std::is_class<T>::value && !std::is_base_of<bitmap_t, T>::value && !is_atom<T>::value, bool> = true> + // structures & unions (must have a register_save method) + template<typename T, std::enable_if_t<(std::is_class<T>::value || std::is_union<T>::value) && !std::is_base_of<bitmap_t, T>::value && !is_atom<T>::value, bool> = true> save_registrar ®(T &data, char const *name) { save_registrar container(*this, save_registered_item::TYPE_STRUCT, sizeof(data), name, &data); @@ -348,9 +353,6 @@ public: return *this; } - // bool as a special case - save_registrar ®(bool &data, char const *name) { return register_internal(&data, save_registered_item::TYPE_BOOL, sizeof(data), name); } - // rectangle as a special case, since it's from an external library save_registrar ®(rectangle &data, char const *name) { |