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author Sandro Ronco <sandro.ronco@gmx.com>2021-04-24 23:46:48 +0200
committer Sandro Ronco <sandro.ronco@gmx.com>2021-04-24 23:46:48 +0200
commit96247d322c5bfa85696112c6f2f863efbc393b5b (patch)
tree7b7254429ee1f27647e30388c017ece62845fb3d
parente7d317c44a48d7e5d41d30e93eeb973fc71f35d6 (diff)
-cpu/score: Added bittgl! opcode.
-debuggdbstub.cpp: add score7 registers map.
-rw-r--r--src/devices/cpu/score/score.cpp22
-rw-r--r--src/devices/cpu/score/score.h3
-rw-r--r--src/devices/cpu/score/scoredsm.cpp7
-rw-r--r--src/osd/modules/debugger/debuggdbstub.cpp67
4 files changed, 80 insertions, 19 deletions
diff --git a/src/devices/cpu/score/score.cpp b/src/devices/cpu/score/score.cpp
index 4d7ed757c11..f541c27a0fe 100644
--- a/src/devices/cpu/score/score.cpp
+++ b/src/devices/cpu/score/score.cpp
@@ -112,7 +112,6 @@ void score7_cpu_device::device_start()
save_item(NAME(m_sr));
save_item(NAME(m_ce));
save_item(NAME(m_pending_interrupt));
- save_item(NAME(m_has_pending_interrupt));
}
@@ -127,8 +126,7 @@ void score7_cpu_device::device_reset()
memset(m_cr, 0, sizeof(m_cr));
memset(m_sr, 0, sizeof(m_sr));
memset(m_ce, 0, sizeof(m_ce));
- memset(m_pending_interrupt, 0, sizeof(m_pending_interrupt));
- m_has_pending_interrupt = false;
+ m_pending_interrupt = 0;
REG_EXCPVEC = m_pc = 0x9f000000;
}
@@ -182,7 +180,7 @@ void score7_cpu_device::execute_run()
m_ppc = m_pc;
debugger_instruction_hook(m_pc);
- if (m_has_pending_interrupt)
+ if (m_pending_interrupt)
check_irq();
uint32_t op = fetch();
@@ -226,10 +224,7 @@ void score7_cpu_device::execute_set_input(int inputnum, int state)
{
standard_irq_callback(inputnum);
if (inputnum > 0 && inputnum < 64)
- {
- m_pending_interrupt[inputnum] = true;
- m_has_pending_interrupt = true;
- }
+ m_pending_interrupt |= 1ULL << inputnum;
}
}
@@ -326,16 +321,14 @@ void score7_cpu_device::check_irq()
{
for (int i=63; i>0; i--)
{
- if (m_pending_interrupt[i])
+ if (m_pending_interrupt & (1ULL << i))
{
- m_pending_interrupt[i] = false;
+ m_pending_interrupt &= ~(1ULL << i);
standard_irq_callback(i);
gen_exception(EXCEPTION_INTERRUPT, i);
return;
}
}
-
- m_has_pending_interrupt = false;
}
}
@@ -1327,6 +1320,11 @@ void score7_cpu_device::op_iform1a()
CHECK_N(m_gpr[rd]);
CHECK_Z(m_gpr[rd] & (1 << imm5));
break;
+ case 0x07: // bittgl!
+ m_gpr[rd] ^= (1 << imm5);
+ CHECK_Z(m_gpr[rd]);
+ CHECK_N(m_gpr[rd]);
+ break;
default:
op_undef();
}
diff --git a/src/devices/cpu/score/score.h b/src/devices/cpu/score/score.h
index 4e8c68e2c88..b55be226043 100644
--- a/src/devices/cpu/score/score.h
+++ b/src/devices/cpu/score/score.h
@@ -119,8 +119,7 @@ private:
uint32_t m_cr[0x20];
uint32_t m_sr[3];
uint32_t m_ce[2];
- bool m_has_pending_interrupt;
- bool m_pending_interrupt[64];
+ uint64_t m_pending_interrupt;
// opcodes tables
typedef void (score7_cpu_device::*op_handler)();
diff --git a/src/devices/cpu/score/scoredsm.cpp b/src/devices/cpu/score/scoredsm.cpp
index 5e5b6b4e8ac..257d0416811 100644
--- a/src/devices/cpu/score/scoredsm.cpp
+++ b/src/devices/cpu/score/scoredsm.cpp
@@ -18,7 +18,7 @@ const char *const score7_disassembler::m_r2_op[16] = { "add", "sub", "neg", "cm
const char *const score7_disassembler::m_i1_op[8] = { "addi", "", "cmpi", "", "andi", "ori", "ldi", "" };
const char *const score7_disassembler::m_i2_op[8] = { "addis", "", "cmpis", "", "andis", "oris", "ldis", "" };
const char *const score7_disassembler::m_ls_op[8] = { "lw", "lh", "lhu", "lb", "sw", "sh", "lbu", "sb" };
-const char *const score7_disassembler::m_i1a_op[8] = { "addei", "slli", "sdbbp", "srli", "bitclr", "bitset", "bittst", "" };
+const char *const score7_disassembler::m_i1a_op[8] = { "addei", "slli", "sdbbp", "srli", "bitclr", "bitset", "bittst", "bittgl" };
const char *const score7_disassembler::m_i1b_op[8] = { "lwp", "lhp", "", "lbup", "swp", "shp", "", "sbp" };
const char *const score7_disassembler::m_cr_op[2] = { "mtcr", "mfcr" };
@@ -234,10 +234,7 @@ void score7_disassembler::disasm16(std::ostream &stream, offs_t pc, uint16_t opc
util::stream_format(stream, "ldiu! r%d, 0x%02x", GET_I2_RD(opcode), GET_I2_IMM8(opcode));
break;
case 0x06: // I-form-1a
- if (GET_I16_FUNC3(opcode) != 7)
- util::stream_format(stream, "%s! r%d, %d", m_i1a_op[GET_I16_FUNC3(opcode)], GET_I16_RD(opcode), GET_I16_IMM5(opcode));
- else
- util::stream_format(stream, "<undefined i-form-1a 0x%02x>", GET_I16_FUNC3(opcode));
+ util::stream_format(stream, "%s! r%d, %d", m_i1a_op[GET_I16_FUNC3(opcode)], GET_I16_RD(opcode), GET_I16_IMM5(opcode));
break;
case 0x07: // I-form-1b
switch(GET_I16_FUNC3(opcode))
diff --git a/src/osd/modules/debugger/debuggdbstub.cpp b/src/osd/modules/debugger/debuggdbstub.cpp
index 511b07dafaf..8a6dc2226e3 100644
--- a/src/osd/modules/debugger/debuggdbstub.cpp
+++ b/src/osd/modules/debugger/debuggdbstub.cpp
@@ -334,6 +334,72 @@ static const gdb_register_map gdb_register_map_m6809 =
}
};
+
+//-------------------------------------------------------------------------
+static const gdb_register_map gdb_register_map_score7 =
+{
+ "score7",
+ "mame.score7",
+ {
+ { "r0", "r0", true, TYPE_DATA_POINTER },
+ { "r1", "r1", false, TYPE_INT },
+ { "r2", "r2", false, TYPE_INT },
+ { "r3", "r3", false, TYPE_INT },
+ { "r4", "r4", false, TYPE_INT },
+ { "r5", "r5", false, TYPE_INT },
+ { "r6", "r6", false, TYPE_INT },
+ { "r7", "r7", false, TYPE_INT },
+ { "r8", "r8", false, TYPE_INT },
+ { "r9", "r9", false, TYPE_INT },
+ { "r10", "r10", false, TYPE_INT },
+ { "r11", "r11", false, TYPE_INT },
+ { "r12", "r12", false, TYPE_INT },
+ { "r13", "r13", false, TYPE_INT },
+ { "r14", "r14", false, TYPE_INT },
+ { "r15", "r15", false, TYPE_INT },
+ { "r16", "r16", false, TYPE_INT },
+ { "r17", "r17", false, TYPE_INT },
+ { "r18", "r18", false, TYPE_INT },
+ { "r19", "r19", false, TYPE_INT },
+ { "r20", "r20", false, TYPE_INT },
+ { "r21", "r21", false, TYPE_INT },
+ { "r22", "r22", false, TYPE_INT },
+ { "r23", "r23", false, TYPE_INT },
+ { "r24", "r24", false, TYPE_INT },
+ { "r25", "r25", false, TYPE_INT },
+ { "r26", "r26", false, TYPE_INT },
+ { "r27", "r27", false, TYPE_INT },
+ { "r28", "r28", false, TYPE_INT },
+ { "r29", "r29", false, TYPE_INT },
+ { "r30", "r30", false, TYPE_INT },
+ { "r31", "r31", false, TYPE_INT },
+ { "cr0", "PSR", false, TYPE_INT },
+ { "cr1", "COND", false, TYPE_INT },
+ { "cr2", "ECR", false, TYPE_INT },
+ { "cr3", "EXCPVEC", false, TYPE_INT },
+ { "cr4", "CCR", false, TYPE_INT },
+ { "cr5", "EPC", false, TYPE_INT },
+ { "cr6", "EMA", false, TYPE_INT },
+ { "cr7", "TLBLOCK", false, TYPE_INT },
+ { "cr8", "TLBPT", false, TYPE_INT },
+ { "cr9", "PEADDR", false, TYPE_INT },
+ { "cr10", "TLBRPT", false, TYPE_INT },
+ { "cr11", "PEVN", false, TYPE_INT },
+ { "cr12", "PECTX", false, TYPE_INT },
+ { "cr15", "LIMPFN", false, TYPE_INT },
+ { "cr16", "LDMPFN", false, TYPE_INT },
+ { "cr18", "PREV", false, TYPE_INT },
+ { "cr29", "DREG", false, TYPE_INT },
+ { "PC", "PC", true, TYPE_CODE_POINTER }, // actually Debug exception program counter (DEPC)
+ { "cr31", "DSAVE", false, TYPE_INT },
+ { "sr0", "COUNTER", false, TYPE_INT },
+ { "sr1", "LDCR", false, TYPE_INT },
+ { "sr2", "STCR", false, TYPE_INT },
+ { "ceh", "CEH", false, TYPE_INT },
+ { "cel", "CEL", false, TYPE_INT },
+ }
+};
+
//-------------------------------------------------------------------------
static const std::map<std::string, const gdb_register_map &> gdb_register_maps = {
{ "i486", gdb_register_map_i486 },
@@ -346,6 +412,7 @@ static const std::map<std::string, const gdb_register_map &> gdb_register_maps =
{ "m6502", gdb_register_map_m6502 },
{ "n2a03", gdb_register_map_m6502 },
{ "m6809", gdb_register_map_m6809 },
+ { "score7", gdb_register_map_score7 },
};
//-------------------------------------------------------------------------