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author Vas Crabb <vas@vastheman.com>2020-08-23 11:13:56 +1000
committer Vas Crabb <vas@vastheman.com>2020-08-23 11:13:56 +1000
commit164ef47ad2a2db22b599f42b5cf5cccde98323b7 (patch)
treeaf8848d4eba614fb27e6ec6fc022fb69ee100b0a
parent9be5a580607e56aac2b427621fa8a1f29745287e (diff)
srcclean for 0.224
-rw-r--r--hash/fm7_cass.xml2
-rw-r--r--hash/gamate.xml2
-rw-r--r--hash/ibm5170.xml2
-rw-r--r--hash/vgmplay.xml2
-rw-r--r--scripts/target/mame/nl.lua4
-rw-r--r--src/devices/bus/a2gameio/gizmo.cpp4
-rw-r--r--src/devices/bus/a2gameio/gizmo.h2
-rw-r--r--src/devices/bus/abcbus/lux10828.cpp4
-rw-r--r--src/devices/bus/abcbus/lux4105.cpp36
-rw-r--r--src/devices/cpu/gigatron/gigatron.cpp4
-rw-r--r--src/devices/machine/e05a30.h2
-rw-r--r--src/devices/machine/pit8253.cpp2
-rw-r--r--src/devices/machine/pit8253.h2
-rw-r--r--src/devices/sound/sp0250.cpp2
-rw-r--r--src/devices/video/epic12.cpp94
-rw-r--r--src/emu/inputdev.cpp3
-rw-r--r--src/emu/speaker.h6
-rw-r--r--src/lib/netlist/macro/nlm_cd4xxx_lib.cpp22
-rw-r--r--src/lib/netlist/macro/nlm_roms_lib.cpp2
-rw-r--r--src/lib/netlist/macro/nlm_ttl74xx_lib.cpp200
-rw-r--r--src/lib/netlist/plib/ppreprocessor.cpp2
-rw-r--r--src/mame/audio/mw8080bw.cpp22
-rw-r--r--src/mame/audio/nl_astrob.cpp206
-rw-r--r--src/mame/audio/nl_carpolo.cpp8
-rw-r--r--src/mame/audio/nl_elim.cpp222
-rw-r--r--src/mame/audio/nl_fireone.cpp126
-rw-r--r--src/mame/audio/nl_segaspeech.cpp6
-rw-r--r--src/mame/audio/nl_segausb.cpp198
-rw-r--r--src/mame/audio/nl_spacfury.cpp170
-rw-r--r--src/mame/audio/nl_starcrus.cpp12
-rw-r--r--src/mame/audio/nl_starfire.cpp116
-rw-r--r--src/mame/audio/nl_tankbatt.cpp12
-rw-r--r--src/mame/audio/segaspeech.h2
-rw-r--r--src/mame/drivers/abc1600.cpp2
-rw-r--r--src/mame/drivers/apple2gs.cpp2
-rw-r--r--src/mame/drivers/exidy.cpp2
-rw-r--r--src/mame/drivers/funworld.cpp706
-rw-r--r--src/mame/drivers/generalplus_gpl16250_nand.cpp6
-rw-r--r--src/mame/drivers/generalplus_gpl_unknown.cpp10
-rw-r--r--src/mame/drivers/gigatron.cpp102
-rw-r--r--src/mame/drivers/goldnpkr.cpp22
-rw-r--r--src/mame/drivers/goldstar.cpp6
-rw-r--r--src/mame/drivers/guab.cpp4
-rw-r--r--src/mame/drivers/hec2hrp.cpp2
-rw-r--r--src/mame/drivers/jpmsys5.cpp2
-rw-r--r--src/mame/drivers/karnov.cpp2
-rw-r--r--src/mame/drivers/lucky37.cpp2
-rw-r--r--src/mame/drivers/mpu4vid.cpp28
-rw-r--r--src/mame/drivers/nes_sh6578.cpp2
-rw-r--r--src/mame/drivers/nes_vt.cpp2
-rw-r--r--src/mame/drivers/photoply.cpp2
-rw-r--r--src/mame/drivers/qvt70.cpp16
-rw-r--r--src/mame/drivers/renegade.cpp4
-rw-r--r--src/mame/drivers/segag80v.cpp2
-rw-r--r--src/mame/drivers/snesb51.cpp8
-rw-r--r--src/mame/drivers/spg2xx_zone_32bit.cpp8
-rw-r--r--src/mame/drivers/sspeedr.cpp2
-rw-r--r--src/mame/drivers/starcrus.cpp10
-rw-r--r--src/mame/drivers/vp101.cpp2
-rw-r--r--src/mame/drivers/vt1682.cpp4
-rw-r--r--src/mame/drivers/williams.cpp26
-rw-r--r--src/mame/includes/spg2xx.h6
-rw-r--r--src/mame/layout/gigatron.lay2
-rw-r--r--src/mame/machine/bacta_datalogger.cpp16
-rw-r--r--src/mame/machine/nl_tank.cpp2
-rw-r--r--src/mame/machine/nl_tank.h2
-rw-r--r--src/mame/video/x1.cpp14
67 files changed, 1263 insertions, 1264 deletions
diff --git a/hash/fm7_cass.xml b/hash/fm7_cass.xml
index e66f367a9b2..52f37aca4c8 100644
--- a/hash/fm7_cass.xml
+++ b/hash/fm7_cass.xml
@@ -970,7 +970,7 @@ Titles, serial #s, publishers and release dates taken from:
</dataarea>
</part>
</software>
-
+
<software name="inoue">
<description>Inoue's Dragon Slayer</description>
<year>1985</year>
diff --git a/hash/gamate.xml b/hash/gamate.xml
index bc9456b4876..167e8d21fc8 100644
--- a/hash/gamate.xml
+++ b/hash/gamate.xml
@@ -573,7 +573,7 @@ C1066 - ??
<rom name="incouple.bin" size="32768" crc="d092a22a" sha1="bbb5bd0466b79657e44c4e9fde603ec645e77bfe" />
</dataarea>
</part>
- </software>
+ </software>
<software name="famous7">
<description>Famous 7</description>
diff --git a/hash/ibm5170.xml b/hash/ibm5170.xml
index 43d1be568ce..ce405bd5c44 100644
--- a/hash/ibm5170.xml
+++ b/hash/ibm5170.xml
@@ -9311,7 +9311,7 @@ license:CC0
<rom name="Battle Chess 4000 [Interplay] [1992] [3.5HD] [Data Disk 7 of 7].img" size="1474560" crc="b1649f1b" sha1="e84cdf93446c3695357502482875e6265309af1f"/>
</dataarea>
</part>
- </software>
+ </software>
<software name="steelsky">
<description>Beneath a Steel Sky (Euro)</description>
diff --git a/hash/vgmplay.xml b/hash/vgmplay.xml
index ec4c8a61b0a..f370a72d50e 100644
--- a/hash/vgmplay.xml
+++ b/hash/vgmplay.xml
@@ -241724,7 +241724,7 @@ license:CC0
</dataarea>
</part>
</software>
-
+
<!-- Project 2612 VGM Archives located at http://project2612.org/list.php
Also https://archive.org/details/Project2612CompleteArchive20180623681Sets.7z -->
diff --git a/scripts/target/mame/nl.lua b/scripts/target/mame/nl.lua
index dae23216d51..dbfb9cb1f21 100644
--- a/scripts/target/mame/nl.lua
+++ b/scripts/target/mame/nl.lua
@@ -166,7 +166,7 @@ files{
MAME_DIR .. "src/mame/audio/nl_flyball.cpp",
MAME_DIR .. "src/mame/audio/nl_flyball.h",
MAME_DIR .. "src/mame/drivers/flyball.cpp",
-
+
MAME_DIR .. "src/mame/audio/nl_destroyr.cpp",
MAME_DIR .. "src/mame/audio/nl_destroyr.h",
MAME_DIR .. "src/mame/drivers/destroyr.cpp",
@@ -349,7 +349,7 @@ files{
MAME_DIR .. "src/mame/machine/nl_tp1983.h",
MAME_DIR .. "src/mame/machine/nl_tp1985.cpp",
MAME_DIR .. "src/mame/machine/nl_tp1985.h",
-
+
MAME_DIR .. "src/mame/audio/nl_starcrus.h",
MAME_DIR .. "src/mame/audio/nl_starcrus.cpp",
MAME_DIR .. "src/mame/drivers/starcrus.cpp",
diff --git a/src/devices/bus/a2gameio/gizmo.cpp b/src/devices/bus/a2gameio/gizmo.cpp
index b3ffa9ea614..3fc87c20688 100644
--- a/src/devices/bus/a2gameio/gizmo.cpp
+++ b/src/devices/bus/a2gameio/gizmo.cpp
@@ -3,7 +3,7 @@
/*********************************************************************
gizmo.cpp - HAL Labs Gizmo digital joystick adapter
- Used by Vindicator and Super Taxman 2.
+ Used by Vindicator and Super Taxman 2.
*********************************************************************/
@@ -55,7 +55,7 @@ void apple2_gizmo_device::device_start()
READ_LINE_MEMBER(apple2_gizmo_device::sw0_r)
{
- static const int gizmo_bits[8] = { 1,3,2,0,4,5,5,5 };
+ static const int gizmo_bits[8] = { 1,3,2,0,4,5,5,5 };
return BIT(m_player1->read(),gizmo_bits[m_an0+(m_an1<<1)+(m_an2<<2)]);
}
diff --git a/src/devices/bus/a2gameio/gizmo.h b/src/devices/bus/a2gameio/gizmo.h
index c0702bc7a41..8f451992222 100644
--- a/src/devices/bus/a2gameio/gizmo.h
+++ b/src/devices/bus/a2gameio/gizmo.h
@@ -3,7 +3,7 @@
/*********************************************************************
gizmo.h - HAL Labs Gizmo digital joystick adapter
- Used by Vindicator and Super Taxman 2.
+ Used by Vindicator and Super Taxman 2.
*********************************************************************/
diff --git a/src/devices/bus/abcbus/lux10828.cpp b/src/devices/bus/abcbus/lux10828.cpp
index 0307870256c..3bbbcb027c1 100644
--- a/src/devices/bus/abcbus/lux10828.cpp
+++ b/src/devices/bus/abcbus/lux10828.cpp
@@ -106,8 +106,8 @@ Notes:
0704: rr a
0706: call $073F
- There is an alternate format function in the controller firmware that allows to set a secret byte which is stored in the sector header.
- Copy protected software checks the secret byte read from the sector header and refuses to start if the disk has not been appropriately formatted.
+ There is an alternate format function in the controller firmware that allows to set a secret byte which is stored in the sector header.
+ Copy protected software checks the secret byte read from the sector header and refuses to start if the disk has not been appropriately formatted.
*/
diff --git a/src/devices/bus/abcbus/lux4105.cpp b/src/devices/bus/abcbus/lux4105.cpp
index 17d51b93144..1bb72560855 100644
--- a/src/devices/bus/abcbus/lux4105.cpp
+++ b/src/devices/bus/abcbus/lux4105.cpp
@@ -41,7 +41,7 @@ Notes:
TODO
- - sector length error in read check after format
+ - sector length error in read check after format
*/
@@ -57,9 +57,9 @@ Notes:
//**************************************************************************
#define SASIBUS_TAG "sasi"
-#define DMA_O1 BIT(m_dma, 0)
-#define DMA_O2 BIT(m_dma, 1)
-#define DMA_O3 BIT(m_dma, 2)
+#define DMA_O1 BIT(m_dma, 0)
+#define DMA_O2 BIT(m_dma, 1)
+#define DMA_O3 BIT(m_dma, 2)
//**************************************************************************
@@ -228,16 +228,16 @@ void luxor_4105_device::write_dma_register(uint8_t data)
{
/*
- bit description
+ bit description
- 0
- 1
- 2
- 3
- 4
- 5 byte interrupt enable?
- 6 DMA/CPU mode (1=DMA, 0=CPU)?
- 7 error interrupt enable?
+ 0
+ 1
+ 2
+ 3
+ 4
+ 5 byte interrupt enable?
+ 6 DMA/CPU mode (1=DMA, 0=CPU)?
+ 7 error interrupt enable?
*/
@@ -255,7 +255,7 @@ void luxor_4105_device::write_sasi_data(uint8_t data)
{
m_data_out = data;
- if (!m_sasi->io_r())
+ if (!m_sasi->io_r())
{
m_sasi->write(data);
}
@@ -355,9 +355,9 @@ uint8_t luxor_4105_device::abcbus_stat()
2 BSY
3 I/O
4 0
- 5 DMA !O3
+ 5 DMA !O3
6 PREN
- 7 DMA request
+ 7 DMA request
*/
@@ -365,7 +365,7 @@ uint8_t luxor_4105_device::abcbus_stat()
data |= !m_sasi->cd_r() << 1;
data |= m_sasi->bsy_r() << 2;
data |= !m_sasi->io_r() << 3;
-
+
data |= !DMA_O3 << 5;
data |= !m_pren << 6;
data |= !m_drq << 7;
@@ -470,7 +470,7 @@ uint8_t luxor_4105_device::abcbus_tren()
m_req = m_sasi->req_r();
update_ack();
update_dma();
-
+
return data;
}
diff --git a/src/devices/cpu/gigatron/gigatron.cpp b/src/devices/cpu/gigatron/gigatron.cpp
index b40b03c08b7..5729a33633e 100644
--- a/src/devices/cpu/gigatron/gigatron.cpp
+++ b/src/devices/cpu/gigatron/gigatron.cpp
@@ -89,10 +89,10 @@ void gigatron_cpu_device::reset_cpu()
m_inReg = 0xff;
m_outx = 0;
m_out = 0;
-
+
m_out_cb(0, 0);
m_outx_cb(0, 0);
-
+
for(uint16_t i = 0; i < m_ramMask; i++)
gigatron_writemem8(i, floor(machine().rand() & 0xff));
}
diff --git a/src/devices/machine/e05a30.h b/src/devices/machine/e05a30.h
index 5dfb51ac81c..4cc88759ff5 100644
--- a/src/devices/machine/e05a30.h
+++ b/src/devices/machine/e05a30.h
@@ -39,7 +39,7 @@ public:
DECLARE_WRITE_LINE_MEMBER( centronics_input_data6 ) { if (state) m_centronics_data |= 0x40; else m_centronics_data &= ~0x40; }
DECLARE_WRITE_LINE_MEMBER( centronics_input_data7 ) { if (state) m_centronics_data |= 0x80; else m_centronics_data &= ~0x80; }
- int ready_led() { return !m_centronics_busy; }
+ int ready_led() { return !m_centronics_busy; }
protected:
// device-level overrides
diff --git a/src/devices/machine/pit8253.cpp b/src/devices/machine/pit8253.cpp
index f0f4450e90d..7d0d4246b67 100644
--- a/src/devices/machine/pit8253.cpp
+++ b/src/devices/machine/pit8253.cpp
@@ -201,7 +201,7 @@ void pit_counter_device::device_reset()
inline void pit_counter_device::adjust_timer(attotime target)
{
-// if (target != m_next_update)
+// if (target != m_next_update)
{
m_next_update = target;
m_updatetimer->adjust(target - machine().time());
diff --git a/src/devices/machine/pit8253.h b/src/devices/machine/pit8253.h
index a862dee8aad..c602a64a3d1 100644
--- a/src/devices/machine/pit8253.h
+++ b/src/devices/machine/pit8253.h
@@ -84,7 +84,7 @@ private:
// internal state
int m_index; // index number of the timer
double m_clockin; // input clock frequency in Hz
- attotime m_clock_period; // precomputed input clock period
+ attotime m_clock_period; // precomputed input clock period
int m_clock_signal; // clock signal when clockin is 0
attotime m_last_updated; // time when last updated
diff --git a/src/devices/sound/sp0250.cpp b/src/devices/sound/sp0250.cpp
index 594211548b3..a2476c9d521 100644
--- a/src/devices/sound/sp0250.cpp
+++ b/src/devices/sound/sp0250.cpp
@@ -241,7 +241,7 @@ int8_t sp0250_device::next()
// DAC 62 -> 33,32,33,32
// DAC 63 -> 33,33,33,32
m_pwm_counts = (((dac + 68 + 3) >> 2) << 0) +
- (((dac + 68 + 1) >> 2) << 8) +
+ (((dac + 68 + 1) >> 2) << 8) +
(((dac + 68 + 2) >> 2) << 16) +
(((dac + 68 + 0) >> 2) << 24);
diff --git a/src/devices/video/epic12.cpp b/src/devices/video/epic12.cpp
index ed23f2ebe88..e8368f8bac9 100644
--- a/src/devices/video/epic12.cpp
+++ b/src/devices/video/epic12.cpp
@@ -141,21 +141,21 @@ inline u16 epic12_device::COPY_NEXT_WORD(address_space &space, offs_t *addr)
}
/*
- Upload command
- This command uploads gfx data to VRAM, from Main CPU RAM.
-
- Offset Bits Description
- fedcba98 76543210
- 00 0010---- -------- 0x2 for upload
- ----0000 00000000 Fixed for upload?
- 02 00000000 00000000 ""
- 04 10011001 10011001 ""
- 06 10011001 10011001 ""
- 08 ---xxxxx xxxxxxxx Destination X start position
- 0a ----xxxx xxxxxxxx Destination Y start position
- 0c ---xxxxx xxxxxxxx Source Width
- 0e ----xxxx xxxxxxxx Source Height
- 10...10 + (Width * Height * 2) Source GFX data (ARGB1555 format)
+ Upload command
+ This command uploads gfx data to VRAM, from Main CPU RAM.
+
+ Offset Bits Description
+ fedcba98 76543210
+ 00 0010---- -------- 0x2 for upload
+ ----0000 00000000 Fixed for upload?
+ 02 00000000 00000000 ""
+ 04 10011001 10011001 ""
+ 06 10011001 10011001 ""
+ 08 ---xxxxx xxxxxxxx Destination X start position
+ 0a ----xxxx xxxxxxxx Destination Y start position
+ 0c ---xxxxx xxxxxxxx Source Width
+ 0e ----xxxx xxxxxxxx Source Height
+ 10...10 + (Width * Height * 2) Source GFX data (ARGB1555 format)
*/
inline void epic12_device::gfx_upload_shadow_copy(address_space &space, offs_t *addr)
@@ -319,38 +319,38 @@ const epic12_device::blitfunction epic12_device::f1_ti0_tr0_blit_funcs[64] =
/*
- Draw command
- This command draws gfx data.
-
- Offset Bits Description
- fedcba98 76543210
- 00 0001---- -------- 0x1 for draw
- ----x--- -------- Flip X
- -----x-- -------- Flip Y
- ------x- -------- Enable Blending
- -------x -------- Enable Transparent
- -------- -xxx---- Source Blending mode
- -------- -----xxx Destination Blending mode
- 02 xxxxxxxx -------- Source Alpha value
- -------- xxxxxxxx Destination Alpha value
- 04 ---xxxxx xxxxxxxx Source X start position
- 06 ----xxxx xxxxxxxx Source Y start position
- 08 sxxxxxxx xxxxxxxx Destination X start position
- 0a sxxxxxxx xxxxxxxx Destination Y start position
- 0c ---xxxxx xxxxxxxx Source Width
- 0e ----xxxx xxxxxxxx Source Height
- 10 -------- xxxxxxxx Source Red multiplication (0x80 = 100%)
- 12 xxxxxxxx -------- Source Green multiplication (0x80 = 100%)
- -------- xxxxxxxx Source Blue multiplication (0x80 = 100%)
-
- Blending mode (description from ibara test mode)
- 000 +alpha
- 001 +source
- 010 +destination
- 100 -alpha
- 101 -source
- 110 -destination
- others are reserved/disable?
+ Draw command
+ This command draws gfx data.
+
+ Offset Bits Description
+ fedcba98 76543210
+ 00 0001---- -------- 0x1 for draw
+ ----x--- -------- Flip X
+ -----x-- -------- Flip Y
+ ------x- -------- Enable Blending
+ -------x -------- Enable Transparent
+ -------- -xxx---- Source Blending mode
+ -------- -----xxx Destination Blending mode
+ 02 xxxxxxxx -------- Source Alpha value
+ -------- xxxxxxxx Destination Alpha value
+ 04 ---xxxxx xxxxxxxx Source X start position
+ 06 ----xxxx xxxxxxxx Source Y start position
+ 08 sxxxxxxx xxxxxxxx Destination X start position
+ 0a sxxxxxxx xxxxxxxx Destination Y start position
+ 0c ---xxxxx xxxxxxxx Source Width
+ 0e ----xxxx xxxxxxxx Source Height
+ 10 -------- xxxxxxxx Source Red multiplication (0x80 = 100%)
+ 12 xxxxxxxx -------- Source Green multiplication (0x80 = 100%)
+ -------- xxxxxxxx Source Blue multiplication (0x80 = 100%)
+
+ Blending mode (description from ibara test mode)
+ 000 +alpha
+ 001 +source
+ 010 +destination
+ 100 -alpha
+ 101 -source
+ 110 -destination
+ others are reserved/disable?
*/
inline void epic12_device::gfx_draw_shadow_copy(address_space &space, offs_t *addr)
diff --git a/src/emu/inputdev.cpp b/src/emu/inputdev.cpp
index 66480068a14..e29dfe39315 100644
--- a/src/emu/inputdev.cpp
+++ b/src/emu/inputdev.cpp
@@ -570,8 +570,7 @@ void input_class::remap_device_index(int oldindex, int newindex)
if (nullptr != m_device[newindex].get())
m_device[newindex]->set_devindex(newindex);
- // update the maximum index found, since newindex may
- // exceed current m_maxindex
+ // update the maximum index found, since newindex may exceed current m_maxindex
m_maxindex = std::max(m_maxindex, newindex);
}
diff --git a/src/emu/speaker.h b/src/emu/speaker.h
index 26896dd7e3f..7cf27d12471 100644
--- a/src/emu/speaker.h
+++ b/src/emu/speaker.h
@@ -83,9 +83,9 @@ protected:
// internal state
static constexpr int BUCKETS_PER_SECOND = 10;
- std::vector<s32> m_max_sample;
- s32 m_current_max;
- u32 m_samples_this_bucket;
+ std::vector<s32> m_max_sample;
+ s32 m_current_max;
+ u32 m_samples_this_bucket;
};
diff --git a/src/lib/netlist/macro/nlm_cd4xxx_lib.cpp b/src/lib/netlist/macro/nlm_cd4xxx_lib.cpp
index 492736d75ca..870348fc3a3 100644
--- a/src/lib/netlist/macro/nlm_cd4xxx_lib.cpp
+++ b/src/lib/netlist/macro/nlm_cd4xxx_lib.cpp
@@ -70,7 +70,7 @@ static NETLIST_START(CD4006_DIP)
A.D3, /* D3 |5 10| D3+4 */ A.D3P4,
A.D4, /* D4 |6 9| D4+5 */ A.D4P5,
A.VSS, /* VSS |7 8| D4+4 */ A.D4P4
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -95,15 +95,15 @@ NETLIST_END()
//- +---+---++---+
//-
static NETLIST_START(CD4011_DIP)
- CD4011_GATE(A)
- CD4011_GATE(B)
- CD4011_GATE(C)
- CD4011_GATE(D)
+ CD4011_GATE(A)
+ CD4011_GATE(B)
+ CD4011_GATE(C)
+ CD4011_GATE(D)
- NET_C(A.VDD, B.VDD, C.VDD, D.VDD)
- NET_C(A.VSS, B.VSS, C.VSS, D.VSS)
+ NET_C(A.VDD, B.VDD, C.VDD, D.VDD)
+ NET_C(A.VSS, B.VSS, C.VSS, D.VSS)
- DIPPINS( /* +--------------+ */
+ DIPPINS( /* +--------------+ */
A.A, /* A |1 ++ 14| VDD */ A.VDD,
A.B, /* B |2 13| H */ D.B,
A.Q, /* J |3 12| G */ D.A,
@@ -147,14 +147,14 @@ static NETLIST_START(CD4013_DIP)
NET_C(A.VSS, B.VSS)
DIPPINS( /* +--------------+ */
- A.Q, /* Q1 |1 ++ 14| VDD */ A.VDD,
+ A.Q, /* Q1 |1 ++ 14| VDD */ A.VDD,
A.QQ, /* Q1Q |2 13| Q2 */ B.Q,
A.CLOCK, /* CLOCK1 |3 12| Q2Q */ B.QQ,
A.RESET, /* RESET1 |4 4013 11| CLOCK2 */ B.CLOCK,
A.DATA, /* DATA1 |5 10| RESET2 */ B.RESET,
A.SET, /* SET1 |6 9| DATA2 */ B.DATA,
A.VSS, /* VSS |7 8| SET2 */ B.SET
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -547,7 +547,7 @@ static NETLIST_START(CD4538_DIP)
A.Q, /* 3S |6 11| 3Y */ B.B,
A.QQ, /* EQ |7 10| 3Z */ B.Q,
A.VSS, /* GND |8 9| VEE */ B.QQ
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
diff --git a/src/lib/netlist/macro/nlm_roms_lib.cpp b/src/lib/netlist/macro/nlm_roms_lib.cpp
index a28c3cec37b..a7e9ae06a0c 100644
--- a/src/lib/netlist/macro/nlm_roms_lib.cpp
+++ b/src/lib/netlist/macro/nlm_roms_lib.cpp
@@ -312,7 +312,7 @@ static NETLIST_START(TTL_82S16_DIP)
A.DOUTQ, /* DOUTQ |6 11| A7 */ A.A7,
A.A4, /* A4 |7 10| A6 */ A.A6,
A.GND, /* GND |8 9| A5 */ A.A5
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
diff --git a/src/lib/netlist/macro/nlm_ttl74xx_lib.cpp b/src/lib/netlist/macro/nlm_ttl74xx_lib.cpp
index 6ae3c8386ba..87c1a1d25b6 100644
--- a/src/lib/netlist/macro/nlm_ttl74xx_lib.cpp
+++ b/src/lib/netlist/macro/nlm_ttl74xx_lib.cpp
@@ -909,7 +909,7 @@ static NETLIST_START(TTL_7473_DIP)
B.CLK, /* CLK2 |5 10| K2 */ B.K,
B.CLRQ, /* CLR2 |6 9| Q2 */ B.Q,
B.J, /* J2 |7 8| QQ2 */ B.QQ
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -952,7 +952,7 @@ static NETLIST_START(TTL_7473A_DIP)
B.CLK, /* CLK2 |5 10| K2 */ B.K,
B.CLRQ, /* CLR2 |6 9| Q2 */ B.Q,
B.J, /* J2 |7 8| QQ2 */ B.QQ
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -995,7 +995,7 @@ static NETLIST_START(TTL_7474_DIP)
A.Q, /* Q1 |5 10| PR2 */ B.PREQ,
A.QQ, /* QQ1 |6 9| Q2 */ B.Q,
A.GND, /* GND |7 8| QQ2 */ B.QQ
- /* +-------------+ */
+ /* +-------------+ */
)
NETLIST_END()
@@ -1179,7 +1179,7 @@ static NETLIST_START(TTL_7485_DIP)
A.EQOUT, /* EQOUT |6 11| B1 */ A.B1,
A.LTOUT, /* LTOUT |7 10| A0 */ A.A0,
A.GND, /* GND |8 9| B0 */ A.B0
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -1416,7 +1416,7 @@ NETLIST_END()
A.VCC, /* VCC |5 10| GND */ A.GND,
NC.I, /* NC |6 9| QB */ A.QB,
NC.I, /* NC |7 8| QC */ A.QC
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -1437,15 +1437,15 @@ static NETLIST_START(TTL_7497_DIP)
TTL_7497(A)
DIPPINS( /* +--------------+ */
- A.B1, /* S1 |1 ++ 16| VCC */ A.VCC,
- A.B4, /* S4 |2 15| S3 */ A.B3,
- A.B5, /* S5 |3 14| S2 */ A.B2,
- A.B0, /* S0 |4 7497 13| MR */ A.CLR,
- A.ZQ, /* ZQ |5 12| EY */ A.UNITYQ,
- A.Y, /* Y |6 11| CEQ */ A.ENQ,
+ A.B1, /* S1 |1 ++ 16| VCC */ A.VCC,
+ A.B4, /* S4 |2 15| S3 */ A.B3,
+ A.B5, /* S5 |3 14| S2 */ A.B2,
+ A.B0, /* S0 |4 7497 13| MR */ A.CLR,
+ A.ZQ, /* ZQ |5 12| EY */ A.UNITYQ,
+ A.Y, /* Y |6 11| CEQ */ A.ENQ,
A.ENOUTQ, /* TCQ |7 10| EZQ */ A.STRBQ,
A.GND, /* GND |8 9| CP */ A.CLK
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -1572,7 +1572,7 @@ static NETLIST_START(TTL_74113_DIP)
A.Q, /* Q1 |5 10| PRQ2 */ B.SETQ,
A.QQ, /* QQ1 |6 9| Q2 */ B.Q,
A.GND, /* GND |7 8| QQ2 */ B.QQ
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -1615,7 +1615,7 @@ static NETLIST_START(TTL_74113A_DIP)
A.Q, /* Q1 |5 10| PRQ2 */ B.SETQ,
A.QQ, /* QQ1 |6 9| Q2 */ B.Q,
A.GND, /* GND |7 8| QQ2 */ B.QQ
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -1663,7 +1663,7 @@ static NETLIST_START(TTL_74121_DIP)
A.B, /* B |5 10| CEXT */ A.C,
A.Q, /* Q |6 9| RINT */ RINT.1,
A.GND, /* GND |7 8| NC */ NC.I
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -1702,15 +1702,15 @@ static NETLIST_START(TTL_74123_DIP)
NET_C(A.GND, B.GND)
DIPPINS( /* +--------------+ */
- A.A, /* A1 |1 ++ 16| VCC */ A.VCC,
- A.B, /* B1 |2 15| RC1 */ A.RC,
+ A.A, /* A1 |1 ++ 16| VCC */ A.VCC,
+ A.B, /* B1 |2 15| RC1 */ A.RC,
A.CLRQ, /* CLRQ1 |3 14| C1 */ A.C,
- A.QQ, /* QQ1 |4 74123 13| Q1 */ A.Q,
- B.Q, /* Q2 |5 12| QQ2 */ B.QQ,
- B.C, /* C2 |6 11| CLRQ */ B.CLRQ,
- B.RC, /* RC2 |7 10| B2 */ B.B,
+ A.QQ, /* QQ1 |4 74123 13| Q1 */ A.Q,
+ B.Q, /* Q2 |5 12| QQ2 */ B.QQ,
+ B.C, /* C2 |6 11| CLRQ */ B.CLRQ,
+ B.RC, /* RC2 |7 10| B2 */ B.B,
A.GND, /* GND |8 9| A2 */ B.A
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -2124,7 +2124,7 @@ static NETLIST_START(TTL_74161_DIP)
A.D, /* D |6 11| QD */ A.QD,
A.ENP, /* Enable P |7 10| Enable T */ A.ENT,
A.GND, /* GND |8 9| /LOAD */ A.LOADQ
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -2166,7 +2166,7 @@ static NETLIST_START(TTL_74163_DIP)
A.D, /* D |6 11| QD */ A.QD,
A.ENP, /* Enable P |7 10| Enable T */ A.ENT,
A.GND, /* GND |8 9| /LOAD */ A.LOADQ
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -2205,7 +2205,7 @@ static NETLIST_START(TTL_74164_DIP)
A.QC, /* QC |5 10| QE */ A.QE,
A.QD, /* QD |6 9| CLRQ */ A.CLRQ,
A.GND, /* GND |7 8| CLK */ A.CLK
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -2237,13 +2237,13 @@ static NETLIST_START(TTL_74165_DIP)
DIPPINS( /* +--------------+ */
A.SH_LDQ, /* PLQ |1 ++ 16| VCC */ A.VCC,
A.CLK, /* CP1 |2 15| CP2 */ A.CLKINH,
- A.E, /* P4 |3 14| P3 */ A.D,
- A.F, /* P5 |4 74165 13| P2 */ A.C,
- A.G, /* P6 |5 12| P1 */ A.B,
- A.H, /* P7 |6 11| P0 */ A.A,
+ A.E, /* P4 |3 14| P3 */ A.D,
+ A.F, /* P5 |4 74165 13| P2 */ A.C,
+ A.G, /* P6 |5 12| P1 */ A.B,
+ A.H, /* P7 |6 11| P0 */ A.A,
A.QHQ, /* QQ7 |7 10| DS */ A.SER,
A.GND, /* GND |8 9| Q7 */ A.QH
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -2282,14 +2282,14 @@ static NETLIST_START(TTL_74166_DIP)
DIPPINS( /* +--------------+ */
A.SER, /* SER |1 ++ 16| VCC */ A.VCC,
- A.A, /* A |2 15| SH/LDQ */ A.SH_LDQ,
- A.B, /* B |3 14| H */ A.H,
- A.C, /* C |4 74166 13| QH */ A.QH,
- A.D, /* D |5 12| G */ A.G,
+ A.A, /* A |2 15| SH/LDQ */ A.SH_LDQ,
+ A.B, /* B |3 14| H */ A.H,
+ A.C, /* C |4 74166 13| QH */ A.QH,
+ A.D, /* D |5 12| G */ A.G,
A.CLKINH, /* CLKINH |6 11| F */ A.F,
A.CLK, /* CLK |7 10| E */ A.E,
A.GND, /* GND |8 9| CLRQ */ A.CLRQ
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -2332,7 +2332,7 @@ static NETLIST_START(TTL_74174_DIP)
C.D, /* D3 |6 11| D4 */ D.D,
C.Q, /* Q3 |7 10| Q4 */ D.Q,
A.GND, /* GND |8 9| CLK */ A.CLK
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -2341,15 +2341,15 @@ static NETLIST_START(TTL_74175_DIP)
TTL_74175(A)
DIPPINS( /* +--------------+ */
- A.CLRQ, /* CLRQ |1 ++ 16| VCC */ A.VCC,
- A.Q1, /* Q1 |2 15| Q4 */ A.Q4,
- A.Q1Q, /* Q1Q |3 14| Q4Q */ A.Q4Q,
- A.D1, /* D1 |4 74175 13| D4 */ A.D4,
- A.D2, /* D2 |5 12| D3 */ A.D3,
- A.Q2Q, /* Q2Q |6 11| Q3Q */ A.Q3Q,
- A.Q2, /* Q2 |7 10| Q3 */ A.Q3,
- A.GND, /* GND |8 9| CLK */ A.CLK
- /* +--------------+ */
+ A.CLRQ, /* CLRQ |1 ++ 16| VCC */ A.VCC,
+ A.Q1, /* Q1 |2 15| Q4 */ A.Q4,
+ A.Q1Q, /* Q1Q |3 14| Q4Q */ A.Q4Q,
+ A.D1, /* D1 |4 74175 13| D4 */ A.D4,
+ A.D2, /* D2 |5 12| D3 */ A.D3,
+ A.Q2Q, /* Q2Q |6 11| Q3Q */ A.Q3Q,
+ A.Q2, /* Q2 |7 10| Q3 */ A.Q3,
+ A.GND, /* GND |8 9| CLK */ A.CLK
+ /* +--------------+ */
)
NETLIST_END()
@@ -2358,15 +2358,15 @@ static NETLIST_START(TTL_74192_DIP)
TTL_74192(A)
DIPPINS( /* +--------------+ */
- A.B, /* B |1 ++ 16| VCC */ A.VCC,
- A.QB, /* QB |2 15| A */ A.A,
- A.QA, /* QA |3 14| CLEAR */ A.CLEAR,
- A.CD, /* CD |4 74192 13| BORROWQ*/ A.BORROWQ,
- A.CU, /* CU |5 12| CARRYQ */ A.CARRYQ,
- A.QC, /* QC |6 11| LOADQ */ A.LOADQ,
- A.QD, /* QD |7 10| C */ A.C,
- A.GND, /* GND |8 9| D */ A.D
- /* +--------------+ */
+ A.B, /* B |1 ++ 16| VCC */ A.VCC,
+ A.QB, /* QB |2 15| A */ A.A,
+ A.QA, /* QA |3 14| CLEAR */ A.CLEAR,
+ A.CD, /* CD |4 74192 13| BORROWQ*/ A.BORROWQ,
+ A.CU, /* CU |5 12| CARRYQ */ A.CARRYQ,
+ A.QC, /* QC |6 11| LOADQ */ A.LOADQ,
+ A.QD, /* QD |7 10| C */ A.C,
+ A.GND, /* GND |8 9| D */ A.D
+ /* +--------------+ */
)
NETLIST_END()
@@ -2375,15 +2375,15 @@ static NETLIST_START(TTL_74193_DIP)
TTL_74193(A)
DIPPINS( /* +--------------+ */
- A.B, /* B |1 ++ 16| VCC */ A.VCC,
- A.QB, /* QB |2 15| A */ A.A,
- A.QA, /* QA |3 14| CLEAR */ A.CLEAR,
- A.CD, /* CD |4 74192 13| BORROWQ*/ A.BORROWQ,
- A.CU, /* CU |5 12| CARRYQ */ A.CARRYQ,
- A.QC, /* QC |6 11| LOADQ */ A.LOADQ,
- A.QD, /* QD |7 10| C */ A.C,
- A.GND, /* GND |8 9| D */ A.D
- /* +--------------+ */
+ A.B, /* B |1 ++ 16| VCC */ A.VCC,
+ A.QB, /* QB |2 15| A */ A.A,
+ A.QA, /* QA |3 14| CLEAR */ A.CLEAR,
+ A.CD, /* CD |4 74192 13| BORROWQ*/ A.BORROWQ,
+ A.CU, /* CU |5 12| CARRYQ */ A.CARRYQ,
+ A.QC, /* QC |6 11| LOADQ */ A.LOADQ,
+ A.QD, /* QD |7 10| C */ A.C,
+ A.GND, /* GND |8 9| D */ A.D
+ /* +--------------+ */
)
NETLIST_END()
@@ -2392,15 +2392,15 @@ static NETLIST_START(TTL_74194_DIP)
TTL_74194(A)
DIPPINS( /* +--------------+ */
- A.CLRQ, /* CLRQ |1 ++ 16| VCC */ A.VCC,
- A.SRIN, /* SRIN |2 15| QA */ A.QA,
- A.A, /* A |3 14| QB */ A.QB,
- A.B, /* B |4 74194 13| QC */ A.QC,
- A.C, /* C |5 12| QD */ A.QD,
- A.D, /* D |6 11| CLK */ A.CLK,
- A.SLIN, /* SLIN |7 10| S1 */ A.S1,
- A.GND, /* GND |8 9| S0 */ A.S0
- /* +--------------+ */
+ A.CLRQ, /* CLRQ |1 ++ 16| VCC */ A.VCC,
+ A.SRIN, /* SRIN |2 15| QA */ A.QA,
+ A.A, /* A |3 14| QB */ A.QB,
+ A.B, /* B |4 74194 13| QC */ A.QC,
+ A.C, /* C |5 12| QD */ A.QD,
+ A.D, /* D |6 11| CLK */ A.CLK,
+ A.SLIN, /* SLIN |7 10| S1 */ A.S1,
+ A.GND, /* GND |8 9| S0 */ A.S0
+ /* +--------------+ */
)
NETLIST_END()
@@ -2506,15 +2506,15 @@ static NETLIST_START(TTL_74365_DIP)
TTL_74365(A)
DIPPINS( /* +--------------+ */
- A.G1Q, /* G1Q |1 ++ 16| VCC */ A.VCC,
- A.A1, /* A1 |2 15| G2Q */ A.G2Q,
- A.Y1, /* Y1 |3 14| A6 */ A.A6,
- A.A2, /* A2 |4 74365 13| Y6 */ A.Y6,
- A.Y2, /* Y2 |5 12| A5 */ A.A5,
- A.A3, /* A3 |6 11| Y5 */ A.Y5,
- A.Y3, /* Y3 |7 10| A4 */ A.A4,
- A.GND, /* GND |8 9| Y4 */ A.Y4
- /* +--------------+ */
+ A.G1Q, /* G1Q |1 ++ 16| VCC */ A.VCC,
+ A.A1, /* A1 |2 15| G2Q */ A.G2Q,
+ A.Y1, /* Y1 |3 14| A6 */ A.A6,
+ A.A2, /* A2 |4 74365 13| Y6 */ A.Y6,
+ A.Y2, /* Y2 |5 12| A5 */ A.A5,
+ A.A3, /* A3 |6 11| Y5 */ A.Y5,
+ A.Y3, /* Y3 |7 10| A4 */ A.A4,
+ A.GND, /* GND |8 9| Y4 */ A.Y4
+ /* +--------------+ */
)
NETLIST_END()
@@ -2801,7 +2801,7 @@ static NETLIST_START(TTL_9310_DIP)
A.D, /* D |6 11| QD */ A.QD,
A.ENP, /* Enable P |7 10| Enable T */ A.ENT,
A.GND, /* GND |8 9| /LOAD */ A.LOADQ
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -2912,7 +2912,7 @@ static NETLIST_START(TTL_9316_DIP)
A.D, /* D |6 11| QD */ A.QD,
A.ENP, /* Enable P |7 10| Enable T */ A.ENT,
A.GND, /* GND |8 9| LOADQ */ A.LOADQ
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -2935,14 +2935,14 @@ static NETLIST_START(TTL_9322_DIP)
DIPPINS( /* +--------------+ */
A.SELECT, /* SELECT |1 ++ 16| VCC */ A.VCC,
- A.A1, /* A1 |2 15| STROBE */ A.STROBE,
- A.B1, /* B1 |3 14| A4 */ A.A4,
- A.Y1, /* Y1 |4 9322 13| B4 */ A.B4,
- A.A2, /* A2 |5 12| Y4 */ A.Y4,
- A.B2, /* B2 |6 11| A3 */ A.A3,
- A.Y2, /* Y2 |7 10| B3 */ A.B3,
- A.GND, /* GND |8 9| Y3 */ A.Y3
- /* +--------------+ */
+ A.A1, /* A1 |2 15| STROBE */ A.STROBE,
+ A.B1, /* B1 |3 14| A4 */ A.A4,
+ A.Y1, /* Y1 |4 9322 13| B4 */ A.B4,
+ A.A2, /* A2 |5 12| Y4 */ A.Y4,
+ A.B2, /* B2 |6 11| A3 */ A.A3,
+ A.Y2, /* Y2 |7 10| B3 */ A.B3,
+ A.GND, /* GND |8 9| Y3 */ A.Y3
+ /* +--------------+ */
)
NETLIST_END()
@@ -2960,15 +2960,15 @@ static NETLIST_START(TTL_9321_DIP)
NET_C(A.GND, B.GND)
DIPPINS( /* +--------------+ */
- A.E, /* /E |1 ++ 16| VCC */ A.VCC,
- A.A0, /* A0 |2 15| /E */ B.E,
- A.A1, /* A1 |3 14| A0 */ B.A0,
- A.D0, /* /D0 |4 9321 13| A1 */ B.A1,
- A.D1, /* /D1 |5 12| /D0 */ B.D0,
- A.D2, /* /D2 |6 11| /D1 */ B.D1,
- A.D3, /* /D3 |7 10| /D2 */ B.D2,
+ A.E, /* /E |1 ++ 16| VCC */ A.VCC,
+ A.A0, /* A0 |2 15| /E */ B.E,
+ A.A1, /* A1 |3 14| A0 */ B.A0,
+ A.D0, /* /D0 |4 9321 13| A1 */ B.A1,
+ A.D1, /* /D1 |5 12| /D0 */ B.D0,
+ A.D2, /* /D2 |6 11| /D1 */ B.D1,
+ A.D3, /* /D3 |7 10| /D2 */ B.D2,
A.GND, /* GND |8 9| /D3 */ B.D3
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -3017,7 +3017,7 @@ static NETLIST_START(TTL_9602_DIP)
A.Q, /* Q1 |6 11| A2 */ B.A,
A.QQ, /* QQ1 |7 10| Q2 */ B.Q,
A.GND, /* GND |8 9| QQ2 */ B.QQ
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
diff --git a/src/lib/netlist/plib/ppreprocessor.cpp b/src/lib/netlist/plib/ppreprocessor.cpp
index ccf03c97bc7..9daf9fa9836 100644
--- a/src/lib/netlist/plib/ppreprocessor.cpp
+++ b/src/lib/netlist/plib/ppreprocessor.cpp
@@ -519,7 +519,7 @@ namespace plib {
error("#elif without #if");
//if ((m_if_flag & (1 << m_if_level)) == 0)
- // m_if_flag ^= (1 << m_if_level);
+ // m_if_flag ^= (1 << m_if_level);
if (m_elif & (1 << m_if_level)) // elif disabled
m_if_flag |= (1 << m_if_level);
else
diff --git a/src/mame/audio/mw8080bw.cpp b/src/mame/audio/mw8080bw.cpp
index dbba34bfb95..55f8faedddf 100644
--- a/src/mame/audio/mw8080bw.cpp
+++ b/src/mame/audio/mw8080bw.cpp
@@ -3737,24 +3737,24 @@ void zzzap_common_audio_device::device_add_mconfig(machine_config &config)
.add_route(ALL_OUTPUTS, "mono", 1.0);
NETLIST_LOGIC_INPUT(config, "sound_nl:pedal_bit0",
- "I_PEDAL_BIT0", 0);
+ "I_PEDAL_BIT0", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:pedal_bit1",
- "I_PEDAL_BIT1", 0);
+ "I_PEDAL_BIT1", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:pedal_bit2",
- "I_PEDAL_BIT2", 0);
+ "I_PEDAL_BIT2", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:pedal_bit3",
- "I_PEDAL_BIT3", 0);
+ "I_PEDAL_BIT3", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:hi_shift",
- "I_HI_SHIFT", 0);
+ "I_HI_SHIFT", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:lo_shift",
- "I_LO_SHIFT", 0);
+ "I_LO_SHIFT", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:boom", "I_BOOM", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:engine_sound_off",
- "I_ENGINE_SOUND_OFF", 0);
+ "I_ENGINE_SOUND_OFF", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:noise_cr_1",
- "I_NOISE_CR_1", 0);
+ "I_NOISE_CR_1", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:noise_cr_2",
- "I_NOISE_CR_2", 0);
+ "I_NOISE_CR_2", 0);
// The audio output is taken from an LM3900 op-amp whose
// output has a peak-to-peak range of about 5 volts, centered
@@ -3786,13 +3786,13 @@ void zzzap_common_audio_device::device_start()
zzzap_audio_device::zzzap_audio_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) :
- zzzap_common_audio_device(mconfig, ZZZAP_AUDIO, tag, owner, clock, NETLIST_NAME(280zzzap))
+ zzzap_common_audio_device(mconfig, ZZZAP_AUDIO, tag, owner, clock, NETLIST_NAME(280zzzap))
{
}
lagunar_audio_device::lagunar_audio_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) :
- zzzap_common_audio_device(mconfig, LAGUNAR_AUDIO, tag, owner, clock, NETLIST_NAME(lagunar))
+ zzzap_common_audio_device(mconfig, LAGUNAR_AUDIO, tag, owner, clock, NETLIST_NAME(lagunar))
{
}
diff --git a/src/mame/audio/nl_astrob.cpp b/src/mame/audio/nl_astrob.cpp
index 90d3d6c98ed..2d5a5894c52 100644
--- a/src/mame/audio/nl_astrob.cpp
+++ b/src/mame/audio/nl_astrob.cpp
@@ -74,9 +74,9 @@ NETLIST_START(astrob)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 4e-5)
#if (SIMPLIFY_SONAR)
- PARAM(Solver.Solver_54.DYNAMIC_MIN_TIMESTEP, 7e-6) // gets rid of NR loops failure
+ PARAM(Solver.Solver_54.DYNAMIC_MIN_TIMESTEP, 7e-6) // gets rid of NR loops failure
#else
- PARAM(Solver.Solver_40.DYNAMIC_MIN_TIMESTEP, 7e-6) // gets rid of NR loops failure
+ PARAM(Solver.Solver_40.DYNAMIC_MIN_TIMESTEP, 7e-6) // gets rid of NR loops failure
#endif
#else
SOLVER(Solver, 48000)
@@ -171,7 +171,7 @@ NETLIST_START(astrob)
RES(R16, RES_K(10))
RES(R17, RES_K(10))
RES(R18, RES_M(2.7))
-// RES(R19, RES_K(1))
+// RES(R19, RES_K(1))
RES(R20, RES_M(1))
RES(R21, RES_K(100))
RES(R22, RES_K(470))
@@ -188,11 +188,11 @@ NETLIST_START(astrob)
RES(R33, RES_K(39))
RES(R34, RES_K(4.7))
RES(R35, RES_K(4.7))
- RES(R36, RES_K(100.1)) // part of SONAR circuit that relies on subtle part differences
- RES(R37, RES_K(1.51)) // part of SONAR circuit that relies on subtle part differences
- RES(R38, RES_K(330.1)) // part of SONAR circuit that relies on subtle part differences
- RES(R39, RES_K(10.1)) // part of SONAR circuit that relies on subtle part differences
- RES(R40, RES_K(68.1)) // part of SONAR circuit that relies on subtle part differences
+ RES(R36, RES_K(100.1)) // part of SONAR circuit that relies on subtle part differences
+ RES(R37, RES_K(1.51)) // part of SONAR circuit that relies on subtle part differences
+ RES(R38, RES_K(330.1)) // part of SONAR circuit that relies on subtle part differences
+ RES(R39, RES_K(10.1)) // part of SONAR circuit that relies on subtle part differences
+ RES(R40, RES_K(68.1)) // part of SONAR circuit that relies on subtle part differences
RES(R41, RES_K(10))
RES(R42, RES_K(100))
RES(R43, RES_K(470))
@@ -214,11 +214,11 @@ NETLIST_START(astrob)
RES(R59, RES_K(100))
RES(R60, RES_K(10))
RES(R61, RES_K(100))
- RES(R62, RES_K(99.9)) // part of SONAR circuit that relies on subtle part differences
- RES(R63, RES_K(1.49)) // part of SONAR circuit that relies on subtle part differences
- RES(R64, RES_K(329.9)) // part of SONAR circuit that relies on subtle part differences
- RES(R65, RES_K(9.9)) // part of SONAR circuit that relies on subtle part differences
- RES(R66, RES_K(67.9)) // part of SONAR circuit that relies on subtle part differences
+ RES(R62, RES_K(99.9)) // part of SONAR circuit that relies on subtle part differences
+ RES(R63, RES_K(1.49)) // part of SONAR circuit that relies on subtle part differences
+ RES(R64, RES_K(329.9)) // part of SONAR circuit that relies on subtle part differences
+ RES(R65, RES_K(9.9)) // part of SONAR circuit that relies on subtle part differences
+ RES(R66, RES_K(67.9)) // part of SONAR circuit that relies on subtle part differences
RES(R67, RES_K(10))
RES(R68, RES_K(82))
RES(R69, RES_K(470))
@@ -243,11 +243,11 @@ NETLIST_START(astrob)
RES(R88, RES_K(100))
RES(R89, RES_K(10))
RES(R90, RES_K(100))
- RES(R91, RES_K(100.2)) // part of SONAR circuit that relies on subtle part differences
- RES(R92, RES_K(1.52)) // part of SONAR circuit that relies on subtle part differences
- RES(R93, RES_K(330.2)) // part of SONAR circuit that relies on subtle part differences
- RES(R94, RES_K(10.2)) // part of SONAR circuit that relies on subtle part differences
- RES(R95, RES_K(68.2)) // part of SONAR circuit that relies on subtle part differences
+ RES(R91, RES_K(100.2)) // part of SONAR circuit that relies on subtle part differences
+ RES(R92, RES_K(1.52)) // part of SONAR circuit that relies on subtle part differences
+ RES(R93, RES_K(330.2)) // part of SONAR circuit that relies on subtle part differences
+ RES(R94, RES_K(10.2)) // part of SONAR circuit that relies on subtle part differences
+ RES(R95, RES_K(68.2)) // part of SONAR circuit that relies on subtle part differences
RES(R96, RES_K(10))
RES(R97, RES_K(4.7))
RES(R98, RES_M(1))
@@ -267,16 +267,16 @@ NETLIST_START(astrob)
RES(R112, RES_K(10))
RES(R113, RES_K(10))
RES(R114, 100)
-// RES(R115, RES_K(100)) -- part of final amp (not emulated)
-// RES(R116, RES_K(470)) -- part of final amp (not emulated)
+// RES(R115, RES_K(100)) -- part of final amp (not emulated)
+// RES(R116, RES_K(470)) -- part of final amp (not emulated)
RES(R117, RES_K(1))
RES(R118, RES_K(470))
RES(R119, RES_K(470))
RES(R120, RES_K(220))
RES(R121, RES_K(10))
RES(R122, RES_K(4.7))
-// RES(R123, RES_K(1)) -- part of final amp (not emulated)
-// RES(R124, RES_K(100)) -- part of final amp (not emulated)
+// RES(R123, RES_K(1)) -- part of final amp (not emulated)
+// RES(R124, RES_K(100)) -- part of final amp (not emulated)
RES(R125, RES_K(82))
RES(R126, RES_K(39))
RES(R127, RES_K(10))
@@ -287,16 +287,16 @@ NETLIST_START(astrob)
RES(R132, RES_K(82))
RES(R133, RES_K(100))
RES(R134, RES_M(2.7))
-// RES(R135, RES_K(22)) -- part of final amp (not emulated)
+// RES(R135, RES_K(22)) -- part of final amp (not emulated)
RES(R136, RES_K(1))
RES(R137, RES_K(4.7))
RES(R138, RES_M(2.2))
RES(R139, RES_K(4.7))
RES(R140, RES_K(4.7))
-// RES(R141, RES_K(22))
-// RES(R142, RES_M(1)) -- part of final amp (not emulated)
-// RES(R143, RES_K(22)) -- part of final amp (not emulated)
-// RES(R144, RES_K(22)) -- part of final amp (not emulated)
+// RES(R141, RES_K(22))
+// RES(R142, RES_M(1)) -- part of final amp (not emulated)
+// RES(R143, RES_K(22)) -- part of final amp (not emulated)
+// RES(R144, RES_K(22)) -- part of final amp (not emulated)
RES(R145, RES_K(4.7))
RES(R146, RES_K(100))
RES(R147, RES_M(2.2))
@@ -349,11 +349,11 @@ NETLIST_START(astrob)
CAP(C7, CAP_U(0.1))
CAP(C8, CAP_U(0.1))
CAP(C9, CAP_U(0.1))
-// CAP(C10, CAP_U(0.05))
-// CAP(C11, CAP_U(0.05))
+// CAP(C10, CAP_U(0.05))
+// CAP(C11, CAP_U(0.05))
CAP(C12, CAP_U(10))
-// CAP(C13, CAP_U(0.05))
-// CAP(C14, CAP_U(0.05))
+// CAP(C13, CAP_U(0.05))
+// CAP(C14, CAP_U(0.05))
CAP(C15, CAP_U(10))
CAP(C16, CAP_U(0.01))
CAP(C17, CAP_U(0.01))
@@ -368,8 +368,8 @@ NETLIST_START(astrob)
CAP(C26, CAP_U(0.022))
CAP(C27, CAP_U(10))
CAP(C28, CAP_U(0.05))
-// CAP(C29, CAP_U(0.05))
-// CAP(C30, CAP_U(0.05))
+// CAP(C29, CAP_U(0.05))
+// CAP(C30, CAP_U(0.05))
CAP(C31, CAP_U(0.0047))
CAP(C32, CAP_U(0.05))
CAP(C33, CAP_U(10))
@@ -381,23 +381,23 @@ NETLIST_START(astrob)
CAP(C39, CAP_U(0.1))
CAP(C40, CAP_U(0.01))
CAP(C41, CAP_U(0.01))
-// CAP(C42, CAP_U(0.001))
-// CAP(C43, CAP_U(10))
-// CAP(C44, CAP_U(0.001))
-// CAP(C45, CAP_U(0.001))
-// CAP(C46, CAP_U(10))
+// CAP(C42, CAP_U(0.001))
+// CAP(C43, CAP_U(10))
+// CAP(C44, CAP_U(0.001))
+// CAP(C45, CAP_U(0.001))
+// CAP(C46, CAP_U(10))
CAP(C47, CAP_U(4.7))
-// CAP(C48, CAP_U(22)) -- part of final amp (not emulated)
+// CAP(C48, CAP_U(22)) -- part of final amp (not emulated)
CAP(C49, CAP_U(0.05))
CAP(C50, CAP_U(0.05))
CAP(C51, CAP_U(0.05))
CAP(C52, CAP_U(0.05))
CAP(C53, CAP_U(0.1))
-// CAP(C54, CAP_U(0.05))
+// CAP(C54, CAP_U(0.05))
CAP(C55, CAP_U(0.05))
CAP(C56, CAP_U(10))
CAP(C57, CAP_U(0.1))
-// CAP(C58, CAP_U(4.7)) -- part of final amp (not emulated)
+// CAP(C58, CAP_U(4.7)) -- part of final amp (not emulated)
CAP(C59, CAP_U(0.33))
CAP(C60, CAP_U(4.7))
CAP(C61, CAP_U(4.7))
@@ -405,20 +405,20 @@ NETLIST_START(astrob)
CAP(C63, CAP_U(0.1))
CAP(C64, CAP_U(0.1))
CAP(C65, CAP_U(0.01))
-// CAP(C66, CAP_U(0.05))
+// CAP(C66, CAP_U(0.05))
CAP(C67, CAP_U(0.05))
CAP(C68, CAP_U(0.0047))
CAP(C69, CAP_U(4.7))
CAP(C70, CAP_U(0.1))
CAP(C71, CAP_U(0.022))
CAP(C72, CAP_U(0.05))
-// CAP(C73, CAP_U(0.05))
+// CAP(C73, CAP_U(0.05))
CAP(C74, CAP_U(0.05))
CAP(C75, CAP_U(0.05))
CAP(C76, CAP_U(0.022))
CAP(C77, CAP_U(0.0047))
CAP(C78, CAP_U(0.1))
-// CAP(C79, CAP_U(0.05))
+// CAP(C79, CAP_U(0.05))
CAP(C80, CAP_U(4.7))
CAP(C81, CAP_U(0.05))
CAP(C82, CAP_U(0.1))
@@ -435,7 +435,7 @@ NETLIST_START(astrob)
D_1N5231(D10)
D_1N914(D11)
D_1N914(D12)
-// D_1N914(D13) -- part of final amp (not emulated)
+// D_1N914(D13) -- part of final amp (not emulated)
D_1N914(D14)
D_1N914(D15)
D_1N914(D16)
@@ -466,138 +466,138 @@ NETLIST_START(astrob)
Q_2N4403(Q9)
Q_2N4403(Q10)
- TL084_DIP(U1) // Op. Amp.
+ TL084_DIP(U1) // Op. Amp.
NET_C(U1.4, I_V12)
NET_C(U1.11, I_VM12)
- TL084_DIP(U2) // Op. Amp.
+ TL084_DIP(U2) // Op. Amp.
NET_C(U2.4, I_V12)
NET_C(U2.11, I_VM12)
- CD4017_DIP(U3) // Decade Counter/Divider
+ CD4017_DIP(U3) // Decade Counter/Divider
NET_C(U3.8, GND)
NET_C(U3.16, I_V12)
- NE555_DIP(U4) // Timer
+ NE555_DIP(U4) // Timer
- NE555_DIP(U5) // Timer
+ NE555_DIP(U5) // Timer
- NE555_DIP(U6) // Timer
+ NE555_DIP(U6) // Timer
- TL084_DIP(U7) // Op. Amp.
+ TL084_DIP(U7) // Op. Amp.
NET_C(U7.4, I_V12)
NET_C(U7.11, I_VM12)
- MM5837_DIP(U8) // Noise Generator
+ MM5837_DIP(U8) // Noise Generator
#if (UNDERCLOCK_NOISE_GEN)
// officially runs at 48-112kHz, but little noticeable difference
// in exchange for a big performance boost
PARAM(U8.FREQ, 12000)
#endif
- CD4011_DIP(U9) // Quad 2-Input NAND Gates
+ CD4011_DIP(U9) // Quad 2-Input NAND Gates
NET_C(U9.7, GND)
NET_C(U9.14, I_V12)
- CD4011_DIP(U10) // Quad 2-Input NAND Gates
+ CD4011_DIP(U10) // Quad 2-Input NAND Gates
NET_C(U10.7, GND)
NET_C(U10.14, I_V12)
- CD4011_DIP(U11) // Quad 2-Input NAND Gates
+ CD4011_DIP(U11) // Quad 2-Input NAND Gates
NET_C(U11.7, GND)
NET_C(U11.14, I_V12)
- CD4024_DIP(U12) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U12) // 7-Stage Ripple Binary Counter
NET_C(U12.7, GND)
NET_C(U12.14, I_V12)
- NE555_DIP(U13) // Timer
+ NE555_DIP(U13) // Timer
- CD4024_DIP(U14) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U14) // 7-Stage Ripple Binary Counter
NET_C(U14.7, GND)
NET_C(U14.14, I_V12)
- CD4017_DIP(U15) // Decade Counter/Divider
+ CD4017_DIP(U15) // Decade Counter/Divider
NET_C(U15.8, GND)
NET_C(U15.16, I_V12)
- TL084_DIP(U16) // Op. Amp.
+ TL084_DIP(U16) // Op. Amp.
NET_C(U16.4, I_V12)
NET_C(U16.11, I_VM12)
- NE555_DIP(U17) // Timer
+ NE555_DIP(U17) // Timer
- NE555_DIP(U18) // Timer
+ NE555_DIP(U18) // Timer
- CD4024_DIP(U19) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U19) // 7-Stage Ripple Binary Counter
NET_C(U19.7, GND)
NET_C(U19.14, I_V12)
- NE555_DIP(U20) // Timer
+ NE555_DIP(U20) // Timer
- CD4011_DIP(U21) // Quad 2-Input NAND Gates
+ CD4011_DIP(U21) // Quad 2-Input NAND Gates
NET_C(U21.7, GND)
NET_C(U21.14, I_V12)
- TL084_DIP(U22) // Op. Amp.
+ TL084_DIP(U22) // Op. Amp.
NET_C(U22.4, I_V12)
NET_C(U22.11, I_VM12)
- NE555_DIP(U23) // Timer
+ NE555_DIP(U23) // Timer
- NE555_DIP(U24) // Timer
+ NE555_DIP(U24) // Timer
- CD4011_DIP(U25) // Quad 2-Input NAND Gates
+ CD4011_DIP(U25) // Quad 2-Input NAND Gates
NET_C(U25.7, GND)
NET_C(U25.14, I_V12)
- TTL_7407_DIP(U26) // Hex Buffers with High Votage Open-Collector Outputs
- NET_C(U26.7, GND)
- NET_C(U26.14, I_V5)
+ TTL_7407_DIP(U26) // Hex Buffers with High Votage Open-Collector Outputs
+ NET_C(U26.7, GND)
+ NET_C(U26.14, I_V5)
- CD4011_DIP(U27) // Quad 2-Input NAND Gates
+ CD4011_DIP(U27) // Quad 2-Input NAND Gates
NET_C(U27.7, GND)
NET_C(U27.14, I_V12)
- CD4024_DIP(U28) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U28) // 7-Stage Ripple Binary Counter
NET_C(U28.7, GND)
NET_C(U28.14, I_V12)
- TTL_7407_DIP(U29) // Hex Buffers with High Votage Open-Collector Outputs
- NET_C(U29.7, GND)
- NET_C(U29.14, I_V5)
+ TTL_7407_DIP(U29) // Hex Buffers with High Votage Open-Collector Outputs
+ NET_C(U29.7, GND)
+ NET_C(U29.14, I_V5)
- TTL_7406_DIP(U30) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(U30) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(U30.7, GND)
NET_C(U30.14, I_V5)
- TTL_7406_DIP(U31) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(U31) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(U31.7, GND)
NET_C(U31.14, I_V5)
-// TTL_74LS374_DIP(U32) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
-// NET_C(U32.10, GND)
-// NET_C(U32.20, I_V5)
+// TTL_74LS374_DIP(U32) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
+// NET_C(U32.10, GND)
+// NET_C(U32.20, I_V5)
-// TTL_74LS374_DIP(U33) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
-// NET_C(U33.10, GND)
-// NET_C(U33.20, I_V5)
+// TTL_74LS374_DIP(U33) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
+// NET_C(U33.10, GND)
+// NET_C(U33.20, I_V5)
-// TTL_74LS00_DIP(U34) // Quad 4-Input NAND Gate
+// TTL_74LS00_DIP(U34) // Quad 4-Input NAND Gate
// NET_C(U34.7, GND)
// NET_C(U34.14, I_V5)
-// TTL_74LS30_DIP(U35) // 8-Input NAND Gate
-// NET_C(U35.7, GND)
-// NET_C(U35.14, I_V5)
+// TTL_74LS30_DIP(U35) // 8-Input NAND Gate
+// NET_C(U35.7, GND)
+// NET_C(U35.14, I_V5)
-// TTL_74LS04_DIP(U36) // Hex Inverting Gates
-// NET_C(U36.7, GND)
-// NET_C(U36.14, I_V5)
+// TTL_74LS04_DIP(U36) // Hex Inverting Gates
+// NET_C(U36.7, GND)
+// NET_C(U36.14, I_V5)
- NE555_DIP(U37) // Timer
+ NE555_DIP(U37) // Timer
- NE555_DIP(U38) // Timer
+ NE555_DIP(U38) // Timer
//
// Sheet 7, top-left (SONAR)
@@ -722,8 +722,8 @@ NETLIST_START(astrob)
VARCLOCK(LASER1CLK, 1, "max(0.000001,min(0.1,(0.0000000343262*A0*A0*A0*A0*A0) - (0.00000096054*A0*A0*A0*A0) + (0.0000105481*A0*A0*A0) - (0.0000561978*A0*A0) + (0.000148191*A0) - 0.000131018))")
NET_C(LASER1CLK.GND, GND)
NET_C(LASER1CLK.VCC, I_V12)
- NET_C(LASER1CLK.A0, Q10.E)
- NET_C(LASER1CLK.Q, LASER1ENV.A1)
+ NET_C(LASER1CLK.A0, Q10.E)
+ NET_C(LASER1CLK.Q, LASER1ENV.A1)
AFUNC(LASER1ENV, 2, "if(A0>6,A1,0)")
NET_C(LASER1ENV.A0, U25.10)
NET_C(LASER1ENV.Q, U19.1)
@@ -774,8 +774,8 @@ NETLIST_START(astrob)
VARCLOCK(LASER2CLK, 1, "max(0.000001,min(0.1,(0.0000000153499*A0*A0*A0*A0*A0) - (0.000000433800*A0*A0*A0*A0) + (0.00000480504*A0*A0*A0) - (0.0000257871*A0*A0) + (0.000068467*A0) - 0.0000608574))")
NET_C(LASER2CLK.GND, GND)
NET_C(LASER2CLK.VCC, I_V12)
- NET_C(LASER2CLK.A0, Q9.E)
- NET_C(LASER2CLK.Q, LASER2ENV.A1)
+ NET_C(LASER2CLK.A0, Q9.E)
+ NET_C(LASER2CLK.Q, LASER2ENV.A1)
AFUNC(LASER2ENV, 2, "if(A0>6,A1,0)")
NET_C(LASER2ENV.A0, U25.11)
NET_C(LASER2ENV.Q, U14.1)
@@ -916,7 +916,7 @@ NETLIST_START(astrob)
NET_C(C80.2, GND)
NET_C(R180.2, U16.9, R179.1)
NET_C(R179.2, U16.8, R177.1)
- NET_C(R181.2, U16.10, Q6.D, D26.K) // D and S swapped on schematics???
+ NET_C(R181.2, U16.10, Q6.D, D26.K) // D and S swapped on schematics???
NET_C(Q6.G, C72.2, R151.2, Q5.G)
NET_C(R151.1, GND)
NET_C(C72.1, U8.3)
@@ -960,7 +960,7 @@ NETLIST_START(astrob)
NET_C(I_ASTROIDS, R97.1, R174.1, R175.1)
NET_C(R97.2, I_V12)
NET_C(R174.2, U16.13, R173.1)
- NET_C(R175.2, U16.12, Q5.D, D25.K) // D and S swapped on schematics???
+ NET_C(R175.2, U16.12, Q5.D, D25.K) // D and S swapped on schematics???
NET_C(D25.A, Q5.S, GND)
NET_C(R173.2, U16.14, R172.1)
NET_C(R172.2, R150.1, C70.1)
@@ -992,7 +992,7 @@ NETLIST_START(astrob)
NET_C(MUTEFUNC.A0, I_MUTE)
NET_C(MUTEFUNC.A1, R121.2)
ALIAS(OUTPUT, MUTEFUNC.Q)
-// ALIAS(OUTPUT, C55.2)
+// ALIAS(OUTPUT, C55.2)
//
// Sheet 8, middle-top (INVADER_1)
@@ -1154,7 +1154,7 @@ NETLIST_START(astrob)
OPTIMIZE_FRONTIER(INVADER_4, RES_M(1), RXX)
OPTIMIZE_FRONTIER(C50.1, RES_M(10), RXX)
- OPTIMIZE_FRONTIER(C60.1, RES_M(10), RXX) // this is a big one
+ OPTIMIZE_FRONTIER(C60.1, RES_M(10), RXX) // this is a big one
OPTIMIZE_FRONTIER(C61.1, RES_M(10), RXX)
#endif
diff --git a/src/mame/audio/nl_carpolo.cpp b/src/mame/audio/nl_carpolo.cpp
index e135227c69b..cef3eb79346 100644
--- a/src/mame/audio/nl_carpolo.cpp
+++ b/src/mame/audio/nl_carpolo.cpp
@@ -81,10 +81,10 @@ NETLIST_START(carpolo)
ANALOG_INPUT(V5, 5)
ALIAS(VCC, V5)
- TTL_INPUT(PL1_CRASH, 1) // active high
- TTL_INPUT(PL2_CRASH, 0) // active high
- TTL_INPUT(PL3_CRASH, 0) // active high
- TTL_INPUT(PL4_CRASH, 0) // active high
+ TTL_INPUT(PL1_CRASH, 1) // active high
+ TTL_INPUT(PL2_CRASH, 0) // active high
+ TTL_INPUT(PL3_CRASH, 0) // active high
+ TTL_INPUT(PL4_CRASH, 0) // active high
LOCAL_SOURCE(PLAYER_CRASH)
diff --git a/src/mame/audio/nl_elim.cpp b/src/mame/audio/nl_elim.cpp
index 1727de5c46f..147441f3a6f 100644
--- a/src/mame/audio/nl_elim.cpp
+++ b/src/mame/audio/nl_elim.cpp
@@ -96,14 +96,14 @@ NETLIST_END()
// once for Zektor
//
-#define VARIANT_ELIMINATOR 0
-#define VARIANT_ZEKTOR 1
+#define VARIANT_ELIMINATOR 0
+#define VARIANT_ZEKTOR 1
-#define SOUND_VARIANT (VARIANT_ELIMINATOR)
+#define SOUND_VARIANT (VARIANT_ELIMINATOR)
#include "nl_elim.cpp"
#undef SOUND_VARIANT
-#define SOUND_VARIANT (VARIANT_ZEKTOR)
+#define SOUND_VARIANT (VARIANT_ZEKTOR)
#include "nl_elim.cpp"
@@ -131,7 +131,7 @@ NETLIST_START(zektor)
LOCAL_SOURCE(_CA3080_FAST_DIP)
-// TTL_INPUT(I_LO_D0, 0)
+// TTL_INPUT(I_LO_D0, 0)
TTL_INPUT(I_LO_D1, 0)
ALIAS(I_FIREBALL, I_LO_D1)
TTL_INPUT(I_LO_D2, 0)
@@ -193,14 +193,14 @@ NETLIST_START(zektor)
// C46 0.022uF 0.047uF
//
-// RES(R1, RES_K(100)) -- part of final amp (not emulated)
-// RES(R2, RES_M(1)) -- part of final amp (not emulated)
-// RES(R3, RES_K(22)) -- part of final amp (not emulated)
-// RES(R4, RES_K(2.2)) -- part of final amp (not emulated)
+// RES(R1, RES_K(100)) -- part of final amp (not emulated)
+// RES(R2, RES_M(1)) -- part of final amp (not emulated)
+// RES(R3, RES_K(22)) -- part of final amp (not emulated)
+// RES(R4, RES_K(2.2)) -- part of final amp (not emulated)
#if (SOUND_VARIANT == VARIANT_ELIMINATOR)
-// RES(R5, RES_K(10)) -- part of final amp (not emulated)
+// RES(R5, RES_K(10)) -- part of final amp (not emulated)
#else // (SOUND_VARIANT == VARIANT_ZEKTOR)
-// RES(R5, RES_K(4.7)) -- part of final amp (not emulated)
+// RES(R5, RES_K(4.7)) -- part of final amp (not emulated)
#endif
RES(R6, RES_K(220))
RES(R7, RES_K(220))
@@ -211,9 +211,9 @@ NETLIST_START(zektor)
RES(R9, RES_K(12))
#endif
RES(R10, RES_K(10))
-// RES(R11, RES_K(2.2)) -- part of final amp (not emulated)
-// RES(R12, RES_M(1)) -- part of final amp (not emulated)
-// RES(R13, RES_K(330)) -- part of final amp (not emulated)
+// RES(R11, RES_K(2.2)) -- part of final amp (not emulated)
+// RES(R12, RES_M(1)) -- part of final amp (not emulated)
+// RES(R13, RES_K(330)) -- part of final amp (not emulated)
RES(R14, RES_K(470))
RES(R15, RES_K(100))
RES(R16, RES_K(100))
@@ -363,10 +363,10 @@ NETLIST_START(zektor)
RES(R146, RES_K(22))
RES(R147, RES_K(2.2))
-// CAP(C1, CAP_U(4.7)) -- part of final amp (not emulated)
-// CAP(C2, CAP_U(0.1))
-// CAP(C3, CAP_U(0.1))
-// CAP(C4, CAP_U(10)) -- part of final amp (not emulated)
+// CAP(C1, CAP_U(4.7)) -- part of final amp (not emulated)
+// CAP(C2, CAP_U(0.1))
+// CAP(C3, CAP_U(0.1))
+// CAP(C4, CAP_U(10)) -- part of final amp (not emulated)
CAP(C5, CAP_U(0.1))
CAP(C6, CAP_U(0.1))
CAP(C7, CAP_U(0.001))
@@ -388,17 +388,17 @@ NETLIST_START(zektor)
CAP(C19, CAP_U(0.068))
CAP(C20, CAP_U(0.068))
CAP(C21, CAP_U(2.2))
-// CAP(C22, CAP_U(0.1))
-// CAP(C23, CAP_U(0.1))
-// CAP(C24, CAP_U(0.1))
-// CAP(C25, CAP_U(0.1))
-// CAP(C26, CAP_U(0.1))
-// CAP(C27, CAP_U(0.1))
+// CAP(C22, CAP_U(0.1))
+// CAP(C23, CAP_U(0.1))
+// CAP(C24, CAP_U(0.1))
+// CAP(C25, CAP_U(0.1))
+// CAP(C26, CAP_U(0.1))
+// CAP(C27, CAP_U(0.1))
CAP(C28, CAP_U(0.1))
CAP(C29, CAP_U(0.1))
CAP(C30, CAP_U(0.022))
-// CAP(C31, CAP_U(0.1))
-// CAP(C32, CAP_U(0.1))
+// CAP(C31, CAP_U(0.1))
+// CAP(C32, CAP_U(0.1))
CAP(C33, CAP_U(0.1))
CAP(C34, CAP_U(0.1))
CAP(C35, CAP_U(1))
@@ -406,8 +406,8 @@ NETLIST_START(zektor)
CAP(C37, CAP_U(10))
CAP(C38, CAP_U(4.7))
CAP(C39, CAP_U(0.1))
-// CAP(C40, CAP_U(0.1))
-// CAP(C41, CAP_U(0.1))
+// CAP(C40, CAP_U(0.1))
+// CAP(C41, CAP_U(0.1))
// C42??
CAP(C43, CAP_U(0.033))
CAP(C44, CAP_U(0.1))
@@ -432,7 +432,7 @@ NETLIST_START(zektor)
CAP(C59, CAP_U(0.1))
CAP(C60, CAP_U(0.001))
CAP(C61, CAP_U(0.068))
-// CAP(C62, CAP_U(0.1))
+// CAP(C62, CAP_U(0.1))
CAP(C63, CAP_P(100))
CAP(C64, CAP_U(0.1))
CAP(C65, CAP_U(0.01))
@@ -440,11 +440,11 @@ NETLIST_START(zektor)
CAP(C67, CAP_U(0.047))
CAP(C68, CAP_U(0.01))
CAP(C69, CAP_U(0.1))
-// CAP(C70, CAP_U(0.1))
-// CAP(C71, CAP_U(0.1))
-// CAP(C72, CAP_U(0.1))
-// CAP(C73, CAP_U(10))
-// CAP(C74, CAP_U(0.1))
+// CAP(C70, CAP_U(0.1))
+// CAP(C71, CAP_U(0.1))
+// CAP(C72, CAP_U(0.1))
+// CAP(C73, CAP_U(10))
+// CAP(C74, CAP_U(0.1))
CAP(C75, CAP_U(0.1))
CAP(C76, CAP_U(0.1))
CAP(C77, CAP_U(0.1))
@@ -458,7 +458,7 @@ NETLIST_START(zektor)
D_1N914(D7)
D_1N4002(D8)
-// Q_2N4093(Q1) -- part of final amp (not emulated)
+// Q_2N4093(Q1) -- part of final amp (not emulated)
Q_2N4403(Q2)
Q_2N4403(Q3)
Q_2N4403(Q4)
@@ -470,164 +470,164 @@ NETLIST_START(zektor)
Q_2N4403(Q10)
Q_2N4403(Q11)
- TL081_DIP(U1) // Op. Amp.
+ TL081_DIP(U1) // Op. Amp.
NET_C(U1.7, I_V12)
NET_C(U1.4, I_VM12)
-// TL082_DIP(U2) // Op. Amp. -- part of final amp (not emulated)
-// NET_C(U2.8, I_V12)
-// NET_C(U2.4, I_VM12)
+// TL082_DIP(U2) // Op. Amp. -- part of final amp (not emulated)
+// NET_C(U2.8, I_V12)
+// NET_C(U2.4, I_VM12)
- TL081_DIP(U3) // Op. Amp.
+ TL081_DIP(U3) // Op. Amp.
NET_C(U3.7, I_V12)
NET_C(U3.4, I_VM12)
- MM5837_DIP(U4) // Noise Generator
+ MM5837_DIP(U4) // Noise Generator
#if (UNDERCLOCK_NOISE_GEN)
PARAM(U4.FREQ, 24000)
#endif
- LM555_DIP(U5) // Timer
+ LM555_DIP(U5) // Timer
- CA3080_DIP(U6) // Op. Amp.
+ CA3080_DIP(U6) // Op. Amp.
NET_C(U6.4, I_VM12)
NET_C(U6.7, I_V12)
- CA3080_DIP(U7) // Op. Amp.
+ CA3080_DIP(U7) // Op. Amp.
NET_C(U7.4, I_VM12)
NET_C(U7.7, I_V12)
- CA3080_DIP(U8) // Op. Amp.
+ CA3080_DIP(U8) // Op. Amp.
NET_C(U8.4, I_VM12)
NET_C(U8.7, I_V12)
- CA3080_DIP(U9) // Op. Amp.
+ CA3080_DIP(U9) // Op. Amp.
NET_C(U9.4, I_VM12)
NET_C(U9.7, I_V12)
- CA3080_DIP(U10) // Op. Amp.
+ CA3080_DIP(U10) // Op. Amp.
NET_C(U10.4, I_VM12)
NET_C(U10.7, I_V12)
- CA3080_DIP(U11) // Op. Amp.
+ CA3080_DIP(U11) // Op. Amp.
NET_C(U11.4, I_VM12)
NET_C(U11.7, I_V12)
- TL081_DIP(U12) // Op. Amp.
+ TL081_DIP(U12) // Op. Amp.
NET_C(U12.7, I_V12)
NET_C(U12.4, I_VM12)
- LM555_DIP(U13) // Timer
+ LM555_DIP(U13) // Timer
- CA3080_DIP(U14) // Op. Amp.
+ CA3080_DIP(U14) // Op. Amp.
NET_C(U14.4, I_VM12)
NET_C(U14.7, I_V12)
- CA3080_DIP(U15) // Op. Amp.
+ CA3080_DIP(U15) // Op. Amp.
NET_C(U15.4, I_VM12)
NET_C(U15.7, I_V12)
- TL082_DIP(U16) // Op. Amp.
+ TL082_DIP(U16) // Op. Amp.
NET_C(U16.8, I_V12)
NET_C(U16.4, I_VM12)
- CD4011_DIP(U17) // Quad 2-Input NAND Gates
+ CD4011_DIP(U17) // Quad 2-Input NAND Gates
NET_C(U17.7, GND)
NET_C(U17.14, I_V12)
- CD4011_DIP(U18) // Quad 2-Input NAND Gates
+ CD4011_DIP(U18) // Quad 2-Input NAND Gates
NET_C(U18.7, GND)
NET_C(U18.14, I_V12)
- CD4011_DIP(U19) // Quad 2-Input NAND Gates
+ CD4011_DIP(U19) // Quad 2-Input NAND Gates
NET_C(U19.7, GND)
NET_C(U19.14, I_V12)
- TL082_DIP(U20) // Op. Amp.
+ TL082_DIP(U20) // Op. Amp.
NET_C(U20.8, I_V12)
NET_C(U20.4, I_VM12)
- CD4024_DIP(U21) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U21) // 7-Stage Ripple Binary Counter
NET_C(U21.7, GND)
NET_C(U21.14, I_V12)
- CD4011_DIP(U22) // Quad 2-Input NAND Gates
+ CD4011_DIP(U22) // Quad 2-Input NAND Gates
NET_C(U22.7, GND)
NET_C(U22.14, I_V12)
- CD4024_DIP(U23) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U23) // 7-Stage Ripple Binary Counter
NET_C(U23.7, GND)
NET_C(U23.14, I_V12)
- TTL_7406_DIP(U24) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(U24) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(U24.7, GND)
NET_C(U24.14, I_V5)
#if (!HLE_BACKGROUND_VCO)
- LM566_DIP(U25) // Voltage-Controlled Oscillator
+ LM566_DIP(U25) // Voltage-Controlled Oscillator
#endif
- TTL_74LS00_DIP(U26) // Quad 4-Input NAND Gate
- NET_C(U26.7, GND)
- NET_C(U26.14, I_V5)
+ TTL_74LS00_DIP(U26) // Quad 4-Input NAND Gate
+ NET_C(U26.7, GND)
+ NET_C(U26.14, I_V5)
- TTL_7407_DIP(U27) // Hex Buffers with High Votage Open-Collector Outputs
- NET_C(U27.7, GND)
- NET_C(U27.14, I_V5)
+ TTL_7407_DIP(U27) // Hex Buffers with High Votage Open-Collector Outputs
+ NET_C(U27.7, GND)
+ NET_C(U27.14, I_V5)
- TTL_7407_DIP(U28) // Hex Buffers with High Votage Open-Collector Outputs
- NET_C(U28.7, GND)
- NET_C(U28.14, I_V5)
+ TTL_7407_DIP(U28) // Hex Buffers with High Votage Open-Collector Outputs
+ NET_C(U28.7, GND)
+ NET_C(U28.14, I_V5)
- TL081_DIP(U29) // Op. Amp.
+ TL081_DIP(U29) // Op. Amp.
NET_C(U29.7, I_V12)
NET_C(U29.4, I_VM12)
-// AY_3_8912_DIP(U30) // PSG -- emulated by MAME
+// AY_3_8912_DIP(U30) // PSG -- emulated by MAME
- CD4069_DIP(U31) // Hex Inverter
+ CD4069_DIP(U31) // Hex Inverter
NET_C(U31.7, GND)
NET_C(U31.14, I_V12)
- CD4069_DIP(U32) // Hex Inverter
+ CD4069_DIP(U32) // Hex Inverter
NET_C(U32.7, GND)
NET_C(U32.14, I_V12)
-// TTL_74LS125_DIP(U33) // Quad 3-state buffer
-// NET_C(U33.7, GND)
-// NET_C(U33.14, I_V5)
+// TTL_74LS125_DIP(U33) // Quad 3-state buffer
+// NET_C(U33.7, GND)
+// NET_C(U33.14, I_V5)
-// TTL_74LS374_DIP(U34) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
-// NET_C(U34.10, GND)
-// NET_C(U34.20, I_V5)
+// TTL_74LS374_DIP(U34) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
+// NET_C(U34.10, GND)
+// NET_C(U34.20, I_V5)
//
-// TTL_74LS374_DIP(U35) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
-// NET_C(U34.10, GND)
-// NET_C(U34.20, I_V5)
+// TTL_74LS374_DIP(U35) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
+// NET_C(U34.10, GND)
+// NET_C(U34.20, I_V5)
// TTL_74LS74_DIP(U36) // Dual D Flip Flop
// NET_C(U36.7, GND)
// NET_C(U36.14, I_V5)
-// TTL_74LS10_DIP(U37) // Triple 3-Input NAND Gate
-// NET_C(U37.7, GND)
-// NET_C(U37.14, I_V5)
+// TTL_74LS10_DIP(U37) // Triple 3-Input NAND Gate
+// NET_C(U37.7, GND)
+// NET_C(U37.14, I_V5)
-// TTL_74LS14_DIP(U38)
-// NET_C(U38.7, GND)
-// NET_C(U38.14, I_V5)
+// TTL_74LS14_DIP(U38)
+// NET_C(U38.7, GND)
+// NET_C(U38.14, I_V5)
-// TTL_74LS08_DIP(U39) // Quad 2-Input AND Gates
-// NET_C(U39.7, GND)
-// NET_C(U39.14, I_V5)
+// TTL_74LS08_DIP(U39) // Quad 2-Input AND Gates
+// NET_C(U39.7, GND)
+// NET_C(U39.14, I_V5)
-// TTL_74LS30_DIP(U40) // 8-Input NAND Gate
-// NET_C(U40.7, GND)
-// NET_C(U40.14, I_V5)
+// TTL_74LS30_DIP(U40) // 8-Input NAND Gate
+// NET_C(U40.7, GND)
+// NET_C(U40.14, I_V5)
-// TTL_74LS14_DIP(U41)
-// NET_C(U41.7, GND)
-// NET_C(U41.14, I_V5)
+// TTL_74LS14_DIP(U41)
+// NET_C(U41.7, GND)
+// NET_C(U41.14, I_V5)
//
// Sheet 7, top-left/middle (Thrust)
@@ -817,9 +817,9 @@ NETLIST_START(zektor)
VARCLOCK(BGCLK, 1, "max(0.000001,min(0.1,(0.00000748879*A0*A0*A0*A0) - (0.000189174*A0*A0*A0) + (0.00180942*A0*A0) - (0.00759439*A0) + 0.0124560))")
NET_C(BGCLK.GND, GND)
NET_C(BGCLK.VCC, I_V5)
- NET_C(BGCLK.A0, U16.1)
- NET_C(BGCLK.Q, BGENV.A0)
- NET_C(GND, C57.1, C57.2, C58.1, C58.2)
+ NET_C(BGCLK.A0, U16.1)
+ NET_C(BGCLK.Q, BGENV.A0)
+ NET_C(GND, C57.1, C57.2, C58.1, C58.2)
AFUNC(BGENV, 1, "if(A0>2.5,2.5,-2.5)")
NET_C(BGENV.Q, R106.1)
#else
@@ -867,7 +867,7 @@ NETLIST_START(zektor)
HINT(U32.6, NC)
HINT(U32.8, NC)
- CLOCK(_200HZBCLK, 217.98) // tweak frequency so this is out of phase
+ CLOCK(_200HZBCLK, 217.98) // tweak frequency so this is out of phase
NET_C(_200HZBCLK.VCC, I_V12)
NET_C(_200HZBCLK.GND, GND)
NET_C(_200HZB, _200HZBCLK.Q)
@@ -1100,14 +1100,14 @@ NETLIST_START(zektor)
VARCLOCK(TORP1CLK, 1, "max(0.000001,min(0.1,(0.00000342725*A0*A0*A0) + (0.000000183693*A0*A0) + (0.000079091*A0) + 0.0000157375))")
NET_C(TORP1CLK.GND, GND)
NET_C(TORP1CLK.VCC, I_V5)
- NET_C(TORP1CLK.A0, D2.K)
- NET_C(TORP1CLK.Q, T1ENV.A0)
+ NET_C(TORP1CLK.A0, D2.K)
+ NET_C(TORP1CLK.Q, T1ENV.A0)
AFUNC(T1ENV, 1, "if(A0>2.5,11.1,-11.1)")
NET_C(T1ENV.Q, U23.1)
NET_C(D2.A, D3.K, R91.1)
NET_C(C46.2, R90.1)
NET_C(R90.2, R91.2, R146.1)
- NET_C(GND, U20.3, U20.2)
+ NET_C(GND, U20.3, U20.2)
#else
NET_C(D2.A, D3.K, R91.1, U20.3)
NET_C(U20.2, C46.2, R90.1)
@@ -1129,9 +1129,9 @@ NETLIST_START(zektor)
NET_C(WBN, R36.1)
#if (DISABLE_TORPEDO2_NOISE)
- NET_C(R36.2, GND) // noise source
+ NET_C(R36.2, GND) // noise source
#else
- NET_C(R36.2, D6.A) // noise source
+ NET_C(R36.2, D6.A) // noise source
#endif
#if (HLE_TORPEDO2_VCO)
@@ -1145,14 +1145,14 @@ NETLIST_START(zektor)
VARCLOCK(TORP2CLK, 1, "max(0.000001,min(0.1,(0.0000104419*A0*A0*A0) - (0.00000603211*A0*A0) + (0.000109865*A0) + 0.0000082421))")
NET_C(TORP2CLK.GND, GND)
NET_C(TORP2CLK.VCC, I_V5)
- NET_C(TORP2CLK.A0, D6.K)
- NET_C(TORP2CLK.Q, T2ENV.A0)
+ NET_C(TORP2CLK.A0, D6.K)
+ NET_C(TORP2CLK.Q, T2ENV.A0)
AFUNC(T2ENV, 1, "if(A0>2.5,11.1,-11.1)")
NET_C(T2ENV.Q, U21.1)
NET_C(D6.A, D7.K, R93.1)
NET_C(C43.2, R94.1)
NET_C(R94.2, R93.2, R92.2)
- NET_C(GND, U20.6, U20.5)
+ NET_C(GND, U20.6, U20.5)
#else
NET_C(D6.A, U20.5, D7.K, R93.1)
NET_C(U20.6, C43.2, R94.1)
diff --git a/src/mame/audio/nl_fireone.cpp b/src/mame/audio/nl_fireone.cpp
index 3c0523cb36c..9b2c405535c 100644
--- a/src/mame/audio/nl_fireone.cpp
+++ b/src/mame/audio/nl_fireone.cpp
@@ -41,56 +41,56 @@ NETLIST_END()
//
static NETLIST_START(ICL8038_DIP)
- VCVS(VI, 1)
- CCCS(CI1, -1)
- CCCS(CI2, 2)
- SYS_COMPD(COMP)
- SYS_DSW2(SW)
- VCVS(VO, 1)
- RES(R_SHUNT, RES_R(50))
-
- PARAM(VO.RO, 50)
- PARAM(COMP.MODEL, "FAMILY(TYPE=CUSTOM IVL=0.16 IVH=0.4 OVL=0.01 OVH=0.01 ORL=50 ORH=50)")
- PARAM(SW.GOFF, 0) // This has to be zero to block current sources
-
- NET_C(VI.OP, CI1.IN, CI2.IN)
- NET_C(CI1.OP, VO.IP)
- NET_C(COMP.Q, SW.I)
- NET_C(CI2.OP, SW.2)
- NET_C(COMP.VCC, R_SHUNT.1)
- NET_C(SW.1, R_SHUNT.2)
- NET_C(SW.3, VO.IP)
- NET_C(VO.OP, COMP.IN)
-
- // Avoid singular Matrix due to G=0 switch
- RES(RX1, 1e10)
- RES(RX2, 1e10)
- NET_C(RX1.1, SW.1)
- NET_C(RX2.1, SW.3)
-
- NET_C(COMP.GND, RX1.2, RX2.2)
-
- RES(R1, 5000)
- RES(R2, 5000)
- RES(R3, 5000)
-
- // Square output wave
- VCVS(V_SQR, 1)
- NET_C(COMP.Q, V_SQR.IP)
-
- NET_C(COMP.GND, SW.GND, VI.ON, VI.IN, CI1.ON, CI2.ON, VO.IN, VO.ON, R2.2, V_SQR.IN, V_SQR.ON)
- NET_C(COMP.VCC, SW.VCC, R1.2)
- NET_C(COMP.IP, R1.1, R2.1, R3.1)
- NET_C(COMP.Q, R3.2)
-
- ALIAS(11, VI.ON) // GND
- ALIAS(9, V_SQR.OP) // Square out
- ALIAS(3, VO.OP) // Triag out
- ALIAS(8, VI.IP) // VC
- ALIAS(4, CI1.IP) // R1
- ALIAS(5, CI2.IP) // R2
- ALIAS(10, VO.IP) // C1
- ALIAS(6, COMP.VCC) // V+
+ VCVS(VI, 1)
+ CCCS(CI1, -1)
+ CCCS(CI2, 2)
+ SYS_COMPD(COMP)
+ SYS_DSW2(SW)
+ VCVS(VO, 1)
+ RES(R_SHUNT, RES_R(50))
+
+ PARAM(VO.RO, 50)
+ PARAM(COMP.MODEL, "FAMILY(TYPE=CUSTOM IVL=0.16 IVH=0.4 OVL=0.01 OVH=0.01 ORL=50 ORH=50)")
+ PARAM(SW.GOFF, 0) // This has to be zero to block current sources
+
+ NET_C(VI.OP, CI1.IN, CI2.IN)
+ NET_C(CI1.OP, VO.IP)
+ NET_C(COMP.Q, SW.I)
+ NET_C(CI2.OP, SW.2)
+ NET_C(COMP.VCC, R_SHUNT.1)
+ NET_C(SW.1, R_SHUNT.2)
+ NET_C(SW.3, VO.IP)
+ NET_C(VO.OP, COMP.IN)
+
+ // Avoid singular Matrix due to G=0 switch
+ RES(RX1, 1e10)
+ RES(RX2, 1e10)
+ NET_C(RX1.1, SW.1)
+ NET_C(RX2.1, SW.3)
+
+ NET_C(COMP.GND, RX1.2, RX2.2)
+
+ RES(R1, 5000)
+ RES(R2, 5000)
+ RES(R3, 5000)
+
+ // Square output wave
+ VCVS(V_SQR, 1)
+ NET_C(COMP.Q, V_SQR.IP)
+
+ NET_C(COMP.GND, SW.GND, VI.ON, VI.IN, CI1.ON, CI2.ON, VO.IN, VO.ON, R2.2, V_SQR.IN, V_SQR.ON)
+ NET_C(COMP.VCC, SW.VCC, R1.2)
+ NET_C(COMP.IP, R1.1, R2.1, R3.1)
+ NET_C(COMP.Q, R3.2)
+
+ ALIAS(11, VI.ON) // GND
+ ALIAS(9, V_SQR.OP) // Square out
+ ALIAS(3, VO.OP) // Triag out
+ ALIAS(8, VI.IP) // VC
+ ALIAS(4, CI1.IP) // R1
+ ALIAS(5, CI2.IP) // R2
+ ALIAS(10, VO.IP) // C1
+ ALIAS(6, COMP.VCC) // V+
NETLIST_END()
//
@@ -109,19 +109,19 @@ NETLIST_START(fireone)
NET_MODEL("PIT8253PORT FAMILY(TYPE=NMOS OVL=0.05 OVH=0.05 ORL=100.0 ORH=0.5k)")
- TTL_INPUT(LTORP, 0) // active high
- TTL_INPUT(LSHPHT, 0) // active high
- TTL_INPUT(LBOOM, 0) // active high
- TTL_INPUT(SOUND_OFF_L, 0) // active high
- TTL_INPUT(SOUND_OFF_R, 0) // active high
- TTL_INPUT(RTORP, 0) // active high
- TTL_INPUT(RSHPHT, 0) // active high
- TTL_INPUT(RBOOM, 0) // active high
- TTL_INPUT(TORPCOLL, 0) // active high
- TTL_INPUT(SUBENG, 0) // active high
- TTL_INPUT(ALERT, 0) // active high
- //TTL_INPUT(SONAR_ENABLE, 0) // active high
- TTL_INPUT(SONAR_SYNC, 0) // active low
+ TTL_INPUT(LTORP, 0) // active high
+ TTL_INPUT(LSHPHT, 0) // active high
+ TTL_INPUT(LBOOM, 0) // active high
+ TTL_INPUT(SOUND_OFF_L, 0) // active high
+ TTL_INPUT(SOUND_OFF_R, 0) // active high
+ TTL_INPUT(RTORP, 0) // active high
+ TTL_INPUT(RSHPHT, 0) // active high
+ TTL_INPUT(RBOOM, 0) // active high
+ TTL_INPUT(TORPCOLL, 0) // active high
+ TTL_INPUT(SUBENG, 0) // active high
+ TTL_INPUT(ALERT, 0) // active high
+ //TTL_INPUT(SONAR_ENABLE, 0) // active high
+ TTL_INPUT(SONAR_SYNC, 0) // active low
LOGIC_INPUT(MUSIC_A, 0, "PIT8253PORT")
LOGIC_INPUT(MUSIC_B, 0, "PIT8253PORT")
diff --git a/src/mame/audio/nl_segaspeech.cpp b/src/mame/audio/nl_segaspeech.cpp
index 6b52f886df5..8dc301f2db6 100644
--- a/src/mame/audio/nl_segaspeech.cpp
+++ b/src/mame/audio/nl_segaspeech.cpp
@@ -45,7 +45,7 @@ NETLIST_START(segaspeech)
// There are two schematic drawings of the speech board
// that show fairly different outputs from the SP0250.
// Both have their problems.
- //
+ //
// The simpler one is included in the Astro Blaster and
// Space Fury manuals. This is largely correct, except
// that it is believed (not verified) that R20 should be
@@ -89,14 +89,14 @@ NETLIST_START(segaspeech)
RES(R17, RES_K(10))
RES(R18, RES_K(22))
RES(R19, RES_K(250))
- RES(R20, RES_K(4.7)) // schematic shows 470Ohm, but a real PCB had 4.7k here
+ RES(R20, RES_K(4.7)) // schematic shows 470Ohm, but a real PCB had 4.7k here
RES(R21, RES_K(10))
CAP(C9, CAP_U(0.1))
CAP(C10, CAP_U(0.047))
CAP(C50, CAP_U(0.003))
- TL081_DIP(U8) // Op. Amp.
+ TL081_DIP(U8) // Op. Amp.
NET_C(U8.7, I_V5)
NET_C(U8.4, I_VM5)
diff --git a/src/mame/audio/nl_segausb.cpp b/src/mame/audio/nl_segausb.cpp
index 179f9b4a211..ac03fac0662 100644
--- a/src/mame/audio/nl_segausb.cpp
+++ b/src/mame/audio/nl_segausb.cpp
@@ -42,33 +42,33 @@ NETLIST_START(segausb)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
- ANALOG_INPUT(I_U12_DAC, 0) // AD7524
- ANALOG_INPUT(I_U13_DAC, 0) // AD7524
- ANALOG_INPUT(I_U14_DAC, 0) // AD7524
- TTL_INPUT(I_U2B_SEL, 0) // 74LS74
+ ANALOG_INPUT(I_U12_DAC, 0) // AD7524
+ ANALOG_INPUT(I_U13_DAC, 0) // AD7524
+ ANALOG_INPUT(I_U14_DAC, 0) // AD7524
+ TTL_INPUT(I_U2B_SEL, 0) // 74LS74
- ANALOG_INPUT(I_U24_DAC, 0) // AD7524
- ANALOG_INPUT(I_U25_DAC, 0) // AD7524
- ANALOG_INPUT(I_U26_DAC, 0) // AD7524
- TTL_INPUT(I_U38B_SEL, 0) // 74LS74
+ ANALOG_INPUT(I_U24_DAC, 0) // AD7524
+ ANALOG_INPUT(I_U25_DAC, 0) // AD7524
+ ANALOG_INPUT(I_U26_DAC, 0) // AD7524
+ TTL_INPUT(I_U38B_SEL, 0) // 74LS74
- ANALOG_INPUT(I_U27_DAC, 0) // AD7524
- ANALOG_INPUT(I_U28_DAC, 0) // AD7524
- ANALOG_INPUT(I_U29_DAC, 0) // AD7524
- TTL_INPUT(I_U2A_SEL, 0) // 74LS74
+ ANALOG_INPUT(I_U27_DAC, 0) // AD7524
+ ANALOG_INPUT(I_U28_DAC, 0) // AD7524
+ ANALOG_INPUT(I_U29_DAC, 0) // AD7524
+ TTL_INPUT(I_U2A_SEL, 0) // 74LS74
NET_C(GND, I_U2B_SEL.GND, I_U38B_SEL.GND, I_U2A_SEL.GND)
NET_C(I_V5, I_U2B_SEL.VCC, I_U38B_SEL.VCC, I_U2A_SEL.VCC)
- TTL_INPUT(I_U41_OUT0, 0) // 8253 PIT U41
+ TTL_INPUT(I_U41_OUT0, 0) // 8253 PIT U41
TTL_INPUT(I_U41_OUT1, 0)
TTL_INPUT(I_U41_OUT2, 0)
- TTL_INPUT(I_U42_OUT0, 0) // 8253 PIT U42
+ TTL_INPUT(I_U42_OUT0, 0) // 8253 PIT U42
TTL_INPUT(I_U42_OUT1, 0)
TTL_INPUT(I_U42_OUT2, 0)
- TTL_INPUT(I_U43_OUT0, 0) // 8253 PIT U43
+ TTL_INPUT(I_U43_OUT0, 0) // 8253 PIT U43
TTL_INPUT(I_U43_OUT1, 0)
TTL_INPUT(I_U43_OUT2, 0)
@@ -142,21 +142,21 @@ NETLIST_START(segausb)
RES(R64, RES_K(2.7))
RES(R65, RES_K(2.7))
-// CAP(C6, CAP_P(100))
-// CAP(C7, CAP_P(100))
-// CAP(C8, CAP_P(100))
+// CAP(C6, CAP_P(100))
+// CAP(C7, CAP_P(100))
+// CAP(C8, CAP_P(100))
CAP(C9, CAP_U(0.01))
CAP(C13, CAP_U(0.01))
CAP(C14, CAP_U(1))
CAP(C15, CAP_U(1))
CAP(C16, CAP_U(0.01))
CAP(C17, CAP_U(0.01))
-// CAP(C19, CAP_P(100))
-// CAP(C20, CAP_P(100))
-// CAP(C21, CAP_P(100))
-// CAP(C22, CAP_P(100))
-// CAP(C23, CAP_P(100))
-// CAP(C24, CAP_P(100))
+// CAP(C19, CAP_P(100))
+// CAP(C20, CAP_P(100))
+// CAP(C21, CAP_P(100))
+// CAP(C22, CAP_P(100))
+// CAP(C23, CAP_P(100))
+// CAP(C24, CAP_P(100))
CAP(C25, CAP_U(0.01))
CAP(C32, CAP_U(0.01))
CAP(C33, CAP_U(1))
@@ -170,143 +170,143 @@ NETLIST_START(segausb)
CAP(C55, CAP_U(0.15))
CAP(C56, CAP_U(0.15))
-// TL082_DIP(U1) // Op. Amp.
-// NET_C(U1.7, I_V12)
-// NET_C(U1.4, I_VM12)
+// TL082_DIP(U1) // Op. Amp.
+// NET_C(U1.7, I_V12)
+// NET_C(U1.4, I_VM12)
-// TTL_74LS74(U2) // Dual D-Type Positive Edge-Triggered Flip-Flop -- not emulated
-// NET_C(U2.7, GND)
-// NET_C(U2.14, I_V5)
+// TTL_74LS74(U2) // Dual D-Type Positive Edge-Triggered Flip-Flop -- not emulated
+// NET_C(U2.7, GND)
+// NET_C(U2.14, I_V5)
- TL082_DIP(U3) // Op. Amp.
+ TL082_DIP(U3) // Op. Amp.
NET_C(U3.8, I_V12)
NET_C(U3.4, I_VM12)
- TL082_DIP(U4) // Op. Amp.
+ TL082_DIP(U4) // Op. Amp.
NET_C(U4.8, I_V12)
NET_C(U4.4, I_VM12)
- TL082_DIP(U5) // Op. Amp.
+ TL082_DIP(U5) // Op. Amp.
NET_C(U5.8, I_V12)
NET_C(U5.4, I_VM12)
- TL082_DIP(U6) // Op. Amp.
+ TL082_DIP(U6) // Op. Amp.
NET_C(U6.8, I_V12)
NET_C(U6.4, I_VM12)
- CD4053_DIP(U7) // 3x analog demuxer
+ CD4053_DIP(U7) // 3x analog demuxer
NET_C(U7.16, I_V5)
- NET_C(U7.6, GND) // INH
- NET_C(U7.7, I_V12) // VEE
+ NET_C(U7.6, GND) // INH
+ NET_C(U7.7, I_V12) // VEE
NET_C(U7.8, GND)
- CD4053_DIP(U8) // 3x analog demuxer
+ CD4053_DIP(U8) // 3x analog demuxer
NET_C(U8.16, I_V5)
- NET_C(U8.6, GND) // INH
- NET_C(U8.7, I_V12) // VEE
+ NET_C(U8.6, GND) // INH
+ NET_C(U8.7, I_V12) // VEE
NET_C(U8.8, GND)
- TL082_DIP(U9) // Op. Amp.
+ TL082_DIP(U9) // Op. Amp.
NET_C(U9.8, I_V12)
NET_C(U9.4, I_VM12)
-// TTL_74LS139_DIP(U10) // Dual 1-of-4 Decoder -- not emulated
+// TTL_74LS139_DIP(U10) // Dual 1-of-4 Decoder -- not emulated
-// TTL_74LS139_DIP(U11) // Dual 1-of-4 Decoder -- not emulated
+// TTL_74LS139_DIP(U11) // Dual 1-of-4 Decoder -- not emulated
-// AD7524_DIP(U12) // DAC -- not emulated
-// NET_C(U12.3, GND)
-// NET_C(U12.14, I_V5)
+// AD7524_DIP(U12) // DAC -- not emulated
+// NET_C(U12.3, GND)
+// NET_C(U12.14, I_V5)
-// AD7524_DIP(U13) // DAC -- not emulated
-// NET_C(U12.3, GND)
-// NET_C(U12.14, I_V5)
+// AD7524_DIP(U13) // DAC -- not emulated
+// NET_C(U12.3, GND)
+// NET_C(U12.14, I_V5)
-// AD7524_DIP(U14) // DAC -- not emulated
-// NET_C(U12.3, GND)
-// NET_C(U12.14, I_V5)
+// AD7524_DIP(U14) // DAC -- not emulated
+// NET_C(U12.3, GND)
+// NET_C(U12.14, I_V5)
- CD4053_DIP(U15) // 3x analog demuxer
+ CD4053_DIP(U15) // 3x analog demuxer
NET_C(U15.16, I_V5)
- NET_C(U15.6, GND) // INH
- NET_C(U15.7, I_V12) // VEE
+ NET_C(U15.6, GND) // INH
+ NET_C(U15.7, I_V12) // VEE
NET_C(U15.8, GND)
- CD4053_DIP(U16) // 3x analog demuxer
+ CD4053_DIP(U16) // 3x analog demuxer
NET_C(U16.16, I_V5)
- NET_C(U16.6, GND) // INH
- NET_C(U16.7, I_V12) // VEE
+ NET_C(U16.6, GND) // INH
+ NET_C(U16.7, I_V12) // VEE
NET_C(U16.8, GND)
- TL082_DIP(U17) // Op. Amp.
+ TL082_DIP(U17) // Op. Amp.
NET_C(U17.8, I_V12)
NET_C(U17.4, I_VM12)
- TL082_DIP(U18) // Op. Amp.
+ TL082_DIP(U18) // Op. Amp.
NET_C(U18.8, I_V12)
NET_C(U18.4, I_VM12)
- TL082_DIP(U19) // Op. Amp.
+ TL082_DIP(U19) // Op. Amp.
NET_C(U19.8, I_V12)
NET_C(U19.4, I_VM12)
- TL082_DIP(U20) // Op. Amp.
+ TL082_DIP(U20) // Op. Amp.
NET_C(U20.8, I_V12)
NET_C(U20.4, I_VM12)
- TL082_DIP(U21) // Op. Amp.
+ TL082_DIP(U21) // Op. Amp.
NET_C(U21.8, I_V12)
NET_C(U21.4, I_VM12)
- TL082_DIP(U22) // Op. Amp.
+ TL082_DIP(U22) // Op. Amp.
NET_C(U22.8, I_V12)
NET_C(U22.4, I_VM12)
- TL082_DIP(U23) // Op. Amp.
+ TL082_DIP(U23) // Op. Amp.
NET_C(U23.8, I_V12)
NET_C(U23.4, I_VM12)
-// AD7524_DIP(U24) // DAC -- not emulated
-// NET_C(U24.3, GND)
-// NET_C(U24.14, I_V5)
+// AD7524_DIP(U24) // DAC -- not emulated
+// NET_C(U24.3, GND)
+// NET_C(U24.14, I_V5)
-// AD7524_DIP(U25) // DAC -- not emulated
-// NET_C(U25.3, GND)
-// NET_C(U25.14, I_V5)
+// AD7524_DIP(U25) // DAC -- not emulated
+// NET_C(U25.3, GND)
+// NET_C(U25.14, I_V5)
-// AD7524_DIP(U26) // DAC -- not emulated
-// NET_C(U26.3, GND)
-// NET_C(U26.14, I_V5)
+// AD7524_DIP(U26) // DAC -- not emulated
+// NET_C(U26.3, GND)
+// NET_C(U26.14, I_V5)
-// AD7524_DIP(U27) // DAC -- not emulated
-// NET_C(U27.3, GND)
-// NET_C(U27.14, I_V5)
+// AD7524_DIP(U27) // DAC -- not emulated
+// NET_C(U27.3, GND)
+// NET_C(U27.14, I_V5)
-// AD7524_DIP(U28) // DAC -- not emulated
-// NET_C(U28.3, GND)
-// NET_C(U28.14, I_V5)
+// AD7524_DIP(U28) // DAC -- not emulated
+// NET_C(U28.3, GND)
+// NET_C(U28.14, I_V5)
-// AD7524_DIP(U29) // DAC -- not emulated
-// NET_C(U29.3, GND)
-// NET_C(U29.14, I_V5)
+// AD7524_DIP(U29) // DAC -- not emulated
+// NET_C(U29.3, GND)
+// NET_C(U29.14, I_V5)
- CD4053_DIP(U30) // 3x analog demuxer
+ CD4053_DIP(U30) // 3x analog demuxer
NET_C(U30.16, I_V5)
- NET_C(U30.6, GND) // INH
- NET_C(U30.7, I_V12) // VEE
+ NET_C(U30.6, GND) // INH
+ NET_C(U30.7, I_V12) // VEE
NET_C(U30.8, GND)
- CD4053_DIP(U31) // 3x analog demuxer
+ CD4053_DIP(U31) // 3x analog demuxer
NET_C(U31.16, I_V5)
- NET_C(U31.6, GND) // INH
- NET_C(U31.7, I_V12) // VEE
+ NET_C(U31.6, GND) // INH
+ NET_C(U31.7, I_V12) // VEE
NET_C(U31.8, GND)
-// TTL_74LS74(U38) // Dual D-Type Positive Edge-Triggered Flip-Flop -- not emulated
-// NET_C(U38.7, GND)
-// NET_C(U38.14, I_V5)
+// TTL_74LS74(U38) // Dual D-Type Positive Edge-Triggered Flip-Flop -- not emulated
+// NET_C(U38.7, GND)
+// NET_C(U38.14, I_V5)
- TL081_DIP(U49) // Op. Amp.
+ TL081_DIP(U49) // Op. Amp.
NET_C(U49.7, I_V12)
NET_C(U49.4, I_VM12)
@@ -533,12 +533,12 @@ NETLIST_START(segausb)
NET_C(GND, U15.2, U15.5, U16.2)
NET_C(GND, U30.2, U30.5, U31.2)
/*
- OPTIMIZE_FRONTIER(R48.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R49.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R18.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R19.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R34.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R35.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R48.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R49.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R18.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R19.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R34.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R35.1, RES_M(1), 50)
*/
NETLIST_END()
diff --git a/src/mame/audio/nl_spacfury.cpp b/src/mame/audio/nl_spacfury.cpp
index 797185e9dd0..c1926f6f817 100644
--- a/src/mame/audio/nl_spacfury.cpp
+++ b/src/mame/audio/nl_spacfury.cpp
@@ -154,7 +154,7 @@ NETLIST_START(spacfury)
// subtle but noticeable effect where the spin "whoosh" is missing
// some upper harmonics at 4e-5; however, this is the most demanding
// solver in the system and it keeps jumping around as I tweak things
-// PARAM(Solver.Solver_21.DYNAMIC_MIN_TIMESTEP, 2e-5)
+// PARAM(Solver.Solver_21.DYNAMIC_MIN_TIMESTEP, 2e-5)
// Overwrite model - the default model uses minimum datasheet
// specifications for 5V. These are for 10V and thus closer to the
@@ -203,10 +203,10 @@ NETLIST_START(spacfury)
ANALOG_INPUT(I_V12, 12)
ANALOG_INPUT(I_VM12, -12)
-// RES(R1, RES_K(2.2)) -- part of final amp (not emulated)
-// RES(R2, RES_K(10)) -- part of final amp (not emulated)
-// RES(R4, RES_K(330)) -- part of final amp (not emulated)
-// RES(R5, RES_M(1)) -- part of final amp (not emulated)
+// RES(R1, RES_K(2.2)) -- part of final amp (not emulated)
+// RES(R2, RES_K(10)) -- part of final amp (not emulated)
+// RES(R4, RES_K(330)) -- part of final amp (not emulated)
+// RES(R5, RES_M(1)) -- part of final amp (not emulated)
RES(R6, RES_K(680))
RES(R7, RES_K(680))
RES(R8, RES_K(10))
@@ -216,7 +216,7 @@ NETLIST_START(spacfury)
RES(R12, RES_K(47))
RES(R13, RES_K(47))
RES(R14, RES_M(1))
-// RES(R15, RES_K(100)) -- part of final amp (not emulated)
+// RES(R15, RES_K(100)) -- part of final amp (not emulated)
RES(R18, RES_K(10))
RES(R19, RES_K(470))
RES(R20, RES_K(22))
@@ -349,23 +349,23 @@ NETLIST_START(spacfury)
RES(R148, RES_K(10))
RES(R149, RES_K(220))
-// CAP(C1, CAP_U(4.7)) -- part of final amp (not emulated)
-// CAP(C2, CAP_U(0.05))
-// CAP(C3, CAP_U(0.05))
-// CAP(C4, CAP_U(10)) -- part of final amp (not emulated)
+// CAP(C1, CAP_U(4.7)) -- part of final amp (not emulated)
+// CAP(C2, CAP_U(0.05))
+// CAP(C3, CAP_U(0.05))
+// CAP(C4, CAP_U(10)) -- part of final amp (not emulated)
CAP(C5, CAP_U(0.01))
CAP(C6, CAP_U(0.01))
CAP(C7, CAP_U(4.7))
CAP(C8, CAP_U(0.047))
-// CAP(C9, CAP_U(0.05))
-// CAP(C10, CAP_U(0.05))
+// CAP(C9, CAP_U(0.05))
+// CAP(C10, CAP_U(0.05))
CAP(C11, CAP_U(0.01))
CAP(C12, CAP_U(0.01))
CAP(C13, CAP_U(0.01))
CAP(C14, CAP_U(0.01))
CAP(C15, CAP_U(0.01))
-// CAP(C16, CAP_U(0.05))
-// CAP(C17, CAP_U(0.05))
+// CAP(C16, CAP_U(0.05))
+// CAP(C17, CAP_U(0.05))
CAP(C18, CAP_U(0.01))
CAP(C19, CAP_U(0.047))
CAP(C20, CAP_U(0.01))
@@ -373,9 +373,9 @@ NETLIST_START(spacfury)
CAP(C22, CAP_U(0.05))
CAP(C23, CAP_U(0.05))
CAP(C24, CAP_U(10))
-// CAP(C25, CAP_U(0.05))
+// CAP(C25, CAP_U(0.05))
CAP(C26, CAP_U(0.0033))
-// CAP(C27, CAP_U(0.05))
+// CAP(C27, CAP_U(0.05))
CAP(C28, CAP_U(0.1))
CAP(C29, CAP_U(0.001))
CAP(C30, CAP_U(0.0022))
@@ -386,15 +386,15 @@ NETLIST_START(spacfury)
CAP(C35, CAP_U(0.0033))
CAP(C36, CAP_U(4.7))
CAP(C37, CAP_U(0.0022))
-// CAP(C38, CAP_U(0.05))
-// CAP(C39, CAP_U(0.05))
+// CAP(C38, CAP_U(0.05))
+// CAP(C39, CAP_U(0.05))
CAP(C40, CAP_U(0.047))
CAP(C41, CAP_U(0.0047))
CAP(C42, CAP_U(0.01))
CAP(C43, CAP_U(0.01))
CAP(C44, CAP_U(4.7))
-// CAP(C45, CAP_U(0.05))
-// CAP(C46, CAP_U(0.05))
+// CAP(C45, CAP_U(0.05))
+// CAP(C46, CAP_U(0.05))
CAP(C47, CAP_U(0.047))
CAP(C48, CAP_U(4.7))
CAP(C49, CAP_U(0.1))
@@ -404,30 +404,30 @@ NETLIST_START(spacfury)
CAP(C53, CAP_U(10))
CAP(C54, CAP_U(0.1))
CAP(C55, CAP_U(100))
-// CAP(C56, CAP_U(0.05))
+// CAP(C56, CAP_U(0.05))
CAP(C57, CAP_U(4.7))
-// CAP(C58, CAP_U(0.05))
+// CAP(C58, CAP_U(0.05))
CAP(C59, CAP_U(0.01))
CAP(C60, CAP_U(0.01))
CAP(C61, CAP_U(0.047))
CAP(C62, CAP_U(0.047))
CAP(C63, CAP_U(0.05))
CAP(C64, CAP_U(0.05))
-// CAP(C65, CAP_U(0.05))
+// CAP(C65, CAP_U(0.05))
CAP(C66, CAP_U(0.033))
-// CAP(C67, CAP_U(0.05))
+// CAP(C67, CAP_U(0.05))
CAP(C68, CAP_U(0.1))
CAP(C69, CAP_U(0.1))
CAP(C70, CAP_U(0.1))
CAP(C71, CAP_U(0.047))
CAP(C72, CAP_P(100))
CAP(C73, CAP_U(0.1))
-// CAP(C75, CAP_U(10))
-// CAP(C76, CAP_U(10))
-// CAP(C77, CAP_U(0.1))
-// CAP(C78, CAP_U(0.1))
-// CAP(C79, CAP_U(0.1))
-// CAP(C80, CAP_U(0.1))
+// CAP(C75, CAP_U(10))
+// CAP(C76, CAP_U(10))
+// CAP(C77, CAP_U(0.1))
+// CAP(C78, CAP_U(0.1))
+// CAP(C79, CAP_U(0.1))
+// CAP(C80, CAP_U(0.1))
D_1N914(D1)
D_1N914(D2)
@@ -446,7 +446,7 @@ NETLIST_START(spacfury)
D_1N914(D15)
D_1N914(D16)
-// Q_2N4093(Q1) -- part of final amp (not emulated)
+// Q_2N4093(Q1) -- part of final amp (not emulated)
Q_2N4093(Q2)
Q_2N4093(Q3)
Q_2N4403(Q4)
@@ -460,39 +460,39 @@ NETLIST_START(spacfury)
Q_2N4401(Q12)
Q_2N4403(Q13)
-// TL082_DIP(U1) // Op. Amp. -- part of final amp (not emulated)
-// NET_C(U1.8, I_V12)
-// NET_C(U1.4, I_VM12)
+// TL082_DIP(U1) // Op. Amp. -- part of final amp (not emulated)
+// NET_C(U1.8, I_V12)
+// NET_C(U1.4, I_VM12)
- TL082_DIP(U2) // Op. Amp.
+ TL082_DIP(U2) // Op. Amp.
NET_C(U2.8, I_V12)
NET_C(U2.4, I_VM12)
- CD4069_DIP(U3) // Hex Inverter
+ CD4069_DIP(U3) // Hex Inverter
NET_C(U3.7, GND)
NET_C(U3.14, I_V12)
- TL082_DIP(U4) // Op. Amp.
+ TL082_DIP(U4) // Op. Amp.
NET_C(U4.8, I_V12)
NET_C(U4.4, I_VM12)
- TL082_DIP(U5) // Op. Amp.
+ TL082_DIP(U5) // Op. Amp.
NET_C(U5.8, I_V12)
NET_C(U5.4, I_VM12)
- CD4011_DIP(U6) // Quad 2-Input NAND Gates
+ CD4011_DIP(U6) // Quad 2-Input NAND Gates
NET_C(U6.7, GND)
NET_C(U6.14, I_V12)
- CA3080_SLOW_DIP(U7) // Op. Amp.
+ CA3080_SLOW_DIP(U7) // Op. Amp.
NET_C(U7.4, I_VM12)
NET_C(U7.7, I_V12)
- TL082_DIP(U8) // Op. Amp.
+ TL082_DIP(U8) // Op. Amp.
NET_C(U8.8, I_V12)
NET_C(U8.4, I_VM12)
- MM5837_DIP(U9) // Noise Generator
+ MM5837_DIP(U9) // Noise Generator
#if (UNDERCLOCK_NOISE_GEN)
// officially runs at 48-112kHz, but little noticeable difference
// in exchange for a big performance boost
@@ -502,99 +502,99 @@ NETLIST_START(spacfury)
// MM5837 instance at a lower frequency to drive it; this
// second instance doesn't really exist, it just allows us
// a bit more performance
- MM5837_DIP(U9B) // Noise Generator
+ MM5837_DIP(U9B) // Noise Generator
PARAM(U9B.FREQ, 12000)
#endif
- TL082_DIP(U10) // Op. Amp.
+ TL082_DIP(U10) // Op. Amp.
NET_C(U10.8, I_V12)
NET_C(U10.4, I_VM12)
- CD4024_DIP(U11) // 7-Stage Ripple Binary Counter
+ CD4024_DIP(U11) // 7-Stage Ripple Binary Counter
NET_C(U11.7, GND)
NET_C(U11.14, I_V12)
- CA3080_SLOW_DIP(U12) // Op. Amp.
+ CA3080_SLOW_DIP(U12) // Op. Amp.
NET_C(U12.4, I_VM12)
NET_C(U12.7, I_V12)
- TL082_DIP(U13) // Op. Amp.
+ TL082_DIP(U13) // Op. Amp.
NET_C(U13.8, I_V12)
NET_C(U13.4, I_VM12)
- TL082_DIP(U14) // Op. Amp.
+ TL082_DIP(U14) // Op. Amp.
NET_C(U14.8, I_V12)
NET_C(U14.4, I_VM12)
- TL082_DIP(U15) // Op. Amp.
+ TL082_DIP(U15) // Op. Amp.
NET_C(U15.8, I_V12)
NET_C(U15.4, I_VM12)
- TL082_DIP(U16) // Op. Amp.
+ TL082_DIP(U16) // Op. Amp.
NET_C(U16.8, I_V12)
NET_C(U16.4, I_VM12)
LM555_DIP(U17)
- TL082_DIP(U18) // Op. Amp.
+ TL082_DIP(U18) // Op. Amp.
NET_C(U18.8, I_V12)
NET_C(U18.4, I_VM12)
- CD4069_DIP(U19) // Hex Inverter
+ CD4069_DIP(U19) // Hex Inverter
NET_C(U19.7, GND)
NET_C(U19.14, I_V12)
- CD4011_DIP(U20) // Quad 2-Input NAND Gates
+ CD4011_DIP(U20) // Quad 2-Input NAND Gates
NET_C(U20.7, GND)
NET_C(U20.14, I_V12)
- TL082_DIP(U21) // Op. Amp.
+ TL082_DIP(U21) // Op. Amp.
NET_C(U21.8, I_V12)
NET_C(U21.4, I_VM12)
- CD4011_DIP(U22) // Quad 2-Input NAND Gates
+ CD4011_DIP(U22) // Quad 2-Input NAND Gates
NET_C(U22.7, GND)
NET_C(U22.14, I_V12)
- TL082_DIP(U23) // Op. Amp.
+ TL082_DIP(U23) // Op. Amp.
NET_C(U23.8, I_V12)
NET_C(U23.4, I_VM12)
-// TTL_74LS08_DIP(U25) // Quad 2-Input AND Gates
-// NET_C(U25.7, GND)
-// NET_C(U25.14, I_V5)
+// TTL_74LS08_DIP(U25) // Quad 2-Input AND Gates
+// NET_C(U25.7, GND)
+// NET_C(U25.14, I_V5)
- TTL_7407_DIP(U26) // Hex Buffers with High Votage Open-Collector Outputs
- NET_C(U26.7, GND)
- NET_C(U26.14, I_V5)
+ TTL_7407_DIP(U26) // Hex Buffers with High Votage Open-Collector Outputs
+ NET_C(U26.7, GND)
+ NET_C(U26.14, I_V5)
-// TTL_74LS10_DIP(U28) // Triple 3-Input NAND Gate
-// NET_C(U28.7, GND)
-// NET_C(U28.14, I_V5)
+// TTL_74LS10_DIP(U28) // Triple 3-Input NAND Gate
+// NET_C(U28.7, GND)
+// NET_C(U28.14, I_V5)
-// TTL_74LS14_DIP(U30)
-// NET_C(U30.7, GND)
-// NET_C(U30.14, I_V5)
+// TTL_74LS14_DIP(U30)
+// NET_C(U30.7, GND)
+// NET_C(U30.14, I_V5)
- TTL_7406_DIP(U31) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(U31) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(U31.7, GND)
NET_C(U31.14, I_V5)
-// TTL_74LS374_DIP(U32) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
-// NET_C(U32.10, GND)
-// NET_C(U32.20, I_V5)
+// TTL_74LS374_DIP(U32) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
+// NET_C(U32.10, GND)
+// NET_C(U32.20, I_V5)
//
-// TTL_74LS374_DIP(U33) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
-// NET_C(U33.10, GND)
-// NET_C(U33.20, I_V5)
+// TTL_74LS374_DIP(U33) // Octal D-Type Transparent Latches And Edge-Triggered Flip-Flop
+// NET_C(U33.10, GND)
+// NET_C(U33.20, I_V5)
-// TTL_74LS30_DIP(U34) // 8-Input NAND Gate
-// NET_C(U34.7, GND)
-// NET_C(U34.14, I_V5)
+// TTL_74LS30_DIP(U34) // 8-Input NAND Gate
+// NET_C(U34.7, GND)
+// NET_C(U34.14, I_V5)
-// TTL_74LS14_DIP(U35)
-// NET_C(U35.7, GND)
-// NET_C(U35.14, I_V5)
+// TTL_74LS14_DIP(U35)
+// NET_C(U35.7, GND)
+// NET_C(U35.14, I_V5)
//
// Sheet 7, top (Moving)
@@ -1009,7 +1009,7 @@ NETLIST_START(spacfury)
NET_C(R140.2, D15.K, C68.2)
NET_C(C68.1, C66.1, D13.A, GND)
NET_C(D15.A, R102.1, D13.K) // and U21.3
- NET_C(C66.2, R103.1) // and U21.2
+ NET_C(C66.2, R103.1) // and U21.2
NET_C(R103.2, R102.2, R84.1)// and U21.1
#if (HLE_SHOOT_VCO)
@@ -1023,11 +1023,11 @@ NETLIST_START(spacfury)
VARCLOCK(SHOOTCLK, 1, "max(0.000001,min(0.1,(0.0000152345*A0*A0*A0) - (0.0000278973*A0*A0) + (0.000132881*A0) - 0.00000173354))")
NET_C(SHOOTCLK.GND, GND)
NET_C(SHOOTCLK.VCC, I_V5)
- NET_C(SHOOTCLK.A0, D15.K)
- NET_C(SHOOTCLK.Q, SHOOTENV.A0)
+ NET_C(SHOOTCLK.A0, D15.K)
+ NET_C(SHOOTCLK.Q, SHOOTENV.A0)
AFUNC(SHOOTENV, 1, "if(A0>2.5,11.1,-11.1)")
NET_C(SHOOTENV.Q, U11.1)
- NET_C(GND, U21.3, U21.2)
+ NET_C(GND, U21.3, U21.2)
#else
NET_C(D15.A, U21.3)
NET_C(U21.2, C66.2)
diff --git a/src/mame/audio/nl_starcrus.cpp b/src/mame/audio/nl_starcrus.cpp
index 99db733b726..f300cde61bd 100644
--- a/src/mame/audio/nl_starcrus.cpp
+++ b/src/mame/audio/nl_starcrus.cpp
@@ -25,12 +25,12 @@ NETLIST_START(starcrus)
ANALOG_INPUT(VM5, -5)
ALIAS(VCC, V5)
- TTL_INPUT(EXPLODE_1, 1) // active low
- TTL_INPUT(EXPLODE_2, 1) // active low
- TTL_INPUT(LAUNCH_1, 1) // active low
- TTL_INPUT(LAUNCH_2, 1) // active low
- TTL_INPUT(ENGINE_1, 1) // active low
- TTL_INPUT(ENGINE_2, 1) // active low
+ TTL_INPUT(EXPLODE_1, 1) // active low
+ TTL_INPUT(EXPLODE_2, 1) // active low
+ TTL_INPUT(LAUNCH_1, 1) // active low
+ TTL_INPUT(LAUNCH_2, 1) // active low
+ TTL_INPUT(ENGINE_1, 1) // active low
+ TTL_INPUT(ENGINE_2, 1) // active low
NET_C(GND, EXPLODE_1.GND, EXPLODE_2.GND, LAUNCH_1.GND, LAUNCH_2.GND, ENGINE_1.GND, ENGINE_2.GND)
NET_C(V5, EXPLODE_1.VCC, EXPLODE_2.VCC, LAUNCH_1.VCC, LAUNCH_2.VCC, ENGINE_1.VCC, ENGINE_2.VCC)
diff --git a/src/mame/audio/nl_starfire.cpp b/src/mame/audio/nl_starfire.cpp
index f2ed1546161..cf071f08e52 100644
--- a/src/mame/audio/nl_starfire.cpp
+++ b/src/mame/audio/nl_starfire.cpp
@@ -37,56 +37,56 @@ static NETLIST_START(NE556_DIP)
NETLIST_END()
static NETLIST_START(ICL8038_DIP)
- VCVS(VI, 1)
- CCCS(CI1, -1)
- CCCS(CI2, 2)
- SYS_COMPD(COMP)
- SYS_DSW2(SW)
- VCVS(VO, 1)
- RES(R_SHUNT, RES_R(50))
-
- PARAM(VO.RO, 50)
- PARAM(COMP.MODEL, "FAMILY(TYPE=CUSTOM IVL=0.16 IVH=0.4 OVL=0.01 OVH=0.01 ORL=50 ORH=50)")
- PARAM(SW.GOFF, 0) // This has to be zero to block current sources
-
- NET_C(VI.OP, CI1.IN, CI2.IN)
- NET_C(CI1.OP, VO.IP)
- NET_C(COMP.Q, SW.I)
- NET_C(CI2.OP, SW.2)
- NET_C(COMP.VCC, R_SHUNT.1)
- NET_C(SW.1, R_SHUNT.2)
- NET_C(SW.3, VO.IP)
- NET_C(VO.OP, COMP.IN)
-
- // Avoid singular Matrix due to G=0 switch
- RES(RX1, 1e10)
- RES(RX2, 1e10)
- NET_C(RX1.1, SW.1)
- NET_C(RX2.1, SW.3)
-
- NET_C(COMP.GND, RX1.2, RX2.2)
-
- RES(R1, 5000)
- RES(R2, 5000)
- RES(R3, 5000)
-
- // Square output wave
- VCVS(V_SQR, 1)
- NET_C(COMP.Q, V_SQR.IP)
-
- NET_C(COMP.GND, SW.GND, VI.ON, VI.IN, CI1.ON, CI2.ON, VO.IN, VO.ON, R2.2, V_SQR.IN, V_SQR.ON)
- NET_C(COMP.VCC, SW.VCC, R1.2)
- NET_C(COMP.IP, R1.1, R2.1, R3.1)
- NET_C(COMP.Q, R3.2)
-
- ALIAS(11, VI.ON) // GND
- ALIAS(9, V_SQR.OP) // Square out
- ALIAS(3, VO.OP) // Triag out
- ALIAS(8, VI.IP) // VC
- ALIAS(4, CI1.IP) // R1
- ALIAS(5, CI2.IP) // R2
- ALIAS(10, VO.IP) // C1
- ALIAS(6, COMP.VCC) // V+
+ VCVS(VI, 1)
+ CCCS(CI1, -1)
+ CCCS(CI2, 2)
+ SYS_COMPD(COMP)
+ SYS_DSW2(SW)
+ VCVS(VO, 1)
+ RES(R_SHUNT, RES_R(50))
+
+ PARAM(VO.RO, 50)
+ PARAM(COMP.MODEL, "FAMILY(TYPE=CUSTOM IVL=0.16 IVH=0.4 OVL=0.01 OVH=0.01 ORL=50 ORH=50)")
+ PARAM(SW.GOFF, 0) // This has to be zero to block current sources
+
+ NET_C(VI.OP, CI1.IN, CI2.IN)
+ NET_C(CI1.OP, VO.IP)
+ NET_C(COMP.Q, SW.I)
+ NET_C(CI2.OP, SW.2)
+ NET_C(COMP.VCC, R_SHUNT.1)
+ NET_C(SW.1, R_SHUNT.2)
+ NET_C(SW.3, VO.IP)
+ NET_C(VO.OP, COMP.IN)
+
+ // Avoid singular Matrix due to G=0 switch
+ RES(RX1, 1e10)
+ RES(RX2, 1e10)
+ NET_C(RX1.1, SW.1)
+ NET_C(RX2.1, SW.3)
+
+ NET_C(COMP.GND, RX1.2, RX2.2)
+
+ RES(R1, 5000)
+ RES(R2, 5000)
+ RES(R3, 5000)
+
+ // Square output wave
+ VCVS(V_SQR, 1)
+ NET_C(COMP.Q, V_SQR.IP)
+
+ NET_C(COMP.GND, SW.GND, VI.ON, VI.IN, CI1.ON, CI2.ON, VO.IN, VO.ON, R2.2, V_SQR.IN, V_SQR.ON)
+ NET_C(COMP.VCC, SW.VCC, R1.2)
+ NET_C(COMP.IP, R1.1, R2.1, R3.1)
+ NET_C(COMP.Q, R3.2)
+
+ ALIAS(11, VI.ON) // GND
+ ALIAS(9, V_SQR.OP) // Square out
+ ALIAS(3, VO.OP) // Triag out
+ ALIAS(8, VI.IP) // VC
+ ALIAS(4, CI1.IP) // R1
+ ALIAS(5, CI2.IP) // R2
+ ALIAS(10, VO.IP) // C1
+ ALIAS(6, COMP.VCC) // V+
NETLIST_END()
//
@@ -106,14 +106,14 @@ NETLIST_START(starfire)
ANALOG_INPUT(VM5, -5)
ALIAS(VCC, V5)
- TTL_INPUT(SIZE, 0) // active high
- TTL_INPUT(SEXPLO, 0) // active high
- TTL_INPUT(STIE, 0) // active high
- TTL_INPUT(SLASER, 0) // active high
- TTL_INPUT(TRACK, 0) // active high
- TTL_INPUT(LOCK, 0) // active high
- TTL_INPUT(SCANNER, 0) // active high
- TTL_INPUT(OHEAT, 0) // active high
+ TTL_INPUT(SIZE, 0) // active high
+ TTL_INPUT(SEXPLO, 0) // active high
+ TTL_INPUT(STIE, 0) // active high
+ TTL_INPUT(SLASER, 0) // active high
+ TTL_INPUT(TRACK, 0) // active high
+ TTL_INPUT(LOCK, 0) // active high
+ TTL_INPUT(SCANNER, 0) // active high
+ TTL_INPUT(OHEAT, 0) // active high
NET_C(VCC, SIZE.VCC, SEXPLO.VCC, STIE.VCC, SLASER.VCC, TRACK.VCC, LOCK.VCC, SCANNER.VCC, OHEAT.VCC)
NET_C(GND, SIZE.GND, SEXPLO.GND, STIE.GND, SLASER.GND, TRACK.GND, LOCK.GND, SCANNER.GND, OHEAT.GND)
diff --git a/src/mame/audio/nl_tankbatt.cpp b/src/mame/audio/nl_tankbatt.cpp
index 0e2345e6db9..ac19ef51f4d 100644
--- a/src/mame/audio/nl_tankbatt.cpp
+++ b/src/mame/audio/nl_tankbatt.cpp
@@ -26,12 +26,12 @@ NETLIST_START(tankbatt)
CLOCK(2V, 4000) // 18.432MHz / (3 * 384 * 2)
CLOCK(4V, 2000) // 18.432MHz / (3 * 384 * 4)
- TTL_INPUT(S1, 0) // active high
- TTL_INPUT(S2, 0) // active high
- TTL_INPUT(OFF, 1) // active high
- TTL_INPUT(ENGINE_HI, 0) // active high
- TTL_INPUT(SHOOT, 0) // active high
- TTL_INPUT(HIT, 0) // active high
+ TTL_INPUT(S1, 0) // active high
+ TTL_INPUT(S2, 0) // active high
+ TTL_INPUT(OFF, 1) // active high
+ TTL_INPUT(ENGINE_HI, 0) // active high
+ TTL_INPUT(SHOOT, 0) // active high
+ TTL_INPUT(HIT, 0) // active high
RES(R31, 470)
RES(R32, 470)
diff --git a/src/mame/audio/segaspeech.h b/src/mame/audio/segaspeech.h
index a9905ce05f5..81894b2ce25 100644
--- a/src/mame/audio/segaspeech.h
+++ b/src/mame/audio/segaspeech.h
@@ -21,7 +21,7 @@ class sega_speech_device : public device_t, public device_mixer_interface
public:
sega_speech_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
-// auto int_cb() { return m_int_cb.bind(); }
+// auto int_cb() { return m_int_cb.bind(); }
void data_w(uint8_t data);
void control_w(uint8_t data);
diff --git a/src/mame/drivers/abc1600.cpp b/src/mame/drivers/abc1600.cpp
index 1b48416616c..6c74c328f54 100644
--- a/src/mame/drivers/abc1600.cpp
+++ b/src/mame/drivers/abc1600.cpp
@@ -703,7 +703,7 @@ uint8_t abc1600_state::cio_pb_r()
PB7 FINT
*/
-
+
uint8_t data = 0;
data |= !m_sysscc << 5;
diff --git a/src/mame/drivers/apple2gs.cpp b/src/mame/drivers/apple2gs.cpp
index f68c9534966..8eaeee9e18a 100644
--- a/src/mame/drivers/apple2gs.cpp
+++ b/src/mame/drivers/apple2gs.cpp
@@ -4568,7 +4568,7 @@ static void apple2_cards(device_slot_interface &device)
// device.option_add("pcxport", A2BUS_PCXPORTER); /* Applied Engineering PC Transporter */
device.option_add("byte8251", A2BUS_BYTE8251); /* BYTE Magazine 8251 serial card */
// device.option_add("hostram", A2BUS_HOSTRAM); /* Slot 7 RAM for GS Plus host protocol */
-// device.option_add("ramfast", A2BUS_RAMFAST); /* C.V. Technologies RAMFast SCSI card */
+// device.option_add("ramfast", A2BUS_RAMFAST); /* C.V. Technologies RAMFast SCSI card */
device.option_add("cmsscsi", A2BUS_CMSSCSI); /* CMS Apple II SCSI Card */
}
diff --git a/src/mame/drivers/exidy.cpp b/src/mame/drivers/exidy.cpp
index cadddab8bed..0ffecf4aa16 100644
--- a/src/mame/drivers/exidy.cpp
+++ b/src/mame/drivers/exidy.cpp
@@ -1383,7 +1383,7 @@ ROM_START( venture )
ROM_LOAD( "vea_7a-3.7a", 0x7800, 0x0800, CRC(466addc7) SHA1(0230b5365d6aeee3ca47666a9eadee4141de125b) )
ROM_REGION( 0x0800, "gfx1", 0 )
-// ROM_LOAD( "11d-cpu", 0x0000, 0x0800, BAD_DUMP CRC(b4bb2503) SHA1(67303603b7c5e6301e976ef19f81c7519648b179) ) // bytes 0x536 & 0x537 have the high bit set (IE:0x80 instead of 0x00 in vel_11d-2.11d)
+// ROM_LOAD( "11d-cpu", 0x0000, 0x0800, BAD_DUMP CRC(b4bb2503) SHA1(67303603b7c5e6301e976ef19f81c7519648b179) ) // bytes 0x536 & 0x537 have the high bit set (IE:0x80 instead of 0x00 in vel_11d-2.11d)
ROM_LOAD( "vel_11d-2.11d", 0x0000, 0x0800, CRC(ea6fd981) SHA1(46b1658e1607423d5a073f14097c2a48d59057c0) )
ROM_REGION( 0x140, "proms", 0 )
diff --git a/src/mame/drivers/funworld.cpp b/src/mame/drivers/funworld.cpp
index 2d97088d3e2..c88c3901994 100644
--- a/src/mame/drivers/funworld.cpp
+++ b/src/mame/drivers/funworld.cpp
@@ -187,7 +187,7 @@
A) Encrypted CPU. At least five Fun World boards have custom encrypted CPUs:
- Joker Card from Vesely Svet, Mega Card, Power Card and Multi Win,
- use custom unknown CPUs and also encrypted/scrambled prg roms.
+ use custom unknown CPUs and also encrypted/scrambled prg roms.
- Royal Card (slovak, encrypted) from Evona Electronic seems to use a block
with CPU + extras (ICs, TTL, etc) to manage the encryption.
@@ -683,17 +683,17 @@ void funworld_state::funworld_lamp_a_w(uint8_t data)
-x-- ---- Hopper Motor (inverted).
x--- ---- HOLD4 lamp.
*/
- m_lamps[0] = BIT(~data, 1); // Hold1 (inverted)
- m_lamps[2] = BIT(~data, 1); // Hold3 (inverted, see pinouts)
+ m_lamps[0] = BIT(~data, 1); // Hold1 (inverted)
+ m_lamps[2] = BIT(~data, 1); // Hold3 (inverted, see pinouts)
- m_lamps[1] = BIT(~data, 3); // Hold2 / Low (inverted)
- m_lamps[3] = BIT(data, 7); // Hold4 / High
- m_lamps[5] = BIT(~data, 5); // Cancel / Collect (inverted)
+ m_lamps[1] = BIT(~data, 3); // Hold2 / Low (inverted)
+ m_lamps[3] = BIT(data, 7); // Hold4 / High
+ m_lamps[5] = BIT(~data, 5); // Cancel / Collect (inverted)
- machine().bookkeeping().coin_counter_w(0, data & 0x01); // Credit In counter
- machine().bookkeeping().coin_counter_w(7, data & 0x04); // Credit Out counter, mapped as coin 8
+ machine().bookkeeping().coin_counter_w(0, data & 0x01); // Credit In counter
+ machine().bookkeeping().coin_counter_w(7, data & 0x04); // Credit Out counter, mapped as coin 8
- m_lamps[7] = BIT(~data, 6); // Hopper Motor (inverted)
+ m_lamps[7] = BIT(~data, 6); // Hopper Motor (inverted)
// popmessage("Lamps A: %02X", (data ^ 0xff));
}
@@ -707,8 +707,8 @@ void funworld_state::funworld_lamp_b_w(uint8_t data)
---- -x-- Unknown (inverted).
xxxx x--- Unknown.
*/
- m_lamps[4] = BIT(data, 0); // Hold5 / Bet
- m_lamps[6] = BIT(data, 1); // Start / Deal / Draw
+ m_lamps[4] = BIT(data, 0); // Hold5 / Bet
+ m_lamps[6] = BIT(data, 1); // Start / Deal / Draw
// popmessage("Lamps B: %02X", data);
}
@@ -789,9 +789,9 @@ void funworld_state::magicrd2_map(address_map &map)
map(0x0c00, 0x0c01).w("ay8910", FUNC(ay8910_device::address_data_w));
map(0x0e00, 0x0e00).w("crtc", FUNC(mc6845_device::address_w));
map(0x0e01, 0x0e01).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w));
- map(0x2c00, 0x2cff).ram(); // range for protection
- map(0x3600, 0x36ff).ram(); // some games use $3603-05 range for protection
- map(0x3c00, 0x3cff).ram(); // range for protection
+ map(0x2c00, 0x2cff).ram(); // range for protection
+ map(0x3600, 0x36ff).ram(); // some games use $3603-05 range for protection
+ map(0x3c00, 0x3cff).ram(); // range for protection
map(0x4000, 0x4fff).ram().w(FUNC(funworld_state::funworld_videoram_w)).share("videoram");
map(0x5000, 0x5fff).ram().w(FUNC(funworld_state::funworld_colorram_w)).share("colorram");
map(0x6000, 0xffff).rom();
@@ -806,9 +806,9 @@ void funworld_state::cuoreuno_map(address_map &map)
map(0x0c00, 0x0c01).w("ay8910", FUNC(ay8910_device::address_data_w));
map(0x0e00, 0x0e00).w("crtc", FUNC(mc6845_device::address_w));
map(0x0e01, 0x0e01).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w));
- map(0x2000, 0x2000).nopr(); // some unknown reads
- map(0x3e00, 0x3fff).ram(); // some games use $3e03-05 range for protection
- map(0x4000, 0x5fff).rom(); // used by rcdino4 (dino4 hw )
+ map(0x2000, 0x2000).nopr(); // some unknown reads
+ map(0x3e00, 0x3fff).ram(); // some games use $3e03-05 range for protection
+ map(0x4000, 0x5fff).rom(); // used by rcdino4 (dino4 hw )
map(0x6000, 0x6fff).ram().w(FUNC(funworld_state::funworld_videoram_w)).share("videoram");
map(0x7000, 0x7fff).ram().w(FUNC(funworld_state::funworld_colorram_w)).share("colorram");
map(0x8000, 0xffff).rom();
@@ -1184,7 +1184,7 @@ static INPUT_PORTS_START( jolycdit )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, "Joker" ) PORT_DIPLOCATION("SW1:3")
- PORT_DIPSETTING( 0x00, "With Joker" ) // also enables Five of a Kind
+ PORT_DIPSETTING( 0x00, "With Joker" ) // also enables Five of a Kind
PORT_DIPSETTING( 0x20, "Without Joker" )
PORT_DIPNAME( 0x40, 0x00, "Hold" ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x00, "Auto Hold" )
@@ -1246,11 +1246,11 @@ static INPUT_PORTS_START( jolycdib )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, "Joker" ) PORT_DIPLOCATION("SW1:3")
- PORT_DIPSETTING( 0x00, "With Joker" ) // also enables Five of a Kind
+ PORT_DIPSETTING( 0x00, "With Joker" ) // also enables Five of a Kind
PORT_DIPSETTING( 0x20, "Without Joker" )
PORT_DIPNAME( 0x40, 0x00, "Auto Hold" ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) ) // when is ON, allows the player to activate/deactivate the autohold through CANCEL button
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) ) // when is ON, allows the player to activate/deactivate the autohold through CANCEL button
// after nvram init, set the following one to 'manual'
// to allow the remote credits mode to work
@@ -1308,11 +1308,11 @@ static INPUT_PORTS_START( jolycdic )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, "Joker" ) PORT_DIPLOCATION("SW1:3")
- PORT_DIPSETTING( 0x00, "With Joker" ) // also enables Five of a Kind
+ PORT_DIPSETTING( 0x00, "With Joker" ) // also enables Five of a Kind
PORT_DIPSETTING( 0x20, "Without Joker" )
PORT_DIPNAME( 0x40, 0x00, "Auto Hold" ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) ) // when is ON, allows the player to activate/deactivate the autohold through CANCEL button
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) ) // when is ON, allows the player to activate/deactivate the autohold through CANCEL button
PORT_DIPNAME( 0x80, 0x00, "Payout" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, "Hopper" )
PORT_DIPSETTING( 0x80, "Manual Payout SW" )
@@ -1543,7 +1543,7 @@ static INPUT_PORTS_START( magicrd2 )
PORT_DIPNAME( 0x01, 0x01, "State" ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, "Keyboard Test" )
PORT_DIPSETTING( 0x01, "Play" )
- PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:7") // remote credits settings are always 10 points/pulse
+ PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:7") // remote credits settings are always 10 points/pulse
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:6")
@@ -1605,7 +1605,7 @@ static INPUT_PORTS_START( royalcrd )
PORT_DIPNAME( 0x01, 0x01, "State" ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, "Keyboard Test" )
PORT_DIPSETTING( 0x01, "Play" )
- PORT_DIPNAME( 0x02, 0x02, "Remote Value" ) PORT_DIPLOCATION("SW1:7") // listed as 'Coin-C' in some sources
+ PORT_DIPNAME( 0x02, 0x02, "Remote Value" ) PORT_DIPLOCATION("SW1:7") // listed as 'Coin-C' in some sources
PORT_DIPSETTING( 0x00, "10 Points/Pulse" )
PORT_DIPSETTING( 0x02, "100 Points/Pulse" )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:6")
@@ -1782,7 +1782,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( cuoreuno )
PORT_START("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1 / Switch Bet (1-Max)")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Bet / Prendi (Take)")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Gioca (Play)")
@@ -1843,7 +1843,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( pool10 )
PORT_START("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1 / Switch Bet (1-Max)")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Bet / Prendi (Take)")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Gioca (Play)")
@@ -1903,7 +1903,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( lunapark )
PORT_START("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1 / Switch Bet (1-Max)")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Bet / Prendi (Take)")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Gioca (Play)")
@@ -1960,8 +1960,8 @@ static INPUT_PORTS_START( lunapark )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
// the following one is connected to 1st DSW and is meant
-// for switch between different programs stored in different
-// halves of the program ROM
+// for switch between different programs stored in different
+// halves of the program ROM
PORT_START("SELDSW")
PORT_DIPNAME( 0x01, 0x00, "Game Selector" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, "PROGRAM 1, (5 TIRI LIRE 500, ABILITA VINTE)" )
@@ -2656,7 +2656,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( chinatow )
PORT_START("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1 / Switch Bet (1-Max)")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Bet / Prendi (Take)")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Gioca (Play) / Gmable")
@@ -2713,7 +2713,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( rcdino4 )
PORT_START("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Bet")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start")
@@ -2770,7 +2770,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( royal )
PORT_START("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // no remote credits
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1 / Switch Bet (1-Max)")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Bet / Prendi (Take)")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Gioca (Play)")
@@ -2920,11 +2920,11 @@ static const gfx_layout charlayout =
in the first and second half of the bipolar PROM.
*/
-static GFXDECODE_START( gfx_fw1stpal ) // Adressing the first half of the palette
+static GFXDECODE_START( gfx_fw1stpal ) // Adressing the first half of the palette
GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 16 )
GFXDECODE_END
-static GFXDECODE_START( gfx_fw2ndpal ) // Adressing the second half of the palette
+static GFXDECODE_START( gfx_fw2ndpal ) // Adressing the second half of the palette
GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0x100, 16 )
GFXDECODE_END
@@ -3031,7 +3031,7 @@ void lunapark_state::machine_reset()
void funworld_state::fw1stpal(machine_config &config)
{
// basic machine hardware
- M65SC02(config, m_maincpu, CPU_CLOCK); // 2 MHz.
+ M65SC02(config, m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::funworld_map);
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
@@ -3050,14 +3050,14 @@ void funworld_state::fw1stpal(machine_config &config)
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_refresh_hz(60);
screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
- screen.set_size((124+1)*4, (30+1)*8); // Taken from MC6845 init, registers 00 & 04. Normally programmed with (value-1)
- screen.set_visarea(0*4, 96*4-1, 0*8, 29*8-1); // Taken from MC6845 init, registers 01 & 06
+ screen.set_size((124+1)*4, (30+1)*8); // Taken from MC6845 init, registers 00 & 04. Normally programmed with (value-1)
+ screen.set_visarea(0*4, 96*4-1, 0*8, 29*8-1); // Taken from MC6845 init, registers 01 & 06
screen.set_screen_update(FUNC(funworld_state::screen_update_funworld));
GFXDECODE(config, m_gfxdecode, m_palette, gfx_fw1stpal);
PALETTE(config, m_palette, FUNC(funworld_state::funworld_palette), 0x200);
- mc6845_device &crtc(MC6845(config, "crtc", CRTC_CLOCK)); // 2 MHz, verified on jollycrd & royalcrd
+ mc6845_device &crtc(MC6845(config, "crtc", CRTC_CLOCK)); // 2 MHz, verified on jollycrd & royalcrd
crtc.set_screen("screen");
crtc.set_show_border_area(false);
crtc.set_char_width(4);
@@ -3066,10 +3066,10 @@ void funworld_state::fw1stpal(machine_config &config)
// sound hardware
SPEAKER(config, "mono").front_center();
- ay8910_device &ay8910(AY8910(config, "ay8910", SND_CLOCK)); // 2 MHz.
+ ay8910_device &ay8910(AY8910(config, "ay8910", SND_CLOCK)); // 2 MHz.
ay8910.port_a_write_callback().set(FUNC(funworld_state::funworld_lamp_a_w));
ay8910.port_b_write_callback().set(FUNC(funworld_state::funworld_lamp_b_w));
- ay8910.add_route(ALL_OUTPUTS, "mono", 2.5); // analyzed to avoid clips
+ ay8910.add_route(ALL_OUTPUTS, "mono", 2.5); // analyzed to avoid clips
}
@@ -3077,7 +3077,7 @@ void funworld_state::fw2ndpal(machine_config &config)
{
fw1stpal(config);
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::funworld_map);
m_gfxdecode->set_info(gfx_fw2ndpal);
@@ -3090,7 +3090,7 @@ void funworld_state::funquiz(machine_config &config)
fw1stpal(config); // gray background.
// fw2ndpal(config); // blue background.
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::funquiz_map);
subdevice<ay8910_device>("ay8910")->port_a_read_callback().set(FUNC(funworld_state::funquiz_ay8910_a_r));
@@ -3102,15 +3102,15 @@ void magicrd2_state::magicrd2(machine_config &config)
{
fw1stpal(config);
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &magicrd2_state::magicrd2_map);
subdevice<mc6845_device>("crtc")->set_visarea_adjust(0, -56, 0, 0);
- ay8910_device &ay8910(AY8910(config.replace(), "ay8910", SND_CLOCK)); // 2 MHz.
+ ay8910_device &ay8910(AY8910(config.replace(), "ay8910", SND_CLOCK)); // 2 MHz.
ay8910.port_a_write_callback().set(FUNC(magicrd2_state::funworld_lamp_a_w));
ay8910.port_b_write_callback().set(FUNC(magicrd2_state::funworld_lamp_b_w));
- ay8910.add_route(ALL_OUTPUTS, "mono", 1.5); // analyzed to avoid clips
+ ay8910.add_route(ALL_OUTPUTS, "mono", 1.5); // analyzed to avoid clips
}
@@ -3118,7 +3118,7 @@ void funworld_state::royalcd1(machine_config &config)
{
fw1stpal(config);
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // (G65SC02P in pro version) 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // (G65SC02P in pro version) 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::magicrd2_map);
}
@@ -3127,7 +3127,7 @@ void funworld_state::royalcd2(machine_config &config)
{
fw2ndpal(config);
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::magicrd2_map);
}
@@ -3136,7 +3136,7 @@ void funworld_state::cuoreuno(machine_config &config)
{
fw1stpal(config);
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::cuoreuno_map);
}
@@ -3145,7 +3145,7 @@ void funworld_state::saloon(machine_config &config)
{
fw1stpal(config);
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::saloon_map);
config.device_remove("pia0");
@@ -3160,7 +3160,7 @@ void funworld_state::witchryl(machine_config &config)
{
fw1stpal(config);
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::witchryl_map);
}
@@ -3169,7 +3169,7 @@ void lunapark_state::lunapark(machine_config &config)
{
fw1stpal(config);
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &lunapark_state::lunapark_map); // mirrored video RAM (4000/5000 to 6000/7000).
}
@@ -3178,7 +3178,7 @@ void chinatow_state::chinatow(machine_config &config)
{
fw2ndpal(config);
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &chinatow_state::chinatow_map);
}
@@ -3186,7 +3186,7 @@ void chinatow_state::rcdino4(machine_config &config)
{
fw1stpal(config);
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &chinatow_state::chinatow_map);
}
@@ -3195,7 +3195,7 @@ void intergames_state::intrgmes(machine_config &config)
{
fw1stpal(config);
- M65SC02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ M65SC02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &intergames_state::intergames_map);
//m_maincpu->set_periodic_int(FUNC(intergames_state::nmi_line_pulse), attotime::from_hz(60));
@@ -3207,7 +3207,7 @@ void funworld_state::fw_brick_1(machine_config &config)
{
fw1stpal(config);
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::fw_brick_map);
NVRAM(config, "nvram1", nvram_device::DEFAULT_ALL_0);
@@ -3218,7 +3218,7 @@ void funworld_state::fw_brick_2(machine_config &config)
{
fw2ndpal(config);
- R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
+ R65C02(config.replace(), m_maincpu, CPU_CLOCK); // 2 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::fw_brick_map);
NVRAM(config, "nvram1", nvram_device::DEFAULT_ALL_0);
@@ -3227,7 +3227,7 @@ void funworld_state::fw_brick_2(machine_config &config)
void funworld_state::gratispk(machine_config &config)
{
-// fw1stpal(config); // card deck wrong colors.
+// fw1stpal(config); // card deck wrong colors.
fw2ndpal(config); // correct palette
m_maincpu->set_addrmap(AS_PROGRAM, &funworld_state::gratispk_map);
@@ -3831,7 +3831,7 @@ ROM_START( jollycrd )
ROM_LOAD( "jolycard.ch2", 0x0000, 0x8000, CRC(c512b103) SHA1(1f4e78e97855afaf0332fb75e1b5571aafd01c29) )
ROM_LOAD( "jolycard.ch1", 0x8000, 0x8000, CRC(0f24f39d) SHA1(ac1f6a8a4a2a37cbc0d45c15187b33c25371bffb) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jollycrd_nvram.bin", 0x0000, 0x0800, CRC(8f0a86c9) SHA1(467bd4f601ac6aa818c036f1269c2d43d27854f6) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -3867,13 +3867,13 @@ ROM_START( jollycrda )
ROM_LOAD( "tab3.bin", 0x0000, 0x8000, CRC(c512b103) SHA1(1f4e78e97855afaf0332fb75e1b5571aafd01c29) )
ROM_LOAD( "tab2.bin", 0x8000, 0x8000, CRC(0f24f39d) SHA1(ac1f6a8a4a2a37cbc0d45c15187b33c25371bffb) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM. the game doesn't work without it
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM. the game doesn't work without it
ROM_LOAD( "jollycrda_nvram.bin", 0x0000, 0x0800, CRC(5cbb4d8f) SHA1(da5edbef20bb4f0c634939389b3a9744c5743641) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "jop.bin", 0x0000, 0x0200, CRC(5ebc5659) SHA1(8d59011a181399682ab6e8ed14f83101e9bfa0c6) )
- ROM_REGION( 0x0200, "plds", 0 ) // cracked PLD
+ ROM_REGION( 0x0200, "plds", 0 ) // cracked PLD
ROM_LOAD( "tab1.0_gal16v8s.bin", 0x0000, 0x0117, CRC(574f9a48) SHA1(bb5e2e86da85130d92f61cc57038a844950f443e) )
ROM_END
@@ -3886,7 +3886,7 @@ ROM_START( jolyc3x3 )
ROM_LOAD( "jolycard.ch2", 0x0000, 0x8000, CRC(c512b103) SHA1(1f4e78e97855afaf0332fb75e1b5571aafd01c29) )
ROM_LOAD( "jolycard.ch1", 0x8000, 0x8000, CRC(0f24f39d) SHA1(ac1f6a8a4a2a37cbc0d45c15187b33c25371bffb) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolyc3x3_nvram.bin", 0x0000, 0x0800, CRC(727c70cf) SHA1(3639b0891514064e21ebdb280791cc9c8f5ba481) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -3951,7 +3951,7 @@ ROM_END
*/
ROM_START( jolycmzs )
- ROM_REGION( 0x10000, "maincpu", 0 ) // MZS Tech
+ ROM_REGION( 0x10000, "maincpu", 0 ) // MZS Tech
ROM_LOAD( "mzstech.bin", 0x8000, 0x8000, CRC(cebd1e56) SHA1(24d88b3383cecf3829556d75460053663aab4ef1) )
ROM_REGION( 0x10000, "gfx1", 0 )
@@ -3960,11 +3960,11 @@ ROM_START( jolycmzs )
/* Load a default NVRAM, otherwise an annoying password system appears
generating a code that needs to be parsed by a PC-DOS program, that
- is currently missing and never would appear. This program is supossed
- to give back an hexa code to feed in the game through a combination
- of inputs.
+ is currently missing and never would appear. This program is supossed
+ to give back an hexa code to feed in the game through a combination
+ of inputs.
*/
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolycmzs_nvram.bin", 0x0000, 0x0800, CRC(828ffeef) SHA1(6a52282231f1944ba79049f267a9c1941373aea2) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -3972,7 +3972,7 @@ ROM_START( jolycmzs )
ROM_END
ROM_START( jolyc980 )
- ROM_REGION( 0x10000, "maincpu", 0 ) // Spale Soft
+ ROM_REGION( 0x10000, "maincpu", 0 ) // Spale Soft
ROM_LOAD( "j980.bin", 0x8000, 0x8000, CRC(48249fff) SHA1(390cd0eb3399446a66363dc6760458170e1970fd) )
ROM_REGION( 0x10000, "gfx1", 0 )
@@ -3981,11 +3981,11 @@ ROM_START( jolyc980 )
/* Load a default NVRAM, otherwise an annoying password system appears
generating a code that needs to be parsed by a PC-DOS program, that
- is currently missing and never would appear. This program is supossed
- to give back an hexa code to feed in the game through a combination
- of inputs.
+ is currently missing and never would appear. This program is supossed
+ to give back an hexa code to feed in the game through a combination
+ of inputs.
*/
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolyc980_nvram.bin", 0x0000, 0x0800, CRC(ef2c89c7) SHA1(a286001e205dcd16d914e07ba2b7c820335ab9c2) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -3993,7 +3993,7 @@ ROM_START( jolyc980 )
ROM_END
-ROM_START( jolycdev ) // Jolly Card (lipa) from Evona
+ROM_START( jolycdev ) // Jolly Card (lipa) from Evona
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "lipa.bin", 0x8000, 0x8000, CRC(62657c98) SHA1(237466dde26540c119c631c75f51c87ea59d1a91) )
@@ -4001,7 +4001,7 @@ ROM_START( jolycdev ) // Jolly Card (lipa) from Evona
ROM_LOAD( "jollyb.bin", 0x0000, 0x8000, CRC(c512b103) SHA1(1f4e78e97855afaf0332fb75e1b5571aafd01c29) )
ROM_LOAD( "jollya.bin", 0x8000, 0x8000, CRC(0f24f39d) SHA1(ac1f6a8a4a2a37cbc0d45c15187b33c25371bffb) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolycdev_nvram.bin", 0x0000, 0x0800, CRC(ae2c2fb8) SHA1(912d673ea8e26ff62520a7b86e702e5260cff4c0) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -4030,7 +4030,7 @@ ROM_END
Only remote credits, as can be seen in test mode.
*/
-ROM_START( jolyccra ) // Jolly Card (Croatian, set 1)
+ROM_START( jolyccra ) // Jolly Card (Croatian, set 1)
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "jollyc.bin", 0x8000, 0x8000, CRC(8926d99d) SHA1(dd5d1ac03d30d823dfcfe1349328ecb7afbc37fa) )
@@ -4038,7 +4038,7 @@ ROM_START( jolyccra ) // Jolly Card (Croatian, set 1)
ROM_LOAD( "jollyb.bin", 0x0000, 0x8000, CRC(c512b103) SHA1(1f4e78e97855afaf0332fb75e1b5571aafd01c29) )
ROM_LOAD( "jollya.bin", 0x8000, 0x8000, CRC(0f24f39d) SHA1(ac1f6a8a4a2a37cbc0d45c15187b33c25371bffb) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolyccra_nvram.bin", 0x0000, 0x0800, CRC(478ab0a9) SHA1(8c5160d2ac8d4a9db0ae1e478d3bb1513a04544f) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -4046,7 +4046,7 @@ ROM_START( jolyccra ) // Jolly Card (Croatian, set 1)
ROM_END
-ROM_START( jolyccrb ) // Jolly Card (Croatian, set 2)
+ROM_START( jolyccrb ) // Jolly Card (Croatian, set 2)
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "jollypkr.003", 0x8000, 0x8000, CRC(ea7340b4) SHA1(7dd468f28a488a4781521809d06db1d7917048ad) )
@@ -4054,7 +4054,7 @@ ROM_START( jolyccrb ) // Jolly Card (Croatian, set 2)
ROM_LOAD( "jolycard.ch2", 0x0000, 0x8000, CRC(c512b103) SHA1(1f4e78e97855afaf0332fb75e1b5571aafd01c29) )
ROM_LOAD( "jolycard.ch1", 0x8000, 0x8000, CRC(0f24f39d) SHA1(ac1f6a8a4a2a37cbc0d45c15187b33c25371bffb) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolyccrb_nvram.bin", 0x0000, 0x0800, CRC(c1d49c88) SHA1(27ffdedfc7f09ff11c3b2537db3681473b776074) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -4084,7 +4084,7 @@ ROM_END
- 1x trimmer (volume)(missing)
*/
-ROM_START( jolycdit ) // blue TAB PCB, encrypted graphics
+ROM_START( jolycdit ) // blue TAB PCB, encrypted graphics
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "jn.bin", 0x8000, 0x8000, CRC(6ae00ed0) SHA1(5921c2882aeb5eadd0e04a477fa505ad35e9d98c) )
@@ -4092,7 +4092,7 @@ ROM_START( jolycdit ) // blue TAB PCB, encrypted graphics
ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(46805150) SHA1(63687ac44f6ace6d8924b2629536bcc7d3979ed2) )
ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(43bcb2df) SHA1(5022bc3a0b852a7cd433e25c3c90a720e6328261) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolycdit_nvram.bin", 0x0000, 0x0800, CRC(c55c6706) SHA1(a38ae926f057fb47e48ca841b2d097fc4fd06416) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -4134,7 +4134,7 @@ ROM_END
Only remote credits, as can be seen in test mode.
*/
-ROM_START( jolycdib ) // bootleg PCB, encrypted graphics
+ROM_START( jolycdib ) // bootleg PCB, encrypted graphics
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "3.bin", 0x8000, 0x8000, CRC(c76fdc79) SHA1(fc75c274d64fa9c99a546d424f38e79f1acf2576) )
@@ -4142,7 +4142,7 @@ ROM_START( jolycdib ) // bootleg PCB, encrypted graphics
ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(46805150) SHA1(63687ac44f6ace6d8924b2629536bcc7d3979ed2) ) // sldh
ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(43bcb2df) SHA1(5022bc3a0b852a7cd433e25c3c90a720e6328261) ) // sldh
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolycdib_nvram.bin", 0x0000, 0x0800, CRC(038a71fe) SHA1(99d3befbee8f9f86ce7f074de7f16fb25053c077) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -4168,18 +4168,18 @@ ROM_END
buttons.
*/
-ROM_START( jolycdic ) // another bootleg PCB, encrypted graphics
+ROM_START( jolycdic ) // another bootleg PCB, encrypted graphics
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "3ss.bin", 0x8000, 0x8000, CRC(3d7cde61) SHA1(6154878491f4d2f1ea035d18cdf43154c550d509) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(32c24495) SHA1(0d78c4d2743401b5ec9919d09814064eeac8023f) ) // sldh
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(91093176) SHA1(b889c617f94161933c35c324c7d84fec182953d8) ) // sldh
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolycdic_nvram.bin", 0x0000, 0x0800, CRC(47a5890b) SHA1(6a6531fe5e8f6c1b5a9aac314b2cce6a0129f6da) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -4197,7 +4197,7 @@ ROM_END
Encrypted GFX.
Differences: 1 byte.
-
+
jolycdib jolycdic
C1D6: 0x60 0x10
@@ -4206,7 +4206,7 @@ ROM_END
C1E7: sta $0000 sta $0000
C1EA: sta $0003 sta $0003
C1ED: sta $07f8 sta $07f8
-
+
*/
ROM_START( jolycdii )
ROM_REGION( 0x10000, "maincpu", 0 )
@@ -4216,12 +4216,12 @@ ROM_START( jolycdii )
ROM_LOAD( "145-2.bin", 0x0000, 0x8000, CRC(46805150) SHA1(63687ac44f6ace6d8924b2629536bcc7d3979ed2) )
ROM_LOAD( "145-1.bin", 0x8000, 0x8000, CRC(43bcb2df) SHA1(5022bc3a0b852a7cd433e25c3c90a720e6328261) )
- ROM_REGION( 0x0800, "nvram", 0 ) // Default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // Default NVRAM
ROM_LOAD( "jolycdii_nvram.bin", 0x0000, 0x0800, CRC(c2a138ad) SHA1(463fed8b495fa5286513f52fa09cf97f29e5f40e) )
- ROM_REGION( 0x0800, "proms", 0 ) // Not a bipolar PROM. Just a replacement.
+ ROM_REGION( 0x0800, "proms", 0 ) // Not a bipolar PROM. Just a replacement.
ROM_LOAD( "ws57c291_d27hc65d.bin", 0x0000, 0x0200, CRC(d96f3760) SHA1(07e80baf9c6c08171195b7810261e043197a9c3c) )
- ROM_IGNORE( 0x0600 ) // empty
+ ROM_IGNORE( 0x0600 ) // empty
ROM_REGION( 0x0200, "plds", 0 )
ROM_LOAD( "gal16v8b.bin", 0x0000, 0x0117, NO_DUMP )
@@ -4267,17 +4267,17 @@ ROM_END
1x Unknown POT between two caps, maybe for sound amp stage.
*/
-ROM_START( jolycdid ) // Altera EP910PC CPLD
+ROM_START( jolycdid ) // Altera EP910PC CPLD
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "5.cpu", 0x8000, 0x8000, CRC(56158851) SHA1(abf1daad1198dcc017352742e3c00d57e8955bd4) )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "7.bin", 0x0000, 0x8000, CRC(a4452751) SHA1(a0b32a8801ebaee7ede7873b244f1a424433fe94) )
- ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL
+ ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL
ROM_LOAD( "6.bin", 0x8000, 0x8000, CRC(8b64d4c6) SHA1(8106cba31cd3fbda0855e6070182d248e3d52495) )
- ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL
+ ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolycdid_nvram.bin", 0x0000, 0x0800, CRC(6eb66015) SHA1(39490cf5d404c9e9fb58439f6d9876a3e9b29ba0) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -4297,7 +4297,7 @@ ROM_END
used by another program.
*/
-ROM_START( jolycdie ) // Bootleg PCB, NON encrypted graphics
+ROM_START( jolycdie ) // Bootleg PCB, NON encrypted graphics
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "aic.cpu", 0x8000, 0x8000, CRC(56158851) SHA1(abf1daad1198dcc017352742e3c00d57e8955bd4) )
@@ -4305,7 +4305,7 @@ ROM_START( jolycdie ) // Bootleg PCB, NON encrypted graphics
ROM_LOAD( "c.bin", 0x0000, 0x8000, CRC(eff5362c) SHA1(1c9a48866dc5ee37fad6d68465f326d243c821c3) )
ROM_LOAD( "b.bin", 0x8000, 0x8000, CRC(98309e14) SHA1(0d3e3766768fafc728a08668ad693f950d1fabab) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolycdie_nvram.bin", 0x0000, 0x0800, CRC(1b2fba44) SHA1(be5c956517072581edaebe9ae440a542964c8490) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -4321,15 +4321,15 @@ ROM_END
5 & 6 are coins.
W is payout.
*/
-ROM_START( jolycdif ) // Altera EP910PC CPLD
+ROM_START( jolycdif ) // Altera EP910PC CPLD
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(80983f6a) SHA1(222ce5d4800887de92a73decbad31e96f8da3b4a) )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(a4452751) SHA1(a0b32a8801ebaee7ede7873b244f1a424433fe94) )
- ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL
+ ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL
ROM_LOAD( "3.bin", 0x8000, 0x8000, CRC(2856c82d) SHA1(7ce835bc2246ffede180cff0d8d0d4528afcc297) )
- ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL
+ ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "82s147.bin", 0x0000, 0x0200, CRC(5ebc5659) SHA1(8d59011a181399682ab6e8ed14f83101e9bfa0c6) ) // proper dump
@@ -4390,9 +4390,9 @@ ROM_START( jolycdih )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "3.bin", 0x0000, 0x8000, CRC(a4452751) SHA1(a0b32a8801ebaee7ede7873b244f1a424433fe94) )
- ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL
+ ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL
ROM_LOAD( "2.bin", 0x8000, 0x8000, CRC(8b64d4c6) SHA1(8106cba31cd3fbda0855e6070182d248e3d52495) )
- ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL
+ ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half. 1ST AND 2ND HALF IDENTICAL
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "dm74s472n.bin", 0x0000, 0x0200, CRC(5ebc5659) SHA1(8d59011a181399682ab6e8ed14f83101e9bfa0c6) )
@@ -4401,11 +4401,11 @@ ROM_START( jolycdih )
ROM_LOAD( "ep910.bin", 0x0000, 0x0884, CRC(aa62207e) SHA1(a2e51cf3617d07ff1ce42ee1d56e1c17b6fe71de) )
ROM_LOAD( "pal16v8h-25pc-4.bin", 0x0900, 0x0117, CRC(df5be97d) SHA1(8cd63d49ab7020cdec07c1198413dc7d93e90d35) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolycdih_nvram.bin", 0x0000, 0x0800, CRC(02b3b335) SHA1(207a1289e4298d942e4806adf8ffb87e0b9b4e58) )
ROM_END
-ROM_START( sjcd2kx3 ) // Super Joly 2000 3x
+ROM_START( sjcd2kx3 ) // Super Joly 2000 3x
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "sj3.bin", 0x8000, 0x8000, CRC(c530b518) SHA1(36934d8e1e2cb2f71eb44a05b86ec970c9f398cd) )
@@ -4413,7 +4413,7 @@ ROM_START( sjcd2kx3 ) // Super Joly 2000 3x
ROM_LOAD( "sj2.bin", 0x0000, 0x8000, CRC(d7253325) SHA1(ad40e662519da9b11f77690b7d41c5007f74e280) )
ROM_LOAD( "sj1.bin", 0x8000, 0x8000, CRC(82741749) SHA1(d0bf3073dff9ba1c4913fd754f965951e9cb5b03) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "sjcd2kx3_nvram.bin", 0x0000, 0x0800, CRC(1141368b) SHA1(b4af2d59b5e8115440e1219a621cfd2fb8c2c978) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -4579,7 +4579,7 @@ ROM_START( bigdeal )
ROM_LOAD( "poker4.003", 0x0000, 0x8000, CRC(8c33a15f) SHA1(a1c8451c99a23eeffaedb21d1a1b69f54629f8ab) )
ROM_LOAD( "poker4.002", 0x8000, 0x8000, CRC(5f4e12d8) SHA1(014b2364879faaf4922cdb82ee07692389f20c2d) )
- ROM_REGION( 0x0200, "proms", 0 ) // using joker card palette till a correct dump appear
+ ROM_REGION( 0x0200, "proms", 0 ) // using joker card palette till a correct dump appear
ROM_LOAD( "jokercrd_prom.bin", 0x0000, 0x0200, BAD_DUMP CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) )
ROM_END
@@ -4592,7 +4592,7 @@ ROM_START( bigdealb )
ROM_LOAD( "poker4.003", 0x0000, 0x8000, CRC(8c33a15f) SHA1(a1c8451c99a23eeffaedb21d1a1b69f54629f8ab) )
ROM_LOAD( "poker4.002", 0x8000, 0x8000, CRC(5f4e12d8) SHA1(014b2364879faaf4922cdb82ee07692389f20c2d) )
- ROM_REGION( 0x0200, "proms", 0 ) // using joker card palette till a correct dump appear
+ ROM_REGION( 0x0200, "proms", 0 ) // using joker card palette till a correct dump appear
ROM_LOAD( "jokercrd_prom.bin", 0x0000, 0x0200, BAD_DUMP CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) )
ROM_END
@@ -4627,16 +4627,16 @@ ROM_START( cuoreuno )
ROM_LOAD( "cuore1b.u21", 0x0000, 0x8000, CRC(14eca2b8) SHA1(35cba415800c6cd3e6ed9946057f33510ad2bfc9) )
ROM_LOAD( "cuore1c.u22", 0x8000, 0x8000, CRC(253fac84) SHA1(1ad104ab8e8d73df6397a840a4b26565b245d7a3) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "cuoreuno_nvram.bin", 0x0000, 0x0800, CRC(b5a1bf25) SHA1(c2996a28c080debf10ab7a7dc47c305aed172a83) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "am27s29_cu.bin", 0x0000, 0x0200, CRC(7ea61749) SHA1(3167acd79f9bda2078c2af3e049ad6abf160aeae) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h_cu.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "palce20v8h_cu.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "palce20v8h_cu.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_cu.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_cu.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_cu.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
@@ -4667,24 +4667,24 @@ ROM_END
ROM_START( elephfam )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "eleph_a.u2", 0x8000, 0x8000, CRC(8392b842) SHA1(74c850c734ca8174167b2f826b9b1ac902669392) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "eleph_b.u21", 0x0000, 0x8000, CRC(e3612670) SHA1(beb65f7d2bd6d7bc68cfd876af51910cf6417bd0) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "eleph_c.u22", 0x8000, 0x8000, CRC(4b909bf3) SHA1(a822b12126bc58af6d3f999ab2117370015a039b) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "elephfam_nvram.bin", 0x0000, 0x0800, CRC(fb9b1100) SHA1(cf15ce55042f1c4399fec480c2f862622905a8b5) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "am27s29_ef.u25", 0x0000, 0x0200, CRC(bca8b82a) SHA1(4aa19f5ecd9953bf8792dceb075a746f77c01cfc) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h_ef.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "palce20v8h_ef.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "palce20v8h_ef.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_ef.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_ef.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_ef.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
@@ -4696,16 +4696,16 @@ ROM_START( elephfmb )
ROM_LOAD( "elephb.u21", 0x0000, 0x8000, CRC(3c60549c) SHA1(c839b3ea415a877e5eac04e0522c342cce8d6e64) )
ROM_LOAD( "elephc.u20", 0x8000, 0x8000, CRC(448ba955) SHA1(2785cbc8cd42a7dda85bd8b81d5fbec01a1ba0bd) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "elephfmb_nvram.bin", 0x0000, 0x0800, CRC(13a0cfea) SHA1(9c8ce509ef1076e88ea853347b64c5591bc2e18c) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "am27s29_ef.u25", 0x0000, 0x0200, CRC(bca8b82a) SHA1(4aa19f5ecd9953bf8792dceb075a746f77c01cfc) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h_ef.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "palce20v8h_ef.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "palce20v8h_ef.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_ef.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_ef.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_ef.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
@@ -4815,16 +4815,16 @@ ROM_START( pool10 )
ROM_LOAD( "2.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) )
ROM_LOAD( "1.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "pool10_nvram.bin", 0x0000, 0x0800, CRC(2f2fab43) SHA1(f815b70c171bad99fa6a60c256e4fdc85dd6b290) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "n82s147an_p10.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
@@ -4835,28 +4835,28 @@ ROM_END
u20.bin 1ST AND 2ND HALF IDENTICAL
u21.bin 1ST AND 2ND HALF IDENTICAL
*/
- ROM_START( pool10b ) // 1st set nominated for parent
+ ROM_START( pool10b ) // 1st set nominated for parent
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "u2.bin", 0x8000, 0x8000, CRC(64fee38e) SHA1(8a624a0b6eb4a3ba09e5b396dc5a01994dfdf294) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
-// GFX ROMs are the same of pool10, but double sized with identical halves.
+// GFX ROMs are the same of pool10, but double sized with identical halves.
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "u21.bin", 0x0000, 0x8000, CRC(581c4878) SHA1(5ae61af090feea1745e22f46b33b2c01e6013fbe) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "u20.bin", 0x8000, 0x8000, CRC(3bdf1106) SHA1(fa21cbd49bb27ea4a784cf4e4b3fbd52650a285b) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "pool10b_nvram.bin", 0x0000, 0x0800, CRC(d9f35299) SHA1(2c3608bc9c322a9cc86f74d8fa2f660804a8cf3c) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "n82s147an_p10.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h_p10b.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "palce20v8h_p10b.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "palce20v8h_p10b.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_p10b.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_p10b.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_p10b.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
@@ -4868,16 +4868,16 @@ ROM_START( pool10c )
ROM_LOAD( "b.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) )
ROM_LOAD( "c.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "pool10c_nvram.bin", 0x0000, 0x0800, CRC(396aefed) SHA1(066b87ff054dfb37f733a812ad0dc1b1bd2478e6) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "n82s147an_p10.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
@@ -4889,22 +4889,22 @@ ROM_END
ROM_START( pool10d )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "3.50.u2", 0x8000, 0x8000, CRC(4c68e1f4) SHA1(bbab63a18e0c041ce519daa32e12dd1b6a672dce) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "2.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) ) // sldh
ROM_LOAD( "1.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) ) // sldh
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "pool10d_nvram.bin", 0x0000, 0x0800, CRC(6b5984a0) SHA1(156a94e74e33b1a15222cffff9b62e65f6f5f2f5) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "n82s147an_p10.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
@@ -4992,16 +4992,16 @@ ROM_START( pool10e )
ROM_LOAD( "2.u21", 0x0000, 0x8000, CRC(a0d54044) SHA1(c7be1f12f72095daee32ae41c3554d8ab4f99245) ) // sldh
ROM_LOAD( "1.u20", 0x8000, 0x8000, CRC(55c9fcc8) SHA1(224bdf63ed345b1def4852af3b33f07790fbf123) ) // sldh
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "pool10e_nvram.bin", 0x0000, 0x0800, CRC(e20f9a14) SHA1(617ca53263a971c9f835a95737a66fac5b99780f) )
- ROM_REGION( 0x0200, "proms", 0 ) // Same as Pool 10, but the 1st half duplicated to cover any PLD addressing
+ ROM_REGION( 0x0200, "proms", 0 ) // Same as Pool 10, but the 1st half duplicated to cover any PLD addressing
ROM_LOAD( "am27s29.u25", 0x0000, 0x0200, CRC(2c315cbf) SHA1(f3f91329f2b8388decf26a050f8fb7da38694218) )
ROM_REGION( 0x3000, "plds", 0 )
- ROM_LOAD( "palce16v8h.u5", 0x0000, 0x0892, BAD_DUMP CRC(123d539a) SHA1(cccf0cbae3175b091a998eedf4aa44a55b679400) ) // read protected
- ROM_LOAD( "palce20v8h.u22", 0x1000, 0x0a92, BAD_DUMP CRC(ba2a021f) SHA1(e9c5970f80c7446c91282d53cfe97c92353dce7d) ) // read protected
- ROM_LOAD( "palce20v8h.u23", 0x2000, 0x0a92, BAD_DUMP CRC(ba2a021f) SHA1(e9c5970f80c7446c91282d53cfe97c92353dce7d) ) // read protected
+ ROM_LOAD( "palce16v8h.u5", 0x0000, 0x0892, BAD_DUMP CRC(123d539a) SHA1(cccf0cbae3175b091a998eedf4aa44a55b679400) ) // read protected
+ ROM_LOAD( "palce20v8h.u22", 0x1000, 0x0a92, BAD_DUMP CRC(ba2a021f) SHA1(e9c5970f80c7446c91282d53cfe97c92353dce7d) ) // read protected
+ ROM_LOAD( "palce20v8h.u23", 0x2000, 0x0a92, BAD_DUMP CRC(ba2a021f) SHA1(e9c5970f80c7446c91282d53cfe97c92353dce7d) ) // read protected
ROM_END
@@ -5013,20 +5013,20 @@ ROM_START( pool10f )
ROM_LOAD( "cmc-pool10-b.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) )
ROM_LOAD( "cmc-pool10-c.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "pool10f_nvram.bin", 0x0000, 0x0800, CRC(75dd3562) SHA1(a359cada144e7c90946649f5dd0998d0ee48f4d2) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "27s29.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
-ROM_START( pool10g ) // 2nd set nominated for parent
+ROM_START( pool10g ) // 2nd set nominated for parent
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "3.u2", 0x8000, 0x8000, CRC(7b537ce6) SHA1(b221d08c53b9e14178335632420e78070b9cfb27) )
@@ -5034,7 +5034,7 @@ ROM_START( pool10g ) // 2nd set nominated for parent
ROM_LOAD( "2.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) )
ROM_LOAD( "1.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "pool10h_nvram.bin", 0x0000, 0x0800, CRC(3ec39472) SHA1(aa2bb5abd16557560a19842929ad7dab852abbbf) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5050,7 +5050,7 @@ ROM_START( pool10h )
ROM_LOAD( "cmc-pool10+b+.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) )
ROM_LOAD( "cmc-pool10+c+.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "pool10i_nvram.bin", 0x0000, 0x0800, CRC(e93dee30) SHA1(195525e95a3bdc1b002b12fd27bc31c63d7a9276) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5061,15 +5061,15 @@ ROM_END
ROM_START( pool10i )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "a.u2", 0x8000, 0x8000, CRC(566bc05d) SHA1(eec88c8ba6cb664f38ebf8b71f99b4e7d04a9601) ) // sldh
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "b.u21", 0x0000, 0x8000, CRC(581c4878) SHA1(5ae61af090feea1745e22f46b33b2c01e6013fbe) ) // sldh
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "c.u20", 0x8000, 0x8000, CRC(3bdf1106) SHA1(fa21cbd49bb27ea4a784cf4e4b3fbd52650a285b) ) // sldh
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "pool10l_nvram.bin", 0x0000, 0x0800, CRC(89cbee4b) SHA1(ff8031a96ee40e1e62abbae7a0b3d9dc2122759f) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5084,7 +5084,7 @@ ROM_START( pool10j )
ROM_LOAD( "cmcpool10.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) )
ROM_LOAD( "cmcpool10.u20", 0x8000, 0x8000, CRC(9abedd0c) SHA1(f184a82e8ec2387069d631bcb77e890acd44b3f5) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "pool10j_nvram.bin", 0x0000, 0x0800, CRC(48684b02) SHA1(6f2fbd0e2621e31b881edd8056ff93ee78f331ab) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5138,16 +5138,16 @@ ROM_START( biliard )
ROM_LOAD( "cmcpool10-b.u21", 0x0000, 0x8000, CRC(99c8c074) SHA1(f8082b08e895cbcd028a2b7cd961a7a2c8b2762c) )
ROM_LOAD( "biliard-c.u20", 0x8000, 0x8000, CRC(b15d10ec) SHA1(9b0f32ff791063cfb2d8339a4e8041e034e73eb7) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "biliard_nvram.bin", 0x0000, 0x0800, CRC(2f2fab43) SHA1(f815b70c171bad99fa6a60c256e4fdc85dd6b290) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "am27s29pc.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h-25pc-4.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8a-25lp.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8a-25lp.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h-25pc-4.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8a-25lp.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8a-25lp.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
@@ -5156,18 +5156,18 @@ ROM_END
This one seems to run in royalcd1 hardware.
*/
-ROM_START( royal ) // brute hack of pool 10
+ROM_START( royal ) // brute hack of pool 10
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "3.u2", 0x8000, 0x8000, CRC(d4f36273) SHA1(2049257ea9ee52fde9cabfe40e809e00526a960e) ) // sldh
-// GFX ROMs are the same of pool10, but double sized with identical halves.
+// GFX ROMs are the same of pool10, but double sized with identical halves.
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "2.u21", 0x0000, 0x8000, CRC(439eec10) SHA1(500139c16a883f0a5b0b8d91f4f067ba428d2d11) ) // sldh
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "1.u20", 0x8000, 0x8000, CRC(9b59e72d) SHA1(96217272ce5abb78ff45ff116a5d921c57717ed9) ) // sldh
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "royal_nvram.bin", 0x0000, 0x0800, CRC(9df190d5) SHA1(4be0f5c6f89f822568e45e0e8457cf51ced2dcfe) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5204,16 +5204,16 @@ ROM_START( tortufam )
ROM_LOAD( "tortu.b.u21", 0x0000, 0x8000, CRC(e7b18584) SHA1(fa1c367469d4ced5d7c83c15a25ec5fd6afcca10) )
ROM_LOAD( "tortu.c.u20", 0x8000, 0x8000, CRC(3cda6f73) SHA1(b4f3d2d3c652ebf6973358ae33b7808de5939acd) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "tortufam_nvram.bin", 0x0000, 0x0800, CRC(e5a08b1b) SHA1(6575ed3ec66ef0e42129225fe1679519e5e1c946) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "am27s29pc_tf.u25", 0x0000, 0x0200, CRC(c6d433fb) SHA1(065de832bbe8765eb0aacc2029e587a4f5362f8a) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce20v8h_tf.u5", 0x0000, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "palce20v8h_tf.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "palce20v8h_tf.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_tf.u5", 0x0000, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_tf.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_tf.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
@@ -5225,16 +5225,16 @@ ROM_START( potgame )
ROM_LOAD( "potg.b.u21", 0x0000, 0x8000, CRC(32fc1d4f) SHA1(cc533a44498338bc0cbb7c7b9c42559ce7ff1337) )
ROM_LOAD( "potg.c.u20", 0x8000, 0x8000, CRC(0331eb42) SHA1(a8e838d644fc6d93a9632070b305e44e4242ce94) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "potgame_nvram.bin", 0x0000, 0x0800, CRC(2b07fb37) SHA1(9cbd3d8fb076d683a7853b3dd8a39a27f1c8872b) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "am27s29_pot.u25", 0x0000, 0x0200, CRC(a221f151) SHA1(270c57c9b7de912b136686bc6720eb8f12dbb805) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h_pot.u5", 0x0000, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "palce20v8h_pot.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "palce20v8h_pot.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_pot.u5", 0x0000, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_pot.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce20v8h_pot.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
@@ -5246,16 +5246,16 @@ ROM_START( bottle10 )
ROM_LOAD( "boat_2.bin", 0x0000, 0x8000, CRC(a6b36c3f) SHA1(90b12d9552ad5dbf11a30fc7451da1f3e6763cc3) )
ROM_LOAD( "boat_1.bin", 0x8000, 0x8000, CRC(61fd8c19) SHA1(eb8fd8bd7de38a6c8a435e9e36daf699162138a5) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "bottle10_nvram.bin", 0x0000, 0x0800, CRC(82927c53) SHA1(8cde91588cb53fefc84f0b14fc5c0b26a3a445eb) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "n82s147an_p10.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
@@ -5267,16 +5267,16 @@ ROM_START( bottl10b )
ROM_LOAD( "2.u21", 0x0000, 0x8000, CRC(9395c15b) SHA1(e4caefc6f55b07f5c4370a3b8652fa93e08987ce) )
ROM_LOAD( "1.u20", 0x8000, 0x8000, CRC(61fd8c19) SHA1(eb8fd8bd7de38a6c8a435e9e36daf699162138a5) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "bottl10b_nvram.bin", 0x0000, 0x0800, CRC(59976182) SHA1(f8d26169e86444607bc5a6649f41e7f5c05ddbb4) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "n82s147an_p10.u25", 0x0000, 0x0200, CRC(1de03d14) SHA1(d8eda20865c1d885a428931f4380032e103b252c) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_p10.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8b_p10.u22", 0x0200, 0x0157, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "gal20v8b_p10.u23", 0x0400, 0x0157, NO_DUMP ) // PLD is read protected
ROM_END
/*
@@ -5310,16 +5310,16 @@ ROM_END
*/
// The following two have mirrored video RAM 4000/5000 to 6000/7000.
ROM_START( lunapark )
- ROM_REGION( 0x10000, "maincpu", 0 ) // Two different programs. Selectable through a DIP switch
+ ROM_REGION( 0x10000, "maincpu", 0 ) // Two different programs. Selectable through a DIP switch
ROM_LOAD( "lunapark-425-95n003.u2", 0x0000, 0x10000, CRC(b3a620ee) SHA1(67b3498edf7b536e22c4d97c1f6ad5a71521e68f) )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "lunapark-425-95n002.u21", 0x0000, 0x8000, CRC(2bededb7) SHA1(b8d7e6fe307d347d762adf35d361ade620aab37b) )
- ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half 0xff filled
+ ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half 0xff filled
ROM_LOAD( "lunapark-425-95n001.u20", 0x8000, 0x8000, CRC(7d91ce1f) SHA1(7e9bfad76f305d5787faffe3a07b218beb37fda8) )
- ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half 0xff filled
+ ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half 0xff filled
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "lunapark_nvram.bin", 0x0000, 0x0800, CRC(f99e749b) SHA1(fafd4205dfaacb4c21215af6997d06ab419c9281) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5327,23 +5327,23 @@ ROM_START( lunapark )
ROM_END
ROM_START( lunaparkb )
- ROM_REGION( 0x10000, "maincpu", 0 ) // Two different programs. Selectable through a DIP switch
+ ROM_REGION( 0x10000, "maincpu", 0 ) // Two different programs. Selectable through a DIP switch
ROM_LOAD( "lunapark-number-03_lunaparkb.u2", 0x0000, 0x10000, CRC(cb819bb7) SHA1(c7fb25eab093de2f644445a713d99ee8024d8499) )
ROM_REGION( 0x10000, "gfx1", 0 )
- ROM_LOAD( "27512.u21", 0x0000, 0x8000, CRC(d64ac315) SHA1(c67d9e67a988036844efd4f980d47a90c022ba18) ) // only the first 2 bytes different
- ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half 0xff filled
+ ROM_LOAD( "27512.u21", 0x0000, 0x8000, CRC(d64ac315) SHA1(c67d9e67a988036844efd4f980d47a90c022ba18) ) // only the first 2 bytes different
+ ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half 0xff filled
ROM_LOAD( "27512.u20", 0x8000, 0x8000, CRC(7d91ce1f) SHA1(7e9bfad76f305d5787faffe3a07b218beb37fda8 ) )
- ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half 0xff filled
+ ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half 0xff filled
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "lunaparkb_nvram.bin", 0x0000, 0x0800, CRC(f99e749b) SHA1(fafd4205dfaacb4c21215af6997d06ab419c9281) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "82s147.u25", 0x0000, 0x0200, CRC(ddb74d72) SHA1(3d5dda3a935a3100cb86017f103b855d6449f73a) )
ROM_END
-// This one hasn't mirrored video RAM, so could run in regular Cuore 1 hardware
+// This one hasn't mirrored video RAM, so could run in regular Cuore 1 hardware
ROM_START( lunaparkc )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "lunapark-number-03_lunaparkc.u2", 0x8000, 0x8000, CRC(fdbe49c3) SHA1(a2b14a6998d5a27fba7bc360a15f17a48c91194f) )
@@ -5352,7 +5352,7 @@ ROM_START( lunaparkc )
ROM_LOAD( "lunapark-number-01.u21", 0x0000, 0x8000, CRC(ee057944) SHA1(31b76dcadf1dd5aacac1dfed0c7c9f7190797ead) )
ROM_LOAD( "lunapark-number-02.u20", 0x8000, 0x8000, CRC(b8795aec) SHA1(5db2e64657dee7742eb9d11e65d29c83a93332b7) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "lunaparkc_nvram.bin", 0x0000, 0x0800, CRC(005b70fc) SHA1(682c2315b4fafb6255db989f0d49255fd8d7a1a9) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5371,7 +5371,7 @@ ROM_START( crystal )
ROM_LOAD( "425-1995-number-02.u21", 0x0000, 0x8000, CRC(1eaf1bd9) SHA1(eb392f4a8864c59c7792f905f165f543087cb4a0) )
ROM_LOAD( "425-1995-number-01.u20", 0x8000, 0x8000, CRC(d3972c19) SHA1(a84ae765eeae1f9d443b0c4941b6f93dcc540f8c) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "crystal_nvram.bin", 0x0000, 0x0800, CRC(21a712ee) SHA1(259d83b8268a93f96b53580562e9c6e835f7473e) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5399,7 +5399,7 @@ ROM_START( royalcrd )
ROM_LOAD( "3.bin", 0x0000, 0x8000, CRC(c46d804f) SHA1(b089821c7dae6714b49401d787f8bed859815763) )
ROM_LOAD( "2.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "royalcrd_nvram.bin", 0x0000, 0x0800, CRC(1c775f61) SHA1(c810421eaa31a72e3f2fe9a1d82858e7cc2f6b93) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5424,7 +5424,7 @@ ROM_START( royalcrda )
ROM_LOAD( "r.2", 0x8000, 0x8000, CRC(8a66f22c) SHA1(67d6e8f8f5a0fd979dc498ba2cc67cf707ccdf95) )
ROM_IGNORE( 0x8000)
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "royalcrda_nvram.bin", 0x0000, 0x0800, CRC(c42dbad4) SHA1(b38552192e3f5f6bc2a4b92bddd2f95ac17ecc8c) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5447,7 +5447,7 @@ ROM_START( royalcrdb )
ROM_LOAD( "rc_3_pl.bin", 0x0000, 0x8000, CRC(85e77661) SHA1(7d7a765c1bfcfeb9eb91d2519b22d734f20eab24) )
ROM_LOAD( "rc_2_pl.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "royalcrdb_nvram.bin", 0x0000, 0x0800, CRC(19bb3dea) SHA1(0965fbcec48ded99c5f6793efffb1d9329cc00eb) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5522,15 +5522,15 @@ ROM_START( royalcrdd )
ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(85e77661) SHA1(7d7a765c1bfcfeb9eb91d2519b22d734f20eab24) ) // sldh
ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) ) // sldh
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "royalcrdd_nvram.bin", 0x0000, 0x0800, CRC(335bfa5a) SHA1(7e9cbb502f450c515ea03ffcf4b7fbae60af4e73) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "n82s147.bin", 0x0000, 0x0200, CRC(8bc86f48) SHA1(4c677ab9314a1f571e35104b22659e6811aeb194) )
ROM_REGION( 0x0600, "plds", 0 )
- ROM_LOAD( "palce16v8h-4.bin", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
- ROM_LOAD( "1-peel18cv8.bin", 0x0200, 0x0155, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h-4.bin", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "1-peel18cv8.bin", 0x0200, 0x0155, NO_DUMP ) // PLD is read protected
ROM_LOAD( "2-peel18cv8.bin", 0x0400, 0x0155, CRC(8fdafd55) SHA1(fbb187ba682111648ea1586f400990cb81a3077a) )
ROM_END
@@ -5554,24 +5554,24 @@ ROM_END
- 1x trimmer (volume)
*/
-ROM_START( royalcrde ) // both halves have different programs. we're using the 2nd one.
- ROM_REGION( 0x10000, "maincpu", 0 ) // 1st half prg is testing RAM in offset $8600-$BF00...??
+ROM_START( royalcrde ) // both halves have different programs. we're using the 2nd one.
+ ROM_REGION( 0x10000, "maincpu", 0 ) // 1st half prg is testing RAM in offset $8600-$BF00...??
ROM_LOAD( "rc.bin", 0x0000, 0x10000, CRC(8a9a6dd6) SHA1(04c3f9f17d5404ac1414c51ef8f930df54530e72) )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "2a.bin", 0x0000, 0x8000, CRC(3af71cf8) SHA1(3a0ce0d0abebf386573c5936545dada1d3558e55) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "1a.bin", 0x8000, 0x8000, CRC(8a66f22c) SHA1(67d6e8f8f5a0fd979dc498ba2cc67cf707ccdf95) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "royalcrde_nvram.bin", 0x0000, 0x0800, CRC(3b03440f) SHA1(49e51b8c9e1404d39c479a2d0619aab43f1a6529) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "n82s147.bin", 0x0000, 0x0200, CRC(8bc86f48) SHA1(4c677ab9314a1f571e35104b22659e6811aeb194) )
ROM_REGION( 0x0200, "plds", 0 )
- ROM_LOAD( "palce16v8h-4.bin", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h-4.bin", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
ROM_END
@@ -5594,7 +5594,7 @@ ROM_START( royalcrdt )
ROM_REGION( 0x0800, "nvram", 0 )
ROM_LOAD( "royalcrdt_nv.bin", 0x0000, 0x0800, CRC(67a6e68b) SHA1(d7ab01c4d9bd4fe58b5d0f4a945c00c5c4906008) )
- ROM_REGION( 0x0200, "plds", 0 ) // Device type is 16L8
+ ROM_REGION( 0x0200, "plds", 0 ) // Device type is 16L8
ROM_LOAD( "tab01_3.bin", 0x0000, 0x0104, CRC(a13a7a0a) SHA1(28e918ece4dcfa3883d2439c226b2f125d43f386) )
ROM_END
@@ -5643,7 +5643,7 @@ ROM_START( royalcrdf ) // encrypted program rom
ROM_END
-ROM_START( royalcrdg ) // CMC C1030 PCB, EP910EC-30 CPLD, NON encrypted graphics
+ROM_START( royalcrdg ) // CMC C1030 PCB, EP910EC-30 CPLD, NON encrypted graphics
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "3.cpu", 0x8000, 0x8000, CRC(829a6a1d) SHA1(b7064e4d60e33d0875eb73525230ea3b99f10542) )
@@ -5651,7 +5651,7 @@ ROM_START( royalcrdg ) // CMC C1030 PCB, EP910EC-30 CPLD, NON encrypted graphics
ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(85e77661) SHA1(7d7a765c1bfcfeb9eb91d2519b22d734f20eab24) ) // sldh
ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) ) // sldh
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "royalcrdg_nvram.bin", 0x0000, 0x0800, CRC(853c7da9) SHA1(e275b22a9f470672bfc71425fcc44f547ba38b6d) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5673,7 +5673,7 @@ ROM_START( royalcrdh )
ROM_LOAD( "145-2.bin", 0x0000, 0x8000, CRC(85e77661) SHA1(7d7a765c1bfcfeb9eb91d2519b22d734f20eab24) )
ROM_LOAD( "145-1.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "royalcrdh_nvram.bin", 0x0000, 0x0800, CRC(7757d73a) SHA1(997bfbd847d1d21777694331be92a1a5e79e4faf) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5707,7 +5707,7 @@ ROM_END
1x battery (missing)
*/
-ROM_START( royalcdfr ) // Seems bootleg PCB, non encrypted graphics
+ROM_START( royalcdfr ) // Seems bootleg PCB, non encrypted graphics
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "3.bin", 0x8000, 0x8000, CRC(69b944c1) SHA1(6ef76bff01f20376117dd7f67e5890eca754fcfb) ) // sldh
@@ -5715,7 +5715,7 @@ ROM_START( royalcdfr ) // Seems bootleg PCB, non encrypted graphics
ROM_LOAD( "2.bin", 0x0000, 0x8000, CRC(85e77661) SHA1(7d7a765c1bfcfeb9eb91d2519b22d734f20eab24) ) // sldh
ROM_LOAD( "1.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) ) // sldh
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "royalcdfr_nvram.bin", 0x0000, 0x0800, CRC(bda344d4) SHA1(7793d289147bf03c0d8256d4023252c9677ac8ff) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5734,7 +5734,7 @@ ROM_START( royalcrdp )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "n82s147a.bin", 0x0000, 0x0200, CRC(8bc86f48) SHA1(4c677ab9314a1f571e35104b22659e6811aeb194) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "royalcrdp_nvram.bin", 0x0000, 0x0800, BAD_DUMP CRC(553f8c66) SHA1(d2c21786d715f81c537d860d8515fda6d766f630) )
ROM_REGION( 0x0200, "plds", 0 )
@@ -5767,7 +5767,7 @@ ROM_START( royaljp )
ROM_REGION( 0x0800, "nvram", 0 )
ROM_LOAD( "royaljp_nvram.bin", 0x0000, 0x0800, CRC(48e51e2a) SHA1(b81a1741eef299384d4fa98a534099b2c0332074) )
- ROM_REGION( 0x0600, "plds", 0 ) // There are 3 GALs
+ ROM_REGION( 0x0600, "plds", 0 ) // There are 3 GALs
ROM_LOAD( "gal20v8b.bin", 0x0000, 0x0157, NO_DUMP )
ROM_LOAD( "gal20v8a.bin", 0x0200, 0x0157, NO_DUMP )
ROM_LOAD( "gal16v8d.bin", 0x0400, 0x0117, NO_DUMP )
@@ -5784,7 +5784,7 @@ ROM_START( lluck3x3 )
ROM_LOAD( "l2.bin", 0x0000, 0x8000, CRC(8ca90a8f) SHA1(bc3db3f8c097f89eff488e3aca39bf24ff2b5cff) )
ROM_LOAD( "l1.bin", 0x8000, 0x8000, CRC(beadc35c) SHA1(8a6a5954a827def8c4c3b904d8ee58a4bde53d85) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "lluck3x3_nvram.bin", 0x0000, 0x0800, CRC(2fe79cff) SHA1(7839c04336b7702c7bdcd2b6917a353f4376f824) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5800,7 +5800,7 @@ ROM_START( lluck4x1 )
ROM_LOAD( "l2.bin", 0x0000, 0x8000, CRC(8ca90a8f) SHA1(bc3db3f8c097f89eff488e3aca39bf24ff2b5cff) )
ROM_LOAD( "l1.bin", 0x8000, 0x8000, CRC(beadc35c) SHA1(8a6a5954a827def8c4c3b904d8ee58a4bde53d85) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "lluck4x1_nvram.bin", 0x0000, 0x0800, CRC(05d2d7b8) SHA1(1188b2b4835cadd95b1e9160c2948a2e3457afd2) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5837,28 +5837,28 @@ ROM_END
*/
-ROM_START( magicrd2 ) // Impera... but seems Bulgarian hack, just for copyright
- ROM_REGION( 0x10000, "maincpu", 0 ) // magicard.004 has extra code, and 2 different NVRAM contents harcoded
+ROM_START( magicrd2 ) // Impera... but seems Bulgarian hack, just for copyright
+ ROM_REGION( 0x10000, "maincpu", 0 ) // magicard.004 has extra code, and 2 different NVRAM contents harcoded
ROM_LOAD( "magicard.004", 0x0000, 0x8000, CRC(f6e948b8) SHA1(7d5983015a508ab135ccbf69b7f3c526c229e3ef) )
- ROM_LOAD( "magicard.01", 0x8000, 0x8000, CRC(c94767d4) SHA1(171ac946bdf2575f9e4a31e534a8e641597af519) ) // 1st and 2nd half identical
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_LOAD( "magicard.01", 0x8000, 0x8000, CRC(c94767d4) SHA1(171ac946bdf2575f9e4a31e534a8e641597af519) ) // 1st and 2nd half identical
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "mc2gr2.bin", 0x0000, 0x8000, CRC(733da697) SHA1(45122c64d5a371ec91cecc67b7faf179078e714d) )
ROM_LOAD( "mc2gr1.bin", 0x8000, 0x8000, CRC(2406b8d2) SHA1(e9d7a25562fd5adee351d7ef6ba02fff6aab021a) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "magicrd2_nvram.bin", 0x0000, 0x0800, CRC(343b3162) SHA1(1524959dbbc0c6d7c5c3a4a6b20976382cfbe88f) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "mc2-82s147.bin", 0x0000, 0x0200, CRC(aa91cc35) SHA1(79f9a755441500e618c4183f524f969fffd44100) )
ROM_REGION( 0x0200, "plds", 0 )
- ROM_LOAD( "gal16v8uni.bin", 0x0000, 0x0117, CRC(b81d7e0a) SHA1(7fef0b2bcea931a830d38ae0f1102434cf281d2d) ) // Universal GAL
+ ROM_LOAD( "gal16v8uni.bin", 0x0000, 0x0117, CRC(b81d7e0a) SHA1(7fef0b2bcea931a830d38ae0f1102434cf281d2d) ) // Universal GAL
ROM_END
-ROM_START( magicrd2a ) // Nov (new). Imatic Yugoslavian hack for green TAB or Impera boards
+ROM_START( magicrd2a ) // Nov (new). Imatic Yugoslavian hack for green TAB or Impera boards
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "m3_nov.bin", 0x8000, 0x8000, CRC(ee5468e6) SHA1(f859adbad30e561fca86e60ff5b2e666d8bf4071) )
@@ -5866,7 +5866,7 @@ ROM_START( magicrd2a ) // Nov (new). Imatic Yugoslavian hack for green TAB or Im
ROM_LOAD( "m2_nov.bin", 0x0000, 0x8000, CRC(684d71f2) SHA1(e4522844a0406b3e83fa723508a7c05dd21e7fb6) )
ROM_LOAD( "m1_nov.bin", 0x8000, 0x8000, CRC(96151034) SHA1(3107d353705c6240a71faf308e11c45a87d95cf4) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM (passed protection)
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM (passed protection)
ROM_LOAD( "mc2_nvram.bin", 0x0000, 0x0800, CRC(2070d63d) SHA1(86c72a2e81651b0138d8551a0cfcd07176f8e7d2) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5877,7 +5877,7 @@ ROM_START( magicrd2a ) // Nov (new). Imatic Yugoslavian hack for green TAB or Im
ROM_END
-ROM_START( magicrd2b ) // Imatic Yugoslavian hack for green TAB or Impera boards
+ROM_START( magicrd2b ) // Imatic Yugoslavian hack for green TAB or Impera boards
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "mc2prgv1.bin", 0x8000, 0x8000, CRC(7f759b70) SHA1(23a1a6e8eda57c4a90c51a970302f9a7bf590083) )
@@ -5885,7 +5885,7 @@ ROM_START( magicrd2b ) // Imatic Yugoslavian hack for green TAB or Impera boards
ROM_LOAD( "mc2gr2.bin", 0x0000, 0x8000, CRC(733da697) SHA1(45122c64d5a371ec91cecc67b7faf179078e714d) )
ROM_LOAD( "mc2gr1.bin", 0x8000, 0x8000, CRC(2406b8d2) SHA1(e9d7a25562fd5adee351d7ef6ba02fff6aab021a) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM (passed protection)
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM (passed protection)
ROM_LOAD( "mc2_v1-v2_nvram.bin", 0x0000, 0x0800, BAD_DUMP CRC(f88c493d) SHA1(8a5352b46ab68164cd7adaaad6f15f04327b7451) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5896,7 +5896,7 @@ ROM_START( magicrd2b ) // Imatic Yugoslavian hack for green TAB or Impera boards
ROM_END
-ROM_START( magicrd2c ) // Imatic Yugoslavian hack for blue TAB board (encrypted)
+ROM_START( magicrd2c ) // Imatic Yugoslavian hack for blue TAB board (encrypted)
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "mc2prgv2.bin", 0x8000, 0x8000, CRC(b0ed6b40) SHA1(7167e67608f1b0b1cd956c838dacc1310861cb4a) )
@@ -5904,7 +5904,7 @@ ROM_START( magicrd2c ) // Imatic Yugoslavian hack for blue TAB board (encrypted)
ROM_LOAD( "mc2gr1b.bin", 0x0000, 0x8000, CRC(ce2629a7) SHA1(84767ed5da8dcee44a210255537e10372bcc264b) )
ROM_LOAD( "mc2gr2b.bin", 0x8000, 0x8000, CRC(d2bf8bde) SHA1(975b8f43a0396c09e357b96d5ae7381b12152b9e) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM (passed protection)
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM (passed protection)
ROM_LOAD( "mc2_v1-v2_nvram.bin", 0x0000, 0x0800, BAD_DUMP CRC(f88c493d) SHA1(8a5352b46ab68164cd7adaaad6f15f04327b7451) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -5926,10 +5926,10 @@ ROM_START( vegasslw )
ROM_LOAD( "v2.bin", 0x0000, 0x8000, CRC(af7ab460) SHA1(01ea400424152c09c10eb83a1bd569019969ccb7) )
ROM_LOAD( "v1.bin", 0x8000, 0x8000, CRC(23e0d1c6) SHA1(98967b14d3264c444a1dfbd15c57cde70f41f09d) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "vegasslw_nvram.bin", 0x0000, 0x0800, CRC(1aa043e3) SHA1(c93d071effb2f2fe95e9dc751174c2c765595f74) )
- ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
+ ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
ROM_LOAD( "jokercrd_prom.bin", 0x0000, 0x0200, CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) )
ROM_END
@@ -5942,39 +5942,39 @@ ROM_START( vegasfst )
ROM_LOAD( "v2.bin", 0x0000, 0x8000, CRC(af7ab460) SHA1(01ea400424152c09c10eb83a1bd569019969ccb7) )
ROM_LOAD( "v1.bin", 0x8000, 0x8000, CRC(23e0d1c6) SHA1(98967b14d3264c444a1dfbd15c57cde70f41f09d) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "vegasfst_nvram.bin", 0x0000, 0x0800, CRC(5034de7a) SHA1(ab2077a49d94676531c73ad8d8ce9548bbfa2b81) )
- ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
+ ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
ROM_LOAD( "jokercrd_prom.bin", 0x0000, 0x0200, CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) )
ROM_END
-ROM_START( vegasfte ) // Royal Vegas Joker Card (fast deal, english gfx)
+ROM_START( vegasfte ) // Royal Vegas Joker Card (fast deal, english gfx)
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "ch3.bin", 0x8000, 0x8000, CRC(87dfb28d) SHA1(9a06e695e59722b6c97e5a9fd2c8b238661e5a4a) )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "ch2.bin", 0x0000, 0x8000, CRC(af7ab460) SHA1(01ea400424152c09c10eb83a1bd569019969ccb7) )
- ROM_LOAD( "ch1.bin", 0x8000, 0x8000, CRC(0a3679c0) SHA1(ce8a067e1a2eccf9fabb16733ef3a14e0e8129e5) ) // X & Y in txt layer
+ ROM_LOAD( "ch1.bin", 0x8000, 0x8000, CRC(0a3679c0) SHA1(ce8a067e1a2eccf9fabb16733ef3a14e0e8129e5) ) // X & Y in txt layer
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "vegasfte_nvram.bin", 0x0000, 0x0800, CRC(166c6055) SHA1(db2143a2a3adc92578bd3707391d2f5030cc6a6f) )
- ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
+ ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
ROM_LOAD( "jokercrd_prom.bin", 0x0000, 0x0200, CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) )
ROM_END
ROM_START( vegasmil )
- ROM_REGION( 0x10000, "maincpu", 0 ) // Mile
+ ROM_REGION( 0x10000, "maincpu", 0 ) // Mile
ROM_LOAD( "mile.bin", 0x8000, 0x8000, CRC(ef7e02e2) SHA1(7432b0e723dc528901c422ab1d7d01fd1bc1eb20) )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "v2.bin", 0x0000, 0x8000, CRC(af7ab460) SHA1(01ea400424152c09c10eb83a1bd569019969ccb7) )
ROM_LOAD( "v1.bin", 0x8000, 0x8000, CRC(23e0d1c6) SHA1(98967b14d3264c444a1dfbd15c57cde70f41f09d) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "vegasmil_nvram.bin", 0x0000, 0x0800, CRC(d2608e5f) SHA1(ac936df71dbc0bfb811a3ba3c91444a2a3e7b036) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -6066,7 +6066,7 @@ ROM_END
*/
-ROM_START( jolyjokr ) // Jolly Joker (98bet, set 1)
+ROM_START( jolyjokr ) // Jolly Joker (98bet, set 1)
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "impera3orig.bin", 0x8000, 0x8000, CRC(ceb3a0d5) SHA1(25efae9f225abddfa663e6abcc91801996e5b0ea) )
@@ -6074,7 +6074,7 @@ ROM_START( jolyjokr ) // Jolly Joker (98bet, set 1)
ROM_LOAD( "impera2.bin", 0x0000, 0x8000, CRC(f0fa5941) SHA1(1fcade31ed6893ffcfd4efe97dfaaa31d24283ec) )
ROM_LOAD( "impera1.bin", 0x8000, 0x8000, CRC(c3ab44dd) SHA1(e46c0fd94da561f57033647f1703fa135777ece5) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolyjokr_nvram.bin", 0x0000, 0x0800, CRC(f33e66ed) SHA1(7a4b9a1b2f976d5d26f54915a213d5ac5eca0a42) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -6082,7 +6082,7 @@ ROM_START( jolyjokr ) // Jolly Joker (98bet, set 1)
ROM_END
-ROM_START( jolyjokra ) // Jolly Joker (98bet, set 2)
+ROM_START( jolyjokra ) // Jolly Joker (98bet, set 2)
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "impera50.bin", 0x8000, 0x8000, CRC(7effc044) SHA1(961438e7fb8222296fb959b510cdf646e4ac3226) )
@@ -6090,7 +6090,7 @@ ROM_START( jolyjokra ) // Jolly Joker (98bet, set 2)
ROM_LOAD( "impera2.bin", 0x0000, 0x8000, CRC(f0fa5941) SHA1(1fcade31ed6893ffcfd4efe97dfaaa31d24283ec) )
ROM_LOAD( "impera1.bin", 0x8000, 0x8000, CRC(c3ab44dd) SHA1(e46c0fd94da561f57033647f1703fa135777ece5) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolyjokra_nvram.bin", 0x0000, 0x0800, CRC(ed43693c) SHA1(d4aa4e539ab12c97bc9b9b1077997195a11d782b) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -6127,7 +6127,7 @@ ROM_END
This change the paytable to the following values:
Program #1 Program #2
-
+
Five of a Kind 1100 Five of a Kind 300
Royak Flush 500 Royak Flush 250
Street Flush 100 Street Flush 100
@@ -6144,17 +6144,17 @@ ROM_END
*/
ROM_START( jolyjokrb1 )
- ROM_REGION( 0x10000, "maincpu", 0 ) // Two different paytable programs. Using the 1st one (higher paytable)
+ ROM_REGION( 0x10000, "maincpu", 0 ) // Two different paytable programs. Using the 1st one (higher paytable)
ROM_LOAD( "unbekannt.bin", 0x8000, 0x8000, CRC(327fa3d7) SHA1(2435aada2377b2f8f01d059a7aba9bc7a8993537) )
- ROM_IGNORE( 0x8000 ) // Using the 1st program. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Using the 1st program. Discarding 2nd half
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "ic26.bin", 0x0000, 0x8000, CRC(3e45dfc6) SHA1(8fd0b0cc00cdd96244ae7e7a91f6613b1c144ee0) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "ic25.bin", 0x8000, 0x8000, CRC(1bd067af) SHA1(9436fe085ba63c00a12ea80903470a84535e3dc1) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolyjokrb_nvram.bin", 0x0000, 0x0800, CRC(17007bb5) SHA1(72e08096293ce4fbde205a63b5ecd9641dbee017) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -6162,17 +6162,17 @@ ROM_START( jolyjokrb1 )
ROM_END
ROM_START( jolyjokrb2 )
- ROM_REGION( 0x10000, "maincpu", 0 ) // Two different paytable programs. Using the 2nd one (lower paytable)
+ ROM_REGION( 0x10000, "maincpu", 0 ) // Two different paytable programs. Using the 2nd one (lower paytable)
ROM_LOAD( "unbekannt.bin", 0x8000, 0x8000, CRC(327fa3d7) SHA1(2435aada2377b2f8f01d059a7aba9bc7a8993537) )
- ROM_CONTINUE( 0x8000, 0x8000) // overlapping with the 2nd program.
+ ROM_CONTINUE( 0x8000, 0x8000) // overlapping with the 2nd program.
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "ic26.bin", 0x0000, 0x8000, CRC(3e45dfc6) SHA1(8fd0b0cc00cdd96244ae7e7a91f6613b1c144ee0) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "ic25.bin", 0x8000, 0x8000, CRC(1bd067af) SHA1(9436fe085ba63c00a12ea80903470a84535e3dc1) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolyjokrb_nvram.bin", 0x0000, 0x0800, CRC(17007bb5) SHA1(72e08096293ce4fbde205a63b5ecd9641dbee017) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -6197,7 +6197,7 @@ ROM_START( jolyjokrc )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "tbp28s42.bin", 0x0000, 0x0200, CRC(0b671bba) SHA1(92d512e02b50f98b7bc5a60deee4fee722656c4f) )
- ROM_REGION( 0x0200, "plds", 0 ) // cracked PLD
+ ROM_REGION( 0x0200, "plds", 0 ) // cracked PLD
ROM_LOAD( "jjpal.bin", 0x0000, 0x0117, CRC(3b084c34) SHA1(5d186b70317ef871c9a426eb420b66efcbd918de) )
ROM_END
@@ -6207,7 +6207,7 @@ ROM_END
The following two sets have the same program
but different graphics system.
-
+
Both sets have graphics ROMs data interleaved
inside the second half of a 16bit 27C210 EPROM.
The second set has some 8bits data in the first half.
@@ -6229,15 +6229,15 @@ ROM_START( jolyjokro )
ROM_REGION( 0x10000, "gfxpool", 0 )
ROM_LOAD( "impera2.bin", 0x0000, 0x10000, CRC(aa86dba6) SHA1(fe189dde83bd855f4a0b34b20c161a9addc15017) )
- ROM_CONTINUE( 0x0000, 0x10000) // discarding 1nd empty half (0000-ffff)
+ ROM_CONTINUE( 0x0000, 0x10000) // discarding 1nd empty half (0000-ffff)
ROM_REGION( 0x10000, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x10000, 0xff) // deinterleaved GFX data will be placed here
+ ROM_FILL( 0x0000, 0x10000, 0xff) // deinterleaved GFX data will be placed here
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolyjokro_nvram.bin", 0x0000, 0x0800, CRC(1f69e567) SHA1(86695ca6f9f93c6badd092410611d8061edf8efa) )
- ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
+ ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
ROM_LOAD( "1_impera_color_ii.bin", 0x0000, 0x0200, CRC(9d62f9f5) SHA1(68300c25c7eaa13a3fdbf91ab0711d0bc530543d) )
ROM_END
@@ -6279,7 +6279,7 @@ ROM_END
1x 74LS139N.
*/
-ROM_START( jolyjokrm ) // Jolly Joker (Solid State module in suicide board)
+ROM_START( jolyjokrm ) // Jolly Joker (Solid State module in suicide board)
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "impera1.bin", 0x0000, 0x10000, CRC(3cad9fcf) SHA1(09f23ae8c04e6b461e17a8b3978fe44566ffc3aa) )
@@ -6287,7 +6287,7 @@ ROM_START( jolyjokrm ) // Jolly Joker (Solid State module in suicide board)
ROM_LOAD( "02.bin", 0x0000, 0x8000, CRC(f0fa5941) SHA1(1fcade31ed6893ffcfd4efe97dfaaa31d24283ec) )
ROM_LOAD( "01.bin", 0x8000, 0x8000, CRC(c3ab44dd) SHA1(e46c0fd94da561f57033647f1703fa135777ece5) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolyjokrm_nvram.bin", 0x0000, 0x0800, CRC(f33e66ed) SHA1(7a4b9a1b2f976d5d26f54915a213d5ac5eca0a42) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -6315,7 +6315,7 @@ ROM_START( multiwin )
ROM_LOAD( "multiwin1.bin", 0x8000, 0x8000, CRC(97589aa6) SHA1(2486116637bd906cb3b32acd86fc861c48a0475e) )
ROM_REGION( 0x0200, "proms", 0 )
- ROM_LOAD( "multi_prom.bin", 0x0000, 0x0200, BAD_DUMP CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) ) // using the joker card one
+ ROM_LOAD( "multi_prom.bin", 0x0000, 0x0200, BAD_DUMP CRC(e59fc06e) SHA1(88a3bb89f020fe2b20f768ca010a082e0b974831) ) // using the joker card one
ROM_END
@@ -6414,10 +6414,10 @@ ROM_END
*/
ROM_START( powercrd )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "263a1.bin", 0x8000, 0x8000, CRC(9e5e477d) SHA1(428464a64bea8cb478bc8033859baa47d7de0297) ) // just the 2nd half
- ROM_LOAD( "263a2.bin", 0x0000, 0x8000, CRC(11b1a13f) SHA1(766c1a45c238467d6a292795f5a159187966ceec) ) // just the 2nd half
+ ROM_LOAD( "263a1.bin", 0x8000, 0x8000, CRC(9e5e477d) SHA1(428464a64bea8cb478bc8033859baa47d7de0297) ) // just the 2nd half
+ ROM_LOAD( "263a2.bin", 0x0000, 0x8000, CRC(11b1a13f) SHA1(766c1a45c238467d6a292795f5a159187966ceec) ) // just the 2nd half
- ROM_REGION( 0x0800, "decode", 0 ) // from the CY7C291A inside of the custom CPU
+ ROM_REGION( 0x0800, "decode", 0 ) // from the CY7C291A inside of the custom CPU
ROM_LOAD( "powercrd_cy7c291a.bin", 0x0000, 0x0800, CRC(f1d8f35d) SHA1(2b5f9222a81a627d43fd8448385f85c71c24b914) )
ROM_REGION( 0x10000, "gfx1", 0 )
@@ -6548,13 +6548,13 @@ ROM_END
ROM_START( megacard )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "mega_mc3_210-f-1.ic37", 0x8000, 0x8000, CRC(747f5ed1) SHA1(06757bb6a792dca93978b17b54c28e413e3720b1) ) // just the 2nd half
- ROM_LOAD( "mega_mc3_210-f-2.ic41", 0x0000, 0x8000, CRC(373094d2) SHA1(8aed2502e89b0e7522e88f351ac256f1afad7ee8) ) // just the 2nd half
+ ROM_LOAD( "mega_mc3_210-f-1.ic37", 0x8000, 0x8000, CRC(747f5ed1) SHA1(06757bb6a792dca93978b17b54c28e413e3720b1) ) // just the 2nd half
+ ROM_LOAD( "mega_mc3_210-f-2.ic41", 0x0000, 0x8000, CRC(373094d2) SHA1(8aed2502e89b0e7522e88f351ac256f1afad7ee8) ) // just the 2nd half
- ROM_REGION( 0x0300, "die_65sc02", 0 ) // from the 65SC02 die inside of the custom CPU
+ ROM_REGION( 0x0300, "die_65sc02", 0 ) // from the 65SC02 die inside of the custom CPU
ROM_LOAD( "gteu65decoderom.bin", 0x0000, 0x02f1, CRC(089af0c6) SHA1(0f46a73a7859a694a07ebe74d476fae80e57e329) )
- ROM_REGION( 0x0800, "decode", 0 ) // from the CY7C291A inside of the custom CPU
+ ROM_REGION( 0x0800, "decode", 0 ) // from the CY7C291A inside of the custom CPU
ROM_LOAD( "megacard_cy7291a.bin", 0x0000, 0x0800, CRC(596f01ac) SHA1(a8606a1dd385fbb46b1a96f11a759fa6580803d8) )
ROM_REGION( 0x10000, "gfx1", 0 )
@@ -6638,9 +6638,9 @@ ROM_END
ROM_START( jokercrd )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "ic41.bin", 0x4000, 0x4000, CRC(d36188b3) SHA1(3fb848fabbbde9fbb70875b3dfef62bfb3a8cbcb) )
- ROM_IGNORE( 0x4000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x4000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "ic37.bin", 0xc000, 0x4000, CRC(8e0d70c4) SHA1(018f92631acbe98e5826a41698f0e07b4b46cd71) )
- ROM_IGNORE( 0x4000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x4000 ) // Identical halves. Discarding 2nd half
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "vesely_zg_2.ic11", 0x0000, 0x8000, CRC(21d05a57) SHA1(156c18ec31b08e4c4af6f73b49cb5d5c68d1670f) )
@@ -6682,25 +6682,25 @@ ROM_END
ROM_START( mongolnw )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "prgteov.2.3m.u16", 0x8000, 0x8000, CRC(996b851a) SHA1(ef4e3d036ca10b33c83749024d04c4d4c09feeb7) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x10000, "cpu1", 0 ) // TSC87C52-16CB MCU Code
+ ROM_REGION( 0x10000, "cpu1", 0 ) // TSC87C52-16CB MCU Code
ROM_LOAD( "tsc87c52-mf.u40", 0x0000, 0x02000 , CRC(ae22e778) SHA1(0897e05967d68d7f23489e98717663e3a3176070) )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "mong.rc.b2.u3", 0x0000, 0x8000, CRC(5e019b73) SHA1(63a544dccb9589e5a6b938e604c09d4d8fc060fc) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "mong.rc.c1.u2", 0x8000, 0x8000, CRC(e3fc24c4) SHA1(ea4e67ace63b55a76365f7e11a67c7d420a52dd7) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "mongolnw_nvram.bin", 0x0000, 0x0800, CRC(700531fa) SHA1(a8bcf86df6bd06d2ee54b4898dd7822060b81dba) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "am27s29pc_mf.u24", 0x0000, 0x0200, CRC(da9181af) SHA1(1b30d992f3b2a4b3bd81e3f99632311988e2e8d1) )
ROM_REGION( 0x0200, "plds", 0 )
- ROM_LOAD( "palce16v8h_mf.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_mf.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
ROM_END
@@ -6742,25 +6742,25 @@ ROM_END
ROM_START( soccernw )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "prgteo2gv2.3.u16", 0x8000, 0x8000, CRC(c61d1937) SHA1(c516f13a108da60b7ccee338b63a025009ef9099) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x10000, "cpu1", 0 ) // TSC87C52-16CB MCU Code
+ ROM_REGION( 0x10000, "cpu1", 0 ) // TSC87C52-16CB MCU Code
ROM_LOAD( "tsc87c52-sn.u40", 0x0000, 0x02000 , CRC(af0bd35b) SHA1(c6613a7bcdec2fd6060d6dcf639654568de87e75) )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "soccer2.u3", 0x0000, 0x8000, CRC(db09b5bb) SHA1(a12bf2938f5482ea5ebc0db6fd6594e1beb97017) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "soccer1.u2", 0x8000, 0x8000, CRC(564cc467) SHA1(8f90c4bacd97484623666b25dae77e628908e243) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "soccernw_nvram.bin", 0x0000, 0x0800, CRC(607247bd) SHA1(06bbed08166d8930f14e1f41843ac7faeded263d) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "am27s29pc_sn.u24", 0x0000, 0x0200, CRC(d02894fc) SHA1(adcdc912cc0b7a7f67b122fa94fca921c957b282) )
ROM_REGION( 0x0200, "plds", 0 )
- ROM_LOAD( "palce16v8h_sn.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
+ ROM_LOAD( "palce16v8h_sn.u5", 0x0000, 0x0117, NO_DUMP ) // PLD is read protected
ROM_END
@@ -6884,7 +6884,7 @@ ROM_END
--+-----------------------------------------------------------------------
*/
-ROM_START( funquiz ) // Fun World Quiz
+ROM_START( funquiz ) // Fun World Quiz
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "kqu_6.bin", 0xc000, 0x4000, CRC(50f0e586) SHA1(85ce5b95283113e2ac94fd882c57ce1b26135ed0) )
@@ -6894,7 +6894,7 @@ ROM_START( funquiz ) // Fun World Quiz
ROM_FILL( 0x8000, 0x4000, 0xff)
ROM_LOAD( "q_2.bin", 0xc000, 0x4000, CRC(ce07c6e1) SHA1(6b77a9198e29c195d983b856e8826e8174945321) )
-// One unpopulated questions socket... Maybe sport_1 is missing
+// One unpopulated questions socket... Maybe sport_1 is missing
ROM_REGION( 0x100000, "questions", ROMREGION_ERASEFF )
// 01 - Allgemein
@@ -7041,11 +7041,11 @@ ROM_START( witchryl )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "2.u11", 0x0000, 0x8000, CRC(7edc8f44) SHA1(cabad613fa8a72dc12587d19a72bc9c6861486bd) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "3.u4", 0x8000, 0x8000, CRC(5e4a0d59) SHA1(08eb9b1a617a7b2e6f87377819dba07082cf38b4) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "witchryl_nvram.bin", 0x0000, 0x0800, CRC(98366bed) SHA1(279a5ce4639b8b2ac29146b32512615253c45991) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -7062,7 +7062,7 @@ ROM_END
*/
-ROM_START( novoplay ) // Similar to Royal Vegas Joker Card
+ROM_START( novoplay ) // Similar to Royal Vegas Joker Card
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "np1_run.bin", 0x8000, 0x8000, CRC(4078d695) SHA1(d0e39064250733968044aec216040fe62fecc880) )
@@ -7070,10 +7070,10 @@ ROM_START( novoplay ) // Similar to Royal Vegas Joker Card
ROM_LOAD( "np1_ch2.bin", 0x0000, 0x8000, CRC(188d6fad) SHA1(3bc9bab24d8c7beed0c5f491c19a004ca7d719a1) )
ROM_LOAD( "np1_ch1.bin", 0x8000, 0x8000, CRC(fdc3bd67) SHA1(0ec2d5e0b1937849934f98e253e18887af0331e8) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "novoplay_nvram.bin", 0x0000, 0x0800, CRC(92019972) SHA1(e6d1e231cd2ce27e718ed9482dbe9ddc8612eb67) )
- ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
+ ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
ROM_LOAD( "np1_27s29.bin", 0x0000, 0x0200, CRC(8992aa4d) SHA1(5a0649bff66e7cab1bcbadcdfc74c77a747cc58f) )
ROM_END
@@ -7093,7 +7093,7 @@ ROM_END
*/
-ROM_START( jolycdsp ) // Encrypted program in a module. Blue TAB PCB encrypted graphics
+ROM_START( jolycdsp ) // Encrypted program in a module. Blue TAB PCB encrypted graphics
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "ct3.bin", 0x8000, 0x8000, CRC(0c9cbae6) SHA1(4f834370229797cac302a5185ed1e77ef2b7cabb) )
@@ -7101,10 +7101,10 @@ ROM_START( jolycdsp ) // Encrypted program in a module. Blue TAB PCB encrypted g
ROM_LOAD( "ct2.bin", 0x0000, 0x8000, CRC(7569e719) SHA1(f96e1e72bc13d1888f3868f8d404fd3db94db7b2) )
ROM_LOAD( "ct1.bin", 0x8000, 0x8000, CRC(8f438635) SHA1(3200e20f4b28173cc2a68d0f87969627570418dc) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "ctunk_nvram.bin", 0x0000, 0x0800, CRC(c55c6706) SHA1(a38ae926f057fb47e48ca841b2d097fc4fd06416) )
- ROM_REGION( 0x0200, "proms", 0 ) // Borrowed from the parent set
+ ROM_REGION( 0x0200, "proms", 0 ) // Borrowed from the parent set
ROM_LOAD( "82s147.bin", 0x0000, 0x0200, CRC(5ebc5659) SHA1(8d59011a181399682ab6e8ed14f83101e9bfa0c6) )
ROM_END
@@ -7137,11 +7137,11 @@ ROM_START( rcdino4 )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "m27c512.u2", 0x0000, 0x8000, CRC(915f1e59) SHA1(2eb2a7acca50318eb1775b01a00b1d3c74e1522c) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "m27c512.u20", 0x8000, 0x8000, CRC(86e55f5a) SHA1(be71301b6887e8cc5924864d0f97b54e0668875e) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "rcdino4_nvram.bin", 0x0000, 0x0800, CRC(a2dc069e) SHA1(23e296cc0cc0c6f0c34eccffff8c78d2cef2dbae) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -7164,11 +7164,11 @@ ROM_START( chinatow )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "27c512.u2", 0x0000, 0x8000, CRC(6ace221f) SHA1(d35a6621d9d9231a844d7043da78035855ebf572) )
- ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half 0xff filled
+ ROM_CONTINUE( 0x0000, 0x8000) // Discarding 1nd half 0xff filled
ROM_LOAD( "27c512.u20", 0x8000, 0x8000, CRC(efb7f1ec) SHA1(260005526fc9b4087ca03f7cc585e40b6fa007fb) )
- ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half 0xff filled
+ ROM_CONTINUE( 0x8000, 0x8000) // Discarding 1nd half 0xff filled
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "chinatow_nvram.bin", 0x0000, 0x0800, CRC(eef4c5e7) SHA1(a2d9a9f617d35ccb99236114e5ce3257ad572f49) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -7318,7 +7318,7 @@ ROM_START( fw_a7_11a )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "m3-7649a-5.bin", 0x0000, 0x0200, CRC(f990a9ae) SHA1(f7133798b5f20dd5b8dbe5d1a6876341710d93a8) )
- ROM_REGION( 0x0200, "plds", 0 ) // cracked PLD
+ ROM_REGION( 0x0200, "plds", 0 ) // cracked PLD
ROM_LOAD( "pal16l8acn_block.bin", 0x0000, 0x0117, CRC(fcda7872) SHA1(60acdb968e6229a8f71c2e29d22e132906a65bd5) )
ROM_END
@@ -7402,27 +7402,27 @@ ROM_END
Gratis Poker
Stmk
Version: 004
- 29. Sept. 95
+ 29. Sept. 95
*/
-ROM_START( gratispk ) // Gratis Poker (V.204, Set 1)
+ROM_START( gratispk ) // Gratis Poker (V.204, Set 1)
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "gratis_poker_club_ver_204.bin", 0x8000, 0x8000, CRC(e53da78e) SHA1(6b87af4d66082f1a18e9e00a41df2484f5373cc7) )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "3.bin", 0x0000, 0x8000, CRC(daec20c7) SHA1(340bdb7749a7d898e96db5a470821cfe7216ea57) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
ROM_LOAD( "2.bin", 0x8000, 0x8000, CRC(112c5f33) SHA1(fffaa247a97f9bde7374cc80ab0bb9fb71bcc4b6) )
- ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
+ ROM_IGNORE( 0x8000 ) // Identical halves. Discarding 2nd half
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "gratispk_nvram.bin", 0x0000, 0x0800, CRC(8fcad62f) SHA1(85def713ed5b9bbdbf0d077a38f779d6f4329a1c) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "tbp28s42n.bin", 0x0000, 0x0200, CRC(e92f74e0) SHA1(dfc4a9d140d21b990f769c10802c4d2c33dd4132) )
ROM_END
-ROM_START( gratispka ) // Gratis Poker (V.204, Set 2)
+ROM_START( gratispka ) // Gratis Poker (V.204, Set 2)
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "35g_ver_204.bin", 0x8000, 0x8000, CRC(e53da78e) SHA1(6b87af4d66082f1a18e9e00a41df2484f5373cc7) )
@@ -7430,7 +7430,7 @@ ROM_START( gratispka ) // Gratis Poker (V.204, Set 2)
ROM_LOAD( "3.bin", 0x0000, 0x8000, CRC(4f077fa3) SHA1(d65005b7111b77ac7c3707bd12bc376506d9477b) )
ROM_LOAD( "2.bin", 0x8000, 0x8000, CRC(0f3711b0) SHA1(ce874dbfc2d7171cff2be41d4a44fe8194526ef7) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "gratispk_nvram.bin", 0x0000, 0x0800, CRC(8fcad62f) SHA1(85def713ed5b9bbdbf0d077a38f779d6f4329a1c) )
ROM_REGION( 0x0200, "proms", 0 )
@@ -7442,7 +7442,7 @@ ROM_END
Γκούλιτ
Nkoúlit
Gullit
-
+
Greek hack of Royal Card.
*/
@@ -7454,14 +7454,14 @@ ROM_START( nkoulit )
ROM_LOAD( "27c256-2.bin", 0x0000, 0x8000, CRC(4a9ea5ad) SHA1(50504544265646e12ce769a1fd40d7afeae8b8d3) )
ROM_LOAD( "27c256-1.bin", 0x8000, 0x8000, CRC(7b3a6d1a) SHA1(b7f2e534ad4467cd0a9d86019be8110caf45c024) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "nkoulit_nvram.bin", 0x0000, 0x0800, CRC(73584f67) SHA1(4aab0d4fe846592e1cbc8b3c2411ddc1bf79fd95) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "am27s29pc.bin", 0x0000, 0x0200, CRC(8bc86f48) SHA1(4c677ab9314a1f571e35104b22659e6811aeb194) )
ROM_END
-
+
/*
Reflex Cards (English)
Need special NVRAM to boot.
@@ -7472,7 +7472,7 @@ ROM_END
the secret number to continue:
Serial: 00000000
- Key: FFFFFFFF
+ Key: FFFFFFFF
The real serial number isn't shown. Just zeroes as mask.
You must to enter digit by digit using the HOLD buttons,
@@ -7484,7 +7484,7 @@ ROM_END
The code and NVRAM were reversed to find the serial number
and key offsets and the way they are stored, to construct
a working default NVRAM.
-
+
*/
ROM_START( reflexcrd )
ROM_REGION( 0x10000, "maincpu", 0 )
@@ -7494,14 +7494,14 @@ ROM_START( reflexcrd )
ROM_LOAD( "27c256-2.bin", 0x0000, 0x8000, CRC(05fe86fc) SHA1(a58ab5d107936f7d462f8f748bb6ac27bd77429b) )
ROM_LOAD( "27c256-3.bin", 0x8000, 0x8000, CRC(1617ed13) SHA1(312065406ce1d1d7c4ad566e2b13268f7eb524bb) )
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "reflexcrd_nvram.bin", 0x0000, 0x0800, CRC(c2c69e5b) SHA1(e4abbf09abc044ba17e542cc8e1cfa16ee7cf776) )
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "bipolar_prom.bin", 0x0000, 0x0200, CRC(8bc86f48) SHA1(4c677ab9314a1f571e35104b22659e6811aeb194) )
ROM_END
-
+
/**************************
* Driver Initialization *
**************************/
@@ -7533,13 +7533,13 @@ void funworld_state::init_tabblue()
for (x=0x0000; x < 0x10000; x++)
{
- na = src[x] & 0xf0; // nibble A
- nb = src[x] << 4; // nibble B
+ na = src[x] & 0xf0; // nibble A
+ nb = src[x] << 4; // nibble B
- nad = (na ^ (na >> 1)) << 1; // nibble A decrypted
- nbd = ((nb ^ (nb >> 1)) >> 3) & 0x0f; // nibble B decrypted
+ nad = (na ^ (na >> 1)) << 1; // nibble A decrypted
+ nbd = ((nb ^ (nb >> 1)) >> 3) & 0x0f; // nibble B decrypted
- src[x] = nad + nbd; // decrypted byte
+ src[x] = nad + nbd; // decrypted byte
}
}
@@ -7567,20 +7567,20 @@ void magicrd2_state::init_magicd2b()
void magicrd2_state::init_magicd2c()
{
-// *** same as blue TAB PCB, with the magicd2a patch ***
+// *** same as blue TAB PCB, with the magicd2a patch ***
int x, na, nb, nad, nbd;
uint8_t *src = memregion( "gfx1" )->base();
uint8_t *ROM = memregion("maincpu")->base();
for (x=0x0000; x < 0x10000; x++)
{
- na = src[x] & 0xf0; // nibble A
- nb = src[x] << 4; // nibble B
+ na = src[x] & 0xf0; // nibble A
+ nb = src[x] << 4; // nibble B
- nad = (na ^ (na >> 1)) << 1; // nibble A decrypted
- nbd = ((nb ^ (nb >> 1)) >> 3) & 0x0f; // nibble B decrypted
+ nad = (na ^ (na >> 1)) << 1; // nibble A decrypted
+ nbd = ((nb ^ (nb >> 1)) >> 3) & 0x0f; // nibble B decrypted
- src[x] = nad + nbd; // decrypted byte
+ src[x] = nad + nbd; // decrypted byte
}
ROM[0xc1c6] = 0x92;
@@ -7589,26 +7589,26 @@ void magicrd2_state::init_magicd2c()
void funworld_state::init_mongolnw()
{
-// temporary patch to avoid hardware errors for debug purposes
+// temporary patch to avoid hardware errors for debug purposes
uint8_t *ROM = memregion("maincpu")->base();
ROM[0x9115] = 0xa5;
-// prevents one test from triggering hardware error
+// prevents one test from triggering hardware error
ROM[0xb8f3] = 0xff;
}
void funworld_state::init_soccernw()
{
-// temporary patch to avoid hardware errors for debug purposes
+// temporary patch to avoid hardware errors for debug purposes
uint8_t *ROM = memregion("maincpu")->base();
ROM[0x80b2] = 0xa9;
ROM[0x80b3] = 0x00;
ROM[0x9115] = 0xa5;
-// prevents one test from triggering hardware error
+// prevents one test from triggering hardware error
ROM[0xb8f3] = 0xff;
}
@@ -7825,13 +7825,13 @@ void funworld_state::init_ctunk()
//uint8_t *ROM = memregion("maincpu")->base();
for (int x = 0x0000; x < 0x10000; x++)
{
- int na = src[x] & 0xf0; // nibble A
- int nb = src[x] << 4; // nibble B
+ int na = src[x] & 0xf0; // nibble A
+ int nb = src[x] << 4; // nibble B
- int nad = (na ^ (na >> 1)) << 1; // nibble A decrypted
- int nbd = ((nb ^ (nb >> 1)) >> 3) & 0x0f; // nibble B decrypted
+ int nad = (na ^ (na >> 1)) << 1; // nibble A decrypted
+ int nbd = ((nb ^ (nb >> 1)) >> 3) & 0x0f; // nibble B decrypted
- src[x] = nad + nbd; // decrypted byte
+ src[x] = nad + nbd; // decrypted byte
}
}
@@ -8030,40 +8030,40 @@ void chinatow_state::init_rcdino4()
int add = rcdino4_add[c];
if (((i == 0x81)
- && (j >= 0xa3) && (j <= 0xb1) // text string
+ && (j >= 0xa3) && (j <= 0xb1) // text string
)
|| ((i == 0x82)
- && (j >= 0x35) && (j <= 0x53) // table of addresses
+ && (j >= 0x35) && (j <= 0x53) // table of addresses
)
|| ((i == 0x85)
- && (j >= 0x7e) && (j <= 0x8d) // '0'-'9', 'A'-'F'
+ && (j >= 0x7e) && (j <= 0x8d) // '0'-'9', 'A'-'F'
)
|| ((i == 0x94)
- && (((j >= 0x4a) && (j <= 0x86)) // zeroes
- || ((j >= 0xbf) && (j <= 0xc1)) // set of masks */
+ && (((j >= 0x4a) && (j <= 0x86)) // zeroes
+ || ((j >= 0xbf) && (j <= 0xc1)) // set of masks */
)
)
|| ((i == 0x96)
- && (j >= 0x39) && (j <= 0x3e) // set of masks
+ && (j >= 0x39) && (j <= 0x3e) // set of masks
)
|| ((i == 0xa6)
- && (j >= 0x30) && (j <= 0x32) // set of masks
+ && (j >= 0x30) && (j <= 0x32) // set of masks
)
|| ((i == 0xaa)
- && (j >= 0xf2) // table of addresses
+ && (j >= 0xf2) // table of addresses
)
|| ((i == 0xc3)
- && (j >= 0x70) && (j <= 0xaf) // set of masks
+ && (j >= 0x70) && (j <= 0xaf) // set of masks
)
|| ((i == 0xc4)
- && (j >= 0xdc) // zeroes and things
+ && (j >= 0xdc) // zeroes and things
)
|| ((i == 0xd0)
- && (j >= 0xd2) // text and zeroes
+ && (j >= 0xd2) // text and zeroes
)
|| ((i == 0xd2)
- && ((j <= 0x2f) // text and zeroes
- || ((j >= 0x84) && (j <= 0xaf)) // text and zeroes
+ && ((j <= 0x2f) // text and zeroes
+ || ((j >= 0x84) && (j <= 0xaf)) // text and zeroes
)
)
|| (add == 9)
@@ -8094,7 +8094,7 @@ void chinatow_state::init_rcdino4()
|| (i == 0xf8)
)
{
- j = 0; // re-align offset after skipping some pages
+ j = 0; // re-align offset after skipping some pages
}
}
while (1);
diff --git a/src/mame/drivers/generalplus_gpl16250_nand.cpp b/src/mame/drivers/generalplus_gpl16250_nand.cpp
index d0dafa01d39..f539ba42b62 100644
--- a/src/mame/drivers/generalplus_gpl16250_nand.cpp
+++ b/src/mame/drivers/generalplus_gpl16250_nand.cpp
@@ -749,18 +749,18 @@ void generalplus_gpac800_game_state::machine_reset()
}
/* these vectors must either directly point to RAM, or at least redirect there after some code
-
+
kiugames has the startup code copied to 20xxx which is outside the scope of a 16-bit vector
so these must trampoline (although 20xxx currently isn't handled as RAM, so that needs more
thought anyway
*/
uint16_t* internal = (uint16_t*)memregion("maincpu:internal")->base();
-
+
int addr;
addr = (m_vectorbase + 0x0a) & 0x000fffff;
internal[0x7f00] = 0xfe80 | (addr >> 16);
internal[0x7f01] = (addr & 0xffff);
-
+
addr = (m_vectorbase + 0x0c) & 0x000fffff;
internal[0x7f02] = 0xfe80 | (addr >> 16);
internal[0x7f03] = (addr & 0xffff);
diff --git a/src/mame/drivers/generalplus_gpl_unknown.cpp b/src/mame/drivers/generalplus_gpl_unknown.cpp
index e8b41746bdd..fe1e118e5cf 100644
--- a/src/mame/drivers/generalplus_gpl_unknown.cpp
+++ b/src/mame/drivers/generalplus_gpl_unknown.cpp
@@ -262,7 +262,7 @@ void pcp8718_state::spi_process_tx_data(uint8_t data)
case SPI_STATE_WAITING_DUMMY2_ADDR:
{
- // m_spistate = SPI_STATE_READY;
+ // m_spistate = SPI_STATE_READY;
break;
}
}
@@ -358,7 +358,7 @@ void pcp8718_state::map(address_map &map)
map(0x007945, 0x007945).r(FUNC(pcp8718_state::spi_misc_control_r));
map(0x007abf, 0x007abf).r(FUNC(pcp8718_state::unk_7abf_r));
-
+
// registers at 7xxx are similar to GPL16250, but not identical? (different video system?)
@@ -402,12 +402,12 @@ uint16_t pcp8718_state::simulate_f000_r(offs_t offset)
logerror("call to 0xf58f - unknown function\n");
return 0x9a90; // retf
}
- else if (realpc == 0xfb26) // done with a call, and also a pc =
+ else if (realpc == 0xfb26) // done with a call, and also a pc =
{
logerror("call to 0xfb26 - unknown function\n");
return 0x9a90; // retf
}
- else if (realpc == 0xf56f) // done with a pc =
+ else if (realpc == 0xf56f) // done with a pc =
{
logerror("call to 0xf56f - unknown function\n");
return 0x9a90; // retf
@@ -505,7 +505,7 @@ void pcp8718_state::machine_reset()
m_maincpu->set_state_int(UNSP_SR, 0x0000);
//uint16_t* ROM = (uint16_t*)memregion("maincpu")->base();
- //ROM[0x0000] = 0x9a90; // retf from internal ROM call to 0xf000 (unknown purpose)
+ //ROM[0x0000] = 0x9a90; // retf from internal ROM call to 0xf000 (unknown purpose)
// there doesn't appear to be any code to set the SP, so it must be done by the internal ROM
m_maincpu->set_state_int(UNSP_SP, 0x5fff);
diff --git a/src/mame/drivers/gigatron.cpp b/src/mame/drivers/gigatron.cpp
index f709b1980ac..3261208786b 100644
--- a/src/mame/drivers/gigatron.cpp
+++ b/src/mame/drivers/gigatron.cpp
@@ -2,10 +2,10 @@
// copyright-holders:Sterophonick, Phil Thomas
/***************************************************************************
- Driver for Gigatron TTL Microcomputer by Sterophonick
-
- Based on Gigatron.js by Phil Thomas
- https://github.com/PhilThomas/gigatron
+ Driver for Gigatron TTL Microcomputer by Sterophonick
+
+ Based on Gigatron.js by Phil Thomas
+ https://github.com/PhilThomas/gigatron
***************************************************************************/
@@ -24,10 +24,10 @@
/***************************************************************************
- TODO
-
- Hook up a quikload for loading .gt1 files
- HLE the keyboard and Pluggy McPlugface
+ TODO
+
+ Hook up a quikload for loading .gt1 files
+ HLE the keyboard and Pluggy McPlugface
***************************************************************************/
@@ -73,19 +73,19 @@ private:
int16_t m_row;
int16_t m_col;
uint8_t m_pixel;
-
+
uint8_t m_dacoutput;
void port_outx(uint8_t data);
void port_out(uint8_t data);
-
+
std::unique_ptr<bitmap_rgb32> m_bitmap_render;
required_device<gigatron_cpu_device> m_maincpu;
required_device<dac_byte_interface> m_dac;
required_device<screen_device> m_screen;
required_ioport m_io_inputs;
-
+
output_finder<> m_blinken1;
output_finder<> m_blinken2;
output_finder<> m_blinken3;
@@ -98,7 +98,7 @@ private:
void gigatron_state::video_start()
{
- m_bitmap_render = std::make_unique<bitmap_rgb32>(640, 480);
+ m_bitmap_render = std::make_unique<bitmap_rgb32>(640, 480);
}
void gigatron_state::video_reset()
@@ -110,52 +110,52 @@ void gigatron_state::video_reset()
void gigatron_state::port_out(uint8_t data)
{
- m_pixel = data;
- uint8_t out = m_pixel;
- uint8_t falling = m_out & ~out;
-
- if (falling & VSYNC)
- {
- m_row = -36;
- m_pixel = 0;
- }
-
- if (falling & HSYNC)
- {
- m_col = -4;
- m_row++;
- }
-
- m_out = out;
-
- if ((out & (VSYNC | HSYNC)) != (VSYNC | HSYNC))
- {
- return;
- }
-
- if((m_row >= 0 && m_row < 480) && (m_col >= 0 && m_col < 640))
- {
- uint8_t r = (out << 6) & 0xC0;
- uint8_t g = (out << 4) & 0xC0;
- uint8_t b = (out << 2) & 0xC0;
- uint32_t *dest = &m_bitmap_render->pix32(m_row, m_col);
- for(uint8_t i = 0; i < 4; i++)
- *dest++ = b|(g<<8)|(r<<16);
- }
- m_col += 4;
+ m_pixel = data;
+ uint8_t out = m_pixel;
+ uint8_t falling = m_out & ~out;
+
+ if (falling & VSYNC)
+ {
+ m_row = -36;
+ m_pixel = 0;
+ }
+
+ if (falling & HSYNC)
+ {
+ m_col = -4;
+ m_row++;
+ }
+
+ m_out = out;
+
+ if ((out & (VSYNC | HSYNC)) != (VSYNC | HSYNC))
+ {
+ return;
+ }
+
+ if((m_row >= 0 && m_row < 480) && (m_col >= 0 && m_col < 640))
+ {
+ uint8_t r = (out << 6) & 0xC0;
+ uint8_t g = (out << 4) & 0xC0;
+ uint8_t b = (out << 2) & 0xC0;
+ uint32_t *dest = &m_bitmap_render->pix32(m_row, m_col);
+ for(uint8_t i = 0; i < 4; i++)
+ *dest++ = b|(g<<8)|(r<<16);
+ }
+ m_col += 4;
}
//6-bit color, VGA
uint32_t gigatron_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
- copybitmap(bitmap, *m_bitmap_render, 0, 0, 0, 0, cliprect);
+ copybitmap(bitmap, *m_bitmap_render, 0, 0, 0, 0, cliprect);
video_reset();
-
+
m_blinken1 = (m_lights >> 3) & 1;
m_blinken2 = (m_lights >> 2) & 1;
m_blinken3 = (m_lights >> 1) & 1;
m_blinken4 = (m_lights >> 0) & 1;
- return 0;
+ return 0;
}
//**************************************************************************
@@ -195,7 +195,7 @@ void gigatron_state::machine_start()
m_blinken2.resolve();
m_blinken3.resolve();
m_blinken4.resolve();
-
+
//Savestate stuff
save_item(NAME(m_lights));
save_item(NAME(m_out));
@@ -221,7 +221,7 @@ void gigatron_state::port_outx(uint8_t data)
//Write sound to DAC
m_dacoutput = (data & 0xF0) >> 4;
m_dac->write(m_dacoutput);
-
+
//Blinkenlights
m_lights = data & 0xF;
}
@@ -229,7 +229,7 @@ void gigatron_state::port_outx(uint8_t data)
void gigatron_state::gigatron(machine_config &config)
{
config.set_default_layout(layout_gigatron);
-
+
GTRON(config, m_maincpu, MAIN_CLOCK);
m_maincpu->set_addrmap(AS_PROGRAM, &gigatron_state::prog_map);
m_maincpu->set_addrmap(AS_DATA, &gigatron_state::data_map);
diff --git a/src/mame/drivers/goldnpkr.cpp b/src/mame/drivers/goldnpkr.cpp
index ea2fa1cc8cb..353bd220102 100644
--- a/src/mame/drivers/goldnpkr.cpp
+++ b/src/mame/drivers/goldnpkr.cpp
@@ -487,16 +487,16 @@
Entering the service mode (key 0), you can enter to a submenu for settings pressing
DEAL (key 2):
-
- Win Limit (0-9 the first time, then 3-9)
- Payout Limit (0-2)
- Double Odds % (0-9)
- Payout % (0-9)
- Hard Setting (0-4)
- Note Value (fixed in 5)
- Bonus (0 to 10000, step x100)
- (if you rech 10000, settings exits and go to game. You can't change bonus anymore.
+ Win Limit (0-9 the first time, then 3-9)
+ Payout Limit (0-2)
+ Double Odds % (0-9)
+ Payout % (0-9)
+ Hard Setting (0-4)
+ Note Value (fixed in 5)
+
+ Bonus (0 to 10000, step x100)
+ (if you rech 10000, settings exits and go to game. You can't change bonus anymore.
Use HOLD keys (keys ZXCVB) to navigate through the menu and change
the values. Press CANCEL to exit the settings menu.
@@ -12177,8 +12177,8 @@ void goldnpkr_state::init_bonuspkr()
The game takes 25 seconds to do all the checks.
- E9F4: jmp $EA56 ; infinite loop / dead end.
- E9F7: jmp $CEC6 ; the game continue executing...
+ E9F4: jmp $EA56 ; infinite loop / dead end.
+ E9F7: jmp $CEC6 ; the game continue executing...
*/
diff --git a/src/mame/drivers/goldstar.cpp b/src/mame/drivers/goldstar.cpp
index 8d0519c7f07..dcae637a028 100644
--- a/src/mame/drivers/goldstar.cpp
+++ b/src/mame/drivers/goldstar.cpp
@@ -11247,7 +11247,7 @@ ROM_END
The EPROMS devices only hold the second half of the needed program and regular tiles data.
EPROMS are NMC27CP128Q that are sized 0x4000, when the real data should be 0x8000 for each position.
-
+
*EDIT*
Even when the NMC27CP128Q datasheet says that these devices are 128 Kbits (16k x8), we redumped
them as 27c256, and got perfect complete 32k x8 dumps.
@@ -11259,7 +11259,7 @@ ROM_END
*/
ROM_START( cmasteri )
- ROM_REGION( 0x10000, "maincpu", 0 ) // 32k x 8 data coming from a real NMC27CP128Q
+ ROM_REGION( 0x10000, "maincpu", 0 ) // 32k x 8 data coming from a real NMC27CP128Q
ROM_LOAD( "9.u81", 0x0000, 0x1000, CRC(2738eb55) SHA1(95e420544f36e4ce6358f14fee7a6b7ecd4cc568) )
ROM_CONTINUE(0x4000,0x1000)
ROM_CONTINUE(0x3000,0x1000)
@@ -11269,7 +11269,7 @@ ROM_START( cmasteri )
ROM_CONTINUE(0x2000,0x1000)
ROM_CONTINUE(0x5000,0x1000)
- ROM_REGION( 0x18000, "gfx1", 0 ) // 32k x 8 data coming from real NMC27CP128Q devices
+ ROM_REGION( 0x18000, "gfx1", 0 ) // 32k x 8 data coming from real NMC27CP128Q devices
ROM_LOAD( "7.u16", 0x00000, 0x8000, CRC(19cc1d67) SHA1(47487f9362bfb36a32100ed772960628844462bf) )
ROM_LOAD( "6.u11", 0x08000, 0x8000, CRC(63b3df4e) SHA1(9bacd23da598805ec18ec5ad15cab95d71eb9262) )
ROM_LOAD( "5.u4", 0x10000, 0x8000, CRC(e39fff9c) SHA1(22fdc517fa478441622c6245cecb5728c5595757) )
diff --git a/src/mame/drivers/guab.cpp b/src/mame/drivers/guab.cpp
index be49d0256c0..193675652cc 100644
--- a/src/mame/drivers/guab.cpp
+++ b/src/mame/drivers/guab.cpp
@@ -28,7 +28,7 @@
Notes:
* Toggle both 'Back door' and 'Key switch' to enter test mode
- * Opening the back door will disable coinup
+ * Opening the back door will disable coinup
* Video hardware seems to match JPM System 5
* IRQ 1 inits the PPIs, IRQ 2 does nothing
@@ -505,7 +505,7 @@ void guab_state::guab(machine_config &config)
ppi4.out_pc_callback().set(FUNC(guab_state::watchdog_w));
bacta_datalogger_device &bacta(BACTA_DATALOGGER(config, "bacta", 0));
-
+
acia6850_device &acia1(ACIA6850(config, "acia6850_1", 0));
acia1.txd_handler().set("bacta", FUNC(bacta_datalogger_device::write_txd));
acia1.irq_handler().set_inputline("maincpu", 4);
diff --git a/src/mame/drivers/hec2hrp.cpp b/src/mame/drivers/hec2hrp.cpp
index 36977c2e70e..a8a0fa64f45 100644
--- a/src/mame/drivers/hec2hrp.cpp
+++ b/src/mame/drivers/hec2hrp.cpp
@@ -121,7 +121,7 @@ void hec2hrp_state::hec2hrx_mem(address_map &map)
{
map.unmap_value_high();
hec2hrp_mem(map);
- map(0x0000, 0x3fff).bankr("bank2"); /* Main ROM page*/
+ map(0x0000, 0x3fff).bankr("bank2"); /* Main ROM page*/
map(0x3000, 0x3000).rw(FUNC(hec2hrp_state::cassette_r), FUNC(hec2hrp_state::sn_3000_w));/* Write necessary*/
map(0x3800, 0x3807).rw(FUNC(hec2hrp_state::keyboard_r), FUNC(hec2hrp_state::keyboard_w)); /* Keyboard*/
map(0xc000, 0xffff).bankrw("bank1").share("hector_videoram"); /* => Bank Ram for video and data */
diff --git a/src/mame/drivers/jpmsys5.cpp b/src/mame/drivers/jpmsys5.cpp
index 38a1a4f67aa..b203c7d6330 100644
--- a/src/mame/drivers/jpmsys5.cpp
+++ b/src/mame/drivers/jpmsys5.cpp
@@ -449,7 +449,7 @@ static INPUT_PORTS_START( monopoly )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_NAME("50p")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN4 ) PORT_NAME("100p")
PORT_BIT( 0xc3, IP_ACTIVE_LOW, IPT_UNUSED )
-
+
PORT_START("TOUCH_PUSH")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, jpmsys5v_state,touchscreen_press, 0)
diff --git a/src/mame/drivers/karnov.cpp b/src/mame/drivers/karnov.cpp
index 845d660af59..97b715a5fe0 100644
--- a/src/mame/drivers/karnov.cpp
+++ b/src/mame/drivers/karnov.cpp
@@ -1241,7 +1241,7 @@ ROM_START( chelnovjbl ) // code is the same as the regular chelnovj set
ROM_LOAD( "5.bin", 0x38000, 0x08000, CRC(99cee6cd) SHA1(b2cd0a1aef04fd63ad27ac8a61d17a6bb4c8b600) )
ROM_REGION( 0x40000, "gfx3", 0 ) /* Sprites */
-// ROM_LOAD( "17.bin", 0x00000, 0x10000, CRC(47c857f8) SHA1(59f50365cee266c0e4075c989dc7fde50e43667a) ) // probably bad, 1 byte difference: byte 0x55CC == 0x30 vs 0xF0 in ee12-.f8
+// ROM_LOAD( "17.bin", 0x00000, 0x10000, CRC(47c857f8) SHA1(59f50365cee266c0e4075c989dc7fde50e43667a) ) // probably bad, 1 byte difference: byte 0x55CC == 0x30 vs 0xF0 in ee12-.f8
ROM_LOAD( "ee12-.f8", 0x00000, 0x10000, CRC(9b1c53a5) SHA1(b0fdc89dc7fd0931fa4bca3bbc20fc88f637ec74) )
ROM_LOAD( "ee13-.f9", 0x10000, 0x10000, CRC(72b8ae3e) SHA1(535dfd70e6d13296342d96917a57d46bdb28a59e) )
ROM_LOAD( "ee14-.f13", 0x20000, 0x10000, CRC(d8f4bbde) SHA1(1f2d336dd97c9cc39e124c18cae634afb0ef3316) )
diff --git a/src/mame/drivers/lucky37.cpp b/src/mame/drivers/lucky37.cpp
index fe0ad771fb6..9ec473804e8 100644
--- a/src/mame/drivers/lucky37.cpp
+++ b/src/mame/drivers/lucky37.cpp
@@ -226,7 +226,7 @@ ROM_START( lucky37 )
ROM_LOAD( "6.bin", 0xa0000, 0x20000, CRC(3283c1b7) SHA1(7a30dd55216b47332ea7c18c2378352f405b2f0a) )
ROM_END
-ROM_START( bingo75 ) // runs on wing 8802-c board
+ROM_START( bingo75 ) // runs on wing 8802-c board
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "a001-nomarks", 0x0000, 0x10000, NO_DUMP )
diff --git a/src/mame/drivers/mpu4vid.cpp b/src/mame/drivers/mpu4vid.cpp
index 6eef9c89eae..4174a3f71b8 100644
--- a/src/mame/drivers/mpu4vid.cpp
+++ b/src/mame/drivers/mpu4vid.cpp
@@ -171,8 +171,8 @@ TODO:
* They have a slightly different 68k memory map. The 6850 is at e00000 and the 6840 is at e01000
They appear to hang on the handshake with the MPU4 board
- Layouts needed for the other working games, and DIP switches need checking/altering (no test mode?)
- - BWB Vid5 cabinets seem to have the speakers wired the other way according to test (left/right swapped)
- - BWB sampled sound seems to not play despite hookup.
+ - BWB Vid5 cabinets seem to have the speakers wired the other way according to test (left/right swapped)
+ - BWB sampled sound seems to not play despite hookup.
***********************************************************************************************************/
#include "emu.h"
#include "includes/mpu4.h"
@@ -444,7 +444,7 @@ SCN2674_DRAW_CHARACTER_MEMBER(mpu4vid_state::display_pixels)
uint16_t tile = m_vid_mainram[address & 0x7fff];
const uint8_t *line = m_gfxdecode->gfx(m_gfx_index+0)->get_data(tile & 0xfff);
int offset = m_gfxdecode->gfx(m_gfx_index+0)->rowbytes() * linecount;
-
+
for (int i = 0; i < 8; i++)
{
uint8_t pen = line[offset + i];
@@ -1477,7 +1477,7 @@ static INPUT_PORTS_START( v4bubbnk )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Swop")
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("Hi")
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("Lo")
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_START1 )
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_START1 )
PORT_MODIFY("DIL2")
PORT_DIPNAME( 0x01, 0x00, "Clear MPU Memory" ) PORT_DIPLOCATION("DIL2:01")
@@ -1516,7 +1516,7 @@ static INPUT_PORTS_START( v4dbltak )
// invalid settings
PORT_CONFSETTING( 0x00, "Invalid (Not fitted)" )
PORT_CONFSETTING( 0x40, "Invalid" )
-
+
PORT_MODIFY("ORANGE2")
PORT_CONFNAME( 0x0f, 0x07, "Jackpot / Prize Key" )
PORT_CONFSETTING( 0x08, "5 GBP" )
@@ -1545,7 +1545,7 @@ static INPUT_PORTS_START( v4dbltak )
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_MODIFY("BLACK2")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Cancel/Collect")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Cancel/Collect")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Hold A")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Hold B")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Hold C")
@@ -1622,7 +1622,7 @@ static INPUT_PORTS_START( v4mazbel )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Hold/Swop")
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("Hi/Up")
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("Lo/Down")
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_START1 )
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_START1 )
PORT_MODIFY("DIL2")
PORT_DIPNAME( 0x01, 0x00, "Clear MPU Memory" ) PORT_DIPLOCATION("DIL2:01")
@@ -1662,7 +1662,7 @@ static INPUT_PORTS_START( v4redhtp )
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_MODIFY("BLACK2")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Collect")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Collect")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Hold A")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Hold B")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Hold C")
@@ -1991,9 +1991,9 @@ void mpu4vid_state::mpu4_vid_bt_a00002_w(offs_t offset, uint8_t data)
{
switch (m_bt_which)
{
- case 0: m_btpal_r[m_bt_palbase] = data;
- case 1: m_btpal_g[m_bt_palbase] = data;
- case 2: m_btpal_b[m_bt_palbase] = data;
+ case 0: m_btpal_r[m_bt_palbase] = data;
+ case 1: m_btpal_g[m_bt_palbase] = data;
+ case 2: m_btpal_b[m_bt_palbase] = data;
}
m_bt_which++;
@@ -9494,7 +9494,7 @@ GAME( 199?, v4cybcas, 0, bwbvid_oki_bt471_german, v4cybcas, mpu4v
GAME( 199?, v4missis, 0, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Mississippi Lady (Nova, German) (MPU4 Video)",GAME_FLAGS ) // different hardware type? extra ram on mpu4 side?
-GAME( 199?, v4picdil, 0, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Piccadilly Night (Nova, German) (set 1) (MPU4 Video)",GAME_FLAGS )
-GAME( 199?, v4picdila, v4picdil, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Piccadilly Night (Nova, German) (set 2) (MPU4 Video)",GAME_FLAGS )
-GAME( 199?, v4picdilz, v4picdil, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Piccadilly Night (Nova, German) (set 3) (MPU4 Video)",GAME_FLAGS )
+GAME( 199?, v4picdil, 0, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Piccadilly Night (Nova, German) (set 1) (MPU4 Video)",GAME_FLAGS )
+GAME( 199?, v4picdila, v4picdil, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Piccadilly Night (Nova, German) (set 2) (MPU4 Video)",GAME_FLAGS )
+GAME( 199?, v4picdilz, v4picdil, bwbvid_oki_bt471_german, v4cybcas, mpu4vid_state, init_bwbhack, ROT0, "BWB (Nova license)","Piccadilly Night (Nova, German) (set 3) (MPU4 Video)",GAME_FLAGS )
diff --git a/src/mame/drivers/nes_sh6578.cpp b/src/mame/drivers/nes_sh6578.cpp
index 497884a1bf1..caf03628290 100644
--- a/src/mame/drivers/nes_sh6578.cpp
+++ b/src/mame/drivers/nes_sh6578.cpp
@@ -429,7 +429,7 @@ void nes_sh6578_state::io_w(uint8_t data)
void nes_sh6578_abl_wikid_state::io_w(uint8_t data)
{
nes_sh6578_state::io_w(data);
-
+
if (m_isbanked)
{
m_bank->set_entry((data>>1)&1);
diff --git a/src/mame/drivers/nes_vt.cpp b/src/mame/drivers/nes_vt.cpp
index 7ff7dd59aea..56cab29ac82 100644
--- a/src/mame/drivers/nes_vt.cpp
+++ b/src/mame/drivers/nes_vt.cpp
@@ -1602,7 +1602,7 @@ ROM_END
ROM_START( lxcmcypp )
ROM_REGION( 0x4000000, "mainrom", 0 )
// marked 512mbit, possible A22 / A23 are swapped as they were marked on the board in a different way.
- ROM_LOAD( "pawpatrol_compact.bin", 0x00000, 0x4000000, CRC(bf536762) SHA1(80dde8426a636bae33a82d779e564fa743eb3776) )
+ ROM_LOAD( "pawpatrol_compact.bin", 0x00000, 0x4000000, CRC(bf536762) SHA1(80dde8426a636bae33a82d779e564fa743eb3776) )
ROM_END
ROM_START( lxcmc250 )
diff --git a/src/mame/drivers/photoply.cpp b/src/mame/drivers/photoply.cpp
index 680ef32e967..e6a147d2c54 100644
--- a/src/mame/drivers/photoply.cpp
+++ b/src/mame/drivers/photoply.cpp
@@ -423,7 +423,7 @@ ROM_START(photoply2k4)
ROM_LOAD("vga.bin", 0x000000, 0x8000, CRC(7a859659) BAD_DUMP SHA1(ff667218261969c48082ec12aa91088a01b0cb2a) )
DISK_REGION( "ide:0:hdd:image" )
-// CYLS:1023,HEADS:64,SECS:63,BPS:512.
+// CYLS:1023,HEADS:64,SECS:63,BPS:512.
DISK_IMAGE( "pp2004", 0, SHA1(a3f8861cf91cf7e7446ec931f812e774ada20802) )
ROM_END
diff --git a/src/mame/drivers/qvt70.cpp b/src/mame/drivers/qvt70.cpp
index 44a1e0bb9e9..e4cd22ee6fe 100644
--- a/src/mame/drivers/qvt70.cpp
+++ b/src/mame/drivers/qvt70.cpp
@@ -23,14 +23,14 @@
- 80/132 columns
QVT-82:
- - Z80 (Z0840008PSC)
- - Z80 DART (Z0847006PSC)
- - QUME 303489-01 QFP144
- - ROM 64k * 2
- - RAM 8k UM6264AK-10L (above Z80) + 8k UM6264K-70L * 3 (below Z80)
- - DS1231
- - 54.2857MHz XTAL
- - Battery
+ - Z80 (Z0840008PSC)
+ - Z80 DART (Z0847006PSC)
+ - QUME 303489-01 QFP144
+ - ROM 64k * 2
+ - RAM 8k UM6264AK-10L (above Z80) + 8k UM6264K-70L * 3 (below Z80)
+ - DS1231
+ - 54.2857MHz XTAL
+ - Battery
****************************************************************************/
diff --git a/src/mame/drivers/renegade.cpp b/src/mame/drivers/renegade.cpp
index 8c9e6613ec4..0e8eef9e9fc 100644
--- a/src/mame/drivers/renegade.cpp
+++ b/src/mame/drivers/renegade.cpp
@@ -195,7 +195,7 @@ WRITE_LINE_MEMBER(renegade_state::adpcm_int)
void renegade_state::machine_start()
{
m_rombank->configure_entries(0, 2, memregion("maincpu")->base(), 0x4000);
-
+
save_item(NAME(m_adpcm_pos));
save_item(NAME(m_adpcm_end));
save_item(NAME(m_adpcm_playing));
@@ -246,7 +246,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(renegade_state::interrupt)
// nmi 8 lines before vsync
if (scanline == 265)
m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
-
+
// irq 16 clks per frame: once every 16 lines, but increases to 24 lines during vblank
// (lines 16,40,56,72,88,104,120,136,152,168,184,200,216,232,248,264)
if (scanline == 0x10 || (scanline > 0x20 && (scanline & 0xf) == 8))
diff --git a/src/mame/drivers/segag80v.cpp b/src/mame/drivers/segag80v.cpp
index b8da53afa46..f251ba7f315 100644
--- a/src/mame/drivers/segag80v.cpp
+++ b/src/mame/drivers/segag80v.cpp
@@ -904,7 +904,7 @@ void segag80v_state::g80v_base(machine_config &config)
m_maincpu->set_addrmap(AS_OPCODES, &segag80v_state::opcodes_map);
m_maincpu->set_addrmap(AS_IO, &segag80v_state::main_portmap);
m_maincpu->irqack_cb().set(FUNC(segag80v_state::irq_ack_w));
-// m_maincpu->set_vblank_int("screen", FUNC(segag80v_state::irq0_line_hold));
+// m_maincpu->set_vblank_int("screen", FUNC(segag80v_state::irq0_line_hold));
// video hardware
SCREEN(config, m_screen, SCREEN_TYPE_VECTOR);
diff --git a/src/mame/drivers/snesb51.cpp b/src/mame/drivers/snesb51.cpp
index 7d44c11e308..0c83954f202 100644
--- a/src/mame/drivers/snesb51.cpp
+++ b/src/mame/drivers/snesb51.cpp
@@ -6,10 +6,10 @@
Skeleton driver
- The following systems are dumped:
- - Mortal Kombat 3
- - 4 Slot board
- - 4 Slot board with built-in NBA Jam
+ The following systems are dumped:
+ - Mortal Kombat 3
+ - 4 Slot board
+ - 4 Slot board with built-in NBA Jam
Hardware (for the 4 slot switcher):
- MCS-51 based CPU 44-pin (markings removed)
diff --git a/src/mame/drivers/spg2xx_zone_32bit.cpp b/src/mame/drivers/spg2xx_zone_32bit.cpp
index deec37e8ebe..7751f0f286a 100644
--- a/src/mame/drivers/spg2xx_zone_32bit.cpp
+++ b/src/mame/drivers/spg2xx_zone_32bit.cpp
@@ -186,9 +186,9 @@ void mywicogt_state::porta_w(offs_t offset, uint16_t data, uint16_t mem_mask)
(mem_mask & 0x0002) ? ((data & 0x0002) ? '1' : '0') : 'x',
(mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x');
-//[:] ':maincpu' (000508): porta_w 0b00 (0f00) x x x x | 1 0 1 1 | x x x x | x x x x
-//[:] ':maincpu' (000510): porta_w 0b00 (0f00) x x x x | 1 0 1 1 | x x x x | x x x x
-//[:] ':maincpu' (000518): porta_w 0f00 (0f00) x x x x | 1 1 1 1 | x x x x | x x x x
+//[:] ':maincpu' (000508): porta_w 0b00 (0f00) x x x x | 1 0 1 1 | x x x x | x x x x
+//[:] ':maincpu' (000510): porta_w 0b00 (0f00) x x x x | 1 0 1 1 | x x x x | x x x x
+//[:] ':maincpu' (000518): porta_w 0f00 (0f00) x x x x | 1 1 1 1 | x x x x | x x x x
if (m_maincpu->pc() < 0x1000)
{
@@ -206,7 +206,7 @@ void mywicogt_state::porta_w(offs_t offset, uint16_t data, uint16_t mem_mask)
logerror("changing to bank 0\n");
}
}
-
+
m_porta_dat = data;
}
diff --git a/src/mame/drivers/sspeedr.cpp b/src/mame/drivers/sspeedr.cpp
index 4cb44a5bac3..5daab48e2fd 100644
--- a/src/mame/drivers/sspeedr.cpp
+++ b/src/mame/drivers/sspeedr.cpp
@@ -278,7 +278,7 @@ void sspeedr_state::sspeedr(machine_config &config)
NETLIST_LOGIC_INPUT(config, "sound_nl:lo_shift", "I_LO_SHIFT", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:boom", "I_BOOM", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:engine_sound_off",
- "I_ENGINE_SOUND_OFF", 0);
+ "I_ENGINE_SOUND_OFF", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:noise_cr_1", "I_NOISE_CR_1", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:noise_cr_2", "I_NOISE_CR_2", 0);
NETLIST_LOGIC_INPUT(config, "sound_nl:silence", "I_SILENCE", 0);
diff --git a/src/mame/drivers/starcrus.cpp b/src/mame/drivers/starcrus.cpp
index 5cbcb2e6ff5..4e1cc1c9e25 100644
--- a/src/mame/drivers/starcrus.cpp
+++ b/src/mame/drivers/starcrus.cpp
@@ -2,14 +2,14 @@
// copyright-holders:Frank Palazzolo, Ryan Holtz
/***************************************************************************
- Ramtek Star Cruiser Driver
+ Ramtek Star Cruiser Driver
- (no known issues)
+ (no known issues)
- Frank Palazzolo
- palazzol@home.com
+ Frank Palazzolo
+ palazzol@home.com
- Netlist Audio by Ryan Holtz
+ Netlist Audio by Ryan Holtz
***************************************************************************/
diff --git a/src/mame/drivers/vp101.cpp b/src/mame/drivers/vp101.cpp
index 78216735d6e..dc094bf91b7 100644
--- a/src/mame/drivers/vp101.cpp
+++ b/src/mame/drivers/vp101.cpp
@@ -106,7 +106,7 @@ Small outline design for easy kit retrofitting of existing cabinets.
#include "imagedev/harddriv.h"
#include "screen.h"
-#define VERBOSE (0)
+#define VERBOSE (0)
#include "logmacro.h"
class vp10x_state : public driver_device
diff --git a/src/mame/drivers/vt1682.cpp b/src/mame/drivers/vt1682.cpp
index 2edbf8008fd..4416ed7d129 100644
--- a/src/mame/drivers/vt1682.cpp
+++ b/src/mame/drivers/vt1682.cpp
@@ -6038,7 +6038,7 @@ void vt1682_lxts3_state::unk1682_init()
uint8_t* ROM = memregion("mainrom")->base();
// this jumps to a function on startup that has a bunch of jumps / accesses to the 3xxx region, which is internal ROM
- // but bypassing it allows the unit to boot.
+ // but bypassing it allows the unit to boot.
ROM[0x7ef43] = 0xea;
ROM[0x7ef44] = 0xea;
ROM[0x7ef45] = 0xea;
@@ -6143,7 +6143,7 @@ ROM_START( unk1682 )
ROM_END
ROM_START( njp60in1 )
- ROM_REGION( 0x2000000, "mainrom", 0 ) // the 6Mbyte - 7Mbyte region of the ROM is missing, causing Extreme Power Soccer to fail
+ ROM_REGION( 0x2000000, "mainrom", 0 ) // the 6Mbyte - 7Mbyte region of the ROM is missing, causing Extreme Power Soccer to fail
ROM_LOAD( "60-in-1.bin", 0x00000, 0x0800000, CRC(7b2ee951) SHA1(fc7c214704908b85676efc64a21930483d24a457) )
ROM_CONTINUE(0x0800000, 0x0800000)
ROM_CONTINUE(0x1000000, 0x0800000)
diff --git a/src/mame/drivers/williams.cpp b/src/mame/drivers/williams.cpp
index 9aafc0dcb86..15f8b307cbf 100644
--- a/src/mame/drivers/williams.cpp
+++ b/src/mame/drivers/williams.cpp
@@ -2689,7 +2689,7 @@ There is known to be a "perfect" version of Sinistar, that being the original ve
*/
ROM_START( sinistar ) // rev. 3
ROM_REGION( 0x19000, "maincpu", 0 ) // solid RED labels with final production part numbers
- ROM_LOAD( "sinistar_rom_10-b_16-3004-62.4c", 0x0e000, 0x1000, CRC(3d670417) SHA1(81802622bee8dbea5c0f08019d87d941dcdbe292) )
+ ROM_LOAD( "sinistar_rom_10-b_16-3004-62.4c", 0x0e000, 0x1000, CRC(3d670417) SHA1(81802622bee8dbea5c0f08019d87d941dcdbe292) )
ROM_LOAD( "sinistar_rom_11-b_16-3004-63.4a", 0x0f000, 0x1000, CRC(3162bc50) SHA1(2f38e572ab9c731e38dfe9bad3cc8222a775c5ea) )
ROM_LOAD( "sinistar_rom_1-b_16-3004-53.1d", 0x10000, 0x1000, CRC(f6f3a22c) SHA1(026d8cab07734fa294a5645edbe65a904bcbc302) )
ROM_LOAD( "sinistar_rom_2-b_16-3004-54.1c", 0x11000, 0x1000, CRC(cab3185c) SHA1(423d1e3b0c07333ec582529bc4d0b7baf591820a) )
@@ -2709,12 +2709,12 @@ ROM_START( sinistar ) // rev. 3
ROM_LOAD( "video_sound_rom_9_std.808", 0xf000, 0x1000, CRC(b82f4ddb) SHA1(c70c7dd6e88897920d7709a260f27810f66aade1) )
/*
- ROM_REGION( 0x10000, "soundcpu_b", 0 ) // Stereo sound requires 2nd sound board as used in the cockpit version
- ROM_LOAD( "3004_speech_ic7_r1_16-3004-52.ic7", 0xb000, 0x1000, CRC(e1019568) SHA1(442f4f3ccd2e1db2136d2ffb121ea442921f87ca) )
- ROM_LOAD( "3004_speech_ic5_r1_16-3004-50.ic5", 0xc000, 0x1000, CRC(cf3b5ffd) SHA1(d5d51c550581c9d46ab331dd4fd32541a2ef598e) )
- ROM_LOAD( "3004_speech_ic6_r1_16-3004-51.ic6", 0xd000, 0x1000, CRC(ff8d2645) SHA1(16fa2a602acbbc182dd96bab113ab18356f3daf0) )
- ROM_LOAD( "3004_speech_ic4_r1_16-3004-49.ic4", 0xe000, 0x1000, CRC(4b56a626) SHA1(44430cd5c110ec751b0bfb8ae99b26d443350db1) )
- ROM_LOAD( "sinistar_stereo_18-a.ic12", 0xf000, 0x1000, CRC(b5c70082) SHA1(643af087b57da3a71c68372c79c5777e0c1fbef7) ) // not sure if all speech ROMs need to be here too
+ ROM_REGION( 0x10000, "soundcpu_b", 0 ) // Stereo sound requires 2nd sound board as used in the cockpit version
+ ROM_LOAD( "3004_speech_ic7_r1_16-3004-52.ic7", 0xb000, 0x1000, CRC(e1019568) SHA1(442f4f3ccd2e1db2136d2ffb121ea442921f87ca) )
+ ROM_LOAD( "3004_speech_ic5_r1_16-3004-50.ic5", 0xc000, 0x1000, CRC(cf3b5ffd) SHA1(d5d51c550581c9d46ab331dd4fd32541a2ef598e) )
+ ROM_LOAD( "3004_speech_ic6_r1_16-3004-51.ic6", 0xd000, 0x1000, CRC(ff8d2645) SHA1(16fa2a602acbbc182dd96bab113ab18356f3daf0) )
+ ROM_LOAD( "3004_speech_ic4_r1_16-3004-49.ic4", 0xe000, 0x1000, CRC(4b56a626) SHA1(44430cd5c110ec751b0bfb8ae99b26d443350db1) )
+ ROM_LOAD( "sinistar_stereo_18-a.ic12", 0xf000, 0x1000, CRC(b5c70082) SHA1(643af087b57da3a71c68372c79c5777e0c1fbef7) ) // not sure if all speech ROMs need to be here too
*/
ROM_REGION( 0x0400, "proms", 0 )
@@ -2744,12 +2744,12 @@ ROM_START( sinistar2 ) // rev. 2
ROM_LOAD( "video_sound_rom_9_std.808", 0xf000, 0x1000, CRC(b82f4ddb) SHA1(c70c7dd6e88897920d7709a260f27810f66aade1) )
/*
- ROM_REGION( 0x10000, "soundcpu_b", 0 ) // Stereo sound requires 2nd sound board as used in the cockpit version
- ROM_LOAD( "3004_speech_ic7_r1_16-3004-52.ic7", 0xb000, 0x1000, CRC(e1019568) SHA1(442f4f3ccd2e1db2136d2ffb121ea442921f87ca) )
- ROM_LOAD( "3004_speech_ic5_r1_16-3004-50.ic5", 0xc000, 0x1000, CRC(cf3b5ffd) SHA1(d5d51c550581c9d46ab331dd4fd32541a2ef598e) )
- ROM_LOAD( "3004_speech_ic6_r1_16-3004-51.ic6", 0xd000, 0x1000, CRC(ff8d2645) SHA1(16fa2a602acbbc182dd96bab113ab18356f3daf0) )
- ROM_LOAD( "3004_speech_ic4_r1_16-3004-49.ic4", 0xe000, 0x1000, CRC(4b56a626) SHA1(44430cd5c110ec751b0bfb8ae99b26d443350db1) )
- ROM_LOAD( "sinistar_stereo_18-a.ic12", 0xf000, 0x1000, CRC(b5c70082) SHA1(643af087b57da3a71c68372c79c5777e0c1fbef7) ) // not sure if all speech ROMs need to be here too
+ ROM_REGION( 0x10000, "soundcpu_b", 0 ) // Stereo sound requires 2nd sound board as used in the cockpit version
+ ROM_LOAD( "3004_speech_ic7_r1_16-3004-52.ic7", 0xb000, 0x1000, CRC(e1019568) SHA1(442f4f3ccd2e1db2136d2ffb121ea442921f87ca) )
+ ROM_LOAD( "3004_speech_ic5_r1_16-3004-50.ic5", 0xc000, 0x1000, CRC(cf3b5ffd) SHA1(d5d51c550581c9d46ab331dd4fd32541a2ef598e) )
+ ROM_LOAD( "3004_speech_ic6_r1_16-3004-51.ic6", 0xd000, 0x1000, CRC(ff8d2645) SHA1(16fa2a602acbbc182dd96bab113ab18356f3daf0) )
+ ROM_LOAD( "3004_speech_ic4_r1_16-3004-49.ic4", 0xe000, 0x1000, CRC(4b56a626) SHA1(44430cd5c110ec751b0bfb8ae99b26d443350db1) )
+ ROM_LOAD( "sinistar_stereo_18-a.ic12", 0xf000, 0x1000, CRC(b5c70082) SHA1(643af087b57da3a71c68372c79c5777e0c1fbef7) ) // not sure if all speech ROMs need to be here too
*/
ROM_REGION( 0x0400, "proms", 0 )
diff --git a/src/mame/includes/spg2xx.h b/src/mame/includes/spg2xx.h
index 8437dbb9d48..0dfb6c01f08 100644
--- a/src/mame/includes/spg2xx.h
+++ b/src/mame/includes/spg2xx.h
@@ -286,10 +286,10 @@ public:
void wfcentro(machine_config &config);
protected:
-// virtual void machine_start() override;
-// virtual void machine_reset() override;
+// virtual void machine_start() override;
+// virtual void machine_reset() override;
-// virtual void portc_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override;
+// virtual void portc_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override;
private:
diff --git a/src/mame/layout/gigatron.lay b/src/mame/layout/gigatron.lay
index dc7562db2f2..04d31602bfa 100644
--- a/src/mame/layout/gigatron.lay
+++ b/src/mame/layout/gigatron.lay
@@ -29,4 +29,4 @@ license:CC0
<bounds x="60" y="15" width="10" height="10" />
</bezel>
</view>
-</mamelayout> \ No newline at end of file
+</mamelayout>
diff --git a/src/mame/machine/bacta_datalogger.cpp b/src/mame/machine/bacta_datalogger.cpp
index 816c24ca095..64bcd8eb582 100644
--- a/src/mame/machine/bacta_datalogger.cpp
+++ b/src/mame/machine/bacta_datalogger.cpp
@@ -16,7 +16,7 @@
BACTA Datalogger emulation
The British Amusement and Catering Trade Association created a standard for the tracking of statistics
and other features on British AWPs across hardware manufacturers.
- The specification is very simple, a 1200 baud null modem connection via RS232, with the logger sending an
+ The specification is very simple, a 1200 baud null modem connection via RS232, with the logger sending an
ACK command (0x06) on receipt of a valid character, and NAK (0x15) on error.
In this emulation, the simplest possible device is simulated here, derived from the RS232 null_modem.
We only handle the feedback for acknowledgment, and limited logging.
@@ -53,7 +53,7 @@ void bacta_datalogger_device::device_reset()
int startbits = 1;
int databits = 8;
parity_t parity = device_serial_interface::PARITY_ODD;
- stop_bits_t stopbits = device_serial_interface::STOP_BITS_1;
+ stop_bits_t stopbits = device_serial_interface::STOP_BITS_1;
set_data_frame(startbits, databits, parity, stopbits);
@@ -95,7 +95,7 @@ void bacta_datalogger_device::rcv_complete()
receive_register_extract();
- data = get_received_char();
+ data = get_received_char();
if (data != 0x00)
{
if (data > 0x80)
@@ -106,7 +106,7 @@ void bacta_datalogger_device::rcv_complete()
{
return;
}
- }
+ }
m_last_input = data;
switch (data)
{
@@ -200,7 +200,7 @@ void bacta_datalogger_device::rcv_complete()
case 0x7f:
LOGDATA("(%c) User defined message (0x%x), next byte is message length\n",data,data);
break;
-
+
default:
LOGDATA("(%c) Received: %02x\n",data, data);
break;
@@ -209,11 +209,11 @@ void bacta_datalogger_device::rcv_complete()
tx_queue();
}
else
- {
- if (data != 0x00)
+ {
+ if (data != 0x00)
{
m_output_char = 0x15;//NAK
tx_queue();
}
}
-} \ No newline at end of file
+}
diff --git a/src/mame/machine/nl_tank.cpp b/src/mame/machine/nl_tank.cpp
index cf82f52ccf8..e956d12a09c 100644
--- a/src/mame/machine/nl_tank.cpp
+++ b/src/mame/machine/nl_tank.cpp
@@ -1928,4 +1928,4 @@ NETLIST_START(tank)
NET_C(VCC, IC_J11.9, IC_J11.11, IC_J11.13)
NET_C(VCC, IC_J3.9)
NET_C(VCC, IC_N13.1, IC_N13.13)
-NETLIST_END() \ No newline at end of file
+NETLIST_END()
diff --git a/src/mame/machine/nl_tank.h b/src/mame/machine/nl_tank.h
index fd480c03810..f3cc88d7cf1 100644
--- a/src/mame/machine/nl_tank.h
+++ b/src/mame/machine/nl_tank.h
@@ -9,4 +9,4 @@
NETLIST_EXTERNAL(tank)
-#endif // MAME_MACHINE_NL_TANK_H \ No newline at end of file
+#endif // MAME_MACHINE_NL_TANK_H
diff --git a/src/mame/video/x1.cpp b/src/mame/video/x1.cpp
index 8a457c3d68e..af20bf5577d 100644
--- a/src/mame/video/x1.cpp
+++ b/src/mame/video/x1.cpp
@@ -6,8 +6,8 @@
*
* TODO:
* - Rewrite drawing functions by taking scanline renderer into account
- * * cfr. x1fdemo raster effect on first screen.
- * - Use mc6845 internal functions instead of breaking encapsulation
+ * * cfr. x1fdemo raster effect on first screen.
+ * - Use mc6845 internal functions instead of breaking encapsulation
* * annoying due of the double height/width stuff.
* - Improve border drawing, pinpoint what are the visible limits for a mc6845;
* - Move X1Turbo features into specific overrides;
@@ -111,12 +111,12 @@ void x1_state::draw_fgtilemap(bitmap_rgb32 &bitmap, const rectangle &cliprect)
attribute table:
x--- ---- double width
-x-- ---- double height
- --x- ---- PCG select
+ --x- ---- PCG select
---x ---- color blinking (if 1 reverses color patterns rather than true blinking)
---- x--- reverse color
---- -xxx color pen
-
- X1 Turbo can also access an additional Kanji VRAM area
+
+ X1 Turbo can also access an additional Kanji VRAM area
x--- ---- select Kanji ROM
-x-- ---- Kanji side (0=left, 1=right)
--x- ---- Underline
@@ -257,7 +257,7 @@ void x1_state::draw_fgtilemap(bitmap_rgb32 &bitmap, const rectangle &cliprect)
// reverse attribute
if(color & 8)
pcg_pen ^= 7;
-
+
// X1Turbo only: the black clip register overrides the pen with black if it's hit
if((m_scrn_reg.blackclip & 8) && (color == (m_scrn_reg.blackclip & 7)))
pcg_pen = 0;
@@ -361,7 +361,7 @@ void x1_state::draw_gfxbitmap(bitmap_rgb32 &bitmap, const rectangle &cliprect, i
// TODO: not working properly, see top of file
if(y*(mc6845_tile_height)+yi < cliprect.min_y || y*(mc6845_tile_height)+yi > cliprect.max_y)
continue;
-
+
// TODO: call a fn subset instead of looping for a width/height that is never hit
x1_draw_pixel(bitmap, y*(mc6845_tile_height)+yi, x*8+xi, color, 0, 0);
}