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author Vas Crabb <vas@vastheman.com>2020-07-26 12:56:13 +1000
committer Vas Crabb <vas@vastheman.com>2020-07-26 12:56:13 +1000
commit60bd3086cc826664a46fc7e703a11e6518482e01 (patch)
tree8c4904cb6ddd01ffae996ab845a3ec446b74518b
parentfab7f87398ef533d59fd991718808180cd67019a (diff)
srcclean for 0.223
-rw-r--r--hash/gba.xml54
-rw-r--r--hash/ibm5150.xml14
-rw-r--r--hash/mobigo_cart.xml6
-rw-r--r--hash/sgi_mips_hdd.xml4
-rw-r--r--hash/tvgogo.xml2
-rw-r--r--hash/ut88.xml4
-rw-r--r--hash/vsmilem_cart.xml6
-rw-r--r--src/devices/bus/centronics/samdac.cpp2
-rw-r--r--src/devices/bus/samcoupe/drive/drive.h36
-rw-r--r--src/devices/bus/samcoupe/expansion/expansion.h68
-rw-r--r--src/devices/bus/samcoupe/mouse/mouseport.h20
-rw-r--r--src/devices/bus/spectrum/floppyone.cpp6
-rw-r--r--src/devices/bus/spectrum/floppyone.h6
-rw-r--r--src/devices/bus/spectrum/kempdisc.cpp10
-rw-r--r--src/devices/bus/spectrum/kempdisc.h2
-rw-r--r--src/devices/bus/spectrum/logitek.h4
-rw-r--r--src/devices/bus/spectrum/sdi.cpp2
-rw-r--r--src/devices/bus/spectrum/sixword.cpp2
-rw-r--r--src/devices/bus/spectrum/sixword.h2
-rw-r--r--src/devices/bus/spectrum/speccydos.cpp2
-rw-r--r--src/devices/cpu/gigatron/gigatron.cpp4
-rw-r--r--src/devices/cpu/gigatron/gigatron.h2
-rw-r--r--src/devices/machine/6821pia.cpp4
-rw-r--r--src/devices/machine/ibm21s850.cpp36
-rw-r--r--src/devices/machine/ibm21s850.h254
-rw-r--r--src/devices/machine/m68sfdc.cpp20
-rw-r--r--src/devices/machine/m68sfdc.h4
-rw-r--r--src/devices/machine/pxa255.cpp6
-rw-r--r--src/devices/machine/pxa255defs.h46
-rw-r--r--src/devices/machine/sa1110.cpp2
-rw-r--r--src/devices/machine/sa1110.h30
-rw-r--r--src/devices/machine/tsb12lv01a.cpp14
-rw-r--r--src/devices/machine/tsb12lv01a.h228
-rw-r--r--src/devices/machine/v3021.cpp162
-rw-r--r--src/devices/sound/ics2115.cpp6
-rw-r--r--src/devices/sound/rp2c33_snd.cpp18
-rw-r--r--src/devices/sound/rp2c33_snd.h2
-rw-r--r--src/emu/debug/debugcmd.cpp2
-rw-r--r--src/lib/formats/fl1_dsk.h2
-rw-r--r--src/lib/formats/mdos_dsk.cpp2
-rw-r--r--src/lib/formats/swd_dsk.cpp2
-rw-r--r--src/lib/netlist/devices/nld_ne555.cpp2
-rw-r--r--src/lib/netlist/plib/pfunction.cpp2
-rw-r--r--src/lib/netlist/plib/pfunction.h2
-rw-r--r--src/lib/netlist/plib/pmath.h4
-rw-r--r--src/mame/audio/cinemat.h2
-rw-r--r--src/mame/audio/cmi01a.cpp10
-rw-r--r--src/mame/audio/cmi01a.h16
-rw-r--r--src/mame/audio/nl_armora.cpp1238
-rw-r--r--src/mame/audio/nl_barrier.cpp90
-rw-r--r--src/mame/audio/nl_boxingb.cpp2728
-rw-r--r--src/mame/audio/nl_cinemat_common.h14
-rw-r--r--src/mame/audio/nl_gunfight.cpp16
-rw-r--r--src/mame/audio/nl_ripoff.cpp146
-rw-r--r--src/mame/audio/nl_solarq.cpp2152
-rw-r--r--src/mame/audio/nl_spacewar.cpp104
-rw-r--r--src/mame/audio/nl_speedfrk.cpp288
-rw-r--r--src/mame/audio/nl_starcas.cpp314
-rw-r--r--src/mame/audio/nl_starhawk.cpp182
-rw-r--r--src/mame/audio/nl_sundance.cpp96
-rw-r--r--src/mame/audio/nl_tailg.cpp122
-rw-r--r--src/mame/audio/nl_warrior.cpp100
-rw-r--r--src/mame/audio/s11c_bg.cpp14
-rw-r--r--src/mame/drivers/astrof.cpp2
-rw-r--r--src/mame/drivers/bigkarnk_ms.cpp18
-rw-r--r--src/mame/drivers/bingor.cpp66
-rw-r--r--src/mame/drivers/bloodbro_ms.cpp18
-rw-r--r--src/mame/drivers/cinemat.cpp2
-rw-r--r--src/mame/drivers/cmi.cpp4
-rw-r--r--src/mame/drivers/ddenlovr.cpp10
-rw-r--r--src/mame/drivers/exidyttl.cpp4
-rw-r--r--src/mame/drivers/exorciser.cpp8
-rw-r--r--src/mame/drivers/funworld.cpp22
-rw-r--r--src/mame/drivers/galpanic_ms.cpp12
-rw-r--r--src/mame/drivers/gigatron.cpp16
-rw-r--r--src/mame/drivers/goldnpkr.cpp86
-rw-r--r--src/mame/drivers/kas89.cpp2
-rw-r--r--src/mame/drivers/lft_chiptune.cpp2
-rw-r--r--src/mame/drivers/lft_craft.cpp2
-rw-r--r--src/mame/drivers/lft_phasor.cpp2
-rw-r--r--src/mame/drivers/magicard.cpp8
-rw-r--r--src/mame/drivers/midvunit.cpp2
-rw-r--r--src/mame/drivers/midzeus.cpp14
-rw-r--r--src/mame/drivers/monkey_king_3b.cpp44
-rw-r--r--src/mame/drivers/nes_clone.cpp8
-rw-r--r--src/mame/drivers/nes_sh6578.cpp2
-rw-r--r--src/mame/drivers/raiden_ms.cpp2
-rw-r--r--src/mame/drivers/seattle.cpp2
-rw-r--r--src/mame/drivers/spg2xx.cpp4
-rw-r--r--src/mame/drivers/spg2xx_shredmjr.cpp4
-rw-r--r--src/mame/drivers/spg2xx_wiwi.cpp20
-rw-r--r--src/mame/drivers/splash_ms.cpp18
-rw-r--r--src/mame/drivers/truco.cpp46
-rw-r--r--src/mame/drivers/vegas.cpp8
-rw-r--r--src/mame/drivers/vsmile.cpp8
-rw-r--r--src/mame/drivers/vt1682.cpp2
-rw-r--r--src/mame/includes/midzeus.h52
-rw-r--r--src/mame/layout/v4addlad.lay2
-rw-r--r--src/mame/layout/v4barqst.lay2
-rw-r--r--src/mame/layout/v4strike.lay8
-rw-r--r--src/mame/machine/mpu4.cpp14
-rw-r--r--src/mame/video/pgm.cpp44
-rw-r--r--src/mame/video/xmen.cpp4
103 files changed, 4667 insertions, 4667 deletions
diff --git a/hash/gba.xml b/hash/gba.xml
index b03cffb908a..1d7dc3088e3 100644
--- a/hash/gba.xml
+++ b/hash/gba.xml
@@ -41517,19 +41517,19 @@ license:CC0
</dataarea>
</part>
</software>
-
+
<!-- hacked dumpd of protected games using 'Sintax' protection.
-
- These games have a protection device which locks out certain ranges (and further reads) depending on the otherwised unused
- upper address bits. Furthermore there is some kind of bootstrap mechanism to bypass the GBA protection.
-
- The dumps are 'full address range' as to bypass the address lockouts, with the expected data for booting patched in.
-
- These should be replaced with proper dumps of the flash ROM, with the lockout ranges documented and simulated
- as things stand they have to be marked as 'bad' as they're not true archival quality dumps.
-
- see http://hhug.me/?post=90 for details
-
+
+ These games have a protection device which locks out certain ranges (and further reads) depending on the otherwised unused
+ upper address bits. Furthermore there is some kind of bootstrap mechanism to bypass the GBA protection.
+
+ The dumps are 'full address range' as to bypass the address lockouts, with the expected data for booting patched in.
+
+ These should be replaced with proper dumps of the flash ROM, with the lockout ranges documented and simulated
+ as things stand they have to be marked as 'bad' as they're not true archival quality dumps.
+
+ see http://hhug.me/?post=90 for details
+
-->
<software name="rayman4">
<description>Rayman IV (Rayman - Sunshine of Trip) (unlicensed) (protection hacked)</description>
@@ -41540,7 +41540,7 @@ license:CC0
<rom name="Rayman IV (Rayman - Sunshine of Trip) (Unl) (Eng) [YJ restored].gba" size="0x2000000" crc="d72c620f" sha1="0ef17374ee28f903127493bf47c14971aa6ed0b8" status="baddump" />
</dataarea>
</part>
- </software>
+ </software>
<software name="rayman4r" cloneof="rayman4">
<description>Rayman IV (Rayman - Puteshestviye Solnechnogo Sveta) (unlicensed) (Russian) (protection hacked)</description>
@@ -41574,7 +41574,7 @@ license:CC0
<rom name="Super Mario DX (Unl) (Eng) [YJ restored].gba" size="0x2000000" crc="9255c170" sha1="2b7dce921497e10b43083040bc7a596369fc1b0e" status="baddump" />
</dataarea>
</part>
- </software>
+ </software>
<software name="chaojim" cloneof="smariodx">
<description>Chaoji Maliou DX (unlicensed) (Chinese) (protection hacked)</description>
@@ -41608,7 +41608,7 @@ license:CC0
</dataarea>
</part>
</software>
-
+
<software name="poksaph"> <!-- unlicensed translation -->
<description>Pokemon - Sapphire Version (unlicensed) (protection hacked)</description>
<year>200?</year>
@@ -41618,8 +41618,8 @@ license:CC0
<rom name="Pokemon - Sapphire Version (Unl) (Eng) [YJ restored].gba" size="0x2000000" crc="86a602ab" sha1="14051d159d7a1266b5bfecbfd52722fd3e0711bf" status="baddump" />
</dataarea>
</part>
- </software>
-
+ </software>
+
<software name="sonic3fs">
<description>Sonic 3 - Fighter Sonic (unlicensed) (protection hacked)</description>
<year>200?</year>
@@ -41629,8 +41629,8 @@ license:CC0
<rom name="Sonic 3 - Fighter Sonic (Unl) (Eng) [YJ restored].gba" size="0x2000000" crc="8e0a9112" sha1="b3855ceae35152b8a98c882777f040ac2aa93926" status="baddump" />
</dataarea>
</part>
- </software>
-
+ </software>
+
<software name="tmnturt2">
<description>Teenage Mutant Ninja Turtles 2 (unlicensed) (protection hacked)</description>
<year>200?</year>
@@ -41640,8 +41640,8 @@ license:CC0
<rom name="Teenage Mutant Ninja Turtles 2 (Unl) (Eng) [YJ restored].gba" size="0x2000000" crc="8ee6d3d5" sha1="cbcb99b4ee34d6d83c898a09083a655f7f9eecb1" status="baddump" />
</dataarea>
</part>
- </software>
-
+ </software>
+
<software name="lotr4">
<description>The Lord of the Rings IV - The Fellowship of the Ring (unlicensed) (protection hacked)</description>
<year>200?</year>
@@ -41651,8 +41651,8 @@ license:CC0
<rom name="The Lord of the Rings IV - The Fellowship of the Ring (Unl) (Eng) [YJ restored].gba" size="0x2000000" crc="09c7c895" sha1="bf5f2ec4e7c7df834be9911d217af0d4490e3722" status="baddump" />
</dataarea>
</part>
- </software>
-
+ </software>
+
<software name="ultcje">
<description>Ultraman - Confrontation Between Justice And Evil (Ul'traman - Konfrontatsiya mezhdu spravedlivost'yu i zlom) (unlicensed) (Russian) (protection hacked)</description>
<year>200?</year>
@@ -41662,8 +41662,8 @@ license:CC0
<rom name="Ultraman - Confrontation Between Justice And Evil (Unl) (Rus) [YJ restored].gba" size="0x2000000" crc="4683dbb5" sha1="08a9530ce82a76e1be5e408ae99bdd90c42748e9" status="baddump" />
</dataarea>
</part>
- </software>
-
+ </software>
+
<software name="xmanam">
<description>X-Man - Armour of Might (X-men) (unlicensed) (Russian) (protection hacked)</description>
<year>200?</year>
@@ -41673,6 +41673,6 @@ license:CC0
<rom name="X-Man - Armour of Might (X-men) (Unl) (Rus) [YJ restored].gba" size="0x2000000" crc="e14c9b78" sha1="a894acc460efc9b9b03a7ce55e5a860b64473e13" status="baddump" />
</dataarea>
</part>
- </software>
-
+ </software>
+
</softwarelist>
diff --git a/hash/ibm5150.xml b/hash/ibm5150.xml
index 1b4b9f75b12..e68421b747f 100644
--- a/hash/ibm5150.xml
+++ b/hash/ibm5150.xml
@@ -8175,7 +8175,7 @@ has been replaced with an all-zero block. -->
</dataarea>
</part>
</software>
-
+
<software name="bloodwyca" cloneof="bloodwyc">
<description>Bloodwych (Quest &amp; Glory Compilation) (Euro)</description>
<year>1991</year>
@@ -8187,7 +8187,7 @@ has been replaced with an all-zero block. -->
</dataarea>
</part>
</software>
-
+
<software name="bluesbro">
<!-- Dumped via Kryoflux -->
<description>The Blues Brothers</description>
@@ -8679,7 +8679,7 @@ has been replaced with an all-zero block. -->
</dataarea>
</part>
</software>
-
+
<software name="laurabw35" cloneof="laurabow">
<description>The Colonel's Bequest (3.5")</description>
<year>1989</year>
@@ -8707,7 +8707,7 @@ has been replaced with an all-zero block. -->
</dataarea>
</part>
</software>
-
+
<software name="colossus4">
<description>Colossus Bridge 4</description>
<year>1988</year>
@@ -10193,7 +10193,7 @@ has been replaced with an all-zero block. -->
</dataarea>
</part>
</software>
-
+
<software name="lsl2">
<description>Leisure Suit Larry Goes Looking for Love (in Several Wrong Places) (5.25")</description>
<year>1989</year>
@@ -10865,7 +10865,7 @@ has been replaced with an all-zero block. -->
</dataarea>
</part>
</software>
-
+
<software name="martmemo">
<description>Martian Memorandum</description>
<year>1991</year>
@@ -13108,7 +13108,7 @@ has been replaced with an all-zero block. -->
</dataarea>
</part>
</software>
-
+
<software name="ums2pe">
<description>UMS II: Nations at War - Planet Editor</description>
<year>1992</year>
diff --git a/hash/mobigo_cart.xml b/hash/mobigo_cart.xml
index 0adbeb5aeea..b9f0c4c7acf 100644
--- a/hash/mobigo_cart.xml
+++ b/hash/mobigo_cart.xml
@@ -535,7 +535,7 @@ license:CC0
</dataarea>
</part>
</software>
-
+
<!-- these have downloaded games on them, they do however appear to be tied to the machine that downloaded them, on other units they appear as blank -->
<software name="user1" supported="no">
<description>NAND User Cartridge (unknown data, set 1)</description>
@@ -546,7 +546,7 @@ license:CC0
<rom name="80-201401.bin" size="0x8400000" crc="ea99f4d7" sha1="a9f8a7f05de21d971895e3385621112461a0a339"/>
</dataarea>
</part>
- </software>
+ </software>
<software name="user2" supported="no">
<description>NAND User Cartridge (unknown data, set 2)</description>
@@ -558,6 +558,6 @@ license:CC0
<rom name="80-201404_Console.bin" size="0x8400000" crc="ed3388f5" sha1="583d7eab0bf2a0e9bb90a28d1fdda701f0a7f32b"/>
</dataarea>
</part>
- </software>
+ </software>
</softwarelist>
diff --git a/hash/sgi_mips_hdd.xml b/hash/sgi_mips_hdd.xml
index e80eab2c153..bb4b85eb3a3 100644
--- a/hash/sgi_mips_hdd.xml
+++ b/hash/sgi_mips_hdd.xml
@@ -9,9 +9,9 @@ license:CC0
IRIX requires a valid eaddr and high resolution mode. Before first boot,
enter the PROM command monitor and check printenv. If required settings are
missing, run
- setenv -f eaddr 08:00:69:12:34:56
+ setenv -f eaddr 08:00:69:12:34:56
to set the Ethernet interface address, and
- setenv monitor h
+ setenv monitor h
to enable high resolution mode (1280x1024), then power cycle.
Unless otherwise specified, all images are based on default installs of the
diff --git a/hash/tvgogo.xml b/hash/tvgogo.xml
index 7dd99c33cd1..d0061e63253 100644
--- a/hash/tvgogo.xml
+++ b/hash/tvgogo.xml
@@ -115,7 +115,7 @@ _(EU)__|__(US)__|____________|_____________________________________
</dataarea>
</part>
</software>
-
+
<software name="basketbalu" cloneof="basketbal" supported="no">
<description>Basketball (US)</description>
<year>2005</year>
diff --git a/hash/ut88.xml b/hash/ut88.xml
index e8f8cda2062..3d77efcbd18 100644
--- a/hash/ut88.xml
+++ b/hash/ut88.xml
@@ -22,8 +22,8 @@ These are for ut88 only - not for ut88mini
</software>
<!-- The only way to use this is to start in the debugger and load and run cpm256. Then g f800 to get back to the monitor.
- Then load this tape in the usual manner, then G 100. It will start and expect to load another tape, but after that it
- hangs. What is it supposed to do? -->
+ Then load this tape in the usual manner, then G 100. It will start and expect to load another tape, but after that it
+ hangs. What is it supposed to do? -->
<software name="chscom">
<description>Changer (v1.1) (CP/M)</description>
<year>19??</year>
diff --git a/hash/vsmilem_cart.xml b/hash/vsmilem_cart.xml
index 4be9f1a3de0..6ecb2211023 100644
--- a/hash/vsmilem_cart.xml
+++ b/hash/vsmilem_cart.xml
@@ -1012,8 +1012,8 @@ Language:
<rom name="vmotion80-084300.bin" size="0x0800000" crc="4d0dd939" sha1="b5411b036fa91daf56f654be4ce71b4ac15541ca" />
</dataarea>
</part>
- </software>
-
+ </software>
+
<software name="soccerchmg" cloneof="soccerchm">
<description>Fußball Meisterschaft (Germany)</description>
<year>20??</year>
@@ -1333,5 +1333,5 @@ Language:
</dataarea>
</part>
</software>
-
+
</softwarelist>
diff --git a/src/devices/bus/centronics/samdac.cpp b/src/devices/bus/centronics/samdac.cpp
index 333c101d502..b976f521947 100644
--- a/src/devices/bus/centronics/samdac.cpp
+++ b/src/devices/bus/centronics/samdac.cpp
@@ -76,7 +76,7 @@ WRITE_LINE_MEMBER( centronics_samdac_device::input_strobe )
// raising edge, write to left channel
if (m_strobe == 0 && state == 1)
m_dac[0]->data_w(m_data[0]);
-
+
// failing edge, write to right channel
if (m_strobe == 1 && state == 0)
m_dac[1]->data_w(m_data[1]);
diff --git a/src/devices/bus/samcoupe/drive/drive.h b/src/devices/bus/samcoupe/drive/drive.h
index 5ef3687c225..83f7ce0f069 100644
--- a/src/devices/bus/samcoupe/drive/drive.h
+++ b/src/devices/bus/samcoupe/drive/drive.h
@@ -4,24 +4,24 @@
SAM Coupe Drive Slot
- 32-pin slot
-
- 1A 0 VOLTS 1B WR
- 2A 0 VOLTS 2B A0
- 3A 0 VOLTS 3B A1
- 4A 0 VOLTS 4B D0
- 5A 0 VOLTS 5B D1
- 6A 0 VOLTS 6B D2
- 7A 0 VOLTS 7B D3
- 8A 0 VOLTS 8B D4
- 9A 0 VOLTS 9B D5
- 10A 0 VOLTS 10B D6
- 11A 0 VOLTS 11B D7
- 12A 0 VOLTS 12B 8 MHz
- 13A 0 VOLTS 13B RST
- 14A 0 VOLTS 14B N/C
- 15A 0 VOLTS 15B A2
- 16A 0 VOLTS 16B DISK 1 OR DISK 2
+ 32-pin slot
+
+ 1A 0 VOLTS 1B WR
+ 2A 0 VOLTS 2B A0
+ 3A 0 VOLTS 3B A1
+ 4A 0 VOLTS 4B D0
+ 5A 0 VOLTS 5B D1
+ 6A 0 VOLTS 6B D2
+ 7A 0 VOLTS 7B D3
+ 8A 0 VOLTS 8B D4
+ 9A 0 VOLTS 9B D5
+ 10A 0 VOLTS 10B D6
+ 11A 0 VOLTS 11B D7
+ 12A 0 VOLTS 12B 8 MHz
+ 13A 0 VOLTS 13B RST
+ 14A 0 VOLTS 14B N/C
+ 15A 0 VOLTS 15B A2
+ 16A 0 VOLTS 16B DISK 1 OR DISK 2
***************************************************************************/
diff --git a/src/devices/bus/samcoupe/expansion/expansion.h b/src/devices/bus/samcoupe/expansion/expansion.h
index 7b1e6be4e80..90390286ac2 100644
--- a/src/devices/bus/samcoupe/expansion/expansion.h
+++ b/src/devices/bus/samcoupe/expansion/expansion.h
@@ -4,40 +4,40 @@
SAM Coupe Expansion Slot
- 64-pin slot
-
- 1A DBDIR 1C IORQL
- 2A RDL 2C MREQL
- 3A WRL 3C HALTL
- 4A BUSAKL 4C NMIL
- 5A WAITL 5C INTL
- 6A BUSREQL 6C CD1
- 7A RESETL 7C CD0
- 8A CM1L 8C CD7
- 9A REFRESHL 9C CD2
- 10A 0 VOLTS 10C +5 VOLTS
- 11A A0 11C CD6
- 12A A1 12C CD5
- 13A A2 13C CD3
- 14A A3 14C CD4
- 15A A4 15C CPU CLK
- 16A A5 16C A15
- 17A A6 17C A14
- 18A A7 18C A13
- 19A A8 19C A12
- 20A A9 20C A11
- 21A A10 21C DISK 2L
- 22A MSEINTL 22C ROMCSL
- 23A XMEML 23C EARMIC
- 24A 8 MHz 24C DISK 1L
- 25A RED 1 25C PRINTL
- 26A GREEN 1 26C BLUE 1
- 27A C SYNC 27C ROMCSRL
- 28A SPEN 28C AUDIO RIGHT
- 29A BLUE 0 29C AUDIO LEFT
- 30A RED 0 30C COMP VIDEO
- 31A BRIGHT 31C GREEN 0
- 32A +5 VOLTS 32C 0 VOLTS
+ 64-pin slot
+
+ 1A DBDIR 1C IORQL
+ 2A RDL 2C MREQL
+ 3A WRL 3C HALTL
+ 4A BUSAKL 4C NMIL
+ 5A WAITL 5C INTL
+ 6A BUSREQL 6C CD1
+ 7A RESETL 7C CD0
+ 8A CM1L 8C CD7
+ 9A REFRESHL 9C CD2
+ 10A 0 VOLTS 10C +5 VOLTS
+ 11A A0 11C CD6
+ 12A A1 12C CD5
+ 13A A2 13C CD3
+ 14A A3 14C CD4
+ 15A A4 15C CPU CLK
+ 16A A5 16C A15
+ 17A A6 17C A14
+ 18A A7 18C A13
+ 19A A8 19C A12
+ 20A A9 20C A11
+ 21A A10 21C DISK 2L
+ 22A MSEINTL 22C ROMCSL
+ 23A XMEML 23C EARMIC
+ 24A 8 MHz 24C DISK 1L
+ 25A RED 1 25C PRINTL
+ 26A GREEN 1 26C BLUE 1
+ 27A C SYNC 27C ROMCSRL
+ 28A SPEN 28C AUDIO RIGHT
+ 29A BLUE 0 29C AUDIO LEFT
+ 30A RED 0 30C COMP VIDEO
+ 31A BRIGHT 31C GREEN 0
+ 32A +5 VOLTS 32C 0 VOLTS
***************************************************************************/
diff --git a/src/devices/bus/samcoupe/mouse/mouseport.h b/src/devices/bus/samcoupe/mouse/mouseport.h
index 6259574e1ea..92943f39a7c 100644
--- a/src/devices/bus/samcoupe/mouse/mouseport.h
+++ b/src/devices/bus/samcoupe/mouse/mouseport.h
@@ -4,16 +4,16 @@
SAM Coupe Mouse Port
- 8-pin connector
-
- 1 K3
- 2 K2
- 3 K1
- 4 K5
- 5 K4
- 6 MSEINT
- 7 RDMSEL
- 8 5V
+ 8-pin connector
+
+ 1 K3
+ 2 K2
+ 3 K1
+ 4 K5
+ 5 K4
+ 6 MSEINT
+ 7 RDMSEL
+ 8 5V
***************************************************************************/
diff --git a/src/devices/bus/spectrum/floppyone.cpp b/src/devices/bus/spectrum/floppyone.cpp
index bd19a36bac1..fc62eff72b6 100644
--- a/src/devices/bus/spectrum/floppyone.cpp
+++ b/src/devices/bus/spectrum/floppyone.cpp
@@ -8,7 +8,7 @@
FD1791-based floppy drive and printer interface with 4K RAM and 8K ROM
Was mainly designed as tape replacement, and sort of emulate how tapes works,
which allows to copy and use most of existing software and (not protected) games with no modification.
-
+
Doube-side drives considered as 2 separate floppies (0 and 4, 1 and 5 etc) probably to mimic tape sides A/B,
disks is password protected.
@@ -20,7 +20,7 @@
SAVE "name" - save program
!FORMAT "diskname";"password";tracks - format disk, if disk was already formatted you'll be prompted for password.
!6=n - set text mode, 0 - regular 32-column, 3 - 64-column
- !B=rs232delay, 0=use parallel printer (default)
+ !B=rs232delay, 0=use parallel printer (default)
There is more of special "!x=n" commands, but theirs functions is not known, manual is missing.
Some information about this device https://worldofspectrum.org/forums/discussion/42944/rocky-gush-floppy-drive-interface/p1
@@ -114,7 +114,7 @@ void spectrum_flpone_device::device_add_mconfig(machine_config &config)
{
FD1791(config, m_fdc, 1_MHz_XTAL);
- FLOPPY_CONNECTOR(config, "fdc:0", flpone_floppies, "525qd", spectrum_flpone_device::floppy_formats).enable_sound(true);
+ FLOPPY_CONNECTOR(config, "fdc:0", flpone_floppies, "525qd", spectrum_flpone_device::floppy_formats).enable_sound(true);
FLOPPY_CONNECTOR(config, "fdc:1", flpone_floppies, "525qd", spectrum_flpone_device::floppy_formats).enable_sound(true);
FLOPPY_CONNECTOR(config, "fdc:2", flpone_floppies, nullptr, spectrum_flpone_device::floppy_formats).enable_sound(true);
FLOPPY_CONNECTOR(config, "fdc:3", flpone_floppies, nullptr, spectrum_flpone_device::floppy_formats).enable_sound(true);
diff --git a/src/devices/bus/spectrum/floppyone.h b/src/devices/bus/spectrum/floppyone.h
index 1d91bc896fc..5b613ddfe34 100644
--- a/src/devices/bus/spectrum/floppyone.h
+++ b/src/devices/bus/spectrum/floppyone.h
@@ -2,8 +2,8 @@
// copyright-holders:MetalliC
/*********************************************************************
- FloppyOne DOS Interface
- (c) 1984/5 R.P.Gush
+ FloppyOne DOS Interface
+ (c) 1984/5 R.P.Gush
*********************************************************************/
#ifndef MAME_BUS_SPECTRUM_FLPONE_H
@@ -31,7 +31,7 @@ public:
spectrum_flpone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_FLOPPY_FORMATS(floppy_formats);
- DECLARE_INPUT_CHANGED_MEMBER(snapshot_button) { m_slot->nmi_w(newval ? ASSERT_LINE : CLEAR_LINE); };
+ DECLARE_INPUT_CHANGED_MEMBER(snapshot_button) { m_slot->nmi_w(newval ? ASSERT_LINE : CLEAR_LINE); };
protected:
// device-level overrides
diff --git a/src/devices/bus/spectrum/kempdisc.cpp b/src/devices/bus/spectrum/kempdisc.cpp
index 54f707b9908..64a466fc903 100644
--- a/src/devices/bus/spectrum/kempdisc.cpp
+++ b/src/devices/bus/spectrum/kempdisc.cpp
@@ -14,7 +14,7 @@
COPY - tape to disc transfer utility
FORMAT "discname": PRINT drive#, tracks#, sides#, steprate - format disc
- Manual https://archive.org/download/World_of_Spectrum_June_2017_Mirror/World%20of%20Spectrum%20June%202017%20Mirror.zip/World%20of%20Spectrum%20June%202017%20Mirror/sinclair/hardware-info/k/KempstonDiscInterface_Manual.pdf
+ Manual https://archive.org/download/World_of_Spectrum_June_2017_Mirror/World%20of%20Spectrum%20June%202017%20Mirror.zip/World%20of%20Spectrum%20June%202017%20Mirror/sinclair/hardware-info/k/KempstonDiscInterface_Manual.pdf
Notes/TODO:
- schematics is missing, actual I/O ports decode might be not right
@@ -79,7 +79,7 @@ void spectrum_kempdisc_device::device_add_mconfig(machine_config &config)
{
WD1770(config, m_fdc, 16_MHz_XTAL / 2);
- FLOPPY_CONNECTOR(config, "fdc:0", kempdisc_floppies, "525qd", spectrum_kempdisc_device::floppy_formats).enable_sound(true);
+ FLOPPY_CONNECTOR(config, "fdc:0", kempdisc_floppies, "525qd", spectrum_kempdisc_device::floppy_formats).enable_sound(true);
FLOPPY_CONNECTOR(config, "fdc:1", kempdisc_floppies, "525qd", spectrum_kempdisc_device::floppy_formats).enable_sound(true);
FLOPPY_CONNECTOR(config, "fdc:2", kempdisc_floppies, nullptr, spectrum_kempdisc_device::floppy_formats).enable_sound(true);
FLOPPY_CONNECTOR(config, "fdc:3", kempdisc_floppies, nullptr, spectrum_kempdisc_device::floppy_formats).enable_sound(true);
@@ -111,7 +111,7 @@ spectrum_kempdisc_device::spectrum_kempdisc_device(const machine_config &mconfig
, m_fdc(*this, "fdc")
, m_floppy(*this, "fdc:%u", 0)
, m_exp(*this, "exp")
-// , m_control(0)
+// , m_control(0)
{
}
@@ -122,7 +122,7 @@ spectrum_kempdisc_device::spectrum_kempdisc_device(const machine_config &mconfig
void spectrum_kempdisc_device::device_start()
{
save_item(NAME(m_romcs));
-// save_item(NAME(m_control));
+// save_item(NAME(m_control));
}
//-------------------------------------------------
@@ -175,7 +175,7 @@ void spectrum_kempdisc_device::iorq_w(offs_t offset, uint8_t data)
break;
}
-// m_control = data;
+// m_control = data;
m_fdc->set_floppy(floppy);
if (floppy) floppy->ss_w(BIT(data, 0));
if (data & 0xe0)
diff --git a/src/devices/bus/spectrum/kempdisc.h b/src/devices/bus/spectrum/kempdisc.h
index 591ce158cae..78009a05197 100644
--- a/src/devices/bus/spectrum/kempdisc.h
+++ b/src/devices/bus/spectrum/kempdisc.h
@@ -56,7 +56,7 @@ protected:
required_device<spectrum_expansion_slot_device> m_exp;
int m_romcs;
-// u8 m_control;
+// u8 m_control;
};
diff --git a/src/devices/bus/spectrum/logitek.h b/src/devices/bus/spectrum/logitek.h
index 066e0db6d21..079d3f9ca72 100644
--- a/src/devices/bus/spectrum/logitek.h
+++ b/src/devices/bus/spectrum/logitek.h
@@ -2,8 +2,8 @@
// copyright-holders:MetalliC
/*********************************************************************
- Proceed 1 Interface
- (c) 1984 Logitek
+ Proceed 1 Interface
+ (c) 1984 Logitek
*********************************************************************/
#ifndef MAME_BUS_SPECTRUM_LOGITEK_H
diff --git a/src/devices/bus/spectrum/sdi.cpp b/src/devices/bus/spectrum/sdi.cpp
index 0ef63a829e0..7137cbaceb3 100644
--- a/src/devices/bus/spectrum/sdi.cpp
+++ b/src/devices/bus/spectrum/sdi.cpp
@@ -1,4 +1,4 @@
-// license:BSD-3-Clause
+// license:BSD-3-Clause
// copyright-holders:MetalliC
/*********************************************************************
diff --git a/src/devices/bus/spectrum/sixword.cpp b/src/devices/bus/spectrum/sixword.cpp
index 5ba2aca8e4e..b23efda6678 100644
--- a/src/devices/bus/spectrum/sixword.cpp
+++ b/src/devices/bus/spectrum/sixword.cpp
@@ -150,7 +150,7 @@ void spectrum_swiftdisc_device::device_add_mconfig(machine_config &config)
m_fdc->intrq_wr_callback().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::nmi_w));
m_fdc->drq_wr_callback().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::nmi_w));
- FLOPPY_CONNECTOR(config, "fdc:0", swiftdisc_floppies, "35dd", spectrum_swiftdisc_device::floppy_formats).enable_sound(true);
+ FLOPPY_CONNECTOR(config, "fdc:0", swiftdisc_floppies, "35dd", spectrum_swiftdisc_device::floppy_formats).enable_sound(true);
FLOPPY_CONNECTOR(config, "fdc:1", swiftdisc_floppies, "35dd", spectrum_swiftdisc_device::floppy_formats).enable_sound(true);
FLOPPY_CONNECTOR(config, "fdc:2", swiftdisc_floppies, nullptr, spectrum_swiftdisc_device::floppy_formats).enable_sound(true);
FLOPPY_CONNECTOR(config, "fdc:3", swiftdisc_floppies, nullptr, spectrum_swiftdisc_device::floppy_formats).enable_sound(true);
diff --git a/src/devices/bus/spectrum/sixword.h b/src/devices/bus/spectrum/sixword.h
index dea45e0bd58..ab913e3057c 100644
--- a/src/devices/bus/spectrum/sixword.h
+++ b/src/devices/bus/spectrum/sixword.h
@@ -2,7 +2,7 @@
// copyright-holders:MetalliC
/*********************************************************************
- SIXWORD Swift Disc Interface
+ SIXWORD Swift Disc Interface
*********************************************************************/
#ifndef MAME_BUS_SPECTRUM_SIXWORD_H
diff --git a/src/devices/bus/spectrum/speccydos.cpp b/src/devices/bus/spectrum/speccydos.cpp
index 4c439a04d3d..f9eaabc1cd5 100644
--- a/src/devices/bus/spectrum/speccydos.cpp
+++ b/src/devices/bus/spectrum/speccydos.cpp
@@ -103,7 +103,7 @@ void spectrum_speccydos_device::device_add_mconfig(machine_config &config)
{
WD1770(config, m_fdc, 8_MHz_XTAL);
- FLOPPY_CONNECTOR(config, "fdc:0", speccydos_floppies, "525dsqd", spectrum_speccydos_device::floppy_formats).enable_sound(true);
+ FLOPPY_CONNECTOR(config, "fdc:0", speccydos_floppies, "525dsqd", spectrum_speccydos_device::floppy_formats).enable_sound(true);
FLOPPY_CONNECTOR(config, "fdc:1", speccydos_floppies, "525dsqd", spectrum_speccydos_device::floppy_formats).enable_sound(true);
FLOPPY_CONNECTOR(config, "fdc:2", speccydos_floppies, nullptr, spectrum_speccydos_device::floppy_formats).enable_sound(true);
FLOPPY_CONNECTOR(config, "fdc:3", speccydos_floppies, nullptr, spectrum_speccydos_device::floppy_formats).enable_sound(true);
diff --git a/src/devices/cpu/gigatron/gigatron.cpp b/src/devices/cpu/gigatron/gigatron.cpp
index 9226bdda40c..2090acecfe7 100644
--- a/src/devices/cpu/gigatron/gigatron.cpp
+++ b/src/devices/cpu/gigatron/gigatron.cpp
@@ -115,7 +115,7 @@ void gigatron_cpu_device::device_start()
m_outx_cb.resolve_safe();
m_out_cb.resolve_safe();
m_ir_cb.resolve_safe(0);
-
+
reset_cpu();
}
@@ -127,7 +127,7 @@ void gigatron_cpu_device::reset_cpu()
m_pc = 0;
m_npc = (m_pc + 1) & m_romMask;
m_ppc = 0;
- m_inReg = 0xFF;
+ m_inReg = 0xFF;
m_outx = 0;
m_out = 0;
}
diff --git a/src/devices/cpu/gigatron/gigatron.h b/src/devices/cpu/gigatron/gigatron.h
index b0dfa150be4..411c8a041af 100644
--- a/src/devices/cpu/gigatron/gigatron.h
+++ b/src/devices/cpu/gigatron/gigatron.h
@@ -50,7 +50,7 @@ protected:
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
-
+
void reset_cpu();
void branchOp(uint8_t op, uint8_t mode, uint8_t bus, uint8_t d);
diff --git a/src/devices/machine/6821pia.cpp b/src/devices/machine/6821pia.cpp
index cd69790cb03..169dfa1c604 100644
--- a/src/devices/machine/6821pia.cpp
+++ b/src/devices/machine/6821pia.cpp
@@ -229,7 +229,7 @@ uint8_t pia6821_device::get_in_a_value()
port_a_data = 0xff;
if (!m_logged_port_a_not_connected && (m_ddr_a != 0xff) &&
- !machine().side_effects_disabled())
+ !machine().side_effects_disabled())
{
logerror("Warning! No port A read handler. Assuming pins 0x%02X not connected\n", m_ddr_a ^ 0xff);
m_logged_port_a_not_connected = true;
@@ -279,7 +279,7 @@ uint8_t pia6821_device::get_in_b_value()
else
{
if (!m_logged_port_b_not_connected && (m_ddr_b != 0xff)
- && !machine().side_effects_disabled())
+ && !machine().side_effects_disabled())
{
logerror("Error! No port B read handler. Three-state pins 0x%02X are undefined\n", m_ddr_b ^ 0xff);
m_logged_port_b_not_connected = true;
diff --git a/src/devices/machine/ibm21s850.cpp b/src/devices/machine/ibm21s850.cpp
index 227d997f70f..3afb88b27a1 100644
--- a/src/devices/machine/ibm21s850.cpp
+++ b/src/devices/machine/ibm21s850.cpp
@@ -12,12 +12,12 @@
#include "emu.h"
#include "ibm21s850.h"
-#define LOG_READS (1 << 1)
-#define LOG_WRITES (1 << 2)
-#define LOG_UNKNOWNS (1 << 3)
-#define LOG_ALL (LOG_READS | LOG_WRITES | LOG_UNKNOWNS)
+#define LOG_READS (1 << 1)
+#define LOG_WRITES (1 << 2)
+#define LOG_UNKNOWNS (1 << 3)
+#define LOG_ALL (LOG_READS | LOG_WRITES | LOG_UNKNOWNS)
-#define VERBOSE (LOG_ALL)
+#define VERBOSE (LOG_ALL)
#include "logmacro.h"
DEFINE_DEVICE_TYPE(IBM21S850, ibm21s850_device, "ibm21s850", "IBM 21S850 IEEE-1394 1-Port PHY")
@@ -52,12 +52,12 @@ void ibm21s85x_base_device::device_reset()
{
memset(m_regs, 0, 0x10);
- m_regs[ROOT_OFFS] |= ROOT_MASK; // Root node
- m_regs[GAP_COUNT_OFFS] |= 0x3f; // Initial reset value
- m_regs[SPEED_OFFS] |= SPEED_400MBIT << SPEED_SHIFT; // 21S850 and 21S851 both indicate maximum 400Mb/s rate
- m_regs[ENHANCED_REGS_OFFS] |= ENHANCED_REGS_MASK; // 21S850 and 21S851 both have an enhanced register map
- m_regs[CABLE_PWR_OFFS] |= CABLE_PWR_MASK; // Cable is powered
- m_regs[CONNECTION1_OFFS] |= CONNECTION1_MASK; // Port 1 connected
+ m_regs[ROOT_OFFS] |= ROOT_MASK; // Root node
+ m_regs[GAP_COUNT_OFFS] |= 0x3f; // Initial reset value
+ m_regs[SPEED_OFFS] |= SPEED_400MBIT << SPEED_SHIFT; // 21S850 and 21S851 both indicate maximum 400Mb/s rate
+ m_regs[ENHANCED_REGS_OFFS] |= ENHANCED_REGS_MASK; // 21S850 and 21S851 both have an enhanced register map
+ m_regs[CABLE_PWR_OFFS] |= CABLE_PWR_MASK; // Cable is powered
+ m_regs[CONNECTION1_OFFS] |= CONNECTION1_MASK; // Port 1 connected
m_regs[ARB_PHASE_OFFS] |= PHASE_BUS_RESET << ARB_PHASE_OFFS; // Power up in Bus Reset phase
power_on_reset();
@@ -67,18 +67,18 @@ void ibm21s850_device::device_reset()
{
ibm21s85x_base_device::device_reset();
- m_regs[NUM_PORTS_OFFS] |= 0x01; // 1 port available
- m_regs[ENV_OFFS] |= 1 << ENV_SHIFT; // Cable PHY environment
- m_regs[REG_COUNT_OFFS] |= 0x09; // 9 registers following the standard block on 21S850
+ m_regs[NUM_PORTS_OFFS] |= 0x01; // 1 port available
+ m_regs[ENV_OFFS] |= 1 << ENV_SHIFT; // Cable PHY environment
+ m_regs[REG_COUNT_OFFS] |= 0x09; // 9 registers following the standard block on 21S850
}
void ibm21s851_device::device_reset()
{
ibm21s85x_base_device::device_reset();
- m_regs[NUM_PORTS_OFFS] |= 0x03; // 3 port available
- m_regs[ENV_OFFS] |= 1 << ENV_SHIFT; // Cable PHY environment
- m_regs[REG_COUNT_OFFS] |= 0x0b; // 11 registers following the standard block on 21S851
+ m_regs[NUM_PORTS_OFFS] |= 0x03; // 3 port available
+ m_regs[ENV_OFFS] |= 1 << ENV_SHIFT; // Cable PHY environment
+ m_regs[REG_COUNT_OFFS] |= 0x0b; // 11 registers following the standard block on 21S851
}
void ibm21s85x_base_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
@@ -163,4 +163,4 @@ void ibm21s85x_base_device::write(offs_t offset, uint8_t data)
m_regs[offset] = data;
break;
}
-} \ No newline at end of file
+}
diff --git a/src/devices/machine/ibm21s850.h b/src/devices/machine/ibm21s850.h
index 9ed32cb72a1..3853a7c9799 100644
--- a/src/devices/machine/ibm21s850.h
+++ b/src/devices/machine/ibm21s850.h
@@ -38,101 +38,101 @@ protected:
enum : uint32_t
{
- PHYSICAL_ID_OFFS = 0,
- PHYSICAL_ID_SHIFT = 2,
- PHYSICAL_ID_MASK = 0xfc,
- ROOT_OFFS = 0,
- ROOT_MASK = 0x02,
- CABLE_PWR_OFFS = 0,
- CABLE_PWR_MASK = 0x01,
-
- ROOT_HOLD_OFFS = 1,
- ROOT_HOLD_MASK = 0x80,
- BUS_RESET_OFFS = 1,
- BUS_RESET_MASK = 0x40,
- GAP_COUNT_OFFS = 1,
- GAP_COUNT_MASK = 0x3f,
-
- SPEED_OFFS = 2,
- SPEED_SHIFT = 6,
- SPEED_MASK = 0xc0,
- ENHANCED_REGS_OFFS = 2,
- ENHANCED_REGS_MASK = 0x20,
- NUM_PORTS_OFFS = 2,
- NUM_PORTS_MASK = 0x1f,
- SPEED_100MBIT = 0,
- SPEED_200MBIT = 1,
- SPEED_400MBIT = 2,
- SPEED_RESERVED = 3,
-
- ASTAT1_OFFS = 3,
- ASTAT1_SHIFT = 6,
- ASTAT1_MASK = 0xc0,
- BSTAT1_OFFS = 3,
- BSTAT1_SHIFT = 4,
- BSTAT1_MASK = 0x30,
- CHILD1_OFFS = 3,
- CHILD1_MASK = 0x08,
- CONNECTION1_OFFS = 3,
- CONNECTION1_MASK = 0x04,
- PEER_SPEED1_OFFS = 3,
- PEER_SPEED1_MASK = 0x03,
-
- LPS_OFFS = 11,
- LPS_MASK = 0x80,
- PHY_DELAY_OFFS = 11,
- PHY_DELAY_SHIFT = 5,
- PHY_DELAY_MASK = 0x60,
+ PHYSICAL_ID_OFFS = 0,
+ PHYSICAL_ID_SHIFT = 2,
+ PHYSICAL_ID_MASK = 0xfc,
+ ROOT_OFFS = 0,
+ ROOT_MASK = 0x02,
+ CABLE_PWR_OFFS = 0,
+ CABLE_PWR_MASK = 0x01,
+
+ ROOT_HOLD_OFFS = 1,
+ ROOT_HOLD_MASK = 0x80,
+ BUS_RESET_OFFS = 1,
+ BUS_RESET_MASK = 0x40,
+ GAP_COUNT_OFFS = 1,
+ GAP_COUNT_MASK = 0x3f,
+
+ SPEED_OFFS = 2,
+ SPEED_SHIFT = 6,
+ SPEED_MASK = 0xc0,
+ ENHANCED_REGS_OFFS = 2,
+ ENHANCED_REGS_MASK = 0x20,
+ NUM_PORTS_OFFS = 2,
+ NUM_PORTS_MASK = 0x1f,
+ SPEED_100MBIT = 0,
+ SPEED_200MBIT = 1,
+ SPEED_400MBIT = 2,
+ SPEED_RESERVED = 3,
+
+ ASTAT1_OFFS = 3,
+ ASTAT1_SHIFT = 6,
+ ASTAT1_MASK = 0xc0,
+ BSTAT1_OFFS = 3,
+ BSTAT1_SHIFT = 4,
+ BSTAT1_MASK = 0x30,
+ CHILD1_OFFS = 3,
+ CHILD1_MASK = 0x08,
+ CONNECTION1_OFFS = 3,
+ CONNECTION1_MASK = 0x04,
+ PEER_SPEED1_OFFS = 3,
+ PEER_SPEED1_MASK = 0x03,
+
+ LPS_OFFS = 11,
+ LPS_MASK = 0x80,
+ PHY_DELAY_OFFS = 11,
+ PHY_DELAY_SHIFT = 5,
+ PHY_DELAY_MASK = 0x60,
CONFIG_MGR_CAP_OFFS = 11,
CONFIG_MGR_CAP_MASK = 0x10,
- POWER_CLASS_OFFS = 11,
- POWER_CLASS_SHIFT = 1,
- POWER_CLASS_MASK = 0x0e,
-
- CMC_PIN_OFFS = 12,
- CMC_PIN_MASK = 0x80,
- CPS_INT_OFFS = 12,
- CPS_INT_MASK = 0x40,
- LP_TEST_ERR_OFFS = 12,
- LP_TEST_ERR_MASK = 0x20,
- ARB_PHASE_OFFS = 12,
- ARB_PHASE_SHIFT = 3,
- ARB_PHASE_MASK = 0x18,
- ARB_STATE_OFFS = 12,
- ARB_STATE_MASK = 0x07,
- PHASE_BUS_RESET = 0,
- PHASE_TREE_ID = 1,
- PHASE_SELF_ID = 2,
- PHASE_NORMAL = 3,
-
- LP_TEST_EN_OFFS = 13,
- LP_TEST_EN_MASK = 0x40,
- ACK_ACCEL_EN_OFFS = 13,
- ACK_ACCEL_EN_MASK = 0x08,
- MULTISP_CONCAT_EN_OFFS = 13,
- MULTISP_CONCAT_EN_MASK = 0x02,
- MASK_LPS_OFFS = 13,
- MASK_LPS_MASK = 0x01,
-
- EN_TIMEOUT_OFFS = 14,
- EN_TIMEOUT_MASK = 0x80,
- IGNORE_UNPLUG_OFFS = 14,
- IGNORE_UNPLUG_MASK = 0x40,
- OVERRIDE_CMC_OFFS = 14,
- OVERRIDE_CMC_MASK = 0x20,
- SOFT_CMC_OFFS = 14,
- SOFT_CMC_MASK = 0x10,
- DISABLE_P1_OFFS = 14,
- DISABLE_P1_MASK = 0x04,
-
- SOFT_POR_OFFS = 15,
- SOFT_POR_MASK = 0x80,
- SEND_PL_DIAG_OFFS = 15,
- SEND_PL_DIAG_MASK = 0x20,
+ POWER_CLASS_OFFS = 11,
+ POWER_CLASS_SHIFT = 1,
+ POWER_CLASS_MASK = 0x0e,
+
+ CMC_PIN_OFFS = 12,
+ CMC_PIN_MASK = 0x80,
+ CPS_INT_OFFS = 12,
+ CPS_INT_MASK = 0x40,
+ LP_TEST_ERR_OFFS = 12,
+ LP_TEST_ERR_MASK = 0x20,
+ ARB_PHASE_OFFS = 12,
+ ARB_PHASE_SHIFT = 3,
+ ARB_PHASE_MASK = 0x18,
+ ARB_STATE_OFFS = 12,
+ ARB_STATE_MASK = 0x07,
+ PHASE_BUS_RESET = 0,
+ PHASE_TREE_ID = 1,
+ PHASE_SELF_ID = 2,
+ PHASE_NORMAL = 3,
+
+ LP_TEST_EN_OFFS = 13,
+ LP_TEST_EN_MASK = 0x40,
+ ACK_ACCEL_EN_OFFS = 13,
+ ACK_ACCEL_EN_MASK = 0x08,
+ MULTISP_CONCAT_EN_OFFS = 13,
+ MULTISP_CONCAT_EN_MASK = 0x02,
+ MASK_LPS_OFFS = 13,
+ MASK_LPS_MASK = 0x01,
+
+ EN_TIMEOUT_OFFS = 14,
+ EN_TIMEOUT_MASK = 0x80,
+ IGNORE_UNPLUG_OFFS = 14,
+ IGNORE_UNPLUG_MASK = 0x40,
+ OVERRIDE_CMC_OFFS = 14,
+ OVERRIDE_CMC_MASK = 0x20,
+ SOFT_CMC_OFFS = 14,
+ SOFT_CMC_MASK = 0x10,
+ DISABLE_P1_OFFS = 14,
+ DISABLE_P1_MASK = 0x04,
+
+ SOFT_POR_OFFS = 15,
+ SOFT_POR_MASK = 0x80,
+ SEND_PL_DIAG_OFFS = 15,
+ SEND_PL_DIAG_MASK = 0x20,
ACK_ACCEL_SYNC_OFFS = 15,
ACK_ACCEL_SYNC_MASK = 0x10,
- ISBR_OFFS = 15,
- ISBR_MASK = 0x08
+ ISBR_OFFS = 15,
+ ISBR_MASK = 0x08
};
uint8_t m_regs[16];
@@ -151,11 +151,11 @@ private:
enum : uint32_t
{
- ENV_OFFS = 4,
- ENV_SHIFT = 6,
- ENV_MASK = 0xc0,
- REG_COUNT_OFFS = 4,
- REG_COUNT_MASK = 0x3f
+ ENV_OFFS = 4,
+ ENV_SHIFT = 6,
+ ENV_MASK = 0xc0,
+ REG_COUNT_OFFS = 4,
+ REG_COUNT_MASK = 0x3f
};
};
@@ -169,37 +169,37 @@ private:
enum : uint32_t
{
- ASTAT2_OFFS = 4,
- ASTAT2_SHIFT = 6,
- ASTAT2_MASK = 0xc0,
- BSTAT2_OFFS = 4,
- BSTAT2_SHIFT = 4,
- BSTAT2_MASK = 0x30,
- CHILD2_OFFS = 4,
- CHILD2_MASK = 0x08,
- CONNECTION2_OFFS = 4,
- CONNECTION2_MASK = 0x04,
- PEER_SPEED2_OFFS = 4,
- PEER_SPEED2_MASK = 0x03,
-
- ASTAT3_OFFS = 5,
- ASTAT3_SHIFT = 6,
- ASTAT3_MASK = 0xc0,
- BSTAT3_OFFS = 5,
- BSTAT3_SHIFT = 4,
- BSTAT3_MASK = 0x30,
- CHILD3_OFFS = 5,
- CHILD3_MASK = 0x08,
- CONNECTION3_OFFS = 5,
- CONNECTION3_MASK = 0x04,
- PEER_SPEED3_OFFS = 5,
- PEER_SPEED3_MASK = 0x03,
-
- ENV_OFFS = 6,
- ENV_SHIFT = 6,
- ENV_MASK = 0xc0,
- REG_COUNT_OFFS = 6,
- REG_COUNT_MASK = 0x3f
+ ASTAT2_OFFS = 4,
+ ASTAT2_SHIFT = 6,
+ ASTAT2_MASK = 0xc0,
+ BSTAT2_OFFS = 4,
+ BSTAT2_SHIFT = 4,
+ BSTAT2_MASK = 0x30,
+ CHILD2_OFFS = 4,
+ CHILD2_MASK = 0x08,
+ CONNECTION2_OFFS = 4,
+ CONNECTION2_MASK = 0x04,
+ PEER_SPEED2_OFFS = 4,
+ PEER_SPEED2_MASK = 0x03,
+
+ ASTAT3_OFFS = 5,
+ ASTAT3_SHIFT = 6,
+ ASTAT3_MASK = 0xc0,
+ BSTAT3_OFFS = 5,
+ BSTAT3_SHIFT = 4,
+ BSTAT3_MASK = 0x30,
+ CHILD3_OFFS = 5,
+ CHILD3_MASK = 0x08,
+ CONNECTION3_OFFS = 5,
+ CONNECTION3_MASK = 0x04,
+ PEER_SPEED3_OFFS = 5,
+ PEER_SPEED3_MASK = 0x03,
+
+ ENV_OFFS = 6,
+ ENV_SHIFT = 6,
+ ENV_MASK = 0xc0,
+ REG_COUNT_OFFS = 6,
+ REG_COUNT_MASK = 0x3f
};
};
diff --git a/src/devices/machine/m68sfdc.cpp b/src/devices/machine/m68sfdc.cpp
index 471952cf1a6..1f9b37acf4c 100644
--- a/src/devices/machine/m68sfdc.cpp
+++ b/src/devices/machine/m68sfdc.cpp
@@ -210,7 +210,7 @@ u8 m68sfdc_device::read(offs_t offset)
data = (data & 0b11001100) >> 2 | (data & 0b00110011) << 2;
data = (data & 0b10101010) >> 1 | (data & 0b01010101) << 1;
return data;
-
+
}
// The 6821 address lines are swapped.
@@ -251,7 +251,7 @@ void m68sfdc_device::write(offs_t offset, u8 data)
m_ssda_reg[(m_ssda_reg[0] >> 6) + 1] = data;
if (offset == 1 && (m_ssda_reg[0] & C1_AC_MASK) == C1_AC_C2 &&
- (data & C2_PC_MASK) == C2_PC1 && m_enable_read)
+ (data & C2_PC_MASK) == C2_PC1 && m_enable_read)
{
// This a write to the 6852 CR2 register which enables
// the SM output (PC2 = 0, PC1 = 1), while the read
@@ -267,7 +267,7 @@ void m68sfdc_device::write(offs_t offset, u8 data)
{
live_abort();
}
-
+
return;
}
@@ -377,7 +377,7 @@ void m68sfdc_device::pia_pa_w(u8 data)
m_direction = direction;
update_floppy_selection();
-
+
u8 head_load = m_head_load1 && m_head_load2;
if (head_load != m_head_load)
{
@@ -419,7 +419,7 @@ uint8_t m68sfdc_device::pia_pb_r()
if (m_write_protect_mode->read())
wpt = !wpt;
-
+
return (wpt << 4) | (m_crc << 7);
}
@@ -448,7 +448,7 @@ void m68sfdc_device::pia_pb_w(u8 data)
if (m_floppy)
m_floppy->ss_w(m_select3_mode->read() ? m_select_3 : 0);
-
+
update_floppy_selection();
if (shift_crc_edge)
@@ -669,7 +669,7 @@ void m68sfdc_device::live_run(attotime limit)
// 0xaa prefix check is an emulator hack for now to
// improve detection reliability.
if ((cur_live.shift_reg & 0xff) == sync &&
- (cur_live.shift_reg >> 8) == 0xaa)
+ (cur_live.shift_reg >> 8) == 0xaa)
{
// Initialize the CRC. The hardware has an 8
// bit shift register to delay the bit stream
@@ -713,7 +713,7 @@ void m68sfdc_device::live_run(attotime limit)
}
case SYNC_BYTE2:
m_ssda->receive_byte(flip_bits(cur_live.shift_reg & 0xff));
- cur_live.bit_counter = 0;
+ cur_live.bit_counter = 0;
cur_live.state = READ;
checkpoint();
break;
@@ -744,8 +744,8 @@ void m68sfdc_device::live_run(attotime limit)
// expected CRC end positions: address marks, and 128
// and 256 byte data sectors.
if (cur_live.bit_counter == (4 + 2) * 16 ||
- cur_live.bit_counter == (128 + 2) * 16 ||
- cur_live.bit_counter == (256 + 2) * 16)
+ cur_live.bit_counter == (128 + 2) * 16 ||
+ cur_live.bit_counter == (256 + 2) * 16)
{
m_crc = m_last_crc;
}
diff --git a/src/devices/machine/m68sfdc.h b/src/devices/machine/m68sfdc.h
index 2818d406797..aa7dfcb00ee 100644
--- a/src/devices/machine/m68sfdc.h
+++ b/src/devices/machine/m68sfdc.h
@@ -26,7 +26,7 @@ public:
auto irq_handler() { return m_irq_handler.bind(); }
auto nmi_handler() { return m_nmi_handler.bind(); }
-
+
void set_floppies_4(floppy_connector*, floppy_connector*, floppy_connector*, floppy_connector*);
private:
@@ -39,7 +39,7 @@ private:
devcb_write_line m_nmi_handler;
DECLARE_WRITE_LINE_MEMBER(handle_irq);
DECLARE_WRITE_LINE_MEMBER(handle_nmi);
-
+
uint8_t flip_bits(uint8_t data);
uint8_t pia_pa_r();
void pia_pa_w(u8 data);
diff --git a/src/devices/machine/pxa255.cpp b/src/devices/machine/pxa255.cpp
index 7ab7457f757..07e7d997b8c 100644
--- a/src/devices/machine/pxa255.cpp
+++ b/src/devices/machine/pxa255.cpp
@@ -23,9 +23,9 @@
#define LOG_GPIO (1 << 6)
#define LOG_LCD_DMA (1 << 7)
#define LOG_LCD (1 << 8)
-#define LOG_POWER (1 << 9)
-#define LOG_RTC (1 << 10)
-#define LOG_CLOCKS (1 << 11)
+#define LOG_POWER (1 << 9)
+#define LOG_RTC (1 << 10)
+#define LOG_CLOCKS (1 << 11)
#define LOG_ALL (LOG_UNKNOWN | LOG_I2S | LOG_DMA | LOG_OSTIMER | LOG_INTC | LOG_GPIO | LOG_LCD_DMA | LOG_LCD | LOG_POWER | LOG_RTC | LOG_CLOCKS)
#define VERBOSE (LOG_ALL)
diff --git a/src/devices/machine/pxa255defs.h b/src/devices/machine/pxa255defs.h
index b746f08d30a..9857a0871d3 100644
--- a/src/devices/machine/pxa255defs.h
+++ b/src/devices/machine/pxa255defs.h
@@ -220,11 +220,11 @@
*/
-#define PXA255_RTC_BASE_ADDR (0x40900000)
-#define PXA255_RCNR (PXA255_RTC_BASE_ADDR + 0x00000000)
-#define PXA255_RTAR (PXA255_RTC_BASE_ADDR + 0x00000004)
-#define PXA255_RTSR (PXA255_RTC_BASE_ADDR + 0x00000008)
-#define PXA255_RTTR (PXA255_RTC_BASE_ADDR + 0x0000000c)
+#define PXA255_RTC_BASE_ADDR (0x40900000)
+#define PXA255_RCNR (PXA255_RTC_BASE_ADDR + 0x00000000)
+#define PXA255_RTAR (PXA255_RTC_BASE_ADDR + 0x00000004)
+#define PXA255_RTSR (PXA255_RTC_BASE_ADDR + 0x00000008)
+#define PXA255_RTTR (PXA255_RTC_BASE_ADDR + 0x0000000c)
/*
@@ -396,20 +396,20 @@
pg. 85 to 96, PXA255 Processor Developers Manual [278693-002].pdf
*/
-#define PXA255_POWER_BASE_ADDR (0x40f00000)
-#define PXA255_PMCR (PXA255_POWER_BASE_ADDR + 0x00000000)
-#define PXA255_PSSR (PXA255_POWER_BASE_ADDR + 0x00000004)
-#define PXA255_PSPR (PXA255_POWER_BASE_ADDR + 0x00000008)
-#define PXA255_PWER (PXA255_POWER_BASE_ADDR + 0x0000000c)
-#define PXA255_PRER (PXA255_POWER_BASE_ADDR + 0x00000010)
-#define PXA255_PFER (PXA255_POWER_BASE_ADDR + 0x00000014)
-#define PXA255_PEDR (PXA255_POWER_BASE_ADDR + 0x00000018)
-#define PXA255_PCFR (PXA255_POWER_BASE_ADDR + 0x0000001c)
-#define PXA255_PGSR0 (PXA255_POWER_BASE_ADDR + 0x00000020)
-#define PXA255_PGSR1 (PXA255_POWER_BASE_ADDR + 0x00000024)
-#define PXA255_PGSR2 (PXA255_POWER_BASE_ADDR + 0x00000028)
-#define PXA255_RCSR (PXA255_POWER_BASE_ADDR + 0x00000030)
-#define PXA255_PMFW (PXA255_POWER_BASE_ADDR + 0x00000034)
+#define PXA255_POWER_BASE_ADDR (0x40f00000)
+#define PXA255_PMCR (PXA255_POWER_BASE_ADDR + 0x00000000)
+#define PXA255_PSSR (PXA255_POWER_BASE_ADDR + 0x00000004)
+#define PXA255_PSPR (PXA255_POWER_BASE_ADDR + 0x00000008)
+#define PXA255_PWER (PXA255_POWER_BASE_ADDR + 0x0000000c)
+#define PXA255_PRER (PXA255_POWER_BASE_ADDR + 0x00000010)
+#define PXA255_PFER (PXA255_POWER_BASE_ADDR + 0x00000014)
+#define PXA255_PEDR (PXA255_POWER_BASE_ADDR + 0x00000018)
+#define PXA255_PCFR (PXA255_POWER_BASE_ADDR + 0x0000001c)
+#define PXA255_PGSR0 (PXA255_POWER_BASE_ADDR + 0x00000020)
+#define PXA255_PGSR1 (PXA255_POWER_BASE_ADDR + 0x00000024)
+#define PXA255_PGSR2 (PXA255_POWER_BASE_ADDR + 0x00000028)
+#define PXA255_RCSR (PXA255_POWER_BASE_ADDR + 0x00000030)
+#define PXA255_PMFW (PXA255_POWER_BASE_ADDR + 0x00000034)
/*
PXA255 Clock controller
@@ -418,9 +418,9 @@
*/
-#define PXA255_CLOCKS_BASE_ADDR (0x41300000)
-#define PXA255_CCCR (PXA255_CLOCKS_BASE_ADDR + 0x00000000)
-#define PXA255_CKEN (PXA255_CLOCKS_BASE_ADDR + 0x00000004)
-#define PXA255_OSCC (PXA255_CLOCKS_BASE_ADDR + 0x00000008)
+#define PXA255_CLOCKS_BASE_ADDR (0x41300000)
+#define PXA255_CCCR (PXA255_CLOCKS_BASE_ADDR + 0x00000000)
+#define PXA255_CKEN (PXA255_CLOCKS_BASE_ADDR + 0x00000004)
+#define PXA255_OSCC (PXA255_CLOCKS_BASE_ADDR + 0x00000008)
#endif // MAME_MACHINE_PXA255DEFS
diff --git a/src/devices/machine/sa1110.cpp b/src/devices/machine/sa1110.cpp
index ae75340f2ce..4a767de0d85 100644
--- a/src/devices/machine/sa1110.cpp
+++ b/src/devices/machine/sa1110.cpp
@@ -11,7 +11,7 @@
#define LOG_UNKNOWN (1 << 1)
#define LOG_INTC (1 << 2)
-#define LOG_POWER (1 << 3)
+#define LOG_POWER (1 << 3)
#define LOG_ALL (LOG_UNKNOWN | LOG_INTC | LOG_POWER)
#define VERBOSE (LOG_ALL)
diff --git a/src/devices/machine/sa1110.h b/src/devices/machine/sa1110.h
index 0296ab1c2eb..87ea94ffbf0 100644
--- a/src/devices/machine/sa1110.h
+++ b/src/devices/machine/sa1110.h
@@ -44,23 +44,23 @@ protected:
enum
{
- INTC_BASE_ADDR = 0x90050000,
- REG_ICIP = (0x00000000 >> 2),
- REG_ICMR = (0x00000004 >> 2),
- REG_ICLR = (0x00000008 >> 2),
- REG_ICCR = (0x0000000c >> 2),
- REG_ICFP = (0x00000010 >> 2),
- REG_ICPR = (0x00000020 >> 2),
+ INTC_BASE_ADDR = 0x90050000,
+ REG_ICIP = (0x00000000 >> 2),
+ REG_ICMR = (0x00000004 >> 2),
+ REG_ICLR = (0x00000008 >> 2),
+ REG_ICCR = (0x0000000c >> 2),
+ REG_ICFP = (0x00000010 >> 2),
+ REG_ICPR = (0x00000020 >> 2),
POWER_BASE_ADDR = 0x90020000,
- REG_PMCR = (0x00000000 >> 2),
- REG_PSSR = (0x00000004 >> 2),
- REG_PSPR = (0x00000008 >> 2),
- REG_PWER = (0x0000000c >> 2),
- REG_PCFR = (0x00000010 >> 2),
- REG_PPCR = (0x00000014 >> 2),
- REG_PGSR = (0x00000018 >> 2),
- REG_POSR = (0x0000001c >> 2)
+ REG_PMCR = (0x00000000 >> 2),
+ REG_PSSR = (0x00000004 >> 2),
+ REG_PSPR = (0x00000008 >> 2),
+ REG_PWER = (0x0000000c >> 2),
+ REG_PCFR = (0x00000010 >> 2),
+ REG_PPCR = (0x00000014 >> 2),
+ REG_PGSR = (0x00000018 >> 2),
+ REG_POSR = (0x0000001c >> 2)
};
struct intc_regs
diff --git a/src/devices/machine/tsb12lv01a.cpp b/src/devices/machine/tsb12lv01a.cpp
index fff1eda53e6..b893eafeefe 100644
--- a/src/devices/machine/tsb12lv01a.cpp
+++ b/src/devices/machine/tsb12lv01a.cpp
@@ -12,13 +12,13 @@
#include "emu.h"
#include "tsb12lv01a.h"
-#define LOG_READS (1 << 1)
-#define LOG_WRITES (1 << 2)
-#define LOG_UNKNOWNS (1 << 3)
-#define LOG_IRQS (1 << 4)
-#define LOG_ALL (LOG_READS | LOG_WRITES | LOG_UNKNOWNS | LOG_IRQS)
+#define LOG_READS (1 << 1)
+#define LOG_WRITES (1 << 2)
+#define LOG_UNKNOWNS (1 << 3)
+#define LOG_IRQS (1 << 4)
+#define LOG_ALL (LOG_READS | LOG_WRITES | LOG_UNKNOWNS | LOG_IRQS)
-#define VERBOSE (LOG_ALL)
+#define VERBOSE (LOG_ALL)
#include "logmacro.h"
DEFINE_DEVICE_TYPE(TSB12LV01A, tsb12lv01a_device, "tsb12lv01a", "TSB12LV01A IEEE 1394 Link Controller")
@@ -276,4 +276,4 @@ void tsb12lv01a_device::write(offs_t offset, uint32_t data, uint32_t mem_mask)
LOGMASKED(LOG_WRITES | LOG_UNKNOWNS, "%s: TSB12 Unknown write: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
break;
}
-} \ No newline at end of file
+}
diff --git a/src/devices/machine/tsb12lv01a.h b/src/devices/machine/tsb12lv01a.h
index 6fe3130ef85..4f47fd31815 100644
--- a/src/devices/machine/tsb12lv01a.h
+++ b/src/devices/machine/tsb12lv01a.h
@@ -46,128 +46,128 @@ private:
enum
{
NODE_ADDR_BUSNUM_SHIFT = 22,
- NODE_ADDR_BUSNUM_MASK = 0xffc00000,
- NODE_ADDR_NODENUM_SHIFT = 16,
- NODE_ADDR_NODENUM_MASK = 0x003f0000,
- NODE_ADDR_ROOT = 0x8000,
- NODE_ADDR_ATACK_SHIFT = 4,
- NODE_ADDR_ATACK_MASK = 0x000001f0,
- NODE_ADDR_ACKV = 0x00000001,
-
- CTRL_IDVAL = 0x80000000,
- CTRL_RXSID = 0x40000000,
- CTRL_BSYCTRL = 0x20000000,
- CTRL_RAI = 0x10000000,
- CTRL_RCVCYST = 0x08000000,
- CTRL_TXAEN = 0x04000000,
- CTRL_RXAEN = 0x02000000,
- CTRL_TXIEN = 0x01000000,
- CTRL_RXIEN = 0x00800000,
- CTRL_ACKCEN = 0x00400000,
- CTRL_RSTTX = 0x00200000,
- CTRL_RSTRX = 0x00100000,
- CTRL_CYMAS = 0x00000800,
- CTRL_CYSRC = 0x00000400,
- CTRL_CYTEN = 0x00000200,
- CTRL_TRGEN = 0x00000100,
- CTRL_IRP1EN = 0x00000080,
- CTRL_IRP2EN = 0x00000040,
- CTRL_FHBAD = 0x00000001,
- CTRL_RW_BITS = CTRL_IDVAL | CTRL_RXSID | CTRL_BSYCTRL | CTRL_RAI | CTRL_RCVCYST |
+ NODE_ADDR_BUSNUM_MASK = 0xffc00000,
+ NODE_ADDR_NODENUM_SHIFT = 16,
+ NODE_ADDR_NODENUM_MASK = 0x003f0000,
+ NODE_ADDR_ROOT = 0x8000,
+ NODE_ADDR_ATACK_SHIFT = 4,
+ NODE_ADDR_ATACK_MASK = 0x000001f0,
+ NODE_ADDR_ACKV = 0x00000001,
+
+ CTRL_IDVAL = 0x80000000,
+ CTRL_RXSID = 0x40000000,
+ CTRL_BSYCTRL = 0x20000000,
+ CTRL_RAI = 0x10000000,
+ CTRL_RCVCYST = 0x08000000,
+ CTRL_TXAEN = 0x04000000,
+ CTRL_RXAEN = 0x02000000,
+ CTRL_TXIEN = 0x01000000,
+ CTRL_RXIEN = 0x00800000,
+ CTRL_ACKCEN = 0x00400000,
+ CTRL_RSTTX = 0x00200000,
+ CTRL_RSTRX = 0x00100000,
+ CTRL_CYMAS = 0x00000800,
+ CTRL_CYSRC = 0x00000400,
+ CTRL_CYTEN = 0x00000200,
+ CTRL_TRGEN = 0x00000100,
+ CTRL_IRP1EN = 0x00000080,
+ CTRL_IRP2EN = 0x00000040,
+ CTRL_FHBAD = 0x00000001,
+ CTRL_RW_BITS = CTRL_IDVAL | CTRL_RXSID | CTRL_BSYCTRL | CTRL_RAI | CTRL_RCVCYST |
CTRL_TXAEN | CTRL_RXAEN | CTRL_TXIEN | CTRL_RXIEN | CTRL_ACKCEN |
CTRL_CYMAS | CTRL_CYSRC | CTRL_CYTEN | CTRL_TRGEN | CTRL_IRP1EN |
CTRL_IRP2EN | CTRL_FHBAD,
- INT_INT = 0x80000000,
- INT_PHINT = 0x40000000,
- INT_PHYRRX = 0x20000000,
- INT_PHRST = 0x10000000,
- INT_SIDCOMP = 0x08000000,
- INT_TXRDY = 0x04000000,
- INT_RXDTA = 0x02000000,
- INT_CMDRST = 0x01000000,
- INT_ACKRCV = 0x00800000,
- INT_ITBADF = 0x00100000,
- INT_ATBADF = 0x00080000,
- INT_SNTRJ = 0x00020000,
- INT_HDRDR = 0x00010000,
- INT_TCERR = 0x00008000,
+ INT_INT = 0x80000000,
+ INT_PHINT = 0x40000000,
+ INT_PHYRRX = 0x20000000,
+ INT_PHRST = 0x10000000,
+ INT_SIDCOMP = 0x08000000,
+ INT_TXRDY = 0x04000000,
+ INT_RXDTA = 0x02000000,
+ INT_CMDRST = 0x01000000,
+ INT_ACKRCV = 0x00800000,
+ INT_ITBADF = 0x00100000,
+ INT_ATBADF = 0x00080000,
+ INT_SNTRJ = 0x00020000,
+ INT_HDRDR = 0x00010000,
+ INT_TCERR = 0x00008000,
INT_CYTMOUT = 0x00001000,
- INT_CYSEC = 0x00000800,
- INT_CYST = 0x00000400,
- INT_CYDNE = 0x00000200,
- INT_CYPND = 0x00000100,
- INT_CYLST = 0x00000080,
- INT_CARBFL = 0x00000040,
- INT_ARBGP = 0x00000004,
- INT_FRGP = 0x00000002,
- INT_IARBFL = 0x00000001,
-
- CYTMR_SEC_COUNT_SHIFT = 25,
- CYTMR_SEC_COUNT_MASK = 0xfe000000,
+ INT_CYSEC = 0x00000800,
+ INT_CYST = 0x00000400,
+ INT_CYDNE = 0x00000200,
+ INT_CYPND = 0x00000100,
+ INT_CYLST = 0x00000080,
+ INT_CARBFL = 0x00000040,
+ INT_ARBGP = 0x00000004,
+ INT_FRGP = 0x00000002,
+ INT_IARBFL = 0x00000001,
+
+ CYTMR_SEC_COUNT_SHIFT = 25,
+ CYTMR_SEC_COUNT_MASK = 0xfe000000,
CYTMR_CYC_COUNT_SHIFT = 12,
- CYTMR_CYC_COUNT_MASK = 0x01fff000,
- CYTMR_CYC_OFFSET_SHIFT = 0,
- CYTMR_CYC_OFFSET_MASK = 0x00000fff,
-
- ISOCH_PORT_TAG_SHIFT = 30,
- ISOCH_PORT_TAG_MASK = 0xc0000000,
- ISOCH_PORT_IRPORT1_SHIFT = 24,
- ISOCH_PORT_IRPORT1_MASK = 0x3f000000,
- ISOCH_PORT_TAG2_SHIFT = 22,
- ISOCH_PORT_TAG2_MASK = 0x00c00000,
- ISOCH_PORT_IRPORT2_SHIFT = 16,
- ISOCH_PORT_IRPORT2_MASK = 0x003f0000,
- ISOCH_PORT_MON_TAG = 0x00000001,
-
- FIFO_CTRL_CLRATF = 0x80000000,
- FIFO_CTRL_CLRITF = 0x40000000,
- FIFO_CTRL_CLRGRF = 0x20000000,
- FIFO_CTRL_TRIG_SIZE_SHIFT = 18,
- FIFO_CTRL_TRIG_SIZE_MASK = 0x07fc0000,
- FIFO_CTRL_ATF_SIZE_SHIFT = 9,
- FIFO_CTRL_ATF_SIZE_MASK = 0x0003fe00,
- FIFO_CTRL_ITF_SIZE_SHIFT = 0,
- FIFO_CTRL_ITF_SIZE_MASK = 0x000001ff,
- FIFO_CTRL_RW_BITS = (FIFO_CTRL_TRIG_SIZE_MASK | FIFO_CTRL_ATF_SIZE_MASK | FIFO_CTRL_ITF_SIZE_MASK),
-
- PHY_RDPHY = 0x80000000,
- PHY_WRPHY = 0x40000000,
- PHY_PHYRGAD_SHIFT = 24,
- PHY_PHYRGAD_MASK = 0x0f000000,
+ CYTMR_CYC_COUNT_MASK = 0x01fff000,
+ CYTMR_CYC_OFFSET_SHIFT = 0,
+ CYTMR_CYC_OFFSET_MASK = 0x00000fff,
+
+ ISOCH_PORT_TAG_SHIFT = 30,
+ ISOCH_PORT_TAG_MASK = 0xc0000000,
+ ISOCH_PORT_IRPORT1_SHIFT = 24,
+ ISOCH_PORT_IRPORT1_MASK = 0x3f000000,
+ ISOCH_PORT_TAG2_SHIFT = 22,
+ ISOCH_PORT_TAG2_MASK = 0x00c00000,
+ ISOCH_PORT_IRPORT2_SHIFT = 16,
+ ISOCH_PORT_IRPORT2_MASK = 0x003f0000,
+ ISOCH_PORT_MON_TAG = 0x00000001,
+
+ FIFO_CTRL_CLRATF = 0x80000000,
+ FIFO_CTRL_CLRITF = 0x40000000,
+ FIFO_CTRL_CLRGRF = 0x20000000,
+ FIFO_CTRL_TRIG_SIZE_SHIFT = 18,
+ FIFO_CTRL_TRIG_SIZE_MASK = 0x07fc0000,
+ FIFO_CTRL_ATF_SIZE_SHIFT = 9,
+ FIFO_CTRL_ATF_SIZE_MASK = 0x0003fe00,
+ FIFO_CTRL_ITF_SIZE_SHIFT = 0,
+ FIFO_CTRL_ITF_SIZE_MASK = 0x000001ff,
+ FIFO_CTRL_RW_BITS = (FIFO_CTRL_TRIG_SIZE_MASK | FIFO_CTRL_ATF_SIZE_MASK | FIFO_CTRL_ITF_SIZE_MASK),
+
+ PHY_RDPHY = 0x80000000,
+ PHY_WRPHY = 0x40000000,
+ PHY_PHYRGAD_SHIFT = 24,
+ PHY_PHYRGAD_MASK = 0x0f000000,
PHY_PHYRGDATA_SHIFT = 16,
- PHY_PHYRGDATA_MASK = 0x00ff0000,
- PHY_PHYRXAD_SHIFT = 8,
- PHY_PHYRXAD_MASK = 0x00000f00,
- PHY_PHYRXDATA_SHIFT = 0,
- PHY_PHYRXDATA_MASK = 0x000000ff,
- PHY_RW_BITS = 0x0fff0fff,
-
- ATF_STATUS_FULL = 0x80000000,
- ATF_STATUS_EMPTY = 0x40000000,
- ATF_STATUS_CONERR = 0x20000000,
- ATF_STATUS_ADRCLR = 0x10000000,
- ATF_STATUS_CONTROL = 0x08000000,
- ATF_STATUS_RAMTEST = 0x04000000,
+ PHY_PHYRGDATA_MASK = 0x00ff0000,
+ PHY_PHYRXAD_SHIFT = 8,
+ PHY_PHYRXAD_MASK = 0x00000f00,
+ PHY_PHYRXDATA_SHIFT = 0,
+ PHY_PHYRXDATA_MASK = 0x000000ff,
+ PHY_RW_BITS = 0x0fff0fff,
+
+ ATF_STATUS_FULL = 0x80000000,
+ ATF_STATUS_EMPTY = 0x40000000,
+ ATF_STATUS_CONERR = 0x20000000,
+ ATF_STATUS_ADRCLR = 0x10000000,
+ ATF_STATUS_CONTROL = 0x08000000,
+ ATF_STATUS_RAMTEST = 0x04000000,
ATF_STATUS_ADRCOUNTER_SHIFT = 17,
- ATF_STATUS_ADRCOUNTER_MASK = 0x03fe0000,
- ATF_STATUS_ATFSPACE_SHIFT = 0,
- ATF_STATUS_ATFSPACE_MASK = 0x000001ff,
-
- ITF_STATUS_FULL = 0x80000000,
- ITF_STATUS_EMPTY = 0x40000000,
- ITF_STATUS_ITFSPACE_SHIFT = 0,
- ITF_STATUS_ITFSPACE_MASK = 0x000001ff,
-
- GRF_STATUS_EMPTY = 0x80000000,
- GRF_STATUS_CD = 0x40000000,
- GRF_STATUS_PACCOM = 0x20000000,
- GRF_STATUS_GRFTOTAL_SHIFT = 19,
- GRF_STATUS_GRFTOTAL_MASK = 0x1ff80000,
- GRF_STATUS_GRFSIZE_SHIFT = 9,
- GRF_STATUS_GRFSIZE_MASK = 0x0007fe00,
- GRF_STATUS_WRITECOUNT_SHIFT = 0,
- GRF_STATUS_WRITECOUNT_MASK = 0x000001ff
+ ATF_STATUS_ADRCOUNTER_MASK = 0x03fe0000,
+ ATF_STATUS_ATFSPACE_SHIFT = 0,
+ ATF_STATUS_ATFSPACE_MASK = 0x000001ff,
+
+ ITF_STATUS_FULL = 0x80000000,
+ ITF_STATUS_EMPTY = 0x40000000,
+ ITF_STATUS_ITFSPACE_SHIFT = 0,
+ ITF_STATUS_ITFSPACE_MASK = 0x000001ff,
+
+ GRF_STATUS_EMPTY = 0x80000000,
+ GRF_STATUS_CD = 0x40000000,
+ GRF_STATUS_PACCOM = 0x20000000,
+ GRF_STATUS_GRFTOTAL_SHIFT = 19,
+ GRF_STATUS_GRFTOTAL_MASK = 0x1ff80000,
+ GRF_STATUS_GRFSIZE_SHIFT = 9,
+ GRF_STATUS_GRFSIZE_MASK = 0x0007fe00,
+ GRF_STATUS_WRITECOUNT_SHIFT = 0,
+ GRF_STATUS_WRITECOUNT_MASK = 0x000001ff
};
uint32_t m_version;
diff --git a/src/devices/machine/v3021.cpp b/src/devices/machine/v3021.cpp
index 0d91a9d14dc..50c0283f310 100644
--- a/src/devices/machine/v3021.cpp
+++ b/src/devices/machine/v3021.cpp
@@ -8,89 +8,89 @@
Serial Real Time Clock
- - Reference: https://www.emmicroelectronic.com/product/real-time-clocks-ic/v3021
-
- Pin assignment (SO8)
-
- |-------------------------|
- _|o |_
- XI |_| |_| Vdd
- | |
- _| |_
- XO |_| |_| WR
- | V3021 |
- _| |_
- CS |_| |_| RD
- | |
- _| |_
- Vss |_| |_| I/O
- |-------------------------|
-
- Pin description
-
- |-----|------|-----------------------------------------|
- | Pin | Name | Description |
- |-----|------|-----------------------------------------|
- 1 1 | XI | 32 kHz Crystal input |
- |-----|------|-----------------------------------------|
- 1 2 | XO | 32 kHz Crystal output |
- |-----|------|-----------------------------------------|
- 1 3 | CS | Chip select input |
- |-----|------|-----------------------------------------|
- 1 4 | Vss | Ground supply |
- |-----|------|-----------------------------------------|
- 1 5 | I/O | Data input and output |
- |-----|------|-----------------------------------------|
- 1 6 | RD | Intel RD, Motorola DS (or tie to CS) |
- |-----|------|-----------------------------------------|
- 1 7 | WR | Intel WR, Motorola R/W |
- |-----|------|-----------------------------------------|
- 1 8 | Vdd | Positive supply |
- |-----|------|-----------------------------------------|
-
- Register map (Unused bits are reserved)
-
- Address Bits Description
- 76543210
- Data space
- 0 ---x---- Time set lock
- ---0---- Enable copy RAM to clock
- ---1---- Disable copy RAM to clock
- ----xx-- Test mode
- ----00-- Normal operation
- ----01-- All time keeping accelerated by 32
- ----10-- Parallel increment of all time data
+ - Reference: https://www.emmicroelectronic.com/product/real-time-clocks-ic/v3021
+
+ Pin assignment (SO8)
+
+ |-------------------------|
+ _|o |_
+ XI |_| |_| Vdd
+ | |
+ _| |_
+ XO |_| |_| WR
+ | V3021 |
+ _| |_
+ CS |_| |_| RD
+ | |
+ _| |_
+ Vss |_| |_| I/O
+ |-------------------------|
+
+ Pin description
+
+ |-----|------|-----------------------------------------|
+ | Pin | Name | Description |
+ |-----|------|-----------------------------------------|
+ 1 1 | XI | 32 kHz Crystal input |
+ |-----|------|-----------------------------------------|
+ 1 2 | XO | 32 kHz Crystal output |
+ |-----|------|-----------------------------------------|
+ 1 3 | CS | Chip select input |
+ |-----|------|-----------------------------------------|
+ 1 4 | Vss | Ground supply |
+ |-----|------|-----------------------------------------|
+ 1 5 | I/O | Data input and output |
+ |-----|------|-----------------------------------------|
+ 1 6 | RD | Intel RD, Motorola DS (or tie to CS) |
+ |-----|------|-----------------------------------------|
+ 1 7 | WR | Intel WR, Motorola R/W |
+ |-----|------|-----------------------------------------|
+ 1 8 | Vdd | Positive supply |
+ |-----|------|-----------------------------------------|
+
+ Register map (Unused bits are reserved)
+
+ Address Bits Description
+ 76543210
+ Data space
+ 0 ---x---- Time set lock
+ ---0---- Enable copy RAM to clock
+ ---1---- Disable copy RAM to clock
+ ----xx-- Test mode
+ ----00-- Normal operation
+ ----01-- All time keeping accelerated by 32
+ ----10-- Parallel increment of all time data
at 1 Hz with no carry over
- ----11-- Parallel increment of all time data
+ ----11-- Parallel increment of all time data
at 32 Hz with no carry over
- -------x Frequency measurement mode
-
- 1 (Read only)
- x------- Week number is changed
- -x------ Weekday is changed
- --x----- Year is changed
- ---x---- Month is changed
- ----x--- Day of month is changed
- -----x-- Hours is changed
- ------x- Minutes is changed
- -------x Seconds is changed
-
- 2 -xxxxxxx Seconds (BCD 00-59)
- 3 -xxxxxxx Minutes (BCD 00-59)
- 4 --xxxxxx Hours (BCD 00-23)
- 5 --xxxxxx Day of month (BCD 1-31)
- 6 ---xxxxx Month (BCD 01-12)
- 7 xxxxxxxx Year (BCD 00-99)
- 8 ----xxxx Week day (BCD 01-07)
- 9 -xxxxxxx Week number (BCD 00-52)
-
- Address command space
- e Copy RAM to clock
- f Copy clock to RAM
-
- TODO:
- - verify status bit (RAM 0x00)
- - Support Week number correctly
+ -------x Frequency measurement mode
+
+ 1 (Read only)
+ x------- Week number is changed
+ -x------ Weekday is changed
+ --x----- Year is changed
+ ---x---- Month is changed
+ ----x--- Day of month is changed
+ -----x-- Hours is changed
+ ------x- Minutes is changed
+ -------x Seconds is changed
+
+ 2 -xxxxxxx Seconds (BCD 00-59)
+ 3 -xxxxxxx Minutes (BCD 00-59)
+ 4 --xxxxxx Hours (BCD 00-23)
+ 5 --xxxxxx Day of month (BCD 1-31)
+ 6 ---xxxxx Month (BCD 01-12)
+ 7 xxxxxxxx Year (BCD 00-99)
+ 8 ----xxxx Week day (BCD 01-07)
+ 9 -xxxxxxx Week number (BCD 00-52)
+
+ Address command space
+ e Copy RAM to clock
+ f Copy clock to RAM
+
+ TODO:
+ - verify status bit (RAM 0x00)
+ - Support Week number correctly
***************************************************************************/
diff --git a/src/devices/sound/ics2115.cpp b/src/devices/sound/ics2115.cpp
index 4d42a79626e..c61ddd819b2 100644
--- a/src/devices/sound/ics2115.cpp
+++ b/src/devices/sound/ics2115.cpp
@@ -15,10 +15,10 @@
- Verify interrupt, envelope, timer period
- Verify unemulated registers
- Changelog:
+ Changelog:
- 25th july 2020 [cam900]:
- - Improve envelope behavior, Improve debugging registers, Fix ramping
+ 25th july 2020 [cam900]:
+ - Improve envelope behavior, Improve debugging registers, Fix ramping
*/
#include "emu.h"
diff --git a/src/devices/sound/rp2c33_snd.cpp b/src/devices/sound/rp2c33_snd.cpp
index d8d8bd2af82..15446374ac1 100644
--- a/src/devices/sound/rp2c33_snd.cpp
+++ b/src/devices/sound/rp2c33_snd.cpp
@@ -2,17 +2,17 @@
// copyright-holders:cam900, Brad Smith, Brezza
/***************************************************************************
- Ricoh RP2C33 Sound emulation
+ Ricoh RP2C33 Sound emulation
- Based on:
- - NSFplay github code by Brad Smith/Brezza
- - Information from NESDev wiki
- (https://wiki.nesdev.com/w/index.php/FDS_audio)
+ Based on:
+ - NSFplay github code by Brad Smith/Brezza
+ - Information from NESDev wiki
+ (https://wiki.nesdev.com/w/index.php/FDS_audio)
- TODO:
- - verify register behaviors
- - verify unknown read, writes
- - Lowpass filter?
+ TODO:
+ - verify register behaviors
+ - verify unknown read, writes
+ - Lowpass filter?
***************************************************************************/
diff --git a/src/devices/sound/rp2c33_snd.h b/src/devices/sound/rp2c33_snd.h
index 9c23c770a4b..cf3c5c23b55 100644
--- a/src/devices/sound/rp2c33_snd.h
+++ b/src/devices/sound/rp2c33_snd.h
@@ -2,7 +2,7 @@
// copyright-holders:cam900, Brad Smith, Brezza
/***************************************************************************
- Ricoh RP2C33 Sound emulation
+ Ricoh RP2C33 Sound emulation
***************************************************************************/
diff --git a/src/emu/debug/debugcmd.cpp b/src/emu/debug/debugcmd.cpp
index eaa273ee886..20263e435c7 100644
--- a/src/emu/debug/debugcmd.cpp
+++ b/src/emu/debug/debugcmd.cpp
@@ -534,7 +534,7 @@ bool debugger_commands::validate_cpu_space_parameter(const char *param, int spac
/*-------------------------------------------------
validate_memory_region_parameter - validates
a parameter as a memory region name and
- retrieves the given memory region
+ retrieves the given memory region
-------------------------------------------------*/
bool debugger_commands::validate_memory_region_parameter(const std::string &param, memory_region *&result)
diff --git a/src/lib/formats/fl1_dsk.h b/src/lib/formats/fl1_dsk.h
index 82ea70329af..a8407e274af 100644
--- a/src/lib/formats/fl1_dsk.h
+++ b/src/lib/formats/fl1_dsk.h
@@ -4,7 +4,7 @@
formats/fl1_dsk.h
- FloppyOne DOS disk images
+ FloppyOne DOS disk images
*********************************************************************/
#ifndef MAME_FORMATS_FL1_DSK_H
diff --git a/src/lib/formats/mdos_dsk.cpp b/src/lib/formats/mdos_dsk.cpp
index fc80d6b5bd9..a86558428ad 100644
--- a/src/lib/formats/mdos_dsk.cpp
+++ b/src/lib/formats/mdos_dsk.cpp
@@ -133,7 +133,7 @@ int mdos_format::find_size(io_generic *io, uint32_t form_factor)
if (!check_ascii(info.date, sizeof(info.date), "date"))
return -1;
-
+
if (!check_ascii(info.username, sizeof(info.username), "username"))
return -1;
diff --git a/src/lib/formats/swd_dsk.cpp b/src/lib/formats/swd_dsk.cpp
index 637c2bf816d..47b5fc9266e 100644
--- a/src/lib/formats/swd_dsk.cpp
+++ b/src/lib/formats/swd_dsk.cpp
@@ -4,7 +4,7 @@
formats/swd_dsk.c
- Swift Disc disk images
+ Swift Disc disk images
*********************************************************************/
diff --git a/src/lib/netlist/devices/nld_ne555.cpp b/src/lib/netlist/devices/nld_ne555.cpp
index 28027b9efb0..8df9a76cb1f 100644
--- a/src/lib/netlist/devices/nld_ne555.cpp
+++ b/src/lib/netlist/devices/nld_ne555.cpp
@@ -160,7 +160,7 @@ namespace netlist
#endif
m_overshoot = plib::clamp(m_overshoot(), nlconst::zero(), ovlimit);
//if (this->name() == "IC6_2")
- // printf("%f %s %f %f %f\n", exec().time().as_double(), this->name().c_str(), m_overshoot(), m_R2.P()(), m_THRES());
+ // printf("%f %s %f %f %f\n", exec().time().as_double(), this->name().c_str(), m_overshoot(), m_R2.P()(), m_THRES());
m_RDIS.change_state([this]()
{
m_RDIS.set_R(nlconst::magic(R_ON));
diff --git a/src/lib/netlist/plib/pfunction.cpp b/src/lib/netlist/plib/pfunction.cpp
index c8049315276..1fc2615ed42 100644
--- a/src/lib/netlist/plib/pfunction.cpp
+++ b/src/lib/netlist/plib/pfunction.cpp
@@ -312,7 +312,7 @@ namespace plib {
opstk.pop();
}
//for (auto &e : postfix)
- // printf("\t%s\n", e.c_str());
+ // printf("\t%s\n", e.c_str());
compile_postfix(inputs, postfix, expr);
}
diff --git a/src/lib/netlist/plib/pfunction.h b/src/lib/netlist/plib/pfunction.h
index be6d6e64f9e..0178e81c04e 100644
--- a/src/lib/netlist/plib/pfunction.h
+++ b/src/lib/netlist/plib/pfunction.h
@@ -32,7 +32,7 @@ namespace plib {
LE,
GE,
IF,
- NEG, // unary minus
+ NEG, // unary minus
POW,
LOG,
SIN,
diff --git a/src/lib/netlist/plib/pmath.h b/src/lib/netlist/plib/pmath.h
index a86e3d354f1..02d634529a0 100644
--- a/src/lib/netlist/plib/pmath.h
+++ b/src/lib/netlist/plib/pmath.h
@@ -442,8 +442,8 @@ namespace plib
template<class T>
constexpr const T& clamp( const T& v, const T& low, const T& high)
{
- gsl_Expects(high >= low);
- return (v < low) ? low : (high < v) ? high : v;
+ gsl_Expects(high >= low);
+ return (v < low) ? low : (high < v) ? high : v;
}
static_assert(noexcept(constants<double>::one()), "Not evaluated as constexpr");
diff --git a/src/mame/audio/cinemat.h b/src/mame/audio/cinemat.h
index de12240e1dc..b3f4f397485 100644
--- a/src/mame/audio/cinemat.h
+++ b/src/mame/audio/cinemat.h
@@ -10,7 +10,7 @@
#include "netlist/nl_setup.h"
// log to cinemat.csv for nltool playback/analysis
-#define ENABLE_NETLIST_LOGGING (0)
+#define ENABLE_NETLIST_LOGGING (0)
class cinemat_audio_device : public device_t
diff --git a/src/mame/audio/cmi01a.cpp b/src/mame/audio/cmi01a.cpp
index 5b2be6f191c..8a45582d2fd 100644
--- a/src/mame/audio/cmi01a.cpp
+++ b/src/mame/audio/cmi01a.cpp
@@ -477,11 +477,11 @@ void cmi01a_device::set_eclk(bool eclk)
tick_ediv();
}
- // A B !(A && B) !A || !B
- // 0 0 1 1
- // 0 1 1 1
- // 1 0 1 1
- // 1 1 0 0
+ // A B !(A && B) !A || !B
+ // 0 0 1 1
+ // 0 1 1 1
+ // 1 0 1 1
+ // 1 1 0 0
const bool a = !m_load || !eclk;
const bool b = m_load || !m_ediv_out;
diff --git a/src/mame/audio/cmi01a.h b/src/mame/audio/cmi01a.h
index 52626887ce9..61e294111db 100644
--- a/src/mame/audio/cmi01a.h
+++ b/src/mame/audio/cmi01a.h
@@ -16,8 +16,8 @@
#define ENV_DIR_UP 0
#define ENV_DIR_DOWN 1
-#define CHANNEL_STATUS_LOAD 1
-#define CHANNEL_STATUS_RUN 2
+#define CHANNEL_STATUS_LOAD 1
+#define CHANNEL_STATUS_RUN 2
class cmi01a_device : public device_t, public device_sound_interface {
public:
@@ -92,11 +92,11 @@ private:
uint8_t m_new_addr; // Flag
uint8_t m_vol_latch;
uint8_t m_flt_latch;
- uint8_t m_rp;
- uint8_t m_ws;
+ uint8_t m_rp;
+ uint8_t m_ws;
int m_dir;
int m_env_dir;
- uint8_t m_env;
+ uint8_t m_env;
int m_pia0_cb2_state;
uint8_t m_bcas_q1_ticks;
@@ -117,11 +117,11 @@ private:
bool m_tri;
bool m_pia1_ca2;
- bool m_eclk;
+ bool m_eclk;
bool m_env_clk;
- bool m_ediv_out;
+ bool m_ediv_out;
uint8_t m_ediv_rate;
- uint8_t m_ediv_count;
+ uint8_t m_ediv_count;
uint16_t m_pitch;
uint8_t m_octave;
diff --git a/src/mame/audio/nl_armora.cpp b/src/mame/audio/nl_armora.cpp
index c3b4924db31..5be8807fbd1 100644
--- a/src/mame/audio/nl_armora.cpp
+++ b/src/mame/audio/nl_armora.cpp
@@ -36,647 +36,647 @@
NETLIST_START(armora)
#if (HLE_TANK_VCO)
- SOLVER(Solver, 1000)
+ SOLVER(Solver, 1000)
#else
- SOLVER(Solver, 4800000)
+ SOLVER(Solver, 4800000)
#endif
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
- TTL_INPUT(I_OUT_0, 0) // active high
- TTL_INPUT(I_OUT_1, 0) // active high
- TTL_INPUT(I_OUT_2, 0) // active high
- TTL_INPUT(I_OUT_3, 0) // active high
- TTL_INPUT(I_OUT_4, 0) // active high
- TTL_INPUT(I_OUT_7, 0) // active high
-
- NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND, I_OUT_7.GND)
- NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC, I_OUT_7.VCC)
-
- CINEMAT_LOCAL_MODELS
-
- ANALOG_INPUT(I_V5, 5)
- ANALOG_INPUT(I_V15, 15)
- ANALOG_INPUT(I_VM15, -15)
-
- RES(R1, RES_K(1))
- RES(R2, RES_K(1.3))
- RES(R3, RES_K(1.3))
- RES(R4, RES_K(2))
- RES(R5, RES_K(2))
- RES(R6, RES_K(12))
- RES(R7, RES_K(24))
- RES(R8, RES_K(1))
- RES(R9, RES_K(2))
- RES(R10, RES_K(1))
- RES(R11, RES_K(3.6))
- RES(R12, RES_K(10))
- RES(R13, RES_K(1))
- RES(R14, RES_K(240))
- RES(R15, RES_K(22))
- RES(R16, RES_K(22))
- RES(R17, RES_K(22))
- RES(R18, RES_K(20))
- RES(R19, RES_K(430))
- RES(R20, RES_M(1.5))
- RES(R21, RES_K(390))
- RES(R22, RES_M(1.5))
- RES(R23, RES_K(51))
-// RES(R24, RES_K(390)) -- part of final amp (not emulated)
-// RES(R25, RES_K(390)) -- part of final amp (not emulated)
- RES(R26, RES_M(1))
- RES(R27, RES_K(4.7))
- RES(R28, RES_K(2.7))
- RES(R29, RES_K(4.7))
- RES(R30, RES_K(39))
- RES(R31, RES_K(12))
- RES(R32, RES_K(1))
- RES(R33, RES_K(240))
- RES(R34, RES_K(18))
- RES(R35, RES_K(16))
- RES(R36, RES_K(7.5))
- RES(R37, 620)
- RES(R38, 620)
- RES(R39, RES_K(4.7))
- RES(R40, RES_K(2.7))
- RES(R41, RES_K(4.7))
- RES(R42, RES_K(39))
- RES(R43, RES_K(12))
- RES(R44, RES_K(1))
- RES(R45, RES_K(150))
- RES(R46, RES_K(20))
- RES(R47, RES_K(22))
- RES(R48, RES_K(30))
- RES(R49, 680)
- RES(R50, 680)
- RES(R51, RES_K(4.7))
- RES(R52, RES_K(2.7))
- RES(R53, RES_K(4.7))
- RES(R54, RES_K(39))
- RES(R55, RES_K(12))
- RES(R56, RES_K(1))
- RES(R57, RES_K(220))
- RES(R58, RES_K(10))
- RES(R59, RES_K(47))
- RES(R60, 750)
- RES(R61, 750)
- RES(R62, RES_K(4.7))
- RES(R63, RES_K(2.7))
- RES(R64, RES_K(4.7))
- RES(R65, RES_K(39))
- RES(R66, RES_K(12))
- RES(R67, RES_K(1))
- RES(R68, RES_K(910))
- RES(R69, RES_K(8.2))
- RES(R70, RES_K(43))
- RES(R71, RES_K(22))
- RES(R72, 750)
- RES(R73, 750)
- RES(R74, RES_K(4.7))
- RES(R75, RES_K(2.7))
- RES(R76, RES_K(4.7))
- RES(R77, RES_K(39))
- RES(R78, RES_K(12))
- RES(R79, RES_K(1))
- RES(R80, RES_K(750))
- RES(R81, RES_K(20))
- RES(R82, RES_K(8.2))
- RES(R83, RES_K(330))
-// RES(R84, RES_K(15)) -- part of final amp (not emulated)
-// RES(R85, 150) -- part of final amp (not emulated)
-// RES(R86, RES_K(22)) -- part of final amp (not emulated)
-// RES(R87, 150) -- part of final amp (not emulated)
-// RES(R88, 0.51) -- part of final amp (not emulated)
-// RES(R89, 0.51) -- part of final amp (not emulated)
- RES(R90, RES_K(100))
- RES(R91, RES_K(8.2))
- RES(R92, RES_K(20))
+ TTL_INPUT(I_OUT_0, 0) // active high
+ TTL_INPUT(I_OUT_1, 0) // active high
+ TTL_INPUT(I_OUT_2, 0) // active high
+ TTL_INPUT(I_OUT_3, 0) // active high
+ TTL_INPUT(I_OUT_4, 0) // active high
+ TTL_INPUT(I_OUT_7, 0) // active high
+
+ NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND, I_OUT_7.GND)
+ NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC, I_OUT_7.VCC)
+
+ CINEMAT_LOCAL_MODELS
+
+ ANALOG_INPUT(I_V5, 5)
+ ANALOG_INPUT(I_V15, 15)
+ ANALOG_INPUT(I_VM15, -15)
+
+ RES(R1, RES_K(1))
+ RES(R2, RES_K(1.3))
+ RES(R3, RES_K(1.3))
+ RES(R4, RES_K(2))
+ RES(R5, RES_K(2))
+ RES(R6, RES_K(12))
+ RES(R7, RES_K(24))
+ RES(R8, RES_K(1))
+ RES(R9, RES_K(2))
+ RES(R10, RES_K(1))
+ RES(R11, RES_K(3.6))
+ RES(R12, RES_K(10))
+ RES(R13, RES_K(1))
+ RES(R14, RES_K(240))
+ RES(R15, RES_K(22))
+ RES(R16, RES_K(22))
+ RES(R17, RES_K(22))
+ RES(R18, RES_K(20))
+ RES(R19, RES_K(430))
+ RES(R20, RES_M(1.5))
+ RES(R21, RES_K(390))
+ RES(R22, RES_M(1.5))
+ RES(R23, RES_K(51))
+// RES(R24, RES_K(390)) -- part of final amp (not emulated)
+// RES(R25, RES_K(390)) -- part of final amp (not emulated)
+ RES(R26, RES_M(1))
+ RES(R27, RES_K(4.7))
+ RES(R28, RES_K(2.7))
+ RES(R29, RES_K(4.7))
+ RES(R30, RES_K(39))
+ RES(R31, RES_K(12))
+ RES(R32, RES_K(1))
+ RES(R33, RES_K(240))
+ RES(R34, RES_K(18))
+ RES(R35, RES_K(16))
+ RES(R36, RES_K(7.5))
+ RES(R37, 620)
+ RES(R38, 620)
+ RES(R39, RES_K(4.7))
+ RES(R40, RES_K(2.7))
+ RES(R41, RES_K(4.7))
+ RES(R42, RES_K(39))
+ RES(R43, RES_K(12))
+ RES(R44, RES_K(1))
+ RES(R45, RES_K(150))
+ RES(R46, RES_K(20))
+ RES(R47, RES_K(22))
+ RES(R48, RES_K(30))
+ RES(R49, 680)
+ RES(R50, 680)
+ RES(R51, RES_K(4.7))
+ RES(R52, RES_K(2.7))
+ RES(R53, RES_K(4.7))
+ RES(R54, RES_K(39))
+ RES(R55, RES_K(12))
+ RES(R56, RES_K(1))
+ RES(R57, RES_K(220))
+ RES(R58, RES_K(10))
+ RES(R59, RES_K(47))
+ RES(R60, 750)
+ RES(R61, 750)
+ RES(R62, RES_K(4.7))
+ RES(R63, RES_K(2.7))
+ RES(R64, RES_K(4.7))
+ RES(R65, RES_K(39))
+ RES(R66, RES_K(12))
+ RES(R67, RES_K(1))
+ RES(R68, RES_K(910))
+ RES(R69, RES_K(8.2))
+ RES(R70, RES_K(43))
+ RES(R71, RES_K(22))
+ RES(R72, 750)
+ RES(R73, 750)
+ RES(R74, RES_K(4.7))
+ RES(R75, RES_K(2.7))
+ RES(R76, RES_K(4.7))
+ RES(R77, RES_K(39))
+ RES(R78, RES_K(12))
+ RES(R79, RES_K(1))
+ RES(R80, RES_K(750))
+ RES(R81, RES_K(20))
+ RES(R82, RES_K(8.2))
+ RES(R83, RES_K(330))
+// RES(R84, RES_K(15)) -- part of final amp (not emulated)
+// RES(R85, 150) -- part of final amp (not emulated)
+// RES(R86, RES_K(22)) -- part of final amp (not emulated)
+// RES(R87, 150) -- part of final amp (not emulated)
+// RES(R88, 0.51) -- part of final amp (not emulated)
+// RES(R89, 0.51) -- part of final amp (not emulated)
+ RES(R90, RES_K(100))
+ RES(R91, RES_K(8.2))
+ RES(R92, RES_K(20))
// POT(R93, RES_K(10)) -- part of final amp (not emulated)
- RES(R94, RES_K(30))
- RES(R95, RES_K(4.7))
- RES(R96, RES_K(2.7))
- RES(R97, RES_K(39))
- RES(R98, RES_K(12))
- RES(R99, RES_K(2.4))
- RES(R100, RES_K(4.7))
- RES(R101, RES_K(2.7))
- RES(R102, RES_K(39))
- RES(R103, RES_K(12))
- RES(R104, RES_K(2.4))
- RES(R105, RES_K(4.7))
- RES(R106, RES_K(2.7))
- RES(R107, RES_K(39))
- RES(R108, RES_K(12))
- RES(R109, RES_K(2.4))
- RES(R110, RES_K(1))
-
-// CAP(C1, CAP_U(0.1)) -- part of voltage converter (not emulated)
-// CAP(C2, CAP_U(22)) -- part of voltage converter (not emulated)
-// CAP(C3, CAP_U(0.1)) -- part of voltage converter (not emulated)
-// CAP(C4, CAP_U(22)) -- part of voltage converter (not emulated)
-// CAP(C5, CAP_U(22)) -- part of voltage converter (not emulated)
-// CAP(C6, CAP_U(0.1)) -- part of voltage converter (not emulated)
-// CAP(C7, CAP_U(22)) -- part of voltage converter (not emulated)
-// CAP(C8, CAP_U(0.1)) -- part of voltage converter (not emulated)
-// CAP(C9, CAP_U(22)) -- part of voltage converter (not emulated)
-// CAP(C10, CAP_U(0.1)) -- part of voltage converter (not emulated)
- CAP(C11, CAP_U(0.047))
- CAP(C12, CAP_U(0.01))
- CAP(C13, CAP_U(0.047))
- CAP(C14, CAP_U(0.47))
- CAP(C15, CAP_U(0.001))
- CAP(C16, CAP_U(0.1))
- CAP(C17, CAP_U(0.0047))
- CAP(C18, CAP_U(2.2))
- CAP(C19, CAP_U(0.1))
- CAP(C20, CAP_U(100))
- CAP(C21, CAP_U(0.1))
- CAP(C22, CAP_U(2.2))
- CAP(C23, CAP_U(0.22))
- CAP(C24, CAP_U(0.22))
- CAP(C25, CAP_U(3.3))
- CAP(C26, CAP_U(0.1))
- CAP(C27, CAP_U(0.047))
+ RES(R94, RES_K(30))
+ RES(R95, RES_K(4.7))
+ RES(R96, RES_K(2.7))
+ RES(R97, RES_K(39))
+ RES(R98, RES_K(12))
+ RES(R99, RES_K(2.4))
+ RES(R100, RES_K(4.7))
+ RES(R101, RES_K(2.7))
+ RES(R102, RES_K(39))
+ RES(R103, RES_K(12))
+ RES(R104, RES_K(2.4))
+ RES(R105, RES_K(4.7))
+ RES(R106, RES_K(2.7))
+ RES(R107, RES_K(39))
+ RES(R108, RES_K(12))
+ RES(R109, RES_K(2.4))
+ RES(R110, RES_K(1))
+
+// CAP(C1, CAP_U(0.1)) -- part of voltage converter (not emulated)
+// CAP(C2, CAP_U(22)) -- part of voltage converter (not emulated)
+// CAP(C3, CAP_U(0.1)) -- part of voltage converter (not emulated)
+// CAP(C4, CAP_U(22)) -- part of voltage converter (not emulated)
+// CAP(C5, CAP_U(22)) -- part of voltage converter (not emulated)
+// CAP(C6, CAP_U(0.1)) -- part of voltage converter (not emulated)
+// CAP(C7, CAP_U(22)) -- part of voltage converter (not emulated)
+// CAP(C8, CAP_U(0.1)) -- part of voltage converter (not emulated)
+// CAP(C9, CAP_U(22)) -- part of voltage converter (not emulated)
+// CAP(C10, CAP_U(0.1)) -- part of voltage converter (not emulated)
+ CAP(C11, CAP_U(0.047))
+ CAP(C12, CAP_U(0.01))
+ CAP(C13, CAP_U(0.047))
+ CAP(C14, CAP_U(0.47))
+ CAP(C15, CAP_U(0.001))
+ CAP(C16, CAP_U(0.1))
+ CAP(C17, CAP_U(0.0047))
+ CAP(C18, CAP_U(2.2))
+ CAP(C19, CAP_U(0.1))
+ CAP(C20, CAP_U(100))
+ CAP(C21, CAP_U(0.1))
+ CAP(C22, CAP_U(2.2))
+ CAP(C23, CAP_U(0.22))
+ CAP(C24, CAP_U(0.22))
+ CAP(C25, CAP_U(3.3))
+ CAP(C26, CAP_U(0.1))
+ CAP(C27, CAP_U(0.047))
// CAP(C28, CAP_U()) -- don't see it anywhere
- CAP(C29, CAP_U(0.047))
- CAP(C30, CAP_U(0.047))
- CAP(C31, CAP_U(0.22))
- CAP(C32, CAP_U(0.22))
- CAP(C33, CAP_U(0.0047))
- CAP(C34, CAP_U(1))
- CAP(C35, CAP_U(0.1))
- CAP(C36, CAP_U(0.1))
- CAP(C37, CAP_U(0.01))
-// CAP(C38, CAP_U(0.68)) -- part of final amp (not emulated)
-// CAP(C39, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C40, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C41, CAP_U(0.005)) -- part of final amp (not emulated)
-// CAP(C42, CAP_P(470)) -- part of final amp (not emulated)
+ CAP(C29, CAP_U(0.047))
+ CAP(C30, CAP_U(0.047))
+ CAP(C31, CAP_U(0.22))
+ CAP(C32, CAP_U(0.22))
+ CAP(C33, CAP_U(0.0047))
+ CAP(C34, CAP_U(1))
+ CAP(C35, CAP_U(0.1))
+ CAP(C36, CAP_U(0.1))
+ CAP(C37, CAP_U(0.01))
+// CAP(C38, CAP_U(0.68)) -- part of final amp (not emulated)
+// CAP(C39, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C40, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C41, CAP_U(0.005)) -- part of final amp (not emulated)
+// CAP(C42, CAP_P(470)) -- part of final amp (not emulated)
CAP(C43, CAP_U(0.33))
-// D_1N4003(D1) -- part of voltage converter (not emulated)
-// D_1N4003(D2) -- part of voltage converter (not emulated)
-// D_1N4003(D3) -- part of voltage converter (not emulated)
-// D_1N4003(D4) -- part of voltage converter (not emulated)
- D_1N914(D5)
-// D_1N4003(D6) -- part of final amp (not emulated)
-// D_1N4003(D7) -- part of final amp (not emulated)
- D_1N914(D8)
-
-
- Q_2N3904(Q1) // NPN
- Q_2N3906(Q2) // PNP
- Q_2N3906(Q3) // PNP
- Q_2N3906(Q4) // PNP
- Q_2N3906(Q5) // PNP
- Q_2N3906(Q6) // PNP
- Q_2N3906(Q7) // PNP
- Q_2N3906(Q8) // PNP
- Q_2N3906(Q9) // PNP
- Q_2N3906(Q10) // PNP
- Q_2N3906(Q11) // PNP
-// Q_2N6292(Q12) // NPN -- part of final amp (not emulated)
-// Q_2N6107(Q13) // PNP -- part of final amp (not emulated)
- Q_2N3906(Q14) // PNP
- Q_2N3904(Q15) // NPN
- Q_2N3906(Q16) // PNP
- Q_2N3904(Q17) // NPN
- Q_2N3906(Q18) // PNP
- Q_2N3904(Q19) // NPN
-
- TTL_7414_DIP(IC1) // Hex Inverter
- NET_C(IC1.7, GND)
- NET_C(IC1.14, I_V5)
-
- TTL_74LS164_DIP(IC2) // 8-bit Shift Reg.
- NET_C(IC2.7, GND)
- NET_C(IC2.14, I_V5)
-
- TTL_74LS377_DIP(IC3) // Octal D Flip Flop
- NET_C(IC3.10, GND)
- NET_C(IC3.20, I_V5)
-
-// TTL_7815_DIP(IC4) // +15V Regulator -- part of voltage converter (not emulated)
-// TTL_7915_DIP(IC5) // -15V Regulator -- part of voltage converter (not emulated)
-
- LM555_DIP(IC6)
-
- TTL_7406_DIP(IC7) // Hex inverter -- currently using a clone of 7416, no open collector behavior
- NET_C(IC7.7, GND)
- NET_C(IC7.14, I_V5)
-
- TTL_74LS163_DIP(IC8) // Binary Counter (schems say can sub a 74161)
- NET_C(IC8.8, GND)
- NET_C(IC8.16, I_V5)
-
- TTL_74LS00_DIP(IC9) // Quad 4-Input NAND Gate
- NET_C(IC9.7, GND)
- NET_C(IC9.14, I_V5)
-
- TTL_74LS393_DIP(IC10) // Dual 4-Stage Binary Counter
- NET_C(IC10.7, GND)
- NET_C(IC10.14, I_V5)
-
- TTL_74LS163_DIP(IC11) // Binary Counter (schems say can sub a 74161)
- NET_C(IC11.8, GND)
- NET_C(IC11.16, I_V5)
-
- // IC12 was deleted from schematics
-
- TTL_74LS393_DIP(IC13) // Dual 4-Stage Binary Counter
- NET_C(IC13.7, GND)
- NET_C(IC13.14, I_V5)
-
- // IC14 was deleted from schematics
+// D_1N4003(D1) -- part of voltage converter (not emulated)
+// D_1N4003(D2) -- part of voltage converter (not emulated)
+// D_1N4003(D3) -- part of voltage converter (not emulated)
+// D_1N4003(D4) -- part of voltage converter (not emulated)
+ D_1N914(D5)
+// D_1N4003(D6) -- part of final amp (not emulated)
+// D_1N4003(D7) -- part of final amp (not emulated)
+ D_1N914(D8)
+
+
+ Q_2N3904(Q1) // NPN
+ Q_2N3906(Q2) // PNP
+ Q_2N3906(Q3) // PNP
+ Q_2N3906(Q4) // PNP
+ Q_2N3906(Q5) // PNP
+ Q_2N3906(Q6) // PNP
+ Q_2N3906(Q7) // PNP
+ Q_2N3906(Q8) // PNP
+ Q_2N3906(Q9) // PNP
+ Q_2N3906(Q10) // PNP
+ Q_2N3906(Q11) // PNP
+// Q_2N6292(Q12) // NPN -- part of final amp (not emulated)
+// Q_2N6107(Q13) // PNP -- part of final amp (not emulated)
+ Q_2N3906(Q14) // PNP
+ Q_2N3904(Q15) // NPN
+ Q_2N3906(Q16) // PNP
+ Q_2N3904(Q17) // NPN
+ Q_2N3906(Q18) // PNP
+ Q_2N3904(Q19) // NPN
+
+ TTL_7414_DIP(IC1) // Hex Inverter
+ NET_C(IC1.7, GND)
+ NET_C(IC1.14, I_V5)
+
+ TTL_74LS164_DIP(IC2) // 8-bit Shift Reg.
+ NET_C(IC2.7, GND)
+ NET_C(IC2.14, I_V5)
+
+ TTL_74LS377_DIP(IC3) // Octal D Flip Flop
+ NET_C(IC3.10, GND)
+ NET_C(IC3.20, I_V5)
+
+// TTL_7815_DIP(IC4) // +15V Regulator -- part of voltage converter (not emulated)
+// TTL_7915_DIP(IC5) // -15V Regulator -- part of voltage converter (not emulated)
+
+ LM555_DIP(IC6)
+
+ TTL_7406_DIP(IC7) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ NET_C(IC7.7, GND)
+ NET_C(IC7.14, I_V5)
+
+ TTL_74LS163_DIP(IC8) // Binary Counter (schems say can sub a 74161)
+ NET_C(IC8.8, GND)
+ NET_C(IC8.16, I_V5)
+
+ TTL_74LS00_DIP(IC9) // Quad 4-Input NAND Gate
+ NET_C(IC9.7, GND)
+ NET_C(IC9.14, I_V5)
+
+ TTL_74LS393_DIP(IC10) // Dual 4-Stage Binary Counter
+ NET_C(IC10.7, GND)
+ NET_C(IC10.14, I_V5)
+
+ TTL_74LS163_DIP(IC11) // Binary Counter (schems say can sub a 74161)
+ NET_C(IC11.8, GND)
+ NET_C(IC11.16, I_V5)
+
+ // IC12 was deleted from schematics
+
+ TTL_74LS393_DIP(IC13) // Dual 4-Stage Binary Counter
+ NET_C(IC13.7, GND)
+ NET_C(IC13.14, I_V5)
+
+ // IC14 was deleted from schematics
#if (!HLE_TANK_VCO)
- LM566_DIP(IC15)
+ LM566_DIP(IC15)
#endif
- // IC16 was deleted from schematics
-
- AMI_S2688(IC17) // Noise generator
-
- TL081_DIP(IC18) // Op. Amp.
- NET_C(IC18.7, I_V15)
- NET_C(IC18.4, I_VM15)
-
- CA3080_DIP(IC19) // Op. Amp.
- NET_C(IC19.4, I_VM15)
- NET_C(IC19.7, I_V15)
-
- CA3080_DIP(IC20) // Op. Amp.
- NET_C(IC20.4, I_VM15)
- NET_C(IC20.7, I_V15)
-
- CA3080_DIP(IC21) // Op. Amp.
- NET_C(IC21.4, I_VM15)
- NET_C(IC21.7, I_V15)
-
- CA3080_DIP(IC22) // Op. Amp.
- NET_C(IC22.4, I_VM15)
- NET_C(IC22.7, I_V15)
-
- LM555_DIP(IC23)
-
- TL081_DIP(IC24) // Op. Amp.
- NET_C(IC24.7, I_V15)
- NET_C(IC24.4, I_VM15)
-
- TL081_DIP(IC25) // Op. Amp.
- NET_C(IC25.7, I_V15)
- NET_C(IC25.4, I_VM15)
-
- TL081_DIP(IC26) // Op. Amp.
- NET_C(IC26.7, I_V15)
- NET_C(IC26.4, I_VM15)
-
- TTL_7414_DIP(IC27) // Hex Inverter
- NET_C(IC27.7, GND)
- NET_C(IC27.14, I_V5)
-
- //
- // Page 1: inputs and shift register
- //
-
- NET_C(I_OUT_1, IC27.13)
- ALIAS(TANK_EN, IC27.12)
- NET_C(I_OUT_2, IC27.9)
- ALIAS(BEEP_EN, IC27.8)
- NET_C(I_OUT_3, IC27.3)
- ALIAS(CHOPPER_SW, IC27.4)
-
- NET_C(I_V5, R1.1)
- NET_C(R1.2, IC2.9, IC2.1)
- ALIAS(HI, R1.2)
- NET_C(I_OUT_7, IC1.13)
- NET_C(IC1.12, IC1.1)
- NET_C(IC1.2, IC2.2)
- NET_C(I_OUT_4, IC1.11)
- NET_C(IC1.10, IC1.5)
- NET_C(IC1.6, IC2.8)
- NET_C(IC2.3, IC3.3)
- NET_C(IC2.4, IC3.4)
- NET_C(IC2.5, IC3.7)
- NET_C(IC2.6, IC3.8)
- NET_C(IC2.10, IC3.13)
- NET_C(IC2.11, IC3.14)
- NET_C(IC2.12, IC3.17)
- NET_C(IC2.13, IC3.18)
-
- NET_C(I_OUT_0, IC27.11)
- NET_C(IC27.10, IC27.5)
- NET_C(IC27.6, IC3.11)
- NET_C(IC3.1, GND)
- ALIAS(TANK_FIRE, IC3.2)
- ALIAS(HI_EXP, IC3.5)
- ALIAS(JEEP_FIRE, IC3.6)
- ALIAS(LO_EXP, IC3.9)
- NET_C(IC3.12, IC8.6)
- NET_C(IC3.15, IC8.5)
- NET_C(IC3.16, IC8.4)
- NET_C(IC3.19, IC8.3)
-
- //
- // Page 1: Tank EN
- //
-
- NET_C(I_V5, IC6.8, R2.2)
- NET_C(R2.1, IC6.7, R3.2)
- NET_C(R3.1, IC6.2, IC6.6, C11.1)
- NET_C(C11.2, GND)
- NET_C(TANK_EN, IC6.4, IC7.9)
- NET_C(IC6.1, GND)
- NET_C(IC6.5, C12.1)
- NET_C(C12.2, GND)
- NET_C(IC6.3, IC1.9)
- NET_C(IC1.8, IC8.2)
- NET_C(IC8.7, IC8.10, IC8.1, HI)
- NET_C(IC8.15, IC9.1, IC9.2, IC11.2, IC10.1)
- NET_C(IC8.9, IC9.3)
- NET_C(IC10.2, GND)
- NET_C(IC10.6, IC9.9, IC13.13)
-
- NET_C(IC11.1, IC11.10, IC11.7, IC11.3, IC11.4, HI)
- NET_C(IC11.5, IC11.6, GND)
- NET_C(IC11.15, IC1.3)
- NET_C(IC1.4, IC11.9)
- NET_C(IC11.11, IC9.10)
- NET_C(IC9.8, IC10.13)
- NET_C(IC10.12, GND)
- NET_C(IC10.11, R6.1)
- NET_C(R6.2, C13.1, C14.2)
- NET_C(C13.2, GND)
- NET_C(C14.1, R7.1)
- ALIAS(SJ, R7.2)
-
- NET_C(IC7.8, R8.1, IC13.12)
- NET_C(R8.2, I_V5)
- NET_C(IC13.8, R5.1, IC7.5)
- ALIAS(SH2_1, IC13.8)
- NET_C(R5.2, I_V5)
- NET_C(IC13.9, IC7.11, R9.1, IC7.13)
- ALIAS(SH2_3, IC13.9)
- NET_C(R9.2, I_V5)
- NET_C(IC7.10, IC7.6, R10.1)
- ALIAS(SH2_5, R10.1)
- NET_C(R10.2, I_V5)
-
- ALIAS(SH2_2, R19.1)
- ALIAS(SH2_4, R20.1)
- ALIAS(SH2_6, R21.1)
- NET_C(R19.2, R20.2, R21.2, R22.2, C18.1, R23.1)
- NET_C(R22.1, GND)
- NET_C(C18.2, GND)
- NET_C(R23.2, I_V15)
+ // IC16 was deleted from schematics
+
+ AMI_S2688(IC17) // Noise generator
+
+ TL081_DIP(IC18) // Op. Amp.
+ NET_C(IC18.7, I_V15)
+ NET_C(IC18.4, I_VM15)
+
+ CA3080_DIP(IC19) // Op. Amp.
+ NET_C(IC19.4, I_VM15)
+ NET_C(IC19.7, I_V15)
+
+ CA3080_DIP(IC20) // Op. Amp.
+ NET_C(IC20.4, I_VM15)
+ NET_C(IC20.7, I_V15)
+
+ CA3080_DIP(IC21) // Op. Amp.
+ NET_C(IC21.4, I_VM15)
+ NET_C(IC21.7, I_V15)
+
+ CA3080_DIP(IC22) // Op. Amp.
+ NET_C(IC22.4, I_VM15)
+ NET_C(IC22.7, I_V15)
+
+ LM555_DIP(IC23)
+
+ TL081_DIP(IC24) // Op. Amp.
+ NET_C(IC24.7, I_V15)
+ NET_C(IC24.4, I_VM15)
+
+ TL081_DIP(IC25) // Op. Amp.
+ NET_C(IC25.7, I_V15)
+ NET_C(IC25.4, I_VM15)
+
+ TL081_DIP(IC26) // Op. Amp.
+ NET_C(IC26.7, I_V15)
+ NET_C(IC26.4, I_VM15)
+
+ TTL_7414_DIP(IC27) // Hex Inverter
+ NET_C(IC27.7, GND)
+ NET_C(IC27.14, I_V5)
+
+ //
+ // Page 1: inputs and shift register
+ //
+
+ NET_C(I_OUT_1, IC27.13)
+ ALIAS(TANK_EN, IC27.12)
+ NET_C(I_OUT_2, IC27.9)
+ ALIAS(BEEP_EN, IC27.8)
+ NET_C(I_OUT_3, IC27.3)
+ ALIAS(CHOPPER_SW, IC27.4)
+
+ NET_C(I_V5, R1.1)
+ NET_C(R1.2, IC2.9, IC2.1)
+ ALIAS(HI, R1.2)
+ NET_C(I_OUT_7, IC1.13)
+ NET_C(IC1.12, IC1.1)
+ NET_C(IC1.2, IC2.2)
+ NET_C(I_OUT_4, IC1.11)
+ NET_C(IC1.10, IC1.5)
+ NET_C(IC1.6, IC2.8)
+ NET_C(IC2.3, IC3.3)
+ NET_C(IC2.4, IC3.4)
+ NET_C(IC2.5, IC3.7)
+ NET_C(IC2.6, IC3.8)
+ NET_C(IC2.10, IC3.13)
+ NET_C(IC2.11, IC3.14)
+ NET_C(IC2.12, IC3.17)
+ NET_C(IC2.13, IC3.18)
+
+ NET_C(I_OUT_0, IC27.11)
+ NET_C(IC27.10, IC27.5)
+ NET_C(IC27.6, IC3.11)
+ NET_C(IC3.1, GND)
+ ALIAS(TANK_FIRE, IC3.2)
+ ALIAS(HI_EXP, IC3.5)
+ ALIAS(JEEP_FIRE, IC3.6)
+ ALIAS(LO_EXP, IC3.9)
+ NET_C(IC3.12, IC8.6)
+ NET_C(IC3.15, IC8.5)
+ NET_C(IC3.16, IC8.4)
+ NET_C(IC3.19, IC8.3)
+
+ //
+ // Page 1: Tank EN
+ //
+
+ NET_C(I_V5, IC6.8, R2.2)
+ NET_C(R2.1, IC6.7, R3.2)
+ NET_C(R3.1, IC6.2, IC6.6, C11.1)
+ NET_C(C11.2, GND)
+ NET_C(TANK_EN, IC6.4, IC7.9)
+ NET_C(IC6.1, GND)
+ NET_C(IC6.5, C12.1)
+ NET_C(C12.2, GND)
+ NET_C(IC6.3, IC1.9)
+ NET_C(IC1.8, IC8.2)
+ NET_C(IC8.7, IC8.10, IC8.1, HI)
+ NET_C(IC8.15, IC9.1, IC9.2, IC11.2, IC10.1)
+ NET_C(IC8.9, IC9.3)
+ NET_C(IC10.2, GND)
+ NET_C(IC10.6, IC9.9, IC13.13)
+
+ NET_C(IC11.1, IC11.10, IC11.7, IC11.3, IC11.4, HI)
+ NET_C(IC11.5, IC11.6, GND)
+ NET_C(IC11.15, IC1.3)
+ NET_C(IC1.4, IC11.9)
+ NET_C(IC11.11, IC9.10)
+ NET_C(IC9.8, IC10.13)
+ NET_C(IC10.12, GND)
+ NET_C(IC10.11, R6.1)
+ NET_C(R6.2, C13.1, C14.2)
+ NET_C(C13.2, GND)
+ NET_C(C14.1, R7.1)
+ ALIAS(SJ, R7.2)
+
+ NET_C(IC7.8, R8.1, IC13.12)
+ NET_C(R8.2, I_V5)
+ NET_C(IC13.8, R5.1, IC7.5)
+ ALIAS(SH2_1, IC13.8)
+ NET_C(R5.2, I_V5)
+ NET_C(IC13.9, IC7.11, R9.1, IC7.13)
+ ALIAS(SH2_3, IC13.9)
+ NET_C(R9.2, I_V5)
+ NET_C(IC7.10, IC7.6, R10.1)
+ ALIAS(SH2_5, R10.1)
+ NET_C(R10.2, I_V5)
+
+ ALIAS(SH2_2, R19.1)
+ ALIAS(SH2_4, R20.1)
+ ALIAS(SH2_6, R21.1)
+ NET_C(R19.2, R20.2, R21.2, R22.2, C18.1, R23.1)
+ NET_C(R22.1, GND)
+ NET_C(C18.2, GND)
+ NET_C(R23.2, I_V15)
#if (HLE_TANK_VCO)
- //
- // R2 = 0.98110: HP = (0.00000599036*A0) - 0.0000565124
- // R2 = 0.99782: HP = (0.00000194885*A0*A0) - (0.0000415989*A0) + 0.000233746
- // R2 = 0.99811: HP = (0.000000646112*A0*A0*A0) - (0.0000215063*A0*A0) + (0.000242010*A0) - 0.000908469
- // R2 = 0.99589: HP = (0.000000217354*A0*A0*A0*A0) - (0.0000098166*A0*A0*A0) + (0.000167248*A0*A0) - (0.00127054*A0) + 0.00363402
- // R2 = 0.92249: HP = (0.00000000630602*A0*A0*A0*A0*A0) - (0.000000220145*A0*A0*A0*A0) + (0.00000210638*A0*A0*A0) + (0.00000707526*A0*A0) - (0.000207037*A0) + 0.000836264
- //
+ //
+ // R2 = 0.98110: HP = (0.00000599036*A0) - 0.0000565124
+ // R2 = 0.99782: HP = (0.00000194885*A0*A0) - (0.0000415989*A0) + 0.000233746
+ // R2 = 0.99811: HP = (0.000000646112*A0*A0*A0) - (0.0000215063*A0*A0) + (0.000242010*A0) - 0.000908469
+ // R2 = 0.99589: HP = (0.000000217354*A0*A0*A0*A0) - (0.0000098166*A0*A0*A0) + (0.000167248*A0*A0) - (0.00127054*A0) + 0.00363402
+ // R2 = 0.92249: HP = (0.00000000630602*A0*A0*A0*A0*A0) - (0.000000220145*A0*A0*A0*A0) + (0.00000210638*A0*A0*A0) + (0.00000707526*A0*A0) - (0.000207037*A0) + 0.000836264
+ //
VARCLOCK(TANKCLK, 1, "max(0.000001,min(0.1,(0.000000646112*A0*A0*A0) - (0.0000215063*A0*A0) + (0.000242010*A0) - 0.000908469))")
NET_C(TANKCLK.GND, GND)
NET_C(TANKCLK.VCC, I_V5)
- NET_C(R19.2, TANKCLK.A0)
- NET_C(TANKCLK.Q, IC13.1)
- NET_C(GND, R4.1, R4.2, R11.1, R11.2, R12.1, R12.2, R13.1, R13.2, C15.1, C15.2, C16.1, C16.2, C17.1, C17.2, D5.A, D5.K, D8.A, D8.K)
+ NET_C(R19.2, TANKCLK.A0)
+ NET_C(TANKCLK.Q, IC13.1)
+ NET_C(GND, R4.1, R4.2, R11.1, R11.2, R12.1, R12.2, R13.1, R13.2, C15.1, C15.2, C16.1, C16.2, C17.1, C17.2, D5.A, D5.K, D8.A, D8.K)
#else
- NET_C(IC15.5, R19.2, C15.2)
- NET_C(IC15.7, C17.1)
- NET_C(C17.2, GND)
- NET_C(IC15.1, GND)
- NET_C(IC15.6, C15.1, R11.1)
- NET_C(R11.2, IC15.8, I_V15)
- NET_C(IC15.3, C16.2)
- NET_C(C16.1, R12.1, D5.K)
- NET_C(D5.A, GND)
- NET_C(R12.2, Q1.B)
- NET_C(Q1.E, D8.K, R4.2)
- NET_C(D8.A, GND)
- NET_C(R4.1, I_VM15)
- NET_C(Q1.C, IC13.1, R13.1)
- NET_C(R13.2, I_V5)
+ NET_C(IC15.5, R19.2, C15.2)
+ NET_C(IC15.7, C17.1)
+ NET_C(C17.2, GND)
+ NET_C(IC15.1, GND)
+ NET_C(IC15.6, C15.1, R11.1)
+ NET_C(R11.2, IC15.8, I_V15)
+ NET_C(IC15.3, C16.2)
+ NET_C(C16.1, R12.1, D5.K)
+ NET_C(D5.A, GND)
+ NET_C(R12.2, Q1.B)
+ NET_C(Q1.E, D8.K, R4.2)
+ NET_C(D8.A, GND)
+ NET_C(R4.1, I_VM15)
+ NET_C(Q1.C, IC13.1, R13.1)
+ NET_C(R13.2, I_V5)
#endif
- NET_C(IC7.12, R110.1, IC13.2)
- NET_C(R110.2, I_V5)
- NET_C(IC13.5, R15.1)
- NET_C(IC13.4, R16.1)
- NET_C(IC13.3, R17.1)
- NET_C(R15.2, R16.2, R17.2, R18.2, C19.2)
- NET_C(R18.1, GND)
- NET_C(C19.1, R14.1)
- NET_C(R14.2, SJ)
-
- //
- // Page 2 stuff
- //
-
- NET_C(SH2_1, R96.1)
- NET_C(R96.2, R95.1, Q14.B)
- NET_C(R95.2, I_V5, Q14.E)
- NET_C(Q14.C, R97.2, R98.2, R99.1)
- NET_C(R97.1, I_VM15)
- NET_C(R98.1, GND, Q15.E)
- NET_C(R99.2, Q15.B)
- NET_C(Q15.C, SH2_2)
-
- NET_C(SH2_3, R101.1)
- NET_C(R101.2, R100.1, Q16.B)
- NET_C(R100.2, I_V5, Q16.E)
- NET_C(Q16.C, R102.2, R103.2, R104.1)
- NET_C(R102.1, I_VM15)
- NET_C(R103.1, GND, Q17.E)
- NET_C(R104.2, Q17.B)
- NET_C(Q17.C, SH2_4)
-
- NET_C(SH2_5, R106.1)
- NET_C(R106.2, R105.1, Q18.B)
- NET_C(R105.2, I_V5, Q18.E)
- NET_C(Q18.C, R107.2, R108.2, R109.1)
- NET_C(R107.1, I_VM15)
- NET_C(R108.1, GND, Q19.E)
- NET_C(R109.2, Q19.B)
- NET_C(Q19.C, SH2_6)
-
- //
- // Page 3
- //
-
- NET_C(I_V15, C20.1, IC17.4)
- NET_C(C20.2, GND)
- NET_C(IC17.2, IC17.1, GND, R26.1)
- NET_C(IC17.3, C21.2)
- NET_C(C21.1, R26.2, IC18.3)
- NET_C(IC18.2, IC18.6)
- ALIAS(NOISE, IC18.6)
-
- //
- // TANK FIRE
- //
-
- NET_C(TANK_FIRE, R27.1, R28.1)
- NET_C(R27.2, I_V5, R29.2, Q2.E)
- NET_C(R28.2, R29.1, Q2.B)
- NET_C(Q2.C, R30.2, R31.2, Q3.E)
- NET_C(R30.1, I_VM15)
- NET_C(R31.1, GND, R32.1)
- NET_C(R32.2, Q3.B)
- NET_C(Q3.C, C22.1, R33.1)
- NET_C(C22.2, I_VM15)
- NET_C(R33.2, IC19.5)
- NET_C(NOISE, R34.1)
- NET_C(R34.2, C23.1, R35.1)
- NET_C(R35.2, C24.1, R36.1)
- NET_C(C23.2, C24.2, GND, R37.1, R38.1)
- NET_C(R36.2, R37.2, IC19.2)
- NET_C(R38.2, IC19.3)
- NET_C(IC19.6, IC25.3)
-
- //
- // LO EXP
- //
-
- NET_C(LO_EXP, R39.1, R40.1)
- NET_C(R39.2, I_V5, R41.2, Q4.E)
- NET_C(R40.2, R41.1, Q4.B)
- NET_C(Q4.C, R42.2, R43.2, Q5.E)
- NET_C(R42.1, I_VM15)
- NET_C(R43.1, GND, R44.1)
- NET_C(R44.2, Q5.B)
- NET_C(Q5.C, C25.1, R45.1)
- NET_C(C25.2, I_VM15)
- NET_C(R45.2, IC20.5)
- NET_C(NOISE, R46.1)
- NET_C(R46.2, C26.1, R47.1)
- NET_C(R47.2, C27.1, R48.1)
- NET_C(C26.2, C27.2, GND, R49.1, R50.1)
- NET_C(R48.2, R49.2, IC20.2)
- NET_C(R50.2, IC20.3)
- NET_C(IC20.6, IC25.3)
-
- //
- // CHOPPER SW
- //
-
- NET_C(CHOPPER_SW, IC7.3)
- NET_C(IC7.4, R51.1, R52.1)
- NET_C(R51.2, I_V5, R53.2, Q6.E)
- NET_C(R52.2, R53.1, Q6.B)
- NET_C(Q6.C, R54.2, R55.2, Q7.E)
- NET_C(R54.1, I_VM15)
- NET_C(R55.1, R56.1, GND)
- NET_C(R56.2, Q7.B)
- NET_C(Q7.C, R57.1)
- NET_C(R57.2, IC21.5)
- NET_C(NOISE, R58.1)
- NET_C(R58.2, C29.1, R59.1)
- NET_C(R59.2, C30.1, R94.1)
- NET_C(C29.2, C30.2, GND, R60.1, R61.1)
- NET_C(R94.2, R60.2, IC21.2)
- NET_C(R61.2, IC21.3)
- NET_C(IC21.6, IC25.3)
-
- //
- // JEEP FIRE
- //
-
- NET_C(JEEP_FIRE, R62.1, R63.1)
- NET_C(R62.2, I_V5, R64.2, Q8.E)
- NET_C(R63.2, R64.1, Q8.B)
- NET_C(Q8.C, R65.2, R66.2, Q9.E)
- NET_C(R65.1, I_VM15)
- NET_C(R66.1, GND, R67.1)
- NET_C(R67.2, Q9.B)
- NET_C(Q9.C, C31.1, R68.1)
- NET_C(C31.2, I_VM15)
- NET_C(R68.2, R80.2, IC22.5)
- NET_C(NOISE, R69.1)
- NET_C(R69.2, C32.1, R70.1)
- NET_C(R70.2, C33.1, R71.1)
- NET_C(C32.2, C33.2, GND, R72.1, R73.1)
- NET_C(R71.2, R72.2, IC22.2)
- NET_C(R73.2, IC22.3)
- NET_C(IC22.6, IC25.3)
-
- //
- // HI EXP
- //
-
- NET_C(HI_EXP, R74.1, R75.1)
- NET_C(R74.2, I_V5, R76.2, Q10.E)
- NET_C(R75.2, R76.1, Q10.B)
- NET_C(Q10.C, R77.2, R78.2, Q11.E)
- NET_C(R77.1, I_VM15)
- NET_C(R78.1, GND, R79.1)
- NET_C(R79.2, Q11.B)
- NET_C(Q11.C, C34.1, R80.1)
- NET_C(C34.2, I_VM15)
-
- //
- // BEEP EN
- //
-
- NET_C(BEEP_EN, IC23.4)
- NET_C(I_V5, R81.2, IC23.8)
- NET_C(R81.1, R82.1, IC23.6, IC23.2, C35.1)
- NET_C(R82.2, IC23.7)
- NET_C(C35.2, GND)
- NET_C(IC23.1, GND)
- NET_C(IC23.5, C37.1)
- NET_C(C37.2, GND)
- NET_C(IC23.3, R83.1)
- NET_C(R83.2, C36.1)
- NET_C(C36.2, SJ)
-
- //
- // Final mix
- //
-
- NET_C(R90.2, IC25.3)
- NET_C(R90.1, GND)
- NET_C(IC25.2, IC25.6, C43.1)
- NET_C(C43.2, R91.1)
- NET_C(R91.2, IC26.2, SJ, R92.1)
- NET_C(IC26.3, GND)
- NET_C(IC26.6, R92.2)
- ALIAS(OUTPUT, R92.2)
-
- //
- // Unconnected inputs
- //
-
- NET_C(GND, IC7.1, IC9.4, IC9.5, IC9.12, IC9.13, IC27.1, IC27.2)
- NET_C(GND, IC24.2, IC24.3) // part of final amp
-
- //
- // Unconnected outputs
- //
-
- HINT(IC7.2, NC)
- HINT(IC8.11, NC) // QD
- HINT(IC8.12, NC) // QC
- HINT(IC8.13, NC) // QB
- HINT(IC8.14, NC) // QA
- HINT(IC9.6, NC)
- HINT(IC9.11, NC)
- HINT(IC10.3, NC) // QA
- HINT(IC10.4, NC) // QB
- HINT(IC10.5, NC) // QC
- HINT(IC10.8, NC) // QD
- HINT(IC10.9, NC) // QC
- HINT(IC10.10, NC) // QB
- HINT(IC11.12, NC) // QC
- HINT(IC11.13, NC) // QB
- HINT(IC11.14, NC) // QA
- HINT(IC13.6, NC)
- HINT(IC13.10, NC)
- HINT(IC13.11, NC)
+ NET_C(IC7.12, R110.1, IC13.2)
+ NET_C(R110.2, I_V5)
+ NET_C(IC13.5, R15.1)
+ NET_C(IC13.4, R16.1)
+ NET_C(IC13.3, R17.1)
+ NET_C(R15.2, R16.2, R17.2, R18.2, C19.2)
+ NET_C(R18.1, GND)
+ NET_C(C19.1, R14.1)
+ NET_C(R14.2, SJ)
+
+ //
+ // Page 2 stuff
+ //
+
+ NET_C(SH2_1, R96.1)
+ NET_C(R96.2, R95.1, Q14.B)
+ NET_C(R95.2, I_V5, Q14.E)
+ NET_C(Q14.C, R97.2, R98.2, R99.1)
+ NET_C(R97.1, I_VM15)
+ NET_C(R98.1, GND, Q15.E)
+ NET_C(R99.2, Q15.B)
+ NET_C(Q15.C, SH2_2)
+
+ NET_C(SH2_3, R101.1)
+ NET_C(R101.2, R100.1, Q16.B)
+ NET_C(R100.2, I_V5, Q16.E)
+ NET_C(Q16.C, R102.2, R103.2, R104.1)
+ NET_C(R102.1, I_VM15)
+ NET_C(R103.1, GND, Q17.E)
+ NET_C(R104.2, Q17.B)
+ NET_C(Q17.C, SH2_4)
+
+ NET_C(SH2_5, R106.1)
+ NET_C(R106.2, R105.1, Q18.B)
+ NET_C(R105.2, I_V5, Q18.E)
+ NET_C(Q18.C, R107.2, R108.2, R109.1)
+ NET_C(R107.1, I_VM15)
+ NET_C(R108.1, GND, Q19.E)
+ NET_C(R109.2, Q19.B)
+ NET_C(Q19.C, SH2_6)
+
+ //
+ // Page 3
+ //
+
+ NET_C(I_V15, C20.1, IC17.4)
+ NET_C(C20.2, GND)
+ NET_C(IC17.2, IC17.1, GND, R26.1)
+ NET_C(IC17.3, C21.2)
+ NET_C(C21.1, R26.2, IC18.3)
+ NET_C(IC18.2, IC18.6)
+ ALIAS(NOISE, IC18.6)
+
+ //
+ // TANK FIRE
+ //
+
+ NET_C(TANK_FIRE, R27.1, R28.1)
+ NET_C(R27.2, I_V5, R29.2, Q2.E)
+ NET_C(R28.2, R29.1, Q2.B)
+ NET_C(Q2.C, R30.2, R31.2, Q3.E)
+ NET_C(R30.1, I_VM15)
+ NET_C(R31.1, GND, R32.1)
+ NET_C(R32.2, Q3.B)
+ NET_C(Q3.C, C22.1, R33.1)
+ NET_C(C22.2, I_VM15)
+ NET_C(R33.2, IC19.5)
+ NET_C(NOISE, R34.1)
+ NET_C(R34.2, C23.1, R35.1)
+ NET_C(R35.2, C24.1, R36.1)
+ NET_C(C23.2, C24.2, GND, R37.1, R38.1)
+ NET_C(R36.2, R37.2, IC19.2)
+ NET_C(R38.2, IC19.3)
+ NET_C(IC19.6, IC25.3)
+
+ //
+ // LO EXP
+ //
+
+ NET_C(LO_EXP, R39.1, R40.1)
+ NET_C(R39.2, I_V5, R41.2, Q4.E)
+ NET_C(R40.2, R41.1, Q4.B)
+ NET_C(Q4.C, R42.2, R43.2, Q5.E)
+ NET_C(R42.1, I_VM15)
+ NET_C(R43.1, GND, R44.1)
+ NET_C(R44.2, Q5.B)
+ NET_C(Q5.C, C25.1, R45.1)
+ NET_C(C25.2, I_VM15)
+ NET_C(R45.2, IC20.5)
+ NET_C(NOISE, R46.1)
+ NET_C(R46.2, C26.1, R47.1)
+ NET_C(R47.2, C27.1, R48.1)
+ NET_C(C26.2, C27.2, GND, R49.1, R50.1)
+ NET_C(R48.2, R49.2, IC20.2)
+ NET_C(R50.2, IC20.3)
+ NET_C(IC20.6, IC25.3)
+
+ //
+ // CHOPPER SW
+ //
+
+ NET_C(CHOPPER_SW, IC7.3)
+ NET_C(IC7.4, R51.1, R52.1)
+ NET_C(R51.2, I_V5, R53.2, Q6.E)
+ NET_C(R52.2, R53.1, Q6.B)
+ NET_C(Q6.C, R54.2, R55.2, Q7.E)
+ NET_C(R54.1, I_VM15)
+ NET_C(R55.1, R56.1, GND)
+ NET_C(R56.2, Q7.B)
+ NET_C(Q7.C, R57.1)
+ NET_C(R57.2, IC21.5)
+ NET_C(NOISE, R58.1)
+ NET_C(R58.2, C29.1, R59.1)
+ NET_C(R59.2, C30.1, R94.1)
+ NET_C(C29.2, C30.2, GND, R60.1, R61.1)
+ NET_C(R94.2, R60.2, IC21.2)
+ NET_C(R61.2, IC21.3)
+ NET_C(IC21.6, IC25.3)
+
+ //
+ // JEEP FIRE
+ //
+
+ NET_C(JEEP_FIRE, R62.1, R63.1)
+ NET_C(R62.2, I_V5, R64.2, Q8.E)
+ NET_C(R63.2, R64.1, Q8.B)
+ NET_C(Q8.C, R65.2, R66.2, Q9.E)
+ NET_C(R65.1, I_VM15)
+ NET_C(R66.1, GND, R67.1)
+ NET_C(R67.2, Q9.B)
+ NET_C(Q9.C, C31.1, R68.1)
+ NET_C(C31.2, I_VM15)
+ NET_C(R68.2, R80.2, IC22.5)
+ NET_C(NOISE, R69.1)
+ NET_C(R69.2, C32.1, R70.1)
+ NET_C(R70.2, C33.1, R71.1)
+ NET_C(C32.2, C33.2, GND, R72.1, R73.1)
+ NET_C(R71.2, R72.2, IC22.2)
+ NET_C(R73.2, IC22.3)
+ NET_C(IC22.6, IC25.3)
+
+ //
+ // HI EXP
+ //
+
+ NET_C(HI_EXP, R74.1, R75.1)
+ NET_C(R74.2, I_V5, R76.2, Q10.E)
+ NET_C(R75.2, R76.1, Q10.B)
+ NET_C(Q10.C, R77.2, R78.2, Q11.E)
+ NET_C(R77.1, I_VM15)
+ NET_C(R78.1, GND, R79.1)
+ NET_C(R79.2, Q11.B)
+ NET_C(Q11.C, C34.1, R80.1)
+ NET_C(C34.2, I_VM15)
+
+ //
+ // BEEP EN
+ //
+
+ NET_C(BEEP_EN, IC23.4)
+ NET_C(I_V5, R81.2, IC23.8)
+ NET_C(R81.1, R82.1, IC23.6, IC23.2, C35.1)
+ NET_C(R82.2, IC23.7)
+ NET_C(C35.2, GND)
+ NET_C(IC23.1, GND)
+ NET_C(IC23.5, C37.1)
+ NET_C(C37.2, GND)
+ NET_C(IC23.3, R83.1)
+ NET_C(R83.2, C36.1)
+ NET_C(C36.2, SJ)
+
+ //
+ // Final mix
+ //
+
+ NET_C(R90.2, IC25.3)
+ NET_C(R90.1, GND)
+ NET_C(IC25.2, IC25.6, C43.1)
+ NET_C(C43.2, R91.1)
+ NET_C(R91.2, IC26.2, SJ, R92.1)
+ NET_C(IC26.3, GND)
+ NET_C(IC26.6, R92.2)
+ ALIAS(OUTPUT, R92.2)
+
+ //
+ // Unconnected inputs
+ //
+
+ NET_C(GND, IC7.1, IC9.4, IC9.5, IC9.12, IC9.13, IC27.1, IC27.2)
+ NET_C(GND, IC24.2, IC24.3) // part of final amp
+
+ //
+ // Unconnected outputs
+ //
+
+ HINT(IC7.2, NC)
+ HINT(IC8.11, NC) // QD
+ HINT(IC8.12, NC) // QC
+ HINT(IC8.13, NC) // QB
+ HINT(IC8.14, NC) // QA
+ HINT(IC9.6, NC)
+ HINT(IC9.11, NC)
+ HINT(IC10.3, NC) // QA
+ HINT(IC10.4, NC) // QB
+ HINT(IC10.5, NC) // QC
+ HINT(IC10.8, NC) // QD
+ HINT(IC10.9, NC) // QC
+ HINT(IC10.10, NC) // QB
+ HINT(IC11.12, NC) // QC
+ HINT(IC11.13, NC) // QB
+ HINT(IC11.14, NC) // QA
+ HINT(IC13.6, NC)
+ HINT(IC13.10, NC)
+ HINT(IC13.11, NC)
// HINT(IC27.2, NC)
NETLIST_END()
diff --git a/src/mame/audio/nl_barrier.cpp b/src/mame/audio/nl_barrier.cpp
index 3d2c3646d76..5f03d49b536 100644
--- a/src/mame/audio/nl_barrier.cpp
+++ b/src/mame/audio/nl_barrier.cpp
@@ -42,9 +42,9 @@ NETLIST_START(barrier)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
- TTL_INPUT(I_OUT_0, 0) // active high
- TTL_INPUT(I_OUT_1, 0) // active high
- TTL_INPUT(I_OUT_2, 0) // active high
+ TTL_INPUT(I_OUT_0, 0) // active high
+ TTL_INPUT(I_OUT_1, 0) // active high
+ TTL_INPUT(I_OUT_2, 0) // active high
NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND)
NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC)
@@ -74,17 +74,17 @@ NETLIST_START(barrier)
RES(R17, RES_K(10))
RES(R18, RES_K(47))
RES(R19, 820)
-// POT(R20, RES_K(10)) -- part of final amp (not emulated)
-// RES(R21, 150) -- part of final amp (not emulated), not present on Space Wars
-// RES(R22, 2.7) -- part of final amp (not emulated), not present on Space Wars
-// RES(R23, 2.7) -- part of final amp (not emulated), not present on Space Wars
+// POT(R20, RES_K(10)) -- part of final amp (not emulated)
+// RES(R21, 150) -- part of final amp (not emulated), not present on Space Wars
+// RES(R22, 2.7) -- part of final amp (not emulated), not present on Space Wars
+// RES(R23, 2.7) -- part of final amp (not emulated), not present on Space Wars
RES(R24, RES_K(47))
RES(R25, 150)
RES(R26, RES_K(160))
RES(R27, 750)
-// RES(R28, RES_K(150)) -- part of final amp (not emulated), illegible on Space Wars
-// POT(R29, RES_K(10)) -- part of final amp (not emulated)
-// RES(R30, 470) -- part of final amp (not emulated)
+// RES(R28, RES_K(150)) -- part of final amp (not emulated), illegible on Space Wars
+// POT(R29, RES_K(10)) -- part of final amp (not emulated)
+// RES(R30, 470) -- part of final amp (not emulated)
RES(R31, 470)
RES(R32, RES_K(1))
RES(R33, RES_K(39))
@@ -99,21 +99,21 @@ NETLIST_START(barrier)
CAP(C3, CAP_U(0.01))
CAP(C4, CAP_U(0.01))
CAP(C5, CAP_U(0.1))
-// CAP(C6, CAP_U(4.7)) // not needed
+// CAP(C6, CAP_U(4.7)) // not needed
CAP(C7, CAP_U(0.01))
CAP(C8, CAP_U(1))
CAP(C9, CAP_U(0.1))
CAP(C10, CAP_P(220))
CAP(C11, CAP_U(0.1))
-// CAP(C12, CAP_U(0.01)) -- part of final amp (not emulated)
-// CAP(C13, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C14, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C15, CAP_U(50)) -- not needed
-// CAP(C16, CAP_U(2.2)) -- not needed
+// CAP(C12, CAP_U(0.01)) -- part of final amp (not emulated)
+// CAP(C13, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C14, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C15, CAP_U(50)) -- not needed
+// CAP(C16, CAP_U(2.2)) -- not needed
CAP(C17, CAP_U(0.01))
CAP(C18, CAP_U(15))
-// CAP(C19, CAP_U(50)) -- not needed
-// CAP(C20, CAP_U(2.2)) -- not needed
+// CAP(C19, CAP_U(50)) -- not needed
+// CAP(C20, CAP_U(2.2)) -- not needed
CAP(C21, CAP_U(0.02))
CAP(C22, CAP_U(0.1))
@@ -124,45 +124,45 @@ NETLIST_START(barrier)
D_1N914(CR5)
D_1N914(CR6)
- Q_2N3906(Q1) // PNP
- Q_2N3904(Q2) // NPN
- Q_2N6426(Q3) // NPN Darlington
- Q_2N6292(Q4) // NPN
- Q_2N6107(Q5) // PNP
- Q_2N6426(Q6) // NPN Darlington
- Q_2N3904(Q7) // NPN
+ Q_2N3906(Q1) // PNP
+ Q_2N3904(Q2) // NPN
+ Q_2N6426(Q3) // NPN Darlington
+ Q_2N6292(Q4) // NPN
+ Q_2N6107(Q5) // PNP
+ Q_2N6426(Q6) // NPN Darlington
+ Q_2N3904(Q7) // NPN
- TL081_DIP(U1) // Op. Amp.
+ TL081_DIP(U1) // Op. Amp.
NET_C(U1.4, I_VM15)
NET_C(U1.7, I_V15)
- TTL_7406_DIP(U2) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(U2) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(U2.7, GND)
NET_C(U2.14, I_V5)
- TL081_DIP(U3) // Op. Amp.
+ TL081_DIP(U3) // Op. Amp.
NET_C(U3.4, I_VM15)
NET_C(U3.7, I_V15)
-// TTL_7815_DIP(U4) // +15V Regulator -- not needed
+// TTL_7815_DIP(U4) // +15V Regulator -- not needed
- TL182_DIP(U5) // Analog switch
+ TL182_DIP(U5) // Analog switch
NET_C(U5.6, I_V15)
NET_C(U5.7, I_V5)
NET_C(U5.8, GND)
NET_C(U5.9, I_VM15)
-// TL081_DIP(U6) // Op. Amp. -- part of final amp (not emulated)
-// NET_C(U6.4, I_VM15)
-// NET_C(U6.7, I_V15)
+// TL081_DIP(U6) // Op. Amp. -- part of final amp (not emulated)
+// NET_C(U6.4, I_VM15)
+// NET_C(U6.7, I_V15)
-// TTL_7915_DIP(U7) // -15V Regulator -- not needed
+// TTL_7915_DIP(U7) // -15V Regulator -- not needed
- TL081_DIP(U8) // Op. Amp.
+ TL081_DIP(U8) // Op. Amp.
NET_C(U8.4, I_VM15)
NET_C(U8.7, I_V15)
- TL081_DIP(U9) // Op. Amp.
+ TL081_DIP(U9) // Op. Amp.
NET_C(U9.4, I_VM15)
NET_C(U9.7, I_V15)
@@ -234,7 +234,7 @@ NETLIST_START(barrier)
NET_C(R24.2, U8.2, C10.1, R16.1)
NET_C(U8.3, GND)
NET_C(U8.6, R16.2, C10.2, R31.1, R38.1)
-// NET_C(U8.6, R13.2) // Schems show noise source into summing amp -- wrong??
+// NET_C(U8.6, R13.2) // Schems show noise source into summing amp -- wrong??
NET_C(R38.2, U5.14)
NET_C(I_OUT_2, U5.10)
NET_C(U5.13, C7.1)
@@ -283,18 +283,18 @@ NETLIST_START(barrier)
#if (ENABLE_FRONTIERS)
// Separate each input into the summing network
- OPTIMIZE_FRONTIER(R13.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R15.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R37.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R13.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R15.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R37.1, RES_M(1), 50)
// Decouple the Darlington BJTs from the sounds they enable
- OPTIMIZE_FRONTIER(R27.2, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R11.2, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R27.2, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R11.2, RES_M(1), 50)
// Decouple the noise source from the downstream filters
- OPTIMIZE_FRONTIER(C3.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R24.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R38.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(C3.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R24.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R38.1, RES_M(1), 50)
#endif
NETLIST_END()
diff --git a/src/mame/audio/nl_boxingb.cpp b/src/mame/audio/nl_boxingb.cpp
index 6222b04352c..8f937134769 100644
--- a/src/mame/audio/nl_boxingb.cpp
+++ b/src/mame/audio/nl_boxingb.cpp
@@ -47,182 +47,182 @@
NETLIST_START(boxingb)
- SOLVER(Solver, 1000)
+ SOLVER(Solver, 1000)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
- TTL_INPUT(I_OUT_0, 0) // active high
- TTL_INPUT(I_OUT_1, 0) // active high
- TTL_INPUT(I_OUT_2, 0) // active high
- TTL_INPUT(I_OUT_3, 0) // active high
- TTL_INPUT(I_OUT_4, 0) // active high
- TTL_INPUT(I_OUT_7, 0) // active high
+ TTL_INPUT(I_OUT_0, 0) // active high
+ TTL_INPUT(I_OUT_1, 0) // active high
+ TTL_INPUT(I_OUT_2, 0) // active high
+ TTL_INPUT(I_OUT_3, 0) // active high
+ TTL_INPUT(I_OUT_4, 0) // active high
+ TTL_INPUT(I_OUT_7, 0) // active high
- NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND, I_OUT_7.GND)
- NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC, I_OUT_7.VCC)
+ NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND, I_OUT_7.GND)
+ NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC, I_OUT_7.VCC)
- CINEMAT_LOCAL_MODELS
+ CINEMAT_LOCAL_MODELS
- ANALOG_INPUT(I_V2_2, 2.2)
- ANALOG_INPUT(I_V5, 5)
- ANALOG_INPUT(I_V15, 15)
- ANALOG_INPUT(I_VM15, -15)
+ ANALOG_INPUT(I_V2_2, 2.2)
+ ANALOG_INPUT(I_V5, 5)
+ ANALOG_INPUT(I_V15, 15)
+ ANALOG_INPUT(I_VM15, -15)
// RES(R4, 620) -- part of voltage converter (not emulated)
// RES(R5, 620) -- part of voltage converter (not emulated)
// RES(R6, 430) -- part of 2.2V voltage converter (not emulated)
// RES(R7, 560) -- part of 2.2V voltage converter (not emulated)
// RES(R8, RES_K(3.3)) -- part of 2.2V voltage converter (not emulated)
- RES(R9, RES_K(1))
- RES(R10, RES_K(4.7))
- RES(R11, RES_K(1))
- RES(R12, RES_K(39))
- RES(R13, RES_K(12))
- RES(R14, RES_K(1))
- RES(R15, RES_K(4.7))
- RES(R16, RES_K(75))
- RES(R17, RES_K(75))
- RES(R18, 200)
- RES(R19, 200)
- RES(R20, RES_K(200))
- RES(R21, RES_K(4.7))
- RES(R22, RES_K(4.7))
- RES(R23, RES_K(2.7))
- RES(R24, RES_K(4.7))
- RES(R25, RES_K(39))
- RES(R26, RES_K(12))
- RES(R27, RES_K(2.4))
- RES(R28, RES_K(51))
- RES(R29, RES_K(270))
- RES(R30, RES_M(1))
- RES(R31, RES_K(16))
- RES(R32, RES_K(10))
- RES(R33, RES_K(1))
- RES(R34, RES_K(4.7))
- RES(R35, RES_K(2.7))
- RES(R36, RES_K(4.7))
- RES(R37, RES_K(39))
- RES(R38, RES_K(12))
- RES(R39, RES_K(2.4))
- RES(R40, RES_K(51))
- RES(R41, RES_K(270))
- RES(R42, RES_M(1))
- RES(R43, RES_K(11))
- RES(R44, RES_K(10))
- RES(R45, RES_K(1))
- RES(R46, RES_K(2))
- RES(R47, RES_K(1))
- RES(R48, RES_K(12))
- RES(R49, RES_K(1))
- RES(R50, RES_K(20))
- RES(R51, RES_K(20))
- RES(R52, RES_K(20))
- RES(R53, RES_K(20))
- RES(R54, RES_K(2))
- RES(R55, RES_K(4.7))
- RES(R56, RES_K(2.7))
- RES(R57, RES_K(4.7))
- RES(R58, RES_K(39))
- RES(R59, RES_K(12))
- RES(R60, RES_K(2.4))
- RES(R61, RES_K(51))
- RES(R62, RES_K(270))
- RES(R63, RES_M(1))
- RES(R64, RES_K(6.2))
- RES(R65, RES_K(10))
- RES(R66, RES_K(1))
- RES(R67, RES_K(2))
- RES(R68, RES_K(22))
- RES(R69, RES_K(39))
- RES(R70, RES_K(47))
- RES(R71, RES_K(1))
- RES(R72, RES_K(10))
- RES(R73, RES_K(2))
- RES(R74, RES_K(910))
- RES(R75, 390)
+ RES(R9, RES_K(1))
+ RES(R10, RES_K(4.7))
+ RES(R11, RES_K(1))
+ RES(R12, RES_K(39))
+ RES(R13, RES_K(12))
+ RES(R14, RES_K(1))
+ RES(R15, RES_K(4.7))
+ RES(R16, RES_K(75))
+ RES(R17, RES_K(75))
+ RES(R18, 200)
+ RES(R19, 200)
+ RES(R20, RES_K(200))
+ RES(R21, RES_K(4.7))
+ RES(R22, RES_K(4.7))
+ RES(R23, RES_K(2.7))
+ RES(R24, RES_K(4.7))
+ RES(R25, RES_K(39))
+ RES(R26, RES_K(12))
+ RES(R27, RES_K(2.4))
+ RES(R28, RES_K(51))
+ RES(R29, RES_K(270))
+ RES(R30, RES_M(1))
+ RES(R31, RES_K(16))
+ RES(R32, RES_K(10))
+ RES(R33, RES_K(1))
+ RES(R34, RES_K(4.7))
+ RES(R35, RES_K(2.7))
+ RES(R36, RES_K(4.7))
+ RES(R37, RES_K(39))
+ RES(R38, RES_K(12))
+ RES(R39, RES_K(2.4))
+ RES(R40, RES_K(51))
+ RES(R41, RES_K(270))
+ RES(R42, RES_M(1))
+ RES(R43, RES_K(11))
+ RES(R44, RES_K(10))
+ RES(R45, RES_K(1))
+ RES(R46, RES_K(2))
+ RES(R47, RES_K(1))
+ RES(R48, RES_K(12))
+ RES(R49, RES_K(1))
+ RES(R50, RES_K(20))
+ RES(R51, RES_K(20))
+ RES(R52, RES_K(20))
+ RES(R53, RES_K(20))
+ RES(R54, RES_K(2))
+ RES(R55, RES_K(4.7))
+ RES(R56, RES_K(2.7))
+ RES(R57, RES_K(4.7))
+ RES(R58, RES_K(39))
+ RES(R59, RES_K(12))
+ RES(R60, RES_K(2.4))
+ RES(R61, RES_K(51))
+ RES(R62, RES_K(270))
+ RES(R63, RES_M(1))
+ RES(R64, RES_K(6.2))
+ RES(R65, RES_K(10))
+ RES(R66, RES_K(1))
+ RES(R67, RES_K(2))
+ RES(R68, RES_K(22))
+ RES(R69, RES_K(39))
+ RES(R70, RES_K(47))
+ RES(R71, RES_K(1))
+ RES(R72, RES_K(10))
+ RES(R73, RES_K(2))
+ RES(R74, RES_K(910))
+ RES(R75, 390)
#if (HACK_VOLTAGE_SWITCH)
- RES(R76, 100)
+ RES(R76, 100)
#else
- RES(R76, RES_K(4.7))
+ RES(R76, RES_K(4.7))
#endif
- RES(R77, RES_K(2.7))
- RES(R78, RES_K(4.7))
- RES(R79, RES_K(39))
- RES(R80, RES_K(12))
- RES(R81, RES_K(2.4))
- RES(R82, RES_K(51))
- RES(R83, RES_K(270))
- RES(R84, RES_M(1))
- RES(R85, RES_K(12))
- RES(R86, RES_K(10))
- RES(R87, RES_K(1))
- RES(R88, RES_K(2))
- RES(R89, RES_K(20))
- RES(R90, RES_K(2))
- RES(R91, RES_K(20))
+ RES(R77, RES_K(2.7))
+ RES(R78, RES_K(4.7))
+ RES(R79, RES_K(39))
+ RES(R80, RES_K(12))
+ RES(R81, RES_K(2.4))
+ RES(R82, RES_K(51))
+ RES(R83, RES_K(270))
+ RES(R84, RES_M(1))
+ RES(R85, RES_K(12))
+ RES(R86, RES_K(10))
+ RES(R87, RES_K(1))
+ RES(R88, RES_K(2))
+ RES(R89, RES_K(20))
+ RES(R90, RES_K(2))
+ RES(R91, RES_K(20))
#if (HACK_VOLTAGE_SWITCH)
- RES(R92, 100)
+ RES(R92, 100)
#else
- RES(R92, RES_K(4.7))
+ RES(R92, RES_K(4.7))
#endif
- RES(R93, RES_K(2.7))
- RES(R94, RES_K(4.7))
- RES(R95, RES_K(39))
- RES(R96, RES_K(12))
- RES(R97, RES_K(2.4))
- RES(R98, RES_K(51))
- RES(R99, RES_K(330))
- RES(R100, RES_K(1))
- RES(R101, RES_M(1))
- RES(R102, 47)
- RES(R103, RES_K(4.7))
- RES(R104, RES_K(1))
- RES(R105, RES_K(39))
- RES(R106, RES_K(12))
- RES(R107, RES_K(1))
- RES(R108, RES_K(6.8))
- RES(R109, RES_K(100))
- RES(R110, RES_K(270))
- RES(R111, 100)
- RES(R112, 100)
- RES(R113, RES_K(4.7))
- RES(R114, RES_K(1))
- RES(R115, RES_K(39))
- RES(R116, RES_K(12))
- RES(R117, RES_K(2.4))
- RES(R118, RES_K(51))
- RES(R119, RES_K(270))
- RES(R120, RES_M(1))
- RES(R121, RES_K(10))
- RES(R122, RES_K(10))
- RES(R123, RES_K(1))
- RES(R124, RES_K(2))
- RES(R125, RES_K(20))
- RES(R126, RES_K(2))
- RES(R127, RES_K(3.9))
- RES(R128, 10)
- RES(R129, RES_M(1))
- RES(R130, RES_K(6.8))
- RES(R131, RES_K(18))
- RES(R132, RES_K(47))
- RES(R133, 390)
- RES(R134, 390)
- RES(R135, RES_K(4.7))
- RES(R136, RES_K(2.7))
- RES(R137, RES_K(4.7))
- RES(R138, RES_K(39))
- RES(R139, RES_K(12))
- RES(R140, RES_K(1))
- RES(R141, RES_K(75))
- RES(R142, RES_K(4.7))
- RES(R143, RES_K(2.7))
- RES(R144, RES_K(4.7))
- RES(R145, RES_K(39))
- RES(R146, RES_K(12))
- RES(R147, RES_K(1))
- RES(R148, RES_K(240))
- RES(R149, RES_K(300))
- RES(R150, RES_K(300))
+ RES(R93, RES_K(2.7))
+ RES(R94, RES_K(4.7))
+ RES(R95, RES_K(39))
+ RES(R96, RES_K(12))
+ RES(R97, RES_K(2.4))
+ RES(R98, RES_K(51))
+ RES(R99, RES_K(330))
+ RES(R100, RES_K(1))
+ RES(R101, RES_M(1))
+ RES(R102, 47)
+ RES(R103, RES_K(4.7))
+ RES(R104, RES_K(1))
+ RES(R105, RES_K(39))
+ RES(R106, RES_K(12))
+ RES(R107, RES_K(1))
+ RES(R108, RES_K(6.8))
+ RES(R109, RES_K(100))
+ RES(R110, RES_K(270))
+ RES(R111, 100)
+ RES(R112, 100)
+ RES(R113, RES_K(4.7))
+ RES(R114, RES_K(1))
+ RES(R115, RES_K(39))
+ RES(R116, RES_K(12))
+ RES(R117, RES_K(2.4))
+ RES(R118, RES_K(51))
+ RES(R119, RES_K(270))
+ RES(R120, RES_M(1))
+ RES(R121, RES_K(10))
+ RES(R122, RES_K(10))
+ RES(R123, RES_K(1))
+ RES(R124, RES_K(2))
+ RES(R125, RES_K(20))
+ RES(R126, RES_K(2))
+ RES(R127, RES_K(3.9))
+ RES(R128, 10)
+ RES(R129, RES_M(1))
+ RES(R130, RES_K(6.8))
+ RES(R131, RES_K(18))
+ RES(R132, RES_K(47))
+ RES(R133, 390)
+ RES(R134, 390)
+ RES(R135, RES_K(4.7))
+ RES(R136, RES_K(2.7))
+ RES(R137, RES_K(4.7))
+ RES(R138, RES_K(39))
+ RES(R139, RES_K(12))
+ RES(R140, RES_K(1))
+ RES(R141, RES_K(75))
+ RES(R142, RES_K(4.7))
+ RES(R143, RES_K(2.7))
+ RES(R144, RES_K(4.7))
+ RES(R145, RES_K(39))
+ RES(R146, RES_K(12))
+ RES(R147, RES_K(1))
+ RES(R148, RES_K(240))
+ RES(R149, RES_K(300))
+ RES(R150, RES_K(300))
// RES(R151, RES_K(15)) -- part of final amp (not emulated)
// RES(R152, 150) -- part of final amp (not emulated)
// RES(R153, 150) -- part of final amp (not emulated)
@@ -231,9 +231,9 @@ NETLIST_START(boxingb)
// RES(R156, 0.51) -- part of final amp (not emulated)
// RES(R157, 0.51) -- part of final amp (not emulated)
// RES(R158, RES_K(390)) -- part of final amp (not emulated)
- RES(R159, RES_K(30))
- RES(R160, RES_K(8.2))
- RES(R161, RES_K(20))
+ RES(R159, RES_K(30))
+ RES(R160, RES_K(8.2))
+ RES(R161, RES_K(20))
// RES(R162, RES_K(10)) -- part of shaft encoder (not emulated)
// RES(R163, RES_K(100)) -- part of shaft encoder (not emulated)
// RES(R164, RES_M(1.8)) -- part of shaft encoder (not emulated)
@@ -249,39 +249,39 @@ NETLIST_START(boxingb)
// RES(R174, RES_K(2.4)) -- part of shaft encoder (not emulated)
// RES(R175, RES_K(1)) -- part of shaft encoder (not emulated)
// RES(R176, RES_K(1)) -- part of shaft encoder (not emulated)
- RES(R177, RES_K(1))
- RES(R178, 330)
- RES(R179, 330)
- RES(R180, RES_K(1))
- RES(R181, RES_K(1))
- RES(R182, RES_K(1))
- RES(R183, RES_K(4.7))
- RES(R184, RES_K(510))
- RES(R185, 470)
- RES(R186, 470)
- RES(R187, RES_K(4.7))
- RES(R188, RES_K(2.7))
- RES(R189, RES_K(4.7))
- RES(R190, RES_K(39))
- RES(R191, RES_K(12))
- RES(R192, RES_K(1))
- RES(R193, RES_K(24))
- RES(R194, RES_K(100))
- RES(R195, RES_K(4.7))
- RES(R196, RES_K(2.7))
- RES(R197, RES_K(4.7))
- RES(R198, RES_K(39))
- RES(R199, RES_K(12))
- RES(R200, RES_K(1))
- RES(R201, RES_K(51))
- RES(R202, RES_K(36))
- RES(R203, RES_K(1))
- RES(R204, RES_K(1))
- RES(R205, RES_K(2))
- RES(R206, RES_K(1))
- RES(R207, RES_K(1))
- RES(R208, RES_K(1))
- RES(R209, RES_K(1))
+ RES(R177, RES_K(1))
+ RES(R178, 330)
+ RES(R179, 330)
+ RES(R180, RES_K(1))
+ RES(R181, RES_K(1))
+ RES(R182, RES_K(1))
+ RES(R183, RES_K(4.7))
+ RES(R184, RES_K(510))
+ RES(R185, 470)
+ RES(R186, 470)
+ RES(R187, RES_K(4.7))
+ RES(R188, RES_K(2.7))
+ RES(R189, RES_K(4.7))
+ RES(R190, RES_K(39))
+ RES(R191, RES_K(12))
+ RES(R192, RES_K(1))
+ RES(R193, RES_K(24))
+ RES(R194, RES_K(100))
+ RES(R195, RES_K(4.7))
+ RES(R196, RES_K(2.7))
+ RES(R197, RES_K(4.7))
+ RES(R198, RES_K(39))
+ RES(R199, RES_K(12))
+ RES(R200, RES_K(1))
+ RES(R201, RES_K(51))
+ RES(R202, RES_K(36))
+ RES(R203, RES_K(1))
+ RES(R204, RES_K(1))
+ RES(R205, RES_K(2))
+ RES(R206, RES_K(1))
+ RES(R207, RES_K(1))
+ RES(R208, RES_K(1))
+ RES(R209, RES_K(1))
// CAP(C1, CAP_U(0.1)) -- part of voltage converter (not emulated)
// CAP(C2, CAP_U(0.1)) -- part of voltage converter (not emulated)
@@ -293,106 +293,106 @@ NETLIST_START(boxingb)
// CAP(C8, CAP_U(0.1)) -- part of voltage converter (not emulated)
// CAP(C9, CAP_U(0.1)) -- part of voltage converter (not emulated)
// CAP(C10, CAP_U(0.1)) -- part of 2.2V voltage converter (not emulated)
- CAP(C11, CAP_U(0.1))
- CAP(C12, CAP_U(0.1))
- CAP(C13, CAP_U(1))
- CAP(C14, CAP_U(2.2))
- CAP(C15, CAP_U(0.001))
- CAP(C16, CAP_U(0.001))
- CAP(C17, CAP_U(0.1))
- CAP(C18, CAP_U(2.2))
- CAP(C19, CAP_U(0.001))
- CAP(C20, CAP_U(0.001))
- CAP(C21, CAP_U(0.1))
- CAP(C22, CAP_U(0.01))
- CAP(C23, CAP_U(0.1))
- CAP(C24, CAP_U(0.68))
- CAP(C25, CAP_U(0.001))
- CAP(C26, CAP_U(0.0022))
- CAP(C27, CAP_U(0.1))
- CAP(C28, CAP_U(0.1))
- CAP(C29, CAP_U(0.1))
- CAP(C30, CAP_U(0.01))
- CAP(C31, CAP_U(4.7))
- CAP(C32, CAP_U(0.001))
- CAP(C33, CAP_U(0.01))
- CAP(C34, CAP_U(0.1))
- CAP(C35, CAP_U(0.1))
- CAP(C36, CAP_U(2.2))
- CAP(C37, CAP_U(0.1))
- CAP(C38, CAP_U(0.01))
- CAP(C39, CAP_U(0.001))
- CAP(C40, CAP_U(0.47))
- CAP(C41, CAP_U(1))
- CAP(C42, CAP_U(0.1))
- CAP(C43, CAP_U(0.47))
- CAP(C44, CAP_U(0.001))
- CAP(C45, CAP_U(0.1))
- CAP(C46, CAP_U(0.1))
- CAP(C47, CAP_U(100))
- CAP(C48, CAP_U(0.1))
- CAP(C49, CAP_U(0.1))
- CAP(C50, CAP_U(0.01))
- CAP(C51, CAP_U(4.7))
- CAP(C52, CAP_U(0.47))
- CAP(C53, CAP_U(0.1))
- CAP(C54, CAP_U(0.1))
+ CAP(C11, CAP_U(0.1))
+ CAP(C12, CAP_U(0.1))
+ CAP(C13, CAP_U(1))
+ CAP(C14, CAP_U(2.2))
+ CAP(C15, CAP_U(0.001))
+ CAP(C16, CAP_U(0.001))
+ CAP(C17, CAP_U(0.1))
+ CAP(C18, CAP_U(2.2))
+ CAP(C19, CAP_U(0.001))
+ CAP(C20, CAP_U(0.001))
+ CAP(C21, CAP_U(0.1))
+ CAP(C22, CAP_U(0.01))
+ CAP(C23, CAP_U(0.1))
+ CAP(C24, CAP_U(0.68))
+ CAP(C25, CAP_U(0.001))
+ CAP(C26, CAP_U(0.0022))
+ CAP(C27, CAP_U(0.1))
+ CAP(C28, CAP_U(0.1))
+ CAP(C29, CAP_U(0.1))
+ CAP(C30, CAP_U(0.01))
+ CAP(C31, CAP_U(4.7))
+ CAP(C32, CAP_U(0.001))
+ CAP(C33, CAP_U(0.01))
+ CAP(C34, CAP_U(0.1))
+ CAP(C35, CAP_U(0.1))
+ CAP(C36, CAP_U(2.2))
+ CAP(C37, CAP_U(0.1))
+ CAP(C38, CAP_U(0.01))
+ CAP(C39, CAP_U(0.001))
+ CAP(C40, CAP_U(0.47))
+ CAP(C41, CAP_U(1))
+ CAP(C42, CAP_U(0.1))
+ CAP(C43, CAP_U(0.47))
+ CAP(C44, CAP_U(0.001))
+ CAP(C45, CAP_U(0.1))
+ CAP(C46, CAP_U(0.1))
+ CAP(C47, CAP_U(100))
+ CAP(C48, CAP_U(0.1))
+ CAP(C49, CAP_U(0.1))
+ CAP(C50, CAP_U(0.01))
+ CAP(C51, CAP_U(4.7))
+ CAP(C52, CAP_U(0.47))
+ CAP(C53, CAP_U(0.1))
+ CAP(C54, CAP_U(0.1))
// CAP(C55, CAP_U(0.68))
// CAP(C56, CAP_U(0.005)) -- part of final amp (not emulated)
// CAP(C57, CAP_P(470)) -- part of final amp (not emulated)
// CAP(C58, CAP_P(470)) -- part of final amp (not emulated)
// CAP(C59, CAP_P(470)) -- part of final amp (not emulated)
- CAP(C60, CAP_U(0.33))
- CAP(C61, CAP_P(330))
+ CAP(C60, CAP_U(0.33))
+ CAP(C61, CAP_P(330))
// CAP(C62, CAP_U(0.1)) -- part of shaft encoder (not emulated)
// CAP(C63, CAP_P(330)) -- part of shaft encoder (not emulated)
// CAP(C64, CAP_P(330)) -- part of shaft encoder (not emulated)
// CAP(C65, CAP_P(330)) -- part of shaft encoder (not emulated)
// CAP(C66, CAP_P(330)) -- part of shaft encoder (not emulated)
- CAP(C67, CAP_U(0.001))
- CAP(C68, CAP_P(680))
- CAP(C69, CAP_U(0.001))
- CAP(C70, CAP_U(0.001))
- CAP(C71, CAP_U(0.68))
- CAP(C72, CAP_U(0.22))
- CAP(C73, CAP_U(0.1))
- CAP(C74, CAP_U(0.1))
- CAP(C75, CAP_U(0.01))
+ CAP(C67, CAP_U(0.001))
+ CAP(C68, CAP_P(680))
+ CAP(C69, CAP_U(0.001))
+ CAP(C70, CAP_U(0.001))
+ CAP(C71, CAP_U(0.68))
+ CAP(C72, CAP_U(0.22))
+ CAP(C73, CAP_U(0.1))
+ CAP(C74, CAP_U(0.1))
+ CAP(C75, CAP_U(0.01))
// Q_2N3904(Q1) // NPN -- part of 2.2V voltage converter (not emulated)
- Q_2N3906(Q2) // PNP
- Q_2N3906(Q3) // PNP
- Q_2N3906(Q4) // PNP
- Q_2N3904(Q5) // NPN
- Q_2N3904(Q6) // NPN
- Q_2N3906(Q7) // PNP
- Q_2N3904(Q8) // NPN
- Q_2N3904(Q9) // NPN
- Q_2N3906(Q10) // PNP
- Q_2N3904(Q11) // NPN
- Q_2N3904(Q12) // NPN
- Q_2N3906(Q13) // PNP
- Q_2N3904(Q14) // NPN
- Q_2N3904(Q15) // NPN
- Q_2N3906(Q16) // PNP
- Q_2N3904(Q17) // NPN
- Q_2N3906(Q18) // PNP
- Q_2N3906(Q19) // PNP
- Q_2N3906(Q20) // PNP
- Q_2N3904(Q21) // NPN
- Q_2N3904(Q22) // NPN
- Q_2N3906(Q23) // PNP
- Q_2N3906(Q24) // PNP
- Q_2N3906(Q25) // PNP
- Q_2N3906(Q26) // PNP
+ Q_2N3906(Q2) // PNP
+ Q_2N3906(Q3) // PNP
+ Q_2N3906(Q4) // PNP
+ Q_2N3904(Q5) // NPN
+ Q_2N3904(Q6) // NPN
+ Q_2N3906(Q7) // PNP
+ Q_2N3904(Q8) // NPN
+ Q_2N3904(Q9) // NPN
+ Q_2N3906(Q10) // PNP
+ Q_2N3904(Q11) // NPN
+ Q_2N3904(Q12) // NPN
+ Q_2N3906(Q13) // PNP
+ Q_2N3904(Q14) // NPN
+ Q_2N3904(Q15) // NPN
+ Q_2N3906(Q16) // PNP
+ Q_2N3904(Q17) // NPN
+ Q_2N3906(Q18) // PNP
+ Q_2N3906(Q19) // PNP
+ Q_2N3906(Q20) // PNP
+ Q_2N3904(Q21) // NPN
+ Q_2N3904(Q22) // NPN
+ Q_2N3906(Q23) // PNP
+ Q_2N3906(Q24) // PNP
+ Q_2N3906(Q25) // PNP
+ Q_2N3906(Q26) // PNP
// Q_2N6292(Q27) // PNP -- part of final amp (not emulated)
// Q_2N6107(Q28) // NPN -- part of final amp (not emulated)
- Q_2N5210(Q29) // NPN
- Q_2N5210(Q30) // NPN
- Q_2N3906(Q31) // PNP
- Q_2N3906(Q32) // PNP
- Q_2N3906(Q33) // PNP
- Q_2N3906(Q34) // PNP
+ Q_2N5210(Q29) // NPN
+ Q_2N5210(Q30) // NPN
+ Q_2N3906(Q31) // PNP
+ Q_2N3906(Q32) // PNP
+ Q_2N3906(Q33) // PNP
+ Q_2N3906(Q34) // PNP
// D_1N4003(D1) -- part of voltage converter (not emulated)
// D_1N4003(D2) -- part of voltage converter (not emulated)
@@ -406,36 +406,36 @@ NETLIST_START(boxingb)
// D_1N5236(D10) -- part of voltage converter (not emulated)
// D_1N914(D11) -- part of voltage converter (not emulated)
// D_1N914(D12) -- part of voltage converter (not emulated)
- D_1N914(D13)
- D_1N914(D14)
- D_1N914(D15)
- D_1N914(D16)
- D_1N914(D17)
- D_1N914(D18)
- D_1N914(D19)
- D_1N914(D20)
- D_1N914(D21)
- D_1N914(D22)
+ D_1N914(D13)
+ D_1N914(D14)
+ D_1N914(D15)
+ D_1N914(D16)
+ D_1N914(D17)
+ D_1N914(D18)
+ D_1N914(D19)
+ D_1N914(D20)
+ D_1N914(D21)
+ D_1N914(D22)
// D_1N4003(D23) -- part of final amp (not emulated)
// D_1N4003(D24) -- part of final amp (not emulated)
- D_1N914(D25)
- D_1N914(D26)
- D_1N914(D27)
- D_1N914(D28)
- D_1N914(D29)
- D_1N914(D30)
+ D_1N914(D25)
+ D_1N914(D26)
+ D_1N914(D27)
+ D_1N914(D28)
+ D_1N914(D29)
+ D_1N914(D30)
#if (!HLE_MUSIC_CLOCK)
- CLOCK(Y1, 20000000)
- NET_C(Y1.GND, GND)
- NET_C(Y1.VCC, I_V5)
+ CLOCK(Y1, 20000000)
+ NET_C(Y1.GND, GND)
+ NET_C(Y1.VCC, I_V5)
#endif
- TTL_74LS393_DIP(U1) // Dual 4-Stage Binary Counter
- NET_C(U1.7, GND)
- NET_C(U1.14, I_V5)
+ TTL_74LS393_DIP(U1) // Dual 4-Stage Binary Counter
+ NET_C(U1.7, GND)
+ NET_C(U1.14, I_V5)
- TTL_74S04_DIP(U2) // Hex Inverting Gates
+ TTL_74S04_DIP(U2) // Hex Inverting Gates
NET_C(U2.7, GND)
NET_C(U2.14, I_V5)
@@ -447,7 +447,7 @@ NETLIST_START(boxingb)
// NET_C(U8.7, GND)
// NET_C(U8.14, I_V5)
- TTL_74LS107_DIP(U9) // DUAL J-K FLIP-FLOPS WITH CLEAR
+ TTL_74LS107_DIP(U9) // DUAL J-K FLIP-FLOPS WITH CLEAR
NET_C(U9.7, GND)
NET_C(U9.14, I_V5)
@@ -455,21 +455,21 @@ NETLIST_START(boxingb)
// NET_C(U10.7, GND)
// NET_C(U10.14, I_V5)
- TTL_74LS164_DIP(U11) // 8-bit Shift Reg.
- NET_C(U11.7, GND)
- NET_C(U11.14, I_V5)
+ TTL_74LS164_DIP(U11) // 8-bit Shift Reg.
+ NET_C(U11.7, GND)
+ NET_C(U11.14, I_V5)
- TTL_74LS86_DIP(U12) // Quad 2-Input XOR Gates
+ TTL_74LS86_DIP(U12) // Quad 2-Input XOR Gates
NET_C(U12.7, GND)
NET_C(U12.14, I_V5)
- TTL_74LS393_DIP(U13) // Dual 4-Stage Binary Counter
- NET_C(U13.7, GND)
- NET_C(U13.14, I_V5)
+ TTL_74LS393_DIP(U13) // Dual 4-Stage Binary Counter
+ NET_C(U13.7, GND)
+ NET_C(U13.14, I_V5)
- TTL_74LS393_DIP(U15) // Dual 4-Stage Binary Counter
- NET_C(U15.7, GND)
- NET_C(U15.14, I_V5)
+ TTL_74LS393_DIP(U15) // Dual 4-Stage Binary Counter
+ NET_C(U15.7, GND)
+ NET_C(U15.14, I_V5)
// TTL_74LS191_DIP(U16) // Presettable 4-bit Binary Up/Down Counter -- part of shaft encoder (not emulated)
// NET_C(U16.8, GND)
@@ -483,59 +483,59 @@ NETLIST_START(boxingb)
// NET_C(U18.8, GND)
// NET_C(U18.16, I_V5)
- LM555_DIP(U19)
+ LM555_DIP(U19)
- TTL_7414_DIP(U20) // Hex Inverter
- NET_C(U20.7, GND)
- NET_C(U20.14, I_V5)
+ TTL_7414_DIP(U20) // Hex Inverter
+ NET_C(U20.7, GND)
+ NET_C(U20.14, I_V5)
- TTL_74LS393_DIP(U21) // Dual 4-Stage Binary Counter
- NET_C(U21.7, GND)
- NET_C(U21.14, I_V5)
+ TTL_74LS393_DIP(U21) // Dual 4-Stage Binary Counter
+ NET_C(U21.7, GND)
+ NET_C(U21.14, I_V5)
- TTL_74LS393_DIP(U22) // Dual 4-Stage Binary Counter
- NET_C(U22.7, GND)
- NET_C(U22.14, I_V5)
+ TTL_74LS393_DIP(U22) // Dual 4-Stage Binary Counter
+ NET_C(U22.7, GND)
+ NET_C(U22.14, I_V5)
- TTL_74S113_DIP(U23) // Dual JK Negative Edge-Trigged Flip Flop
+ TTL_74S113_DIP(U23) // Dual JK Negative Edge-Trigged Flip Flop
NET_C(U23.7, GND)
NET_C(U23.14, I_V5)
- TTL_74LS74_DIP(U24) // Dual D Flip Flop
- NET_C(U24.7, GND)
- NET_C(U24.14, I_V5)
+ TTL_74LS74_DIP(U24) // Dual D Flip Flop
+ NET_C(U24.7, GND)
+ NET_C(U24.14, I_V5)
- TTL_74LS74_DIP(U25) // Dual D Flip Flop
- NET_C(U25.7, GND)
- NET_C(U25.14, I_V5)
+ TTL_74LS74_DIP(U25) // Dual D Flip Flop
+ NET_C(U25.7, GND)
+ NET_C(U25.14, I_V5)
- TTL_74LS393_DIP(U26) // Dual 4-Stage Binary Counter
- NET_C(U26.7, GND)
- NET_C(U26.14, I_V5)
+ TTL_74LS393_DIP(U26) // Dual 4-Stage Binary Counter
+ NET_C(U26.7, GND)
+ NET_C(U26.14, I_V5)
- TTL_74LS163_DIP(U27) // Binary Counter
- NET_C(U27.8, GND)
- NET_C(U27.16, I_V5)
+ TTL_74LS163_DIP(U27) // Binary Counter
+ NET_C(U27.8, GND)
+ NET_C(U27.16, I_V5)
- TTL_74LS163_DIP(U28) // Binary Counter
- NET_C(U28.8, GND)
- NET_C(U28.16, I_V5)
+ TTL_74LS163_DIP(U28) // Binary Counter
+ NET_C(U28.8, GND)
+ NET_C(U28.16, I_V5)
- TTL_74LS74_DIP(U29) // Dual D Flip Flop
- NET_C(U29.7, GND)
- NET_C(U29.14, I_V5)
+ TTL_74LS74_DIP(U29) // Dual D Flip Flop
+ NET_C(U29.7, GND)
+ NET_C(U29.14, I_V5)
- TTL_7414_DIP(U30) // Hex Inverter
- NET_C(U30.7, GND)
- NET_C(U30.14, I_V5)
+ TTL_7414_DIP(U30) // Hex Inverter
+ NET_C(U30.7, GND)
+ NET_C(U30.14, I_V5)
- TTL_74LS04_DIP(U31) // Hex Inverting Gates
+ TTL_74LS04_DIP(U31) // Hex Inverting Gates
NET_C(U31.7, GND)
NET_C(U31.14, I_V5)
- TTL_74LS393_DIP(U32) // Dual 4-Stage Binary Counter
- NET_C(U32.7, GND)
- NET_C(U32.14, I_V5)
+ TTL_74LS393_DIP(U32) // Dual 4-Stage Binary Counter
+ NET_C(U32.7, GND)
+ NET_C(U32.14, I_V5)
TTL_74LS107_DIP(U33) // DUAL J-K FLIP-FLOPS WITH CLEAR
NET_C(U33.7, GND)
@@ -545,331 +545,331 @@ NETLIST_START(boxingb)
NET_C(U34.7, GND)
NET_C(U34.14, I_V5)
- TTL_74LS02_DIP(U35) // Quad 2-input Nor Gate
- NET_C(U35.7, GND)
- NET_C(U35.14, I_V5)
+ TTL_74LS02_DIP(U35) // Quad 2-input Nor Gate
+ NET_C(U35.7, GND)
+ NET_C(U35.14, I_V5)
- TTL_74LS163_DIP(U36) // Binary Counter
- NET_C(U36.8, GND)
- NET_C(U36.16, I_V5)
+ TTL_74LS163_DIP(U36) // Binary Counter
+ NET_C(U36.8, GND)
+ NET_C(U36.16, I_V5)
- TTL_74LS163_DIP(U37) // Binary Counter
- NET_C(U37.8, GND)
- NET_C(U37.16, I_V5)
+ TTL_74LS163_DIP(U37) // Binary Counter
+ NET_C(U37.8, GND)
+ NET_C(U37.16, I_V5)
- TTL_74LS377_DIP(U38) // Octal D Flip Flop
- NET_C(U38.10, GND)
- NET_C(U38.20, I_V5)
+ TTL_74LS377_DIP(U38) // Octal D Flip Flop
+ NET_C(U38.10, GND)
+ NET_C(U38.20, I_V5)
- TTL_74LS164_DIP(U39) // 8-bit Shift Reg.
- NET_C(U39.7, GND)
- NET_C(U39.14, I_V5)
+ TTL_74LS164_DIP(U39) // 8-bit Shift Reg.
+ NET_C(U39.7, GND)
+ NET_C(U39.14, I_V5)
- TTL_7406_DIP(U40) // Hex inverter -- currently using a clone of 7416, no open collector behavior
- NET_C(U40.7, GND)
- NET_C(U40.14, I_V5)
+ TTL_7406_DIP(U40) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ NET_C(U40.7, GND)
+ NET_C(U40.14, I_V5)
- TTL_74LS393_DIP(U41) // Dual 4-Stage Binary Counter
- NET_C(U41.7, GND)
- NET_C(U41.14, I_V5)
+ TTL_74LS393_DIP(U41) // Dual 4-Stage Binary Counter
+ NET_C(U41.7, GND)
+ NET_C(U41.14, I_V5)
- TTL_74LS393_DIP(U42) // Dual 4-Stage Binary Counter
- NET_C(U42.7, GND)
- NET_C(U42.14, I_V5)
+ TTL_74LS393_DIP(U42) // Dual 4-Stage Binary Counter
+ NET_C(U42.7, GND)
+ NET_C(U42.14, I_V5)
- TTL_74LS163_DIP(U43) // Binary Counter
- NET_C(U43.8, GND)
- NET_C(U43.16, I_V5)
+ TTL_74LS163_DIP(U43) // Binary Counter
+ NET_C(U43.8, GND)
+ NET_C(U43.16, I_V5)
- TTL_74LS74_DIP(U44) // Dual D Flip Flop
- NET_C(U44.7, GND)
- NET_C(U44.14, I_V5)
+ TTL_74LS74_DIP(U44) // Dual D Flip Flop
+ NET_C(U44.7, GND)
+ NET_C(U44.14, I_V5)
- TTL_74LS74_DIP(U45) // Dual D Flip Flop
- NET_C(U45.7, GND)
- NET_C(U45.14, I_V5)
+ TTL_74LS74_DIP(U45) // Dual D Flip Flop
+ NET_C(U45.7, GND)
+ NET_C(U45.14, I_V5)
- TTL_74LS163_DIP(U46) // Binary Counter
- NET_C(U46.8, GND)
- NET_C(U46.16, I_V5)
+ TTL_74LS163_DIP(U46) // Binary Counter
+ NET_C(U46.8, GND)
+ NET_C(U46.16, I_V5)
- TTL_74LS377_DIP(U47) // Octal D Flip Flop
- NET_C(U47.10, GND)
- NET_C(U47.20, I_V5)
+ TTL_74LS377_DIP(U47) // Octal D Flip Flop
+ NET_C(U47.10, GND)
+ NET_C(U47.20, I_V5)
- TTL_74LS377_DIP(U48) // Octal D Flip Flop
- NET_C(U48.10, GND)
- NET_C(U48.20, I_V5)
+ TTL_74LS377_DIP(U48) // Octal D Flip Flop
+ NET_C(U48.10, GND)
+ NET_C(U48.20, I_V5)
- TTL_74LS164_DIP(U49) // 8-bit Shift Reg.
- NET_C(U49.7, GND)
- NET_C(U49.14, I_V5)
+ TTL_74LS164_DIP(U49) // 8-bit Shift Reg.
+ NET_C(U49.7, GND)
+ NET_C(U49.14, I_V5)
- TTL_7414_DIP(U50) // Hex Inverter
- NET_C(U50.7, GND)
- NET_C(U50.14, I_V5)
+ TTL_7414_DIP(U50) // Hex Inverter
+ NET_C(U50.7, GND)
+ NET_C(U50.14, I_V5)
#if (!HLE_CHIRPING_VCO)
- LM566_DIP(U51) // 566 VCO
+ LM566_DIP(U51) // 566 VCO
#endif
#if (!HLE_DYING_BUG_VCO)
- LM566_DIP(U52) // 566 VCO
+ LM566_DIP(U52) // 566 VCO
#endif
#if (!HLE_CRACKING_VCO)
- LM566_DIP(U53) // 566 VCO
+ LM566_DIP(U53) // 566 VCO
#endif
- TL081_DIP(U54) // Op. Amp.
- NET_C(U54.7, I_V15)
- NET_C(U54.4, I_VM15)
+ TL081_DIP(U54) // Op. Amp.
+ NET_C(U54.7, I_V15)
+ NET_C(U54.4, I_VM15)
- TL081_DIP(U55) // Op. Amp.
- NET_C(U55.7, I_V15)
- NET_C(U55.4, I_VM15)
+ TL081_DIP(U55) // Op. Amp.
+ NET_C(U55.7, I_V15)
+ NET_C(U55.4, I_VM15)
#if (!HLE_BEETLE_VCO)
- LM566_DIP(U56) // 566 VCO
+ LM566_DIP(U56) // 566 VCO
#endif
#if (!HLE_BOUNCE_VCO)
- LM566_DIP(U57) // 566 VCO
+ LM566_DIP(U57) // 566 VCO
#endif
- LM555_DIP(U58)
+ LM555_DIP(U58)
- CA3080_DIP(U59) // Op. Amp.
- NET_C(U59.4, I_VM15)
- NET_C(U59.7, I_V15)
+ CA3080_DIP(U59) // Op. Amp.
+ NET_C(U59.4, I_VM15)
+ NET_C(U59.7, I_V15)
#if (!HLE_CANNON_VCO)
- LM566_DIP(U60) // 566 VCO
+ LM566_DIP(U60) // 566 VCO
#endif
- CA3080_DIP(U61) // Op. Amp.
- NET_C(U61.4, I_VM15)
- NET_C(U61.7, I_V15)
+ CA3080_DIP(U61) // Op. Amp.
+ NET_C(U61.4, I_VM15)
+ NET_C(U61.7, I_V15)
- AMI_S2688(U62) // Noise generator
+ AMI_S2688(U62) // Noise generator
- TL081_DIP(U63) // Op. Amp.
- NET_C(U63.7, I_V15)
- NET_C(U63.4, I_VM15)
+ TL081_DIP(U63) // Op. Amp.
+ NET_C(U63.7, I_V15)
+ NET_C(U63.4, I_VM15)
- CA3080_DIP(U64) // Op. Amp.
- NET_C(U64.4, I_VM15)
- NET_C(U64.7, I_V15)
+ CA3080_DIP(U64) // Op. Amp.
+ NET_C(U64.4, I_VM15)
+ NET_C(U64.7, I_V15)
-// TL081_DIP(U65) // Op. Amp. -- part of shaft encoder (not emulated)
+// TL081_DIP(U65) // Op. Amp. -- part of shaft encoder (not emulated)
// NET_C(U65.7, I_V15)
// NET_C(U65.4, I_VM15)
-// TL081_DIP(U66) // Op. Amp. -- part of shaft encoder (not emulated)
+// TL081_DIP(U66) // Op. Amp. -- part of shaft encoder (not emulated)
// NET_C(U66.7, I_V15)
// NET_C(U66.4, I_VM15)
- CA3080_DIP(U67) // Op. Amp.
- NET_C(U67.4, I_VM15)
- NET_C(U67.7, I_V15)
+ CA3080_DIP(U67) // Op. Amp.
+ NET_C(U67.4, I_VM15)
+ NET_C(U67.7, I_V15)
-// TTL_7815_DIP(U68) // +15V Regulator -- part of voltage converter (not emulated)
-// TTL_7915_DIP(U69) // -15V Regulator -- part of voltage converter (not emulated)
+// TTL_7815_DIP(U68) // +15V Regulator -- part of voltage converter (not emulated)
+// TTL_7915_DIP(U69) // -15V Regulator -- part of voltage converter (not emulated)
-// TL081_DIP(U70) // Op. Amp. -- part of final amp (not emulated)
+// TL081_DIP(U70) // Op. Amp. -- part of final amp (not emulated)
// NET_C(U70.7, I_V15)
// NET_C(U70.4, I_VM15)
- //
- // Page 1, top right
- //
-
- ALIAS(HIB_P, U27.6)
- NET_C(HIB_P, U27.5, U27.4, U27.1, U27.7)
- NET_C(GND, U27.3)
- ALIAS(BLOAD_M, U27.9)
- ALIAS(BCLK_P, U27.2)
- NET_C(U27.2, U26.1)
- NET_C(U27.10, U28.15)
- NET_C(U27.15, U24.12)
- HINT(U27.11, NC)
- HINT(U27.12, NC)
- HINT(U27.13, NC)
- HINT(U27.14, NC)
-
- NET_C(HIB_P, U28.6, U28.3, U28.1, U28.7, U28.10)
- NET_C(GND, U28.4, U28.5)
- NET_C(BLOAD_M, U28.9)
- ALIAS(ACLK_M, U28.2)
- HINT(U28.11, NC)
- HINT(U28.12, NC)
- HINT(U28.13, NC)
- HINT(U28.14, NC)
-
- ALIAS(HIA_P, U24.10)
- ALIAS(BCLK_M, U24.11)
- NET_C(U24.13, R9.2)
- NET_C(R9.1, I_V5)
- NET_C(U24.9, U34.12)
- NET_C(BLOAD_M, U24.8)
-
- NET_C(HIA_P, U34.1, U34.4, U34.13)
- NET_C(U34.3, R21.1, C11.1)
- ALIAS(_588USEC_P, U34.3)
- NET_C(R21.2, I_V5)
- HINT(U34.2, NC)
-
- NET_C(U26.2, GND)
- NET_C(U26.6, U26.13)
- HINT(U26.5, NC)
- HINT(U26.4, NC)
- HINT(U26.3, NC)
- NET_C(U26.12, GND)
- ALIAS(_327USEC_P, U26.8)
- HINT(U26.9, NC)
- HINT(U26.10, NC)
- NET_C(U26.11, R15.1, C12.2)
- NET_C(R15.2, I_V5)
- NET_C(C12.1, R16.1)
- NET_C(R16.2, R17.1, R18.2, U61.2)
- NET_C(R17.2, C11.2)
- NET_C(R18.1, GND)
-
- NET_C(U61.3, R19.2)
- NET_C(R19.1, GND)
-
- ALIAS(BELL_EN_M, R10.1)
- NET_C(R10.1, R11.1)
- NET_C(R10.2, I_V5)
- NET_C(R11.2, Q2.B)
- NET_C(Q2.E, I_V2_2)
- NET_C(Q2.C, R12.2, R13.2, Q3.E)
- NET_C(R12.1, I_VM15)
- NET_C(R13.1, GND)
- NET_C(Q3.B, R14.2)
- NET_C(R14.1, GND)
- NET_C(Q3.C, C13.1, R20.1)
- NET_C(C13.2, I_VM15)
- NET_C(R20.2, U61.5)
- ALIAS(CS, U61.6)
-
- //
- // Page 1, bottom-right
- //
+ //
+ // Page 1, top right
+ //
+
+ ALIAS(HIB_P, U27.6)
+ NET_C(HIB_P, U27.5, U27.4, U27.1, U27.7)
+ NET_C(GND, U27.3)
+ ALIAS(BLOAD_M, U27.9)
+ ALIAS(BCLK_P, U27.2)
+ NET_C(U27.2, U26.1)
+ NET_C(U27.10, U28.15)
+ NET_C(U27.15, U24.12)
+ HINT(U27.11, NC)
+ HINT(U27.12, NC)
+ HINT(U27.13, NC)
+ HINT(U27.14, NC)
+
+ NET_C(HIB_P, U28.6, U28.3, U28.1, U28.7, U28.10)
+ NET_C(GND, U28.4, U28.5)
+ NET_C(BLOAD_M, U28.9)
+ ALIAS(ACLK_M, U28.2)
+ HINT(U28.11, NC)
+ HINT(U28.12, NC)
+ HINT(U28.13, NC)
+ HINT(U28.14, NC)
+
+ ALIAS(HIA_P, U24.10)
+ ALIAS(BCLK_M, U24.11)
+ NET_C(U24.13, R9.2)
+ NET_C(R9.1, I_V5)
+ NET_C(U24.9, U34.12)
+ NET_C(BLOAD_M, U24.8)
+
+ NET_C(HIA_P, U34.1, U34.4, U34.13)
+ NET_C(U34.3, R21.1, C11.1)
+ ALIAS(_588USEC_P, U34.3)
+ NET_C(R21.2, I_V5)
+ HINT(U34.2, NC)
+
+ NET_C(U26.2, GND)
+ NET_C(U26.6, U26.13)
+ HINT(U26.5, NC)
+ HINT(U26.4, NC)
+ HINT(U26.3, NC)
+ NET_C(U26.12, GND)
+ ALIAS(_327USEC_P, U26.8)
+ HINT(U26.9, NC)
+ HINT(U26.10, NC)
+ NET_C(U26.11, R15.1, C12.2)
+ NET_C(R15.2, I_V5)
+ NET_C(C12.1, R16.1)
+ NET_C(R16.2, R17.1, R18.2, U61.2)
+ NET_C(R17.2, C11.2)
+ NET_C(R18.1, GND)
+
+ NET_C(U61.3, R19.2)
+ NET_C(R19.1, GND)
+
+ ALIAS(BELL_EN_M, R10.1)
+ NET_C(R10.1, R11.1)
+ NET_C(R10.2, I_V5)
+ NET_C(R11.2, Q2.B)
+ NET_C(Q2.E, I_V2_2)
+ NET_C(Q2.C, R12.2, R13.2, Q3.E)
+ NET_C(R12.1, I_VM15)
+ NET_C(R13.1, GND)
+ NET_C(Q3.B, R14.2)
+ NET_C(R14.1, GND)
+ NET_C(Q3.C, C13.1, R20.1)
+ NET_C(C13.2, I_VM15)
+ NET_C(R20.2, U61.5)
+ ALIAS(CS, U61.6)
+
+ //
+ // Page 1, bottom-right
+ //
#if (HLE_SFX_CLOCK)
- //
- // A 20MHz crystal (Y1) is divided by 4 by a pair of
- // JK flip flops (U23) to 5MHz. This is fed to a
- // 74LS393 counter (U13) and the divide-by-16 output
- // is divided again by a JK flip flop (U9) into a
- // 156250Hz counter. Skip the work of dividing this
- // manually and just create a clock directly.
- //
- CLOCK(SFXCLOCK, 156250)
- NET_C(SFXCLOCK.GND, GND)
- NET_C(SFXCLOCK.VCC, I_V5)
- NET_C(SFXCLOCK.Q, U29.3, U2.5)
- NET_C(U2.6, U29.11)
- NET_C(GND, U13.12, U13.13)
- NET_C(GND, U9.9, U9.10, U9.11)
+ //
+ // A 20MHz crystal (Y1) is divided by 4 by a pair of
+ // JK flip flops (U23) to 5MHz. This is fed to a
+ // 74LS393 counter (U13) and the divide-by-16 output
+ // is divided again by a JK flip flop (U9) into a
+ // 156250Hz counter. Skip the work of dividing this
+ // manually and just create a clock directly.
+ //
+ CLOCK(SFXCLOCK, 156250)
+ NET_C(SFXCLOCK.GND, GND)
+ NET_C(SFXCLOCK.VCC, I_V5)
+ NET_C(SFXCLOCK.Q, U29.3, U2.5)
+ NET_C(U2.6, U29.11)
+ NET_C(GND, U13.12, U13.13)
+ NET_C(GND, U9.9, U9.10, U9.11)
#else
- NET_C(U25.5, GND) // unused inverter borrowed
- HINT(U2.6, NC) // for HLE SFX clock
-
- ALIAS(_5MHZ_M, U13.13)
- NET_C(U13.12, GND)
- NET_C(U13.8, U9.9)
- HINT(U13.9, NC)
- HINT(U13.10, NC)
- HINT(U13.11, NC)
-
- NET_C(U9.8, U9.10, U9.11)
- NET_C(U9.5, U29.3)
- NET_C(U9.6, U29.11)
+ NET_C(U25.5, GND) // unused inverter borrowed
+ HINT(U2.6, NC) // for HLE SFX clock
+
+ ALIAS(_5MHZ_M, U13.13)
+ NET_C(U13.12, GND)
+ NET_C(U13.8, U9.9)
+ HINT(U13.9, NC)
+ HINT(U13.10, NC)
+ HINT(U13.11, NC)
+
+ NET_C(U9.8, U9.10, U9.11)
+ NET_C(U9.5, U29.3)
+ NET_C(U9.6, U29.11)
#endif
- ALIAS(HID_P, U9.8)
-
- NET_C(U29.2, BCLK_M)
- NET_C(HIB_P, U29.4, U29.1)
- NET_C(U29.5, U29.12)
- ALIAS(ACLK_P, U29.5)
- NET_C(ACLK_M, U29.6)
-
- NET_C(HIB_P, U29.10, U29.13)
- NET_C(BCLK_P, U29.9)
- NET_C(BCLK_M, U29.8)
-
- //
- // Page 2, top (noise generator)
- //
-
- NET_C(_588USEC_P, U1.1)
- NET_C(U1.2, GND)
- NET_C(U1.6, U1.13)
- HINT(U1.5, NC)
- HINT(U1.4, NC)
- HINT(U1.3, NC)
- NET_C(U1.12, GND)
- HINT(U1.8, NC)
- HINT(U1.9, NC)
- NET_C(U1.10, U11.8, U32.1)
- HINT(U1.11, NC)
-
- NET_C(U11.9, U35.1)
- NET_C(U11.1, U11.2, U12.8)
- NET_C(U11.13, U12.1)
- ALIAS(RANDOM_NOISE_P, U11.13)
- HINT(U11.12, NC)
- HINT(U11.11, NC)
- HINT(U11.10, NC)
- NET_C(U11.6, U12.2)
- NET_C(U11.5, U12.5)
- NET_C(U11.4, U12.4)
- HINT(U11.3, NC)
-
- NET_C(U12.3, U12.13)
- NET_C(U12.6, U12.12)
- NET_C(U12.11, U32.2, U12.9)
- NET_C(U12.10, HID_P)
- ALIAS(IN_M, U12.8)
-
- NET_C(U32.6, U35.2, U35.3)
- HINT(U32.5, NC)
- HINT(U32.4, NC)
- HINT(U32.3, NC)
- ALIAS(ERRCLR_M, U35.1)
-
- //
- // Page 2, middle (Chirping Birds)
- //
-
- NET_C(RANDOM_NOISE_P, U31.5)
- NET_C(U31.6, R22.1, R23.1)
- NET_C(R22.2, I_V5, R24.2, Q4.E)
- NET_C(R23.2, R24.1, Q4.B)
- NET_C(Q4.C, R25.2, R26.2, R27.1)
- NET_C(R25.1, I_VM15)
- NET_C(R26.1, GND)
- NET_C(R27.2, Q5.B)
- NET_C(Q5.E, GND)
- NET_C(Q5.C, R29.1)
- NET_C(R29.2, R28.1, C14.1, R30.2, C15.2)
- NET_C(R28.2, I_V15)
- NET_C(C14.2, GND)
- NET_C(R30.1, GND)
- NET_C(C15.1, R31.1)
- NET_C(R31.2, I_V15)
+ ALIAS(HID_P, U9.8)
+
+ NET_C(U29.2, BCLK_M)
+ NET_C(HIB_P, U29.4, U29.1)
+ NET_C(U29.5, U29.12)
+ ALIAS(ACLK_P, U29.5)
+ NET_C(ACLK_M, U29.6)
+
+ NET_C(HIB_P, U29.10, U29.13)
+ NET_C(BCLK_P, U29.9)
+ NET_C(BCLK_M, U29.8)
+
+ //
+ // Page 2, top (noise generator)
+ //
+
+ NET_C(_588USEC_P, U1.1)
+ NET_C(U1.2, GND)
+ NET_C(U1.6, U1.13)
+ HINT(U1.5, NC)
+ HINT(U1.4, NC)
+ HINT(U1.3, NC)
+ NET_C(U1.12, GND)
+ HINT(U1.8, NC)
+ HINT(U1.9, NC)
+ NET_C(U1.10, U11.8, U32.1)
+ HINT(U1.11, NC)
+
+ NET_C(U11.9, U35.1)
+ NET_C(U11.1, U11.2, U12.8)
+ NET_C(U11.13, U12.1)
+ ALIAS(RANDOM_NOISE_P, U11.13)
+ HINT(U11.12, NC)
+ HINT(U11.11, NC)
+ HINT(U11.10, NC)
+ NET_C(U11.6, U12.2)
+ NET_C(U11.5, U12.5)
+ NET_C(U11.4, U12.4)
+ HINT(U11.3, NC)
+
+ NET_C(U12.3, U12.13)
+ NET_C(U12.6, U12.12)
+ NET_C(U12.11, U32.2, U12.9)
+ NET_C(U12.10, HID_P)
+ ALIAS(IN_M, U12.8)
+
+ NET_C(U32.6, U35.2, U35.3)
+ HINT(U32.5, NC)
+ HINT(U32.4, NC)
+ HINT(U32.3, NC)
+ ALIAS(ERRCLR_M, U35.1)
+
+ //
+ // Page 2, middle (Chirping Birds)
+ //
+
+ NET_C(RANDOM_NOISE_P, U31.5)
+ NET_C(U31.6, R22.1, R23.1)
+ NET_C(R22.2, I_V5, R24.2, Q4.E)
+ NET_C(R23.2, R24.1, Q4.B)
+ NET_C(Q4.C, R25.2, R26.2, R27.1)
+ NET_C(R25.1, I_VM15)
+ NET_C(R26.1, GND)
+ NET_C(R27.2, Q5.B)
+ NET_C(Q5.E, GND)
+ NET_C(Q5.C, R29.1)
+ NET_C(R29.2, R28.1, C14.1, R30.2, C15.2)
+ NET_C(R28.2, I_V15)
+ NET_C(C14.2, GND)
+ NET_C(R30.1, GND)
+ NET_C(C15.1, R31.1)
+ NET_C(R31.2, I_V15)
#if (HLE_CHIRPING_VCO)
- //
- // Standard mapping:
- // R2 = 0.91650: HP = (0.0000123028*A0) - 0.000136645
- // R2 = 0.98600: HP = (0.00000750231*A0*A0) - (0.000183288*A0) + 0.00113698
- // R2 = 0.99008: HP = (0.00000414207*A0*A0*A0) - (0.000154885*A0*A0) + (0.00193729*A0) - 0.0080873
- // R2 = 0.98800: HP = (0.00000603082*A0*A0*A0*A0) - (0.000311647*A0*A0*A0) + (0.00604258*A0*A0) - (0.0520898*A0) + 0.168437
- // R2 = 0.98586: HP = (0.000000081416*A0*A0*A0*A0*A0) - (0.00000284650*A0*A0*A0*A0) + (0.0000136226*A0*A0*A0) + (0.000571759*A0*A0) - (0.0083734*A0) + 0.0333905
- //
+ //
+ // Standard mapping:
+ // R2 = 0.91650: HP = (0.0000123028*A0) - 0.000136645
+ // R2 = 0.98600: HP = (0.00000750231*A0*A0) - (0.000183288*A0) + 0.00113698
+ // R2 = 0.99008: HP = (0.00000414207*A0*A0*A0) - (0.000154885*A0*A0) + (0.00193729*A0) - 0.0080873
+ // R2 = 0.98800: HP = (0.00000603082*A0*A0*A0*A0) - (0.000311647*A0*A0*A0) + (0.00604258*A0*A0) - (0.0520898*A0) + 0.168437
+ // R2 = 0.98586: HP = (0.000000081416*A0*A0*A0*A0*A0) - (0.00000284650*A0*A0*A0*A0) + (0.0000136226*A0*A0*A0) + (0.000571759*A0*A0) - (0.0083734*A0) + 0.0333905
+ //
VARCLOCK(CHIRPCLK, 1, "max(0.000001,min(0.1,(0.000000081416*A0*A0*A0*A0*A0) - (0.00000284650*A0*A0*A0*A0) + (0.0000136226*A0*A0*A0) + (0.000571759*A0*A0) - (0.0083734*A0) + 0.0333905))")
NET_C(CHIRPCLK.GND, GND)
NET_C(CHIRPCLK.VCC, I_V5)
@@ -877,70 +877,70 @@ NETLIST_START(boxingb)
NET_C(CHIRPCLK.Q, U41.1)
NET_C(GND, R32.1, R32.2, R33.1, R33.2, R205.1, R205.2, C16.1, C16.2, C17.1, C17.2, D13.A, D13.K, D14.A, D14.K)
#else
- NET_C(R29.2, U51.5)
- NET_C(C15.1, U51.6)
- NET_C(R31.2, U51.8)
- NET_C(U51.7, C16.1)
- NET_C(C16.2, GND)
- NET_C(U51.1, GND)
- HINT(U51.4, NC)
- NET_C(U51.3, C17.2)
- NET_C(C17.1, D13.K, R32.1)
- NET_C(D13.A, GND)
- NET_C(R32.2, Q6.B)
- NET_C(Q6.E, R205.2, D14.K)
- NET_C(R205.1, I_VM15)
- NET_C(D14.A, GND)
- NET_C(Q6.C, R33.1, U41.1)
- NET_C(R33.2, I_V5)
+ NET_C(R29.2, U51.5)
+ NET_C(C15.1, U51.6)
+ NET_C(R31.2, U51.8)
+ NET_C(U51.7, C16.1)
+ NET_C(C16.2, GND)
+ NET_C(U51.1, GND)
+ HINT(U51.4, NC)
+ NET_C(U51.3, C17.2)
+ NET_C(C17.1, D13.K, R32.1)
+ NET_C(D13.A, GND)
+ NET_C(R32.2, Q6.B)
+ NET_C(Q6.E, R205.2, D14.K)
+ NET_C(R205.1, I_VM15)
+ NET_C(D14.A, GND)
+ NET_C(Q6.C, R33.1, U41.1)
+ NET_C(R33.2, I_V5)
#endif
- NET_C(U41.2, RANDOM_NOISE_P)
- HINT(U41.6, NC)
- HINT(U41.5, NC)
- HINT(U41.4, NC)
- NET_C(U41.3, U41.13)
-
- ALIAS(CHIRPING_BIRDS_M, U41.12)
- HINT(U41.8, NC)
- HINT(U41.9, NC)
- NET_C(U41.10, R47.1, R48.1)
- HINT(U41.11, NC)
- NET_C(R47.2, I_V5)
- NET_C(R48.2, R49.2, C22.2)
- NET_C(R49.1, GND)
- ALIAS(SJ, C22.1)
-
- //
- // Page 2, bottom (Dying Bug)
- //
-
- ALIAS(BUG_DYING_M, U31.3)
- NET_C(U31.4, R34.1, R35.1)
- NET_C(R34.2, I_V5, R36.2, Q7.E)
- NET_C(R35.2, R36.1, Q7.B)
- NET_C(Q7.C, R37.2, R38.2, R39.1)
- NET_C(R37.1, I_VM15)
- NET_C(R38.1, GND)
- NET_C(R39.2, Q8.B)
- NET_C(Q8.E, GND)
- NET_C(Q8.C, R41.1)
- NET_C(R41.2, R40.1, C18.1, R42.2, C19.2)
- NET_C(R40.2, I_V15)
- NET_C(C18.2, GND)
- NET_C(R42.1, GND)
- NET_C(R43.2, I_V15)
- NET_C(C19.1, R43.1)
+ NET_C(U41.2, RANDOM_NOISE_P)
+ HINT(U41.6, NC)
+ HINT(U41.5, NC)
+ HINT(U41.4, NC)
+ NET_C(U41.3, U41.13)
+
+ ALIAS(CHIRPING_BIRDS_M, U41.12)
+ HINT(U41.8, NC)
+ HINT(U41.9, NC)
+ NET_C(U41.10, R47.1, R48.1)
+ HINT(U41.11, NC)
+ NET_C(R47.2, I_V5)
+ NET_C(R48.2, R49.2, C22.2)
+ NET_C(R49.1, GND)
+ ALIAS(SJ, C22.1)
+
+ //
+ // Page 2, bottom (Dying Bug)
+ //
+
+ ALIAS(BUG_DYING_M, U31.3)
+ NET_C(U31.4, R34.1, R35.1)
+ NET_C(R34.2, I_V5, R36.2, Q7.E)
+ NET_C(R35.2, R36.1, Q7.B)
+ NET_C(Q7.C, R37.2, R38.2, R39.1)
+ NET_C(R37.1, I_VM15)
+ NET_C(R38.1, GND)
+ NET_C(R39.2, Q8.B)
+ NET_C(Q8.E, GND)
+ NET_C(Q8.C, R41.1)
+ NET_C(R41.2, R40.1, C18.1, R42.2, C19.2)
+ NET_C(R40.2, I_V15)
+ NET_C(C18.2, GND)
+ NET_C(R42.1, GND)
+ NET_C(R43.2, I_V15)
+ NET_C(C19.1, R43.1)
#if (HLE_DYING_BUG_VCO)
- //
- // Standard mapping:
- // R2 = 0.94234: HP = (0.0000126953*A0) - 0.000142795
- // R2 = 0.99216: HP = (0.0000085544*A0*A0) - (0.000211995*A0) + 0.00132411
- // R2 = 0.99610: HP = (0.00000512381*A0*A0*A0) - (0.000194224*A0*A0) + (0.00245729*A0) - 0.0103626
- // R2 = 0.99646: HP = (0.00000347185*A0*A0*A0*A0) - (0.000178231*A0*A0*A0) + (0.00343236*A0*A0) - (0.0293814*A0) + 0.094321
- // R2 = 0.99644: HP = (0.000000064673*A0*A0*A0*A0*A0) - (0.00000153002*A0*A0*A0*A0) - (0.0000269128*A0*A0*A0) + (0.00118283*A0*A0) - (0.0128917*A0) + 0.0465240
- //
+ //
+ // Standard mapping:
+ // R2 = 0.94234: HP = (0.0000126953*A0) - 0.000142795
+ // R2 = 0.99216: HP = (0.0000085544*A0*A0) - (0.000211995*A0) + 0.00132411
+ // R2 = 0.99610: HP = (0.00000512381*A0*A0*A0) - (0.000194224*A0*A0) + (0.00245729*A0) - 0.0103626
+ // R2 = 0.99646: HP = (0.00000347185*A0*A0*A0*A0) - (0.000178231*A0*A0*A0) + (0.00343236*A0*A0) - (0.0293814*A0) + 0.094321
+ // R2 = 0.99644: HP = (0.000000064673*A0*A0*A0*A0*A0) - (0.00000153002*A0*A0*A0*A0) - (0.0000269128*A0*A0*A0) + (0.00118283*A0*A0) - (0.0128917*A0) + 0.0465240
+ //
VARCLOCK(DYINGCLK, 1, "max(0.000001,min(0.1,(0.000000064673*A0*A0*A0*A0*A0) - (0.00000153002*A0*A0*A0*A0) - (0.0000269128*A0*A0*A0) + (0.00118283*A0*A0) - (0.0128917*A0) + 0.0465240))")
NET_C(DYINGCLK.GND, GND)
NET_C(DYINGCLK.VCC, I_V5)
@@ -948,75 +948,75 @@ NETLIST_START(boxingb)
NET_C(DYINGCLK.Q, U42.1)
NET_C(GND, R44.1, R44.2, R45.1, R45.2, R46.1, R46.2, C20.1, C20.2, C21.1, C21.2, D15.A, D15.K, D16.A, D16.K)
#else
- NET_C(C19.2, U52.5)
- NET_C(C19.1, U52.6)
- NET_C(R43.2, U52.8)
- NET_C(U52.7, C20.1)
- NET_C(C20.2, GND)
- NET_C(U52.1, GND)
- HINT(U52.4, NC)
- NET_C(U52.3, C21.2)
- NET_C(C21.1, D15.K, R44.1)
- NET_C(D15.A, GND)
- NET_C(R44.2, Q9.B)
- NET_C(Q9.E, R46.2, D16.K)
- NET_C(R46.1, I_VM15)
- NET_C(D16.A, GND)
- NET_C(Q9.C, R45.1, U42.1)
- NET_C(R45.2, I_V5)
+ NET_C(C19.2, U52.5)
+ NET_C(C19.1, U52.6)
+ NET_C(R43.2, U52.8)
+ NET_C(U52.7, C20.1)
+ NET_C(C20.2, GND)
+ NET_C(U52.1, GND)
+ HINT(U52.4, NC)
+ NET_C(U52.3, C21.2)
+ NET_C(C21.1, D15.K, R44.1)
+ NET_C(D15.A, GND)
+ NET_C(R44.2, Q9.B)
+ NET_C(Q9.E, R46.2, D16.K)
+ NET_C(R46.1, I_VM15)
+ NET_C(D16.A, GND)
+ NET_C(Q9.C, R45.1, U42.1)
+ NET_C(R45.2, I_V5)
#endif
- NET_C(_327USEC_P, U32.13)
- NET_C(U32.12, GND)
- ALIAS(_5232USEC_P, U32.8)
- ALIAS(_2616USEC_P, U32.9)
- NET_C(U32.9, U42.2)
- HINT(U32.10, NC)
- HINT(U32.11, NC)
-
- HINT(U42.6, NC)
- HINT(U42.5, NC)
- HINT(U42.4, NC)
- NET_C(U42.3, U42.13)
- NET_C(U42.12, BUG_DYING_M)
- NET_C(U42.8, R51.1)
- NET_C(U42.9, R52.1)
- NET_C(U42.10, R53.1)
- HINT(U42.11, NC)
- NET_C(R54.2, R53.2, R52.2, R51.2, R50.1)
- NET_C(R54.1, GND)
- NET_C(R50.2, C23.2)
- NET_C(C23.1, SJ)
-
- //
- // Page 3, top (Egg Cracking)
- //
-
- ALIAS(EGG_CRACKING_M, U31.13)
- NET_C(U31.12, R55.1, R56.1)
- NET_C(R55.2, I_V5, R57.2, Q10.E)
- NET_C(R56.2, R57.1, Q10.B)
- NET_C(Q10.C, R58.2, R59.2, R60.1)
- NET_C(R58.1, I_VM15)
- NET_C(R59.1, GND)
- NET_C(Q11.E, GND)
- NET_C(R60.2, Q11.B)
- NET_C(Q11.C, R62.1)
- NET_C(R62.2, R61.1, C24.1, R63.2, C25.2)
- NET_C(C24.2, GND)
- NET_C(R63.1, GND)
- NET_C(R61.2, R64.2, I_V15)
- NET_C(C25.1, R64.1)
+ NET_C(_327USEC_P, U32.13)
+ NET_C(U32.12, GND)
+ ALIAS(_5232USEC_P, U32.8)
+ ALIAS(_2616USEC_P, U32.9)
+ NET_C(U32.9, U42.2)
+ HINT(U32.10, NC)
+ HINT(U32.11, NC)
+
+ HINT(U42.6, NC)
+ HINT(U42.5, NC)
+ HINT(U42.4, NC)
+ NET_C(U42.3, U42.13)
+ NET_C(U42.12, BUG_DYING_M)
+ NET_C(U42.8, R51.1)
+ NET_C(U42.9, R52.1)
+ NET_C(U42.10, R53.1)
+ HINT(U42.11, NC)
+ NET_C(R54.2, R53.2, R52.2, R51.2, R50.1)
+ NET_C(R54.1, GND)
+ NET_C(R50.2, C23.2)
+ NET_C(C23.1, SJ)
+
+ //
+ // Page 3, top (Egg Cracking)
+ //
+
+ ALIAS(EGG_CRACKING_M, U31.13)
+ NET_C(U31.12, R55.1, R56.1)
+ NET_C(R55.2, I_V5, R57.2, Q10.E)
+ NET_C(R56.2, R57.1, Q10.B)
+ NET_C(Q10.C, R58.2, R59.2, R60.1)
+ NET_C(R58.1, I_VM15)
+ NET_C(R59.1, GND)
+ NET_C(Q11.E, GND)
+ NET_C(R60.2, Q11.B)
+ NET_C(Q11.C, R62.1)
+ NET_C(R62.2, R61.1, C24.1, R63.2, C25.2)
+ NET_C(C24.2, GND)
+ NET_C(R63.1, GND)
+ NET_C(R61.2, R64.2, I_V15)
+ NET_C(C25.1, R64.1)
#if (HLE_CRACKING_VCO)
- //
- // Standard mapping:
- // R2 = 0.89585: HP = (0.0000175988*A0) - 0.000207278
- // R2 = 0.98810: HP = (0.0000104596*A0*A0) - (0.000261248*A0) + 0.00164623
- // R2 = 0.99788: HP = (0.00000629669*A0*A0*A0) - (0.000240194*A0*A0) + (0.00305980*A0) - 0.0129994
- // R2 = 0.99873: HP = (0.00000350292*A0*A0*A0*A0) - (0.000179267*A0*A0*A0) + (0.00344234*A0*A0) - (0.0293869*A0) + 0.094097
- // R2 = 0.99653: HP = (0.000000075716*A0*A0*A0*A0*A0) - (0.00000154725*A0*A0*A0*A0) - (0.0000446414*A0*A0*A0) + (0.00164941*A0*A0) - (0.0174578*A0) + 0.0623765
- //
+ //
+ // Standard mapping:
+ // R2 = 0.89585: HP = (0.0000175988*A0) - 0.000207278
+ // R2 = 0.98810: HP = (0.0000104596*A0*A0) - (0.000261248*A0) + 0.00164623
+ // R2 = 0.99788: HP = (0.00000629669*A0*A0*A0) - (0.000240194*A0*A0) + (0.00305980*A0) - 0.0129994
+ // R2 = 0.99873: HP = (0.00000350292*A0*A0*A0*A0) - (0.000179267*A0*A0*A0) + (0.00344234*A0*A0) - (0.0293869*A0) + 0.094097
+ // R2 = 0.99653: HP = (0.000000075716*A0*A0*A0*A0*A0) - (0.00000154725*A0*A0*A0*A0) - (0.0000446414*A0*A0*A0) + (0.00164941*A0*A0) - (0.0174578*A0) + 0.0623765
+ //
VARCLOCK(CRACKINGCLK, 1, "max(0.000001,min(0.1,(0.000000064673*A0*A0*A0*A0*A0) - (0.00000153002*A0*A0*A0*A0) - (0.0000269128*A0*A0*A0) + (0.00118283*A0*A0) - (0.0128917*A0) + 0.0465240))")
NET_C(CRACKINGCLK.GND, GND)
NET_C(CRACKINGCLK.VCC, I_V5)
@@ -1024,74 +1024,74 @@ NETLIST_START(boxingb)
NET_C(CRACKINGCLK.Q, U22.13)
NET_C(GND, R65.1, R65.2, R66.1, R66.2, R67.1, R67.2, C26.1, C26.2, C27.1, C27.2, D17.A, D17.K, D18.A, D18.K)
#else
- NET_C(R61.2, U53.8)
- NET_C(C25.1, U53.6)
- NET_C(R62.2, U53.5)
- NET_C(U53.7, C26.1)
- NET_C(C26.2, GND)
- NET_C(U53.1, GND)
- HINT(U53.4, NC)
- NET_C(U53.3, C27.2)
- NET_C(C27.1, D17.K, R65.1)
- NET_C(D17.A, GND)
- NET_C(R65.2, Q12.B)
- NET_C(Q12.E, R67.2, D18.K)
- NET_C(R67.1, I_VM15)
- NET_C(D18.A, GND)
- NET_C(Q12.C, R66.1, U22.13)
- NET_C(R66.2, I_V5)
+ NET_C(R61.2, U53.8)
+ NET_C(C25.1, U53.6)
+ NET_C(R62.2, U53.5)
+ NET_C(U53.7, C26.1)
+ NET_C(C26.2, GND)
+ NET_C(U53.1, GND)
+ HINT(U53.4, NC)
+ NET_C(U53.3, C27.2)
+ NET_C(C27.1, D17.K, R65.1)
+ NET_C(D17.A, GND)
+ NET_C(R65.2, Q12.B)
+ NET_C(Q12.E, R67.2, D18.K)
+ NET_C(R67.1, I_VM15)
+ NET_C(D18.A, GND)
+ NET_C(Q12.C, R66.1, U22.13)
+ NET_C(R66.2, I_V5)
#endif
- NET_C(EGG_CRACKING_M, U22.12)
- NET_C(U22.8, R68.1)
- NET_C(U22.9, R69.1)
- NET_C(U22.10, R70.1)
- HINT(U22.11, NC)
- NET_C(R68.2, R69.2, R70.2, R71.2, R72.1)
- NET_C(R71.1, GND)
- NET_C(R72.2, C28.2)
- NET_C(C28.1, SJ)
-
- //
- // Page 3, middle (Beetle on screen)
- //
-
- ALIAS(BEETLE_ON_SCREEN_M, U31.1)
- NET_C(U31.2, U19.4)
- NET_C(U19.8, R73.2, I_V5)
- NET_C(R73.1, U19.7, R74.2)
- NET_C(R74.1, U19.6, U19.2, C29.1)
- NET_C(C29.2, GND)
- NET_C(U19.1, GND)
- NET_C(U19.5, C30.1)
- NET_C(C30.2, GND)
- NET_C(U19.3, R75.2, U20.1)
- NET_C(R75.1, GND)
-
- NET_C(U20.2, R77.1, R76.1)
- NET_C(R76.2, I_V5, R78.2, Q13.E)
- NET_C(R77.2, R78.1, Q13.B)
- NET_C(Q13.C, R79.2, R80.2, R81.1)
- NET_C(R79.1, I_VM15)
- NET_C(R80.1, GND)
- NET_C(R81.2, Q14.B)
- NET_C(Q14.E, GND)
- NET_C(Q14.C, R83.1)
- NET_C(R83.2, R82.1, C31.1, R84.2, C32.2)
- NET_C(C31.2, GND)
- NET_C(R84.1, GND)
- NET_C(R82.2, I_V15, R85.2)
- NET_C(R85.1, C32.1)
+ NET_C(EGG_CRACKING_M, U22.12)
+ NET_C(U22.8, R68.1)
+ NET_C(U22.9, R69.1)
+ NET_C(U22.10, R70.1)
+ HINT(U22.11, NC)
+ NET_C(R68.2, R69.2, R70.2, R71.2, R72.1)
+ NET_C(R71.1, GND)
+ NET_C(R72.2, C28.2)
+ NET_C(C28.1, SJ)
+
+ //
+ // Page 3, middle (Beetle on screen)
+ //
+
+ ALIAS(BEETLE_ON_SCREEN_M, U31.1)
+ NET_C(U31.2, U19.4)
+ NET_C(U19.8, R73.2, I_V5)
+ NET_C(R73.1, U19.7, R74.2)
+ NET_C(R74.1, U19.6, U19.2, C29.1)
+ NET_C(C29.2, GND)
+ NET_C(U19.1, GND)
+ NET_C(U19.5, C30.1)
+ NET_C(C30.2, GND)
+ NET_C(U19.3, R75.2, U20.1)
+ NET_C(R75.1, GND)
+
+ NET_C(U20.2, R77.1, R76.1)
+ NET_C(R76.2, I_V5, R78.2, Q13.E)
+ NET_C(R77.2, R78.1, Q13.B)
+ NET_C(Q13.C, R79.2, R80.2, R81.1)
+ NET_C(R79.1, I_VM15)
+ NET_C(R80.1, GND)
+ NET_C(R81.2, Q14.B)
+ NET_C(Q14.E, GND)
+ NET_C(Q14.C, R83.1)
+ NET_C(R83.2, R82.1, C31.1, R84.2, C32.2)
+ NET_C(C31.2, GND)
+ NET_C(R84.1, GND)
+ NET_C(R82.2, I_V15, R85.2)
+ NET_C(R85.1, C32.1)
#if (HLE_BEETLE_VCO)
- //
- // Standard mapping:
- // R2 = 0.92906: HP = (0.000127227*A0) - 0.00149583
- // R2 = 0.97372: HP = (0.000086592*A0*A0) - (0.00218553*A0) + 0.0139420
- // R2 = 0.97589: HP = (0.000063925*A0*A0*A0) - (0.00248748*A0*A0) + (0.0323532*A0) - 0.140489
- // R2 = 0.97153: HP = (-0.00000615887*A0*A0*A0*A0) + (0.000395273*A0*A0*A0) - (0.0091707*A0*A0) + (0.092250*A0) - 0.341743
- // R2 = 0.96812: HP = (0.00000145563*A0*A0*A0*A0*A0) - (0.0000505655*A0*A0*A0*A0) + (0.000151855*A0*A0*A0) + (0.0134189*A0*A0) - (0.189302*A0) + 0.763397
- //
+ //
+ // Standard mapping:
+ // R2 = 0.92906: HP = (0.000127227*A0) - 0.00149583
+ // R2 = 0.97372: HP = (0.000086592*A0*A0) - (0.00218553*A0) + 0.0139420
+ // R2 = 0.97589: HP = (0.000063925*A0*A0*A0) - (0.00248748*A0*A0) + (0.0323532*A0) - 0.140489
+ // R2 = 0.97153: HP = (-0.00000615887*A0*A0*A0*A0) + (0.000395273*A0*A0*A0) - (0.0091707*A0*A0) + (0.092250*A0) - 0.341743
+ // R2 = 0.96812: HP = (0.00000145563*A0*A0*A0*A0*A0) - (0.0000505655*A0*A0*A0*A0) + (0.000151855*A0*A0*A0) + (0.0134189*A0*A0) - (0.189302*A0) + 0.763397
+ //
VARCLOCK(BEETLECLK, 1, "max(0.000001,min(0.1,(0.00000145563*A0*A0*A0*A0*A0) - (0.0000505655*A0*A0*A0*A0) + (0.000151855*A0*A0*A0) + (0.0134189*A0*A0) - (0.189302*A0) + 0.763397))")
NET_C(BEETLECLK.GND, GND)
NET_C(BEETLECLK.VCC, I_V5)
@@ -1099,153 +1099,153 @@ NETLIST_START(boxingb)
NET_C(BEETLECLK.Q, U22.1)
NET_C(GND, R86.1, R86.2, R87.1, R87.2, R88.1, R88.2, C33.1, C33.2, C34.1, C34.2, D19.A, D19.K, D20.A, D20.K)
#else
- NET_C(R83.2, U56.5)
- NET_C(R82.2, U56.8)
- NET_C(R85.1, U56.6)
- NET_C(U56.7, C33.1)
- NET_C(C33.2, GND)
- NET_C(U56.1, GND)
- HINT(U56.4, NC)
- NET_C(U56.3, C34.2)
- NET_C(C34.1, D19.K, R86.1)
- NET_C(D19.A, GND)
- NET_C(R86.2, Q15.B)
- NET_C(Q15.E, R88.2, D20.K)
- NET_C(R88.1, I_VM15)
- NET_C(D20.A, GND)
- NET_C(Q15.C, R87.1, U22.1)
- NET_C(R87.2, I_V5)
+ NET_C(R83.2, U56.5)
+ NET_C(R82.2, U56.8)
+ NET_C(R85.1, U56.6)
+ NET_C(U56.7, C33.1)
+ NET_C(C33.2, GND)
+ NET_C(U56.1, GND)
+ HINT(U56.4, NC)
+ NET_C(U56.3, C34.2)
+ NET_C(C34.1, D19.K, R86.1)
+ NET_C(D19.A, GND)
+ NET_C(R86.2, Q15.B)
+ NET_C(Q15.E, R88.2, D20.K)
+ NET_C(R88.1, I_VM15)
+ NET_C(D20.A, GND)
+ NET_C(Q15.C, R87.1, U22.1)
+ NET_C(R87.2, I_V5)
#endif
- NET_C(BEETLE_ON_SCREEN_M, U22.2)
- HINT(U22.6, NC)
- HINT(U22.5, NC)
- NET_C(U22.4, R89.1)
- HINT(U22.3, NC)
- NET_C(R89.2, R90.2, R91.1)
- NET_C(R90.1, GND)
- NET_C(R91.2, C35.2)
- NET_C(C35.1, SJ)
-
- //
- // Page 3, bottom (BOUNCE)
- //
-
- ALIAS(BOUNCE_EN_P, R93.1)
- NET_C(R93.1, R92.1)
- NET_C(R92.2, R94.2, I_V5, Q16.E)
- NET_C(R93.2, R94.1, Q16.B)
- NET_C(Q16.C, R95.2, R96.2, R97.1)
- NET_C(R95.1, I_VM15)
- NET_C(R96.1, GND)
- NET_C(R97.2, Q17.B)
- NET_C(Q17.E, GND)
- NET_C(Q17.C, R99.1)
- NET_C(R99.2, R98.1, C36.1, R101.2, C39.2, R102.2)
- NET_C(R98.2, I_V15)
- NET_C(C36.2, GND)
- NET_C(R101.1, GND)
-
- NET_C(_5232USEC_P, R100.1, U58.6, U58.2)
- NET_C(R100.2, I_V5)
- NET_C(U58.7, GND) // not connected
- NET_C(U58.4, U58.8, I_V5)
- NET_C(U58.1, GND)
- NET_C(U58.5, C38.1)
- NET_C(C38.2, GND)
- NET_C(U58.3, C37.2)
- NET_C(C37.1, R102.1)
-
- NET_C(C39.1, R108.1)
- NET_C(R108.2, I_V15)
+ NET_C(BEETLE_ON_SCREEN_M, U22.2)
+ HINT(U22.6, NC)
+ HINT(U22.5, NC)
+ NET_C(U22.4, R89.1)
+ HINT(U22.3, NC)
+ NET_C(R89.2, R90.2, R91.1)
+ NET_C(R90.1, GND)
+ NET_C(R91.2, C35.2)
+ NET_C(C35.1, SJ)
+
+ //
+ // Page 3, bottom (BOUNCE)
+ //
+
+ ALIAS(BOUNCE_EN_P, R93.1)
+ NET_C(R93.1, R92.1)
+ NET_C(R92.2, R94.2, I_V5, Q16.E)
+ NET_C(R93.2, R94.1, Q16.B)
+ NET_C(Q16.C, R95.2, R96.2, R97.1)
+ NET_C(R95.1, I_VM15)
+ NET_C(R96.1, GND)
+ NET_C(R97.2, Q17.B)
+ NET_C(Q17.E, GND)
+ NET_C(Q17.C, R99.1)
+ NET_C(R99.2, R98.1, C36.1, R101.2, C39.2, R102.2)
+ NET_C(R98.2, I_V15)
+ NET_C(C36.2, GND)
+ NET_C(R101.1, GND)
+
+ NET_C(_5232USEC_P, R100.1, U58.6, U58.2)
+ NET_C(R100.2, I_V5)
+ NET_C(U58.7, GND) // not connected
+ NET_C(U58.4, U58.8, I_V5)
+ NET_C(U58.1, GND)
+ NET_C(U58.5, C38.1)
+ NET_C(C38.2, GND)
+ NET_C(U58.3, C37.2)
+ NET_C(C37.1, R102.1)
+
+ NET_C(C39.1, R108.1)
+ NET_C(R108.2, I_V15)
#if (HLE_BOUNCE_VCO)
- //
- // Unlike all the other VCOs, this one doesn't go directly into a
- // TTL device. The actual square wave is tapered from the top and
- // slightly modulated with the frequency, but it makes little
- // practical difference, so we just scale the output square wave
- // to +/-5V as input to R109.
- //
- // Standard mapping:
- // R2 = 0.89933: HP = (0.00476268*A0) - 0.0576442
- // R2 = 0.97773: HP = (0.00311005*A0*A0) - (0.079281*A0) + 0.509096
- // R2 = 0.97985: HP = (0.00115078*A0*A0*A0) - (0.0435380*A0*A0) + (0.550407*A0) - 2.321385
- // R2 = 0.97985: HP = (0.0000369937*A0*A0*A0*A0) - (0.000849582*A0*A0*A0) - (0.00300315*A0*A0) + (0.185593*A0) - 1.090973
- // R2 = 0.24613: HP = (-0.000199982*A0*A0*A0*A0*A0) + (0.0134882*A0*A0*A0*A0) - (0.362557*A0*A0*A0) + (4.857498*A0*A0) - (32.45284*A0) + 86.5278
- //
+ //
+ // Unlike all the other VCOs, this one doesn't go directly into a
+ // TTL device. The actual square wave is tapered from the top and
+ // slightly modulated with the frequency, but it makes little
+ // practical difference, so we just scale the output square wave
+ // to +/-5V as input to R109.
+ //
+ // Standard mapping:
+ // R2 = 0.89933: HP = (0.00476268*A0) - 0.0576442
+ // R2 = 0.97773: HP = (0.00311005*A0*A0) - (0.079281*A0) + 0.509096
+ // R2 = 0.97985: HP = (0.00115078*A0*A0*A0) - (0.0435380*A0*A0) + (0.550407*A0) - 2.321385
+ // R2 = 0.97985: HP = (0.0000369937*A0*A0*A0*A0) - (0.000849582*A0*A0*A0) - (0.00300315*A0*A0) + (0.185593*A0) - 1.090973
+ // R2 = 0.24613: HP = (-0.000199982*A0*A0*A0*A0*A0) + (0.0134882*A0*A0*A0*A0) - (0.362557*A0*A0*A0) + (4.857498*A0*A0) - (32.45284*A0) + 86.5278
+ //
VARCLOCK(BOUNCECLK, 1, "max(0.000001,min(0.1,((0.00115078*A0*A0*A0) - (0.0435380*A0*A0) + (0.550407*A0) - 2.321385))")
NET_C(BOUNCECLK.GND, GND)
NET_C(BOUNCECLK.VCC, I_V5)
NET_C(BOUNCECLK.A0, C39.2)
NET_C(BOUNCECLK.Q, BOUNCEENV.A0)
- AFUNC(BOUNCEENV, 1, "if(A0>2.5,5,-5)")
- NET_C(BOUNCEENV, R109.1)
+ AFUNC(BOUNCEENV, 1, "if(A0>2.5,5,-5)")
+ NET_C(BOUNCEENV, R109.1)
NET_C(GND, C40.1, C40.2)
NET_C(GND, C42.1, C42.2)
#else
- NET_C(C39.1, U57.6)
- NET_C(R108.2, U57.8)
- NET_C(R99.2, U57.5)
- NET_C(C39.1, U57.6, R108.1)
- NET_C(R108.2, I_V15, U57.8)
- NET_C(U57.7, C40.1)
- NET_C(C40.2, GND)
- NET_C(U57.1, GND)
- HINT(U57.4, NC)
- NET_C(U57.3, C42.2)
- NET_C(C42.1, R109.1)
+ NET_C(C39.1, U57.6)
+ NET_C(R108.2, U57.8)
+ NET_C(R99.2, U57.5)
+ NET_C(C39.1, U57.6, R108.1)
+ NET_C(R108.2, I_V15, U57.8)
+ NET_C(U57.7, C40.1)
+ NET_C(C40.2, GND)
+ NET_C(U57.1, GND)
+ HINT(U57.4, NC)
+ NET_C(U57.3, C42.2)
+ NET_C(C42.1, R109.1)
#endif
- NET_C(R109.2, R111.2, U59.2)
- NET_C(R111.1, GND)
- NET_C(U59.3, R112.2)
- NET_C(R112.1, GND)
-
- ALIAS(BOUNCE_EN_M, R104.1)
- NET_C(R104.1, R103.1)
- NET_C(R103.2, I_V5)
- NET_C(R104.2, Q18.B)
- NET_C(Q18.E, I_V2_2)
- NET_C(Q18.C, R105.2, R106.2, Q19.E)
- NET_C(R105.1, I_VM15)
- NET_C(R106.1, GND)
- NET_C(Q19.B, R107.2)
- NET_C(R107.1, GND)
- NET_C(Q19.C, C41.1, R110.1)
- NET_C(C41.2, I_VM15)
- NET_C(R110.2, U59.5)
- NET_C(U59.6, CS)
-
- //
- // Page 4, top (Cannon)
- //
-
- ALIAS(CANNON_M, R114.1)
- NET_C(R114.1, R113.1)
- NET_C(R113.2, I_V5)
- NET_C(R114.2, Q20.B)
- NET_C(Q20.E, I_V2_2)
- NET_C(Q20.C, R115.2, R116.2, R117.1)
- NET_C(R115.1, I_VM15)
- NET_C(R116.1, GND)
- NET_C(R117.2, Q21.B)
- NET_C(Q21.E, GND)
- NET_C(Q21.C, R119.1)
- NET_C(R119.2, R118.1, C43.1, R120.2, C44.2)
- NET_C(R118.2, I_V15, R121.2)
- NET_C(C43.2, GND)
- NET_C(R120.1, GND)
- NET_C(C44.1, R121.1)
+ NET_C(R109.2, R111.2, U59.2)
+ NET_C(R111.1, GND)
+ NET_C(U59.3, R112.2)
+ NET_C(R112.1, GND)
+
+ ALIAS(BOUNCE_EN_M, R104.1)
+ NET_C(R104.1, R103.1)
+ NET_C(R103.2, I_V5)
+ NET_C(R104.2, Q18.B)
+ NET_C(Q18.E, I_V2_2)
+ NET_C(Q18.C, R105.2, R106.2, Q19.E)
+ NET_C(R105.1, I_VM15)
+ NET_C(R106.1, GND)
+ NET_C(Q19.B, R107.2)
+ NET_C(R107.1, GND)
+ NET_C(Q19.C, C41.1, R110.1)
+ NET_C(C41.2, I_VM15)
+ NET_C(R110.2, U59.5)
+ NET_C(U59.6, CS)
+
+ //
+ // Page 4, top (Cannon)
+ //
+
+ ALIAS(CANNON_M, R114.1)
+ NET_C(R114.1, R113.1)
+ NET_C(R113.2, I_V5)
+ NET_C(R114.2, Q20.B)
+ NET_C(Q20.E, I_V2_2)
+ NET_C(Q20.C, R115.2, R116.2, R117.1)
+ NET_C(R115.1, I_VM15)
+ NET_C(R116.1, GND)
+ NET_C(R117.2, Q21.B)
+ NET_C(Q21.E, GND)
+ NET_C(Q21.C, R119.1)
+ NET_C(R119.2, R118.1, C43.1, R120.2, C44.2)
+ NET_C(R118.2, I_V15, R121.2)
+ NET_C(C43.2, GND)
+ NET_C(R120.1, GND)
+ NET_C(C44.1, R121.1)
#if (HLE_CANNON_VCO)
- //
- // Standard mapping:
- // R2 = 0.96910: HP = (0.000125667*A0) - 0.00142938
- // R2 = 0.99026: HP = (0.000076462*A0*A0) - (0.00189006*A0) + 0.0117720
- // R2 = 0.99181: HP = (0.0000429163*A0*A0*A0) - (0.00161661*A0*A0) + (0.0203246*A0) - 0.085173
- // R2 = 0.99203: HP = (0.0000167801*A0*A0*A0*A0) - (0.000839548*A0*A0*A0) + (0.0157634*A0*A0) - (0.131604*A0) + 0.412204
- // R2 = 0.99209: HP = (0.00000283657*A0*A0*A0*A0*A0) - (0.000141443*A0*A0*A0*A0) + (0.00257240*A0*A0*A0) - (0.0192167*A0*A0) + (0.0334224*A0) + 0.148265
- //
+ //
+ // Standard mapping:
+ // R2 = 0.96910: HP = (0.000125667*A0) - 0.00142938
+ // R2 = 0.99026: HP = (0.000076462*A0*A0) - (0.00189006*A0) + 0.0117720
+ // R2 = 0.99181: HP = (0.0000429163*A0*A0*A0) - (0.00161661*A0*A0) + (0.0203246*A0) - 0.085173
+ // R2 = 0.99203: HP = (0.0000167801*A0*A0*A0*A0) - (0.000839548*A0*A0*A0) + (0.0157634*A0*A0) - (0.131604*A0) + 0.412204
+ // R2 = 0.99209: HP = (0.00000283657*A0*A0*A0*A0*A0) - (0.000141443*A0*A0*A0*A0) + (0.00257240*A0*A0*A0) - (0.0192167*A0*A0) + (0.0334224*A0) + 0.148265
+ //
VARCLOCK(CANNONCLK, 1, "max(0.000001,min(0.1,(0.00000283657*A0*A0*A0*A0*A0) - (0.000141443*A0*A0*A0*A0) + (0.00257240*A0*A0*A0) - (0.0192167*A0*A0) + (0.0334224*A0) + 0.148265))")
NET_C(CANNONCLK.GND, GND)
NET_C(CANNONCLK.VCC, I_V5)
@@ -1253,466 +1253,466 @@ NETLIST_START(boxingb)
NET_C(CANNONCLK.Q, U13.1)
NET_C(GND, R122.1, R122.2, R123.1, R123.2, R124.1, R124.2, C75.1, C75.2, C45.1, C45.2, D21.A, D21.K, D22.A, D22.K)
#else
- NET_C(R119.2, U60.5)
- NET_C(R118.2, U60.8)
- NET_C(C44.1, U60.6)
- NET_C(U60.7, C75.1)
- NET_C(C75.2, GND)
- NET_C(U60.1, GND)
- HINT(U60.4, NC)
- NET_C(U60.3, C45.2)
- NET_C(C45.1, D21.K, R122.1)
- NET_C(D21.A, GND)
- NET_C(R122.2, Q22.B)
- NET_C(Q22.E, R124.2, D22.K)
- NET_C(R124.1, I_VM15)
- NET_C(D22.A, GND)
- NET_C(Q22.C, R123.1, U13.1)
- NET_C(R123.2, I_V5)
+ NET_C(R119.2, U60.5)
+ NET_C(R118.2, U60.8)
+ NET_C(C44.1, U60.6)
+ NET_C(U60.7, C75.1)
+ NET_C(C75.2, GND)
+ NET_C(U60.1, GND)
+ HINT(U60.4, NC)
+ NET_C(U60.3, C45.2)
+ NET_C(C45.1, D21.K, R122.1)
+ NET_C(D21.A, GND)
+ NET_C(R122.2, Q22.B)
+ NET_C(Q22.E, R124.2, D22.K)
+ NET_C(R124.1, I_VM15)
+ NET_C(D22.A, GND)
+ NET_C(Q22.C, R123.1, U13.1)
+ NET_C(R123.2, I_V5)
#endif
- NET_C(CANNON_M, U13.2)
- HINT(U13.6, NC)
- HINT(U13.5, NC)
- NET_C(U13.4, R125.1)
- HINT(U13.3, NC)
- NET_C(R125.2, R126.1, R127.2)
- NET_C(R126.2, GND)
- NET_C(R127.1, C46.2)
- NET_C(C46.1, SJ)
-
- //
- // Page 4, bottom-left (explosions)
- //
-
- NET_C(U62.2, GND)
- NET_C(U62.1, GND)
- NET_C(U62.4, R128.1, C47.1, C74.1)
- NET_C(R128.2, I_V15)
- NET_C(C47.2, GND)
- NET_C(C74.2, GND)
- NET_C(U62.3, C48.2)
- NET_C(C48.1, R129.2, U63.3)
- NET_C(R129.1, GND)
- NET_C(U63.2, U63.6, R130.1)
- NET_C(R130.2, C49.1, R131.1)
- NET_C(C49.2, GND)
- NET_C(R131.2, C50.1, R132.1)
- NET_C(C50.2, GND)
- NET_C(R132.2, R133.2, U64.2)
- NET_C(R133.1, GND)
- NET_C(U64.3, R134.2)
- NET_C(R134.1, GND)
- NET_C(U64.6, CS)
-
- ALIAS(LOUD_EXPL_M, R136.1)
- NET_C(R136.1, R135.1)
- NET_C(R135.2, I_V5, R137.2, Q23.E)
- NET_C(R136.2, R137.1, Q23.B)
- NET_C(Q23.C, R138.2, R139.2, Q24.E)
- NET_C(R138.1, I_VM15)
- NET_C(R139.1, GND)
- NET_C(Q24.B, R140.2)
- NET_C(R140.1, GND)
- NET_C(Q24.C, C51.1, R141.1)
- NET_C(C51.2, I_VM15)
- NET_C(R141.2, R148.2, U64.5)
-
- ALIAS(SOFT_EXPL_M, R143.1)
- NET_C(R143.1, R142.1)
- NET_C(R142.2, I_V5, R144.2, Q25.E)
- NET_C(R143.2, R144.1, Q25.B)
- NET_C(Q25.C, R145.2, R146.2, Q26.E)
- NET_C(R145.1, I_VM15)
- NET_C(R146.1, GND)
- NET_C(Q26.B, R147.2)
- NET_C(R147.1, GND)
- NET_C(Q26.C, C52.1, R148.1)
- NET_C(C52.2, I_VM15)
-
- //
- // Page 4, bottom-right (bug pushing and final mix)
- //
-
- ALIAS(BUG_PUSHING_A_P, U31.9)
- NET_C(U31.8, U21.2)
- NET_C(_588USEC_P, U21.1)
- HINT(U21.6, NC)
- NET_C(U21.5, R149.1)
- HINT(U21.4, NC)
- HINT(U21.3, NC)
- NET_C(R149.2, C53.1)
-
- ALIAS(BUG_PUSHING_B_P, U31.11)
- NET_C(U31.10, U21.12)
- NET_C(_588USEC_P, U21.13)
- NET_C(U21.8, R150.1)
- HINT(U21.9, NC)
- HINT(U21.10, NC)
- HINT(U21.11, NC)
- NET_C(R150.2, C54.2)
-
- NET_C(C53.2, C54.1, SJ, U54.2, R160.2, R161.1, C61.1)
- NET_C(C61.2, R161.2)
- ALIAS(OUTPUT, R161.2)
- NET_C(R161.2, U54.6)
- NET_C(U54.3, GND)
- NET_C(CS, U55.3, R159.2)
- NET_C(R159.1, GND)
- NET_C(U55.2, U55.6, C60.2)
- NET_C(C60.1, R160.1)
-
- //
- // Page 5, shaft encoder -- not emulated
- //
-
- //
- // Page 6, top left
- //
-
- NET_C(I_V5, R206.1, R207.1, R208.1, R209.1)
- NET_C(R206.2, HIA_P)
- NET_C(R207.2, HIB_P)
- ALIAS(HIC_P, R208.2)
- NET_C(R209.2, HID_P)
-
- NET_C(I_OUT_7, D25.K, U50.9)
- NET_C(D25.A, GND)
- NET_C(U50.8, U50.1)
- NET_C(U50.2, U49.1)
- ALIAS(DATA_P, U50.2)
+ NET_C(CANNON_M, U13.2)
+ HINT(U13.6, NC)
+ HINT(U13.5, NC)
+ NET_C(U13.4, R125.1)
+ HINT(U13.3, NC)
+ NET_C(R125.2, R126.1, R127.2)
+ NET_C(R126.2, GND)
+ NET_C(R127.1, C46.2)
+ NET_C(C46.1, SJ)
+
+ //
+ // Page 4, bottom-left (explosions)
+ //
+
+ NET_C(U62.2, GND)
+ NET_C(U62.1, GND)
+ NET_C(U62.4, R128.1, C47.1, C74.1)
+ NET_C(R128.2, I_V15)
+ NET_C(C47.2, GND)
+ NET_C(C74.2, GND)
+ NET_C(U62.3, C48.2)
+ NET_C(C48.1, R129.2, U63.3)
+ NET_C(R129.1, GND)
+ NET_C(U63.2, U63.6, R130.1)
+ NET_C(R130.2, C49.1, R131.1)
+ NET_C(C49.2, GND)
+ NET_C(R131.2, C50.1, R132.1)
+ NET_C(C50.2, GND)
+ NET_C(R132.2, R133.2, U64.2)
+ NET_C(R133.1, GND)
+ NET_C(U64.3, R134.2)
+ NET_C(R134.1, GND)
+ NET_C(U64.6, CS)
+
+ ALIAS(LOUD_EXPL_M, R136.1)
+ NET_C(R136.1, R135.1)
+ NET_C(R135.2, I_V5, R137.2, Q23.E)
+ NET_C(R136.2, R137.1, Q23.B)
+ NET_C(Q23.C, R138.2, R139.2, Q24.E)
+ NET_C(R138.1, I_VM15)
+ NET_C(R139.1, GND)
+ NET_C(Q24.B, R140.2)
+ NET_C(R140.1, GND)
+ NET_C(Q24.C, C51.1, R141.1)
+ NET_C(C51.2, I_VM15)
+ NET_C(R141.2, R148.2, U64.5)
+
+ ALIAS(SOFT_EXPL_M, R143.1)
+ NET_C(R143.1, R142.1)
+ NET_C(R142.2, I_V5, R144.2, Q25.E)
+ NET_C(R143.2, R144.1, Q25.B)
+ NET_C(Q25.C, R145.2, R146.2, Q26.E)
+ NET_C(R145.1, I_VM15)
+ NET_C(R146.1, GND)
+ NET_C(Q26.B, R147.2)
+ NET_C(R147.1, GND)
+ NET_C(Q26.C, C52.1, R148.1)
+ NET_C(C52.2, I_VM15)
+
+ //
+ // Page 4, bottom-right (bug pushing and final mix)
+ //
+
+ ALIAS(BUG_PUSHING_A_P, U31.9)
+ NET_C(U31.8, U21.2)
+ NET_C(_588USEC_P, U21.1)
+ HINT(U21.6, NC)
+ NET_C(U21.5, R149.1)
+ HINT(U21.4, NC)
+ HINT(U21.3, NC)
+ NET_C(R149.2, C53.1)
+
+ ALIAS(BUG_PUSHING_B_P, U31.11)
+ NET_C(U31.10, U21.12)
+ NET_C(_588USEC_P, U21.13)
+ NET_C(U21.8, R150.1)
+ HINT(U21.9, NC)
+ HINT(U21.10, NC)
+ HINT(U21.11, NC)
+ NET_C(R150.2, C54.2)
+
+ NET_C(C53.2, C54.1, SJ, U54.2, R160.2, R161.1, C61.1)
+ NET_C(C61.2, R161.2)
+ ALIAS(OUTPUT, R161.2)
+ NET_C(R161.2, U54.6)
+ NET_C(U54.3, GND)
+ NET_C(CS, U55.3, R159.2)
+ NET_C(R159.1, GND)
+ NET_C(U55.2, U55.6, C60.2)
+ NET_C(C60.1, R160.1)
+
+ //
+ // Page 5, shaft encoder -- not emulated
+ //
+
+ //
+ // Page 6, top left
+ //
+
+ NET_C(I_V5, R206.1, R207.1, R208.1, R209.1)
+ NET_C(R206.2, HIA_P)
+ NET_C(R207.2, HIB_P)
+ ALIAS(HIC_P, R208.2)
+ NET_C(R209.2, HID_P)
+
+ NET_C(I_OUT_7, D25.K, U50.9)
+ NET_C(D25.A, GND)
+ NET_C(U50.8, U50.1)
+ NET_C(U50.2, U49.1)
+ ALIAS(DATA_P, U50.2)
#if (HACK_SIMPLIFY_INPUTS)
- //
- // Several of the inputs go through several rounds of inverters
- // diodes and pullups, and eventually something goes wrong.
- // Bypassing these extra devices helps make the inputs reliable.
- //
- NET_C(I_OUT_4, U30.13)
- NET_C(GND, D26.A, D26.K, U50.13, U50.12, U40.9, R177.1, R177.2, C67.1, C67.2)
+ //
+ // Several of the inputs go through several rounds of inverters
+ // diodes and pullups, and eventually something goes wrong.
+ // Bypassing these extra devices helps make the inputs reliable.
+ //
+ NET_C(I_OUT_4, U30.13)
+ NET_C(GND, D26.A, D26.K, U50.13, U50.12, U40.9, R177.1, R177.2, C67.1, C67.2)
#else
- NET_C(I_OUT_4, D26.K, U50.13)
- NET_C(D26.A, GND)
- NET_C(U50.12, U40.9)
- NET_C(U40.8, C67.2, R177.1, U30.13)
- NET_C(C67.1, GND)
- NET_C(R177.2, I_V5)
+ NET_C(I_OUT_4, D26.K, U50.13)
+ NET_C(D26.A, GND)
+ NET_C(U50.12, U40.9)
+ NET_C(U40.8, C67.2, R177.1, U30.13)
+ NET_C(C67.1, GND)
+ NET_C(R177.2, I_V5)
#endif
- NET_C(U30.12, U30.1)
- NET_C(U30.2, U49.8, U39.8)
-
- NET_C(U49.2, U49.9, U39.2, U39.9, HIA_P)
- NET_C(U49.3, U48.3, U47.3)
- NET_C(U49.4, U48.4, U47.4)
- NET_C(U49.5, U48.7, U47.7)
- NET_C(U49.6, U48.8, U47.8)
- NET_C(U49.10, U48.13, U47.13)
- NET_C(U49.11, U48.14, U47.14)
- NET_C(U49.12, U48.17, U47.17)
- NET_C(U49.13, U48.18, U47.18, U39.1)
-
- NET_C(U39.3, U38.3)
- NET_C(U39.4, U38.4)
- NET_C(U39.5, U38.7)
- NET_C(U39.6, U38.8)
- NET_C(U39.10, U38.13)
- NET_C(U39.11, U38.14)
- NET_C(U39.12, U38.17)
- NET_C(U39.13, U38.18)
-
- ALIAS(MEN_P, U48.2)
- NET_C(CANNON_M, U48.5)
- ALIAS(AS1_M, U48.6)
- ALIAS(AS0_M, U48.9)
- ALIAS(FS11_P, U48.12)
- ALIAS(FS10_P, U48.15)
- ALIAS(FS09_P, U48.16)
- ALIAS(FS08_P, U48.19)
- NET_C(U48.1, GND)
- ALIAS(MLATCH_P, U48.11)
-
- ALIAS(FS07_P, U38.2)
- ALIAS(FS06_P, U38.5)
- ALIAS(FS05_P, U38.6)
- ALIAS(FS04_P, U38.9)
- ALIAS(FS03_P, U38.12)
- ALIAS(FS02_P, U38.15)
- ALIAS(FS01_P, U38.16)
- ALIAS(FS00_P, U38.19)
- NET_C(U38.1, GND)
- NET_C(MLATCH_P, U38.11)
-
- NET_C(SOFT_EXPL_M, U47.2)
- NET_C(LOUD_EXPL_M, U47.5)
- NET_C(CHIRPING_BIRDS_M, U47.6)
- NET_C(EGG_CRACKING_M, U47.9)
- NET_C(BUG_PUSHING_A_P, U47.12)
- NET_C(BUG_PUSHING_B_P, U47.15)
- NET_C(BUG_DYING_M, U47.16)
- NET_C(BEETLE_ON_SCREEN_M, U47.19)
- NET_C(U47.11, U30.6)
- NET_C(U47.1, GND)
-
- //
- // Page 6, middle-left
- //
+ NET_C(U30.12, U30.1)
+ NET_C(U30.2, U49.8, U39.8)
+
+ NET_C(U49.2, U49.9, U39.2, U39.9, HIA_P)
+ NET_C(U49.3, U48.3, U47.3)
+ NET_C(U49.4, U48.4, U47.4)
+ NET_C(U49.5, U48.7, U47.7)
+ NET_C(U49.6, U48.8, U47.8)
+ NET_C(U49.10, U48.13, U47.13)
+ NET_C(U49.11, U48.14, U47.14)
+ NET_C(U49.12, U48.17, U47.17)
+ NET_C(U49.13, U48.18, U47.18, U39.1)
+
+ NET_C(U39.3, U38.3)
+ NET_C(U39.4, U38.4)
+ NET_C(U39.5, U38.7)
+ NET_C(U39.6, U38.8)
+ NET_C(U39.10, U38.13)
+ NET_C(U39.11, U38.14)
+ NET_C(U39.12, U38.17)
+ NET_C(U39.13, U38.18)
+
+ ALIAS(MEN_P, U48.2)
+ NET_C(CANNON_M, U48.5)
+ ALIAS(AS1_M, U48.6)
+ ALIAS(AS0_M, U48.9)
+ ALIAS(FS11_P, U48.12)
+ ALIAS(FS10_P, U48.15)
+ ALIAS(FS09_P, U48.16)
+ ALIAS(FS08_P, U48.19)
+ NET_C(U48.1, GND)
+ ALIAS(MLATCH_P, U48.11)
+
+ ALIAS(FS07_P, U38.2)
+ ALIAS(FS06_P, U38.5)
+ ALIAS(FS05_P, U38.6)
+ ALIAS(FS04_P, U38.9)
+ ALIAS(FS03_P, U38.12)
+ ALIAS(FS02_P, U38.15)
+ ALIAS(FS01_P, U38.16)
+ ALIAS(FS00_P, U38.19)
+ NET_C(U38.1, GND)
+ NET_C(MLATCH_P, U38.11)
+
+ NET_C(SOFT_EXPL_M, U47.2)
+ NET_C(LOUD_EXPL_M, U47.5)
+ NET_C(CHIRPING_BIRDS_M, U47.6)
+ NET_C(EGG_CRACKING_M, U47.9)
+ NET_C(BUG_PUSHING_A_P, U47.12)
+ NET_C(BUG_PUSHING_B_P, U47.15)
+ NET_C(BUG_DYING_M, U47.16)
+ NET_C(BEETLE_ON_SCREEN_M, U47.19)
+ NET_C(U47.11, U30.6)
+ NET_C(U47.1, GND)
+
+ //
+ // Page 6, middle-left
+ //
#if (HLE_MUSIC_CLOCK)
- //
- // The 20MHz clock (Y1) is divided by 4 via a pair
- // of JK flip-flops (U23) to 5MHz. That signal is
- // used to clock a 74LS163 counter (U43) that divides
- // the clock by 9 via a preset value. It then goes
- // through another JK flip-flop (U33) for another
- // divide by 2, ending up at 277778Hz. No sense in
- // running all this manually.
- //
- CLOCK(MUSICCLK, 277778)
- NET_C(MUSICCLK.VCC, I_V5)
- NET_C(MUSICCLK.GND, GND)
- ALIAS(_227KC_P, MUSICCLK.Q)
- NET_C(MUSICCLK.Q, U2.13)
- ALIAS(_227KC_M, U2.12)
- NET_C(GND, R178.1, R178.2, R179.1, R179.2, R204.1, R204.2, C68.1, C68.2)
- NET_C(GND, U2.1, U2.3)
- NET_C(GND, U23.1, U23.2, U23.3, U23.4, U23.10, U23.11, U23.12, U23.13)
+ //
+ // The 20MHz clock (Y1) is divided by 4 via a pair
+ // of JK flip-flops (U23) to 5MHz. That signal is
+ // used to clock a 74LS163 counter (U43) that divides
+ // the clock by 9 via a preset value. It then goes
+ // through another JK flip-flop (U33) for another
+ // divide by 2, ending up at 277778Hz. No sense in
+ // running all this manually.
+ //
+ CLOCK(MUSICCLK, 277778)
+ NET_C(MUSICCLK.VCC, I_V5)
+ NET_C(MUSICCLK.GND, GND)
+ ALIAS(_227KC_P, MUSICCLK.Q)
+ NET_C(MUSICCLK.Q, U2.13)
+ ALIAS(_227KC_M, U2.12)
+ NET_C(GND, R178.1, R178.2, R179.1, R179.2, R204.1, R204.2, C68.1, C68.2)
+ NET_C(GND, U2.1, U2.3)
+ NET_C(GND, U23.1, U23.2, U23.3, U23.4, U23.10, U23.11, U23.12, U23.13)
#else
- //
- // This is just here for documentation; the crystal is
- // not modelled for this circuit.
- //
- NET_C(U2.3, R178.1, C68.1)
- NET_C(R178.2, U2.4, Y1.1)
- NET_C(Y1.2, R179.1, U2.1)
- NET_C(R179.2, U2.2, U2.13, C68.2)
- NET_C(U2.12, U23.1)
- NET_C(HIC_P, U23.3, U23.2, U23.4, U23.11, U23.12, U23.10)
- NET_C(U23.5, U23.13)
- HINT(U23.6, NC)
- ALIAS(_5MHZ_P, U23.9)
- NET_C(_5MHZ_M, U23.8)
+ //
+ // This is just here for documentation; the crystal is
+ // not modelled for this circuit.
+ //
+ NET_C(U2.3, R178.1, C68.1)
+ NET_C(R178.2, U2.4, Y1.1)
+ NET_C(Y1.2, R179.1, U2.1)
+ NET_C(R179.2, U2.2, U2.13, C68.2)
+ NET_C(U2.12, U23.1)
+ NET_C(HIC_P, U23.3, U23.2, U23.4, U23.11, U23.12, U23.10)
+ NET_C(U23.5, U23.13)
+ HINT(U23.6, NC)
+ ALIAS(_5MHZ_P, U23.9)
+ NET_C(_5MHZ_M, U23.8)
#endif
- //
- // Page 6, bottom-left
- //
+ //
+ // Page 6, bottom-left
+ //
#if (HACK_SIMPLIFY_INPUTS)
- NET_C(I_OUT_1, U30.9)
- NET_C(GND, D27.A, D27.K, U50.3, U50.4, U40.13, R180.1, R180.2, C69.1, C69.2)
+ NET_C(I_OUT_1, U30.9)
+ NET_C(GND, D27.A, D27.K, U50.3, U50.4, U40.13, R180.1, R180.2, C69.1, C69.2)
#else
- NET_C(I_OUT_1, U50.3, D27.K)
- NET_C(D27.A, GND)
- NET_C(U50.4, U40.13)
- NET_C(U40.12, R180.1, C69.2, U30.9)
- NET_C(R180.2, I_V5)
- NET_C(C69.1, GND)
+ NET_C(I_OUT_1, U50.3, D27.K)
+ NET_C(D27.A, GND)
+ NET_C(U50.4, U40.13)
+ NET_C(U40.12, R180.1, C69.2, U30.9)
+ NET_C(R180.2, I_V5)
+ NET_C(C69.1, GND)
#endif
- NET_C(U30.8, U30.5)
- ALIAS(SLATCH_P, U30.6)
+ NET_C(U30.8, U30.5)
+ ALIAS(SLATCH_P, U30.6)
#if (HACK_SIMPLIFY_INPUTS)
- NET_C(I_OUT_0, U30.11)
- NET_C(GND, D28.A, D28.K, U50.11, U50.10, U40.11, R181.1, R181.2, C70.1, C70.2)
+ NET_C(I_OUT_0, U30.11)
+ NET_C(GND, D28.A, D28.K, U50.11, U50.10, U40.11, R181.1, R181.2, C70.1, C70.2)
#else
- NET_C(I_OUT_0, U50.11, D28.K)
- NET_C(D28.A, GND)
- NET_C(U50.10, U40.11)
- NET_C(U40.10, R181.1, C70.2, U30.11)
- NET_C(R181.2, I_V5)
- NET_C(C70.1, GND)
+ NET_C(I_OUT_0, U50.11, D28.K)
+ NET_C(D28.A, GND)
+ NET_C(U50.10, U40.11)
+ NET_C(U40.10, R181.1, C70.2, U30.11)
+ NET_C(R181.2, I_V5)
+ NET_C(C70.1, GND)
#endif
- NET_C(U30.10, U30.3)
- ALIAS(LATCH_CLK_P, U30.4)
+ NET_C(U30.10, U30.3)
+ ALIAS(LATCH_CLK_P, U30.4)
- NET_C(I_OUT_2, U50.5, BOUNCE_EN_M, D29.K)
- NET_C(D29.A, GND)
- NET_C(U50.6, BOUNCE_EN_P)
+ NET_C(I_OUT_2, U50.5, BOUNCE_EN_M, D29.K)
+ NET_C(D29.A, GND)
+ NET_C(U50.6, BOUNCE_EN_P)
- NET_C(I_OUT_3, D30.K, BELL_EN_M)
- NET_C(D30.A, GND)
+ NET_C(I_OUT_3, D30.K, BELL_EN_M)
+ NET_C(D30.A, GND)
- //
- // Page 6, bottom-middle
- //
+ //
+ // Page 6, bottom-middle
+ //
#if (HLE_MUSIC_CLOCK)
- NET_C(_227KC_P, U44.3)
- NET_C(_227KC_M, U44.11)
- NET_C(GND, U24.1, U24.2, U24.3, U24.4)
- NET_C(GND, U33.1, U33.4, U33.12)
- NET_C(GND, U43.1, U43.2, U43.3, U43.4, U43.5, U43.6, U43.7, U43.9, U43.10)
- NET_C(HIC_P, U33.13)
+ NET_C(_227KC_P, U44.3)
+ NET_C(_227KC_M, U44.11)
+ NET_C(GND, U24.1, U24.2, U24.3, U24.4)
+ NET_C(GND, U33.1, U33.4, U33.12)
+ NET_C(GND, U43.1, U43.2, U43.3, U43.4, U43.5, U43.6, U43.7, U43.9, U43.10)
+ NET_C(HIC_P, U33.13)
#else
- NET_C(HIC_P, U43.5, U43.3, U43.1, U43.10, U43.7)
- NET_C(GND, U43.6, U43.4)
- NET_C(_5MHZ_P, U43.2)
- NET_C(U43.9, U33.12, U24.6)
- HINT(U43.11, NC)
- HINT(U43.12, NC)
- HINT(U43.13, NC)
- HINT(U43.14, NC)
- NET_C(U43.15, U24.2)
-
- NET_C(U24.4, HIC_P)
- HINT(U24.5, NC)
- NET_C(U24.3, _5MHZ_M)
- NET_C(U24.1, R204.2)
- NET_C(R204.1, I_V5)
-
- NET_C(HIC_P, U33.1, U33.4, U33.13)
- NET_C(U33.3, U44.3)
- ALIAS(_227KC_P, U33.3)
- NET_C(U33.2, U44.11)
- ALIAS(_227KC_M, U33.2)
+ NET_C(HIC_P, U43.5, U43.3, U43.1, U43.10, U43.7)
+ NET_C(GND, U43.6, U43.4)
+ NET_C(_5MHZ_P, U43.2)
+ NET_C(U43.9, U33.12, U24.6)
+ HINT(U43.11, NC)
+ HINT(U43.12, NC)
+ HINT(U43.13, NC)
+ HINT(U43.14, NC)
+ NET_C(U43.15, U24.2)
+
+ NET_C(U24.4, HIC_P)
+ HINT(U24.5, NC)
+ NET_C(U24.3, _5MHZ_M)
+ NET_C(U24.1, R204.2)
+ NET_C(R204.1, I_V5)
+
+ NET_C(HIC_P, U33.1, U33.4, U33.13)
+ NET_C(U33.3, U44.3)
+ ALIAS(_227KC_P, U33.3)
+ NET_C(U33.2, U44.11)
+ ALIAS(_227KC_M, U33.2)
#endif
- NET_C(HIA_P, U44.4, U44.1, U44.10, U44.13)
- ALIAS(MACLK_M, U44.2)
- NET_C(U44.5, U44.12)
- ALIAS(MBCLK_P, U44.5)
- ALIAS(MBCLK_M, U44.6)
- ALIAS(MACLK_P, U44.9)
- NET_C(MACLK_M, U44.8, U25.11)
-
- ALIAS(MCARRY_P, U25.12)
- NET_C(U25.13, R182.2)
- NET_C(R182.1, I_V5)
- ALIAS(MLOAD_M, U25.8)
- NET_C(U25.9, U35.8, U34.9)
- ALIAS(MLOAD_P, U25.9)
- NET_C(HIA_P, U25.10)
-
- NET_C(HIA_P, U34.8, U34.11, U34.10)
- ALIAS(DMUSIC_P, U34.5)
- HINT(U34.6, NC)
-
- NET_C(HIA_P, U25.2, U25.4)
- NET_C(LATCH_CLK_P, U25.3)
- NET_C(U25.1, U45.6)
- HINT(U25.5, NC)
- NET_C(U25.6, U35.9, U15.12)
-
- NET_C(MBCLK_M, U15.13)
- HINT(U15.8, NC)
- NET_C(U15.9, U35.11, U35.12)
- HINT(U15.10, NC)
- HINT(U15.11, NC)
-
- NET_C(U35.13, U45.10)
- NET_C(U35.10, U45.12)
- NET_C(MBCLK_P, U45.11)
- NET_C(HIA_P, U45.13)
- HINT(U45.8, NC)
- NET_C(U45.9, MLATCH_P, U45.2)
- NET_C(HIA_P, U45.4)
- HINT(U45.5, NC)
- NET_C(U45.1, R203.2)
- NET_C(R203.1, I_V5)
- NET_C(MACLK_P, U45.3)
-
- //
- // Page 6, right (music generator)
- //
-
- NET_C(FS11_P, U46.6)
- NET_C(FS10_P, U46.5)
- NET_C(FS09_P, U46.4)
- NET_C(FS08_P, U46.3)
- NET_C(HIA_P, U46.1)
- NET_C(MEN_P, U46.7)
- NET_C(MLOAD_M, U46.9)
- NET_C(MBCLK_P, U46.2)
- NET_C(U46.15, MCARRY_P)
- NET_C(U46.10, U36.15)
- HINT(U46.11, NC)
- HINT(U46.12, NC)
- HINT(U46.13, NC)
- HINT(U46.14, NC)
-
- NET_C(FS07_P, U36.6)
- NET_C(FS06_P, U36.5)
- NET_C(FS05_P, U36.4)
- NET_C(FS04_P, U36.3)
- NET_C(HIA_P, U36.1)
- NET_C(MEN_P, U36.7)
- NET_C(MLOAD_M, U36.9) // schems say MLOAD_P, but solarq says MLOAD_M
- NET_C(MACLK_P, U36.2)
- NET_C(U36.10, U37.15)
- HINT(U36.11, NC)
- HINT(U36.12, NC)
- HINT(U36.13, NC)
- HINT(U36.14, NC)
-
- NET_C(FS03_P, U37.6)
- NET_C(FS02_P, U37.5)
- NET_C(FS01_P, U37.4)
- NET_C(FS00_P, U37.3)
- NET_C(HIA_P, U37.1)
- NET_C(MEN_P, U37.7, U37.10)
- NET_C(MLOAD_M, U37.9)
- NET_C(MBCLK_M, U37.2)
- HINT(U37.11, NC)
- HINT(U37.12, NC)
- HINT(U37.13, NC)
- HINT(U37.14, NC)
-
- NET_C(DMUSIC_P, R183.1, R184.1)
- NET_C(R183.2, I_V5)
- NET_C(R184.2, C71.1)
- NET_C(C71.2, R185.1, U67.2)
- NET_C(R185.2, R186.1, GND)
- NET_C(R186.2, U67.3)
- NET_C(U67.6, CS)
-
- NET_C(AS1_M, R187.1, R188.1)
- NET_C(R187.2, I_V5, R189.2, Q31.E)
- NET_C(R188.2, R189.1, Q31.B)
- NET_C(Q31.C, R190.2, R191.1, Q32.E)
- NET_C(R190.1, I_VM15)
- NET_C(R191.2, R192.1, GND)
- NET_C(R192.2, Q32.B)
- NET_C(Q32.C, R193.1)
- NET_C(R193.2, C72.2, R194.1)
- NET_C(C72.1, I_VM15)
- NET_C(R194.2, U67.5, R202.2)
-
- NET_C(AS0_M, R195.1, R196.1)
- NET_C(R195.2, I_V5, R197.2, Q33.E)
- NET_C(R196.2, R197.1, Q33.B)
- NET_C(Q33.C, R198.2, R199.1, Q34.E)
- NET_C(R198.1, I_VM15)
- NET_C(R199.2, R200.1, GND)
- NET_C(R200.2, Q34.B)
- NET_C(Q34.C, R201.1)
- NET_C(R201.2, C73.2, R202.1)
- NET_C(C73.1, I_VM15)
-
- //
- // Unconnected inputs
- //
-
- NET_C(U2.9, U2.11, U9.1, U9.4, U9.12, U9.13, U15.1, U15.2, U20.4, U20.6, U20.8, U20.10, U20.12, U33.8, U33.9, U33.10, U33.11, U35.5, U35.6, U40.1, U40.3, U40.5)
-
- //
- // Unconnected outputs
- //
-
- HINT(U2.8, NC)
- HINT(U2.10, NC)
- HINT(U40.2, NC)
- HINT(U40.4, NC)
- HINT(U40.6, NC)
+ NET_C(HIA_P, U44.4, U44.1, U44.10, U44.13)
+ ALIAS(MACLK_M, U44.2)
+ NET_C(U44.5, U44.12)
+ ALIAS(MBCLK_P, U44.5)
+ ALIAS(MBCLK_M, U44.6)
+ ALIAS(MACLK_P, U44.9)
+ NET_C(MACLK_M, U44.8, U25.11)
+
+ ALIAS(MCARRY_P, U25.12)
+ NET_C(U25.13, R182.2)
+ NET_C(R182.1, I_V5)
+ ALIAS(MLOAD_M, U25.8)
+ NET_C(U25.9, U35.8, U34.9)
+ ALIAS(MLOAD_P, U25.9)
+ NET_C(HIA_P, U25.10)
+
+ NET_C(HIA_P, U34.8, U34.11, U34.10)
+ ALIAS(DMUSIC_P, U34.5)
+ HINT(U34.6, NC)
+
+ NET_C(HIA_P, U25.2, U25.4)
+ NET_C(LATCH_CLK_P, U25.3)
+ NET_C(U25.1, U45.6)
+ HINT(U25.5, NC)
+ NET_C(U25.6, U35.9, U15.12)
+
+ NET_C(MBCLK_M, U15.13)
+ HINT(U15.8, NC)
+ NET_C(U15.9, U35.11, U35.12)
+ HINT(U15.10, NC)
+ HINT(U15.11, NC)
+
+ NET_C(U35.13, U45.10)
+ NET_C(U35.10, U45.12)
+ NET_C(MBCLK_P, U45.11)
+ NET_C(HIA_P, U45.13)
+ HINT(U45.8, NC)
+ NET_C(U45.9, MLATCH_P, U45.2)
+ NET_C(HIA_P, U45.4)
+ HINT(U45.5, NC)
+ NET_C(U45.1, R203.2)
+ NET_C(R203.1, I_V5)
+ NET_C(MACLK_P, U45.3)
+
+ //
+ // Page 6, right (music generator)
+ //
+
+ NET_C(FS11_P, U46.6)
+ NET_C(FS10_P, U46.5)
+ NET_C(FS09_P, U46.4)
+ NET_C(FS08_P, U46.3)
+ NET_C(HIA_P, U46.1)
+ NET_C(MEN_P, U46.7)
+ NET_C(MLOAD_M, U46.9)
+ NET_C(MBCLK_P, U46.2)
+ NET_C(U46.15, MCARRY_P)
+ NET_C(U46.10, U36.15)
+ HINT(U46.11, NC)
+ HINT(U46.12, NC)
+ HINT(U46.13, NC)
+ HINT(U46.14, NC)
+
+ NET_C(FS07_P, U36.6)
+ NET_C(FS06_P, U36.5)
+ NET_C(FS05_P, U36.4)
+ NET_C(FS04_P, U36.3)
+ NET_C(HIA_P, U36.1)
+ NET_C(MEN_P, U36.7)
+ NET_C(MLOAD_M, U36.9) // schems say MLOAD_P, but solarq says MLOAD_M
+ NET_C(MACLK_P, U36.2)
+ NET_C(U36.10, U37.15)
+ HINT(U36.11, NC)
+ HINT(U36.12, NC)
+ HINT(U36.13, NC)
+ HINT(U36.14, NC)
+
+ NET_C(FS03_P, U37.6)
+ NET_C(FS02_P, U37.5)
+ NET_C(FS01_P, U37.4)
+ NET_C(FS00_P, U37.3)
+ NET_C(HIA_P, U37.1)
+ NET_C(MEN_P, U37.7, U37.10)
+ NET_C(MLOAD_M, U37.9)
+ NET_C(MBCLK_M, U37.2)
+ HINT(U37.11, NC)
+ HINT(U37.12, NC)
+ HINT(U37.13, NC)
+ HINT(U37.14, NC)
+
+ NET_C(DMUSIC_P, R183.1, R184.1)
+ NET_C(R183.2, I_V5)
+ NET_C(R184.2, C71.1)
+ NET_C(C71.2, R185.1, U67.2)
+ NET_C(R185.2, R186.1, GND)
+ NET_C(R186.2, U67.3)
+ NET_C(U67.6, CS)
+
+ NET_C(AS1_M, R187.1, R188.1)
+ NET_C(R187.2, I_V5, R189.2, Q31.E)
+ NET_C(R188.2, R189.1, Q31.B)
+ NET_C(Q31.C, R190.2, R191.1, Q32.E)
+ NET_C(R190.1, I_VM15)
+ NET_C(R191.2, R192.1, GND)
+ NET_C(R192.2, Q32.B)
+ NET_C(Q32.C, R193.1)
+ NET_C(R193.2, C72.2, R194.1)
+ NET_C(C72.1, I_VM15)
+ NET_C(R194.2, U67.5, R202.2)
+
+ NET_C(AS0_M, R195.1, R196.1)
+ NET_C(R195.2, I_V5, R197.2, Q33.E)
+ NET_C(R196.2, R197.1, Q33.B)
+ NET_C(Q33.C, R198.2, R199.1, Q34.E)
+ NET_C(R198.1, I_VM15)
+ NET_C(R199.2, R200.1, GND)
+ NET_C(R200.2, Q34.B)
+ NET_C(Q34.C, R201.1)
+ NET_C(R201.2, C73.2, R202.1)
+ NET_C(C73.1, I_VM15)
+
+ //
+ // Unconnected inputs
+ //
+
+ NET_C(U2.9, U2.11, U9.1, U9.4, U9.12, U9.13, U15.1, U15.2, U20.4, U20.6, U20.8, U20.10, U20.12, U33.8, U33.9, U33.10, U33.11, U35.5, U35.6, U40.1, U40.3, U40.5)
+
+ //
+ // Unconnected outputs
+ //
+
+ HINT(U2.8, NC)
+ HINT(U2.10, NC)
+ HINT(U40.2, NC)
+ HINT(U40.4, NC)
+ HINT(U40.6, NC)
// HINT(U2.9, NC)
// HINT(U2.11, NC)
// HINT(U24.4, NC)
#if (ENABLE_FRONTIERS)
- //
- // Isolate the CS sounds from the rest of the mixer
- //
- OPTIMIZE_FRONTIER(U55.3, RES_M(1), 50)
+ //
+ // Isolate the CS sounds from the rest of the mixer
+ //
+ OPTIMIZE_FRONTIER(U55.3, RES_M(1), 50)
#endif
NETLIST_END()
diff --git a/src/mame/audio/nl_cinemat_common.h b/src/mame/audio/nl_cinemat_common.h
index 9e2a14499da..1b2079b79b1 100644
--- a/src/mame/audio/nl_cinemat_common.h
+++ b/src/mame/audio/nl_cinemat_common.h
@@ -58,7 +58,7 @@
#define TTL_74LS163_DIP TTL_74163_DIP
#define TTL_74LS164_DIP TTL_74164_DIP
#define TTL_74LS191_DIP TTL_74191_DIP
-#define TTL_74LS259_DIP TTL_9334_DIP // Seems to be pin-compatible
+#define TTL_74LS259_DIP TTL_9334_DIP // Seems to be pin-compatible
#define TTL_74LS377_DIP TTL_74377_DIP
#define TTL_74LS393_DIP TTL_74393_DIP
@@ -117,10 +117,10 @@ static NETLIST_START(_NE556_DIP)
A.THRESH, /* 1THRES |2 13| 2DISCH */ B.DISCH,
A.CONT, /* 1CONT |3 12| 2THRES */ B.THRESH,
A.RESET, /* 1RESET |4 NE556 11| 2CONT */ B.CONT,
- A.OUT, /* 1OUT |5 10| 2RESET */ B.RESET,
+ A.OUT, /* 1OUT |5 10| 2RESET */ B.RESET,
A.TRIG, /* 1TRIG |6 9| 2OUT */ B.OUT,
A.GND, /* GND |7 8| 2TRIG */ B.TRIG
- /* +--------------+ */
+ /* +--------------+ */
)
NETLIST_END()
@@ -142,7 +142,7 @@ static NETLIST_START(_TL182_DIP)
PARAM(A.BASER, 270.0)
PARAM(B.BASER, 270.0)
- RES(VR, 100)
+ RES(VR, 100)
NC_PIN(NC)
TTL_7406_GATE(AINV)
@@ -183,7 +183,7 @@ static NETLIST_START(_Q_2N6426)
QBJT_EB(Q1, "NPN(IS=1.73583e-11 BF=831.056 NF=1.05532 VAF=957.147 IKF=0.101183 ISE=1.65383e-10 NE=1.59909 BR=2.763 NR=1.03428 VAR=4.18534 IKR=0.0674174 ISC=1.00007e-13 NC=2.00765 RB=22.2759 IRB=0.208089 RBM=22.2759 RE=0.0002 RC=0.001 XTB=2.12676 XTI=1.82449 EG=1.05 CJE=2.62709e-10 VJE=0.95 MJE=0.23 TF=1e-09 XTF=1 VTF=10 ITF=0.01 CJC=3.59851e-10 VJC=0.845279 MJC=0.23 XCJC=0.9 FC=0.5 TR=1e-07 PTF=0 KF=0 AF=1)")
- QBJT_EB(Q2, "NPN(IS=1.73583e-11 BF=831.056 NF=1.05532 VAF=957.147 IKF=0.101183 ISE=1.65383e-10 NE=1.59909 BR=2.763 NR=1.03428 VAR=4.18534 IKR=0.0674174 ISC=1.00007e-13 NC=2.00765 RB=22.2759 IRB=0.208089 RBM=22.2759 RE=0.0002 RC=0.001 XTB=2.12676 XTI=1.82449 EG=1.05 CJE=2.62709e-10 VJE=0.95 MJE=0.23 TF=1e-09 XTF=1 VTF=10 ITF=0.01 CJC=0 VJC=0.845279 MJC=0.23 XCJC=0.9 FC=0.5 TR=1e-07 PTF=0 KF=0 AF=1)") // NPN
+ QBJT_EB(Q2, "NPN(IS=1.73583e-11 BF=831.056 NF=1.05532 VAF=957.147 IKF=0.101183 ISE=1.65383e-10 NE=1.59909 BR=2.763 NR=1.03428 VAR=4.18534 IKR=0.0674174 ISC=1.00007e-13 NC=2.00765 RB=22.2759 IRB=0.208089 RBM=22.2759 RE=0.0002 RC=0.001 XTB=2.12676 XTI=1.82449 EG=1.05 CJE=2.62709e-10 VJE=0.95 MJE=0.23 TF=1e-09 XTF=1 VTF=10 ITF=0.01 CJC=0 VJC=0.845279 MJC=0.23 XCJC=0.9 FC=0.5 TR=1e-07 PTF=0 KF=0 AF=1)") // NPN
DIODE(D1, "D(IS=1e-12 RS=10.8089 N=1.00809 XTI=3.00809 CJO=0 VJ=0.75 M=0.33 FC=0.5)")
RES(R1, RES_K(8))
@@ -235,8 +235,8 @@ static NETLIST_START(_LM3900_DIP)
A.PLUS, /* 1IN+ |1 ++ 14| VCC */ A.VCC,
B.PLUS, /* 2IN+ |2 13| 3IN+ */ C.PLUS,
B.MINUS, /* 2IN- |3 12| 4IN+ */ D.PLUS,
- B.OUT, /* 2OUT |4 LM3900 11| 4IN- */ D.MINUS,
- A.OUT, /* 1OUT |5 10| 4OUT */ D.OUT,
+ B.OUT, /* 2OUT |4 LM3900 11| 4IN- */ D.MINUS,
+ A.OUT, /* 1OUT |5 10| 4OUT */ D.OUT,
A.MINUS, /* 1IN- |6 9| 3OUT */ C.OUT,
A.GND, /* GND |7 8| 3IN- */ C.MINUS
/* +--------------+ */
diff --git a/src/mame/audio/nl_gunfight.cpp b/src/mame/audio/nl_gunfight.cpp
index d6c91de1eb2..c35c296e841 100644
--- a/src/mame/audio/nl_gunfight.cpp
+++ b/src/mame/audio/nl_gunfight.cpp
@@ -284,8 +284,8 @@ static NETLIST_START(gunfight_schematics)
// These all go to TTL ground at pin 7 of 7404 IC H6, rather than the
// ground used for the other sound circuits.
NET_C(GND,
- R133.2, R233.2, R120.2, R220.2,
- Q108.E, Q208.E, Q105.E, Q205.E)
+ R133.2, R233.2, R120.2, R220.2,
+ Q108.E, Q208.E, Q105.E, Q205.E)
NET_C(R134.2, R133.1, Q108.B)
NET_C(R234.2, R233.1, Q208.B)
@@ -320,8 +320,8 @@ static NETLIST_START(gunfight_schematics)
// All connected to 16-volt power.
NET_C(I_V16.Q,
- R132.1, R232.1, R119.1, R219.1,
- Q107.E, Q207.E, Q104.E, Q204.E)
+ R132.1, R232.1, R119.1, R219.1,
+ Q107.E, Q207.E, Q104.E, Q204.E)
NET_C(R131.2, R132.2, Q107.B)
NET_C(R231.2, R232.2, Q207.B)
@@ -796,11 +796,11 @@ NETLIST_START(gunfight)
// Power and ground connections for logic input devices:
NET_C(I_V5.Q,
- I_LEFT_SHOT.VCC, I_RIGHT_SHOT.VCC,
- I_LEFT_HIT.VCC, I_RIGHT_HIT.VCC)
+ I_LEFT_SHOT.VCC, I_RIGHT_SHOT.VCC,
+ I_LEFT_HIT.VCC, I_RIGHT_HIT.VCC)
NET_C(GND,
- I_LEFT_SHOT.GND, I_RIGHT_SHOT.GND,
- I_LEFT_HIT.GND, I_RIGHT_HIT.GND)
+ I_LEFT_SHOT.GND, I_RIGHT_SHOT.GND,
+ I_LEFT_HIT.GND, I_RIGHT_HIT.GND)
ALIAS(IN_LS, I_LEFT_SHOT.Q)
ALIAS(IN_RS, I_RIGHT_SHOT.Q)
diff --git a/src/mame/audio/nl_ripoff.cpp b/src/mame/audio/nl_ripoff.cpp
index c0097d8e6b8..73c0b0740d4 100644
--- a/src/mame/audio/nl_ripoff.cpp
+++ b/src/mame/audio/nl_ripoff.cpp
@@ -53,12 +53,12 @@ NETLIST_START(ripoff)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
- TTL_INPUT(I_OUT_0, 0) // active high
- TTL_INPUT(I_OUT_1, 0) // active high
- TTL_INPUT(I_OUT_2, 0) // active high
- TTL_INPUT(I_OUT_3, 0) // active high
- TTL_INPUT(I_OUT_4, 0) // active high
- TTL_INPUT(I_OUT_7, 0) // active high
+ TTL_INPUT(I_OUT_0, 0) // active high
+ TTL_INPUT(I_OUT_1, 0) // active high
+ TTL_INPUT(I_OUT_2, 0) // active high
+ TTL_INPUT(I_OUT_3, 0) // active high
+ TTL_INPUT(I_OUT_4, 0) // active high
+ TTL_INPUT(I_OUT_7, 0) // active high
NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND, I_OUT_7.GND)
NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC, I_OUT_7.VCC)
@@ -130,16 +130,16 @@ NETLIST_START(ripoff)
RES(R43, RES_K(10))
RES(R44, 330)
RES(R45, RES_K(27))
-// RES(R46, RES_K(12)) -- part of final amp (not emulated)
+// RES(R46, RES_K(12)) -- part of final amp (not emulated)
RES(R47, RES_K(1))
RES(R48, RES_K(2.7))
RES(R49, 470)
-// POT(R50, RES_K()) -- listed as optional on schematics
-// RES(R51, RES_K(1.5)) -- part of final amp (not emulated)
-// RES(R52, 150) -- part of final amp (not emulated)
-// RES(R53, RES_K(22)) -- part of final amp (not emulated)
-// RES(R54, 150) -- part of final amp (not emulated)
-// RES(R55, RES_K(39)) -- part of final amp (not emulated)
+// POT(R50, RES_K()) -- listed as optional on schematics
+// RES(R51, RES_K(1.5)) -- part of final amp (not emulated)
+// RES(R52, 150) -- part of final amp (not emulated)
+// RES(R53, RES_K(22)) -- part of final amp (not emulated)
+// RES(R54, 150) -- part of final amp (not emulated)
+// RES(R55, RES_K(39)) -- part of final amp (not emulated)
RES(R56, 150)
RES(R57, RES_K(2.7))
RES(R58, RES_M(1))
@@ -189,19 +189,19 @@ NETLIST_START(ripoff)
CAP(C10, CAP_U(0.01))
CAP(C11, CAP_U(0.1))
CAP(C12, CAP_U(0.1))
-// CAP(C13, CAP_U()) -- not used according to schematics
+// CAP(C13, CAP_U()) -- not used according to schematics
CAP(C14, CAP_U(0.22))
CAP(C15, CAP_U(0.01))
CAP(C16, CAP_U(0.1))
CAP(C17, CAP_U(0.1))
CAP(C18, CAP_U(0.01))
CAP(C19, CAP_U(0.1))
-// CAP(C20, CAP_U()) -- not used according to schematics
+// CAP(C20, CAP_U()) -- not used according to schematics
CAP(C21, CAP_U(0.68))
-// CAP(C22, CAP_U(0.005)) -- part of final amp (not emulated)
-// CAP(C23, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C24, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C25, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C22, CAP_U(0.005)) -- part of final amp (not emulated)
+// CAP(C23, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C24, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C25, CAP_P(470)) -- part of final amp (not emulated)
CAP(C26, CAP_U(0.1))
CAP(C27, CAP_U(0.1))
CAP(C28, CAP_U(0.01))
@@ -209,16 +209,16 @@ NETLIST_START(ripoff)
CAP(C30, CAP_U(0.22))
CAP(C31, CAP_U(0.1))
CAP(C32, CAP_U(0.68))
-// CAP(C33, CAP_U(0.1)) -- part of voltage converter (not emulated)
-// CAP(C34, CAP_U(25)) -- part of voltage converter (not emulated)
-// CAP(C35, CAP_U(25)) -- part of voltage converter (not emulated)
-// CAP(C36, CAP_U()) -- part of voltage converter (not emulated)
-// CAP(C37, CAP_U(0.1)) -- part of voltage converter (not emulated)
-// CAP(C38, CAP_U(25)) -- part of voltage converter (not emulated)
-// CAP(C39, CAP_U(25)) -- part of voltage converter (not emulated)
-// CAP(C40, CAP_U()) -- part of voltage converter (not emulated)
-// CAP(C41, CAP_U(25)) -- part of voltage converter (not emulated)
-// CAP(C42, CAP_U(0.1)) -- part of voltage converter (not emulated)
+// CAP(C33, CAP_U(0.1)) -- part of voltage converter (not emulated)
+// CAP(C34, CAP_U(25)) -- part of voltage converter (not emulated)
+// CAP(C35, CAP_U(25)) -- part of voltage converter (not emulated)
+// CAP(C36, CAP_U()) -- part of voltage converter (not emulated)
+// CAP(C37, CAP_U(0.1)) -- part of voltage converter (not emulated)
+// CAP(C38, CAP_U(25)) -- part of voltage converter (not emulated)
+// CAP(C39, CAP_U(25)) -- part of voltage converter (not emulated)
+// CAP(C40, CAP_U()) -- part of voltage converter (not emulated)
+// CAP(C41, CAP_U(25)) -- part of voltage converter (not emulated)
+// CAP(C42, CAP_U(0.1)) -- part of voltage converter (not emulated)
D_1N5240(D1)
D_1N914(D2)
@@ -234,24 +234,24 @@ NETLIST_START(ripoff)
D_1N5240(D12)
D_1N5240(D13)
- Q_2N3906(Q1) // PNP
- Q_2N3906(Q2) // PNP
- Q_2N3906(Q3) // PNP
- Q_2N3906(Q4) // PNP
- Q_2N3906(Q5) // PNP
-// Q_2N6292(Q6) // PNP -- part of final amp (not emulated)
-// Q_2N6107(Q7) // PNP -- part of final amp (not emulated)
- Q_2N3904(Q8) // NPN
- Q_2N3904(Q9) // NPN
- Q_2N3904(Q10) // NPN
+ Q_2N3906(Q1) // PNP
+ Q_2N3906(Q2) // PNP
+ Q_2N3906(Q3) // PNP
+ Q_2N3906(Q4) // PNP
+ Q_2N3906(Q5) // PNP
+// Q_2N6292(Q6) // PNP -- part of final amp (not emulated)
+// Q_2N6107(Q7) // PNP -- part of final amp (not emulated)
+ Q_2N3904(Q8) // NPN
+ Q_2N3904(Q9) // NPN
+ Q_2N3904(Q10) // NPN
- AMI_S2688(IC1) // Noise generator
+ AMI_S2688(IC1) // Noise generator
- TL081_DIP(IC2) // Op. Amp.
+ TL081_DIP(IC2) // Op. Amp.
NET_C(IC2.7, I_V15)
NET_C(IC2.4, I_VM15)
- CA3080_DIP(IC3) // Op. Amp.
+ CA3080_DIP(IC3) // Op. Amp.
NET_C(IC3.4, I_VM15)
NET_C(IC3.7, I_V15)
@@ -259,74 +259,74 @@ NETLIST_START(ripoff)
LM555_DIP(IC5)
- CA3080_DIP(IC6) // Op. Amp.
+ CA3080_DIP(IC6) // Op. Amp.
NET_C(IC6.4, I_VM15)
NET_C(IC6.7, I_V15)
- TL081_DIP(IC7) // Op. Amp.
+ TL081_DIP(IC7) // Op. Amp.
NET_C(IC7.7, I_V15)
NET_C(IC7.4, I_VM15)
- TTL_74LS164_DIP(IC8) // 8-bit Shift Reg.
+ TTL_74LS164_DIP(IC8) // 8-bit Shift Reg.
NET_C(IC8.7, GND)
NET_C(IC8.14, I_V5)
- TTL_74LS377_DIP(IC9) // Octal D Flip Flop
+ TTL_74LS377_DIP(IC9) // Octal D Flip Flop
NET_C(IC9.10, GND)
NET_C(IC9.20, I_V5)
- TTL_7406_DIP(IC10) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(IC10) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(IC10.7, GND)
NET_C(IC10.14, I_V5)
LM555_DIP(IC11)
- CA3080_DIP(IC12) // Op. Amp.
+ CA3080_DIP(IC12) // Op. Amp.
NET_C(IC12.4, I_VM15)
NET_C(IC12.7, I_V15)
LM555_DIP(IC13)
- TL081_DIP(IC14) // Op. Amp.
+ TL081_DIP(IC14) // Op. Amp.
NET_C(IC14.7, I_V15)
NET_C(IC14.4, I_VM15)
- TL081_DIP(IC15) // Op. Amp.
+ TL081_DIP(IC15) // Op. Amp.
NET_C(IC15.7, I_V15)
NET_C(IC15.4, I_VM15)
- TL081_DIP(IC16) // Op. Amp.
+ TL081_DIP(IC16) // Op. Amp.
NET_C(IC16.7, I_V15)
NET_C(IC16.4, I_VM15)
- TL081_DIP(IC17) // Op. Amp.
+ TL081_DIP(IC17) // Op. Amp.
NET_C(IC17.7, I_V15)
NET_C(IC17.4, I_VM15)
- TTL_74LS393_DIP(IC18) // Dual 4 Bit B.C.
+ TTL_74LS393_DIP(IC18) // Dual 4 Bit B.C.
NET_C(IC18.7, GND)
NET_C(IC18.14, I_V5)
- TL081_DIP(IC19) // Op. Amp.
+ TL081_DIP(IC19) // Op. Amp.
NET_C(IC19.7, I_V15)
NET_C(IC19.4, I_VM15)
- TL081_DIP(IC20) // Op. Amp.
+ TL081_DIP(IC20) // Op. Amp.
NET_C(IC20.7, I_V15)
NET_C(IC20.4, I_VM15)
- TL081_DIP(IC21) // Op. Amp.
+ TL081_DIP(IC21) // Op. Amp.
NET_C(IC21.7, I_V15)
NET_C(IC21.4, I_VM15)
- TTL_74LS393_DIP(IC22) // Dual 4 Bit B.C.
+ TTL_74LS393_DIP(IC22) // Dual 4 Bit B.C.
NET_C(IC22.7, GND)
NET_C(IC22.14, I_V5)
-// TTL_7915_DIP(IC23) // -15V Regulator -- not emulated
-// TTL_7815_DIP(IC24) // +15V Regulator -- not emulated
+// TTL_7915_DIP(IC23) // -15V Regulator -- not emulated
+// TTL_7815_DIP(IC24) // +15V Regulator -- not emulated
- TTL_7414_DIP(IC25) // Hex Inverter
+ TTL_7414_DIP(IC25) // Hex Inverter
NET_C(IC25.7, GND)
NET_C(IC25.14, I_V5)
@@ -335,7 +335,7 @@ NETLIST_START(ripoff)
//
NET_C(I_OUT_7, R7.1, IC4.2)
- NET_C(IC4.8, IC4.4, I_V5) // pin 4 not documented in schematics
+ NET_C(IC4.8, IC4.4, I_V5) // pin 4 not documented in schematics
NET_C(R7.2, I_V5)
NET_C(R8.2, I_V5)
NET_C(R8.1, IC4.6, IC4.7, C6.1)
@@ -402,7 +402,7 @@ NETLIST_START(ripoff)
NET_C(IC10.4, R27.2, R28.1)
NET_C(IC9.6, IC10.5)
NET_C(IC10.6, R29.2, R30.1)
- NET_C(R29.1, R27.1, R25.1, D1.K, R23.1) // also R50.2 if present
+ NET_C(R29.1, R27.1, R25.1, D1.K, R23.1) // also R50.2 if present
NET_C(R23.2, I_V15)
NET_C(D1.A, GND)
NET_C(R26.2, R28.2, R30.2, R76.1, IC19.2) // also R50.1 if present
@@ -671,31 +671,31 @@ NETLIST_START(ripoff)
//
NET_C(GND, IC9.17, IC9.18, IC10.9, IC22.12, IC22.13)
- NET_C(GND, IC14.2, IC14.3, IC15.2, IC15.3) // part of final amp
+ NET_C(GND, IC14.2, IC14.3, IC15.2, IC15.3) // part of final amp
//
// Unconnected outputs
//
- HINT(IC9.16, NC) // Q6
- HINT(IC9.19, NC) // Q7
- HINT(IC10.8, NC) // QD
- HINT(IC22.11, NC) // Q0
- HINT(IC22.10, NC) // Q1
- HINT(IC22.9, NC) // Q2
- HINT(IC22.8, NC) // Q3
+ HINT(IC9.16, NC) // Q6
+ HINT(IC9.19, NC) // Q7
+ HINT(IC10.8, NC) // QD
+ HINT(IC22.11, NC) // Q0
+ HINT(IC22.10, NC) // Q1
+ HINT(IC22.9, NC) // Q2
+ HINT(IC22.8, NC) // Q3
#if (ENABLE_FRONTIERS)
//
// Split explosion/beep/motor from other sources
//
- OPTIMIZE_FRONTIER(R45.2, RES_M(1), 50)
- OPTIMIZE_FRONTIER(IC7.3, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R45.2, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(IC7.3, RES_M(1), 50)
//
// Split noise generator from consumers
//
- OPTIMIZE_FRONTIER(R1.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R1.1, RES_M(1), 50)
#endif
NETLIST_END()
diff --git a/src/mame/audio/nl_solarq.cpp b/src/mame/audio/nl_solarq.cpp
index 6e2a8ec464f..57452afabfe 100644
--- a/src/mame/audio/nl_solarq.cpp
+++ b/src/mame/audio/nl_solarq.cpp
@@ -47,177 +47,177 @@
NETLIST_START(solarq)
- SOLVER(Solver, 1000)
+ SOLVER(Solver, 1000)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 4e-5)
- TTL_INPUT(I_OUT_0, 0) // active high
- TTL_INPUT(I_OUT_1, 0) // active high
- TTL_INPUT(I_OUT_2, 0) // active high
- TTL_INPUT(I_OUT_3, 0) // active high
- TTL_INPUT(I_OUT_4, 0) // active high
- TTL_INPUT(I_OUT_7, 0) // active high
-
- NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND, I_OUT_7.GND)
- NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC, I_OUT_7.VCC)
-
- CINEMAT_LOCAL_MODELS
-
- ANALOG_INPUT(I_V5, 5)
- ANALOG_INPUT(I_V15, 15)
- ANALOG_INPUT(I_VM15, -15)
-
- RES(R1, RES_K(1))
- RES(R2, RES_K(1))
- RES(R3, RES_K(1))
- RES(R4, RES_K(2))
- RES(R5, RES_K(15))
- RES(R6, 390)
- RES(R7, RES_M(1))
- RES(R8, RES_K(4.7))
- RES(R9, 330)
- RES(R10, 330)
- RES(R11, RES_K(4.7))
- RES(R12, RES_K(20))
- RES(R13, RES_K(24))
- RES(R14, RES_M(1))
- RES(R15, RES_K(6.8))
- RES(R16, RES_K(18))
- RES(R17, RES_K(47))
- RES(R18, 390)
- RES(R19, 390)
- RES(R20, RES_K(4.7))
- RES(R21, RES_K(2.7))
- RES(R22, RES_K(4.7))
- RES(R23, RES_K(39))
- RES(R24, RES_K(12))
- RES(R25, RES_K(1))
- RES(R26, RES_K(75))
- RES(R27, RES_K(4.7))
- RES(R28, RES_K(2.7))
- RES(R29, RES_K(4.7))
- RES(R30, RES_K(39))
- RES(R31, RES_K(12))
- RES(R32, RES_K(1))
- RES(R33, RES_K(200))
- RES(R34, RES_K(8.2))
- RES(R35, RES_K(47))
- RES(R36, RES_K(22))
- RES(R37, RES_K(1))
- RES(R38, RES_K(1))
- RES(R39, RES_K(4.7))
- RES(R40, RES_K(2.7))
- RES(R41, RES_K(4.7))
- RES(R42, RES_K(39))
- RES(R43, RES_K(12))
- RES(R44, RES_K(1))
- RES(R45, RES_K(36))
- RES(R46, RES_K(100))
- RES(R47, RES_K(2))
- RES(R48, RES_M(1))
- RES(R49, RES_K(4.7))
- RES(R50, RES_K(2.7))
- RES(R51, RES_K(4.7))
- RES(R52, RES_K(39))
- RES(R53, RES_K(2.7))
- RES(R54, RES_K(12))
+ TTL_INPUT(I_OUT_0, 0) // active high
+ TTL_INPUT(I_OUT_1, 0) // active high
+ TTL_INPUT(I_OUT_2, 0) // active high
+ TTL_INPUT(I_OUT_3, 0) // active high
+ TTL_INPUT(I_OUT_4, 0) // active high
+ TTL_INPUT(I_OUT_7, 0) // active high
+
+ NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND, I_OUT_7.GND)
+ NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC, I_OUT_7.VCC)
+
+ CINEMAT_LOCAL_MODELS
+
+ ANALOG_INPUT(I_V5, 5)
+ ANALOG_INPUT(I_V15, 15)
+ ANALOG_INPUT(I_VM15, -15)
+
+ RES(R1, RES_K(1))
+ RES(R2, RES_K(1))
+ RES(R3, RES_K(1))
+ RES(R4, RES_K(2))
+ RES(R5, RES_K(15))
+ RES(R6, 390)
+ RES(R7, RES_M(1))
+ RES(R8, RES_K(4.7))
+ RES(R9, 330)
+ RES(R10, 330)
+ RES(R11, RES_K(4.7))
+ RES(R12, RES_K(20))
+ RES(R13, RES_K(24))
+ RES(R14, RES_M(1))
+ RES(R15, RES_K(6.8))
+ RES(R16, RES_K(18))
+ RES(R17, RES_K(47))
+ RES(R18, 390)
+ RES(R19, 390)
+ RES(R20, RES_K(4.7))
+ RES(R21, RES_K(2.7))
+ RES(R22, RES_K(4.7))
+ RES(R23, RES_K(39))
+ RES(R24, RES_K(12))
+ RES(R25, RES_K(1))
+ RES(R26, RES_K(75))
+ RES(R27, RES_K(4.7))
+ RES(R28, RES_K(2.7))
+ RES(R29, RES_K(4.7))
+ RES(R30, RES_K(39))
+ RES(R31, RES_K(12))
+ RES(R32, RES_K(1))
+ RES(R33, RES_K(200))
+ RES(R34, RES_K(8.2))
+ RES(R35, RES_K(47))
+ RES(R36, RES_K(22))
+ RES(R37, RES_K(1))
+ RES(R38, RES_K(1))
+ RES(R39, RES_K(4.7))
+ RES(R40, RES_K(2.7))
+ RES(R41, RES_K(4.7))
+ RES(R42, RES_K(39))
+ RES(R43, RES_K(12))
+ RES(R44, RES_K(1))
+ RES(R45, RES_K(36))
+ RES(R46, RES_K(100))
+ RES(R47, RES_K(2))
+ RES(R48, RES_M(1))
+ RES(R49, RES_K(4.7))
+ RES(R50, RES_K(2.7))
+ RES(R51, RES_K(4.7))
+ RES(R52, RES_K(39))
+ RES(R53, RES_K(2.7))
+ RES(R54, RES_K(12))
// RES(R55, xx) -- deleted
// RES(R56, xx) -- deleted
// RES(R57, xx) -- deleted
- RES(R58, RES_K(8.2))
- RES(R59, RES_K(51))
- RES(R60, RES_M(1))
- RES(R61, RES_K(20))
- RES(R62, RES_K(20))
- RES(R63, 100)
- RES(R64, RES_K(100))
- RES(R65, RES_K(20))
- RES(R66, RES_K(2))
- RES(R67, 100)
- RES(R68, RES_K(100))
- RES(R69, RES_K(20))
- RES(R70, RES_K(20))
- RES(R71, RES_K(13))
- RES(R72, RES_K(300))
- RES(R73, 100)
- RES(R74, 100)
- RES(R75, RES_K(4.7))
- RES(R76, RES_K(2.7))
- RES(R77, RES_K(4.7))
- RES(R78, RES_K(39))
- RES(R79, RES_K(12))
- RES(R80, RES_K(1))
- RES(R81, RES_K(360))
- RES(R82, RES_K(4.7))
- RES(R83, RES_K(2.7))
- RES(R84, RES_K(4.7))
- RES(R85, RES_K(39))
- RES(R86, RES_K(12))
- RES(R87, RES_K(2.7))
- RES(R88, RES_K(270))
- RES(R89, RES_K(51))
- RES(R90, RES_M(1))
- RES(R91, RES_K(10))
- RES(R92, RES_K(10))
- RES(R93, RES_K(1))
- RES(R94, RES_K(2))
- RES(R95, RES_K(10))
- RES(R96, RES_K(12))
- RES(R97, RES_K(1))
- RES(R98, RES_K(10))
- RES(R99, RES_K(11))
- RES(R100, RES_K(100))
- RES(R101, RES_K(100))
- RES(R102, RES_K(240))
- RES(R103, RES_K(100))
- RES(R104, RES_K(100))
- RES(R105, RES_K(100))
- RES(R106, 200)
- RES(R107, 200)
- RES(R108, RES_K(120))
- RES(R109, RES_M(10))
- RES(R110, RES_K(100))
- RES(R111, 200)
- RES(R112, 200)
- RES(R113, RES_K(4.7))
- RES(R114, RES_K(2.7))
- RES(R115, RES_K(4.7))
- RES(R116, RES_K(39))
- RES(R117, RES_K(12))
- RES(R118, RES_K(1))
- RES(R119, RES_K(120))
- RES(R120, RES_M(10))
- RES(R121, RES_K(4.7))
- RES(R122, RES_M(1.5))
- RES(R123, 390)
- RES(R124, 390)
- RES(R125, RES_K(4.7))
- RES(R126, RES_K(2.7))
- RES(R127, RES_K(4.7))
- RES(R128, RES_K(39))
- RES(R129, RES_K(12))
- RES(R130, RES_K(1))
+ RES(R58, RES_K(8.2))
+ RES(R59, RES_K(51))
+ RES(R60, RES_M(1))
+ RES(R61, RES_K(20))
+ RES(R62, RES_K(20))
+ RES(R63, 100)
+ RES(R64, RES_K(100))
+ RES(R65, RES_K(20))
+ RES(R66, RES_K(2))
+ RES(R67, 100)
+ RES(R68, RES_K(100))
+ RES(R69, RES_K(20))
+ RES(R70, RES_K(20))
+ RES(R71, RES_K(13))
+ RES(R72, RES_K(300))
+ RES(R73, 100)
+ RES(R74, 100)
+ RES(R75, RES_K(4.7))
+ RES(R76, RES_K(2.7))
+ RES(R77, RES_K(4.7))
+ RES(R78, RES_K(39))
+ RES(R79, RES_K(12))
+ RES(R80, RES_K(1))
+ RES(R81, RES_K(360))
+ RES(R82, RES_K(4.7))
+ RES(R83, RES_K(2.7))
+ RES(R84, RES_K(4.7))
+ RES(R85, RES_K(39))
+ RES(R86, RES_K(12))
+ RES(R87, RES_K(2.7))
+ RES(R88, RES_K(270))
+ RES(R89, RES_K(51))
+ RES(R90, RES_M(1))
+ RES(R91, RES_K(10))
+ RES(R92, RES_K(10))
+ RES(R93, RES_K(1))
+ RES(R94, RES_K(2))
+ RES(R95, RES_K(10))
+ RES(R96, RES_K(12))
+ RES(R97, RES_K(1))
+ RES(R98, RES_K(10))
+ RES(R99, RES_K(11))
+ RES(R100, RES_K(100))
+ RES(R101, RES_K(100))
+ RES(R102, RES_K(240))
+ RES(R103, RES_K(100))
+ RES(R104, RES_K(100))
+ RES(R105, RES_K(100))
+ RES(R106, 200)
+ RES(R107, 200)
+ RES(R108, RES_K(120))
+ RES(R109, RES_M(10))
+ RES(R110, RES_K(100))
+ RES(R111, 200)
+ RES(R112, 200)
+ RES(R113, RES_K(4.7))
+ RES(R114, RES_K(2.7))
+ RES(R115, RES_K(4.7))
+ RES(R116, RES_K(39))
+ RES(R117, RES_K(12))
+ RES(R118, RES_K(1))
+ RES(R119, RES_K(120))
+ RES(R120, RES_M(10))
+ RES(R121, RES_K(4.7))
+ RES(R122, RES_M(1.5))
+ RES(R123, 390)
+ RES(R124, 390)
+ RES(R125, RES_K(4.7))
+ RES(R126, RES_K(2.7))
+ RES(R127, RES_K(4.7))
+ RES(R128, RES_K(39))
+ RES(R129, RES_K(12))
+ RES(R130, RES_K(1))
// RES(R131, xx) -- deleted
- RES(R132, RES_K(75))
- RES(R133, RES_K(4.7))
- RES(R134, RES_K(2.7))
- RES(R135, RES_K(4.7))
- RES(R136, RES_K(39))
- RES(R137, RES_K(12))
- RES(R138, RES_K(1))
- RES(R139, RES_K(51))
- RES(R140, RES_K(100))
- RES(R141, RES_K(4.7))
- RES(R142, RES_K(2.7))
- RES(R143, RES_K(4.7))
- RES(R144, RES_K(39))
- RES(R145, RES_K(12))
- RES(R146, RES_K(1))
- RES(R147, RES_K(51))
- RES(R148, RES_K(200))
- RES(R149, RES_K(30))
- RES(R150, RES_K(8.2))
- RES(R151, RES_K(51))
+ RES(R132, RES_K(75))
+ RES(R133, RES_K(4.7))
+ RES(R134, RES_K(2.7))
+ RES(R135, RES_K(4.7))
+ RES(R136, RES_K(39))
+ RES(R137, RES_K(12))
+ RES(R138, RES_K(1))
+ RES(R139, RES_K(51))
+ RES(R140, RES_K(100))
+ RES(R141, RES_K(4.7))
+ RES(R142, RES_K(2.7))
+ RES(R143, RES_K(4.7))
+ RES(R144, RES_K(39))
+ RES(R145, RES_K(12))
+ RES(R146, RES_K(1))
+ RES(R147, RES_K(51))
+ RES(R148, RES_K(200))
+ RES(R149, RES_K(30))
+ RES(R150, RES_K(8.2))
+ RES(R151, RES_K(51))
// POT(R152, RES_K(10)) -- part of final amp (not emulated)
// RES(R153, RES_K(15)) -- part of final amp (not emulated)
// RES(R154, RES_K(390)) -- part of final amp (not emulated)
@@ -227,42 +227,42 @@ NETLIST_START(solarq)
// RES(R158, 0.51) -- part of final amp (not emulated)
// RES(R159, 0.51) -- part of final amp (not emulated)
// RES(R160, RES_K(390)) -- part of final amp (not emulated)
- RES(R161, RES_K(1))
- RES(R162, RES_K(1))
- RES(R163, RES_K(1))
- RES(R164, RES_K(1))
-
- CAP(C1, CAP_U(0.001))
- CAP(C2, CAP_U(0.01))
- CAP(C3, CAP_U(0.1))
- CAP(C4, CAP_P(680))
- CAP(C5, CAP_U(0.1))
- CAP(C6, CAP_U(0.1))
- CAP(C7, CAP_U(0.01))
- CAP(C8, CAP_U(3.3))
- CAP(C9, CAP_U(1))
- CAP(C10, CAP_U(0.22))
- CAP(C11, CAP_U(0.33))
- CAP(C12, CAP_U(4.7))
- CAP(C13, CAP_U(0.1))
- CAP(C14, CAP_U(0.01))
- CAP(C15, CAP_U(1))
- CAP(C16, CAP_U(0.1))
- CAP(C17, CAP_U(1))
- CAP(C18, CAP_U(0.47))
- CAP(C19, CAP_U(0.001))
- CAP(C20, CAP_U(0.01))
- CAP(C21, CAP_U(0.1))
- CAP(C22, CAP_U(0.1))
- CAP(C23, CAP_P(330))
- CAP(C24, CAP_U(0.68))
- CAP(C25, CAP_P(330))
- CAP(C26, CAP_U(2.2))
- CAP(C27, CAP_U(0.22))
- CAP(C28, CAP_U(2.2))
- CAP(C29, CAP_U(2.2))
- CAP(C30, CAP_U(0.1))
- CAP(C31, CAP_U(0.33))
+ RES(R161, RES_K(1))
+ RES(R162, RES_K(1))
+ RES(R163, RES_K(1))
+ RES(R164, RES_K(1))
+
+ CAP(C1, CAP_U(0.001))
+ CAP(C2, CAP_U(0.01))
+ CAP(C3, CAP_U(0.1))
+ CAP(C4, CAP_P(680))
+ CAP(C5, CAP_U(0.1))
+ CAP(C6, CAP_U(0.1))
+ CAP(C7, CAP_U(0.01))
+ CAP(C8, CAP_U(3.3))
+ CAP(C9, CAP_U(1))
+ CAP(C10, CAP_U(0.22))
+ CAP(C11, CAP_U(0.33))
+ CAP(C12, CAP_U(4.7))
+ CAP(C13, CAP_U(0.1))
+ CAP(C14, CAP_U(0.01))
+ CAP(C15, CAP_U(1))
+ CAP(C16, CAP_U(0.1))
+ CAP(C17, CAP_U(1))
+ CAP(C18, CAP_U(0.47))
+ CAP(C19, CAP_U(0.001))
+ CAP(C20, CAP_U(0.01))
+ CAP(C21, CAP_U(0.1))
+ CAP(C22, CAP_U(0.1))
+ CAP(C23, CAP_P(330))
+ CAP(C24, CAP_U(0.68))
+ CAP(C25, CAP_P(330))
+ CAP(C26, CAP_U(2.2))
+ CAP(C27, CAP_U(0.22))
+ CAP(C28, CAP_U(2.2))
+ CAP(C29, CAP_U(2.2))
+ CAP(C30, CAP_U(0.1))
+ CAP(C31, CAP_U(0.33))
// CAP(C32, CAP_U(0.68)) -- part of final amp (not emulated)
// CAP(C33, CAP_P(470)) -- part of final amp (not emulated)
// CAP(C34, CAP_P(470)) -- part of final amp (not emulated)
@@ -280,826 +280,826 @@ NETLIST_START(solarq)
// D_1N4003(D2) -- part of voltage converter (not emulated)
// D_1N4003(D3) -- part of voltage converter (not emulated)
// D_1N4003(D4) -- part of voltage converter (not emulated)
- D_1N5240(D5)
- D_1N5240(D6)
- D_1N914(D7)
- D_1N914(D8)
+ D_1N5240(D5)
+ D_1N5240(D6)
+ D_1N914(D7)
+ D_1N914(D8)
// D_1N4003(D9) -- part of final amp (not emulated)
// D_1N4003(D10) -- part of final amp (not emulated)
- Q_2N3906(Q1) // PNP
- Q_2N3906(Q2) // PNP
- Q_2N3906(Q3) // PNP
- Q_2N3906(Q4) // PNP
- Q_2N3906(Q5) // PNP
- Q_2N3906(Q6) // PNP
- Q_2N3906(Q7) // PNP
- Q_2N3904(Q8) // NPN
- Q_2N3906(Q9) // PNP
- Q_2N3906(Q10) // PNP
- Q_2N3906(Q11) // PNP
- Q_2N3904(Q12) // NPN
- Q_2N3904(Q13) // NPN
- Q_2N3906(Q14) // PNP
- Q_2N3906(Q15) // PNP
- Q_2N3906(Q16) // PNP
- Q_2N3906(Q17) // PNP
- Q_2N3906(Q18) // PNP
- Q_2N3906(Q19) // PNP
- Q_2N3906(Q20) // PNP
- Q_2N3906(Q21) // PNP
+ Q_2N3906(Q1) // PNP
+ Q_2N3906(Q2) // PNP
+ Q_2N3906(Q3) // PNP
+ Q_2N3906(Q4) // PNP
+ Q_2N3906(Q5) // PNP
+ Q_2N3906(Q6) // PNP
+ Q_2N3906(Q7) // PNP
+ Q_2N3904(Q8) // NPN
+ Q_2N3906(Q9) // PNP
+ Q_2N3906(Q10) // PNP
+ Q_2N3906(Q11) // PNP
+ Q_2N3904(Q12) // NPN
+ Q_2N3904(Q13) // NPN
+ Q_2N3906(Q14) // PNP
+ Q_2N3906(Q15) // PNP
+ Q_2N3906(Q16) // PNP
+ Q_2N3906(Q17) // PNP
+ Q_2N3906(Q18) // PNP
+ Q_2N3906(Q19) // PNP
+ Q_2N3906(Q20) // PNP
+ Q_2N3906(Q21) // PNP
// Q_2N6292(Q22) // NPN -- part of final amp (not emulated)
// Q_2N6107(Q23) // PNP -- part of final amp (not emulated)
#if (!HLE_MUSIC_CLOCK)
- CLOCK(Y1, 20000000)
- NET_C(Y1.GND, GND)
- NET_C(Y1.VCC, I_V5)
+ CLOCK(Y1, 20000000)
+ NET_C(Y1.GND, GND)
+ NET_C(Y1.VCC, I_V5)
#endif
- TTL_7414_DIP(U1) // Hex Inverter
- NET_C(U1.7, GND)
- NET_C(U1.14, I_V5)
+ TTL_7414_DIP(U1) // Hex Inverter
+ NET_C(U1.7, GND)
+ NET_C(U1.14, I_V5)
- TTL_7414_DIP(U2) // Hex Inverter
- NET_C(U2.7, GND)
- NET_C(U2.14, I_V5)
+ TTL_7414_DIP(U2) // Hex Inverter
+ NET_C(U2.7, GND)
+ NET_C(U2.14, I_V5)
- TTL_74LS164_DIP(U3) // 8-bit Shift Reg.
- NET_C(U3.7, GND)
- NET_C(U3.14, I_V5)
+ TTL_74LS164_DIP(U3) // 8-bit Shift Reg.
+ NET_C(U3.7, GND)
+ NET_C(U3.14, I_V5)
- TTL_74LS164_DIP(U4) // 8-bit Shift Reg.
- NET_C(U4.7, GND)
- NET_C(U4.14, I_V5)
+ TTL_74LS164_DIP(U4) // 8-bit Shift Reg.
+ NET_C(U4.7, GND)
+ NET_C(U4.14, I_V5)
- TTL_74LS377_DIP(U5) // Octal D Flip Flop
- NET_C(U5.10, GND)
- NET_C(U5.20, I_V5)
+ TTL_74LS377_DIP(U5) // Octal D Flip Flop
+ NET_C(U5.10, GND)
+ NET_C(U5.20, I_V5)
- TTL_74LS377_DIP(U6) // Octal D Flip Flop
- NET_C(U6.10, GND)
- NET_C(U6.20, I_V5)
+ TTL_74LS377_DIP(U6) // Octal D Flip Flop
+ NET_C(U6.10, GND)
+ NET_C(U6.20, I_V5)
- TTL_74LS377_DIP(U7) // Octal D Flip Flop
- NET_C(U7.10, GND)
- NET_C(U7.20, I_V5)
+ TTL_74LS377_DIP(U7) // Octal D Flip Flop
+ NET_C(U7.10, GND)
+ NET_C(U7.20, I_V5)
- TTL_74LS163_DIP(U8) // Binary Counter
- NET_C(U8.8, GND)
- NET_C(U8.16, I_V5)
+ TTL_74LS163_DIP(U8) // Binary Counter
+ NET_C(U8.8, GND)
+ NET_C(U8.16, I_V5)
- TTL_74LS163_DIP(U9) // Binary Counter
- NET_C(U9.8, GND)
- NET_C(U9.16, I_V5)
+ TTL_74LS163_DIP(U9) // Binary Counter
+ NET_C(U9.8, GND)
+ NET_C(U9.16, I_V5)
- TTL_74LS163_DIP(U10) // Binary Counter
- NET_C(U10.8, GND)
- NET_C(U10.16, I_V5)
+ TTL_74LS163_DIP(U10) // Binary Counter
+ NET_C(U10.8, GND)
+ NET_C(U10.16, I_V5)
- TTL_74LS163_DIP(U11) // Binary Counter
- NET_C(U11.8, GND)
- NET_C(U11.16, I_V5)
+ TTL_74LS163_DIP(U11) // Binary Counter
+ NET_C(U11.8, GND)
+ NET_C(U11.16, I_V5)
- TTL_74LS163_DIP(U12) // Binary Counter
- NET_C(U12.8, GND)
- NET_C(U12.16, I_V5)
+ TTL_74LS163_DIP(U12) // Binary Counter
+ NET_C(U12.8, GND)
+ NET_C(U12.16, I_V5)
- LM555_DIP(U13)
+ LM555_DIP(U13)
- TTL_74LS74_DIP(U14) // Dual D Flip Flop
- NET_C(U14.7, GND)
- NET_C(U14.14, I_V5)
+ TTL_74LS74_DIP(U14) // Dual D Flip Flop
+ NET_C(U14.7, GND)
+ NET_C(U14.14, I_V5)
- TTL_74LS74_DIP(U15) // Dual D Flip Flop
- NET_C(U15.7, GND)
- NET_C(U15.14, I_V5)
+ TTL_74LS74_DIP(U15) // Dual D Flip Flop
+ NET_C(U15.7, GND)
+ NET_C(U15.14, I_V5)
- TTL_74LS107_DIP(U16) // DUAL J-K FLIP-FLOPS WITH CLEAR
+ TTL_74LS107_DIP(U16) // DUAL J-K FLIP-FLOPS WITH CLEAR
NET_C(U16.7, GND)
NET_C(U16.14, I_V5)
- TTL_74LS393_DIP(U17) // Dual 4-Stage Binary Counter
- NET_C(U17.7, GND)
- NET_C(U17.14, I_V5)
+ TTL_74LS393_DIP(U17) // Dual 4-Stage Binary Counter
+ NET_C(U17.7, GND)
+ NET_C(U17.14, I_V5)
- TTL_74LS86_DIP(U18) // Quad 2-Input XOR Gates
+ TTL_74LS86_DIP(U18) // Quad 2-Input XOR Gates
NET_C(U18.7, GND)
NET_C(U18.14, I_V5)
- TTL_74LS74_DIP(U19) // Dual D Flip Flop
- NET_C(U19.7, GND)
- NET_C(U19.14, I_V5)
+ TTL_74LS74_DIP(U19) // Dual D Flip Flop
+ NET_C(U19.7, GND)
+ NET_C(U19.14, I_V5)
- TTL_74LS74_DIP(U20) // Dual D Flip Flop
- NET_C(U20.7, GND)
- NET_C(U20.14, I_V5)
+ TTL_74LS74_DIP(U20) // Dual D Flip Flop
+ NET_C(U20.7, GND)
+ NET_C(U20.14, I_V5)
- TTL_74LS393_DIP(U21) // Dual 4-Stage Binary Counter
- NET_C(U21.7, GND)
- NET_C(U21.14, I_V5)
+ TTL_74LS393_DIP(U21) // Dual 4-Stage Binary Counter
+ NET_C(U21.7, GND)
+ NET_C(U21.14, I_V5)
- TTL_74LS02_DIP(U22) // Quad 2-input Nor Gate
- NET_C(U22.7, GND)
- NET_C(U22.14, I_V5)
+ TTL_74LS02_DIP(U22) // Quad 2-input Nor Gate
+ NET_C(U22.7, GND)
+ NET_C(U22.14, I_V5)
- TTL_74LS74_DIP(U23) // Dual D Flip Flop
- NET_C(U23.7, GND)
- NET_C(U23.14, I_V5)
+ TTL_74LS74_DIP(U23) // Dual D Flip Flop
+ NET_C(U23.7, GND)
+ NET_C(U23.14, I_V5)
- TTL_74S04_DIP(U24) // Hex Inverting Gates
+ TTL_74S04_DIP(U24) // Hex Inverting Gates
NET_C(U24.7, GND)
NET_C(U24.14, I_V5)
- TTL_74S113A_DIP(U25) // Dual JK Negative Edge-Trigged Flip Flop
+ TTL_74S113A_DIP(U25) // Dual JK Negative Edge-Trigged Flip Flop
NET_C(U25.7, GND)
NET_C(U25.14, I_V5)
- TTL_74LS163_DIP(U26) // Binary Counter
- NET_C(U26.8, GND)
- NET_C(U26.16, I_V5)
+ TTL_74LS163_DIP(U26) // Binary Counter
+ NET_C(U26.8, GND)
+ NET_C(U26.16, I_V5)
- TTL_74LS107_DIP(U27) // DUAL J-K FLIP-FLOPS WITH CLEAR
+ TTL_74LS107_DIP(U27) // DUAL J-K FLIP-FLOPS WITH CLEAR
NET_C(U27.7, GND)
NET_C(U27.14, I_V5)
- TTL_74LS164_DIP(U28) // 8-bit Shift Reg.
- NET_C(U28.7, GND)
- NET_C(U28.14, I_V5)
+ TTL_74LS164_DIP(U28) // 8-bit Shift Reg.
+ NET_C(U28.7, GND)
+ NET_C(U28.14, I_V5)
- TTL_74LS164_DIP(U29) // 8-bit Shift Reg.
- NET_C(U29.7, GND)
- NET_C(U29.14, I_V5)
+ TTL_74LS164_DIP(U29) // 8-bit Shift Reg.
+ NET_C(U29.7, GND)
+ NET_C(U29.14, I_V5)
- TTL_74LS164_DIP(U30) // 8-bit Shift Reg.
- NET_C(U30.7, GND)
- NET_C(U30.14, I_V5)
+ TTL_74LS164_DIP(U30) // 8-bit Shift Reg.
+ NET_C(U30.7, GND)
+ NET_C(U30.14, I_V5)
- TTL_74LS393_DIP(U31) // Dual 4-Stage Binary Counter
- NET_C(U31.7, GND)
- NET_C(U31.14, I_V5)
+ TTL_74LS393_DIP(U31) // Dual 4-Stage Binary Counter
+ NET_C(U31.7, GND)
+ NET_C(U31.14, I_V5)
- TL081_DIP(U32) // Op. Amp.
- NET_C(U32.7, I_V15)
- NET_C(U32.4, I_VM15)
+ TL081_DIP(U32) // Op. Amp.
+ NET_C(U32.7, I_V15)
+ NET_C(U32.4, I_VM15)
- CA3080_DIP(U33) // Op. Amp.
- NET_C(U33.4, I_VM15)
- NET_C(U33.7, I_V15)
+ CA3080_DIP(U33) // Op. Amp.
+ NET_C(U33.4, I_VM15)
+ NET_C(U33.7, I_V15)
- CA3080_DIP(U34) // Op. Amp.
- NET_C(U34.4, I_VM15)
- NET_C(U34.7, I_V15)
+ CA3080_DIP(U34) // Op. Amp.
+ NET_C(U34.4, I_VM15)
+ NET_C(U34.7, I_V15)
- LM555_DIP(U35)
+ LM555_DIP(U35)
- TL081_DIP(U36) // Op. Amp.
- NET_C(U36.7, I_V15)
- NET_C(U36.4, I_VM15)
+ TL081_DIP(U36) // Op. Amp.
+ NET_C(U36.7, I_V15)
+ NET_C(U36.4, I_VM15)
- TL081_DIP(U37) // Op. Amp.
- NET_C(U37.7, I_V15)
- NET_C(U37.4, I_VM15)
+ TL081_DIP(U37) // Op. Amp.
+ NET_C(U37.7, I_V15)
+ NET_C(U37.4, I_VM15)
- TL081_DIP(U38) // Op. Amp.
- NET_C(U38.7, I_V15)
- NET_C(U38.4, I_VM15)
+ TL081_DIP(U38) // Op. Amp.
+ NET_C(U38.7, I_V15)
+ NET_C(U38.4, I_VM15)
- TL081_DIP(U39) // Op. Amp.
- NET_C(U39.7, I_V15)
- NET_C(U39.4, I_VM15)
+ TL081_DIP(U39) // Op. Amp.
+ NET_C(U39.7, I_V15)
+ NET_C(U39.4, I_VM15)
- TL081_DIP(U40) // Op. Amp.
- NET_C(U40.7, I_V15)
- NET_C(U40.4, I_VM15)
+ TL081_DIP(U40) // Op. Amp.
+ NET_C(U40.7, I_V15)
+ NET_C(U40.4, I_VM15)
- CA3080_DIP(U41) // Op. Amp.
- NET_C(U41.4, I_VM15)
- NET_C(U41.7, I_V15)
+ CA3080_DIP(U41) // Op. Amp.
+ NET_C(U41.4, I_VM15)
+ NET_C(U41.7, I_V15)
#if (!HLE_CAPTURE_VCO)
- LM566_DIP(U42)
+ LM566_DIP(U42)
#endif
- TL081_DIP(U43) // Op. Amp.
- NET_C(U43.7, I_V15)
- NET_C(U43.4, I_VM15)
+ TL081_DIP(U43) // Op. Amp.
+ NET_C(U43.7, I_V15)
+ NET_C(U43.4, I_VM15)
- CA3080_SLOW_DIP(U44) // Op. Amp.
- NET_C(U44.4, I_VM15)
- NET_C(U44.7, I_V15)
+ CA3080_SLOW_DIP(U44) // Op. Amp.
+ NET_C(U44.4, I_VM15)
+ NET_C(U44.7, I_V15)
- TL081_DIP(U45) // Op. Amp.
- NET_C(U45.7, I_V15)
- NET_C(U45.4, I_VM15)
+ TL081_DIP(U45) // Op. Amp.
+ NET_C(U45.7, I_V15)
+ NET_C(U45.4, I_VM15)
- CA3080_SLOW_DIP(U46) // Op. Amp.
- NET_C(U46.4, I_VM15)
- NET_C(U46.7, I_V15)
+ CA3080_SLOW_DIP(U46) // Op. Amp.
+ NET_C(U46.4, I_VM15)
+ NET_C(U46.7, I_V15)
- TL081_DIP(U47) // Op. Amp.
- NET_C(U47.7, I_V15)
- NET_C(U47.4, I_VM15)
+ TL081_DIP(U47) // Op. Amp.
+ NET_C(U47.7, I_V15)
+ NET_C(U47.4, I_VM15)
- CA3080_DIP(U48) // Op. Amp.
- NET_C(U48.4, I_VM15)
- NET_C(U48.7, I_V15)
+ CA3080_DIP(U48) // Op. Amp.
+ NET_C(U48.4, I_VM15)
+ NET_C(U48.7, I_V15)
- TL081_DIP(U49) // Op. Amp.
- NET_C(U49.7, I_V15)
- NET_C(U49.4, I_VM15)
+ TL081_DIP(U49) // Op. Amp.
+ NET_C(U49.7, I_V15)
+ NET_C(U49.4, I_VM15)
- TL081_DIP(U50) // Op. Amp.
- NET_C(U50.7, I_V15)
- NET_C(U50.4, I_VM15)
+ TL081_DIP(U50) // Op. Amp.
+ NET_C(U50.7, I_V15)
+ NET_C(U50.4, I_VM15)
-// TL081_DIP(U51) // Op. Amp. -- part of final amp (not emulated)
+// TL081_DIP(U51) // Op. Amp. -- part of final amp (not emulated)
// NET_C(U51.7, I_V15)
// NET_C(U51.4, I_VM15)
-// TTL_7815_DIP(U52) // +15V Regulator -- part of voltage converter (not emulated)
-// TTL_7915_DIP(U53) // -15V Regulator -- part of voltage converter (not emulated)
-
- //
- // Page 1, top left
- //
-
- NET_C(I_OUT_7, U1.1)
- NET_C(U1.2, U1.3)
- NET_C(U1.4, U3.1)
-
- NET_C(I_OUT_4, U1.5)
- NET_C(U1.6, U1.13)
- NET_C(U1.12, U3.8, U4.8)
-
- NET_C(I_V5, R1.1, R2.1, R3.1)
- ALIAS(HIA_P, R1.2)
- ALIAS(HIB_P, R2.2)
- ALIAS(HIC_P, R3.2)
-
- NET_C(HIA_P, U3.9, U3.2)
- NET_C(U3.3, U5.3, U7.3)
- NET_C(U3.4, U5.4, U7.4)
- NET_C(U3.5, U5.7, U7.7)
- NET_C(U3.6, U5.8, U7.8)
- NET_C(U3.10, U5.13, U7.13)
- NET_C(U3.11, U5.14, U7.14)
- NET_C(U3.12, U5.17, U7.17)
- NET_C(U3.13, U5.18, U7.18, U4.1)
-
- NET_C(HIA_P, U4.2, U4.9)
- NET_C(U4.3, U6.3)
- NET_C(U4.4, U6.4)
- NET_C(U4.5, U6.7)
- NET_C(U4.6, U6.8)
- NET_C(U4.10, U6.13)
- NET_C(U4.11, U6.14)
- NET_C(U4.12, U6.17)
- NET_C(U4.13, U6.18)
-
- ALIAS(MEN_P, U5.2)
- ALIAS(AS2_M, U5.5)
- ALIAS(AS1_M, U5.6)
- ALIAS(AS0_M, U5.9)
- ALIAS(FS11_P, U5.12)
- ALIAS(FS10_P, U5.15)
- ALIAS(FS09_P, U5.16)
- ALIAS(FS08_P, U5.19)
- ALIAS(MLATCH_P, U5.11)
- NET_C(U5.1, GND)
-
- ALIAS(FS07_P, U6.2)
- ALIAS(FS06_P, U6.5)
- ALIAS(FS05_P, U6.6)
- ALIAS(FS04_P, U6.9)
- ALIAS(FS03_P, U6.12)
- ALIAS(FS02_P, U6.15)
- ALIAS(FS01_P, U6.16)
- ALIAS(FS00_P, U6.19)
- NET_C(U6.11, MLATCH_P)
- NET_C(U6.1, GND)
-
- //
- // Page 1, bottom
- //
-
- NET_C(I_OUT_0, U2.3)
- NET_C(U2.4, U2.5)
- ALIAS(LATCH_CLK_P, U2.6)
-
- NET_C(I_OUT_1, U1.11)
- NET_C(U1.10, U1.9)
- NET_C(U1.8, U7.11)
-
- ALIAS(LOUD_EXP_M, U7.2)
- ALIAS(SOFT_EXP_M, U7.5)
- ALIAS(THRUST_M, U7.6)
- ALIAS(FIRE_M, U7.9)
- ALIAS(CAPTURE_M, U7.12)
- ALIAS(NUKE_P, U7.15)
- ALIAS(PHOTON_M, U7.16)
- HINT(U7.19, NC)
- NET_C(U7.1, GND)
-
- NET_C(HIA_P, U19.4, U19.1)
- ALIAS(MACLK_M, U19.2)
- ALIAS(_227KC_P, U19.3)
- ALIAS(MBCLK_P, U19.5)
- ALIAS(MBCLK_M, U19.6)
-
- NET_C(HIA_P, U19.10, U19.13)
- NET_C(MBCLK_P, U19.12)
- ALIAS(_227KC_M, U19.11)
- ALIAS(MACLK_P, U19.9)
- NET_C(U19.8, MACLK_M, U20.11)
-
- NET_C(HIA_P, U16.8, U16.11, U16.10)
- NET_C(U16.9, U20.9, U22.8)
- ALIAS(DMUSIC_P, U16.5)
- HINT(U16.6, NC)
-
- NET_C(HIA_P, U20.10)
- ALIAS(MCARRY_P, U20.12)
- NET_C(R162.1, I_V5)
- NET_C(R162.2, U20.13)
- ALIAS(MLOAD_M, U20.8)
-
- NET_C(MBCLK_M, U21.13)
- HINT(U21.8, NC)
- NET_C(U21.9, U22.11, U22.12)
- HINT(U21.10, NC)
- HINT(U21.11, NC)
- NET_C(U21.12, U20.6, U22.9)
-
- NET_C(HIA_P, U20.2, U20.4)
- NET_C(LATCH_CLK_P, U20.3)
- ALIAS(KILL_FLAG_M, U20.1)
- HINT(U20.5, NC)
-
- NET_C(U22.13, U23.10)
- NET_C(U22.10, U23.12)
- NET_C(MBCLK_P, U23.11)
- NET_C(HIA_P, U23.13)
- HINT(U23.8, NC)
- NET_C(U23.9, U23.2, MLATCH_P)
-
- NET_C(HIA_P, U23.4)
- NET_C(MACLK_P, U23.3)
- NET_C(I_V5, R163.1)
- NET_C(R163.2, U23.1)
- HINT(U23.5, NC)
- NET_C(U23.6, KILL_FLAG_M)
-
- //
- // Page 1, middle
- //
-
- NET_C(FS11_P, U8.6)
- NET_C(FS10_P, U8.5)
- NET_C(FS09_P, U8.4)
- NET_C(FS08_P, U8.3)
- NET_C(HIB_P, U8.1)
- NET_C(MEN_P, U8.7)
- NET_C(MLOAD_M, U8.9)
- NET_C(MBCLK_P, U8.2)
- NET_C(U8.10, U9.15)
- NET_C(U8.15, MCARRY_P)
- HINT(U8.11, NC)
- HINT(U8.12, NC)
- HINT(U8.13, NC)
- HINT(U8.14, NC)
-
- NET_C(FS07_P, U9.6)
- NET_C(FS06_P, U9.5)
- NET_C(FS05_P, U9.4)
- NET_C(FS04_P, U9.3)
- NET_C(HIB_P, U9.1)
- NET_C(MEN_P, U9.7)
- NET_C(MLOAD_M, U9.9)
- NET_C(MACLK_P, U9.2)
- NET_C(U9.10, U10.15)
- HINT(U9.11, NC)
- HINT(U9.12, NC)
- HINT(U9.13, NC)
- HINT(U9.14, NC)
-
- NET_C(FS03_P, U10.6)
- NET_C(FS02_P, U10.5)
- NET_C(FS01_P, U10.4)
- NET_C(FS00_P, U10.3)
- NET_C(HIB_P, U10.1)
- NET_C(MLOAD_M, U10.9)
- NET_C(MBCLK_M, U10.2)
- NET_C(MEN_P, U10.7, U10.10)
- HINT(U10.11, NC)
- HINT(U10.12, NC)
- HINT(U10.13, NC)
- HINT(U10.14, NC)
-
- //
- // Page 1, top-right
- //
-
- NET_C(GND, U11.6, U11.4, U11.3)
- NET_C(HIB_P, U11.5, U11.1, U11.7)
- ALIAS(NLOAD_M, U11.9)
- ALIAS(NBCLK_P, U11.2)
- NET_C(U11.10, U12.15)
- NET_C(U11.15, U15.12)
- HINT(U11.11, NC)
- HINT(U11.12, NC)
- HINT(U11.13, NC)
- HINT(U11.14, NC)
-
- NET_C(GND, U12.6, U12.5, U12.4)
- NET_C(HIB_P, U12.3, U12.1, U12.7, U12.10)
- NET_C(NLOAD_M, U12.9)
- ALIAS(NACLK_M, U12.2)
- HINT(U12.11, NC)
- HINT(U12.12, NC)
- HINT(U12.13, NC)
- HINT(U12.14, NC)
-
- NET_C(HIB_P, U15.10)
- ALIAS(NBCLK_M, U15.11)
- NET_C(I_V5, R164.1)
- NET_C(R164.2, U15.13)
- NET_C(U15.9, U16.12)
- NET_C(U15.8, NLOAD_M)
-
- NET_C(U16.1, U16.4, U16.13, HIB_P)
- NET_C(U16.3, U18.2)
- HINT(U16.2, NC)
-
- NET_C(GND, U17.2)
- NET_C(NBCLK_P, U17.1)
- NET_C(U17.6, U17.13)
- HINT(U17.5, NC)
- HINT(U17.4, NC)
- HINT(U17.3, NC)
-
- NET_C(GND, U17.12)
- HINT(U17.8, NC)
- NET_C(U17.9, U18.1)
- HINT(U17.10, NC)
- HINT(U17.11, NC)
-
- NET_C(U18.3, R7.1, R8.2)
- NET_C(R7.2, C3.1)
- ALIAS(SJ, C3.2)
- NET_C(R8.1, I_V5)
-
- //
- // Page 1, middle-right
- //
-
- NET_C(I_V5, U13.8, R4.2)
- NET_C(R4.1, U13.7, R5.2)
- NET_C(R5.1, U13.2, U13.6, C1.2)
- NET_C(C1.1, GND)
- NET_C(NUKE_P, U13.4)
- NET_C(U13.1, GND)
- NET_C(U13.5, C2.2)
- NET_C(C2.1, GND)
- NET_C(U13.3, R6.2, U2.1)
- NET_C(R6.1, GND)
- NET_C(U2.2, U2.13, U14.3)
-
- NET_C(HIB_P, U14.1, U14.13)
- NET_C(U14.6, NACLK_M)
- NET_C(U14.5, U14.12)
- NET_C(U14.2, U14.8, NBCLK_M)
- NET_C(HIB_P, U14.4, U14.10)
- NET_C(U14.9, NBCLK_P)
- NET_C(U2.12, U14.11)
+// TTL_7815_DIP(U52) // +15V Regulator -- part of voltage converter (not emulated)
+// TTL_7915_DIP(U53) // -15V Regulator -- part of voltage converter (not emulated)
+
+ //
+ // Page 1, top left
+ //
+
+ NET_C(I_OUT_7, U1.1)
+ NET_C(U1.2, U1.3)
+ NET_C(U1.4, U3.1)
+
+ NET_C(I_OUT_4, U1.5)
+ NET_C(U1.6, U1.13)
+ NET_C(U1.12, U3.8, U4.8)
+
+ NET_C(I_V5, R1.1, R2.1, R3.1)
+ ALIAS(HIA_P, R1.2)
+ ALIAS(HIB_P, R2.2)
+ ALIAS(HIC_P, R3.2)
+
+ NET_C(HIA_P, U3.9, U3.2)
+ NET_C(U3.3, U5.3, U7.3)
+ NET_C(U3.4, U5.4, U7.4)
+ NET_C(U3.5, U5.7, U7.7)
+ NET_C(U3.6, U5.8, U7.8)
+ NET_C(U3.10, U5.13, U7.13)
+ NET_C(U3.11, U5.14, U7.14)
+ NET_C(U3.12, U5.17, U7.17)
+ NET_C(U3.13, U5.18, U7.18, U4.1)
+
+ NET_C(HIA_P, U4.2, U4.9)
+ NET_C(U4.3, U6.3)
+ NET_C(U4.4, U6.4)
+ NET_C(U4.5, U6.7)
+ NET_C(U4.6, U6.8)
+ NET_C(U4.10, U6.13)
+ NET_C(U4.11, U6.14)
+ NET_C(U4.12, U6.17)
+ NET_C(U4.13, U6.18)
+
+ ALIAS(MEN_P, U5.2)
+ ALIAS(AS2_M, U5.5)
+ ALIAS(AS1_M, U5.6)
+ ALIAS(AS0_M, U5.9)
+ ALIAS(FS11_P, U5.12)
+ ALIAS(FS10_P, U5.15)
+ ALIAS(FS09_P, U5.16)
+ ALIAS(FS08_P, U5.19)
+ ALIAS(MLATCH_P, U5.11)
+ NET_C(U5.1, GND)
+
+ ALIAS(FS07_P, U6.2)
+ ALIAS(FS06_P, U6.5)
+ ALIAS(FS05_P, U6.6)
+ ALIAS(FS04_P, U6.9)
+ ALIAS(FS03_P, U6.12)
+ ALIAS(FS02_P, U6.15)
+ ALIAS(FS01_P, U6.16)
+ ALIAS(FS00_P, U6.19)
+ NET_C(U6.11, MLATCH_P)
+ NET_C(U6.1, GND)
+
+ //
+ // Page 1, bottom
+ //
+
+ NET_C(I_OUT_0, U2.3)
+ NET_C(U2.4, U2.5)
+ ALIAS(LATCH_CLK_P, U2.6)
+
+ NET_C(I_OUT_1, U1.11)
+ NET_C(U1.10, U1.9)
+ NET_C(U1.8, U7.11)
+
+ ALIAS(LOUD_EXP_M, U7.2)
+ ALIAS(SOFT_EXP_M, U7.5)
+ ALIAS(THRUST_M, U7.6)
+ ALIAS(FIRE_M, U7.9)
+ ALIAS(CAPTURE_M, U7.12)
+ ALIAS(NUKE_P, U7.15)
+ ALIAS(PHOTON_M, U7.16)
+ HINT(U7.19, NC)
+ NET_C(U7.1, GND)
+
+ NET_C(HIA_P, U19.4, U19.1)
+ ALIAS(MACLK_M, U19.2)
+ ALIAS(_227KC_P, U19.3)
+ ALIAS(MBCLK_P, U19.5)
+ ALIAS(MBCLK_M, U19.6)
+
+ NET_C(HIA_P, U19.10, U19.13)
+ NET_C(MBCLK_P, U19.12)
+ ALIAS(_227KC_M, U19.11)
+ ALIAS(MACLK_P, U19.9)
+ NET_C(U19.8, MACLK_M, U20.11)
+
+ NET_C(HIA_P, U16.8, U16.11, U16.10)
+ NET_C(U16.9, U20.9, U22.8)
+ ALIAS(DMUSIC_P, U16.5)
+ HINT(U16.6, NC)
+
+ NET_C(HIA_P, U20.10)
+ ALIAS(MCARRY_P, U20.12)
+ NET_C(R162.1, I_V5)
+ NET_C(R162.2, U20.13)
+ ALIAS(MLOAD_M, U20.8)
+
+ NET_C(MBCLK_M, U21.13)
+ HINT(U21.8, NC)
+ NET_C(U21.9, U22.11, U22.12)
+ HINT(U21.10, NC)
+ HINT(U21.11, NC)
+ NET_C(U21.12, U20.6, U22.9)
+
+ NET_C(HIA_P, U20.2, U20.4)
+ NET_C(LATCH_CLK_P, U20.3)
+ ALIAS(KILL_FLAG_M, U20.1)
+ HINT(U20.5, NC)
+
+ NET_C(U22.13, U23.10)
+ NET_C(U22.10, U23.12)
+ NET_C(MBCLK_P, U23.11)
+ NET_C(HIA_P, U23.13)
+ HINT(U23.8, NC)
+ NET_C(U23.9, U23.2, MLATCH_P)
+
+ NET_C(HIA_P, U23.4)
+ NET_C(MACLK_P, U23.3)
+ NET_C(I_V5, R163.1)
+ NET_C(R163.2, U23.1)
+ HINT(U23.5, NC)
+ NET_C(U23.6, KILL_FLAG_M)
+
+ //
+ // Page 1, middle
+ //
+
+ NET_C(FS11_P, U8.6)
+ NET_C(FS10_P, U8.5)
+ NET_C(FS09_P, U8.4)
+ NET_C(FS08_P, U8.3)
+ NET_C(HIB_P, U8.1)
+ NET_C(MEN_P, U8.7)
+ NET_C(MLOAD_M, U8.9)
+ NET_C(MBCLK_P, U8.2)
+ NET_C(U8.10, U9.15)
+ NET_C(U8.15, MCARRY_P)
+ HINT(U8.11, NC)
+ HINT(U8.12, NC)
+ HINT(U8.13, NC)
+ HINT(U8.14, NC)
+
+ NET_C(FS07_P, U9.6)
+ NET_C(FS06_P, U9.5)
+ NET_C(FS05_P, U9.4)
+ NET_C(FS04_P, U9.3)
+ NET_C(HIB_P, U9.1)
+ NET_C(MEN_P, U9.7)
+ NET_C(MLOAD_M, U9.9)
+ NET_C(MACLK_P, U9.2)
+ NET_C(U9.10, U10.15)
+ HINT(U9.11, NC)
+ HINT(U9.12, NC)
+ HINT(U9.13, NC)
+ HINT(U9.14, NC)
+
+ NET_C(FS03_P, U10.6)
+ NET_C(FS02_P, U10.5)
+ NET_C(FS01_P, U10.4)
+ NET_C(FS00_P, U10.3)
+ NET_C(HIB_P, U10.1)
+ NET_C(MLOAD_M, U10.9)
+ NET_C(MBCLK_M, U10.2)
+ NET_C(MEN_P, U10.7, U10.10)
+ HINT(U10.11, NC)
+ HINT(U10.12, NC)
+ HINT(U10.13, NC)
+ HINT(U10.14, NC)
+
+ //
+ // Page 1, top-right
+ //
+
+ NET_C(GND, U11.6, U11.4, U11.3)
+ NET_C(HIB_P, U11.5, U11.1, U11.7)
+ ALIAS(NLOAD_M, U11.9)
+ ALIAS(NBCLK_P, U11.2)
+ NET_C(U11.10, U12.15)
+ NET_C(U11.15, U15.12)
+ HINT(U11.11, NC)
+ HINT(U11.12, NC)
+ HINT(U11.13, NC)
+ HINT(U11.14, NC)
+
+ NET_C(GND, U12.6, U12.5, U12.4)
+ NET_C(HIB_P, U12.3, U12.1, U12.7, U12.10)
+ NET_C(NLOAD_M, U12.9)
+ ALIAS(NACLK_M, U12.2)
+ HINT(U12.11, NC)
+ HINT(U12.12, NC)
+ HINT(U12.13, NC)
+ HINT(U12.14, NC)
+
+ NET_C(HIB_P, U15.10)
+ ALIAS(NBCLK_M, U15.11)
+ NET_C(I_V5, R164.1)
+ NET_C(R164.2, U15.13)
+ NET_C(U15.9, U16.12)
+ NET_C(U15.8, NLOAD_M)
+
+ NET_C(U16.1, U16.4, U16.13, HIB_P)
+ NET_C(U16.3, U18.2)
+ HINT(U16.2, NC)
+
+ NET_C(GND, U17.2)
+ NET_C(NBCLK_P, U17.1)
+ NET_C(U17.6, U17.13)
+ HINT(U17.5, NC)
+ HINT(U17.4, NC)
+ HINT(U17.3, NC)
+
+ NET_C(GND, U17.12)
+ HINT(U17.8, NC)
+ NET_C(U17.9, U18.1)
+ HINT(U17.10, NC)
+ HINT(U17.11, NC)
+
+ NET_C(U18.3, R7.1, R8.2)
+ NET_C(R7.2, C3.1)
+ ALIAS(SJ, C3.2)
+ NET_C(R8.1, I_V5)
+
+ //
+ // Page 1, middle-right
+ //
+
+ NET_C(I_V5, U13.8, R4.2)
+ NET_C(R4.1, U13.7, R5.2)
+ NET_C(R5.1, U13.2, U13.6, C1.2)
+ NET_C(C1.1, GND)
+ NET_C(NUKE_P, U13.4)
+ NET_C(U13.1, GND)
+ NET_C(U13.5, C2.2)
+ NET_C(C2.1, GND)
+ NET_C(U13.3, R6.2, U2.1)
+ NET_C(R6.1, GND)
+ NET_C(U2.2, U2.13, U14.3)
+
+ NET_C(HIB_P, U14.1, U14.13)
+ NET_C(U14.6, NACLK_M)
+ NET_C(U14.5, U14.12)
+ NET_C(U14.2, U14.8, NBCLK_M)
+ NET_C(HIB_P, U14.4, U14.10)
+ NET_C(U14.9, NBCLK_P)
+ NET_C(U2.12, U14.11)
#if (HLE_MUSIC_CLOCK)
- //
- // The 20MHz clock (Y1) is divided by 4 via a pair
- // of JK flip-flops (U25) to 5MHz. That signal is only
- // used to clock a 74LS163 counter (U26) that divides
- // the clock by 9 via a preset value. It then goes
- // through another JK flip-flop (U27) for another
- // divide by 2, ending up at 277778Hz. No sense in
- // running all this manually.
- //
- CLOCK(MUSICCLK, 277778)
- NET_C(MUSICCLK.VCC, I_V5)
- NET_C(MUSICCLK.GND, GND)
- NET_C(_227KC_P, MUSICCLK.Q)
- NET_C(MUSICCLK.Q, U24.13)
- NET_C(_227KC_M, U24.12)
- NET_C(GND, R9.1, R9.2, R10.1, R10.2, R161.1, R161.2, C4.1, C4.2)
- NET_C(GND, U15.1, U15.2, U15.3, U15.4)
- NET_C(GND, U24.1, U24.5)
- NET_C(GND, U25.1, U25.2, U25.3, U25.4, U25.10, U25.11, U25.12, U25.13)
- NET_C(GND, U26.1, U26.2, U26.3, U26.4, U26.5, U26.6, U26.7, U26.9, U26.10)
- NET_C(GND, U27.1, U27.4, U27.12)
- NET_C(HIC_P, U27.13)
+ //
+ // The 20MHz clock (Y1) is divided by 4 via a pair
+ // of JK flip-flops (U25) to 5MHz. That signal is only
+ // used to clock a 74LS163 counter (U26) that divides
+ // the clock by 9 via a preset value. It then goes
+ // through another JK flip-flop (U27) for another
+ // divide by 2, ending up at 277778Hz. No sense in
+ // running all this manually.
+ //
+ CLOCK(MUSICCLK, 277778)
+ NET_C(MUSICCLK.VCC, I_V5)
+ NET_C(MUSICCLK.GND, GND)
+ NET_C(_227KC_P, MUSICCLK.Q)
+ NET_C(MUSICCLK.Q, U24.13)
+ NET_C(_227KC_M, U24.12)
+ NET_C(GND, R9.1, R9.2, R10.1, R10.2, R161.1, R161.2, C4.1, C4.2)
+ NET_C(GND, U15.1, U15.2, U15.3, U15.4)
+ NET_C(GND, U24.1, U24.5)
+ NET_C(GND, U25.1, U25.2, U25.3, U25.4, U25.10, U25.11, U25.12, U25.13)
+ NET_C(GND, U26.1, U26.2, U26.3, U26.4, U26.5, U26.6, U26.7, U26.9, U26.10)
+ NET_C(GND, U27.1, U27.4, U27.12)
+ NET_C(HIC_P, U27.13)
#else
- //
- // Page 2, top-left (clock)
- //
-
- //
- // This is just here for documentation; the crystal is
- // not modelled for this circuit.
- //
- NET_C(U24.5, R9.1, C4.1)
- NET_C(U24.6, R9.2, Y1.1)
- NET_C(Y1.2, R10.1, U24.1)
- NET_C(R10.2, U24.2, C4.2, U24.13)
- NET_C(U24.12, U25.1)
- NET_C(HIC_P, U25.3, U25.2, U25.4, U25.11, U25.12, U25.10)
- NET_C(U25.5, U25.13)
- ALIAS(_5MC_P, U25.9)
- ALIAS(_5MC_M, U25.8)
-
- //
- // Page 2, middle-left
- //
-
- NET_C(HIC_P, U26.5, U26.3, U26.1, U26.10, U26.7)
- NET_C(GND, U26.6, U26.4)
- NET_C(_5MC_P, U26.2)
- HINT(U26.11, NC)
- HINT(U26.12, NC)
- HINT(U26.13, NC)
- HINT(U26.14, NC)
- NET_C(U26.9, U27.12, U15.6)
- NET_C(U26.15, U15.2)
-
- NET_C(_5MC_M, U15.3)
- NET_C(HIC_P, U15.4)
- NET_C(I_V5, R161.1)
- NET_C(R161.2, U15.1)
-
- NET_C(HIC_P, U27.1, U27.4, U27.13)
- NET_C(_227KC_P, U27.3)
- NET_C(_227KC_M, U27.2)
+ //
+ // Page 2, top-left (clock)
+ //
+
+ //
+ // This is just here for documentation; the crystal is
+ // not modelled for this circuit.
+ //
+ NET_C(U24.5, R9.1, C4.1)
+ NET_C(U24.6, R9.2, Y1.1)
+ NET_C(Y1.2, R10.1, U24.1)
+ NET_C(R10.2, U24.2, C4.2, U24.13)
+ NET_C(U24.12, U25.1)
+ NET_C(HIC_P, U25.3, U25.2, U25.4, U25.11, U25.12, U25.10)
+ NET_C(U25.5, U25.13)
+ ALIAS(_5MC_P, U25.9)
+ ALIAS(_5MC_M, U25.8)
+
+ //
+ // Page 2, middle-left
+ //
+
+ NET_C(HIC_P, U26.5, U26.3, U26.1, U26.10, U26.7)
+ NET_C(GND, U26.6, U26.4)
+ NET_C(_5MC_P, U26.2)
+ HINT(U26.11, NC)
+ HINT(U26.12, NC)
+ HINT(U26.13, NC)
+ HINT(U26.14, NC)
+ NET_C(U26.9, U27.12, U15.6)
+ NET_C(U26.15, U15.2)
+
+ NET_C(_5MC_M, U15.3)
+ NET_C(HIC_P, U15.4)
+ NET_C(I_V5, R161.1)
+ NET_C(R161.2, U15.1)
+
+ NET_C(HIC_P, U27.1, U27.4, U27.13)
+ NET_C(_227KC_P, U27.3)
+ NET_C(_227KC_M, U27.2)
#endif
- //
- // Page 2, top-middle
- //
-
- NET_C(MACLK_P, U29.8)
- ALIAS(IN_M, U29.2)
- NET_C(U29.2, U29.1)
- ALIAS(RN_M, U29.9)
- NET_C(U29.9, U28.9, U30.9)
- NET_C(U29.13, U28.1, U28.2)
- HINT(U29.12, NC)
- HINT(U29.11, NC)
- HINT(U29.10, NC)
- HINT(U29.6, NC)
- HINT(U29.5, NC)
- HINT(U29.4, NC)
- HINT(U29.3, NC)
-
- NET_C(MACLK_P, U28.8)
- NET_C(U28.13, U30.1, U30.2)
- HINT(U28.12, NC)
- HINT(U28.11, NC)
- HINT(U28.10, NC)
- HINT(U28.6, NC)
- HINT(U28.5, NC)
- HINT(U28.4, NC)
- HINT(U28.3, NC)
-
- NET_C(MACLK_P, U30.8)
- NET_C(U30.13, U18.10)
- NET_C(U30.6, U18.5)
- NET_C(U30.5, U18.4)
- NET_C(U30.3, U18.9)
- HINT(U30.12, NC)
- HINT(U30.11, NC)
- HINT(U30.10, NC)
- HINT(U30.4, NC)
+ //
+ // Page 2, top-middle
+ //
+
+ NET_C(MACLK_P, U29.8)
+ ALIAS(IN_M, U29.2)
+ NET_C(U29.2, U29.1)
+ ALIAS(RN_M, U29.9)
+ NET_C(U29.9, U28.9, U30.9)
+ NET_C(U29.13, U28.1, U28.2)
+ HINT(U29.12, NC)
+ HINT(U29.11, NC)
+ HINT(U29.10, NC)
+ HINT(U29.6, NC)
+ HINT(U29.5, NC)
+ HINT(U29.4, NC)
+ HINT(U29.3, NC)
+
+ NET_C(MACLK_P, U28.8)
+ NET_C(U28.13, U30.1, U30.2)
+ HINT(U28.12, NC)
+ HINT(U28.11, NC)
+ HINT(U28.10, NC)
+ HINT(U28.6, NC)
+ HINT(U28.5, NC)
+ HINT(U28.4, NC)
+ HINT(U28.3, NC)
+
+ NET_C(MACLK_P, U30.8)
+ NET_C(U30.13, U18.10)
+ NET_C(U30.6, U18.5)
+ NET_C(U30.5, U18.4)
+ NET_C(U30.3, U18.9)
+ HINT(U30.12, NC)
+ HINT(U30.11, NC)
+ HINT(U30.10, NC)
+ HINT(U30.4, NC)
#if (HLE_NOISE_CONVERT)
- //
- // The TTL-to-analog conversion takes a noticeable
- // amount of time, so just do it directly. The 4.2
- // P-P value is observed from the original netlist.
- //
- AFUNC(NOISECONV, 1, "if(A0>2.5,-4.2,4.2)")
- NET_C(U30.13, NOISECONV.A0)
- ALIAS(NOISE, NOISECONV.Q)
- NET_C(GND, C5.1, C5.2, R11.1, R11.2, R12.1, R12.2, R13.1, R13.2, R14.1, R14.2, U32.2, U32.3)
+ //
+ // The TTL-to-analog conversion takes a noticeable
+ // amount of time, so just do it directly. The 4.2
+ // P-P value is observed from the original netlist.
+ //
+ AFUNC(NOISECONV, 1, "if(A0>2.5,-4.2,4.2)")
+ NET_C(U30.13, NOISECONV.A0)
+ ALIAS(NOISE, NOISECONV.Q)
+ NET_C(GND, C5.1, C5.2, R11.1, R11.2, R12.1, R12.2, R13.1, R13.2, R14.1, R14.2, U32.2, U32.3)
#else
- NET_C(U30.13, R11.1, C5.1)
- NET_C(R11.2, I_V5)
- NET_C(C5.2, R14.2, U32.3)
- NET_C(R14.1, GND)
- NET_C(U32.2, R12.2, R13.1)
- NET_C(R12.1, GND)
- NET_C(R13.2, U32.6)
- ALIAS(NOISE, R13.2)
+ NET_C(U30.13, R11.1, C5.1)
+ NET_C(R11.2, I_V5)
+ NET_C(C5.2, R14.2, U32.3)
+ NET_C(R14.1, GND)
+ NET_C(U32.2, R12.2, R13.1)
+ NET_C(R12.1, GND)
+ NET_C(R13.2, U32.6)
+ ALIAS(NOISE, R13.2)
#endif
- NET_C(U18.6, U18.12)
- NET_C(U18.8, U18.13)
- NET_C(U18.11, U31.12, U31.2, U24.9)
- NET_C(U24.8, IN_M)
-
- NET_C(MACLK_M, U31.1)
- NET_C(U31.6, U31.13)
- HINT(U31.5, NC)
- HINT(U31.4, NC)
- HINT(U31.3, NC)
- NET_C(U31.10, U24.11)
- HINT(U31.8, NC)
- HINT(U31.9, NC)
- HINT(U31.11, NC)
- NET_C(U24.10, RN_M)
-
- //
- // Page 2, bottom-middle and top-right (fire)
- //
-
- NET_C(FIRE_M, R113.1, R114.1)
- NET_C(R113.2, I_V5, R115.2, Q14.E)
- NET_C(R114.2, R115.1, Q14.B)
- NET_C(Q14.C, R116.2, R117.2, Q15.E)
- NET_C(R116.1, I_VM15)
- NET_C(R117.1, R118.1, GND)
- NET_C(R118.2, Q15.B)
- NET_C(Q15.C, C26.1, R108.1, R119.1)
- NET_C(C26.2, I_VM15)
- NET_C(R119.2, U46.5)
- NET_C(R108.2, U44.5)
-
- NET_C(NOISE, R98.2)
- NET_C(R98.1, R99.2, R100.1)
- NET_C(R99.1, GND)
- NET_C(R100.2, U43.2, R104.1, R102.1, R101.1)
- NET_C(U43.3, GND)
- NET_C(R104.2, U43.6, R105.1)
- NET_C(R105.2, R106.2, U44.3)
- NET_C(R106.1, GND)
- NET_C(U44.2, R107.2)
- NET_C(R107.1, GND)
- NET_C(U44.6, C23.2, R109.2, U45.3)
- NET_C(C23.1, GND)
- NET_C(R109.1, GND)
- NET_C(U45.6, U45.2, R110.1, R103.1, R102.2)
- NET_C(R103.2, C24.1)
- NET_C(C24.2, SJ)
- NET_C(R110.2, R111.2, U46.3)
- NET_C(R111.1, R112.1, GND)
- NET_C(R112.2, U46.2)
- NET_C(U46.6, C25.2, R120.2, U47.3)
- NET_C(C25.1, R120.1, GND)
- NET_C(U47.2, U47.6, R101.2)
-
- //
- // Page 2, bottom-right (AS0-2)
- //
-
- NET_C(I_V5, R121.1)
- NET_C(R121.2, DMUSIC_P, R122.1)
- NET_C(R122.2, C27.1)
- NET_C(C27.2, R123.2, U48.2)
- NET_C(R123.1, GND, R124.1)
- NET_C(R124.2, U48.3)
- NET_C(R148.2, R140.2, R132.2, U48.5)
- ALIAS(CS, U48.6)
-
- NET_C(AS2_M, R125.1, R126.1)
- NET_C(R125.2, I_V5, R127.2, Q16.E)
- NET_C(R126.2, R127.1, Q16.B)
- NET_C(Q16.C, R128.2, R129.2, Q17.E)
- NET_C(R128.1, I_VM15)
- NET_C(R129.1, R130.1, GND)
- NET_C(R130.2, Q17.B)
- NET_C(Q17.C, C28.1, R132.1)
- NET_C(C28.2, I_VM15)
-
- NET_C(AS1_M, R133.1, R134.1)
- NET_C(R133.2, I_V5, R135.2, Q18.E)
- NET_C(R134.2, R135.1, Q18.B)
- NET_C(Q18.C, R136.2, R137.2, Q19.E)
- NET_C(R136.1, I_VM15)
- NET_C(R137.1, R138.1, GND)
- NET_C(R138.2, Q19.B)
- NET_C(Q19.C, R139.1)
- NET_C(R139.2, C29.1, R140.1)
- NET_C(C29.2, I_VM15)
-
- NET_C(AS0_M, R141.1, R142.1)
- NET_C(R141.2, I_V5, R143.2, Q20.E)
- NET_C(R142.2, R143.1, Q20.B)
- NET_C(Q20.C, R144.2, R145.2, Q21.E)
- NET_C(R144.1, I_VM15)
- NET_C(R145.1, R146.1, GND)
- NET_C(R146.2, Q21.B)
- NET_C(Q21.C, R147.1)
- NET_C(R147.2, C30.1, R148.1)
- NET_C(C30.2, I_VM15)
-
- //
- // Page 3, top-left (explosions)
- //
-
- NET_C(NOISE, R15.1)
- NET_C(R15.2, C6.2, R16.1)
- NET_C(C6.1, GND)
- NET_C(R16.2, C7.2, R17.1)
- NET_C(C7.1, GND)
- NET_C(R17.2, R18.2, U33.2)
- NET_C(R18.1, GND)
- NET_C(U33.3, R19.2)
- NET_C(R19.1, GND)
- NET_C(CS, U33.6)
-
- NET_C(LOUD_EXP_M, R20.1, R21.1)
- NET_C(R20.2, I_V5, R22.2, Q1.E)
- NET_C(R21.2, R22.1, Q1.B)
- NET_C(Q1.C, R23.2, R24.2, Q2.E)
- NET_C(R23.1, I_VM15)
- NET_C(R24.1, GND)
- NET_C(Q2.B, R25.2)
- NET_C(R25.1, GND)
- NET_C(Q2.C, C8.1, R26.1)
- NET_C(C8.2, I_VM15)
- NET_C(R26.2, U33.5)
-
- NET_C(SOFT_EXP_M, R27.1, R28.1)
- NET_C(R27.2, I_V5, R29.2, Q3.E)
- NET_C(R28.2, R29.1, Q3.B)
- NET_C(Q3.C, R30.2, R31.2, Q4.E)
- NET_C(R30.1, I_VM15)
- NET_C(R31.1, GND)
- NET_C(Q4.B, R32.2)
- NET_C(R32.1, GND)
- NET_C(Q4.C, C9.1, R33.1)
- NET_C(C9.2, I_VM15)
- NET_C(R33.2, U33.5)
-
- //
- // Page 3, bottom-left (thrust)
- //
-
- NET_C(NOISE, R34.1)
- NET_C(R34.2, C10.2, R35.1)
- NET_C(C10.1, GND)
- NET_C(R35.2, C11.2, R36.1)
- NET_C(C11.1, GND)
- NET_C(R36.2, R37.2, U34.2)
- NET_C(R37.1, GND)
- NET_C(U34.3, R38.2)
- NET_C(R38.1, GND)
- NET_C(U34.6, CS)
-
- NET_C(THRUST_M, R39.1, R40.1)
- NET_C(R39.2, I_V5, R41.2, Q5.E)
- NET_C(R40.2, R41.1, Q5.B)
- NET_C(Q5.C, R42.2, R43.2, Q6.E)
- NET_C(R42.1, I_VM15)
- NET_C(R43.1, GND)
- NET_C(Q6.B, R44.2)
- NET_C(R44.1, GND)
- NET_C(Q6.C, R45.1)
- NET_C(R45.2, C12.1, R46.1)
- NET_C(C12.2, I_VM15)
- NET_C(R46.2, U34.5)
-
- //
- // Page 3, top-middle/right (capture)
- //
-
- NET_C(CAPTURE_M, R82.1, R83.1, U21.2)
- NET_C(R82.2, I_V5, R84.2, Q11.E)
- NET_C(R83.2, R84.1, Q11.B)
- NET_C(Q11.C, R85.2, R86.2, R87.1)
- NET_C(R85.1, I_VM15)
- NET_C(R86.1, GND)
- NET_C(R87.2, Q12.B)
- NET_C(Q12.E, GND)
- NET_C(Q12.C, R88.1)
- NET_C(R88.2, R89.1, C18.2, R90.2, C19.1)
- NET_C(R89.2, I_V15)
- NET_C(C18.1, GND)
- NET_C(R90.1, GND)
+ NET_C(U18.6, U18.12)
+ NET_C(U18.8, U18.13)
+ NET_C(U18.11, U31.12, U31.2, U24.9)
+ NET_C(U24.8, IN_M)
+
+ NET_C(MACLK_M, U31.1)
+ NET_C(U31.6, U31.13)
+ HINT(U31.5, NC)
+ HINT(U31.4, NC)
+ HINT(U31.3, NC)
+ NET_C(U31.10, U24.11)
+ HINT(U31.8, NC)
+ HINT(U31.9, NC)
+ HINT(U31.11, NC)
+ NET_C(U24.10, RN_M)
+
+ //
+ // Page 2, bottom-middle and top-right (fire)
+ //
+
+ NET_C(FIRE_M, R113.1, R114.1)
+ NET_C(R113.2, I_V5, R115.2, Q14.E)
+ NET_C(R114.2, R115.1, Q14.B)
+ NET_C(Q14.C, R116.2, R117.2, Q15.E)
+ NET_C(R116.1, I_VM15)
+ NET_C(R117.1, R118.1, GND)
+ NET_C(R118.2, Q15.B)
+ NET_C(Q15.C, C26.1, R108.1, R119.1)
+ NET_C(C26.2, I_VM15)
+ NET_C(R119.2, U46.5)
+ NET_C(R108.2, U44.5)
+
+ NET_C(NOISE, R98.2)
+ NET_C(R98.1, R99.2, R100.1)
+ NET_C(R99.1, GND)
+ NET_C(R100.2, U43.2, R104.1, R102.1, R101.1)
+ NET_C(U43.3, GND)
+ NET_C(R104.2, U43.6, R105.1)
+ NET_C(R105.2, R106.2, U44.3)
+ NET_C(R106.1, GND)
+ NET_C(U44.2, R107.2)
+ NET_C(R107.1, GND)
+ NET_C(U44.6, C23.2, R109.2, U45.3)
+ NET_C(C23.1, GND)
+ NET_C(R109.1, GND)
+ NET_C(U45.6, U45.2, R110.1, R103.1, R102.2)
+ NET_C(R103.2, C24.1)
+ NET_C(C24.2, SJ)
+ NET_C(R110.2, R111.2, U46.3)
+ NET_C(R111.1, R112.1, GND)
+ NET_C(R112.2, U46.2)
+ NET_C(U46.6, C25.2, R120.2, U47.3)
+ NET_C(C25.1, R120.1, GND)
+ NET_C(U47.2, U47.6, R101.2)
+
+ //
+ // Page 2, bottom-right (AS0-2)
+ //
+
+ NET_C(I_V5, R121.1)
+ NET_C(R121.2, DMUSIC_P, R122.1)
+ NET_C(R122.2, C27.1)
+ NET_C(C27.2, R123.2, U48.2)
+ NET_C(R123.1, GND, R124.1)
+ NET_C(R124.2, U48.3)
+ NET_C(R148.2, R140.2, R132.2, U48.5)
+ ALIAS(CS, U48.6)
+
+ NET_C(AS2_M, R125.1, R126.1)
+ NET_C(R125.2, I_V5, R127.2, Q16.E)
+ NET_C(R126.2, R127.1, Q16.B)
+ NET_C(Q16.C, R128.2, R129.2, Q17.E)
+ NET_C(R128.1, I_VM15)
+ NET_C(R129.1, R130.1, GND)
+ NET_C(R130.2, Q17.B)
+ NET_C(Q17.C, C28.1, R132.1)
+ NET_C(C28.2, I_VM15)
+
+ NET_C(AS1_M, R133.1, R134.1)
+ NET_C(R133.2, I_V5, R135.2, Q18.E)
+ NET_C(R134.2, R135.1, Q18.B)
+ NET_C(Q18.C, R136.2, R137.2, Q19.E)
+ NET_C(R136.1, I_VM15)
+ NET_C(R137.1, R138.1, GND)
+ NET_C(R138.2, Q19.B)
+ NET_C(Q19.C, R139.1)
+ NET_C(R139.2, C29.1, R140.1)
+ NET_C(C29.2, I_VM15)
+
+ NET_C(AS0_M, R141.1, R142.1)
+ NET_C(R141.2, I_V5, R143.2, Q20.E)
+ NET_C(R142.2, R143.1, Q20.B)
+ NET_C(Q20.C, R144.2, R145.2, Q21.E)
+ NET_C(R144.1, I_VM15)
+ NET_C(R145.1, R146.1, GND)
+ NET_C(R146.2, Q21.B)
+ NET_C(Q21.C, R147.1)
+ NET_C(R147.2, C30.1, R148.1)
+ NET_C(C30.2, I_VM15)
+
+ //
+ // Page 3, top-left (explosions)
+ //
+
+ NET_C(NOISE, R15.1)
+ NET_C(R15.2, C6.2, R16.1)
+ NET_C(C6.1, GND)
+ NET_C(R16.2, C7.2, R17.1)
+ NET_C(C7.1, GND)
+ NET_C(R17.2, R18.2, U33.2)
+ NET_C(R18.1, GND)
+ NET_C(U33.3, R19.2)
+ NET_C(R19.1, GND)
+ NET_C(CS, U33.6)
+
+ NET_C(LOUD_EXP_M, R20.1, R21.1)
+ NET_C(R20.2, I_V5, R22.2, Q1.E)
+ NET_C(R21.2, R22.1, Q1.B)
+ NET_C(Q1.C, R23.2, R24.2, Q2.E)
+ NET_C(R23.1, I_VM15)
+ NET_C(R24.1, GND)
+ NET_C(Q2.B, R25.2)
+ NET_C(R25.1, GND)
+ NET_C(Q2.C, C8.1, R26.1)
+ NET_C(C8.2, I_VM15)
+ NET_C(R26.2, U33.5)
+
+ NET_C(SOFT_EXP_M, R27.1, R28.1)
+ NET_C(R27.2, I_V5, R29.2, Q3.E)
+ NET_C(R28.2, R29.1, Q3.B)
+ NET_C(Q3.C, R30.2, R31.2, Q4.E)
+ NET_C(R30.1, I_VM15)
+ NET_C(R31.1, GND)
+ NET_C(Q4.B, R32.2)
+ NET_C(R32.1, GND)
+ NET_C(Q4.C, C9.1, R33.1)
+ NET_C(C9.2, I_VM15)
+ NET_C(R33.2, U33.5)
+
+ //
+ // Page 3, bottom-left (thrust)
+ //
+
+ NET_C(NOISE, R34.1)
+ NET_C(R34.2, C10.2, R35.1)
+ NET_C(C10.1, GND)
+ NET_C(R35.2, C11.2, R36.1)
+ NET_C(C11.1, GND)
+ NET_C(R36.2, R37.2, U34.2)
+ NET_C(R37.1, GND)
+ NET_C(U34.3, R38.2)
+ NET_C(R38.1, GND)
+ NET_C(U34.6, CS)
+
+ NET_C(THRUST_M, R39.1, R40.1)
+ NET_C(R39.2, I_V5, R41.2, Q5.E)
+ NET_C(R40.2, R41.1, Q5.B)
+ NET_C(Q5.C, R42.2, R43.2, Q6.E)
+ NET_C(R42.1, I_VM15)
+ NET_C(R43.1, GND)
+ NET_C(Q6.B, R44.2)
+ NET_C(R44.1, GND)
+ NET_C(Q6.C, R45.1)
+ NET_C(R45.2, C12.1, R46.1)
+ NET_C(C12.2, I_VM15)
+ NET_C(R46.2, U34.5)
+
+ //
+ // Page 3, top-middle/right (capture)
+ //
+
+ NET_C(CAPTURE_M, R82.1, R83.1, U21.2)
+ NET_C(R82.2, I_V5, R84.2, Q11.E)
+ NET_C(R83.2, R84.1, Q11.B)
+ NET_C(Q11.C, R85.2, R86.2, R87.1)
+ NET_C(R85.1, I_VM15)
+ NET_C(R86.1, GND)
+ NET_C(R87.2, Q12.B)
+ NET_C(Q12.E, GND)
+ NET_C(Q12.C, R88.1)
+ NET_C(R88.2, R89.1, C18.2, R90.2, C19.1)
+ NET_C(R89.2, I_V15)
+ NET_C(C18.1, GND)
+ NET_C(R90.1, GND)
#if (HLE_CAPTURE_VCO)
- //
- // The capture VCO actually doesn't sound bad at default
- // settings, but still takes up a lot of horsepower, so
- // HLE it as usual. The mappings aren't as good as they
- // usually are, but the sound is short and the result is
- // pretty indistinguishable from reality, so we'll go
- // with it.
- //
- // R2 = 0.87013: HP = (0.000085296*A0) - 0.000965124
- // R2 = 0.91754: HP = (0.0000395501*A0*A0) - (0.000953905*A0) + 0.00585023
- // R2 = 0.91858: HP = (-0.0000119561*A0*A0*A0) + (0.000513446*A0*A0) - (0.00720853*A0) + 0.0333386
- // R2 = 0.93063: HP = (-0.000085348*A0*A0*A0*A0) + (0.00450954*A0*A0*A0) - (0.089245*A0*A0) + (0.784128*A0) - 2.580951
- // R2 = 0.84993: HP = (0.00000301512*A0*A0*A0*A0*A0) - (0.000286000*A0*A0*A0*A0) + (0.0098476*A0*A0*A0) - (0.160207*A0*A0) + (1.255519*A0) - 3.832746
- //
+ //
+ // The capture VCO actually doesn't sound bad at default
+ // settings, but still takes up a lot of horsepower, so
+ // HLE it as usual. The mappings aren't as good as they
+ // usually are, but the sound is short and the result is
+ // pretty indistinguishable from reality, so we'll go
+ // with it.
+ //
+ // R2 = 0.87013: HP = (0.000085296*A0) - 0.000965124
+ // R2 = 0.91754: HP = (0.0000395501*A0*A0) - (0.000953905*A0) + 0.00585023
+ // R2 = 0.91858: HP = (-0.0000119561*A0*A0*A0) + (0.000513446*A0*A0) - (0.00720853*A0) + 0.0333386
+ // R2 = 0.93063: HP = (-0.000085348*A0*A0*A0*A0) + (0.00450954*A0*A0*A0) - (0.089245*A0*A0) + (0.784128*A0) - 2.580951
+ // R2 = 0.84993: HP = (0.00000301512*A0*A0*A0*A0*A0) - (0.000286000*A0*A0*A0*A0) + (0.0098476*A0*A0*A0) - (0.160207*A0*A0) + (1.255519*A0) - 3.832746
+ //
VARCLOCK(CAPTURECLK, 1, "max(0.000001,min(0.1,(-0.0000119561*A0*A0*A0) + (0.000513446*A0*A0) - (0.00720853*A0) + 0.0333386))")
NET_C(CAPTURECLK.GND, GND)
NET_C(CAPTURECLK.VCC, I_V5)
@@ -1107,166 +1107,166 @@ NETLIST_START(solarq)
NET_C(CAPTURECLK.A0, C19.1)
NET_C(GND, R91.1, R91.2, R92.1, R92.2, R93.1, R93.2, R94.1, R94.2, C19.2, C20.1, C20.2, C21.1, C21.2, D7.A, D7.K, D8.A, D8.K)
#else
- NET_C(R88.2, U42.5)
- NET_C(C19.2, U42.6, R91.1)
- NET_C(R91.2, I_V15, U42.8)
- NET_C(U42.7, C20.2)
- NET_C(C20.1, GND)
- NET_C(U42.1, GND)
- NET_C(U42.3, C21.1)
- NET_C(C21.2, D7.K, R92.1)
- NET_C(D7.A, GND)
- NET_C(R92.2, Q13.B)
- NET_C(Q13.C, R93.1, U21.1)
- NET_C(R93.2, I_V5)
- NET_C(Q13.E, D8.K, R94.2)
- NET_C(D8.A, GND)
- NET_C(R94.1, I_VM15)
+ NET_C(R88.2, U42.5)
+ NET_C(C19.2, U42.6, R91.1)
+ NET_C(R91.2, I_V15, U42.8)
+ NET_C(U42.7, C20.2)
+ NET_C(C20.1, GND)
+ NET_C(U42.1, GND)
+ NET_C(U42.3, C21.1)
+ NET_C(C21.2, D7.K, R92.1)
+ NET_C(D7.A, GND)
+ NET_C(R92.2, Q13.B)
+ NET_C(Q13.C, R93.1, U21.1)
+ NET_C(R93.2, I_V5)
+ NET_C(Q13.E, D8.K, R94.2)
+ NET_C(D8.A, GND)
+ NET_C(R94.1, I_VM15)
#endif
- NET_C(U21.3, R95.1)
- HINT(U21.6, NC)
- HINT(U21.5, NC)
- HINT(U21.4, NC)
- NET_C(R95.2, R97.2, R96.1)
- NET_C(R97.1, GND)
- NET_C(R96.2, C22.1)
- NET_C(C22.2, SJ)
-
- //
- // Page 3, bottom-middle+right (photon)
- //
-
- NET_C(U35.1, GND)
- NET_C(U35.6, U35.2, R48.1, C13.2)
- NET_C(C13.1, GND)
- NET_C(R48.2, U35.7, R47.1)
- NET_C(R47.2, U35.8, U35.4, R49.2, R51.2, I_V5, Q7.E)
- NET_C(U35.5, C14.2)
- NET_C(C14.1, GND)
- NET_C(U35.3, R49.1, R50.1)
- NET_C(R50.2, R51.1, Q7.B)
- NET_C(Q7.C, R52.2, R54.2, R53.1)
- NET_C(R52.1, I_VM15)
- NET_C(R54.1, GND)
- NET_C(R53.2, Q8.B)
- NET_C(Q8.E, GND)
- NET_C(Q8.C, R58.1)
- NET_C(R58.2, R59.1, R60.2, C15.1, U36.3)
- NET_C(R59.2, I_V15)
- NET_C(R60.1, GND)
- NET_C(C15.2, GND)
- NET_C(U36.2, U36.6, R61.2)
- ALIAS(VP, R61.2)
- NET_C(R61.1, R62.1, U37.2)
- NET_C(R62.2, U37.6)
- ALIAS(VN, R62.2)
- NET_C(U37.3, GND)
-
- NET_C(VP, R63.1)
- NET_C(R63.2, U38.3, R64.1)
- NET_C(R64.2, U38.6, R65.1)
- NET_C(U38.2, R71.1, C16.2, U39.2)
- NET_C(C16.1, GND)
+ NET_C(U21.3, R95.1)
+ HINT(U21.6, NC)
+ HINT(U21.5, NC)
+ HINT(U21.4, NC)
+ NET_C(R95.2, R97.2, R96.1)
+ NET_C(R97.1, GND)
+ NET_C(R96.2, C22.1)
+ NET_C(C22.2, SJ)
+
+ //
+ // Page 3, bottom-middle+right (photon)
+ //
+
+ NET_C(U35.1, GND)
+ NET_C(U35.6, U35.2, R48.1, C13.2)
+ NET_C(C13.1, GND)
+ NET_C(R48.2, U35.7, R47.1)
+ NET_C(R47.2, U35.8, U35.4, R49.2, R51.2, I_V5, Q7.E)
+ NET_C(U35.5, C14.2)
+ NET_C(C14.1, GND)
+ NET_C(U35.3, R49.1, R50.1)
+ NET_C(R50.2, R51.1, Q7.B)
+ NET_C(Q7.C, R52.2, R54.2, R53.1)
+ NET_C(R52.1, I_VM15)
+ NET_C(R54.1, GND)
+ NET_C(R53.2, Q8.B)
+ NET_C(Q8.E, GND)
+ NET_C(Q8.C, R58.1)
+ NET_C(R58.2, R59.1, R60.2, C15.1, U36.3)
+ NET_C(R59.2, I_V15)
+ NET_C(R60.1, GND)
+ NET_C(C15.2, GND)
+ NET_C(U36.2, U36.6, R61.2)
+ ALIAS(VP, R61.2)
+ NET_C(R61.1, R62.1, U37.2)
+ NET_C(R62.2, U37.6)
+ ALIAS(VN, R62.2)
+ NET_C(U37.3, GND)
+
+ NET_C(VP, R63.1)
+ NET_C(R63.2, U38.3, R64.1)
+ NET_C(R64.2, U38.6, R65.1)
+ NET_C(U38.2, R71.1, C16.2, U39.2)
+ NET_C(C16.1, GND)
#if (HLE_PHOTON_VCO)
- //
- // The PHOTON VCO is modulated by the 555 timer U35,
- // fed through some capacitors and an op-amp to
- // produce a periodic charge/discharge curve. The
- // output of the op-amp U36 tracks the final
- // frequency pretty closely, but only if charge and
- // discharge curves are considered separately. Use
- // the raw U35.3 output as a switch to pick the
- // appropriate curve.
- //
- // U35.3 on:
- // R2 = 0.95303: HP = (0.000454865*A0) - 0.000727100
- // R2 = 0.97158: HP = (0.0000320398*A0*A0) + (0.000096187*A0) + 0.000101501
- // R2 = 0.99149: HP = (0.0000173739*A0*A0*A0) - (0.000265948*A0*A0) + (0.00163589*A0) - 0.00222259
- // R2 = 0.99201: HP = (-0.00000151250*A0*A0*A0*A0) + (0.0000522525*A0*A0*A0) - (0.000547752*A0*A0) + (0.00256844*A0) - 0.00327534
- // R2 = 0.99549: HP = (0.00000220778*A0*A0*A0*A0*A0) - (0.000065312*A0*A0*A0*A0) + (0.000753266*A0*A0*A0) - (0.00418112*A0*A0) + (0.0113844*A0) - 0.0112392
- //
- // U35.3 off:
- // R2 = 0.18174: HP = (0.000065384*A0) + 0.000468783
- // R2 = 0.83543: HP = (-0.0000468095*A0*A0) + (0.000655196*A0) - 0.000641642
- // R2 = 0.99434: HP = (-0.0000088969*A0*A0*A0) + (0.000127464*A0*A0) - (0.000276787*A0) + 0.000661774
- // R2 = 0.99978: HP = (-0.000000655767*A0*A0*A0*A0) + (0.0000088937*A0*A0*A0) - (0.0000336865*A0*A0) + (0.000281719*A0) + 0.0000419612
- // R2 = 0.99987: HP = (0.0000000525584*A0*A0*A0*A0*A0) - (0.00000241385*A0*A0*A0*A0) + (0.0000304913*A0*A0*A0) - (0.000153608*A0*A0) + (0.000579685*A0) - 0.000223579
- //
+ //
+ // The PHOTON VCO is modulated by the 555 timer U35,
+ // fed through some capacitors and an op-amp to
+ // produce a periodic charge/discharge curve. The
+ // output of the op-amp U36 tracks the final
+ // frequency pretty closely, but only if charge and
+ // discharge curves are considered separately. Use
+ // the raw U35.3 output as a switch to pick the
+ // appropriate curve.
+ //
+ // U35.3 on:
+ // R2 = 0.95303: HP = (0.000454865*A0) - 0.000727100
+ // R2 = 0.97158: HP = (0.0000320398*A0*A0) + (0.000096187*A0) + 0.000101501
+ // R2 = 0.99149: HP = (0.0000173739*A0*A0*A0) - (0.000265948*A0*A0) + (0.00163589*A0) - 0.00222259
+ // R2 = 0.99201: HP = (-0.00000151250*A0*A0*A0*A0) + (0.0000522525*A0*A0*A0) - (0.000547752*A0*A0) + (0.00256844*A0) - 0.00327534
+ // R2 = 0.99549: HP = (0.00000220778*A0*A0*A0*A0*A0) - (0.000065312*A0*A0*A0*A0) + (0.000753266*A0*A0*A0) - (0.00418112*A0*A0) + (0.0113844*A0) - 0.0112392
+ //
+ // U35.3 off:
+ // R2 = 0.18174: HP = (0.000065384*A0) + 0.000468783
+ // R2 = 0.83543: HP = (-0.0000468095*A0*A0) + (0.000655196*A0) - 0.000641642
+ // R2 = 0.99434: HP = (-0.0000088969*A0*A0*A0) + (0.000127464*A0*A0) - (0.000276787*A0) + 0.000661774
+ // R2 = 0.99978: HP = (-0.000000655767*A0*A0*A0*A0) + (0.0000088937*A0*A0*A0) - (0.0000336865*A0*A0) + (0.000281719*A0) + 0.0000419612
+ // R2 = 0.99987: HP = (0.0000000525584*A0*A0*A0*A0*A0) - (0.00000241385*A0*A0*A0*A0) + (0.0000304913*A0*A0*A0) - (0.000153608*A0*A0) + (0.000579685*A0) - 0.000223579
+ //
VARCLOCK(PHOTONCLK, 2, "max(0.000001,min(0.1,if(A1>2.5,(0.0000173739*A0*A0*A0) - (0.000265948*A0*A0) + (0.00163589*A0) - 0.00222259,(-0.0000088969*A0*A0*A0) + (0.000127464*A0*A0) - (0.000276787*A0) + 0.000661774)))")
NET_C(PHOTONCLK.GND, GND)
NET_C(PHOTONCLK.VCC, I_V5)
NET_C(PHOTONCLK.Q, PHOTONENV.A0)
NET_C(PHOTONCLK.A0, U36.6)
NET_C(PHOTONCLK.A1, U35.3)
- AFUNC(PHOTONENV, 1, "if(A0>2.5,0.0038,-0.0038)")
- NET_C(PHOTONENV.Q, U41.2)
+ AFUNC(PHOTONENV, 1, "if(A0>2.5,0.0038,-0.0038)")
+ NET_C(PHOTONENV.Q, U41.2)
NET_C(GND, U40.2, U40.3, R65.2, R66.1, R66.2, R69.2, R70.1, R70.2, R71.2, R72.1, R72.2, R73.2, D5.A, D5.K, D6.A, D6.K)
#else
- NET_C(R65.2, U40.3, R70.1, R69.2)
- NET_C(U40.2, GND, D5.A)
- NET_C(D5.K, D6.K)
- NET_C(D6.A, R71.2, R72.2, R66.2)
- NET_C(U40.6, R66.1, R70.2)
- NET_C(R72.1, R73.2, U41.2)
+ NET_C(R65.2, U40.3, R70.1, R69.2)
+ NET_C(U40.2, GND, D5.A)
+ NET_C(D5.K, D6.K)
+ NET_C(D6.A, R71.2, R72.2, R66.2)
+ NET_C(U40.6, R66.1, R70.2)
+ NET_C(R72.1, R73.2, U41.2)
#endif
- NET_C(R73.1, GND)
- NET_C(U41.3, R74.2)
- NET_C(R74.1, GND)
- NET_C(VN, R67.1)
- NET_C(R67.2, U39.3, R68.1)
- NET_C(R68.2, U39.6, R69.1)
-
- NET_C(PHOTON_M, R75.1, R76.1)
- NET_C(R75.2, I_V5, R77.2, Q9.E)
- NET_C(R76.2, R77.1, Q9.B)
- NET_C(Q9.C, R78.2, R79.2, Q10.E)
- NET_C(R78.1, I_VM15)
- NET_C(R79.1, GND)
- NET_C(Q10.B, R80.2)
- NET_C(R80.1, GND)
- NET_C(Q10.C, C17.1, R81.1)
- NET_C(C17.2, I_VM15)
- NET_C(R81.2, U41.5)
-
- NET_C(U41.6, CS, R149.2, U49.3)
- NET_C(R149.1, GND)
- NET_C(U49.2, U49.6, C31.1)
- NET_C(C31.2, R150.1)
- NET_C(R150.2, SJ, U50.2, R151.1)
- NET_C(U50.3, GND)
- NET_C(R151.2, U50.6)
- ALIAS(OUTPUT, R151.2)
-
- //
- // Unconnected inputs
- //
-
- NET_C(GND, U2.8, U2.10, U22.2, U22.3, U22.5, U22.6, U24.3, U27.8, U27.9, U27.10, U27.11)
-
- //
- // Unconnected outputs
- //
-
- HINT(U2.9, NC)
- HINT(U2.11, NC)
- HINT(U24.4, NC)
+ NET_C(R73.1, GND)
+ NET_C(U41.3, R74.2)
+ NET_C(R74.1, GND)
+ NET_C(VN, R67.1)
+ NET_C(R67.2, U39.3, R68.1)
+ NET_C(R68.2, U39.6, R69.1)
+
+ NET_C(PHOTON_M, R75.1, R76.1)
+ NET_C(R75.2, I_V5, R77.2, Q9.E)
+ NET_C(R76.2, R77.1, Q9.B)
+ NET_C(Q9.C, R78.2, R79.2, Q10.E)
+ NET_C(R78.1, I_VM15)
+ NET_C(R79.1, GND)
+ NET_C(Q10.B, R80.2)
+ NET_C(R80.1, GND)
+ NET_C(Q10.C, C17.1, R81.1)
+ NET_C(C17.2, I_VM15)
+ NET_C(R81.2, U41.5)
+
+ NET_C(U41.6, CS, R149.2, U49.3)
+ NET_C(R149.1, GND)
+ NET_C(U49.2, U49.6, C31.1)
+ NET_C(C31.2, R150.1)
+ NET_C(R150.2, SJ, U50.2, R151.1)
+ NET_C(U50.3, GND)
+ NET_C(R151.2, U50.6)
+ ALIAS(OUTPUT, R151.2)
+
+ //
+ // Unconnected inputs
+ //
+
+ NET_C(GND, U2.8, U2.10, U22.2, U22.3, U22.5, U22.6, U24.3, U27.8, U27.9, U27.10, U27.11)
+
+ //
+ // Unconnected outputs
+ //
+
+ HINT(U2.9, NC)
+ HINT(U2.11, NC)
+ HINT(U24.4, NC)
#if (ENABLE_FRONTIERS)
- //
- // Isolate the NOISE consumers from one another; the first one
- // in particular is a big win
- //
- OPTIMIZE_FRONTIER(R100.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R15.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R34.1, RES_M(1), 50)
-
- //
- // Isolate the CS sounds from the rest of the mixer (huge!)
- //
- OPTIMIZE_FRONTIER(U49.3, RES_M(1), 50)
+ //
+ // Isolate the NOISE consumers from one another; the first one
+ // in particular is a big win
+ //
+ OPTIMIZE_FRONTIER(R100.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R15.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R34.1, RES_M(1), 50)
+
+ //
+ // Isolate the CS sounds from the rest of the mixer (huge!)
+ //
+ OPTIMIZE_FRONTIER(U49.3, RES_M(1), 50)
#endif
NETLIST_END()
diff --git a/src/mame/audio/nl_spacewar.cpp b/src/mame/audio/nl_spacewar.cpp
index 550509873ef..0e308b48a06 100644
--- a/src/mame/audio/nl_spacewar.cpp
+++ b/src/mame/audio/nl_spacewar.cpp
@@ -36,13 +36,13 @@ NETLIST_START(spacewar)
SOLVER(Solver, 1000)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
-// PARAM(Solver.MIN_TS_TS, 2e-5)
+// PARAM(Solver.MIN_TS_TS, 2e-5)
- TTL_INPUT(I_OUT_0, 0) // active high
- TTL_INPUT(I_OUT_1, 0) // active high
- TTL_INPUT(I_OUT_2, 0) // active high
- TTL_INPUT(I_OUT_3, 0) // active high
- TTL_INPUT(I_OUT_4, 0) // active high
+ TTL_INPUT(I_OUT_0, 0) // active high
+ TTL_INPUT(I_OUT_1, 0) // active high
+ TTL_INPUT(I_OUT_2, 0) // active high
+ TTL_INPUT(I_OUT_3, 0) // active high
+ TTL_INPUT(I_OUT_4, 0) // active high
NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND)
NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC)
@@ -64,7 +64,7 @@ NETLIST_START(spacewar)
RES(R9, RES_K(39))
RES(R10, RES_K(2.2))
RES(R11, 470)
-// RES(R12, 0) -- not present on Space Wars
+// RES(R12, 0) -- not present on Space Wars
RES(R13, RES_K(8.2))
RES(R14, RES_K(120))
RES(R15, RES_K(20))
@@ -72,17 +72,17 @@ NETLIST_START(spacewar)
RES(R17, RES_K(10))
RES(R18, RES_K(47))
RES(R19, 820)
-// POT(R20, RES_K(10)) -- part of final amp (not emulated)
-// RES(R21, 150) -- part of final amp (not emulated), not present on Space Wars
-// RES(R22, 2.7) -- part of final amp (not emulated), not present on Space Wars
-// RES(R23, 2.7) -- part of final amp (not emulated), not present on Space Wars
+// POT(R20, RES_K(10)) -- part of final amp (not emulated)
+// RES(R21, 150) -- part of final amp (not emulated), not present on Space Wars
+// RES(R22, 2.7) -- part of final amp (not emulated), not present on Space Wars
+// RES(R23, 2.7) -- part of final amp (not emulated), not present on Space Wars
RES(R24, RES_K(47))
RES(R25, 150)
RES(R26, RES_K(160))
RES(R27, 750)
-// RES(R28, RES_K(68)) -- part of final amp (not emulated), illegible on Space Wars
-// POT(R29, RES_K(10)) -- part of final amp (not emulated)
-// RES(R30, 750) -- part of final amp (not emulated)
+// RES(R28, RES_K(68)) -- part of final amp (not emulated), illegible on Space Wars
+// POT(R29, RES_K(10)) -- part of final amp (not emulated)
+// RES(R30, 750) -- part of final amp (not emulated)
RES(R31, 470)
RES(R32, RES_K(1))
RES(R33, RES_K(39))
@@ -91,7 +91,7 @@ NETLIST_START(spacewar)
RES(R36, RES_M(1))
RES(R37, RES_K(10))
RES(R38, RES_K(10))
-// RES(R39, RES_K(120))
+// RES(R39, RES_K(120))
RES(R40, RES_K(120))
RES(R41, RES_K(20))
RES(R42, RES_K(1))
@@ -102,21 +102,21 @@ NETLIST_START(spacewar)
CAP(C3, CAP_U(0.01))
CAP(C4, CAP_U(0.01))
CAP(C5, CAP_U(0.1))
-// CAP(C6, CAP_U(4.7)) // not needed
-// CAP(C7, 0) // not present
+// CAP(C6, CAP_U(4.7)) // not needed
+// CAP(C7, 0) // not present
CAP(C8, CAP_U(1))
CAP(C9, CAP_U(0.1))
CAP(C10, CAP_P(220))
CAP(C11, CAP_U(0.1))
-// CAP(C12, CAP_U(0.01)) -- part of final amp (not emulated)
-// CAP(C13, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C14, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C15, CAP_U(50)) -- not needed
-// CAP(C16, CAP_U(2.2)) -- not needed
+// CAP(C12, CAP_U(0.01)) -- part of final amp (not emulated)
+// CAP(C13, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C14, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C15, CAP_U(50)) -- not needed
+// CAP(C16, CAP_U(2.2)) -- not needed
CAP(C17, CAP_U(0.01))
CAP(C18, CAP_U(33))
-// CAP(C19, CAP_U(50)) -- not needed
-// CAP(C20, CAP_U(2.2)) -- not needed
+// CAP(C19, CAP_U(50)) -- not needed
+// CAP(C20, CAP_U(2.2)) -- not needed
CAP(C21, CAP_U(0.02))
CAP(C22, CAP_U(0.1))
CAP(C23, CAP_U(0.1))
@@ -129,49 +129,49 @@ NETLIST_START(spacewar)
D_1N914(CR5)
D_1N914(CR6)
- Q_2N3906(Q1) // PNP
- Q_2N3904(Q2) // NPN
- Q_2N6426(Q3) // NPN Darlington
- Q_2N6292(Q4) // NPN
- Q_2N6107(Q5) // PNP
- Q_2N6426(Q6) // NPN Darlington
- Q_2N3904(Q7) // NPN
+ Q_2N3906(Q1) // PNP
+ Q_2N3904(Q2) // NPN
+ Q_2N6426(Q3) // NPN Darlington
+ Q_2N6292(Q4) // NPN
+ Q_2N6107(Q5) // PNP
+ Q_2N6426(Q6) // NPN Darlington
+ Q_2N3904(Q7) // NPN
- TL081_DIP(U1) // Op. Amp.
+ TL081_DIP(U1) // Op. Amp.
NET_C(U1.4, I_VM15)
NET_C(U1.7, I_V15)
- TTL_7406_DIP(U2) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(U2) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(U2.7, GND)
NET_C(U2.14, I_V5)
- TL081_DIP(U3) // Op. Amp.
+ TL081_DIP(U3) // Op. Amp.
NET_C(U3.4, I_VM15)
NET_C(U3.7, I_V15)
-// TTL_7815_DIP(U4) // +15V Regulator -- not needed
+// TTL_7815_DIP(U4) // +15V Regulator -- not needed
- TL182_DIP(U5) // Analog switch
+ TL182_DIP(U5) // Analog switch
NET_C(U5.6, I_V15)
NET_C(U5.7, I_V5)
NET_C(U5.8, GND)
NET_C(U5.9, I_VM15)
-// TL081_DIP(U6) // Op. Amp. -- part of final amp (not emulated)
-// NET_C(U6.4, I_VM15)
-// NET_C(U6.7, I_V15)
+// TL081_DIP(U6) // Op. Amp. -- part of final amp (not emulated)
+// NET_C(U6.4, I_VM15)
+// NET_C(U6.7, I_V15)
-// TTL_7915_DIP(U7) // -15V Regulator -- not needed
+// TTL_7915_DIP(U7) // -15V Regulator -- not needed
- TL081_DIP(U8) // Op. Amp.
+ TL081_DIP(U8) // Op. Amp.
NET_C(U8.4, I_VM15)
NET_C(U8.7, I_V15)
- TL081_DIP(U9) // Op. Amp.
+ TL081_DIP(U9) // Op. Amp.
NET_C(U9.4, I_VM15)
NET_C(U9.7, I_V15)
- TL182_DIP(U10) // Analog switch
+ TL182_DIP(U10) // Analog switch
NET_C(U10.6, I_V15)
NET_C(U10.7, I_V5)
NET_C(U10.8, GND)
@@ -296,19 +296,19 @@ NETLIST_START(spacewar)
#if (ENABLE_FRONTIERS)
// Separate each input into the summing network
- OPTIMIZE_FRONTIER(R13.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R15.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R41.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R37.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R13.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R15.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R41.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R37.1, RES_M(1), 50)
// Decouple the Darlington BJTs from the sounds they enable
- OPTIMIZE_FRONTIER(R27.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R11.2, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R27.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R11.2, RES_M(1), 50)
// Decouple the noise source from the downstream filters
- OPTIMIZE_FRONTIER(C3.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R24.1, RES_M(1), 50)
- OPTIMIZE_FRONTIER(R38.2, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(C3.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R24.1, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(R38.2, RES_M(1), 50)
#endif
NETLIST_END()
diff --git a/src/mame/audio/nl_speedfrk.cpp b/src/mame/audio/nl_speedfrk.cpp
index 4d14ae240d8..fdd78e3dac1 100644
--- a/src/mame/audio/nl_speedfrk.cpp
+++ b/src/mame/audio/nl_speedfrk.cpp
@@ -39,12 +39,12 @@ NETLIST_START(speedfrk)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
- TTL_INPUT(I_OUT_0, 1) // active low
- TTL_INPUT(I_OUT_1, 1) // active low
- TTL_INPUT(I_OUT_2, 1) // active low
- TTL_INPUT(I_OUT_3, 1) // active low
- TTL_INPUT(I_OUT_4, 1) // active low
- TTL_INPUT(I_OUT_7, 1) // active low
+ TTL_INPUT(I_OUT_0, 1) // active low
+ TTL_INPUT(I_OUT_1, 1) // active low
+ TTL_INPUT(I_OUT_2, 1) // active low
+ TTL_INPUT(I_OUT_3, 1) // active low
+ TTL_INPUT(I_OUT_4, 1) // active low
+ TTL_INPUT(I_OUT_7, 1) // active low
NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND, I_OUT_7.GND)
NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC, I_OUT_7.VCC)
@@ -53,162 +53,162 @@ NETLIST_START(speedfrk)
ANALOG_INPUT(I_V5, 5)
-// RES(R1, 2.7)
-// RES(R2, 2.7)
-// RES(R3, 2.7)
-// RES(R4, 2.7)
-// RES(R5, 150) // PCB verified
-// RES(R6, 150)
-// RES(R7, RES_K(10)) // PCB verified
-// RES(R8, RES_K(68)) // PCB verified
-// RES(R9, RES_K(2.2)) // PCB verified
-// RES(R10, 820) // PCB verified
-// RES(R11, RES_K(47)) // PCB verified
-// RES(R12, RES_K(1)) ??
+// RES(R1, 2.7)
+// RES(R2, 2.7)
+// RES(R3, 2.7)
+// RES(R4, 2.7)
+// RES(R5, 150) // PCB verified
+// RES(R6, 150)
+// RES(R7, RES_K(10)) // PCB verified
+// RES(R8, RES_K(68)) // PCB verified
+// RES(R9, RES_K(2.2)) // PCB verified
+// RES(R10, 820) // PCB verified
+// RES(R11, RES_K(47)) // PCB verified
+// RES(R12, RES_K(1)) ??
RES(R13, 150)
- RES(R14, RES_K(2.2)) // PCB verified
- RES(R15, RES_K(10)) // PCB verified
- RES(R16, RES_K(2.2)) // PCB verified
- RES(R17, RES_K(1)) // PCB verified
- RES(R18, RES_K(8.2)) // PCB verified
- RES(R19, RES_K(3.9)) // PCB verified
- RES(R20, RES_K(4.7)) // PCB verified
- RES(R21, RES_K(3.3)) // PCB verified
- RES(R22, RES_K(10)) // PCB verified
- RES(R23, RES_K(4.7)) // PCB verified
+ RES(R14, RES_K(2.2)) // PCB verified
+ RES(R15, RES_K(10)) // PCB verified
+ RES(R16, RES_K(2.2)) // PCB verified
+ RES(R17, RES_K(1)) // PCB verified
+ RES(R18, RES_K(8.2)) // PCB verified
+ RES(R19, RES_K(3.9)) // PCB verified
+ RES(R20, RES_K(4.7)) // PCB verified
+ RES(R21, RES_K(3.3)) // PCB verified
+ RES(R22, RES_K(10)) // PCB verified
+ RES(R23, RES_K(4.7)) // PCB verified
RES(R24, RES_K(10))
- RES(R25, RES_K(18)) // PCB verified
- RES(R26, RES_K(18)) // PCB verified
- RES(R27, RES_K(6.8)) // PCB verified
- RES(R28, RES_K(10)) // PCB verified
- RES(R29, RES_K(2.2)) // PCB verified
- RES(R30, 330) // PCB verified
- RES(R31, 330) // PCB verified
- RES(R32, RES_K(1)) // PCB verified
- RES(R33, RES_K(1)) // PCB verified
- RES(R34, RES_K(1)) // PCB verified
-// RES(R35, 0) // PCB verified: not populated
- RES(R36, RES_K(1)) // PCB verified
- RES(R37, RES_K(1)) // PCB verified
- RES(R38, RES_K(1)) // PCB verified
- RES(R39, RES_K(1)) // PCB verified
- RES(R40, RES_K(1)) // PCB verified
- RES(R41, RES_K(1)) // PCB verified
- RES(R42, RES_K(1)) // PCB verified
- RES(R43, RES_K(1)) // PCB verified
- RES(R44, RES_K(30)) // PCB verified
- RES(R45, RES_K(4.7)) // PCB verified
- RES(R46, RES_K(10)) // PCB verified
-
-// CAP(C4, CAP_U(4.7))
-// CAP(C5, CAP_U(4.7))
+ RES(R25, RES_K(18)) // PCB verified
+ RES(R26, RES_K(18)) // PCB verified
+ RES(R27, RES_K(6.8)) // PCB verified
+ RES(R28, RES_K(10)) // PCB verified
+ RES(R29, RES_K(2.2)) // PCB verified
+ RES(R30, 330) // PCB verified
+ RES(R31, 330) // PCB verified
+ RES(R32, RES_K(1)) // PCB verified
+ RES(R33, RES_K(1)) // PCB verified
+ RES(R34, RES_K(1)) // PCB verified
+// RES(R35, 0) // PCB verified: not populated
+ RES(R36, RES_K(1)) // PCB verified
+ RES(R37, RES_K(1)) // PCB verified
+ RES(R38, RES_K(1)) // PCB verified
+ RES(R39, RES_K(1)) // PCB verified
+ RES(R40, RES_K(1)) // PCB verified
+ RES(R41, RES_K(1)) // PCB verified
+ RES(R42, RES_K(1)) // PCB verified
+ RES(R43, RES_K(1)) // PCB verified
+ RES(R44, RES_K(30)) // PCB verified
+ RES(R45, RES_K(4.7)) // PCB verified
+ RES(R46, RES_K(10)) // PCB verified
+
+// CAP(C4, CAP_U(4.7))
+// CAP(C5, CAP_U(4.7))
CAP(C12, CAP_U(0.001))
CAP(C13, CAP_U(0.001))
CAP(C17, CAP_U(0.02))
CAP(C20, CAP_U(0.1))
CAP(C23, CAP_U(0.1))
-// CAP(C1, CAP_U(50))
-// CAP(C2, CAP_U(50))
-// CAP(C3, CAP_U(4.7))
-// CAP(C6, CAP_U(0.002))
-// CAP(C7, CAP_U(0.002))
-// CAP(C8, CAP_U(0.01))
-// CAP(C9, CAP_U(0.1))
-// CAP(C10, CAP_U(0.1))
-// CAP(C11, CAP_U(0.02))
-
-// D_1N914B(CR1) // OK
-// D_1N914B(CR2) // OK
- D_1N914B(CR3) // OK
-
-// Q_2N6292(Q1) // NPN
-// Q_2N6107(Q2) // PNP
- Q_2N3904(Q3) // NPN
-// Q_2N3904(Q3) // NPN -- unknown type
-
- TTL_74LS04_DIP(U2) // Hex Inverting Gates
+// CAP(C1, CAP_U(50))
+// CAP(C2, CAP_U(50))
+// CAP(C3, CAP_U(4.7))
+// CAP(C6, CAP_U(0.002))
+// CAP(C7, CAP_U(0.002))
+// CAP(C8, CAP_U(0.01))
+// CAP(C9, CAP_U(0.1))
+// CAP(C10, CAP_U(0.1))
+// CAP(C11, CAP_U(0.02))
+
+// D_1N914B(CR1) // OK
+// D_1N914B(CR2) // OK
+ D_1N914B(CR3) // OK
+
+// Q_2N6292(Q1) // NPN
+// Q_2N6107(Q2) // PNP
+ Q_2N3904(Q3) // NPN
+// Q_2N3904(Q3) // NPN -- unknown type
+
+ TTL_74LS04_DIP(U2) // Hex Inverting Gates
NET_C(U2.7, GND)
NET_C(U2.14, I_V5)
- TL081_DIP(U3) // Op. Amp.
+ TL081_DIP(U3) // Op. Amp.
NET_C(U3.4, GND)
NET_C(U3.7, I_V5)
- TTL_74LS163_DIP(U4) // Synchronous 4-Bit Counters
+ TTL_74LS163_DIP(U4) // Synchronous 4-Bit Counters
NET_C(U4.8, GND)
NET_C(U4.16, I_V5)
- TTL_74LS107_DIP(U5) // DUAL J-K FLIP-FLOPS WITH CLEAR
+ TTL_74LS107_DIP(U5) // DUAL J-K FLIP-FLOPS WITH CLEAR
NET_C(U5.7, GND)
NET_C(U5.14, I_V5)
- TTL_74LS08_DIP(U6) // Quad 2-Input AND Gates
+ TTL_74LS08_DIP(U6) // Quad 2-Input AND Gates
NET_C(U6.7, GND)
NET_C(U6.14, I_V5)
- TTL_74LS163_DIP(U7) // Synchronous 4-Bit Counters
+ TTL_74LS163_DIP(U7) // Synchronous 4-Bit Counters
NET_C(U7.8, GND)
NET_C(U7.16, I_V5)
- TTL_74LS163_DIP(U8) // Synchronous 4-Bit Counters
+ TTL_74LS163_DIP(U8) // Synchronous 4-Bit Counters
NET_C(U8.8, GND)
NET_C(U8.16, I_V5)
- TTL_74LS163_DIP(U9) // Synchronous 4-Bit Counters
+ TTL_74LS163_DIP(U9) // Synchronous 4-Bit Counters
NET_C(U9.8, GND)
NET_C(U9.16, I_V5)
-// TTL_7915_DIP(U8) // -15V Regulator -- not needed
-// TTL_7815_DIP(U9) // +15V Regulator -- not needed
+// TTL_7915_DIP(U8) // -15V Regulator -- not needed
+// TTL_7815_DIP(U9) // +15V Regulator -- not needed
- TTL_74LS04_DIP(U10) // Hex Inverting Gates
+ TTL_74LS04_DIP(U10) // Hex Inverting Gates
NET_C(U10.7, GND)
NET_C(U10.14, I_V5)
- TTL_74LS08_DIP(U11) // Quad 2-Input AND Gates
+ TTL_74LS08_DIP(U11) // Quad 2-Input AND Gates
NET_C(U11.7, GND)
NET_C(U11.14, I_V5)
- TTL_74LS75_DIP(U12) // 4-Bit Bistable Latches with Complementary Outputs
+ TTL_74LS75_DIP(U12) // 4-Bit Bistable Latches with Complementary Outputs
NET_C(U12.12, GND)
NET_C(U12.5, I_V5)
- TTL_74LS164_DIP(U13) // 8-bit parallel-out serial shift registers
+ TTL_74LS164_DIP(U13) // 8-bit parallel-out serial shift registers
NET_C(U13.7, GND)
NET_C(U13.14, I_V5)
- TTL_74LS164_DIP(U14) // 8-bit parallel-out serial shift registers
+ TTL_74LS164_DIP(U14) // 8-bit parallel-out serial shift registers
NET_C(U14.7, GND)
NET_C(U14.14, I_V5)
- TTL_74LS163_DIP(U15) // Synchronous 4-Bit Counters
+ TTL_74LS163_DIP(U15) // Synchronous 4-Bit Counters
NET_C(U15.8, GND)
NET_C(U15.16, I_V5)
- TTL_74LS107_DIP(U17) // DUAL J-K FLIP-FLOPS WITH CLEAR
+ TTL_74LS107_DIP(U17) // DUAL J-K FLIP-FLOPS WITH CLEAR
NET_C(U17.7, GND)
NET_C(U17.14, I_V5)
- TTL_74LS393_DIP(U18) // Dual 4-Stage Binary Counter
+ TTL_74LS393_DIP(U18) // Dual 4-Stage Binary Counter
NET_C(U18.7, GND)
NET_C(U18.14, I_V5)
- TTL_74LS86_DIP(U19) // Quad 2-Input XOR Gates
+ TTL_74LS86_DIP(U19) // Quad 2-Input XOR Gates
NET_C(U19.7, GND)
NET_C(U19.14, I_V5)
- TTL_74LS164_DIP(U20) // 8-bit parallel-out serial shift registers
+ TTL_74LS164_DIP(U20) // 8-bit parallel-out serial shift registers
NET_C(U20.7, GND)
NET_C(U20.14, I_V5)
- LM555_DIP(U22) // 5-5-5 Timer
+ LM555_DIP(U22) // 5-5-5 Timer
- TTL_74LS163_DIP(U23) // Dual 4-Stage Binary Counter
+ TTL_74LS163_DIP(U23) // Dual 4-Stage Binary Counter
NET_C(U23.8, GND)
NET_C(U23.16, I_V5)
- TTL_74LS164_DIP(U24) // 8-bit parallel-out serial shift registers
+ TTL_74LS164_DIP(U24) // 8-bit parallel-out serial shift registers
NET_C(U24.7, GND)
NET_C(U24.14, I_V5)
@@ -267,7 +267,7 @@ NETLIST_START(speedfrk)
NET_C(U4.6, R36.1)
NET_C(U4.4, U4.5, GND)
NET_C(U4.14, U18.1, U6.13, U7.2)
- NET_C(U4.10, I_V5) // need to verify
+ NET_C(U4.10, I_V5) // need to verify
NET_C(U18.6, U18.13)
NET_C(U18.2, U18.12, GND)
@@ -296,7 +296,7 @@ NETLIST_START(speedfrk)
NET_C(U19.11, U20.1)
NET_C(U20.9, R42.1)
-// NET_C(R42.2, I_V5)
+// NET_C(R42.2, I_V5)
NET_C(U20.2, U19.3)
NET_C(U20.12, U19.1)
NET_C(U20.13, U19.4)
@@ -308,7 +308,7 @@ NETLIST_START(speedfrk)
NET_C(U24.13, R44.1, U11.12, U11.9, U11.5, U11.2)
NET_C(U23.1, U23.3, U23.5, U23.7, R40.2)
- NET_C(U23.10, R40.2) // need to verify
+ NET_C(U23.10, R40.2) // need to verify
NET_C(R40.1, I_V5)
NET_C(U23.4, U23.6, GND)
NET_C(U23.9, U19.8, U17.9)
@@ -401,51 +401,51 @@ NETLIST_START(speedfrk)
// Unconnected outputs
//
- HINT(U4.11, NC) // Q3
- HINT(U4.12, NC) // Q2
- HINT(U4.13, NC) // Q1
- HINT(U5.5, NC) // Q2
- HINT(U7.14, NC) // Q0
- HINT(U8.11, NC) // Q3
- HINT(U8.12, NC) // Q2
- HINT(U8.13, NC) // Q1
- HINT(U8.14, NC) // Q0
- HINT(U9.11, NC) // Q3
- HINT(U9.12, NC) // Q2
- HINT(U9.13, NC) // Q1
- HINT(U9.14, NC) // Q0
- HINT(U10.2, NC) // QQ1 -- part of 2MHz clock gen
- HINT(U10.4, NC) // QQ2 -- part of 2MHz clock gen
- HINT(U10.6, NC) // QQ3 -- part of 2MHz clock gen
- HINT(U12.1, NC) // QQ0
- HINT(U12.8, NC) // QQ3
- HINT(U12.11, NC) // QQ2
- HINT(U12.14, NC) // QQ1
- HINT(U15.11, NC) // Q3
- HINT(U15.12, NC) // Q2
- HINT(U15.13, NC) // Q1
- HINT(U15.14, NC) // Q0
- HINT(U17.2, NC) // QQ1
- HINT(U17.6, NC) // QQ2
- HINT(U18.3, NC) // Q0
- HINT(U18.4, NC) // Q1
- HINT(U18.5, NC) // Q2
- HINT(U18.9, NC) // Q2
- HINT(U20.3, NC) // Q0
- HINT(U20.4, NC) // Q1
- HINT(U20.5, NC) // Q2
- HINT(U20.6, NC) // Q3
- HINT(U20.10, NC) // Q4
- HINT(U20.11, NC) // Q5
- HINT(U23.11, NC) // Q3
- HINT(U23.12, NC) // Q2
- HINT(U23.13, NC) // Q1
- HINT(U23.14, NC) // Q0
- HINT(U24.3, NC) // Q0
- HINT(U24.4, NC) // Q1
- HINT(U24.5, NC) // Q2
- HINT(U24.6, NC) // Q3
- HINT(U24.10, NC) // Q4
- HINT(U24.11, NC) // Q5
+ HINT(U4.11, NC) // Q3
+ HINT(U4.12, NC) // Q2
+ HINT(U4.13, NC) // Q1
+ HINT(U5.5, NC) // Q2
+ HINT(U7.14, NC) // Q0
+ HINT(U8.11, NC) // Q3
+ HINT(U8.12, NC) // Q2
+ HINT(U8.13, NC) // Q1
+ HINT(U8.14, NC) // Q0
+ HINT(U9.11, NC) // Q3
+ HINT(U9.12, NC) // Q2
+ HINT(U9.13, NC) // Q1
+ HINT(U9.14, NC) // Q0
+ HINT(U10.2, NC) // QQ1 -- part of 2MHz clock gen
+ HINT(U10.4, NC) // QQ2 -- part of 2MHz clock gen
+ HINT(U10.6, NC) // QQ3 -- part of 2MHz clock gen
+ HINT(U12.1, NC) // QQ0
+ HINT(U12.8, NC) // QQ3
+ HINT(U12.11, NC) // QQ2
+ HINT(U12.14, NC) // QQ1
+ HINT(U15.11, NC) // Q3
+ HINT(U15.12, NC) // Q2
+ HINT(U15.13, NC) // Q1
+ HINT(U15.14, NC) // Q0
+ HINT(U17.2, NC) // QQ1
+ HINT(U17.6, NC) // QQ2
+ HINT(U18.3, NC) // Q0
+ HINT(U18.4, NC) // Q1
+ HINT(U18.5, NC) // Q2
+ HINT(U18.9, NC) // Q2
+ HINT(U20.3, NC) // Q0
+ HINT(U20.4, NC) // Q1
+ HINT(U20.5, NC) // Q2
+ HINT(U20.6, NC) // Q3
+ HINT(U20.10, NC) // Q4
+ HINT(U20.11, NC) // Q5
+ HINT(U23.11, NC) // Q3
+ HINT(U23.12, NC) // Q2
+ HINT(U23.13, NC) // Q1
+ HINT(U23.14, NC) // Q0
+ HINT(U24.3, NC) // Q0
+ HINT(U24.4, NC) // Q1
+ HINT(U24.5, NC) // Q2
+ HINT(U24.6, NC) // Q3
+ HINT(U24.10, NC) // Q4
+ HINT(U24.11, NC) // Q5
NETLIST_END()
diff --git a/src/mame/audio/nl_starcas.cpp b/src/mame/audio/nl_starcas.cpp
index bc3ea5ff26c..13a19649801 100644
--- a/src/mame/audio/nl_starcas.cpp
+++ b/src/mame/audio/nl_starcas.cpp
@@ -49,14 +49,14 @@
// once for War of the Worlds
//
-#define VARIANT_STARCASTLE 0
-#define VARIANT_WOTW 1
+#define VARIANT_STARCASTLE 0
+#define VARIANT_WOTW 1
-#define SOUND_VARIANT (VARIANT_STARCASTLE)
+#define SOUND_VARIANT (VARIANT_STARCASTLE)
#include "nl_starcas.cpp"
#undef SOUND_VARIANT
-#define SOUND_VARIANT (VARIANT_WOTW)
+#define SOUND_VARIANT (VARIANT_WOTW)
#include "nl_starcas.cpp"
@@ -82,12 +82,12 @@ NETLIST_START(wotw)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
- TTL_INPUT(I_OUT_0, 0) // active low
- TTL_INPUT(I_OUT_1, 1) // active low
- TTL_INPUT(I_OUT_2, 1) // active low
- TTL_INPUT(I_OUT_3, 1) // active low
- TTL_INPUT(I_OUT_4, 0) // active low
- TTL_INPUT(I_OUT_7, 0) // active low
+ TTL_INPUT(I_OUT_0, 0) // active low
+ TTL_INPUT(I_OUT_1, 1) // active low
+ TTL_INPUT(I_OUT_2, 1) // active low
+ TTL_INPUT(I_OUT_3, 1) // active low
+ TTL_INPUT(I_OUT_4, 0) // active low
+ TTL_INPUT(I_OUT_7, 0) // active low
NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND, I_OUT_7.GND)
NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC, I_OUT_7.VCC)
@@ -99,31 +99,31 @@ NETLIST_START(wotw)
ANALOG_INPUT(I_VM15, -15)
RES(R1, RES_K(1))
- RES(R2, 160)
- RES(R3, RES_K(1))
- RES(R4, RES_K(1))
- RES(R5, RES_K(2))
- RES(R6, RES_K(2))
- RES(R7, RES_K(4.7))
- RES(R8, RES_K(3.3))
- RES(R9, 820)
- RES(R10, RES_M(3.3))
- RES(R11, RES_M(3.3))
- RES(R12, RES_M(5.1))
- RES(R13, RES_M(1.6))
- RES(R14, RES_K(2))
- RES(R15, RES_K(18))
- RES(R16, RES_K(10))
- RES(R17, RES_K(10))
- RES(R18, RES_K(91))
- RES(R19, RES_K(10))
- RES(R20, RES_K(1))
- RES(R21, RES_K(2))
- RES(R22, RES_K(1))
- RES(R24, RES_K(200))
- RES(R25, RES_K(30))
- RES(R26, RES_K(200))
- RES(R27, RES_K(51))
+ RES(R2, 160)
+ RES(R3, RES_K(1))
+ RES(R4, RES_K(1))
+ RES(R5, RES_K(2))
+ RES(R6, RES_K(2))
+ RES(R7, RES_K(4.7))
+ RES(R8, RES_K(3.3))
+ RES(R9, 820)
+ RES(R10, RES_M(3.3))
+ RES(R11, RES_M(3.3))
+ RES(R12, RES_M(5.1))
+ RES(R13, RES_M(1.6))
+ RES(R14, RES_K(2))
+ RES(R15, RES_K(18))
+ RES(R16, RES_K(10))
+ RES(R17, RES_K(10))
+ RES(R18, RES_K(91))
+ RES(R19, RES_K(10))
+ RES(R20, RES_K(1))
+ RES(R21, RES_K(2))
+ RES(R22, RES_K(1))
+ RES(R24, RES_K(200))
+ RES(R25, RES_K(30))
+ RES(R26, RES_K(200))
+ RES(R27, RES_K(51))
RES(R28, RES_M(1))
RES(R29, 430)
RES(R30, 560)
@@ -148,61 +148,61 @@ NETLIST_START(wotw)
RES(R49, RES_K(20))
RES(R50, RES_K(1))
RES(R51, RES_K(12))
- RES(R52, RES_K(4.7))
+ RES(R52, RES_K(4.7))
RES(R53, RES_K(1))
RES(R54, RES_K(39))
RES(R55, RES_K(12))
RES(R56, RES_K(1))
RES(R57, RES_K(100))
- RES(R58, RES_K(18))
+ RES(R58, RES_K(18))
RES(R59, RES_K(15))
RES(R60, RES_K(7.5))
RES(R61, 430)
RES(R62, 430)
- RES(R63, RES_K(4.7))
+ RES(R63, RES_K(4.7))
RES(R64, RES_K(1))
RES(R65, RES_K(39))
RES(R66, RES_K(12))
RES(R67, RES_K(1))
RES(R68, RES_K(100))
RES(R69, RES_K(6.8))
- RES(R70, RES_K(18))
+ RES(R70, RES_K(18))
RES(R71, RES_K(47))
RES(R72, 390)
RES(R73, 390)
- RES(R74, RES_K(4.7))
+ RES(R74, RES_K(4.7))
RES(R75, RES_K(2.7))
- RES(R76, RES_K(4.7))
+ RES(R76, RES_K(4.7))
RES(R77, RES_K(39))
RES(R78, RES_K(12))
RES(R79, RES_K(1))
- RES(R80, RES_K(200))
- RES(R81, RES_K(300))
- RES(R82, RES_K(240))
+ RES(R80, RES_K(200))
+ RES(R81, RES_K(300))
+ RES(R82, RES_K(240))
RES(R83, 200)
RES(R84, 200)
- RES(R85, RES_K(4.7))
+ RES(R85, RES_K(4.7))
RES(R86, RES_K(2.7))
- RES(R87, RES_K(4.7))
+ RES(R87, RES_K(4.7))
RES(R88, RES_K(1))
RES(R89, RES_K(1.8))
- RES(R90, RES_K(3.9))
+ RES(R90, RES_K(3.9))
RES(R91, RES_K(39))
RES(R92, RES_K(12))
RES(R93, 620)
- RES(R94, RES_K(360))
+ RES(R94, RES_K(360))
RES(R95, RES_K(27))
- RES(R96, RES_K(33))
+ RES(R96, RES_K(33))
RES(R97, 47)
RES(R98, 47)
- RES(R99, RES_K(4.7))
+ RES(R99, RES_K(4.7))
RES(R100, RES_K(2.7))
- RES(R101, RES_K(4.7))
+ RES(R101, RES_K(4.7))
RES(R102, RES_K(39))
RES(R103, RES_K(12))
RES(R104, RES_K(1))
- RES(R105, RES_K(36))
- RES(R106, RES_K(36))
+ RES(R105, RES_K(36))
+ RES(R106, RES_K(36))
RES(R107, RES_K(8.2))
RES(R108, RES_K(47))
RES(R109, RES_K(22))
@@ -217,64 +217,64 @@ NETLIST_START(wotw)
RES(R118, RES_K(820))
RES(R119, RES_K(100))
// RES(R120, RES_K(390)) -- part of final amp (not emulated)
-// RES(R121, RES_K(15)) -- part of final amp (not emulated)
-// RES(R122, 150) -- part of final amp (not emulated)
-// RES(R123, RES_K(22)) -- part of final amp (not emulated)
-// RES(R124, 150) -- part of final amp (not emulated)
+// RES(R121, RES_K(15)) -- part of final amp (not emulated)
+// RES(R122, 150) -- part of final amp (not emulated)
+// RES(R123, RES_K(22)) -- part of final amp (not emulated)
+// RES(R124, 150) -- part of final amp (not emulated)
RES(R125, RES_K(8.2))
RES(R126, RES_K(20))
- RES(R127, RES_K(30))
+ RES(R127, RES_K(30))
POT(R128, RES_K(10))
PARAM(R128.DIAL, 0.500000)
-// CAP(C2, CAP_U(25)) // electrolytic
-// CAP(C4, CAP_U(25)) // electrolytic
-// CAP(C5, CAP_U(25)) // electrolytic
-// CAP(C7, CAP_U(25)) // electrolytic
-// CAP(C9, CAP_U(25)) // electrolytic
- CAP(C11, CAP_U(0.68)) // film
- CAP(C12, CAP_U(0.001)) // disk
- CAP(C13, CAP_U(0.0022)) // film
- CAP(C14, CAP_U(0.1)) // film
- CAP(C15, CAP_U(0.1)) // film
- CAP(C16, CAP_U(0.1)) // disk*
- CAP(C17, CAP_U(100)) // electrolytic
- CAP(C18, CAP_U(0.1)) // film
- CAP(C19, CAP_U(0.1)) // disk*
- CAP(C20, CAP_U(0.1)) // film
- CAP(C21, CAP_U(0.01)) // disk
- CAP(C22, CAP_U(0.68)) // film
- CAP(C23, CAP_U(0.001)) // disk
- CAP(C24, CAP_U(0.0047)) // film
- CAP(C25, CAP_U(0.1)) // film
- CAP(C26, CAP_U(0.1)) // film
- CAP(C27, CAP_U(2.2)) // electrolytic
- CAP(C28, CAP_U(0.22)) // film
- CAP(C29, CAP_U(0.1)) // film
- CAP(C30, CAP_U(4.7)) // electrolytic
- CAP(C31, CAP_U(0.1)) // film
- CAP(C32, CAP_U(0.01)) // film
- CAP(C33, CAP_U(0.68)) // film
- CAP(C34, CAP_U(3.3)) // electrolytic
- CAP(C35, CAP_U(0.22)) // film
- CAP(C36, CAP_U(0.33)) // film
- CAP(C37, CAP_U(0.47)) // film
- CAP(C38, CAP_U(0.01)) // disk
- CAP(C39, CAP_U(0.68)) // film
- CAP(C40, CAP_U(0.1)) // film
- CAP(C41, CAP_U(0.01)) // disk
- CAP(C42, CAP_U(0.1)) // film
-// CAP(C43, CAP_U(0.68)) // film -- part of final amp (not emulated)
-// CAP(C44, CAP_P(470)) // disk -- part of final amp (not emulated)
-// CAP(C45, CAP_P(470)) // disk -- part of final amp (not emulated)
-// CAP(C46, CAP_P(470)) // disk -- part of final amp (not emulated)
-// CAP(C47, CAP_U(0.005)) // disk -- part of final amp (not emulated)
- CAP(C48, CAP_U(0.33)) // film
-
-// D_1N4003(D1) // not needed
-// D_1N4003(D2) // not needed
-// D_1N4003(D3) // not needed
-// D_1N4003(D4) // not needed
+// CAP(C2, CAP_U(25)) // electrolytic
+// CAP(C4, CAP_U(25)) // electrolytic
+// CAP(C5, CAP_U(25)) // electrolytic
+// CAP(C7, CAP_U(25)) // electrolytic
+// CAP(C9, CAP_U(25)) // electrolytic
+ CAP(C11, CAP_U(0.68)) // film
+ CAP(C12, CAP_U(0.001)) // disk
+ CAP(C13, CAP_U(0.0022)) // film
+ CAP(C14, CAP_U(0.1)) // film
+ CAP(C15, CAP_U(0.1)) // film
+ CAP(C16, CAP_U(0.1)) // disk*
+ CAP(C17, CAP_U(100)) // electrolytic
+ CAP(C18, CAP_U(0.1)) // film
+ CAP(C19, CAP_U(0.1)) // disk*
+ CAP(C20, CAP_U(0.1)) // film
+ CAP(C21, CAP_U(0.01)) // disk
+ CAP(C22, CAP_U(0.68)) // film
+ CAP(C23, CAP_U(0.001)) // disk
+ CAP(C24, CAP_U(0.0047)) // film
+ CAP(C25, CAP_U(0.1)) // film
+ CAP(C26, CAP_U(0.1)) // film
+ CAP(C27, CAP_U(2.2)) // electrolytic
+ CAP(C28, CAP_U(0.22)) // film
+ CAP(C29, CAP_U(0.1)) // film
+ CAP(C30, CAP_U(4.7)) // electrolytic
+ CAP(C31, CAP_U(0.1)) // film
+ CAP(C32, CAP_U(0.01)) // film
+ CAP(C33, CAP_U(0.68)) // film
+ CAP(C34, CAP_U(3.3)) // electrolytic
+ CAP(C35, CAP_U(0.22)) // film
+ CAP(C36, CAP_U(0.33)) // film
+ CAP(C37, CAP_U(0.47)) // film
+ CAP(C38, CAP_U(0.01)) // disk
+ CAP(C39, CAP_U(0.68)) // film
+ CAP(C40, CAP_U(0.1)) // film
+ CAP(C41, CAP_U(0.01)) // disk
+ CAP(C42, CAP_U(0.1)) // film
+// CAP(C43, CAP_U(0.68)) // film -- part of final amp (not emulated)
+// CAP(C44, CAP_P(470)) // disk -- part of final amp (not emulated)
+// CAP(C45, CAP_P(470)) // disk -- part of final amp (not emulated)
+// CAP(C46, CAP_P(470)) // disk -- part of final amp (not emulated)
+// CAP(C47, CAP_U(0.005)) // disk -- part of final amp (not emulated)
+ CAP(C48, CAP_U(0.33)) // film
+
+// D_1N4003(D1) // not needed
+// D_1N4003(D2) // not needed
+// D_1N4003(D3) // not needed
+// D_1N4003(D4) // not needed
D_1N5240B(D5)
D_1N5236B(D6)
D_1N914B(D7)
@@ -282,121 +282,121 @@ NETLIST_START(wotw)
D_1N914B(D9)
D_1N914B(D10)
- Q_2N3904(Q1) // NPN
- Q_2N3904(Q2) // NPN
- Q_2N3906(Q3) // PNP
- Q_2N3904(Q4) // NPN
- Q_2N3904(Q5) // NPN
- Q_2N3906(Q6) // PNP
- Q_2N3906(Q7) // PNP
- Q_2N3906(Q8) // PNP
- Q_2N3906(Q9) // PNP
- Q_2N3906(Q10) // PNP
- Q_2N3906(Q11) // PNP
- Q_2N3906(Q12) // PNP
- Q_2N3906(Q13) // PNP
- Q_2N3906(Q14) // PNP
- Q_2N3906(Q15) // PNP
- Q_2N3906(Q16) // PNP
-// Q_2N6107(Q17) // PNP -- part of final amp (not emulated)
-// Q_2N6292(Q18) // NPN -- part of final amp (not emulated)
-
- TTL_7414_DIP(IC1) // Hex Inverter
+ Q_2N3904(Q1) // NPN
+ Q_2N3904(Q2) // NPN
+ Q_2N3906(Q3) // PNP
+ Q_2N3904(Q4) // NPN
+ Q_2N3904(Q5) // NPN
+ Q_2N3906(Q6) // PNP
+ Q_2N3906(Q7) // PNP
+ Q_2N3906(Q8) // PNP
+ Q_2N3906(Q9) // PNP
+ Q_2N3906(Q10) // PNP
+ Q_2N3906(Q11) // PNP
+ Q_2N3906(Q12) // PNP
+ Q_2N3906(Q13) // PNP
+ Q_2N3906(Q14) // PNP
+ Q_2N3906(Q15) // PNP
+ Q_2N3906(Q16) // PNP
+// Q_2N6107(Q17) // PNP -- part of final amp (not emulated)
+// Q_2N6292(Q18) // NPN -- part of final amp (not emulated)
+
+ TTL_7414_DIP(IC1) // Hex Inverter
NET_C(IC1.7, GND)
NET_C(IC1.14, I_V5)
- TTL_74LS164_DIP(IC2) // 8-bit Shift Reg.
+ TTL_74LS164_DIP(IC2) // 8-bit Shift Reg.
NET_C(IC2.7, GND)
NET_C(IC2.14, I_V5)
- TTL_74LS377_DIP(IC3) // Octal D Flip Flop
+ TTL_74LS377_DIP(IC3) // Octal D Flip Flop
NET_C(IC3.10, GND)
NET_C(IC3.20, I_V5)
-// TTL_7815_DIP(IC4) // +15V Regulator -- not needed
-// TTL_7915_DIP(IC5) // -15V Regulator -- not needed
+// TTL_7815_DIP(IC4) // +15V Regulator -- not needed
+// TTL_7915_DIP(IC5) // -15V Regulator -- not needed
- TTL_7406_DIP(IC6) // Hex Inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(IC6) // Hex Inverter -- currently using a clone of 7416, no open collector behavior
NET_C(IC6.7, GND)
NET_C(IC6.14, I_V5)
- TL081_DIP(IC7) // Op. Amp.
+ TL081_DIP(IC7) // Op. Amp.
NET_C(IC7.7, I_V15)
NET_C(IC7.4, I_VM15)
- TL081_DIP(IC8) // Op. Amp.
+ TL081_DIP(IC8) // Op. Amp.
NET_C(IC8.7, I_V15)
NET_C(IC8.4, I_VM15)
#if (!HLE_BACKGROUND_VCO)
- LM566_DIP(IC9) // 566 VCO
+ LM566_DIP(IC9) // 566 VCO
#endif
- TTL_74LS163_DIP(IC10) // Binary Counter (schems say can sub a 74161)
+ TTL_74LS163_DIP(IC10) // Binary Counter (schems say can sub a 74161)
NET_C(IC10.8, GND)
NET_C(IC10.16, I_V5)
- TTL_74LS163_DIP(IC11) // Binary Counter (schems say can sub a 74161)
+ TTL_74LS163_DIP(IC11) // Binary Counter (schems say can sub a 74161)
NET_C(IC11.8, GND)
NET_C(IC11.16, I_V5)
- TTL_74LS393_DIP(IC12) // Dual 4 Bit B.C.
+ TTL_74LS393_DIP(IC12) // Dual 4 Bit B.C.
NET_C(IC12.7, GND)
NET_C(IC12.14, I_V5)
- TTL_74LS393_DIP(IC13) // Dual 4 Bit B.C.
+ TTL_74LS393_DIP(IC13) // Dual 4 Bit B.C.
NET_C(IC13.7, GND)
NET_C(IC13.14, I_V5)
- AMI_S2688(IC14) // Noise generator
+ AMI_S2688(IC14) // Noise generator
- TL081_DIP(IC15) // Op. Amp.
+ TL081_DIP(IC15) // Op. Amp.
NET_C(IC15.7, I_V15)
NET_C(IC15.4, I_VM15)
- LM555_DIP(IC16) // Timer
+ LM555_DIP(IC16) // Timer
#if (!HLE_LASER_VCO)
- LM566_DIP(IC17) // 566 VCO
+ LM566_DIP(IC17) // 566 VCO
#endif
- CA3080_DIP(IC18) // Trnscndt. Op. Amp.
+ CA3080_DIP(IC18) // Trnscndt. Op. Amp.
NET_C(IC18.7, I_V15)
NET_C(IC18.4, I_VM15)
- CA3080_DIP(IC19) // Trnscndt. Op. Amp.
+ CA3080_DIP(IC19) // Trnscndt. Op. Amp.
NET_C(IC19.7, I_V15)
NET_C(IC19.4, I_VM15)
- CA3080_DIP(IC20) // Trnscndt. Op. Amp.
+ CA3080_DIP(IC20) // Trnscndt. Op. Amp.
NET_C(IC20.7, I_V15)
NET_C(IC20.4, I_VM15)
- CA3080_DIP(IC21) // Trnscndt. Op. Amp.
+ CA3080_DIP(IC21) // Trnscndt. Op. Amp.
NET_C(IC21.7, I_V15)
NET_C(IC21.4, I_VM15)
- CA3080_DIP(IC22) // Trnscndt. Op. Amp.
+ CA3080_DIP(IC22) // Trnscndt. Op. Amp.
NET_C(IC22.7, I_V15)
NET_C(IC22.4, I_VM15)
- LM555_DIP(IC23) // Timer
+ LM555_DIP(IC23) // Timer
- LM555_DIP(IC24) // Timer
+ LM555_DIP(IC24) // Timer
-// TL081_DIP(IC25) // Op. Amp. -- part of final amp (not emulated)
-// NET_C(IC25.7, I_V15)
-// NET_C(IC25.4, I_VM15)
+// TL081_DIP(IC25) // Op. Amp. -- part of final amp (not emulated)
+// NET_C(IC25.7, I_V15)
+// NET_C(IC25.4, I_VM15)
- TL081_DIP(IC26) // Op. Amp.
+ TL081_DIP(IC26) // Op. Amp.
NET_C(IC26.7, I_V15)
NET_C(IC26.4, I_VM15)
- TL081_DIP(IC27) // Op. Amp.
+ TL081_DIP(IC27) // Op. Amp.
NET_C(IC27.7, I_V15)
NET_C(IC27.4, I_VM15)
- TTL_74LS107_DIP(IC28) // Dual J-K Flip Flop
+ TTL_74LS107_DIP(IC28) // Dual J-K Flip Flop
NET_C(IC28.7, GND)
NET_C(IC28.14, I_V5)
@@ -796,12 +796,12 @@ NETLIST_START(wotw)
//
// Disconnect noise source from consumers
//
- OPTIMIZE_FRONTIER(IC15.3, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(IC15.3, RES_M(1), 50)
//
// Split noise outputs from output outputs before the mixer
//
- OPTIMIZE_FRONTIER(IC26.3, RES_M(1), 50)
+ OPTIMIZE_FRONTIER(IC26.3, RES_M(1), 50)
#endif
NETLIST_END()
diff --git a/src/mame/audio/nl_starhawk.cpp b/src/mame/audio/nl_starhawk.cpp
index d2d0b947bf3..4d69b59a3e4 100644
--- a/src/mame/audio/nl_starhawk.cpp
+++ b/src/mame/audio/nl_starhawk.cpp
@@ -49,12 +49,12 @@ NETLIST_START(starhawk)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
- TTL_INPUT(I_OUT_0, 0) // active high
- TTL_INPUT(I_OUT_1, 0) // active high
- TTL_INPUT(I_OUT_2, 0) // active high
- TTL_INPUT(I_OUT_3, 0) // active high
- TTL_INPUT(I_OUT_4, 0) // active high
- TTL_INPUT(I_OUT_7, 0) // active high
+ TTL_INPUT(I_OUT_0, 0) // active high
+ TTL_INPUT(I_OUT_1, 0) // active high
+ TTL_INPUT(I_OUT_2, 0) // active high
+ TTL_INPUT(I_OUT_3, 0) // active high
+ TTL_INPUT(I_OUT_4, 0) // active high
+ TTL_INPUT(I_OUT_7, 0) // active high
NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND, I_OUT_7.GND)
NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC, I_OUT_7.VCC)
@@ -84,19 +84,19 @@ NETLIST_START(starhawk)
RES(R17, RES_K(510))
RES(R18, RES_K(10))
RES(R19, RES_K(33))
-// RES(R20, 150) -- part of final amp (not emulated)
-// RES(R21, RES_K(22)) -- part of final amp (not emulated)
+// RES(R20, 150) -- part of final amp (not emulated)
+// RES(R21, RES_K(22)) -- part of final amp (not emulated)
RES(R22, RES_K(1))
-// RES(R23, RES_K(10)) -- part of final amp (not emulated)
-// RES(R24, 150) -- part of final amp (not emulated)
-// POT(R25, RES_K(100))-- part of final amp (not emulated)
+// RES(R23, RES_K(10)) -- part of final amp (not emulated)
+// RES(R24, 150) -- part of final amp (not emulated)
+// POT(R25, RES_K(100))-- part of final amp (not emulated)
RES(R26, RES_K(1))
RES(R27, RES_K(1))
RES(R28, RES_K(510))
- RES(R29, RES_K(10)) // PCB verified
-// RES(R30, ???)
- RES(R31, RES_K(47)) // PCB verified
- RES(R32, RES_M(3.3)) // PCB verified
+ RES(R29, RES_K(10)) // PCB verified
+// RES(R30, ???)
+ RES(R31, RES_K(47)) // PCB verified
+ RES(R32, RES_M(3.3)) // PCB verified
RES(R33, RES_M(1))
RES(R34, RES_K(47))
RES(R35, RES_M(1))
@@ -126,30 +126,30 @@ NETLIST_START(starhawk)
RES(R59, RES_K(39))
RES(R60, RES_K(82))
-// CAP(C1, CAP_U(2.2))
-// CAP(C2, CAP_U(2.2))
-// CAP(C3, CAP_U(3.3))
-// CAP(C4, CAP_U(3.3))
+// CAP(C1, CAP_U(2.2))
+// CAP(C2, CAP_U(2.2))
+// CAP(C3, CAP_U(3.3))
+// CAP(C4, CAP_U(3.3))
CAP(C5, CAP_P(100))
CAP(C6, CAP_U(3.3))
CAP(C7, CAP_U(0.01))
CAP(C8, CAP_U(1))
CAP(C9, CAP_U(0.022))
- CAP(C10, CAP_U(0.15)) // 15?
+ CAP(C10, CAP_U(0.15)) // 15?
CAP(C11, CAP_U(0.15))
CAP(C12, CAP_U(15))
CAP(C13, CAP_U(0.0033))
CAP(C14, CAP_U(0.0047))
CAP(C15, CAP_U(1))
-// CAP(C16, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C16, CAP_P(470)) -- part of final amp (not emulated)
CAP(C17, CAP_U(22))
-// CAP(C18, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C19, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C18, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C19, CAP_P(470)) -- part of final amp (not emulated)
CAP(C20, CAP_U(1))
#if (SLOW_SHIP_WOBBLE)
- CAP(C21, CAP_U(22)) // discovered by accident, makes HLE analysis easier
+ CAP(C21, CAP_U(22)) // discovered by accident, makes HLE analysis easier
#else
- CAP(C21, CAP_U(0.22)) // PCB verified
+ CAP(C21, CAP_U(0.22)) // PCB verified
#endif
CAP(C22, CAP_U(0.1))
CAP(C23, CAP_U(0.0027))
@@ -157,8 +157,8 @@ NETLIST_START(starhawk)
CAP(C25, CAP_U(0.0027))
CAP(C26, CAP_U(1))
CAP(C27, CAP_U(0.1))
-// CAP(C39, CAP_U(1))
-// CAP(C40, CAP_U(1))
+// CAP(C39, CAP_U(1))
+// CAP(C40, CAP_U(1))
D_1N914(CR1)
D_1N914(CR2)
@@ -171,118 +171,118 @@ NETLIST_START(starhawk)
D_1N914(CR9)
D_1N914(CR10)
- Q_2N3906(Q1) // PNP
-// Q_2N6292(Q2) // NPN -- part of final amp (not emulated)
-// Q_2N6107(Q3) // PNP -- part of final amp (not emulated)
+ Q_2N3906(Q1) // PNP
+// Q_2N6292(Q2) // NPN -- part of final amp (not emulated)
+// Q_2N6107(Q3) // PNP -- part of final amp (not emulated)
#if (!HLE_LAZER_VCOS)
- Q_2N3904(Q4) // NPN
- Q_2N3904(Q5) // NPN
+ Q_2N3904(Q4) // NPN
+ Q_2N3904(Q5) // NPN
#endif
- TL182_DIP(IC3A) // Analog switch
+ TL182_DIP(IC3A) // Analog switch
NET_C(IC3A.6, I_V15)
NET_C(IC3A.7, I_V5)
NET_C(IC3A.8, GND)
NET_C(IC3A.9, I_VM15)
-// TTL_7815_DIP(IC2D) // +15V Regulator -- not needed
-// TTL_7915_DIP(IC2C) // -15V Regulator -- not needed
+// TTL_7815_DIP(IC2D) // +15V Regulator -- not needed
+// TTL_7915_DIP(IC2C) // -15V Regulator -- not needed
- TL081_DIP(IC4A) // Op. Amp.
+ TL081_DIP(IC4A) // Op. Amp.
NET_C(IC4A.4, I_VM15)
NET_C(IC4A.7, I_V15)
- TL081_DIP(IC4B) // Op. Amp.
+ TL081_DIP(IC4B) // Op. Amp.
NET_C(IC4B.4, I_VM15)
NET_C(IC4B.7, I_V15)
-// TL081_DIP(IC4C) // Op. Amp. -- part of final amp (not emulated)
-// NET_C(IC4C.4, I_VM15)
-// NET_C(IC4C.7, I_V15)
+// TL081_DIP(IC4C) // Op. Amp. -- part of final amp (not emulated)
+// NET_C(IC4C.4, I_VM15)
+// NET_C(IC4C.7, I_V15)
- TTL_74LS393_DIP(IC4E) // Dual 4-Stage Binary Counter
+ TTL_74LS393_DIP(IC4E) // Dual 4-Stage Binary Counter
NET_C(IC4E.7, GND)
NET_C(IC4E.14, I_V5)
- TL081_DIP(IC5A) // Op. Amp.
+ TL081_DIP(IC5A) // Op. Amp.
NET_C(IC5A.4, I_VM15)
NET_C(IC5A.7, I_V15)
- TL081_DIP(IC5B) // Op. Amp.
+ TL081_DIP(IC5B) // Op. Amp.
NET_C(IC5B.4, I_VM15)
NET_C(IC5B.7, I_V15)
LM556_DIP(IC5D)
- PROM_74S287_DIP(IC5E) // 1024-bit PROM -- dump needed
+ PROM_74S287_DIP(IC5E) // 1024-bit PROM -- dump needed
PARAM(IC5E.A.ROM, "2085.5e8e")
NET_C(IC5E.8, GND)
NET_C(IC5E.16, I_V5)
- CA3080_DIP(IC6A) // Trnscndt. Op. Amp.
+ CA3080_DIP(IC6A) // Trnscndt. Op. Amp.
NET_C(IC6A.7, I_V15)
NET_C(IC6A.4, I_VM15)
- TL081_DIP(IC6B) // Op. Amp.
+ TL081_DIP(IC6B) // Op. Amp.
NET_C(IC6B.4, I_VM15)
NET_C(IC6B.7, I_V15)
- TTL_74LS04_DIP(IC6C) // Hex Inverting Gates
+ TTL_74LS04_DIP(IC6C) // Hex Inverting Gates
NET_C(IC6C.7, GND)
NET_C(IC6C.14, I_V5)
LM556_DIP(IC6D)
- TL081_DIP(IC6E) // Op. Amp.
+ TL081_DIP(IC6E) // Op. Amp.
NET_C(IC6E.4, I_VM15)
NET_C(IC6E.7, I_V15)
- TL081_DIP(IC6F) // Op. Amp.
+ TL081_DIP(IC6F) // Op. Amp.
NET_C(IC6F.4, I_VM15)
NET_C(IC6F.7, I_V15)
- TTL_7406_DIP(IC7C) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(IC7C) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(IC7C.7, GND)
NET_C(IC7C.14, I_V5)
- TTL_74LS393_DIP(IC7E) // Dual 4-Stage Binary Counter
+ TTL_74LS393_DIP(IC7E) // Dual 4-Stage Binary Counter
NET_C(IC7E.7, GND)
NET_C(IC7E.14, I_V5)
- TTL_74LS164_DIP(IC8C) // 8-bit Shift Reg.
+ TTL_74LS164_DIP(IC8C) // 8-bit Shift Reg.
NET_C(IC8C.7, GND)
NET_C(IC8C.14, I_V5)
- TTL_74LS164_DIP(IC8D) // 8-bit Shift Reg.
+ TTL_74LS164_DIP(IC8D) // 8-bit Shift Reg.
NET_C(IC8D.7, GND)
NET_C(IC8D.14, I_V5)
- PROM_74S287_DIP(IC8E) // 1024-bit PROM -- dump needed
+ PROM_74S287_DIP(IC8E) // 1024-bit PROM -- dump needed
PARAM(IC8E.A.ROM, "2085.5e8e")
NET_C(IC8E.8, GND)
NET_C(IC8E.16, I_V5)
- TTL_74LS164_DIP(IC9C) // 8-bit Shift Reg.
+ TTL_74LS164_DIP(IC9C) // 8-bit Shift Reg.
NET_C(IC9C.7, GND)
NET_C(IC9C.14, I_V5)
- TTL_74LS164_DIP(IC9D) // 8-bit Shift Reg.
+ TTL_74LS164_DIP(IC9D) // 8-bit Shift Reg.
NET_C(IC9D.7, GND)
NET_C(IC9D.14, I_V5)
- TTL_74LS163_DIP(IC9E) // Binary Counter (schems say can sub a 74161)
+ TTL_74LS163_DIP(IC9E) // Binary Counter (schems say can sub a 74161)
NET_C(IC9E.8, GND)
NET_C(IC9E.16, I_V5)
- TTL_74LS86_DIP(IC10C) // Quad 2-Input XOR Gates
+ TTL_74LS86_DIP(IC10C) // Quad 2-Input XOR Gates
NET_C(IC10C.7, GND)
NET_C(IC10C.14, I_V5)
- TTL_74LS21_DIP(IC10D) // Dual 4-Input AND Gates
+ TTL_74LS21_DIP(IC10D) // Dual 4-Input AND Gates
NET_C(IC10D.7, GND)
NET_C(IC10D.14, I_V5)
- TTL_74LS393_DIP(IC10E) // Dual 4-Stage Binary Counter
+ TTL_74LS393_DIP(IC10E) // Dual 4-Stage Binary Counter
NET_C(IC10E.7, GND)
NET_C(IC10E.14, I_V5)
@@ -603,38 +603,38 @@ NETLIST_START(starhawk)
// Unconnected outputs
//
- HINT(IC4E.9, NC) // Q3
+ HINT(IC4E.9, NC) // Q3
#if (HLE_LAZER_VCOS)
- HINT(IC6C.8, NC) // QD
- HINT(IC6C.12, NC) // QF
+ HINT(IC6C.8, NC) // QD
+ HINT(IC6C.12, NC) // QF
#endif
- HINT(IC7C.4, NC) // QB
- HINT(IC7C.6, NC) // QC
- HINT(IC7E.9, NC) // Q3
- HINT(IC8C.4, NC) // Q1
- HINT(IC8C.5, NC) // Q2
- HINT(IC8C.6, NC) // Q3
- HINT(IC8C.10, NC) // Q4
- HINT(IC8C.11, NC) // Q5
- HINT(IC8C.12, NC) // Q6
- HINT(IC8D.5, NC) // Q2
- HINT(IC8D.6, NC) // Q3
- HINT(IC8D.10, NC) // Q4
- HINT(IC8D.11, NC) // Q5
- HINT(IC8D.12, NC) // Q6
- HINT(IC9C.3, NC) // Q0
- HINT(IC9C.4, NC) // Q1
- HINT(IC9C.5, NC) // Q2
- HINT(IC9C.6, NC) // Q3
- HINT(IC9C.11, NC) // Q5
- HINT(IC9D.3, NC) // Q0
- HINT(IC9D.4, NC) // Q1
- HINT(IC9D.5, NC) // Q2
- HINT(IC9D.6, NC) // Q3
- HINT(IC9D.11, NC) // Q5
- HINT(IC9E.11, NC) // Q3
- HINT(IC9E.12, NC) // Q2
- HINT(IC9E.13, NC) // Q1
- HINT(IC9E.14, NC) // Q0
+ HINT(IC7C.4, NC) // QB
+ HINT(IC7C.6, NC) // QC
+ HINT(IC7E.9, NC) // Q3
+ HINT(IC8C.4, NC) // Q1
+ HINT(IC8C.5, NC) // Q2
+ HINT(IC8C.6, NC) // Q3
+ HINT(IC8C.10, NC) // Q4
+ HINT(IC8C.11, NC) // Q5
+ HINT(IC8C.12, NC) // Q6
+ HINT(IC8D.5, NC) // Q2
+ HINT(IC8D.6, NC) // Q3
+ HINT(IC8D.10, NC) // Q4
+ HINT(IC8D.11, NC) // Q5
+ HINT(IC8D.12, NC) // Q6
+ HINT(IC9C.3, NC) // Q0
+ HINT(IC9C.4, NC) // Q1
+ HINT(IC9C.5, NC) // Q2
+ HINT(IC9C.6, NC) // Q3
+ HINT(IC9C.11, NC) // Q5
+ HINT(IC9D.3, NC) // Q0
+ HINT(IC9D.4, NC) // Q1
+ HINT(IC9D.5, NC) // Q2
+ HINT(IC9D.6, NC) // Q3
+ HINT(IC9D.11, NC) // Q5
+ HINT(IC9E.11, NC) // Q3
+ HINT(IC9E.12, NC) // Q2
+ HINT(IC9E.13, NC) // Q1
+ HINT(IC9E.14, NC) // Q0
NETLIST_END()
diff --git a/src/mame/audio/nl_sundance.cpp b/src/mame/audio/nl_sundance.cpp
index 1c099080547..b229ceb2b6d 100644
--- a/src/mame/audio/nl_sundance.cpp
+++ b/src/mame/audio/nl_sundance.cpp
@@ -44,12 +44,12 @@ NETLIST_START(sundance)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
- TTL_INPUT(I_OUT_0, 1) // active low
- TTL_INPUT(I_OUT_1, 1) // active low
- TTL_INPUT(I_OUT_2, 1) // active low
- TTL_INPUT(I_OUT_3, 1) // active low
- TTL_INPUT(I_OUT_4, 1) // active low
- TTL_INPUT(I_OUT_7, 1) // active low
+ TTL_INPUT(I_OUT_0, 1) // active low
+ TTL_INPUT(I_OUT_1, 1) // active low
+ TTL_INPUT(I_OUT_2, 1) // active low
+ TTL_INPUT(I_OUT_3, 1) // active low
+ TTL_INPUT(I_OUT_4, 1) // active low
+ TTL_INPUT(I_OUT_7, 1) // active low
NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND, I_OUT_7.GND)
NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC, I_OUT_7.VCC)
@@ -124,9 +124,9 @@ NETLIST_START(sundance)
RES(R62, RES_K(2.7))
RES(R63, RES_K(2.7))
RES(R64, 470)
-// RES(R65, 150) -- part of final amp (not emulated)
-// RES(R66, RES_K(22)) -- part of final amp (not emulated)
-// RES(R67, 150) -- part of final amp (not emulated)
+// RES(R65, 150) -- part of final amp (not emulated)
+// RES(R66, RES_K(22)) -- part of final amp (not emulated)
+// RES(R67, 150) -- part of final amp (not emulated)
RES(R68, 330)
RES(R69, RES_K(390))
RES(R70, RES_K(15))
@@ -134,9 +134,9 @@ NETLIST_START(sundance)
RES(R72, RES_K(68))
RES(R73, RES_K(2.7))
RES(R74, RES_K(2.7))
-// RES(R75, RES_K(10)) -- part of final amp (not emulated)
-// POT(R76, RES_K(100)) -- part of final amp (not emulated)
-// PARAM(R76.DIAL, 0.500000) -- part of final amp (not emulated)
+// RES(R75, RES_K(10)) -- part of final amp (not emulated)
+// POT(R76, RES_K(100)) -- part of final amp (not emulated)
+// PARAM(R76.DIAL, 0.500000) -- part of final amp (not emulated)
RES(R77, 330)
RES(R78, RES_K(220))
@@ -155,11 +155,11 @@ NETLIST_START(sundance)
CAP(C13, CAP_U(0.001))
CAP(C14, CAP_U(0.005))
CAP(C15, CAP_U(10))
-// CAP(C16, CAP_U(3.3)) -- not needed
-// CAP(C17, CAP_U(3.3)) -- not needed
-// CAP(C18, CAP_U(3.3)) -- not needed
-// CAP(C19, CAP_U(3.3)) -- not needed
-// CAP(C20, CAP_U(3.3)) -- not needed
+// CAP(C16, CAP_U(3.3)) -- not needed
+// CAP(C17, CAP_U(3.3)) -- not needed
+// CAP(C18, CAP_U(3.3)) -- not needed
+// CAP(C19, CAP_U(3.3)) -- not needed
+// CAP(C20, CAP_U(3.3)) -- not needed
CAP(C21, CAP_U(0.1))
CAP(C22, CAP_U(0.005))
CAP(C23, CAP_U(0.1))
@@ -171,39 +171,39 @@ NETLIST_START(sundance)
CAP(C29, CAP_U(0.1))
CAP(C30, CAP_U(0.01))
CAP(C31, CAP_U(0.1))
-// CAP(C32, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C33, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C34, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C32, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C33, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C34, CAP_P(470)) -- part of final amp (not emulated)
CAP(C35, CAP_U(0.15))
CAP(C36, CAP_U(0.1))
CAP(C37, CAP_U(0.01))
CAP(C38, CAP_U(0.1))
CAP(C39, CAP_U(1))
- D_1N5240(D1)
- D_1N914(D2)
- D_1N914(D3)
-
- Q_2N3904(Q1) // NPN
- Q_2N3904(Q2) // NPN
- Q_2N3906(Q3) // PNP
- Q_2N3906(Q4) // PNP
- Q_2N3906(Q5) // PNP
- Q_2N3906(Q6) // PNP
-// Q_2N6292(Q7) // NPN -- part of final amp (not emulated)
-// Q_2N6107(Q9) // PNP -- part of final amp (not emulated)
- Q_2N3906(Q8) // PNP
- Q_2N3906(Q10) // PNP
-
- TL081_DIP(IC1) // Op. Amp.
-// NET_C(IC1.7, I_V15) // (indirectly via R5)
+ D_1N5240(D1)
+ D_1N914(D2)
+ D_1N914(D3)
+
+ Q_2N3904(Q1) // NPN
+ Q_2N3904(Q2) // NPN
+ Q_2N3906(Q3) // PNP
+ Q_2N3906(Q4) // PNP
+ Q_2N3906(Q5) // PNP
+ Q_2N3906(Q6) // PNP
+// Q_2N6292(Q7) // NPN -- part of final amp (not emulated)
+// Q_2N6107(Q9) // PNP -- part of final amp (not emulated)
+ Q_2N3906(Q8) // PNP
+ Q_2N3906(Q10) // PNP
+
+ TL081_DIP(IC1) // Op. Amp.
+// NET_C(IC1.7, I_V15) // (indirectly via R5)
NET_C(IC1.4, I_VM15)
- TL081_DIP(IC2) // Op. Amp.
+ TL081_DIP(IC2) // Op. Amp.
NET_C(IC2.7, I_V15)
NET_C(IC2.4, I_VM15)
- TL081_DIP(IC3) // Op. Amp.
+ TL081_DIP(IC3) // Op. Amp.
NET_C(IC3.7, I_V15)
NET_C(IC3.4, I_VM15)
@@ -211,12 +211,12 @@ NETLIST_START(sundance)
NET_C(IC4.7, GND)
NET_C(IC4.14, I_V15)
-// TTL_7815_DIP(IC5) // +15V Regulator -- not needed
-// TTL_7915_DIP(IC6) // -15V Regulator -- not needed
+// TTL_7815_DIP(IC5) // +15V Regulator -- not needed
+// TTL_7915_DIP(IC6) // -15V Regulator -- not needed
LM555_DIP(IC7)
- TL081_DIP(IC8) // Op. Amp.
+ TL081_DIP(IC8) // Op. Amp.
NET_C(IC8.7, I_V15)
NET_C(IC8.4, I_VM15)
@@ -234,7 +234,7 @@ NETLIST_START(sundance)
NET_C(IC12.7, I_V15)
NET_C(IC12.4, I_VM15)
- TTL_74LS125_DIP(IC13) // Quad 3-state buffer
+ TTL_74LS125_DIP(IC13) // Quad 3-state buffer
NET_C(IC13.7, GND)
NET_C(IC13.14, I_V5)
@@ -256,7 +256,7 @@ NETLIST_START(sundance)
NET_C(IC19.7, I_V15)
NET_C(IC19.4, I_VM15)
- TL081_DIP(IC20) // Op. Amp.
+ TL081_DIP(IC20) // Op. Amp.
NET_C(IC20.7, I_V15)
NET_C(IC20.4, I_VM15)
@@ -303,7 +303,7 @@ NETLIST_START(sundance)
NET_C(I_OUT_1, R2.1, IC11.2)
NET_C(R2.2, I_V5)
- NET_C(IC11.8, IC11.4, I_V5) // -- IC11.4 not documented
+ NET_C(IC11.8, IC11.4, I_V5) // -- IC11.4 not documented
NET_C(IC11.3, R35.1)
NET_C(IC11.1, GND)
NET_C(R34.1, I_V5)
@@ -365,7 +365,7 @@ NETLIST_START(sundance)
NET_C(R25.1, IC7.6, IC7.7, C7.1)
NET_C(C7.2, IC7.1, GND)
NET_C(R24.2, I_V5)
- NET_C(R25.2, IC7.8, IC7.4, I_V5) // IC7.4 -- not documented
+ NET_C(R25.2, IC7.8, IC7.4, I_V5) // IC7.4 -- not documented
NET_C(IC7.3, Q4.E)
NET_C(Q4.B, R26.2)
NET_C(R26.1, GND)
@@ -476,8 +476,8 @@ NETLIST_START(sundance)
// Unconnected pins
//
- NET_C(GND, IC20.2, IC20.3) // part of final amp
+ NET_C(GND, IC20.2, IC20.3) // part of final amp
-// NET_C(GND, IC6.3, IC28.8, IC28.9, IC28.10, IC28.11)
+// NET_C(GND, IC6.3, IC28.8, IC28.9, IC28.10, IC28.11)
NETLIST_END()
diff --git a/src/mame/audio/nl_tailg.cpp b/src/mame/audio/nl_tailg.cpp
index c7a24f45215..f0684aeeab5 100644
--- a/src/mame/audio/nl_tailg.cpp
+++ b/src/mame/audio/nl_tailg.cpp
@@ -49,11 +49,11 @@ NETLIST_START(tailg)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
- TTL_INPUT(I_OUT_0, 0) // active high
- TTL_INPUT(I_OUT_1, 0) // active high
- TTL_INPUT(I_OUT_2, 0) // active high
- TTL_INPUT(I_OUT_3, 0) // active high
- TTL_INPUT(I_OUT_4, 0) // active high
+ TTL_INPUT(I_OUT_0, 0) // active high
+ TTL_INPUT(I_OUT_1, 0) // active high
+ TTL_INPUT(I_OUT_2, 0) // active high
+ TTL_INPUT(I_OUT_3, 0) // active high
+ TTL_INPUT(I_OUT_4, 0) // active high
NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND)
NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC)
@@ -134,12 +134,12 @@ NETLIST_START(tailg)
RES(R68, RES_K(20))
RES(R69, RES_K(30))
RES(R70, 470)
-// RES(R71, 150) -- part of final amp (not emulated)
-// RES(R72, RES_K(22)) -- part of final amp (not emulated)
-// RES(R73, 150) -- part of final amp (not emulated)
-// RES(R74, RES_K(47)) -- part of final amp (not emulated)
-// POT(R75, RES_K(100)) -- part of final amp (not emulated)
-// PARAM(R75.DIAL, 0.5) -- part of final amp (not emulated)
+// RES(R71, 150) -- part of final amp (not emulated)
+// RES(R72, RES_K(22)) -- part of final amp (not emulated)
+// RES(R73, 150) -- part of final amp (not emulated)
+// RES(R74, RES_K(47)) -- part of final amp (not emulated)
+// POT(R75, RES_K(100)) -- part of final amp (not emulated)
+// PARAM(R75.DIAL, 0.5) -- part of final amp (not emulated)
RES(R76, RES_K(47))
RES(R77, RES_K(47))
RES(R78, RES_K(2.7))
@@ -183,13 +183,13 @@ NETLIST_START(tailg)
CAP(C31, CAP_U(0.05))
CAP(C32, CAP_U(0.1))
CAP(C33, CAP_U(0.1))
-// CAP(C34, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C35, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C36, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C37, CAP_U(3.3))
-// CAP(C38, CAP_U(3.3))
-// CAP(C39, CAP_U(3.3))
-// CAP(C40, CAP_U(3.3))
+// CAP(C34, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C35, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C36, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C37, CAP_U(3.3))
+// CAP(C38, CAP_U(3.3))
+// CAP(C39, CAP_U(3.3))
+// CAP(C40, CAP_U(3.3))
CAP(C41, CAP_U(0.005))
CAP(C42, CAP_U(0.1))
CAP(C43, CAP_U(10))
@@ -205,64 +205,64 @@ NETLIST_START(tailg)
D_1N914(D8)
D_1N914(D9)
- Q_2N3904(Q1) // NPN
- Q_2N3904(Q2) // NPN
- Q_2N3906(Q3) // PNP
- Q_2N3906(Q4) // PNP
- Q_2N3906(Q5) // PNP
-// Q_2N6292(Q6) // NPN -- part of final amp (not emulated)
-// Q_2N6107(Q7) // PNP -- part of final amp (not emulated)
- Q_2N3906(Q8) // PNP
-
- TL081_DIP(IC1) // Op. Amp.
-// NET_C(IC1.7, I_V15) // (indirectly via R5)
+ Q_2N3904(Q1) // NPN
+ Q_2N3904(Q2) // NPN
+ Q_2N3906(Q3) // PNP
+ Q_2N3906(Q4) // PNP
+ Q_2N3906(Q5) // PNP
+// Q_2N6292(Q6) // NPN -- part of final amp (not emulated)
+// Q_2N6107(Q7) // PNP -- part of final amp (not emulated)
+ Q_2N3906(Q8) // PNP
+
+ TL081_DIP(IC1) // Op. Amp.
+// NET_C(IC1.7, I_V15) // (indirectly via R5)
NET_C(IC1.4, I_VM15)
- TL081_DIP(IC2) // Op. Amp.
+ TL081_DIP(IC2) // Op. Amp.
NET_C(IC2.4, I_VM15)
NET_C(IC2.7, I_V15)
- TL081_DIP(IC3) // Op. Amp.
+ TL081_DIP(IC3) // Op. Amp.
NET_C(IC3.4, I_VM15)
NET_C(IC3.7, I_V15)
- TTL_74LS125_DIP(IC4) // Quad 3-state Buffers
+ TTL_74LS125_DIP(IC4) // Quad 3-state Buffers
NET_C(IC4.7, GND)
NET_C(IC4.14, I_V5)
- TTL_7404_DIP(IC5) // Hex Inverting Gates
+ TTL_7404_DIP(IC5) // Hex Inverting Gates
NET_C(IC5.7, GND)
NET_C(IC5.14, I_V5)
- TTL_7406_DIP(IC6) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(IC6) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(IC6.7, GND)
NET_C(IC6.14, I_V5)
- TL081_DIP(IC7) // Op. Amp.
+ TL081_DIP(IC7) // Op. Amp.
NET_C(IC7.4, I_VM15)
NET_C(IC7.7, I_V15)
- TTL_74LS393_DIP(IC8) // Dual 4-Stage Binary Counter
+ TTL_74LS393_DIP(IC8) // Dual 4-Stage Binary Counter
NET_C(IC8.7, GND)
NET_C(IC8.14, I_V5)
- TL081_DIP(IC9) // Op. Amp.
+ TL081_DIP(IC9) // Op. Amp.
NET_C(IC9.4, I_VM15)
NET_C(IC9.7, I_V15)
- CA3080_DIP(IC10) // Op. Amp.
+ CA3080_DIP(IC10) // Op. Amp.
NET_C(IC10.4, I_VM15)
NET_C(IC10.7, I_V15)
- TL081_DIP(IC11) // Op. Amp.
+ TL081_DIP(IC11) // Op. Amp.
NET_C(IC11.4, I_VM15)
NET_C(IC11.7, I_V15)
- TTL_74LS123_DIP(IC12) // Retriggerable Monostable Multivibrators
+ TTL_74LS123_DIP(IC12) // Retriggerable Monostable Multivibrators
NET_C(IC12.8, GND)
NET_C(IC12.16, I_V5)
- CA3080_DIP(IC13) // Op. Amp.
+ CA3080_DIP(IC13) // Op. Amp.
NET_C(IC13.4, I_VM15)
NET_C(IC13.7, I_V15)
@@ -274,18 +274,18 @@ NETLIST_START(tailg)
LM555_DIP(IC17)
- TTL_74LS393_DIP(IC18) // Dual 4-Stage Binary Counter
+ TTL_74LS393_DIP(IC18) // Dual 4-Stage Binary Counter
NET_C(IC18.7, GND)
NET_C(IC18.14, I_V5)
- TL081_DIP(IC19) // Op. Amp.
+ TL081_DIP(IC19) // Op. Amp.
NET_C(IC19.4, I_VM15)
NET_C(IC19.7, I_V15)
-// TTL_7915_DIP(IC20) // -15V Regulator -- not needed
-// TTL_7815_DIP(IC21) // +15V Regulator -- not needed
+// TTL_7915_DIP(IC20) // -15V Regulator -- not needed
+// TTL_7815_DIP(IC21) // +15V Regulator -- not needed
- CA3080_DIP(IC22) // Op. Amp.
+ CA3080_DIP(IC22) // Op. Amp.
NET_C(IC22.4, I_VM15)
NET_C(IC22.7, I_V15)
@@ -673,26 +673,26 @@ NETLIST_START(tailg)
// Unconnected inputs
//
- NET_C(GND, IC19.2, IC19.3) // part of final amp
+ NET_C(GND, IC19.2, IC19.3) // part of final amp
NET_C(GND, IC5.9, IC5.11, IC5.13, IC6.9, IC6.11, IC6.13)
//
// Unconnected outputs
//
- HINT(IC5.8, NC) // QC
- HINT(IC5.10, NC) // QD
- HINT(IC5.12, NC) // QE
- HINT(IC6.8, NC) // QC
- HINT(IC6.10, NC) // QD
- HINT(IC6.12, NC) // QE
- HINT(IC12.4, NC) // /QA
- HINT(IC12.5, NC) // QB
- HINT(IC18.3, NC) // Q0A
- HINT(IC18.5, NC) // Q2A
- HINT(IC18.9, NC) // Q2B
- HINT(IC18.10, NC) // Q1B
- HINT(IC23.11, NC) // Q6
- HINT(IC23.12, NC) // Q7
+ HINT(IC5.8, NC) // QC
+ HINT(IC5.10, NC) // QD
+ HINT(IC5.12, NC) // QE
+ HINT(IC6.8, NC) // QC
+ HINT(IC6.10, NC) // QD
+ HINT(IC6.12, NC) // QE
+ HINT(IC12.4, NC) // /QA
+ HINT(IC12.5, NC) // QB
+ HINT(IC18.3, NC) // Q0A
+ HINT(IC18.5, NC) // Q2A
+ HINT(IC18.9, NC) // Q2B
+ HINT(IC18.10, NC) // Q1B
+ HINT(IC23.11, NC) // Q6
+ HINT(IC23.12, NC) // Q7
NETLIST_END()
diff --git a/src/mame/audio/nl_warrior.cpp b/src/mame/audio/nl_warrior.cpp
index 00c7f351726..a32d4df289b 100644
--- a/src/mame/audio/nl_warrior.cpp
+++ b/src/mame/audio/nl_warrior.cpp
@@ -39,11 +39,11 @@ NETLIST_START(warrior)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 2e-5)
- TTL_INPUT(I_OUT_0, 0) // active high
- TTL_INPUT(I_OUT_1, 0) // active high
- TTL_INPUT(I_OUT_2, 0) // active high
- TTL_INPUT(I_OUT_3, 0) // active high
- TTL_INPUT(I_OUT_4, 0) // active high
+ TTL_INPUT(I_OUT_0, 0) // active high
+ TTL_INPUT(I_OUT_1, 0) // active high
+ TTL_INPUT(I_OUT_2, 0) // active high
+ TTL_INPUT(I_OUT_3, 0) // active high
+ TTL_INPUT(I_OUT_4, 0) // active high
NET_C(GND, I_OUT_0.GND, I_OUT_1.GND, I_OUT_2.GND, I_OUT_3.GND, I_OUT_4.GND)
NET_C(I_V5, I_OUT_0.VCC, I_OUT_1.VCC, I_OUT_2.VCC, I_OUT_3.VCC, I_OUT_4.VCC)
@@ -112,11 +112,11 @@ NETLIST_START(warrior)
RES(R56, RES_K(2.7))
RES(R57, RES_K(820))
RES(R58, 470)
-// RES(R59, 150) -- part of final amp (not emulated)
-// RES(R60, RES_K(2.2)) -- part of final amp (not emulated)
-// RES(R61, 150) -- part of final amp (not emulated)
-// RES(R62, RES_K(47)) -- part of final amp (not emulated)
-// POT(R63, RES_K(100)) -- part of final amp (not emulated)
+// RES(R59, 150) -- part of final amp (not emulated)
+// RES(R60, RES_K(2.2)) -- part of final amp (not emulated)
+// RES(R61, 150) -- part of final amp (not emulated)
+// RES(R62, RES_K(47)) -- part of final amp (not emulated)
+// POT(R63, RES_K(100)) -- part of final amp (not emulated)
CAP(C1, CAP_U(0.1))
CAP(C2, CAP_U(0.1))
@@ -136,14 +136,14 @@ NETLIST_START(warrior)
CAP(C16, CAP_U(0.01))
CAP(C17, CAP_U(15))
CAP(C18, CAP_U(4.7))
- CAP(C19, CAP_U(0.22)) // 22?
+ CAP(C19, CAP_U(0.22)) // 22?
CAP(C20, CAP_U(0.1))
CAP(C21, CAP_U(0.1))
-// CAP(C22, CAP_U(3.3)) -- part of voltage converter (not emulated)
-// CAP(C23, CAP_U(3.3)) -- part of voltage converter (not emulated)
-// CAP(C24, CAP_U(3.3)) -- part of voltage converter (not emulated)
-// CAP(C25, CAP_U(3.3)) -- part of voltage converter (not emulated)
-// CAP(C26, CAP_U(3.3)) -- part of voltage converter (not emulated)
+// CAP(C22, CAP_U(3.3)) -- part of voltage converter (not emulated)
+// CAP(C23, CAP_U(3.3)) -- part of voltage converter (not emulated)
+// CAP(C24, CAP_U(3.3)) -- part of voltage converter (not emulated)
+// CAP(C25, CAP_U(3.3)) -- part of voltage converter (not emulated)
+// CAP(C26, CAP_U(3.3)) -- part of voltage converter (not emulated)
CAP(C27, CAP_U(0.047))
CAP(C28, CAP_U(0.01))
CAP(C29, CAP_U(0.47))
@@ -155,9 +155,9 @@ NETLIST_START(warrior)
CAP(C35, CAP_U(0.05))
CAP(C36, CAP_U(0.01))
CAP(C37, CAP_U(0.1))
-// CAP(C38, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C39, CAP_P(470)) -- part of final amp (not emulated)
-// CAP(C40, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C38, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C39, CAP_P(470)) -- part of final amp (not emulated)
+// CAP(C40, CAP_P(470)) -- part of final amp (not emulated)
D_1N5240(D1)
D_1N914(D2)
@@ -165,76 +165,76 @@ NETLIST_START(warrior)
D_1N914(D4)
D_1N914(D5)
- Q_2N3906(Q1) // PNP
- Q_2N3906(Q2) // PNP
- Q_2N3906(Q3) // PNP
- Q_2N3906(Q4) // PNP
- Q_2N3904(Q5) // NPN
-// Q_2N5878(Q6) // NPN -- part of final amp (not emulated)
-// Q_2N5876(Q7) // PNP -- part of final amp (not emulated)
+ Q_2N3906(Q1) // PNP
+ Q_2N3906(Q2) // PNP
+ Q_2N3906(Q3) // PNP
+ Q_2N3906(Q4) // PNP
+ Q_2N3904(Q5) // NPN
+// Q_2N5878(Q6) // NPN -- part of final amp (not emulated)
+// Q_2N5876(Q7) // PNP -- part of final amp (not emulated)
- TL081_DIP(IC1) // Op. Amp.
+ TL081_DIP(IC1) // Op. Amp.
NET_C(IC1.7, I_V15)
NET_C(IC1.4, I_VM15)
- CA3080_DIP(IC2) // Op. Amp.
+ CA3080_DIP(IC2) // Op. Amp.
NET_C(IC2.4, I_VM15)
NET_C(IC2.7, I_V15)
- CA3080_DIP(IC3) // Op. Amp.
+ CA3080_DIP(IC3) // Op. Amp.
NET_C(IC3.4, I_VM15)
NET_C(IC3.7, I_V15)
LM555_DIP(IC4)
- TL081_DIP(IC5) // Op. Amp.
-// NET_C(IC5.7, I_V15) // (indirectly via R15)
+ TL081_DIP(IC5) // Op. Amp.
+// NET_C(IC5.7, I_V15) // (indirectly via R15)
NET_C(IC5.4, I_VM15)
- TL081_DIP(IC6) // Op. Amp.
+ TL081_DIP(IC6) // Op. Amp.
NET_C(IC6.4, I_VM15)
NET_C(IC6.7, I_V15)
- TL081_DIP(IC7) // Op. Amp.
+ TL081_DIP(IC7) // Op. Amp.
NET_C(IC7.4, I_VM15)
NET_C(IC7.7, I_V15)
- TTL_74LS125_DIP(IC8) // Quad 3-state Buffers
+ TTL_74LS125_DIP(IC8) // Quad 3-state Buffers
NET_C(IC8.7, GND)
NET_C(IC8.14, I_V5)
LM555_DIP(IC9)
-// TTL_7815_DIP(IC10) // +15V Regulator -- not emulated
-// TTL_7915_DIP(IC11) // -15V Regulator -- not emulated
+// TTL_7815_DIP(IC10) // +15V Regulator -- not emulated
+// TTL_7915_DIP(IC11) // -15V Regulator -- not emulated
LM555_DIP(IC12)
- CA3080_DIP(IC13) // Op. Amp.
+ CA3080_DIP(IC13) // Op. Amp.
NET_C(IC13.4, I_VM15)
NET_C(IC13.7, I_V15)
- TTL_74121_DIP(IC14) // Monostable multivibrators with Schmitt-trigger inputs
+ TTL_74121_DIP(IC14) // Monostable multivibrators with Schmitt-trigger inputs
NET_C(IC14.7, GND)
NET_C(IC14.14, I_V5)
- TTL_7406_DIP(IC15) // Hex inverter -- currently using a clone of 7416, no open collector behavior
+ TTL_7406_DIP(IC15) // Hex inverter -- currently using a clone of 7416, no open collector behavior
NET_C(IC15.7, GND)
NET_C(IC15.14, I_V5)
- TL081_DIP(IC16) // Op. Amp.
+ TL081_DIP(IC16) // Op. Amp.
NET_C(IC16.4, I_VM15)
NET_C(IC16.7, I_V15)
LM555_DIP(IC17)
- CA3080_DIP(IC18) // Op. Amp.
+ CA3080_DIP(IC18) // Op. Amp.
NET_C(IC18.4, I_VM15)
NET_C(IC18.7, I_V15)
-// TL081_DIP(IC19) // Op. Amp. -- part of final amp (not emulated)
-// NET_C(IC19.4, I_VM15)
-// NET_C(IC19.7, I_V15)
+// TL081_DIP(IC19) // Op. Amp. -- part of final amp (not emulated)
+// NET_C(IC19.4, I_VM15)
+// NET_C(IC19.7, I_V15)
#if (HLE_NOISE_GEN)
//
@@ -285,7 +285,7 @@ NETLIST_START(warrior)
//
NET_C(I_OUT_2, R11.1, IC4.2)
- NET_C(R11.2, R12.2, IC4.8, IC4.4, I_V5) // IC4.4 not listed
+ NET_C(R11.2, R12.2, IC4.8, IC4.4, I_V5) // IC4.4 not listed
NET_C(R12.1, IC4.6, IC4.7, C7.1)
NET_C(C7.2, GND)
NET_C(IC4.1, GND)
@@ -480,11 +480,11 @@ NETLIST_START(warrior)
//
/*
- HINT(IC5.4, NC) // Q1
- HINT(IC5.6, NC) // Q2
- HINT(IC5.8, NC) // Q3
- HINT(IC5.10, NC) // Q4
- HINT(IC5.12, NC) // Q5
+ HINT(IC5.4, NC) // Q1
+ HINT(IC5.6, NC) // Q2
+ HINT(IC5.8, NC) // Q3
+ HINT(IC5.10, NC) // Q4
+ HINT(IC5.12, NC) // Q5
*/
NETLIST_END()
diff --git a/src/mame/audio/s11c_bg.cpp b/src/mame/audio/s11c_bg.cpp
index 6e448169bda..efd6730e699 100644
--- a/src/mame/audio/s11c_bg.cpp
+++ b/src/mame/audio/s11c_bg.cpp
@@ -380,13 +380,13 @@ void s11c_bg_device::bg_cvsd_digit_clock_clear_w(uint8_t data)
}
/*
- Rom mapping for the 4 banking bits:
- 3 2 1 0
- r q 0 0 - U4, A15 q, A16 r
- r q 0 1 - U19, A15 q, A16 r
- r q 1 0 - U20, A15 q, A16 r
- x x 1 1 - open bus
- for ease of loading the roms, we swap the bits to the order '1 0 3 2'
+ Rom mapping for the 4 banking bits:
+ 3 2 1 0
+ r q 0 0 - U4, A15 q, A16 r
+ r q 0 1 - U19, A15 q, A16 r
+ r q 1 0 - U20, A15 q, A16 r
+ x x 1 1 - open bus
+ for ease of loading the roms, we swap the bits to the order '1 0 3 2'
*/
void s11c_bg_device::bgbank_w(uint8_t data)
{
diff --git a/src/mame/drivers/astrof.cpp b/src/mame/drivers/astrof.cpp
index f0012a22319..9992933eac3 100644
--- a/src/mame/drivers/astrof.cpp
+++ b/src/mame/drivers/astrof.cpp
@@ -1067,7 +1067,7 @@ ROM_START( astroff )
ROM_REGION( 0x0020, "proms", 0 )
ROM_LOAD( "im5610-82s123.2f", 0x0000, 0x0020, CRC(61329fd1) SHA1(15782d8757d4dda5a8b97815e94c90218f0e08dd) )
ROM_END
-
+
ROM_START( abattle )
ROM_REGION( 0x10000, "maincpu", 0 )
diff --git a/src/mame/drivers/bigkarnk_ms.cpp b/src/mame/drivers/bigkarnk_ms.cpp
index 1fa9c9a72d1..d85c4123f04 100644
--- a/src/mame/drivers/bigkarnk_ms.cpp
+++ b/src/mame/drivers/bigkarnk_ms.cpp
@@ -346,7 +346,7 @@ private:
void bigkarnkm_map(address_map &map);
void sound_map(address_map &map);
void soundrom_map(address_map &map);
-
+
uint16_t vram1_r(offs_t offset, uint16_t mem_mask);
uint16_t vram2_r(offs_t offset, uint16_t mem_mask);
uint16_t vram3_r(offs_t offset, uint16_t mem_mask);
@@ -358,7 +358,7 @@ private:
TILE_GET_INFO_MEMBER(get_tile_info_tilemap1);
TILE_GET_INFO_MEMBER(get_tile_info_tilemap2);
TILE_GET_INFO_MEMBER(get_tile_info_tilemap3);
-
+
tilemap_t *m_bg_tilemap1;
tilemap_t *m_bg_tilemap2;
tilemap_t *m_bg_tilemap3;
@@ -382,7 +382,7 @@ TILE_GET_INFO_MEMBER(bigkarnk_ms_state::get_tile_info_tilemap1)
{
int tile = m_videoram1[tile_index*2];
int attr = m_videoram1[(tile_index*2)+1] & 0x1f;
-// int fx = (m_videoram1[(tile_index*2)+1] & 0xc0)>>6;
+// int fx = (m_videoram1[(tile_index*2)+1] & 0xc0)>>6;
// we rearranged the tile order for the 16x16 deode, so have to swap back here
tile = ((tile & 0x300) >> 8) | ((tile & 0xff) << 2) | (tile & 0xfc00);
@@ -492,7 +492,7 @@ void bigkarnk_ms_state::bigkarnkm_map(address_map &map)
map(0x400002, 0x400003).portr("IN1");
map(0x400006, 0x400007).portr("IN2");
map(0x400008, 0x400009).portr("IN3");
-
+
map(0x40000c, 0x40000d).noprw();
map(0x40000e, 0x40000e).w(m_soundlatch, FUNC(generic_latch_8_device::write));
@@ -514,7 +514,7 @@ uint32_t bigkarnk_ms_state::screen_update(screen_device &screen, bitmap_ind16 &b
m_bg_tilemap2->set_scrollx(0, 112-(m_scrollregs[0]-0x2));
m_bg_tilemap2->set_scrolly(0, -m_scrollregs[1]);
-
+
m_bg_tilemap1->set_scrollx(0, 112-(m_scrollregs[2]));
m_bg_tilemap1->set_scrolly(0, -m_scrollregs[3]);
@@ -607,7 +607,7 @@ static INPUT_PORTS_START( bigkarnkm )
PORT_DIPSETTING( 0x00a0, DEF_STR( 1C_6C ) )
PORT_DIPSETTING( 0x0000, "Free Play (if Coin A too)" )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
-
+
PORT_START("IN3")
PORT_DIPNAME( 0x0007, 0x0006, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:8,7,6")
PORT_DIPSETTING( 0x0007, "0" )
@@ -691,7 +691,7 @@ WRITE_LINE_MEMBER(bigkarnk_ms_state::splash_msm5205_int)
void bigkarnk_ms_state::sound_map(address_map &map)
{
map(0x0000, 0x7fff).rom();
-
+
map(0x8000, 0xbfff).m(m_soundrom, FUNC(address_map_bank_device::amap8));
map(0xe000, 0xe000).w(FUNC(bigkarnk_ms_state::splash_adpcm_control_w));
@@ -700,7 +700,7 @@ void bigkarnk_ms_state::sound_map(address_map &map)
map(0xe800, 0xe801).rw("ymsnd", FUNC(ym3812_device::read), FUNC(ym3812_device::write));
map(0xf000, 0xf7ff).ram();
- map(0xf800, 0xf800).r(m_soundlatch, FUNC(generic_latch_8_device::read));
+ map(0xf800, 0xf800).r(m_soundlatch, FUNC(generic_latch_8_device::read));
}
void bigkarnk_ms_state::soundrom_map(address_map &map)
@@ -718,7 +718,7 @@ void bigkarnk_ms_state::bigkarnkm(machine_config &config)
Z80(config, m_soundcpu, 16_MHz_XTAL/4);
m_soundcpu->set_addrmap(AS_PROGRAM, &bigkarnk_ms_state::sound_map);
- m_soundcpu->set_periodic_int(FUNC(bigkarnk_ms_state::nmi_line_pulse), attotime::from_hz(60*64));
+ m_soundcpu->set_periodic_int(FUNC(bigkarnk_ms_state::nmi_line_pulse), attotime::from_hz(60*64));
ADDRESS_MAP_BANK(config, m_soundrom).set_map(&bigkarnk_ms_state::soundrom_map).set_options(ENDIANNESS_LITTLE, 8, 18, 0x4000);
diff --git a/src/mame/drivers/bingor.cpp b/src/mame/drivers/bingor.cpp
index ee0c9410863..d9bc50a5216 100644
--- a/src/mame/drivers/bingor.cpp
+++ b/src/mame/drivers/bingor.cpp
@@ -799,70 +799,70 @@ void bingor_state::vip2000(machine_config &config)
// I doubt we need to load the EEPROMs
-ROM_START( bingor1 ) // Strings: Big Roll / Bingo Roll / 1991 AWR / 1992 Rosenauer Electronic Austria.
- ROM_REGION16_LE( 0x10000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
+ROM_START( bingor1 ) // Strings: Big Roll / Bingo Roll / 1991 AWR / 1992 Rosenauer Electronic Austria.
+ ROM_REGION16_LE( 0x10000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
ROM_LOAD16_BYTE( "bingo v 29.4.99 l.bin", 0x00000, 0x08000, CRC(b6773bff) SHA1(74e375662730e002e05186bd77098fa0d8e43ade) )
ROM_LOAD16_BYTE( "bingo v 29.4.99 h.bin", 0x00001, 0x08000, CRC(0e18f90a) SHA1(0743302e675f01f8ad42ac2e67ecb1c1bf870ae7) )
// gfx roms on this one are twice the size of the others
- ROM_REGION16_LE( 0x20000, "gfx", 0 ) // blitter data?
+ ROM_REGION16_LE( 0x20000, "gfx", 0 ) // blitter data?
ROM_LOAD16_BYTE( "bingo turbo l.bin", 0x000000, 0x10000, CRC(86b10566) SHA1(5f74b250ced3574feffdc40b6ed013ec5a0c2c97) )
ROM_LOAD16_BYTE( "bingo turbo h.bin", 0x000001, 0x10000, CRC(7e18f9d7) SHA1(519b65d6812a3762e3215f4918c834d5a444b28a) )
- ROM_REGION( 0x20000, "pic", 0 ) // protection?
+ ROM_REGION( 0x20000, "pic", 0 ) // protection?
ROM_LOAD( "pic16c54b.bin", 0x000, 0x200, CRC(21e8a699) SHA1(8a22292fa3669105d52a9d681d5be345fcfe6607) )
- ROM_REGION( 0x20000, "eeprom", 0 ) // eeprom
+ ROM_REGION( 0x20000, "eeprom", 0 ) // eeprom
ROM_LOAD( "bingor1_24c04a.bin", 0x000000, 0x200, CRC(b169df46) SHA1(ebafc81c6918aae9daa6b90df16161751cfd2590) )
ROM_END
-ROM_START( bingor2 ) // Strings: Euro Bingo / 1988-1992 Rosenauer Electronic Austria.
- ROM_REGION16_LE( 0x20000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
+ROM_START( bingor2 ) // Strings: Euro Bingo / 1988-1992 Rosenauer Electronic Austria.
+ ROM_REGION16_LE( 0x20000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
ROM_LOAD16_BYTE( "bingo roll vip2 v26.02.02_l.bin", 0x00000, 0x10000, CRC(40df6ee8) SHA1(1e90ef906e47f95ebde85b6dd32fdfe50c0564fc) )
ROM_LOAD16_BYTE( "bingo roll vip2 v26.02.02_h.bin", 0x00001, 0x10000, CRC(9154c183) SHA1(a4060294295a9b8df07ce9fcfeefcf009e129817) )
- ROM_REGION16_LE( 0x20000, "gfx", 0 ) // blitter data?
+ ROM_REGION16_LE( 0x20000, "gfx", 0 ) // blitter data?
ROM_LOAD16_BYTE( "bingo roll grafik l.bin", 0x000000, 0x10000, CRC(3e753e13) SHA1(011b5f530e54332be194830c0a1d2ec31425017a) )
ROM_LOAD16_BYTE( "bingo roll grafik h.bin", 0x000001, 0x10000, CRC(4eec39ad) SHA1(4201d5ec207d30dcac9813dd6866d2b61c168e75) )
- ROM_REGION( 0x20000, "pic", 0 ) // protection
+ ROM_REGION( 0x20000, "pic", 0 ) // protection
ROM_LOAD( "pic16c54c.bin", 0x000, 0x200, CRC(21e8a699) SHA1(8a22292fa3669105d52a9d681d5be345fcfe6607) )
- ROM_REGION( 0x20000, "eeprom", 0 ) // eeprom
+ ROM_REGION( 0x20000, "eeprom", 0 ) // eeprom
ROM_LOAD( "bingor2_24c04a.bin", 0x000000, 0x200, CRC(a7c87036) SHA1(f7d6161bbfdcdc50212f6b71eb2cbbbb18548cc6) )
ROM_END
-ROM_START( bingor3 ) // Strings: 1995-1997 Paloma Elektronik / 2002 Paloma Elektronik / Play Star Austria 0316/821193.
- ROM_REGION16_LE( 0x10000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
+ROM_START( bingor3 ) // Strings: 1995-1997 Paloma Elektronik / 2002 Paloma Elektronik / Play Star Austria 0316/821193.
+ ROM_REGION16_LE( 0x10000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
ROM_LOAD16_BYTE( "bellstar vip2l 27.07_1.bin", 0x00000, 0x08000, CRC(0115bca7) SHA1(0b692b46bc6641296861666f00ec0475dc7296a1) )
ROM_LOAD16_BYTE( "bellstar vip2l 27.07_2.bin", 0x00001, 0x08000, CRC(c689aa69) SHA1(fb1f477654909f156c30a6be29f84962f4edb1c3) )
- ROM_REGION16_LE( 0x20000, "gfx", ROMREGION_ERASE00 ) // blitter data?
+ ROM_REGION16_LE( 0x20000, "gfx", ROMREGION_ERASE00 ) // blitter data?
ROM_LOAD16_BYTE( "bsg-11.10.02_l.bin", 0x000000, 0x08000, CRC(a8b22477) SHA1(92d638f0f188a43f14487989cf42195311fb2c35) ) //half size?
ROM_LOAD16_BYTE( "bsg-11.10.02_h.bin", 0x000001, 0x08000, CRC(969d201c) SHA1(7705ceb383ef122538ebf8046041d1c24ec9b9a4) )
- ROM_REGION( 0x20000, "pic", 0 ) // protection
+ ROM_REGION( 0x20000, "pic", 0 ) // protection
ROM_LOAD( "pic16c54c.bin", 0x000, 0x400, CRC(5a507be6) SHA1(f4fbfb7e7516eecab32d96b3a34ad88395edac9e) )
- ROM_REGION( 0x20000, "eeprom", 0 ) // eeprom
+ ROM_REGION( 0x20000, "eeprom", 0 ) // eeprom
ROM_LOAD( "bingor3_24c04a.bin", 0x000000, 0x200, CRC(7a5eb172) SHA1(12d2fc96049427ef1a8acf47242b41b2095d28b6) )
ROM_LOAD( "bingor3_24c04a_alt.bin", 0x000000, 0x200, CRC(fcff2d26) SHA1(aec1ddd38149404741a057c74bf84bfb4a8e4aa1) )
ROM_END
// this is a mix of 2 of the other sets.. I don't know if it's correct
-ROM_START( bingor4 ) // Strings: 1995-1997 Paloma Elektronik / 2002 Paloma Elektronik / Play Star Austria 0316/821193 / CBA Design, Lyon France.
- ROM_REGION16_LE( 0x10000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
+ROM_START( bingor4 ) // Strings: 1995-1997 Paloma Elektronik / 2002 Paloma Elektronik / Play Star Austria 0316/821193 / CBA Design, Lyon France.
+ ROM_REGION16_LE( 0x10000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
ROM_LOAD16_BYTE( "01.bin", 0x00000, 0x08000, CRC(0115bca7) SHA1(0b692b46bc6641296861666f00ec0475dc7296a1) )
ROM_LOAD16_BYTE( "02.bin", 0x00001, 0x08000, CRC(c689aa69) SHA1(fb1f477654909f156c30a6be29f84962f4edb1c3) )
- ROM_REGION16_LE( 0x20000, "gfx", 0 ) // blitter data?
+ ROM_REGION16_LE( 0x20000, "gfx", 0 ) // blitter data?
ROM_LOAD16_BYTE( "bingo roll grafik l.bin", 0x000000, 0x10000, CRC(3e753e13) SHA1(011b5f530e54332be194830c0a1d2ec31425017a) )
ROM_LOAD16_BYTE( "bingo roll grafik h.bin", 0x000001, 0x10000, CRC(4eec39ad) SHA1(4201d5ec207d30dcac9813dd6866d2b61c168e75) )
- ROM_REGION( 0x20000, "pic", 0 ) // protection?
+ ROM_REGION( 0x20000, "pic", 0 ) // protection?
ROM_LOAD( "pic16c54c.bin", 0x000, 0x200, CRC(21e8a699) SHA1(8a22292fa3669105d52a9d681d5be345fcfe6607) )
- ROM_REGION( 0x20000, "eeprom", 0 ) // eeprom
+ ROM_REGION( 0x20000, "eeprom", 0 ) // eeprom
ROM_LOAD( "bingor4_24c04a.bin", 0x000000, 0x200, CRC(38cf70a9) SHA1(ba9a1640200963e2d58d761edc13a24fa5ef44c2) )
ROM_END
@@ -873,19 +873,19 @@ ROM_END
*/
-ROM_START( bingor5 ) // BellStar V3. Strings: 1995-1997 Paloma Elektronik / 2002 Paloma Elektronik / Play Star Austria 0316/821193 / CBA Design, Lyon France.
- ROM_REGION16_LE( 0x10000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
+ROM_START( bingor5 ) // BellStar V3. Strings: 1995-1997 Paloma Elektronik / 2002 Paloma Elektronik / Play Star Austria 0316/821193 / CBA Design, Lyon France.
+ ROM_REGION16_LE( 0x10000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
ROM_LOAD16_BYTE( "bellstar_v3_v.3.6.02_l.bin", 0x00000, 0x08000, CRC(56b84a5d) SHA1(1bda4fb972b4f0f0575089b545bf15dfea859948) )
ROM_LOAD16_BYTE( "bellstar_v3_v.3.6.02_h.bin", 0x00001, 0x08000, CRC(d6945bb8) SHA1(b620f1b547be03c4609bff8d06111d0ea425bae8) )
- ROM_REGION16_LE( 0x20000, "gfx", ROMREGION_ERASE00 ) // blitter data?
+ ROM_REGION16_LE( 0x20000, "gfx", ROMREGION_ERASE00 ) // blitter data?
ROM_LOAD16_BYTE( "b.s.grafik_11.10.02_l.bin", 0x000000, 0x08000, CRC(a8b22477) SHA1(92d638f0f188a43f14487989cf42195311fb2c35) ) //half size?
ROM_LOAD16_BYTE( "b.s.grafik_11.10.02_h.bin", 0x000001, 0x08000, CRC(969d201c) SHA1(7705ceb383ef122538ebf8046041d1c24ec9b9a4) )
- ROM_REGION( 0x20000, "pic", 0 ) // protection?
+ ROM_REGION( 0x20000, "pic", 0 ) // protection?
ROM_LOAD( "pic16c54c.bin", 0x000, 0x400, CRC(5a507be6) SHA1(f4fbfb7e7516eecab32d96b3a34ad88395edac9e) )
- ROM_REGION( 0x20000, "eeprom", 0 ) // eeprom
+ ROM_REGION( 0x20000, "eeprom", 0 ) // eeprom
ROM_LOAD( "bingor5_24c04a.bin", 0x000000, 0x200, CRC(fcff2d26) SHA1(aec1ddd38149404741a057c74bf84bfb4a8e4aa1) )
ROM_END
@@ -896,32 +896,32 @@ ROM_END
Same PCB layout as bingor3,
but 2x crystals:
-
+
1x 16 MHz. (sub board)
1x 10 MHz. (main board)
1x MP690P
-
+
*/
-ROM_START( bingor6 ) // Strings: 1988-1992 AWR Hard & Soft Austria.
- ROM_REGION16_LE( 0x10000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
+ROM_START( bingor6 ) // Strings: 1988-1992 AWR Hard & Soft Austria.
+ ROM_REGION16_LE( 0x10000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
ROM_LOAD16_BYTE( "bingo_l.bin", 0x00000, 0x08000, CRC(78df905d) SHA1(197c5a795bdda964db780dd3b9c0f9b76197a610) )
ROM_LOAD16_BYTE( "bingo_h.bin", 0x00001, 0x08000, CRC(f25958fd) SHA1(8a8c061accc4c2fa8475188a1281518e63fb456d) )
- ROM_REGION16_LE( 0x20000, "gfx", ROMREGION_ERASE00 ) // blitter data?
+ ROM_REGION16_LE( 0x20000, "gfx", ROMREGION_ERASE00 ) // blitter data?
ROM_LOAD16_BYTE( "turbo_l.bin", 0x000000, 0x10000, CRC(86b10566) SHA1(5f74b250ced3574feffdc40b6ed013ec5a0c2c97) )
ROM_LOAD16_BYTE( "turbo_h.bin", 0x000001, 0x10000, CRC(7e18f9d7) SHA1(519b65d6812a3762e3215f4918c834d5a444b28a) )
- ROM_REGION( 0x20000, "pic", 0 ) // protection?
+ ROM_REGION( 0x20000, "pic", 0 ) // protection?
ROM_LOAD( "pic16c54rc.bin", 0x000, 0x400, NO_DUMP )
- ROM_REGION( 0x20000, "eeprom", 0 ) // eeprom
+ ROM_REGION( 0x20000, "eeprom", 0 ) // eeprom
ROM_LOAD( "bingor6_24c04a.bin", 0x000000, 0x200, CRC(9d271c5f) SHA1(8ac5c4848fb8d9a156ba760324022839fefcbb72) )
ROM_END
ROM_START( vip2000 )
- ROM_REGION16_LE( 0x10000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
+ ROM_REGION16_LE( 0x10000, "boot_prg", ROMREGION_ERASE00 ) // i186 code
ROM_LOAD16_BYTE( "vipbios8l.bin", 0x00000, 0x08000, CRC(a4c2b351) SHA1(bb718584bfe32b9ed27fadfd89b4094d4bbd6d7f) )
ROM_LOAD16_BYTE( "vipbios8h.bin", 0x00001, 0x08000, CRC(7c42c5ee) SHA1(c419a834ddb245363bacfe70d31cff7c2d4a2d03) )
diff --git a/src/mame/drivers/bloodbro_ms.cpp b/src/mame/drivers/bloodbro_ms.cpp
index 96e79f418e5..d0ab383396e 100644
--- a/src/mame/drivers/bloodbro_ms.cpp
+++ b/src/mame/drivers/bloodbro_ms.cpp
@@ -120,7 +120,7 @@ uint32_t bloodbro_ms_state::screen_update(screen_device &screen, bitmap_ind16 &b
int ypos = attr0 & 0x00ff;
int xpos = (attr1 & 0xff00)>>8;
- xpos |= (attr2 & 0x8000) ? 0x100 : 0x000;
+ xpos |= (attr2 & 0x8000) ? 0x100 : 0x000;
ypos = (0xff - ypos);
@@ -152,13 +152,13 @@ static const gfx_layout tiles16x16x4_layout =
/*
static const gfx_layout tiles8x8x4_layout =
{
- 8,8,
- RGN_FRAC(1,1),
- 4,
- { 0,8,16,24 },
- { 0,1,2,3,4,5,6,7 },
- { STEP8(0,32) },
- 16 * 16
+ 8,8,
+ RGN_FRAC(1,1),
+ 4,
+ { 0,8,16,24 },
+ { 0,1,2,3,4,5,6,7 },
+ { STEP8(0,32) },
+ 16 * 16
};
*/
@@ -256,7 +256,7 @@ ROM_START( bloodbrom )
ROM_LOAD32_BYTE( "4-3-b_bb4b2.ic16", 0x00002, 0x20000, CRC(f25dd182) SHA1(eff29970c7b898744b08a151f9e17b68ce77e78d) )
ROM_LOAD32_BYTE( "4-3-b_bb4b3.ic15", 0x00001, 0x20000, CRC(3efcb6aa) SHA1(0a162285d08e171e946147e0725db879643ae113) )
ROM_LOAD32_BYTE( "4-3-b_bb4b4.ic14", 0x00000, 0x20000, CRC(6b5254fa) SHA1(1e9e3096e5f29554fb8f8cb0df0e5157f940f8c9) )
-
+
// ROMs for frontmost tile layer (text) are missing?
ROM_REGION( 0x80000, "gfx3", 0 ) // on another MOD 4/3 board
ROM_LOAD32_BYTE( "text.ic17", 0x00003, 0x20000, NO_DUMP )
diff --git a/src/mame/drivers/cinemat.cpp b/src/mame/drivers/cinemat.cpp
index f9f73d60f56..5a1500b32e7 100644
--- a/src/mame/drivers/cinemat.cpp
+++ b/src/mame/drivers/cinemat.cpp
@@ -1094,7 +1094,7 @@ void cinemat_state::speedfrk(machine_config &config)
{
cinemat_nojmi_8k(config);
SPEED_FREAK_AUDIO(config, "soundboard", 0).configure_latch_inputs(*m_outlatch);
-// m_outlatch->q_out_cb<1>().set(FUNC(cinemat_state::speedfrk_start_led_w));
+// m_outlatch->q_out_cb<1>().set(FUNC(cinemat_state::speedfrk_start_led_w));
}
void cinemat_state::starhawk(machine_config &config)
diff --git a/src/mame/drivers/cmi.cpp b/src/mame/drivers/cmi.cpp
index c00db2db85e..333d352af29 100644
--- a/src/mame/drivers/cmi.cpp
+++ b/src/mame/drivers/cmi.cpp
@@ -1685,7 +1685,7 @@ void cmi_state::cmi02_w(offs_t offset, uint8_t data)
m_hp_int = 0;
m_maincpu1_irq_merger->in_w<1>(0);
//if (m_lp_int == 0)
- // m_maincpu1->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
+ // m_maincpu1->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
m_i8214[2]->b_sgs_w(~(data & 0xf));
break;
@@ -1723,7 +1723,7 @@ void cmi_state::i8214_cpu1_w(uint8_t data)
m_maincpu1_irq_merger->in_w<0>(0);
m_lp_int = 0;
//if (m_hp_int == 0)
- // m_maincpu1->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
+ // m_maincpu1->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
m_i8214[0]->b_sgs_w(~(data & 0xf));
}
diff --git a/src/mame/drivers/ddenlovr.cpp b/src/mame/drivers/ddenlovr.cpp
index 72b41323eae..16b0e7c0f11 100644
--- a/src/mame/drivers/ddenlovr.cpp
+++ b/src/mame/drivers/ddenlovr.cpp
@@ -5393,7 +5393,7 @@ static INPUT_PORTS_START( animaljr )
PORT_DIPSETTING( 0x0c, "Level 5" )
PORT_DIPSETTING( 0x04, "Level 6" )
PORT_DIPSETTING( 0x00, "unknown Level (00)" )
- PORT_DIPSETTING( 0x10, "unknown Level (10)" )
+ PORT_DIPSETTING( 0x10, "unknown Level (10)" )
PORT_DIPNAME( 0xe0, 0xe0, "Game Hit Probability" ) PORT_DIPLOCATION("DSWA:6,7,8") // manual lists 6 valid settings
PORT_DIPSETTING( 0x40, "1/15" )
PORT_DIPSETTING( 0x60, "1/10" )
@@ -5430,16 +5430,16 @@ static INPUT_PORTS_START( animaljr )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("DSW3")
- PORT_DIPNAME( 0x01, 0x01, "Unknown A-9 (debug?)" ) PORT_DIPLOCATION("DSWA:9") // manual lists 'unused, MUST remain OFF'
+ PORT_DIPNAME( 0x01, 0x01, "Unknown A-9 (debug?)" ) PORT_DIPLOCATION("DSWA:9") // manual lists 'unused, MUST remain OFF'
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, "Tickets" ) PORT_DIPLOCATION("DSWA:10")
+ PORT_DIPNAME( 0x02, 0x02, "Tickets" ) PORT_DIPLOCATION("DSWA:10")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, "Unknown B-9 (debug?)" ) PORT_DIPLOCATION("DSWB:9") // manual lists 'unused, should remain OFF'
+ PORT_DIPNAME( 0x04, 0x04, "Unknown B-9 (debug?)" ) PORT_DIPLOCATION("DSWB:9") // manual lists 'unused, should remain OFF'
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_SERVICE( 0x08, IP_ACTIVE_LOW ) PORT_DIPLOCATION("DSWB:10")
+ PORT_SERVICE( 0x08, IP_ACTIVE_LOW ) PORT_DIPLOCATION("DSWB:10")
PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN )
INPUT_PORTS_END
diff --git a/src/mame/drivers/exidyttl.cpp b/src/mame/drivers/exidyttl.cpp
index a1c5ecaa9e3..37a1c591b55 100644
--- a/src/mame/drivers/exidyttl.cpp
+++ b/src/mame/drivers/exidyttl.cpp
@@ -195,7 +195,7 @@ ROM_END
ROM_START( destdrby )
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 )
-
+
ROM_REGION( 0x0400, "roms", ROMREGION_ERASE00)
ROM_LOAD( "82s123-31.a11", 0x0000, 0x0020, CRC(f304a1fb) SHA1(0f029274bb99723ebcc271d761e1500ca50b2738) )
ROM_LOAD( "82s123-32.c12", 0x0000, 0x0020, CRC(f8dbd779) SHA1(55bdaf9eb1ba6185e20512c4874ebb625861508e) )
@@ -253,7 +253,7 @@ ROM_START( deathrac )
ROM_LOAD( "6331-31.a11", 0x0000, 0x0020, CRC(f304a1fb) SHA1(0f029274bb99723ebcc271d761e1500ca50b2738) )
ROM_LOAD( "6331-32.c12", 0x0000, 0x0020, CRC(f8dbd779) SHA1(55bdaf9eb1ba6185e20512c4874ebb625861508e) )
ROM_LOAD( "6331-33.p14", 0x0000, 0x0020, CRC(2e83bf80) SHA1(02fcc1e879c06759a21ef4f004fe7aa790814112) )
- // Note: Image for 36 has all zeros in the second half, which is unused.
+ // Note: Image for 36 has all zeros in the second half, which is unused.
// Other roms in this series (34,35) all have duplicate content in the second half
ROM_LOAD( "6331-36.e7", 0x0000, 0x0020, CRC(bb743b79) SHA1(8eb73782bcea7dbba7b75db32307e562248691bb) )
ROM_LOAD( "6331-35.g7", 0x0000, 0x0020, CRC(5ed8cdd2) SHA1(d193d819ad634c43d648ce49073799b4df6dfd2f) )
diff --git a/src/mame/drivers/exorciser.cpp b/src/mame/drivers/exorciser.cpp
index 82c46c500f7..2f15bfca0fd 100644
--- a/src/mame/drivers/exorciser.cpp
+++ b/src/mame/drivers/exorciser.cpp
@@ -191,7 +191,7 @@ private:
u8 main_r(offs_t offset);
void main_w(offs_t offset, u8 data);
u8 prom_r(offs_t offset);
-
+
required_device<m6800_cpu_device> m_maincpu;
required_device<address_map_bank_device> m_bankdev;
required_device<input_merger_device> m_mainirq;
@@ -258,7 +258,7 @@ void exorciser_state::mem_map(address_map &map)
// Disk driver code.
map(0xe800, 0xebff).rom().region("68fdc2", 0);
-
+
// Disk driver unit
map(0xec00, 0xec07).rw(m_fdc, FUNC(m68sfdc_device::read), FUNC(m68sfdc_device::write));
@@ -270,7 +270,7 @@ void exorciser_state::mem_map(address_map &map)
// EXBUG
map(0xf000, 0xfbff).rom().region("exbug", 0);
-
+
map(0xfcf4, 0xfcf5).mirror(0x0002).rw(m_acia, FUNC(acia6850_device::read), FUNC(acia6850_device::write));
map(0xfcf8, 0xfcfb).rw(m_pia_dbg, FUNC(pia6821_device::read), FUNC(pia6821_device::write));
@@ -403,7 +403,7 @@ WRITE_LINE_MEMBER(exorciser_state::write_f13_clock)
u8 exorciser_state::main_r(offs_t offset)
{
if (offset == m_stop_address && m_stop_enabled &&
- !machine().side_effects_disabled())
+ !machine().side_effects_disabled())
{
m_pia_dbg->cb1_w(CLEAR_LINE);
m_pia_dbg->cb1_w(ASSERT_LINE);
diff --git a/src/mame/drivers/funworld.cpp b/src/mame/drivers/funworld.cpp
index a110f5baa83..c95182c93ac 100644
--- a/src/mame/drivers/funworld.cpp
+++ b/src/mame/drivers/funworld.cpp
@@ -6088,13 +6088,13 @@ ROM_END
The following two sets have the same program
but different graphics system.
-
+
Both sets have graphics ROMs data interleaved
inside the second half of a 16bit 27C210 EPROM.
The second set has some 8bits data in the first half.
Not clear if it's for obfuscation or just are the missing
logo graphics tiles.
-
+
The program looks original. The former sets programs
have differents offsets patched and moved blocks respect
this new program.
@@ -6110,15 +6110,15 @@ ROM_START( jolyjokro )
ROM_REGION( 0x10000, "gfxpool", 0 )
ROM_LOAD( "impera2.bin", 0x0000, 0x10000, CRC(aa86dba6) SHA1(fe189dde83bd855f4a0b34b20c161a9addc15017) )
- ROM_CONTINUE( 0x0000, 0x10000) // discarding 1nd empty half (0000-ffff)
+ ROM_CONTINUE( 0x0000, 0x10000) // discarding 1nd empty half (0000-ffff)
ROM_REGION( 0x10000, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x10000, 0xff) // deinterleaved GFX data will be placed here
+ ROM_FILL( 0x0000, 0x10000, 0xff) // deinterleaved GFX data will be placed here
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolyjokro_nvram.bin", 0x0000, 0x0800, CRC(1f69e567) SHA1(86695ca6f9f93c6badd092410611d8061edf8efa) )
- ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
+ ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
ROM_LOAD( "1_impera_color_ii.bin", 0x0000, 0x0200, CRC(9d62f9f5) SHA1(68300c25c7eaa13a3fdbf91ab0711d0bc530543d) )
ROM_END
@@ -6128,15 +6128,15 @@ ROM_START( jolyjokrp )
ROM_REGION( 0x10000, "gfxpool", 0 )
ROM_LOAD( "9c_1ff1.bin", 0x00000, 0x10000, CRC(4b8f0821) SHA1(0821eed07f5e98b66d87a3079756dad72ffe9665) )
- ROM_CONTINUE( 0x00000, 0x10000) // discarding 1nd half (0000-ffff), but has some data. maybe the missing impera logo?
+ ROM_CONTINUE( 0x00000, 0x10000) // discarding 1nd half (0000-ffff), but has some data. maybe the missing impera logo?
ROM_REGION( 0x10000, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x10000, 0xff) // deinterleaved GFX data will be placed here
+ ROM_FILL( 0x0000, 0x10000, 0xff) // deinterleaved GFX data will be placed here
- ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
+ ROM_REGION( 0x0800, "nvram", 0 ) // default NVRAM
ROM_LOAD( "jolyjokrp_nvram.bin", 0x0000, 0x0800, CRC(c8706e75) SHA1(421420b1ee82615faf290d1204342cdde776ffaf) )
- ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
+ ROM_REGION( 0x0200, "proms", 0 ) // PLD address the 2nd half
ROM_LOAD( "impera_color_ii.bin", 0x0000, 0x0200, CRC(9d62f9f5) SHA1(68300c25c7eaa13a3fdbf91ab0711d0bc530543d) )
ROM_END
@@ -7923,7 +7923,7 @@ void funworld_state::init_impera16()
*****************************/
int j = 0;
-
+
for (int i = 0; i < size; i += 2)
{
gfx8rom[j] = gfx16rom[i];
diff --git a/src/mame/drivers/galpanic_ms.cpp b/src/mame/drivers/galpanic_ms.cpp
index 40d4c228de3..f94e85e1de7 100644
--- a/src/mame/drivers/galpanic_ms.cpp
+++ b/src/mame/drivers/galpanic_ms.cpp
@@ -20,7 +20,7 @@
MOD 4/3 - Tilemap board, has logic + 4 tilemap ROMs, long thin sub-board (CAR-0484/1 SOLD) with no chips, just routing along one edge
- -- does the sound board have a MSM5205 or not?
+ -- does the sound board have a MSM5205 or not?
*/
@@ -237,8 +237,8 @@ void galspanic_ms_state::sound_map(address_map &map)
//map(0x8000, 0xbfff).m(m_soundrom, FUNC(address_map_bank_device::amap8));
-// map(0xe000, 0xe000).w(FUNC(galspanic_ms_state::splash_adpcm_control_w));
-// map(0xe400, 0xe400).w(FUNC(galspanic_ms_state::splash_adpcm_data_w));
+// map(0xe000, 0xe000).w(FUNC(galspanic_ms_state::splash_adpcm_control_w));
+// map(0xe400, 0xe400).w(FUNC(galspanic_ms_state::splash_adpcm_data_w));
map(0xa000, 0xa001).rw(m_ym1, FUNC(ym2203_device::read), FUNC(ym2203_device::write)).mirror(0x0008);
map(0xa002, 0xa003).rw(m_ym2, FUNC(ym2203_device::read), FUNC(ym2203_device::write)).mirror(0x0008);
@@ -307,7 +307,7 @@ uint32_t galspanic_ms_state::screen_update(screen_device &screen, bitmap_ind16 &
m_bg_tilemap2->set_scrollx(0, 64+m_scrollram[0x400/2]);
m_bg_tilemap2->set_scrolly(0, 48-m_scrollram[0x402/2]);
-
+
m_bg_tilemap2->draw(screen, bitmap, cliprect, 0, 0);
// TODO, convert to device, share between Modualar System games
@@ -326,7 +326,7 @@ uint32_t galspanic_ms_state::screen_update(screen_device &screen, bitmap_ind16 &
int ypos = attr0 & 0x00ff;
int xpos = (attr1 & 0xff00)>>8;
- xpos |= (attr2 & 0x8000) ? 0x100 : 0x000;
+ xpos |= (attr2 & 0x8000) ? 0x100 : 0x000;
ypos = (0xff - ypos);
@@ -465,7 +465,7 @@ void galspanic_ms_state::newquiz(machine_config &config)
Z80(config, m_soundcpu, 16_MHz_XTAL/4);
m_soundcpu->set_addrmap(AS_PROGRAM, &galspanic_ms_state::sound_map);
-// m_soundcpu->set_periodic_int(FUNC(galspanic_ms_state::nmi_line_pulse), attotime::from_hz(60*64)); // no NMI here, just retn
+// m_soundcpu->set_periodic_int(FUNC(galspanic_ms_state::nmi_line_pulse), attotime::from_hz(60*64)); // no NMI here, just retn
ADDRESS_MAP_BANK(config, m_soundrom).set_map(&galspanic_ms_state::soundrom_map).set_options(ENDIANNESS_LITTLE, 8, 18, 0x4000);
diff --git a/src/mame/drivers/gigatron.cpp b/src/mame/drivers/gigatron.cpp
index f1fd35491b7..7f929ace430 100644
--- a/src/mame/drivers/gigatron.cpp
+++ b/src/mame/drivers/gigatron.cpp
@@ -51,7 +51,7 @@ private:
void data_map(address_map &map);
uint16_t m_lc; //Lights Changed
-
+
//Video Generation stuff
uint8_t m_out;
uint8_t m_row;
@@ -62,10 +62,10 @@ private:
void video_draw(u8 data);
uint8_t inputs();
void port_outx(uint8_t data);
-
+
std::unique_ptr<bitmap_ind16> m_bitmap_render;
std::unique_ptr<bitmap_ind16> m_bitmap_buffer;
-
+
required_device<gigatron_cpu_device> m_maincpu;
required_device<dac_byte_interface> m_dac;
required_ioport m_io_inputs;
@@ -85,26 +85,26 @@ void gigatron_state::video_draw(u8 data)
{
uint8_t out = data;
uint8_t falling = m_out & ~out;
-
+
if (falling & VSYNC)
{
m_row = 0;
m_pixel = 0;
}
-
+
if (falling & HSYNC)
{
m_col = 0;
m_row++;
}
-
+
m_out = out;
-
+
if ((out & (VSYNC | HSYNC)) != (VSYNC | HSYNC))
{
return;
}
-
+
if((m_row >= 0 && m_row < 480) && (m_col >= 0 && m_col < 640))
{
//uint16_t *dest;
diff --git a/src/mame/drivers/goldnpkr.cpp b/src/mame/drivers/goldnpkr.cpp
index 46617ddef9a..aab11939887 100644
--- a/src/mame/drivers/goldnpkr.cpp
+++ b/src/mame/drivers/goldnpkr.cpp
@@ -1497,8 +1497,8 @@ TILE_GET_INFO_MEMBER(goldnpkr_state::get_bg_tile_info)
int attr = m_colorram[tile_index];
int code = ((attr & 1) << 8) | m_videoram[tile_index];
- int bank = (attr & 0x02) >> 1; // bit 1 switch the gfx banks
- int color = (attr & 0x3c) >> 2; // bits 2-3-4-5 for color
+ int bank = (attr & 0x02) >> 1; // bit 1 switch the gfx banks
+ int color = (attr & 0x3c) >> 2; // bits 2-3-4-5 for color
tileinfo.set(bank, code, color, 0);
}
@@ -1515,8 +1515,8 @@ TILE_GET_INFO_MEMBER(goldnpkr_state::wcrdxtnd_get_bg_tile_info)
int attr = m_colorram[tile_index];
int code = ((attr & 1) << 8) | m_videoram[tile_index];
- int bank = (attr & 0x03) + ((attr & 0xc0) >> 4); // bits 0, 1, 6 & 7 switch the gfx banks
- int color = (attr & 0x3c) >> 2; // bits 2-3-4-5 for color
+ int bank = (attr & 0x03) + ((attr & 0xc0) >> 4); // bits 0, 1, 6 & 7 switch the gfx banks
+ int color = (attr & 0x3c) >> 2; // bits 2-3-4-5 for color
tileinfo.set(bank, code, color, 0);
}
@@ -1747,7 +1747,7 @@ void goldnpkr_state::super21p_palette(palette_device &palette) const
*/
uint8_t goldnpkr_state::goldnpkr_mux_port_r()
{
- switch( m_mux_data & 0xf0 ) // bits 4-7
+ switch( m_mux_data & 0xf0 ) // bits 4-7
{
// normal selector writes 7F-BF-DF-EF
case 0x10: return ioport("IN0-0")->read();
@@ -1767,9 +1767,9 @@ uint8_t goldnpkr_state::goldnpkr_mux_port_r()
uint8_t goldnpkr_state::pottnpkr_mux_port_r()
{
- uint8_t pa_0_4 = 0xff, pa_7; // temporary placeholder for bits 0 to 4 & 7
+ uint8_t pa_0_4 = 0xff, pa_7; // temporary placeholder for bits 0 to 4 & 7
- switch( m_mux_data & 0xf0 ) // bits 4-7
+ switch( m_mux_data & 0xf0 ) // bits 4-7
{
case 0x10: return ioport("IN0-0")->read();
case 0x20: return ioport("IN0-1")->read();
@@ -1777,7 +1777,7 @@ uint8_t goldnpkr_state::pottnpkr_mux_port_r()
case 0x80: return ioport("IN0-3")->read();
}
- pa_7 = (m_pia0_PA_data >> 7) & 1; // to do: bit PA5 to pin CB1
+ pa_7 = (m_pia0_PA_data >> 7) & 1; // to do: bit PA5 to pin CB1
return ( (pa_0_4 & 0x3f) | (pa_7 << 6) | (pa_7 << 7) ) ;
}
@@ -1785,7 +1785,7 @@ uint8_t goldnpkr_state::pottnpkr_mux_port_r()
void goldnpkr_state::mux_w(uint8_t data)
{
//logerror("mux_w: %2x\n",data);
- m_mux_data = data ^ 0xff; // inverted
+ m_mux_data = data ^ 0xff; // inverted
}
void goldnpkr_state::mux_port_w(uint8_t data)
@@ -1881,11 +1881,11 @@ void goldnpkr_state::lamps_a_w(uint8_t data)
*/
data = data ^ 0xff;
- m_lamps[0] = BIT(data, 0); // lamp 0
- m_lamps[1] = BIT(data, 1); // lamp 1
- m_lamps[2] = BIT(data, 2); // lamp 2
- m_lamps[3] = BIT(data, 3); // lamp 3
- m_lamps[4] = BIT(data, 4); // lamp 4
+ m_lamps[0] = BIT(data, 0); // lamp 0
+ m_lamps[1] = BIT(data, 1); // lamp 1
+ m_lamps[2] = BIT(data, 2); // lamp 2
+ m_lamps[3] = BIT(data, 3); // lamp 3
+ m_lamps[4] = BIT(data, 4); // lamp 4
machine().bookkeeping().coin_counter_w(0, data & 0x40); // counter 1
machine().bookkeeping().coin_counter_w(1, data & 0x80); // counter 2
@@ -1958,7 +1958,7 @@ void goldnpkr_state::goldnpkr_map(address_map &map)
map(0x0848, 0x084b).rw("pia1", FUNC(pia6821_device::read), FUNC(pia6821_device::write));
map(0x1000, 0x13ff).ram().w(FUNC(goldnpkr_state::goldnpkr_videoram_w)).share("videoram");
map(0x1800, 0x1bff).ram().w(FUNC(goldnpkr_state::goldnpkr_colorram_w)).share("colorram");
- map(0x2000, 0x7fff).rom(); // superdbl uses 0x2000..0x3fff address space
+ map(0x2000, 0x7fff).rom(); // superdbl uses 0x2000..0x3fff address space
}
void goldnpkr_state::witchcdj_map(address_map &map)
@@ -2033,9 +2033,9 @@ void goldnpkr_state::wildcard_map(address_map &map)
map(0x1000, 0x13ff).ram().w(FUNC(goldnpkr_state::goldnpkr_videoram_w)).share("videoram");
map(0x1800, 0x1bff).ram().w(FUNC(goldnpkr_state::goldnpkr_colorram_w)).share("colorram");
map(0x2000, 0x2000).portr("SW2");
- map(0x2200, 0x27ff).rom(); // for VK set
- map(0x2800, 0x2fff).ram(); // for VK set
- map(0x3000, 0xffff).rom(); // for VK set. bootleg starts from 4000
+ map(0x2200, 0x27ff).rom(); // for VK set
+ map(0x2800, 0x2fff).ram(); // for VK set
+ map(0x3000, 0xffff).rom(); // for VK set. bootleg starts from 4000
}
/*
@@ -2052,9 +2052,9 @@ void goldnpkr_state::wcrdxtnd_map(address_map &map)
map(0x1000, 0x13ff).ram().w(FUNC(goldnpkr_state::goldnpkr_videoram_w)).share("videoram");
map(0x1800, 0x1bff).ram().w(FUNC(goldnpkr_state::goldnpkr_colorram_w)).share("colorram");
map(0x2000, 0x2000).portr("SW2");
- map(0x2200, 0x27ff).rom(); // for VK hardware
+ map(0x2200, 0x27ff).rom(); // for VK hardware
map(0x2800, 0x2fff).ram().share("nvram"); // Dallas ds1210 + battery backed RAM
- map(0x3000, 0xffff).rom(); // for VK hardware. bootleg starts from 4000
+ map(0x3000, 0xffff).rom(); // for VK hardware. bootleg starts from 4000
}
/*
@@ -2206,7 +2206,7 @@ static INPUT_PORTS_START( goldnpkr )
PORT_START("IN0-3")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Learn Mode") PORT_CODE(KEYCODE_F2)
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("D-31") PORT_CODE(KEYCODE_E) // O.A.R? (D-31 in schematics)
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("D-31") PORT_CODE(KEYCODE_E) // O.A.R? (D-31 in schematics)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("Coupon (Note In)")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Coin In")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_NAME("Weight (Coupon In)")
@@ -2490,16 +2490,16 @@ static INPUT_PORTS_START( animpkr )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_DIPNAME( 0x10, 0x00, "High Pair (11-13)" ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x10, 0x00, "High Pair (11-13)" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, "50hz/60hz" ) PORT_DIPLOCATION("SW1:2")
+ PORT_DIPNAME( 0x20, 0x00, "50hz/60hz" ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x20, "50hz" )
PORT_DIPSETTING( 0x00, "60hz" )
- PORT_DIPNAME( 0x40, 0x00, "Payout Mode" ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x40, 0x00, "Payout Mode" ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x40, "Manual" )
PORT_DIPSETTING( 0x00, "Auto" )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END
@@ -2573,7 +2573,7 @@ static INPUT_PORTS_START( ngold)
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x00, "Minimal Hand" ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x10, 0x00, "Minimal Hand" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, "Pair of Aces" )
PORT_DIPSETTING( 0x10, "Double Pair" )
PORT_DIPNAME( 0x20, 0x00, "50hz/60hz" ) PORT_DIPLOCATION("SW1:2")
@@ -2644,7 +2644,7 @@ static INPUT_PORTS_START( ngoldb) // only coinage changes against ngold...
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x00, "Minimal Hand" ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x10, 0x00, "Minimal Hand" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, "Pair of Aces" )
PORT_DIPSETTING( 0x10, "Double Pair" )
PORT_DIPNAME( 0x20, 0x00, "50hz/60hz" ) PORT_DIPLOCATION("SW1:2")
@@ -2738,10 +2738,10 @@ SW4 OFF ON OFF ON
switches 1+2+5+6 = OFF
switches 7+8 = ON
*/
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:1") // OFF by default
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:1") // OFF by default
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2") // OFF by default
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2") // OFF by default
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x0c, 0x04, "Percentage" ) PORT_DIPLOCATION("SW1:3,4")
@@ -2749,16 +2749,16 @@ SW4 OFF ON OFF ON
PORT_DIPSETTING( 0x04, "50%" )
PORT_DIPSETTING( 0x08, "60%" )
PORT_DIPSETTING( 0x00, "70%" )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:5") // OFF by default
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:5") // OFF by default
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:6") // OFF by default
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:6") // OFF by default
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:7") // ON by default
+ PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:7") // ON by default
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:8") // ON by default
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:8") // ON by default
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -4559,7 +4559,7 @@ static const discrete_555_desc goldnpkr_555_vco_desc =
static const discrete_dac_r1_ladder dac_goldnpkr_ladder =
{
3, // size of ladder
- {RES_K(30), RES_K(15), RES_K(7.5)}, // elements
+ {RES_K(30), RES_K(15), RES_K(7.5)}, // elements
/* external vBias doesn't seems to be accurate.
using the 555 internal values sound better.
@@ -4703,7 +4703,7 @@ void goldnpkr_state::goldnpkr_base(machine_config &config)
screen.set_visarea(0*8, 32*8-1, 0*8, 29*8-1); // From MC6845 init, registers 01 & 06.
screen.set_screen_update(FUNC(goldnpkr_state::screen_update_goldnpkr));
- mc6845_device &crtc(MC6845(config, "crtc", CPU_CLOCK)); // 68B45 or 6845s @ CPU clock
+ mc6845_device &crtc(MC6845(config, "crtc", CPU_CLOCK)); // 68B45 or 6845s @ CPU clock
crtc.set_screen("screen");
crtc.set_show_border_area(false);
crtc.set_char_width(8);
@@ -5109,7 +5109,7 @@ void blitz_state::megadpkr(machine_config &config)
ADDRESS_MAP_BANK(config, "bankdev").set_map(&blitz_state::megadpkr_banked_map).set_data_width(8).set_addr_width(16).set_stride(0x4000);
- M68705P5(config, m_mcu, CPU_CLOCK); // unknown
+ M68705P5(config, m_mcu, CPU_CLOCK); // unknown
m_mcu->portb_w().set(FUNC(blitz_state::mcu_portb_w));
m_mcu->portc_w().set(FUNC(blitz_state::mcu_portc_w));
@@ -5302,7 +5302,7 @@ ROM_END
RB confirmed the dump. There are other games with double sized roms and identical halves.
*/
-ROM_START( pottnpkr ) // golden poker style game. code is intended to start at $6000. is potten's poker the real name?
+ROM_START( pottnpkr ) // golden poker style game. code is intended to start at $6000. is potten's poker the real name?
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "ic13_3.bin", 0x2000, 0x1000, CRC(23c975cd) SHA1(1d32a9ba3aa996287a823558b9d610ab879a29e8) )
ROM_LOAD( "ic14_4.bin", 0x3000, 0x1000, CRC(86a03aab) SHA1(0c4e8699b9fc9943de1fa0a364e043b3878636dc) )
@@ -6416,8 +6416,8 @@ ROM_START( witchcdg )
ROM_LOAD( "1.b1", 0x2000, 0x1000, CRC(8a17d1a7) SHA1(488e4eae287b05923bd6b378574e91cfe49d8c24) ) // cards deck gfx, bitplane3
ROM_REGION( 0x3000, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x2000, 0x00000 ) // filling the R-G bitplanes
- ROM_COPY( "gfx2", 0x2800, 0x2000, 0x0800 ) // srctag, srcoffs, offset, length
+ ROM_FILL( 0x0000, 0x2000, 0x00000 ) // filling the R-G bitplanes
+ ROM_COPY( "gfx2", 0x2800, 0x2000, 0x0800 ) // srctag, srcoffs, offset, length
ROM_REGION( 0x0100, "proms", 0 )
// ROM_LOAD( "82s129.7d", 0x0000, 0x0100, CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) ) // original PCB PROM
@@ -6519,7 +6519,7 @@ ROM_START( witchgme )
ROM_LOAD( "3.5a", 0x2000, 0x1000, CRC(8a17d1a7) SHA1(488e4eae287b05923bd6b378574e91cfe49d8c24) ) // char ROM
ROM_REGION( 0x3000, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x2000, 0x0000 ) // filling the R-G bitplanes
+ ROM_FILL( 0x0000, 0x2000, 0x0000 ) // filling the R-G bitplanes
ROM_COPY( "gfx2", 0x2800, 0x2000, 0x0800 ) // srctag, srcoffs, offset, length
ROM_REGION( 0x0100, "proms", 0 )
@@ -11455,7 +11455,7 @@ ROM_START( pokermon )
ROM_END
ROM_START( pokersis )
- ROM_REGION( 0x10000, "maincpu", 0 ) // seems to contains 4 selectable programs, but vectors lack of sense
+ ROM_REGION( 0x10000, "maincpu", 0 ) // seems to contains 4 selectable programs, but vectors lack of sense
ROM_LOAD( "gsub1.bin", 0x0000, 0x10000, CRC(d585dd64) SHA1(acc371aa8c6c9d1ae784e62eae9c90fd05fad0fc) )
ROM_REGION( 0x18000, "gfx", 0 )
@@ -11507,12 +11507,12 @@ ROM_END
The game looks like a poker game using rockets instead of cards.
But the game also has graphics tiles for 4 characters:
-
+
- pig
- duck
- donkey
- mouse
-
+
Duck and mouse are very close to Disney's characters Donald Duck
and Mickey Mouse.
diff --git a/src/mame/drivers/kas89.cpp b/src/mame/drivers/kas89.cpp
index 1d3739ce375..440568b8ac1 100644
--- a/src/mame/drivers/kas89.cpp
+++ b/src/mame/drivers/kas89.cpp
@@ -274,7 +274,7 @@ void kas89_state::machine_start()
save_item(NAME(m_main_nmi_enable));
save_item(NAME(m_leds_mux_selector));
save_item(NAME(m_leds_mux_data));
- save_item(NAME(m_outdata));
+ save_item(NAME(m_outdata));
}
void kas89_state::machine_reset()
diff --git a/src/mame/drivers/lft_chiptune.cpp b/src/mame/drivers/lft_chiptune.cpp
index 64af0d4fc49..69adc996446 100644
--- a/src/mame/drivers/lft_chiptune.cpp
+++ b/src/mame/drivers/lft_chiptune.cpp
@@ -12,7 +12,7 @@
#include "sound/volt_reg.h"
#include "speaker.h"
-#define MASTER_CLOCK 8000000
+#define MASTER_CLOCK 8000000
class lft_chiptune_state : public driver_device
{
diff --git a/src/mame/drivers/lft_craft.cpp b/src/mame/drivers/lft_craft.cpp
index bcd671bcec7..3069c2172f2 100644
--- a/src/mame/drivers/lft_craft.cpp
+++ b/src/mame/drivers/lft_craft.cpp
@@ -14,7 +14,7 @@
#include "emupal.h"
#include "speaker.h"
-#define MASTER_CLOCK 20000000
+#define MASTER_CLOCK 20000000
#define VISIBLE_CYCLES 480
#define HSYNC_CYCLES 155
diff --git a/src/mame/drivers/lft_phasor.cpp b/src/mame/drivers/lft_phasor.cpp
index 57ad26040f7..11335ca939b 100644
--- a/src/mame/drivers/lft_phasor.cpp
+++ b/src/mame/drivers/lft_phasor.cpp
@@ -14,7 +14,7 @@
#include "emupal.h"
#include "speaker.h"
-#define MASTER_CLOCK 17734470
+#define MASTER_CLOCK 17734470
#define SAMPLES_PER_FRAME (355255)
diff --git a/src/mame/drivers/magicard.cpp b/src/mame/drivers/magicard.cpp
index 7458331d391..c4d741e5b29 100644
--- a/src/mame/drivers/magicard.cpp
+++ b/src/mame/drivers/magicard.cpp
@@ -25,7 +25,7 @@
* Puzzle Me!, Impera, 199?.
* unknown 'TE06', Impera, 199?.
* Lucky 7 (Impera), Impera, 199?.
-
+
*******************************************************************************
@@ -987,7 +987,7 @@ ROM_START( magicardw )
ROM_REGION( 0x80000, "maincpu", 0 ) // 68070 Code & GFX
ROM_LOAD16_WORD_SWAP( "am27c4096.bin", 0x00000, 0x80000, CRC(d9e2a4ec) SHA1(b3000ded242fa25709c90b9b2541c9d1d5cabebb) )
- ROM_REGION( 0x0200, "pic16c54", 0 ) // protected
+ ROM_REGION( 0x0200, "pic16c54", 0 ) // protected
ROM_LOAD("pic16c54a.bin", 0x0000, 0x0200, NO_DUMP )
ROM_END
@@ -1114,14 +1114,14 @@ ROM_START( unkte06 )
ROM_REGION( 0x80000, "maincpu", 0 ) // 68070 Code & GFX
ROM_LOAD16_WORD_SWAP( "m27c4002.bin", 0x00000, 0x80000, CRC(229a504f) SHA1(8033e9b4cb55f2364bf4606375ef9ac05fc715fe) )
- ROM_REGION( 0x0200, "pic16c54", 0 ) // protected
+ ROM_REGION( 0x0200, "pic16c54", 0 ) // protected
ROM_LOAD("pic16c54.bin", 0x0000, 0x0200, NO_DUMP )
ROM_END
/*
Lucky 7
Impera
-
+
*/
ROM_START( lucky7i )
ROM_REGION( 0x80000, "maincpu", 0 ) // 68070 Code & GFX
diff --git a/src/mame/drivers/midvunit.cpp b/src/mame/drivers/midvunit.cpp
index 95396a9125e..491fe61cd28 100644
--- a/src/mame/drivers/midvunit.cpp
+++ b/src/mame/drivers/midvunit.cpp
@@ -1671,7 +1671,7 @@ ROM_END
Some Off Road Challenge PCBs were all EPROMs, most seemed to have mask ROMs for the data ROMs
Mask ROMs have been seen in two formats:
--------------------------------- --------------------------------
+-------------------------------- --------------------------------
| MIDWAY GAMES INC | | MIDWAY GAMES INC |
| OFFROAD CHALLENGE | | OFFROAD CHALLENGE |
) 5341-15511-01 | ) 5341-15510-01 |
diff --git a/src/mame/drivers/midzeus.cpp b/src/mame/drivers/midzeus.cpp
index 578553633bc..360a5978d1c 100644
--- a/src/mame/drivers/midzeus.cpp
+++ b/src/mame/drivers/midzeus.cpp
@@ -41,10 +41,10 @@ The Grid v1.2 10/18/2000
#include "crusnexo.lh"
-#define LOG_FIREWIRE (1 << 1)
-#define LOG_DISK (1 << 2)
-#define LOG_DISK_JR (1 << 3)
-#define LOG_UNKNOWN (1 << 4)
+#define LOG_FIREWIRE (1 << 1)
+#define LOG_DISK (1 << 2)
+#define LOG_DISK_JR (1 << 3)
+#define LOG_UNKNOWN (1 << 4)
#define VERBOSE (LOG_FIREWIRE)
#include "logmacro.h"
@@ -114,9 +114,9 @@ private:
void update_firewire_irq();
- uint32_t m_disk_asic[0x10];
- int m_fw_int_enable;
- int m_fw_int;
+ uint32_t m_disk_asic[0x10];
+ int m_fw_int_enable;
+ int m_fw_int;
required_device<zeus2_device> m_zeus;
required_device<tsb12lv01a_device> m_fw_link;
diff --git a/src/mame/drivers/monkey_king_3b.cpp b/src/mame/drivers/monkey_king_3b.cpp
index 52cefa6447e..e71f1545d46 100644
--- a/src/mame/drivers/monkey_king_3b.cpp
+++ b/src/mame/drivers/monkey_king_3b.cpp
@@ -28,39 +28,39 @@ built-in games, and a SD card for additional games.
The RS-70 is notable for having a debug UART on the USB port
(serial TX on D+, 115200). It prints the following messages on boot:
- EXEC: Executing 'boot' with 0 args (ZLib ON)...
- EXEC: Loading 'boot' at 0x18000000...
- EXEC: Loaded 372272 bytes of 2097152 available.
+ EXEC: Executing 'boot' with 0 args (ZLib ON)...
+ EXEC: Loading 'boot' at 0x18000000...
+ EXEC: Loaded 372272 bytes of 2097152 available.
This is different from the serial output that this emulation model
currently produces. Perhaps one of the unimplemented IO is causing
it to go into some kind of debug mode. The log output produced by
this machine is:
- Modes:0x00000000
- PUT: Setting joystick to mode 0x0, timer to 250us
-
- ******************************************************
- MK FIRMWARE INFORMATION
- Mode: 0xB4
- Build Time: May 8 2019 14:09:21
- CPU Clock: 240MHz
- TFS Start: 0x8070000
- Video Buf: 0x6000000
- Stack Top: 0x3001EE8
- IWRAM Size: 32kB
- EVRAM Size: 16384kB
- Heap Size: 6144kB at 0x18200000
- Video Mode: 0
- Video Size: 1280x720x16bpp
- ******************************************************
+ Modes:0x00000000
+ PUT: Setting joystick to mode 0x0, timer to 250us
+
+ ******************************************************
+ MK FIRMWARE INFORMATION
+ Mode: 0xB4
+ Build Time: May 8 2019 14:09:21
+ CPU Clock: 240MHz
+ TFS Start: 0x8070000
+ Video Buf: 0x6000000
+ Stack Top: 0x3001EE8
+ IWRAM Size: 32kB
+ EVRAM Size: 16384kB
+ Heap Size: 6144kB at 0x18200000
+ Video Mode: 0
+ Video Size: 1280x720x16bpp
+ ******************************************************
There are other strings in the ROM that imply there may be more serial
debug possibilities.
TODO:
- implement everything
- add dumps of more Monkey King systems
+ implement everything
+ add dumps of more Monkey King systems
*/
#include "emu.h"
diff --git a/src/mame/drivers/nes_clone.cpp b/src/mame/drivers/nes_clone.cpp
index 49a90fdfaba..a82a559979d 100644
--- a/src/mame/drivers/nes_clone.cpp
+++ b/src/mame/drivers/nes_clone.cpp
@@ -416,11 +416,11 @@ void nes_clone_vtvppong_state::init_vtvppong()
{
for (int i = 0; i < len; i++)
{
- int newaddr = bitswap<18>(i, 17, 16, 15, 13, 14, 12,
- 11, 10, 9, 8,
- 7, 6, 5, 4,
+ int newaddr = bitswap<18>(i, 17, 16, 15, 13, 14, 12,
+ 11, 10, 9, 8,
+ 7, 6, 5, 4,
3, 2, 1, 0);
-
+
buffer[i] = src[newaddr];
}
std::copy(buffer.begin(), buffer.end(), &src[0]);
diff --git a/src/mame/drivers/nes_sh6578.cpp b/src/mame/drivers/nes_sh6578.cpp
index c40013be320..c23707dfc2e 100644
--- a/src/mame/drivers/nes_sh6578.cpp
+++ b/src/mame/drivers/nes_sh6578.cpp
@@ -5,7 +5,7 @@
SH6578 NES clone hardware
enhanced NES, different to VT / OneBus systems
- "UMC 1997.2 A35551S" on CPU die (maxx6in1)
+ "UMC 1997.2 A35551S" on CPU die (maxx6in1)
video rendering is changed significantly compared to NES so not using NES PPU device
has 256x256 pixel pages, attributes are stored next to tile numbers (not in their own table after them) etc.
diff --git a/src/mame/drivers/raiden_ms.cpp b/src/mame/drivers/raiden_ms.cpp
index 3b279d0dd7c..a5a6f892384 100644
--- a/src/mame/drivers/raiden_ms.cpp
+++ b/src/mame/drivers/raiden_ms.cpp
@@ -482,7 +482,7 @@ void raiden_ms_state::raidenm(machine_config &config)
PALETTE(config, m_palette).set_format(palette_device::xBGR_444, 0x400);
GFXDECODE(config, "gfxdecode", "palette", gfx_raiden_ms);
-
+
GENERIC_LATCH_8(config, m_soundlatch);
/* sound hardware */
diff --git a/src/mame/drivers/seattle.cpp b/src/mame/drivers/seattle.cpp
index ebfb8538386..7d0325355e2 100644
--- a/src/mame/drivers/seattle.cpp
+++ b/src/mame/drivers/seattle.cpp
@@ -755,7 +755,7 @@ const uint8_t seattle_state::translate49[7] = { 0x8, 0xc, 0xe, 0xf, 0x3, 0x1, 0x
*************************************/
CUSTOM_INPUT_MEMBER(seattle_state::blitz_49way_r)
{
- return (translate49[m_io_49way_y[1]->read() >> 4] << 12) | (translate49[m_io_49way_x[1]->read() >> 4] << 8) |
+ return (translate49[m_io_49way_y[1]->read() >> 4] << 12) | (translate49[m_io_49way_x[1]->read() >> 4] << 8) |
(translate49[m_io_49way_y[0]->read() >> 4] << 4) | (translate49[m_io_49way_x[0]->read() >> 4] << 0);
}
diff --git a/src/mame/drivers/spg2xx.cpp b/src/mame/drivers/spg2xx.cpp
index 4f88caa7ed9..d73041cf329 100644
--- a/src/mame/drivers/spg2xx.cpp
+++ b/src/mame/drivers/spg2xx.cpp
@@ -677,7 +677,7 @@ static INPUT_PORTS_START( totspies )
PORT_MODIFY("P2")
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
-
+
// unit also has a 'select' button next to 'OK' and while test mode shows it onscreen too, it doesn't get tested, so probably isn't connected to anything?
PORT_MODIFY("P3")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("OK")
@@ -1782,7 +1782,7 @@ CONS( 2006, ablkickb, 0, 0, ablkickb, ablkickb, spg2xx_game_albkickb_
CONS( 2007, lxspidaj, 0, 0, spg2xx_pal,lxspidaj, spg2xx_game_albkickb_state, init_ablkickb, "Lexibook", "Spider-Man Super TV Air Jet (Lexibook Junior, JG6000SP)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS )
-CONS( 2006, totspies, 0, 0, spg2xx_pal,totspies, spg2xx_game_state, empty_init, "Senario / Marathon - Mystery Animation Inc.", "Totally Spies! (France)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS )
+CONS( 2006, totspies, 0, 0, spg2xx_pal,totspies, spg2xx_game_state, empty_init, "Senario / Marathon - Mystery Animation Inc.", "Totally Spies! (France)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS )
CONS( 2006, fordrace, 0, 0, fordrace, fordrace, spg2xx_game_fordrace_state, empty_init, "Excalibur Electronics", "Ford Racing", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS )
diff --git a/src/mame/drivers/spg2xx_shredmjr.cpp b/src/mame/drivers/spg2xx_shredmjr.cpp
index 3c535dd95a5..f6df4ca0dcb 100644
--- a/src/mame/drivers/spg2xx_shredmjr.cpp
+++ b/src/mame/drivers/spg2xx_shredmjr.cpp
@@ -147,7 +147,7 @@ void shredmjr_game_state::taikeegr(machine_config &config)
{
SPG24X(config, m_maincpu, XTAL(27'000'000), m_screen);
m_maincpu->set_addrmap(AS_PROGRAM, &shredmjr_game_state::mem_map_4m);
-
+
spg2xx_base(config);
m_maincpu->porta_in().set_ioport("P1");
@@ -230,7 +230,7 @@ CONS( 2007, shredmjr, taikeegr, 0, shredmjr, taikeegr, shredmjr_ga
// doesn't have a Senario logo ingame, but does on box.
CONS( 200?, guitarst, 0, 0, taikeegr, taikeegr, shredmjr_game_state, init_taikeegr, "Senario", "Guitar Star (US, Senario, NTSC)", MACHINE_IMPERFECT_TIMING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // ^
-// this one has a different song selection (same as one in the alt undumped Rockstar Guitar / Guitar Rock. It was sold as a different product, so hasn't been set as a clone.
+// this one has a different song selection (same as one in the alt undumped Rockstar Guitar / Guitar Rock. It was sold as a different product, so hasn't been set as a clone.
// Unit found in Ireland "imported by Cathay Product Sourcing Ltd." on the box, with address in Ireland
// ITEM #01109 on instruction sheet, no manufacturer named on either box or instructions
CONS( 200?, guitarstp, 0, 0, taikeegrp, guitarstp,shredmjr_game_state, init_taikeegr, "<unknown>", "Guitar Star (Europe, PAL)", MACHINE_IMPERFECT_TIMING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // ^
diff --git a/src/mame/drivers/spg2xx_wiwi.cpp b/src/mame/drivers/spg2xx_wiwi.cpp
index afcc1124f9f..d1a6b3fe927 100644
--- a/src/mame/drivers/spg2xx_wiwi.cpp
+++ b/src/mame/drivers/spg2xx_wiwi.cpp
@@ -148,7 +148,7 @@ void spg2xx_game_marc250_state::machine_start()
m_pulse_timer2->adjust(attotime::never);
// hack, makes x-racer3 and some others more stable, TODO: find out what is really wrong
- m_maincpu->set_clock_scale(2.0000f);
+ m_maincpu->set_clock_scale(2.0000f);
}
@@ -288,7 +288,7 @@ void spg2xx_game_marc101_state::porta_w(offs_t offset, uint16_t data, uint16_t m
// 00 - wait a while
// 01 - set 0x0400 in port a high
// 02 - clear 0x0400 in port a
- // 07 - measure number of times 0x2000 on port a changes, with min/max acceptable values and a timeout
+ // 07 - measure number of times 0x2000 on port a changes, with min/max acceptable values and a timeout
// ff - failure (causes blank screen / shutdown + inf loop)
if ((data & 0x0400) != (m_prev_porta & 0x0400))
{
@@ -307,7 +307,7 @@ uint16_t spg2xx_game_marc250_state::porta_r()
uint16_t ret = m_io_p1->read() &~ 0x6000;
ret |= m_toggle ? 0x2000 : 0x0000;
ret |= m_toggle2 ? 0x4000 : 0x0000;
-// printf("porta %04x\n", ret);
+// printf("porta %04x\n", ret);
return ret;
}
@@ -681,7 +681,7 @@ void spg2xx_game_marc101_state::portb_w(offs_t offset, uint16_t data, uint16_t m
(mem_mask & 0x0001) ? ((data & 0x0001) ? '1' : '0') : 'x');
}
-
+
if (m_maincpu->pc() < 0x2000)
{
// bit 0x1000 isn't set as an output, but clearly needs to be treated as one
@@ -728,14 +728,14 @@ void spg2xx_game_marc250_state::init_m527()
}
}
-
+
// pass maze road
//rom[((12 * 0x800000) / 2) | 0x0284b5] = 0x0003;
// learn numbers
//rom[((13 * 0x800000) / 2) | 0x00c055] = 0x0003;
// bowling
//rom[((17 * 0x800000) / 2) | 0x015e58] = 0x0003;
- // cliff overhang / gym dancing
+ // cliff overhang / gym dancing
//rom[((18 * 0x800000) / 2) | 0x01cab4] = 0x0003;
rom[((18 * 0x800000) / 2) | 0x021e25] = 0xffff; // secondary 'turn off'
// jump chess
@@ -792,8 +792,8 @@ void spg2xx_game_marc250_state::portb_w(offs_t offset, uint16_t data, uint16_t m
// bank 12 = (used) (doesn't boot)
// bank 13 = (used) (doesn't boot)
// bank 14 = (used) 'ROM 18 64M'
- // bank 15 = (unused) 'ROM 18 64M' (dupe)
-
+ // bank 15 = (unused) 'ROM 18 64M' (dupe)
+
// bank 16 = (used) 'ROM 16 64M' (error)
// bank 17 = (used) (plays music)
// bank 18 = (used) (doesn't boot)
@@ -802,7 +802,7 @@ void spg2xx_game_marc250_state::portb_w(offs_t offset, uint16_t data, uint16_t m
// bank 21 = (used)
// bank 22 = (used)
// bank 23 = (used)
-
+
// bank 24 = (used)
// bank 25 = (used)
// bank 26 = (used)
@@ -886,7 +886,7 @@ ROM_END
ROM_START( marc250 )
ROM_REGION( 0x10000000, "maincpu", ROMREGION_ERASE00 )
ROM_LOAD16_WORD_SWAP( "m527.u6", 0x0000000, 0x10000000, CRC(4b856cab) SHA1(41c66bbdb0bb1442d7e11da18e9e6b20048445ba) )
-ROM_END
+ROM_END
ROM_START( guitrbus )
ROM_REGION( 0x800000, "maincpu", ROMREGION_ERASE00 )
diff --git a/src/mame/drivers/splash_ms.cpp b/src/mame/drivers/splash_ms.cpp
index 143710bed45..ac4c1e33ba4 100644
--- a/src/mame/drivers/splash_ms.cpp
+++ b/src/mame/drivers/splash_ms.cpp
@@ -2,7 +2,7 @@
// copyright-holders:David Haywood
/*
- Splash (Modular System)
+ Splash (Modular System)
*/
@@ -103,7 +103,7 @@ private:
void subrambank_map(address_map& map);
void subrombank_map(address_map& map);
-
+
void descramble_16x16tiles(uint8_t* src, int len);
};
@@ -118,13 +118,13 @@ uint16_t splashms_state::unknown_0x40000c_r()
void splashms_state::sub_rambankselect_w(uint8_t data)
{
-// logerror("sub_rambankselect_w %02x\n", data);
+// logerror("sub_rambankselect_w %02x\n", data);
m_subram->set_bank(data&0x7);
}
void splashms_state::sub_rombankselect_w(uint8_t data)
{
-// logerror("sub_rombankselect_w %02x\n", data);
+// logerror("sub_rombankselect_w %02x\n", data);
m_subrom->set_bank(data & 0x7f);
}
@@ -180,7 +180,7 @@ TILE_GET_INFO_MEMBER(splashms_state::get_tile_info_tilemap2)
uint32_t splashms_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
-// bitmap.fill(0, cliprect);
+// bitmap.fill(0, cliprect);
for (int y = 0; y < 256; y++)
{
@@ -305,7 +305,7 @@ void splashms_state::sound_map(address_map &map)
map(0xe800, 0xe801).rw("ymsnd", FUNC(ym3812_device::read), FUNC(ym3812_device::write));
map(0xf000, 0xf7ff).ram();
- map(0xf800, 0xf800).r(m_soundlatch, FUNC(generic_latch_8_device::read));
+ map(0xf800, 0xf800).r(m_soundlatch, FUNC(generic_latch_8_device::read));
}
void splashms_state::machine_start()
@@ -468,7 +468,7 @@ void splashms_state::splashms(machine_config &config)
Z80(config, m_soundcpu, 16_MHz_XTAL/4);
m_soundcpu->set_addrmap(AS_PROGRAM, &splashms_state::sound_map);
- m_soundcpu->set_periodic_int(FUNC(splashms_state::nmi_line_pulse), attotime::from_hz(60*64));
+ m_soundcpu->set_periodic_int(FUNC(splashms_state::nmi_line_pulse), attotime::from_hz(60*64));
/* video hardware */
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
@@ -540,8 +540,8 @@ ROM_START( splashms )
ROM_LOAD32_BYTE( "8_sp_837.ic37", 0x000000, 0x010000, CRC(3b544131) SHA1(e7fd97cb24b84739f2481efb1d232f86df4a3d8d) ) // 1xxxxxxxxxxxxxxx = 0xFF
ROM_LOAD32_BYTE( "8_sp_830.ic30", 0x000001, 0x010000, CRC(09bb675b) SHA1(49c41ccfce1b0077c430c6bb38bc858aeaf87fb8) ) // has some garbage in the blank space of the paired ROMs
ROM_LOAD32_BYTE( "8_sp_822.ic22", 0x000002, 0x010000, CRC(621fcf26) SHA1(a7ff6b12fbbea1bba7c4a397a82ac2fb5c09558a) ) // 1xxxxxxxxxxxxxxx = 0xFF
- ROM_LOAD32_BYTE( "8_sp_815.ic15", 0x000003, 0x010000, CRC(5641b621) SHA1(e71df1ab5c9b2254495d99657477b52e8843d128) ) // 1xxxxxxxxxxxxxxx = 0xFF
-
+ ROM_LOAD32_BYTE( "8_sp_815.ic15", 0x000003, 0x010000, CRC(5641b621) SHA1(e71df1ab5c9b2254495d99657477b52e8843d128) ) // 1xxxxxxxxxxxxxxx = 0xFF
+
ROM_REGION( 0x080000, "sprites", ROMREGION_ERASEFF | ROMREGION_INVERT )
ROM_LOAD32_BYTE( "5-1_sp_524.ic24", 0x000000, 0x010000, CRC(841c24c1) SHA1(70cb26033999f8184c51849e00bfcb2270f646e8) )
ROM_LOAD32_BYTE( "5-1_sp_518.ic18", 0x000001, 0x010000, CRC(499cb813) SHA1(4d22e58530ff8a85b7ffc8ae1ab5986215986b49) )
diff --git a/src/mame/drivers/truco.cpp b/src/mame/drivers/truco.cpp
index c0fbc04db37..06a5f83e87b 100644
--- a/src/mame/drivers/truco.cpp
+++ b/src/mame/drivers/truco.cpp
@@ -204,9 +204,9 @@
#include "speaker.h"
-#define MASTER_CLOCK XTAL(12'000'000) // confirmed
-#define CPU_CLOCK (MASTER_CLOCK/16) // guess
-#define CRTC_CLOCK (MASTER_CLOCK/8) // guess
+#define MASTER_CLOCK XTAL(12'000'000) // confirmed
+#define CPU_CLOCK (MASTER_CLOCK/16) // guess
+#define CRTC_CLOCK (MASTER_CLOCK/8) // guess
/*******************************************
@@ -233,7 +233,7 @@ WRITE_LINE_MEMBER(truco_state::pia_ca2_w)
void truco_state::portb_w(uint8_t data)
{
- m_dac->write(BIT(data, 7)); // Isolated the bit for Delta-Sigma DAC
+ m_dac->write(BIT(data, 7)); // Isolated the bit for Delta-Sigma DAC
if (data & 0x7f)
logerror("Port B writes: %2x\n", data);
@@ -256,9 +256,9 @@ WRITE_LINE_MEMBER(truco_state::pia_irqb_w)
void truco_state::main_map(address_map &map)
{
- map(0x0000, 0x17ff).ram(); // General purpose RAM
- map(0x1800, 0x7bff).ram().share("videoram"); // Video RAM
- map(0x7c00, 0x7fff).ram().share("battery_ram"); // Battery backed RAM
+ map(0x0000, 0x17ff).ram(); // General purpose RAM
+ map(0x1800, 0x7bff).ram().share("videoram"); // Video RAM
+ map(0x7c00, 0x7fff).ram().share("battery_ram"); // Battery backed RAM
map(0x8000, 0x8003).rw("pia0", FUNC(pia6821_device::read), FUNC(pia6821_device::write));
map(0x8004, 0x8004).w("crtc", FUNC(mc6845_device::address_w));
map(0x8005, 0x8005).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w));
@@ -266,7 +266,7 @@ void truco_state::main_map(address_map &map)
}
/*
CRTC MC6845 initialization routine at $a506 only set the first 14 registers (data at $a4e2)
-
+
Register: 00 01 02 03 04 05 06 07 08 09 10 11 12 13
Value: 0x5f 0x40 0x4d 0x06 0x0f 0x04 0x0c 0x0e 0x00 0x0f 0x00 0x00 0x00 0xc0
@@ -278,17 +278,17 @@ void truco_state::main_map(address_map &map)
*******************************************/
static INPUT_PORTS_START( truco )
- PORT_START("P1") // IN0
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // Connected to JAMMA S17 (P2 START)
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) // Connected to JAMMA S14 (SERVICE SW)
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) // Connected to JAMMA C26 (P2 SELECT)
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) // Connected to JAMMA S16 (COIN2)
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) // Connected to JAMMA S15 (TILT SW)
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) // Connected to JAMMA C22 (P1 BUTTON1)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) // Connected to JAMMA C18/21 (JOY UP & JOY RIGHT)
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) // Connected to JAMMA C19/20 (JOY DOWN & JOY LEFT)
-
- PORT_START("COIN") // IN1
+ PORT_START("P1") // IN0
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // Connected to JAMMA S17 (P2 START)
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) // Connected to JAMMA S14 (SERVICE SW)
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) // Connected to JAMMA C26 (P2 SELECT)
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) // Connected to JAMMA S16 (COIN2)
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) // Connected to JAMMA S15 (TILT SW)
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) // Connected to JAMMA C22 (P1 BUTTON1)
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) // Connected to JAMMA C18/21 (JOY UP & JOY RIGHT)
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) // Connected to JAMMA C19/20 (JOY DOWN & JOY LEFT)
+
+ PORT_START("COIN") // IN1
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -298,7 +298,7 @@ static INPUT_PORTS_START( truco )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("JMPRS") // JP1-2
+ PORT_START("JMPRS") // JP1-2
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING ( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING ( 0x00, DEF_STR( On ) )
@@ -397,7 +397,7 @@ void truco_state::truco(machine_config &config)
m_maincpu->set_addrmap(AS_PROGRAM, &truco_state::main_map);
m_maincpu->set_vblank_int("screen", FUNC(truco_state::interrupt));
- WATCHDOG_TIMER(config, m_watchdog).set_time(attotime::from_msec(1600)); // 1.6 seconds
+ WATCHDOG_TIMER(config, m_watchdog).set_time(attotime::from_msec(1600)); // 1.6 seconds
pia6821_device &pia(PIA6821(config, "pia0", 0));
pia.readpa_handler().set_ioport("P1");
@@ -411,14 +411,14 @@ void truco_state::truco(machine_config &config)
// video hardware
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_refresh_hz(60);
- screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // not accurate
+ screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // not accurate
screen.set_size(256, 192);
screen.set_visarea(0, 256-1, 0, 192-1);
screen.set_screen_update(FUNC(truco_state::screen_update));
PALETTE(config, "palette", FUNC(truco_state::truco_palette), 16);
- mc6845_device &crtc(MC6845(config, "crtc", CRTC_CLOCK)); // identified as UM6845
+ mc6845_device &crtc(MC6845(config, "crtc", CRTC_CLOCK)); // identified as UM6845
crtc.set_screen("screen");
crtc.set_show_border_area(false);
crtc.set_char_width(4);
diff --git a/src/mame/drivers/vegas.cpp b/src/mame/drivers/vegas.cpp
index d0f998a7073..4d6cb50bb6f 100644
--- a/src/mame/drivers/vegas.cpp
+++ b/src/mame/drivers/vegas.cpp
@@ -1138,8 +1138,8 @@ CUSTOM_INPUT_MEMBER(vegas_state::gauntleg_p12_r)
}
else {
// 49 way joysticks
- return (translate49[m_io_49way_x[1]->read() >> 4] << 12) | (translate49[m_io_49way_y[1]->read() >> 4] << 8) |
- (translate49[m_io_49way_x[0]->read() >> 4] << 4) | (translate49[m_io_49way_y[0]->read() >> 4] << 0);
+ return (translate49[m_io_49way_x[1]->read() >> 4] << 12) | (translate49[m_io_49way_y[1]->read() >> 4] << 8) |
+ (translate49[m_io_49way_x[0]->read() >> 4] << 4) | (translate49[m_io_49way_y[0]->read() >> 4] << 0);
}
}
@@ -1154,8 +1154,8 @@ CUSTOM_INPUT_MEMBER(vegas_state::gauntleg_p34_r)
}
else {
// 49 way joysticks
- return (translate49[m_io_49way_x[3]->read() >> 4] << 12) | (translate49[m_io_49way_y[3]->read() >> 4] << 8) |
- (translate49[m_io_49way_x[2]->read() >> 4] << 4) | (translate49[m_io_49way_y[2]->read() >> 4] << 0);
+ return (translate49[m_io_49way_x[3]->read() >> 4] << 12) | (translate49[m_io_49way_y[3]->read() >> 4] << 8) |
+ (translate49[m_io_49way_x[2]->read() >> 4] << 4) | (translate49[m_io_49way_y[2]->read() >> 4] << 0);
}
}
diff --git a/src/mame/drivers/vsmile.cpp b/src/mame/drivers/vsmile.cpp
index 579640f37e3..0c70b1f1f48 100644
--- a/src/mame/drivers/vsmile.cpp
+++ b/src/mame/drivers/vsmile.cpp
@@ -333,10 +333,10 @@ ROM_START( vsmilem )
/* This ROM doesn't show the 'Motion' logo at all, but was dumped from a Motion unit
- Console says "Vtech V.Smile V-motion Active Learning System"
- "FCC ID 62R-0788, IC 1135D-0788" "53-36600-056-080"
- melted into plastic "VT8281"
- The PCB has the code 35-078800-001-103_708979-2.
+ Console says "Vtech V.Smile V-motion Active Learning System"
+ "FCC ID 62R-0788, IC 1135D-0788" "53-36600-056-080"
+ melted into plastic "VT8281"
+ The PCB has the code 35-078800-001-103_708979-2.
*/
ROM_SYSTEM_BIOS( 1, "bios1", "bios1" )
ROMX_LOAD( "vmotionbios.bin", 0x000000, 0x200000, CRC(427087ea) SHA1(dc9eaa55f4a0047b6069ef73beea86d26f0f5394), ROM_GROUPWORD | ROM_REVERSE | ROM_BIOS(1) ) // from a US unit
diff --git a/src/mame/drivers/vt1682.cpp b/src/mame/drivers/vt1682.cpp
index 55dd427925b..edcefb1d3a3 100644
--- a/src/mame/drivers/vt1682.cpp
+++ b/src/mame/drivers/vt1682.cpp
@@ -6130,7 +6130,7 @@ CONS( 200?, itvg48, exsprt48, 0, vt1682_exsportp, exsprt48, vt1682_exspo
// This has a different selection of games to the above, Dancing as extra under Music, Doesn't have Poker under Brain, Ball Shoot instead of 'Noshery' under Arcade
// imported by Cathay Product Sourcing Ltd. (Ireland) no other manufacturer information on box, not sure if Xing is name of manufacturer or product
-CONS( 200?, xing48, 0, 0, vt1682_exsportp, exsprt48, vt1682_exsport_state, regular_init, "Xing", "Xing Wireless Interactive TV Game 'Wi TV Zone' 48-in-1 (Europe, PAL)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // ^
+CONS( 200?, xing48, 0, 0, vt1682_exsportp, exsprt48, vt1682_exsport_state, regular_init, "Xing", "Xing Wireless Interactive TV Game 'Wi TV Zone' 48-in-1 (Europe, PAL)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // ^
/*
The above was also released in the US as Excite Sports Wireless Interactive TV Game - 48-in-1 with an almost identical box to exsprt48 unit, but with the different games noted.
diff --git a/src/mame/includes/midzeus.h b/src/mame/includes/midzeus.h
index 23846f75bf9..07c3ea11870 100644
--- a/src/mame/includes/midzeus.h
+++ b/src/mame/includes/midzeus.h
@@ -149,20 +149,20 @@ protected:
optional_ioport m_io_keypad;
output_finder<7> m_digits;
- emu_timer * m_display_irq_off_timer;
- uint8_t m_crusnexo_leds_select;
- uint32_t m_disk_asic_jr[0x10];
+ emu_timer * m_display_irq_off_timer;
+ uint8_t m_crusnexo_leds_select;
+ uint32_t m_disk_asic_jr[0x10];
- uint8_t m_cmos_protected;
+ uint8_t m_cmos_protected;
- emu_timer * m_timer[2];
+ emu_timer * m_timer[2];
private:
- uint32_t m_gun_control;
- uint8_t m_gun_irq_state;
- emu_timer * m_gun_timer[2];
- int32_t m_gun_x[2], m_gun_y[2];
- uint8_t m_keypad_select;
+ uint32_t m_gun_control;
+ uint8_t m_gun_irq_state;
+ emu_timer * m_gun_timer[2];
+ int32_t m_gun_x[2], m_gun_y[2];
+ uint8_t m_keypad_select;
void exit_handler();
void zeus_pointer_w(uint32_t which, uint32_t data, bool logit);
@@ -186,22 +186,22 @@ private:
void waveram_plot_check_depth_nowrite(int y, int x, uint16_t color, uint16_t depth);
std::unique_ptr<midzeus_renderer> m_poly;
- uint8_t m_log_fifo;
-
- uint32_t m_zeus_fifo[20];
- uint8_t m_zeus_fifo_words;
- int16_t m_zeus_matrix[3][3];
- int32_t m_zeus_point[3];
- int16_t m_zeus_light[3];
- void * m_zeus_renderbase;
- uint32_t m_zeus_palbase;
- uint32_t m_zeus_unkbase;
- int m_zeus_enable_logging;
- uint32_t m_zeus_objdata;
- rectangle m_zeus_cliprect;
+ uint8_t m_log_fifo;
+
+ uint32_t m_zeus_fifo[20];
+ uint8_t m_zeus_fifo_words;
+ int16_t m_zeus_matrix[3][3];
+ int32_t m_zeus_point[3];
+ int16_t m_zeus_light[3];
+ void * m_zeus_renderbase;
+ uint32_t m_zeus_palbase;
+ uint32_t m_zeus_unkbase;
+ int m_zeus_enable_logging;
+ uint32_t m_zeus_objdata;
+ rectangle m_zeus_cliprect;
std::unique_ptr<uint32_t[]> m_waveram[2];
- int m_yoffs;
- int m_texel_width;
- int m_is_mk4b;
+ int m_yoffs;
+ int m_texel_width;
+ int m_is_mk4b;
};
diff --git a/src/mame/layout/v4addlad.lay b/src/mame/layout/v4addlad.lay
index 9bd175d578e..56a5cc62ee1 100644
--- a/src/mame/layout/v4addlad.lay
+++ b/src/mame/layout/v4addlad.lay
@@ -496,7 +496,7 @@ license:CC0
</bezel>
<bezel name="LADDER" element="LADDER">
<bounds x="127" y="142" width="16" height="16" />
- </bezel>
+ </bezel>
<bezel name="lamp126" element="matrixlamp" state="0">
<bounds x="145" y="140" width="20" height="20"/>
</bezel>
diff --git a/src/mame/layout/v4barqst.lay b/src/mame/layout/v4barqst.lay
index 00019edd5e7..ad4b757d79e 100644
--- a/src/mame/layout/v4barqst.lay
+++ b/src/mame/layout/v4barqst.lay
@@ -304,7 +304,7 @@ license:CC0
<bounds x="2" y="2" width="16" height="8" />
</text>
</element>
-
+
<element name="START" defstate="0">
<rect state ="0">
<bounds x="0" y="0" width="20" height="10" />
diff --git a/src/mame/layout/v4strike.lay b/src/mame/layout/v4strike.lay
index 8bee59426e9..bd0ca8b8633 100644
--- a/src/mame/layout/v4strike.lay
+++ b/src/mame/layout/v4strike.lay
@@ -201,7 +201,7 @@ license:CC0
<bounds x="0" y="0" width="16" height="8" />
</text>
</element>
-
+
<element name="COLLECT" defstate="0">
<rect state ="0">
<bounds x="0" y="0" width="16" height="10" />
@@ -452,14 +452,14 @@ license:CC0
<bezel name="lamp51" element="FREEZE" inputtag="ORANGE1" inputmask="0x10">
<bounds x="250" y="560" width="50" height="50" />
</bezel>
-
+
<bezel name="lamp35" element="GO" inputtag="ORANGE1" inputmask="0x40">
<bounds x="300" y="560" width="50" height="50" />
</bezel>
-
+
<screen index="0">
<bounds x="50" y="260" width="504" height="296" />
</screen>
-
+
</view>
</mamelayout>
diff --git a/src/mame/machine/mpu4.cpp b/src/mame/machine/mpu4.cpp
index bdac4337faf..c6de7de46a4 100644
--- a/src/mame/machine/mpu4.cpp
+++ b/src/mame/machine/mpu4.cpp
@@ -23,7 +23,7 @@
This is the core driver, no video specific stuff should go in here.
This driver holds all the mechanical games.
- Old logs shown here from pre-GIT days:
+ Old logs shown here from pre-GIT days:
06-2011: Fixed boneheaded interface glitch that was causing samples to not be cancelled correctly.
Added the ability to read each segment of an LED display separately, this may be necessary for some
games that use them as surrogate lamp lines.
@@ -253,7 +253,7 @@ TODO: - Distinguish door switches using manual
- Complete stubs for hoppers (needs slightly better 68681 emulation, and new 'hoppers' device emulation)
- It seems that the MPU4 core program relies on some degree of persistence when switching strobes and handling
writes to the various hardware ports. This explains the occasional lamping/LED blackout and switching bugs.
- Ideally, this needs converting to the PWM device, but that will be a complex job with this many outputs.
+ Ideally, this needs converting to the PWM device, but that will be a complex job with this many outputs.
- Fix BwB characteriser, need to be able to calculate stabiliser bytes. Anyone fancy reading 6809 source?
- Strange bug in Andy's Great Escape - Mystery nudge sound effect is not played, mpu4 latches in silence instead (?)
@@ -353,7 +353,7 @@ void mpu4_state::led_write_extender(int latch, int data, int starting_column)
int diff,i,j, ext_strobe;
diff = (latch ^ m_last_latch) & latch;
- ext_strobe = (7 - starting_column) * 8;
+ ext_strobe = (7 - starting_column) * 8;
data = ~data;//invert drive lines
for (i=0; i<5; i++)
@@ -1031,7 +1031,7 @@ void mpu4_state::pia_ic5_portb_w(uint8_t data)
{
m_mpu4leds[( ( (7 - m_input_strobe) + 8) << 3) | i] = BIT(m_pia4->a_output(), i);
}
- m_digits[(7 - m_input_strobe) + 8] = m_pia4->a_output();
+ m_digits[(7 - m_input_strobe) + 8] = m_pia4->a_output();
}
m_led_strobe = m_input_strobe;
}
@@ -1599,9 +1599,9 @@ INPUT_PORTS_START( mpu4 )
PORT_START("AUX2")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_CUSTOM) //Lockouts, in same order as below
- PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_CUSTOM)
- PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_CUSTOM)
- PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_CUSTOM)
+ PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_CUSTOM)
+ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_CUSTOM)
+ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_CUSTOM)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("10p")//PORT_IMPULSE(5)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_COIN2) PORT_NAME("20p")//PORT_IMPULSE(5)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_COIN3) PORT_NAME("50p")//PORT_IMPULSE(5)
diff --git a/src/mame/video/pgm.cpp b/src/mame/video/pgm.cpp
index 4877fe43e69..28b579390e1 100644
--- a/src/mame/video/pgm.cpp
+++ b/src/mame/video/pgm.cpp
@@ -489,28 +489,28 @@ void pgm_state::draw_sprites(bitmap_ind16& spritebitmap, const rectangle &clipre
}
/*
- Sprite list format (10 bytes per sprites, 256 entries)
-
- Offset Bits
- fedcba98 76543210
- 00 x------- -------- Horizontal Zoom/Shrink mode select
- -xxxx--- -------- Horizontal Zoom/Shrink table select
- -----xxx xxxxxxxx X position (11 bit signed)
-
- 02 x------- -------- Vertical Zoom/Shrink mode select
- -xxxx--- -------- Vertical Zoom/Shrink table select
- -----xxx xxxxxxxx Y position (10 bit signed)
-
- 04 -x------ -------- Flip Y
- --x----- -------- Flip X
- ---xxxxx -------- Palette select (32 color each)
- -------- x------- Priority (Over(0) or Under(1) background)
- -------- -xxxxxxx Sprite mask ROM address MSB
- 06 xxxxxxxx xxxxxxxx Sprite mask ROM address LSB
-
- 08 x------- -------- Another sprite width bit?
- -xxxxxx- -------- Sprite width (16 pixel each)
- -------x xxxxxxxx Sprite height (1 pixel each)
+ Sprite list format (10 bytes per sprites, 256 entries)
+
+ Offset Bits
+ fedcba98 76543210
+ 00 x------- -------- Horizontal Zoom/Shrink mode select
+ -xxxx--- -------- Horizontal Zoom/Shrink table select
+ -----xxx xxxxxxxx X position (11 bit signed)
+
+ 02 x------- -------- Vertical Zoom/Shrink mode select
+ -xxxx--- -------- Vertical Zoom/Shrink table select
+ -----xxx xxxxxxxx Y position (10 bit signed)
+
+ 04 -x------ -------- Flip Y
+ --x----- -------- Flip X
+ ---xxxxx -------- Palette select (32 color each)
+ -------- x------- Priority (Over(0) or Under(1) background)
+ -------- -xxxxxxx Sprite mask ROM address MSB
+ 06 xxxxxxxx xxxxxxxx Sprite mask ROM address LSB
+
+ 08 x------- -------- Another sprite width bit?
+ -xxxxxx- -------- Sprite width (16 pixel each)
+ -------x xxxxxxxx Sprite height (1 pixel each)
*/
void pgm_state::get_sprites()
diff --git a/src/mame/video/xmen.cpp b/src/mame/video/xmen.cpp
index 63fcc8c640d..929d5b76cde 100644
--- a/src/mame/video/xmen.cpp
+++ b/src/mame/video/xmen.cpp
@@ -96,7 +96,7 @@ uint32_t xmen_state::screen_update_xmen(screen_device &screen, bitmap_ind16 &bit
m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[2], 0, 4);
/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
- pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
+ pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
m_k053246->k053247_sprites_draw( bitmap, cliprect);
return 0;
}
@@ -186,7 +186,7 @@ WRITE_LINE_MEMBER(xmen_state::screen_vblank_xmen6p)
m_k052109->tilemap_draw(*m_screen, *renderbitmap, cliprect, layer[2], 0, 4);
/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
- pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
+ pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
m_k053246->k053247_sprites_draw(*renderbitmap, cliprect);
}
}