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author Happy <Happy-yappH@users.noreply.github.com>2016-04-26 10:12:50 -0600
committer Happy <Happy-yappH@users.noreply.github.com>2016-04-26 10:12:50 -0600
commitbf30f129493bbe3435152c31cbe7d11125b42fa5 (patch)
tree7082634819e8d45ba9b241aa9711870f4433deea
parentdc85827687c02ebaa218aa3f2c127a3d4110e6fb (diff)
N64: Do SI dma transfer after delay, not before
-rw-r--r--src/mame/includes/n64.h1
-rw-r--r--src/mame/machine/n64.cpp26
2 files changed, 18 insertions, 9 deletions
diff --git a/src/mame/includes/n64.h b/src/mame/includes/n64.h
index d22df5fa7e4..c6114bf3707 100644
--- a/src/mame/includes/n64.h
+++ b/src/mame/includes/n64.h
@@ -284,6 +284,7 @@ private:
UINT32 si_pif_addr_rd64b;
UINT32 si_pif_addr_wr64b;
UINT32 si_status;
+ UINT32 si_dma_dir;
UINT32 cic_status;
int cic_type;
diff --git a/src/mame/machine/n64.cpp b/src/mame/machine/n64.cpp
index 4da96fb2516..734f76359ba 100644
--- a/src/mame/machine/n64.cpp
+++ b/src/mame/machine/n64.cpp
@@ -212,6 +212,7 @@ void n64_periphs::device_reset()
si_dram_addr = 0;
si_pif_addr = 0;
si_status = 0;
+ si_dma_dir = 0;
si_dma_timer->adjust(attotime::never);
//memset(m_save_data.eeprom, 0, 2048);
@@ -2082,6 +2083,7 @@ TIMER_CALLBACK_MEMBER(n64_periphs::si_dma_callback)
void n64_periphs::si_dma_tick()
{
si_dma_timer->adjust(attotime::never);
+ pif_dma(si_dma_dir);
si_status = 0;
si_status |= 0x1000;
signal_rcp_interrupt(SI_INTERRUPT);
@@ -2089,11 +2091,6 @@ void n64_periphs::si_dma_tick()
void n64_periphs::pif_dma(int direction)
{
- if(si_status & 1)
- {
- si_status |= 8; //DMA Error, overlapping request
- return; // SI Busy, ignore request
- }
if (!DWORD_ALIGNED(si_dram_addr))
{
fatalerror("pif_dma: si_dram_addr unaligned: %08X\n", si_dram_addr);
@@ -2131,8 +2128,6 @@ void n64_periphs::pif_dma(int direction)
*dst++ = d;
}
}
- si_status |= 1;
- si_dma_timer->adjust(attotime::from_hz(50000));
}
READ32_MEMBER( n64_periphs::si_reg_r )
@@ -2160,16 +2155,29 @@ WRITE32_MEMBER( n64_periphs::si_reg_w )
case 0x04/4: // SI_PIF_ADDR_RD64B_REG
// PIF RAM -> RDRAM
+ if(si_status & 1)
+ {
+ si_status |= 8; //DMA Error, overlapping request
+ return; // SI Busy, ignore request
+ }
si_pif_addr = data;
si_pif_addr_rd64b = data;
- pif_dma(0);
+ si_dma_dir = 0;
+ si_status |= 1;
+ si_dma_timer->adjust(attotime::from_hz(50000));
break;
case 0x10/4: // SI_PIF_ADDR_WR64B_REG
// RDRAM -> PIF RAM
+ if(si_status & 1)
+ {
+ si_status |= 8; //DMA Error, overlapping request
+ return; // SI Busy, ignore request
+ }
si_pif_addr = data;
si_pif_addr_wr64b = data;
- pif_dma(1);
+ si_dma_dir = 1;
+ si_dma_timer->adjust(attotime::from_hz(50000));
break;
case 0x18/4: // SI_STATUS_REG