diff options
author | David Haywood <mamehaze@users.noreply.github.com> | 2016-01-25 18:05:13 +0000 |
---|---|---|
committer | David Haywood <mamehaze@users.noreply.github.com> | 2016-01-25 18:05:13 +0000 |
commit | 15cf85a9c454253790c124b40c7e12f5c15f5759 (patch) | |
tree | 6c0537727841bcb3137a5410c56d69bc9ca699dc | |
parent | ede3734086a6b488ca4f1899f648865a3d380d42 (diff) |
apply: 27c27
(MESS) CPUID.ASM (Bob Smith 1985) suggests that in situations where
m_no_interrupt is 1, (directly after POP SS / MOV_SREG), single step
IRQs don't fire. [Karl-Ludwig Deisenhofer]
-rw-r--r-- | src/devices/cpu/i86/i86.cpp | 27 |
1 files changed, 16 insertions, 11 deletions
diff --git a/src/devices/cpu/i86/i86.cpp b/src/devices/cpu/i86/i86.cpp index cffe2793516..398d93ee987 100644 --- a/src/devices/cpu/i86/i86.cpp +++ b/src/devices/cpu/i86/i86.cpp @@ -144,7 +144,7 @@ void i8086_cpu_device::execute_run() m_seg_prefix = false; /* Dispatch IRQ */ - if ( m_pending_irq && m_no_interrupt == 0 ) + if ( m_pending_irq && (m_no_interrupt == 0) ) { if ( m_pending_irq & NMI_IRQ ) { @@ -159,25 +159,29 @@ void i8086_cpu_device::execute_run() } } - /* No interrupt allowed between last instruction and this one */ - if ( m_no_interrupt ) + /* Trap should allow one instruction to be executed. + CPUID.ASM (by Bob Smith, 1985) suggests that in situations where m_no_interrupt is 1, + (directly after POP SS / MOV_SREG), single step IRQs don't fire. + */ + if (m_fire_trap ) { - m_no_interrupt--; - } - - /* trap should allow one instruction to be executed */ - if ( m_fire_trap ) - { - if ( m_fire_trap >= 2 ) + if ( (m_fire_trap >= 2) && (m_no_interrupt == 0) ) { + m_fire_trap = 0; // reset trap flag upon entry interrupt(1); - m_fire_trap = 0; } else { m_fire_trap++; } } + + /* No interrupt allowed between last instruction and this one */ + if ( m_no_interrupt ) + { + m_no_interrupt--; + } + } if (!m_seg_prefix) @@ -1404,6 +1408,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op) m_src = GetRMWord(); m_sregs[(m_modrm & 0x18) >> 3] = m_src; // confirmed on hw: modrm bit 5 ignored CLKM(MOV_SR,MOV_SM); + m_no_interrupt = 1; // Disable IRQ after load segment register. break; case 0x8f: // i_popw |