diff options
author | Michael Zapf <michael.zapf@mizapf.de> | 2012-07-13 15:38:14 +0000 |
---|---|---|
committer | Michael Zapf <michael.zapf@mizapf.de> | 2012-07-13 15:38:14 +0000 |
commit | 3e007ff52b34ce299a7308fefcefceee9186e00c (patch) | |
tree | eccbb11774be41cf04b3c547a7dd64d1498fc0fb | |
parent | 7ac6205fbbfa319c6e4627ea14198de8f5f805b2 (diff) |
tms99xx: Status register parity bit handling was missing in some commands [Michael Zapf] (nw)
-rw-r--r-- | src/emu/cpu/tms9900/tms9900.c | 8 | ||||
-rw-r--r-- | src/emu/cpu/tms9900/tms9995.c | 9 |
2 files changed, 13 insertions, 4 deletions
diff --git a/src/emu/cpu/tms9900/tms9900.c b/src/emu/cpu/tms9900/tms9900.c index ddfb2fac148..5a96920eac3 100644 --- a/src/emu/cpu/tms9900/tms9900.c +++ b/src/emu/cpu/tms9900/tms9900.c @@ -1928,7 +1928,7 @@ void tms99xx_device::alu_xop() m_address = 0x0040 + ((IR >> 4) & 0x003c); break; case 1: - m_value = WP; // save the old WP + m_value_copy = WP; // save the old WP WP = m_current_value & m_prgaddr_mask; // the new WP has been read in the previous microoperation m_current_value = m_address_saved; // we saved the address of the source operand; retrieve it m_address = WP + 0x0016; // Next register is R11 @@ -1943,7 +1943,7 @@ void tms99xx_device::alu_xop() break; case 4: m_address = WP + 0x001a; - m_current_value = m_value; // old WP into new R13 + m_current_value = m_value_copy; // old WP into new R13 break; case 5: m_address = 0x0042 + ((IR >> 4) & 0x003c); // location of new PC @@ -1984,7 +1984,7 @@ void tms99xx_device::alu_clr_swpb() check_ov = false; break; case NEG: - // LAEO + // LAECO // Overflow occurs for value=0x8000 dest_new = ((~src_val) & 0x0000ffff) + 1; check_ov = false; @@ -2044,7 +2044,7 @@ void tms99xx_device::alu_abs() if ((m_current_value & 0x8000)!=0) { - m_current_value = (-m_current_value) & 0xffff; + m_current_value = (((~m_current_value) & 0x0000ffff) + 1) & 0xffff; pulse_clock(2); // If ABS is performed it takes one machine cycle more } else diff --git a/src/emu/cpu/tms9900/tms9995.c b/src/emu/cpu/tms9900/tms9995.c index 650dd2ae615..46f118161de 100644 --- a/src/emu/cpu/tms9900/tms9995.c +++ b/src/emu/cpu/tms9900/tms9995.c @@ -2261,6 +2261,10 @@ void tms9995_device::alu_c() // value in m_current_value // The destination address is still in m_address // Prefetch will not change m_current_value and m_address + if (m_instruction->byteop) + { + set_status_parity((UINT8)(m_source_value>>8)); + } compare_and_set_lae(m_source_value, m_current_value); if (VERBOSE>7) LOG("tms9995: ST = %04x (val1=%04x, val2=%04x)\n", ST, m_source_value, m_current_value); } @@ -2759,6 +2763,10 @@ void tms9995_device::alu_lst_lwp() void tms9995_device::alu_mov() { m_current_value = m_source_value; + if (m_instruction->byteop) + { + set_status_parity((UINT8)(m_current_value>>8)); + } compare_and_set_lae(m_current_value, 0); if (VERBOSE>7) LOG("tms9995: ST = %04x (val=%04x)\n", ST, m_current_value); // No clock pulse, as next instruction is prefetch @@ -2971,6 +2979,7 @@ void tms9995_device::alu_single_arithm() // O if >8000 // C is always reset set_status_bit(ST_OV, m_current_value == 0x8000); + set_status_bit(ST_C, false); compare_and_set_lae(m_current_value, 0); if ((m_current_value & 0x8000)!=0) |