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author Nathan Woods <npwoods@mess.org>2011-11-12 13:39:30 +0000
committer Nathan Woods <npwoods@mess.org>2011-11-12 13:39:30 +0000
commit5ae4f302cb27fbe435f713917259217774e27894 (patch)
tree9cccec825b2e74ccb1fcafc88f44cd49848e961c
parent6fc97697152223184c2fa520793def5107876eaa (diff)
Fixing comments
-rw-r--r--src/emu/cpu/drcbex64.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/emu/cpu/drcbex64.c b/src/emu/cpu/drcbex64.c
index 8de426aef91..88f8c8ffc8d 100644
--- a/src/emu/cpu/drcbex64.c
+++ b/src/emu/cpu/drcbex64.c
@@ -3253,7 +3253,7 @@ void drcbe_x64::op_getflgs(x86code *&dst, const instruction &inst)
emit_setcc_r8(dst, x64emit::COND_C, REG_AL); // setc al
emit_setcc_r8(dst, x64emit::COND_O, REG_CL); // seto cl
emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,cl
emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
break;
@@ -3261,7 +3261,7 @@ void drcbe_x64::op_getflgs(x86code *&dst, const instruction &inst)
emit_setcc_r8(dst, x64emit::COND_C, REG_AL); // setc al
emit_setcc_r8(dst, x64emit::COND_Z, REG_CL); // setz cl
emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,cl
emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 4, 0)); // lea dstreg,[eax+ecx*4]
break;
@@ -3269,7 +3269,7 @@ void drcbe_x64::op_getflgs(x86code *&dst, const instruction &inst)
emit_setcc_r8(dst, x64emit::COND_C, REG_AL); // setc al
emit_setcc_r8(dst, x64emit::COND_S, REG_CL); // sets cl
emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,cl
emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 8, 0)); // lea dstreg,[eax+ecx*8]
break;
@@ -3278,7 +3278,7 @@ void drcbe_x64::op_getflgs(x86code *&dst, const instruction &inst)
emit_setcc_r8(dst, x64emit::COND_O, REG_AL); // seto al
emit_setcc_r8(dst, x64emit::COND_Z, REG_CL); // setz cl
emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,cl
emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
break;