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author Wilbert Pol <wilbert@jdg.info>2010-04-05 18:53:22 +0000
committer Wilbert Pol <wilbert@jdg.info>2010-04-05 18:53:22 +0000
commit39ba484e7bc1e66fe5eb412c52095d9384be2dda (patch)
tree1789257ddef7469c3f4550b4da5ca109fd39da07
parent2758f10e8c8355726fdd4c9470843ed1ae86b992 (diff)
uPD7801: Fixed the MOV MC,A instruction.
-rw-r--r--src/emu/cpu/upd7810/7810ops.c16
-rw-r--r--src/emu/cpu/upd7810/7810tbl.c3
2 files changed, 18 insertions, 1 deletions
diff --git a/src/emu/cpu/upd7810/7810ops.c b/src/emu/cpu/upd7810/7810ops.c
index 7c8dd831e63..e645819ac89 100644
--- a/src/emu/cpu/upd7810/7810ops.c
+++ b/src/emu/cpu/upd7810/7810ops.c
@@ -9468,3 +9468,19 @@ static void STM_7801(upd7810_state *cpustate)
/* Reload the timer */
cpustate->ovc0 = 16 * ( TM0 + ( ( TM1 & 0x0f ) << 8 ) );
}
+
+static void MOV_MC_A_7801(upd7810_state *cpustate)
+{
+ /* On the 7801 the mode C bits function as follows: */
+ /* Cn=1 Cn=0 */
+ /* PC0 Input Output */
+ /* PC1 Input Output */
+ /* PC2 Input -SCS Input */
+ /* PC3 Output SAK Output */
+ /* PC4 Output To Output */
+ /* PC5 Output IO/-M Output */
+ /* PC6 Output HLDA Output */
+ /* PC7 Input HOLD Input */
+ MC = 0x84 | ( ( A & 0x02 ) ? 0x02 : 0x00 ) | ( ( A & 0x01 ) ? 0x01 : 0x00 );
+}
+
diff --git a/src/emu/cpu/upd7810/7810tbl.c b/src/emu/cpu/upd7810/7810tbl.c
index 8e025d3788b..fd3cc4f0af3 100644
--- a/src/emu/cpu/upd7810/7810tbl.c
+++ b/src/emu/cpu/upd7810/7810tbl.c
@@ -1044,6 +1044,7 @@ static void INR_B_7801(upd7810_state *cpustate);
static void INR_C_7801(upd7810_state *cpustate);
static void INRW_wa_7801(upd7810_state *cpustate);
static void STM_7801(upd7810_state *cpustate);
+static void MOV_MC_A_7801(upd7810_state *cpustate);
static const struct opcode_s op48[256] =
@@ -3970,7 +3971,7 @@ static const struct opcode_s op4D_7801[256] =
/* 0xC0 - 0xDF */
{MOV_PA_A, 2,10,10,L0|L1}, {MOV_PB_A, 2,10,10,L0|L1},
{MOV_PC_A, 2,10,10,L0|L1}, {MOV_MKL_A, 2,10,10,L0|L1},
- {MOV_MB_A, 2,10,10,L0|L1}, {MOV_MC_A, 2,10,10,L0|L1},
+ {MOV_MB_A, 2,10,10,L0|L1}, {MOV_MC_A_7801, 2,10,10,L0|L1},
{MOV_TM0_A, 2,10,10,L0|L1}, {MOV_TM1_A, 2,10,10,L0|L1},
{MOV_S_A, 2,10,10,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
{illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},