diff options
author | Aaron Giles <aaron@aarongiles.com> | 2009-12-23 16:16:12 +0000 |
---|---|---|
committer | Aaron Giles <aaron@aarongiles.com> | 2009-12-23 16:16:12 +0000 |
commit | caf41f8f3976975b4bce3d3093624305dccde5e2 (patch) | |
tree | eb975339fbe4576ca14c835d9abed4a050a390e4 | |
parent | edaf5442b9081962f36c4fae00e6fd1fb909a6a7 (diff) |
Fixed recent regression reports.
Converted rtc65271 to a device.
-rw-r--r-- | src/emu/machine/rtc65271.c | 376 | ||||
-rw-r--r-- | src/emu/machine/rtc65271.h | 33 | ||||
-rw-r--r-- | src/mame/drivers/firebeat.c | 73 | ||||
-rw-r--r-- | src/mame/drivers/groundfx.c | 2 | ||||
-rw-r--r-- | src/mame/drivers/megadriv.c | 23 | ||||
-rw-r--r-- | src/mame/drivers/megadriv.h | 2 | ||||
-rw-r--r-- | src/mame/drivers/miniboy7.c | 2 | ||||
-rw-r--r-- | src/mame/drivers/segac2.c | 2 | ||||
-rw-r--r-- | src/mame/drivers/segas32.c | 3 | ||||
-rw-r--r-- | src/mame/drivers/seibuspi.c | 9 | ||||
-rw-r--r-- | src/mame/drivers/seta2.c | 48 | ||||
-rw-r--r-- | src/mame/drivers/twinkle.c | 28 | ||||
-rw-r--r-- | src/mame/drivers/vicdual.c | 22 |
13 files changed, 289 insertions, 334 deletions
diff --git a/src/emu/machine/rtc65271.c b/src/emu/machine/rtc65271.c index 5be55518c9e..e30c94bdc9a 100644 --- a/src/emu/machine/rtc65271.c +++ b/src/emu/machine/rtc65271.c @@ -18,7 +18,7 @@ #include "driver.h" #include "rtc65271.h" -static void field_interrupts(void); +static void field_interrupts(const device_config *device); static TIMER_CALLBACK( rtc_SQW_callback ); static TIMER_CALLBACK( rtc_begin_update_callback ); static TIMER_CALLBACK( rtc_end_update_callback ); @@ -30,29 +30,38 @@ update interrupt asserted) of the update cycle */ cycle */ /*#define UPDATE_CYCLE_DELAY ATTOTIME_IN_USEC(244)*/ -static struct +typedef struct _rtc65271_state rtc65271_state; +struct _rtc65271_state { - running_machine *machine; - /* 64 8-bit registers (10 clock registers, 4 control/status registers, and 50 bytes of user RAM) */ UINT8 regs[64]; - int cur_reg; + UINT8 cur_reg; /* extended RAM: 4kbytes of battery-backed RAM (in pages of 32 bytes) */ - UINT8 *xram; - int cur_xram_page; + UINT8 xram[4096]; + UINT8 cur_xram_page; /* update timer: called every second */ emu_timer *update_timer; /* SQW timer: called every periodic clock half-period */ emu_timer *SQW_timer; - int SQW_internal_state; + UINT8 SQW_internal_state; /* callback called when interrupt pin state changes (may be NULL) */ - void (*interrupt_callback)(running_machine *machine, int state); -} rtc; + void (*interrupt_callback)(const device_config *device, int state); +}; + +INLINE rtc65271_state *get_safe_token(const device_config *device) +{ + assert(device != NULL); + assert(device->token != NULL); + assert(device->type == RTC65271); + + return (rtc65271_state *)device->token; +} + enum { @@ -185,8 +194,9 @@ static UINT8 BCD_to_binary(UINT8 data) /* load the SRAM and register contents from file */ -int rtc65271_file_load(running_machine *machine, mame_file *file) +static int rtc65271_file_load(const device_config *device, mame_file *file) { + rtc65271_state *state = get_safe_token(device); UINT8 buf; @@ -199,66 +209,66 @@ int rtc65271_file_load(running_machine *machine, mame_file *file) /* control registers */ if (mame_fread(file, &buf, 1) != 1) return 1; - rtc.regs[reg_A] = buf & (reg_A_DV /*| reg_A_RS*/); + state->regs[reg_A] = buf & (reg_A_DV /*| reg_A_RS*/); if (mame_fread(file, &buf, 1) != 1) return 1; - rtc.regs[reg_B] = buf & (reg_B_SET | reg_B_DM | reg_B_24h | reg_B_DSE); + state->regs[reg_B] = buf & (reg_B_SET | reg_B_DM | reg_B_24h | reg_B_DSE); /* alarm registers */ - if (mame_fread(file, &rtc.regs[reg_alarm_second], 1) != 1) + if (mame_fread(file, &state->regs[reg_alarm_second], 1) != 1) return 1; - if (mame_fread(file, &rtc.regs[reg_alarm_minute], 1) != 1) + if (mame_fread(file, &state->regs[reg_alarm_minute], 1) != 1) return 1; - if (mame_fread(file, &rtc.regs[reg_alarm_hour], 1) != 1) + if (mame_fread(file, &state->regs[reg_alarm_hour], 1) != 1) return 1; /* user RAM */ - if (mame_fread(file, rtc.regs+14, 50) != 50) + if (mame_fread(file, state->regs+14, 50) != 50) return 1; /* extended RAM */ - if (mame_fread(file, rtc.xram, 4096) != 4096) + if (mame_fread(file, state->xram, 4096) != 4096) return 1; - rtc.regs[reg_D] |= reg_D_VRT; /* the data was backed up successfully */ - /*rtc.dirty = FALSE;*/ + state->regs[reg_D] |= reg_D_VRT; /* the data was backed up successfully */ + /*state->dirty = FALSE;*/ { mame_system_time systime; /* get the current date/time from the core */ - mame_get_current_datetime(machine, &systime); + mame_get_current_datetime(device->machine, &systime); /* set clock registers */ - rtc.regs[reg_second] = systime.local_time.second; - rtc.regs[reg_minute] = systime.local_time.minute; - if (rtc.regs[reg_B] & reg_B_24h) + state->regs[reg_second] = systime.local_time.second; + state->regs[reg_minute] = systime.local_time.minute; + if (state->regs[reg_B] & reg_B_24h) /* 24-hour mode */ - rtc.regs[reg_hour] = systime.local_time.hour; + state->regs[reg_hour] = systime.local_time.hour; else { /* 12-hour mode */ if (systime.local_time.hour >= 12) { - rtc.regs[reg_hour] = 0x80; + state->regs[reg_hour] = 0x80; systime.local_time.hour -= 12; } else - rtc.regs[reg_hour] = 0; - rtc.regs[reg_hour] |= systime.local_time.hour ? systime.local_time.hour : 12; + state->regs[reg_hour] = 0; + state->regs[reg_hour] |= systime.local_time.hour ? systime.local_time.hour : 12; } - rtc.regs[reg_weekday] = systime.local_time.weekday + 1; - rtc.regs[reg_monthday] = systime.local_time.mday; - rtc.regs[reg_month] = systime.local_time.month + 1; - rtc.regs[reg_year] = systime.local_time.year % 100; - if (! (rtc.regs[reg_B] & reg_B_DM)) + state->regs[reg_weekday] = systime.local_time.weekday + 1; + state->regs[reg_monthday] = systime.local_time.mday; + state->regs[reg_month] = systime.local_time.month + 1; + state->regs[reg_year] = systime.local_time.year % 100; + if (! (state->regs[reg_B] & reg_B_DM)) { /* BCD mode */ - rtc.regs[reg_second] = binary_to_BCD(rtc.regs[reg_second]); - rtc.regs[reg_minute] = binary_to_BCD(rtc.regs[reg_minute]); - rtc.regs[reg_hour] = (rtc.regs[reg_hour] & 0x80) | binary_to_BCD(rtc.regs[reg_hour] & 0x7f); - /*rtc.regs[reg_weekday] = binary_to_BCD(rtc.regs[reg_weekday]);*/ - rtc.regs[reg_monthday] = binary_to_BCD(rtc.regs[reg_monthday]); - rtc.regs[reg_month] = binary_to_BCD(rtc.regs[reg_month]); - rtc.regs[reg_year] = binary_to_BCD(rtc.regs[reg_year]); + state->regs[reg_second] = binary_to_BCD(state->regs[reg_second]); + state->regs[reg_minute] = binary_to_BCD(state->regs[reg_minute]); + state->regs[reg_hour] = (state->regs[reg_hour] & 0x80) | binary_to_BCD(state->regs[reg_hour] & 0x7f); + /*state->regs[reg_weekday] = binary_to_BCD(state->regs[reg_weekday]);*/ + state->regs[reg_monthday] = binary_to_BCD(state->regs[reg_monthday]); + state->regs[reg_month] = binary_to_BCD(state->regs[reg_month]); + state->regs[reg_year] = binary_to_BCD(state->regs[reg_year]); } } @@ -268,8 +278,9 @@ int rtc65271_file_load(running_machine *machine, mame_file *file) /* save the SRAM and register contents to file */ -int rtc65271_file_save(mame_file *file) +static int rtc65271_file_save(const device_config *device, mame_file *file) { + rtc65271_state *state = get_safe_token(device); UINT8 buf; @@ -279,107 +290,88 @@ int rtc65271_file_save(mame_file *file) return 1; /* control registers */ - buf = rtc.regs[reg_A] & (reg_A_DV | reg_A_RS); + buf = state->regs[reg_A] & (reg_A_DV | reg_A_RS); if (mame_fwrite(file, &buf, 1) != 1) return 1; - buf = rtc.regs[reg_B] & (reg_B_SET | reg_B_DM | reg_B_24h | reg_B_DSE); + buf = state->regs[reg_B] & (reg_B_SET | reg_B_DM | reg_B_24h | reg_B_DSE); if (mame_fwrite(file, &buf, 1) != 1) return 1; /* alarm registers */ - if (mame_fwrite(file, &rtc.regs[reg_alarm_second], 1) != 1) + if (mame_fwrite(file, &state->regs[reg_alarm_second], 1) != 1) return 1; - if (mame_fwrite(file, &rtc.regs[reg_alarm_minute], 1) != 1) + if (mame_fwrite(file, &state->regs[reg_alarm_minute], 1) != 1) return 1; - if (mame_fwrite(file, &rtc.regs[reg_alarm_hour], 1) != 1) + if (mame_fwrite(file, &state->regs[reg_alarm_hour], 1) != 1) return 1; /* user RAM */ - if (mame_fwrite(file, rtc.regs+14, 50) != 50) + if (mame_fwrite(file, state->regs+14, 50) != 50) return 1; /* extended RAM */ - if (mame_fwrite(file, rtc.xram, 4096) != 4096) + if (mame_fwrite(file, state->xram, 4096) != 4096) return 1; return 0; } /* - Initialize clock - - xram: pointer to 4kb RAM area - interrupt_callback: callback called when interrupt pin state changes (may - be NULL) -*/ -void rtc65271_init(running_machine *machine, UINT8 *xram, void (*interrupt_callback)(running_machine *machine, int state)) -{ - memset(&rtc, 0, sizeof(rtc)); - - rtc.machine = machine; - rtc.xram = xram; - - rtc.update_timer = timer_alloc(machine, rtc_begin_update_callback, NULL); - timer_adjust_periodic(rtc.update_timer, ATTOTIME_IN_SEC(1), 0, ATTOTIME_IN_SEC(1)); - rtc.SQW_timer = timer_alloc(machine, rtc_SQW_callback, NULL); - rtc.interrupt_callback = interrupt_callback; -} - -/* Read a byte from clock xramsel: select RTC register if 0, XRAM if 1 offset: address (A0-A5 pins) */ -UINT8 rtc65271_r(int xramsel, offs_t offset) +UINT8 rtc65271_r(const device_config *device, int xramsel, offs_t offset) { + rtc65271_state *state = get_safe_token(device); int reply; if (xramsel) { if (offset & 0x20) /* XRAM page register */ - reply = rtc.cur_xram_page; + reply = state->cur_xram_page; else /* XRAM data */ - reply = rtc.xram[(offset & 0x1f) + 0x0020*rtc.cur_xram_page]; + reply = state->xram[(offset & 0x1f) + 0x0020*state->cur_xram_page]; } else { if (offset & 0x01) /* data register */ - switch (rtc.cur_reg) + switch (state->cur_reg) { case reg_C: - reply = rtc.regs[rtc.cur_reg]; - rtc.regs[rtc.cur_reg] = 0; - field_interrupts(); + reply = state->regs[state->cur_reg]; + state->regs[state->cur_reg] = 0; + field_interrupts(device); break; case reg_D: - reply = rtc.regs[rtc.cur_reg]; - rtc.regs[rtc.cur_reg] = /*0*/reg_D_VRT; /* set VRT flag so that the computer does not complain that the battery is low */ + reply = state->regs[state->cur_reg]; + state->regs[state->cur_reg] = /*0*/reg_D_VRT; /* set VRT flag so that the computer does not complain that the battery is low */ break; default: - reply = rtc.regs[rtc.cur_reg]; + reply = state->regs[state->cur_reg]; break; } else /* indirect address register */ - reply = rtc.cur_reg; + reply = state->cur_reg; } return reply; } -READ8_HANDLER( rtc65271_rtc_r ) +READ8_DEVICE_HANDLER( rtc65271_rtc_r ) { - return rtc65271_r( 0, offset ); + return rtc65271_r( device, 0, offset ); } -READ8_HANDLER( rtc65271_xram_r ) +READ8_DEVICE_HANDLER( rtc65271_xram_r ) { - return rtc65271_r( 1, offset ); + return rtc65271_r( device, 1, offset ); } /* @@ -388,63 +380,64 @@ READ8_HANDLER( rtc65271_xram_r ) xramsel: select RTC register if 0, XRAM if 1 offset: address (A0-A5 pins) */ -void rtc65271_w(int xramsel, offs_t offset, UINT8 data) +void rtc65271_w(const device_config *device, int xramsel, offs_t offset, UINT8 data) { + rtc65271_state *state = get_safe_token(device); if (xramsel) { if (offset & 0x20) /* XRAM page register */ - rtc.cur_xram_page = data & 0x7f; + state->cur_xram_page = data & 0x7f; else /* XRAM data */ - rtc.xram[(offset & 0x1f) + 0x0020*rtc.cur_xram_page] = data; + state->xram[(offset & 0x1f) + 0x0020*state->cur_xram_page] = data; } else { if (offset & 0x01) /* data register */ - switch (rtc.cur_reg) + switch (state->cur_reg) { case reg_second: /* the data sheet says bit 7 is read-only. (I have no idea of the reason why it is.) */ - rtc.regs[reg_second] = data & 0x7f; + state->regs[reg_second] = data & 0x7f; break; case reg_A: - if ((data & reg_A_RS) != (rtc.regs[rtc.cur_reg] & reg_A_RS)) + if ((data & reg_A_RS) != (state->regs[state->cur_reg] & reg_A_RS)) { if (data & reg_A_RS) { attotime period = ATTOTIME_IN_HZ(SQW_freq_table[data & reg_A_RS]); attotime half_period = attotime_div(period, 2); - attotime elapsed = timer_timeelapsed(rtc.update_timer); + attotime elapsed = timer_timeelapsed(state->update_timer); if (attotime_compare(half_period, elapsed) > 0) - timer_adjust_oneshot(rtc.SQW_timer, attotime_sub(half_period, elapsed), 0); + timer_adjust_oneshot(state->SQW_timer, attotime_sub(half_period, elapsed), 0); else - timer_adjust_oneshot(rtc.SQW_timer, half_period, 0); + timer_adjust_oneshot(state->SQW_timer, half_period, 0); } else { - rtc.SQW_internal_state = 0; /* right??? */ + state->SQW_internal_state = 0; /* right??? */ /* Stop the divider used for SQW and periodic interrupts. */ - timer_adjust_oneshot(rtc.SQW_timer, attotime_never, 0); + timer_adjust_oneshot(state->SQW_timer, attotime_never, 0); } } /* The UIP bit is read-only */ - rtc.regs[reg_A] = (data & ~reg_A_UIP) | (rtc.regs[reg_A] & reg_A_UIP); + state->regs[reg_A] = (data & ~reg_A_UIP) | (state->regs[reg_A] & reg_A_UIP); break; case reg_B: - rtc.regs[rtc.cur_reg] = data; + state->regs[state->cur_reg] = data; if (data & reg_B_SET) { /* if we are in SET mode, clear update cycle */ - rtc.regs[reg_A] &= ~reg_A_UIP; - rtc.regs[reg_B] &= ~reg_B_UIE; /* the data sheet tells this, but I wonder how much sense it makes */ - field_interrupts(); + state->regs[reg_A] &= ~reg_A_UIP; + state->regs[reg_B] &= ~reg_B_UIE; /* the data sheet tells this, but I wonder how much sense it makes */ + field_interrupts(device); } break; @@ -453,38 +446,40 @@ void rtc65271_w(int xramsel, offs_t offset, UINT8 data) break; default: - rtc.regs[rtc.cur_reg] = data; + state->regs[state->cur_reg] = data; break; } else /* indirect address register */ - rtc.cur_reg = data & 0x3f; + state->cur_reg = data & 0x3f; } } -WRITE8_HANDLER( rtc65271_rtc_w ) +WRITE8_DEVICE_HANDLER( rtc65271_rtc_w ) { - rtc65271_w( 0, offset, data ); + rtc65271_w( device, 0, offset, data ); } -WRITE8_HANDLER( rtc65271_xram_w ) +WRITE8_DEVICE_HANDLER( rtc65271_xram_w ) { - rtc65271_w( 1, offset, data ); + rtc65271_w( device, 1, offset, data ); } -static void field_interrupts(void) +static void field_interrupts(const device_config *device) { - if (rtc.regs[reg_C] & rtc.regs[reg_B] & (reg_C_PF | reg_C_AF | reg_C_UF)) + rtc65271_state *state = get_safe_token(device); + + if (state->regs[reg_C] & state->regs[reg_B] & (reg_C_PF | reg_C_AF | reg_C_UF)) { - rtc.regs[reg_C] |= reg_C_IRQF; - if (rtc.interrupt_callback) - rtc.interrupt_callback(rtc.machine, 1); + state->regs[reg_C] |= reg_C_IRQF; + if (state->interrupt_callback) + state->interrupt_callback(device, 1); } else { - rtc.regs[reg_C] &= ~reg_C_IRQF; - if (rtc.interrupt_callback) - rtc.interrupt_callback(rtc.machine, 0); + state->regs[reg_C] &= ~reg_C_IRQF; + if (state->interrupt_callback) + state->interrupt_callback(device, 0); } } @@ -499,18 +494,20 @@ static void field_interrupts(void) */ static TIMER_CALLBACK( rtc_SQW_callback ) { + const device_config *device = (const device_config *)ptr; + rtc65271_state *state = get_safe_token(device); attotime half_period; - rtc.SQW_internal_state = ! rtc.SQW_internal_state; - if (! rtc.SQW_internal_state) + state->SQW_internal_state = ! state->SQW_internal_state; + if (! state->SQW_internal_state) { /* high-to-low??? transition -> interrupt (or should it be low-to-high?) */ - rtc.regs[reg_C] |= reg_C_PF; - field_interrupts(); + state->regs[reg_C] |= reg_C_PF; + field_interrupts(device); } - half_period = attotime_div(ATTOTIME_IN_HZ(SQW_freq_table[rtc.regs[reg_A] & reg_A_RS]), 2); - timer_adjust_oneshot(rtc.SQW_timer, half_period, 0); + half_period = attotime_div(ATTOTIME_IN_HZ(SQW_freq_table[state->regs[reg_A] & reg_A_RS]), 2); + timer_adjust_oneshot(state->SQW_timer, half_period, 0); } /* @@ -518,12 +515,15 @@ static TIMER_CALLBACK( rtc_SQW_callback ) */ static TIMER_CALLBACK( rtc_begin_update_callback ) { - if (((rtc.regs[reg_A] & reg_A_DV) == 0x20) && ! (rtc.regs[reg_B] & reg_B_SET)) + const device_config *device = (const device_config *)ptr; + rtc65271_state *state = get_safe_token(device); + + if (((state->regs[reg_A] & reg_A_DV) == 0x20) && ! (state->regs[reg_B] & reg_B_SET)) { - rtc.regs[reg_A] |= reg_A_UIP; + state->regs[reg_A] |= reg_A_UIP; /* schedule end of update cycle */ - timer_set(machine, UPDATE_CYCLE_TIME, NULL, 0, rtc_end_update_callback); + timer_set(device->machine, UPDATE_CYCLE_TIME, (void *)device, 0, rtc_end_update_callback); } } @@ -538,14 +538,16 @@ static TIMER_CALLBACK( rtc_end_update_callback ) 31,28,31, 30,31,30, 31,31,30, 31,30,31 }; + const device_config *device = (const device_config *)ptr; + rtc65271_state *state = get_safe_token(device); UINT8 (*increment)(UINT8 data); int c59, c23, c12, c11, c29; - if (! (rtc.regs[reg_A] & reg_A_UIP)) + if (! (state->regs[reg_A] & reg_A_UIP)) /* abort if update cycle has been canceled */ return; - if (rtc.regs[reg_B] & reg_B_DM) + if (state->regs[reg_B] & reg_B_DM) { /* binary mode */ increment = increment_binary; @@ -567,95 +569,95 @@ static TIMER_CALLBACK( rtc_end_update_callback ) } /* increment second */ - if (rtc.regs[reg_second] < c59) - rtc.regs[reg_second] = (*increment)(rtc.regs[reg_second]); + if (state->regs[reg_second] < c59) + state->regs[reg_second] = (*increment)(state->regs[reg_second]); else { - rtc.regs[reg_second] = 0; + state->regs[reg_second] = 0; /* increment minute */ - if (rtc.regs[reg_minute] < c59) - rtc.regs[reg_minute] = (*increment)(rtc.regs[reg_minute]); + if (state->regs[reg_minute] < c59) + state->regs[reg_minute] = (*increment)(state->regs[reg_minute]); else { - rtc.regs[reg_minute] = 0; + state->regs[reg_minute] = 0; /* increment hour */ - if (rtc.regs[reg_B] & reg_B_24h) + if (state->regs[reg_B] & reg_B_24h) { /* 24 hour mode */ - if (rtc.regs[reg_hour] < c23) - rtc.regs[reg_hour] = (*increment)(rtc.regs[reg_hour]); + if (state->regs[reg_hour] < c23) + state->regs[reg_hour] = (*increment)(state->regs[reg_hour]); else - rtc.regs[reg_hour] = 0; + state->regs[reg_hour] = 0; } else { /* 12 hour mode */ - if (rtc.regs[reg_hour] < c12) + if (state->regs[reg_hour] < c12) { - if ((rtc.regs[reg_hour] & 0x7f) == c11) - rtc.regs[reg_hour] ^= 0x80; - rtc.regs[reg_hour] = ((*increment)(rtc.regs[reg_hour] & 0x7f) & 0x7f) - | (rtc.regs[reg_hour] & 0x80); + if ((state->regs[reg_hour] & 0x7f) == c11) + state->regs[reg_hour] ^= 0x80; + state->regs[reg_hour] = ((*increment)(state->regs[reg_hour] & 0x7f) & 0x7f) + | (state->regs[reg_hour] & 0x80); } else - rtc.regs[reg_hour] = 1 | (rtc.regs[reg_hour] & 0x80); + state->regs[reg_hour] = 1 | (state->regs[reg_hour] & 0x80); } /* increment day if needed */ - if (rtc.regs[reg_hour] == ((rtc.regs[reg_B] & reg_B_24h) ? 0 : c12)) + if (state->regs[reg_hour] == ((state->regs[reg_B] & reg_B_24h) ? 0 : c12)) { /* increment day */ int days_in_month; - if (rtc.regs[reg_weekday] < 7) - rtc.regs[reg_weekday]++; + if (state->regs[reg_weekday] < 7) + state->regs[reg_weekday]++; else - rtc.regs[reg_weekday] = 1; + state->regs[reg_weekday] = 1; - if ((rtc.regs[reg_month] != 2) || (rtc.regs[reg_year] & 0x03)) + if ((state->regs[reg_month] != 2) || (state->regs[reg_year] & 0x03)) { - if (rtc.regs[reg_B] & reg_B_DM) + if (state->regs[reg_B] & reg_B_DM) { /* binary mode */ - days_in_month = days_in_month_table[rtc.regs[reg_month] - 1]; + days_in_month = days_in_month_table[state->regs[reg_month] - 1]; } else { /* BCD mode */ - days_in_month = binary_to_BCD(days_in_month_table[BCD_to_binary(rtc.regs[reg_month]) - 1]); + days_in_month = binary_to_BCD(days_in_month_table[BCD_to_binary(state->regs[reg_month]) - 1]); } } else days_in_month = c29; - if (rtc.regs[reg_monthday] < days_in_month) - rtc.regs[reg_monthday] = (*increment)(rtc.regs[reg_monthday]); + if (state->regs[reg_monthday] < days_in_month) + state->regs[reg_monthday] = (*increment)(state->regs[reg_monthday]); else { /* increment month */ - rtc.regs[reg_monthday] = 1; + state->regs[reg_monthday] = 1; - if (rtc.regs[reg_month] < c12) - rtc.regs[reg_month] = (*increment)(rtc.regs[reg_month]); + if (state->regs[reg_month] < c12) + state->regs[reg_month] = (*increment)(state->regs[reg_month]); else { /* increment year */ - rtc.regs[reg_month] = 1; + state->regs[reg_month] = 1; - if (rtc.regs[reg_B] & reg_B_DM) + if (state->regs[reg_B] & reg_B_DM) { /* binary mode */ - if (rtc.regs[reg_year] < 99) - rtc.regs[reg_year]++; + if (state->regs[reg_year] < 99) + state->regs[reg_year]++; else - rtc.regs[reg_year] = 0; + state->regs[reg_year] = 0; } else { /* BCD mode */ - rtc.regs[reg_year] = increment_BCD(rtc.regs[reg_year]); + state->regs[reg_year] = increment_BCD(state->regs[reg_year]); } } } @@ -663,14 +665,56 @@ static TIMER_CALLBACK( rtc_end_update_callback ) } } - rtc.regs[reg_A] &= ~reg_A_UIP; - rtc.regs[reg_C] |= reg_C_UF; + state->regs[reg_A] &= ~reg_A_UIP; + state->regs[reg_C] |= reg_C_UF; /* test for alarm (values in range 0xc0-0xff mean "don't care") */ - if ((((rtc.regs[reg_alarm_second] & 0xc0) == 0xc0) || (rtc.regs[reg_alarm_second] == rtc.regs[reg_second])) - && (((rtc.regs[reg_alarm_minute] & 0xc0) == 0xc0) || (rtc.regs[reg_alarm_minute] == rtc.regs[reg_minute])) - && (((rtc.regs[reg_alarm_hour] & 0xc0) == 0xc0) || (rtc.regs[reg_alarm_hour] == rtc.regs[reg_hour]))) - rtc.regs[reg_C] |= reg_C_AF; + if ((((state->regs[reg_alarm_second] & 0xc0) == 0xc0) || (state->regs[reg_alarm_second] == state->regs[reg_second])) + && (((state->regs[reg_alarm_minute] & 0xc0) == 0xc0) || (state->regs[reg_alarm_minute] == state->regs[reg_minute])) + && (((state->regs[reg_alarm_hour] & 0xc0) == 0xc0) || (state->regs[reg_alarm_hour] == state->regs[reg_hour]))) + state->regs[reg_C] |= reg_C_AF; + + field_interrupts(device); +} + +/* + Initialize clock + + interrupt_callback: callback called when interrupt pin state changes (may + be NULL) +*/ - field_interrupts(); +static DEVICE_START( rtc65271 ) +{ + rtc65271_config *config = (rtc65271_config *)device->inline_config; + rtc65271_state *state = get_safe_token(device); + + state->update_timer = timer_alloc(device->machine, rtc_begin_update_callback, (void *)device); + timer_adjust_periodic(state->update_timer, ATTOTIME_IN_SEC(1), 0, ATTOTIME_IN_SEC(1)); + state->SQW_timer = timer_alloc(device->machine, rtc_SQW_callback, (void *)device); + state->interrupt_callback = config->interrupt_callback; + + state_save_register_device_item_array(device, 0, state->regs); + state_save_register_device_item(device, 0, state->cur_reg); + state_save_register_device_item_array(device, 0, state->xram); + state_save_register_device_item(device, 0, state->cur_xram_page); + state_save_register_device_item(device, 0, state->SQW_internal_state); } + + +static DEVICE_NVRAM( rtc65271 ) +{ + if (read_or_write) + rtc65271_file_save(device, file); + else if (file) + rtc65271_file_load(device, file); +} + + +static const char DEVTEMPLATE_SOURCE[] = __FILE__; + +#define DEVTEMPLATE_ID(p,s) p##rtc65271##s +#define DEVTEMPLATE_FEATURES DT_HAS_START | DT_HAS_NVRAM | DT_HAS_INLINE_CONFIG +#define DEVTEMPLATE_NAME "RTC65271" +#define DEVTEMPLATE_FAMILY "RTC" +#include "devtempl.h" diff --git a/src/emu/machine/rtc65271.h b/src/emu/machine/rtc65271.h index a7028d337b1..6a254fdf7fe 100644 --- a/src/emu/machine/rtc65271.h +++ b/src/emu/machine/rtc65271.h @@ -2,12 +2,27 @@ rtc65271.h: include file for rtc65271.c */ -extern int rtc65271_file_load(running_machine *machine, mame_file *file); -extern int rtc65271_file_save(mame_file *file); -extern void rtc65271_init(running_machine *machine, UINT8 *xram, void (*interrupt_callback)(running_machine *machine, int state)); -extern UINT8 rtc65271_r(int xramsel, offs_t offset); -extern void rtc65271_w(int xramsel, offs_t offset, UINT8 data); -extern READ8_HANDLER( rtc65271_rtc_r ); -extern READ8_HANDLER( rtc65271_xram_r ); -extern WRITE8_HANDLER( rtc65271_rtc_w ); -extern WRITE8_HANDLER( rtc65271_xram_w ); +typedef struct _rtc65271_config rtc65271_config; +struct _rtc65271_config +{ + void (*interrupt_callback)(const device_config *device, int state); +}; + + +#define MDRV_RTC65271_ADD(_tag, _callback) \ + MDRV_DEVICE_ADD(_tag, RTC65271, 0) \ + MDRV_DEVICE_CONFIG_DATAPTR(rtc65271_config, interrupt_callback, _callback) + + +UINT8 rtc65271_r(const device_config *device, int xramsel, offs_t offset); +void rtc65271_w(const device_config *device, int xramsel, offs_t offset, UINT8 data); + +READ8_DEVICE_HANDLER( rtc65271_rtc_r ); +READ8_DEVICE_HANDLER( rtc65271_xram_r ); +WRITE8_DEVICE_HANDLER( rtc65271_rtc_w ); +WRITE8_DEVICE_HANDLER( rtc65271_xram_w ); + + +/* device get info callback */ +#define RTC65271 DEVICE_GET_INFO_NAME(rtc65271) +DEVICE_GET_INFO( rtc65271 ); diff --git a/src/mame/drivers/firebeat.c b/src/mame/drivers/firebeat.c index 0fc812b3f78..60fc916e6dc 100644 --- a/src/mame/drivers/firebeat.c +++ b/src/mame/drivers/firebeat.c @@ -130,7 +130,6 @@ typedef struct UINT32 visible_area; } GCU_REGS; -static UINT8 xram[4096]; static UINT8 extend_board_irq_enable; static UINT8 extend_board_irq_active; @@ -1281,55 +1280,6 @@ static void comm_uart_irq_callback(running_machine *machine, int channel, int va } /*****************************************************************************/ -/* Epson RTC-65271 Real-time Clock/NVRAM */ - -static READ32_HANDLER( rtc_r ) -{ - int reg = offset * 4; - UINT32 r = 0; - - if (ACCESSING_BITS_24_31) - { - r |= rtc65271_r((reg >> 8) & 0x1, (reg & 0xff) + 0) << 24; - } - if (ACCESSING_BITS_16_23) - { - r |= rtc65271_r((reg >> 8) & 0x1, (reg & 0xff) + 1) << 16; - } - if (ACCESSING_BITS_8_15) - { - r |= rtc65271_r((reg >> 8) & 0x1, (reg & 0xff) + 2) << 8; - } - if (ACCESSING_BITS_0_7) - { - r |= rtc65271_r((reg >> 8) & 0x1, (reg & 0xff) + 3) << 0; - } - - return r; -} - -static WRITE32_HANDLER( rtc_w ) -{ - int reg = offset * 4; - if (ACCESSING_BITS_24_31) - { - rtc65271_w((reg >> 8) & 0x1, (reg & 0xff) + 0, (data >> 24) & 0xff); - } - if (ACCESSING_BITS_16_23) - { - rtc65271_w((reg >> 8) & 0x1, (reg & 0xff) + 1, (data >> 16) & 0xff); - } - if (ACCESSING_BITS_8_15) - { - rtc65271_w((reg >> 8) & 0x1, (reg & 0xff) + 2, (data >> 8) & 0xff); - } - if (ACCESSING_BITS_0_7) - { - rtc65271_w((reg >> 8) & 0x1, (reg & 0xff) + 3, (data >> 0) & 0xff); - } -} - -/*****************************************************************************/ static const int cab_data[2] = { 0x0, 0x8 }; static const int kbm_cab_data[2] = { 0x2, 0x8 }; @@ -1753,7 +1703,8 @@ static ADDRESS_MAP_START( firebeat_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0x7d400000, 0x7d5fffff) AM_READWRITE(flashram_r, flashram_w) AM_RANGE(0x7d800000, 0x7dbfffff) AM_READWRITE(soundflash_r, soundflash_w) AM_RANGE(0x7dc00000, 0x7dc0000f) AM_READWRITE(comm_uart_r, comm_uart_w) - AM_RANGE(0x7e000000, 0x7e00013f) AM_READWRITE(rtc_r, rtc_w) + AM_RANGE(0x7e000000, 0x7e00003f) AM_DEVREADWRITE8("rtc", rtc65271_rtc_r, rtc65271_rtc_w, 0xffffffff) + AM_RANGE(0x7e000100, 0x7e00013f) AM_DEVREADWRITE8("rtc", rtc65271_xram_r, rtc65271_xram_w, 0xffffffff) AM_RANGE(0x7e800000, 0x7e8000ff) AM_READWRITE(gcu0_r, gcu0_w) AM_RANGE(0x7e800100, 0x7e8001ff) AM_READWRITE(gcu1_r, gcu1_w) AM_RANGE(0x7fe00000, 0x7fe0000f) AM_READWRITE(atapi_command_r, atapi_command_w) @@ -1797,20 +1748,6 @@ static NVRAM_HANDLER(firebeat) nvram_handler_intelflash(machine, 0, file, read_or_write); nvram_handler_intelflash(machine, 1, file, read_or_write); nvram_handler_intelflash(machine, 2, file, read_or_write); - - if (read_or_write) - { - rtc65271_file_save(file); - } - else - { - rtc65271_init(machine, xram, NULL); - - if (file != NULL) - { - rtc65271_file_load(machine, file); - } - } } static INPUT_PORTS_START(ppp) @@ -1985,6 +1922,8 @@ static MACHINE_DRIVER_START(firebeat) MDRV_MACHINE_START(firebeat) MDRV_MACHINE_RESET(firebeat) MDRV_NVRAM_HANDLER(firebeat) + + MDRV_RTC65271_ADD("rtc", NULL) /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) @@ -2024,6 +1963,8 @@ static MACHINE_DRIVER_START(firebeat2) MDRV_MACHINE_RESET(firebeat) MDRV_NVRAM_HANDLER(firebeat) + MDRV_RTC65271_ADD("rtc", NULL) + /* video hardware */ MDRV_PALETTE_LENGTH(32768) MDRV_PALETTE_INIT(RRRRR_GGGGG_BBBBB) @@ -2241,8 +2182,6 @@ static void init_firebeat(running_machine *machine) intelflash_init(machine, 1, FLASH_FUJITSU_29F016A, NULL); intelflash_init(machine, 2, FLASH_FUJITSU_29F016A, NULL); - rtc65271_init(machine, xram, NULL); - pc16552d_init(machine, 0, 19660800, comm_uart_irq_callback, 0); // Network UART pc16552d_init(machine, 1, 24000000, midi_uart_irq_callback, 0); // MIDI UART diff --git a/src/mame/drivers/groundfx.c b/src/mame/drivers/groundfx.c index 20c667e07bb..36a67f80a1e 100644 --- a/src/mame/drivers/groundfx.c +++ b/src/mame/drivers/groundfx.c @@ -414,7 +414,7 @@ ROM_START( groundfx ) ROM_LOAD16_BYTE( "d51-02.74", 0xc00000, 0x200000, CRC(20a9428f) SHA1(c9033d02a49c72f704808f5f899101617d5814e5) ) ROM_REGION16_BE( 0x80, "eeprom", 0 ) - ROM_LOAD( "eeprom.bin", 0x0000, 0x0080, CRC(6f58851d) SHA1(33bd4478f097dca6b5d222adb89699c6d35ed009) ) + ROM_LOAD( "93c46.164", 0x0000, 0x0080, CRC(6f58851d) SHA1(33bd4478f097dca6b5d222adb89699c6d35ed009) ) ROM_END diff --git a/src/mame/drivers/megadriv.c b/src/mame/drivers/megadriv.c index bf025c00671..2cc13629dbd 100644 --- a/src/mame/drivers/megadriv.c +++ b/src/mame/drivers/megadriv.c @@ -6068,6 +6068,15 @@ static NVRAM_HANDLER( megadriv ) #endif +MACHINE_DRIVER_START( megadriv_timers ) + MDRV_TIMER_ADD("frame_timer", frame_timer_callback) + MDRV_TIMER_ADD("scanline_timer", scanline_timer_callback) + MDRV_TIMER_ADD("render_timer", render_timer_callback) + MDRV_TIMER_ADD("irq6_timer", irq6_on_callback) + MDRV_TIMER_ADD("irq4_timer", irq4_on_callback) +MACHINE_DRIVER_END + + MACHINE_DRIVER_START( megadriv ) MDRV_CPU_ADD("maincpu", M68000, MASTER_CLOCK_NTSC / 7) /* 7.67 MHz */ MDRV_CPU_PROGRAM_MAP(megadriv_map) @@ -6080,12 +6089,8 @@ MACHINE_DRIVER_START( megadriv ) MDRV_MACHINE_START(megadriv) MDRV_MACHINE_RESET(megadriv) - - MDRV_TIMER_ADD("frame_timer", frame_timer_callback) - MDRV_TIMER_ADD("scanline_timer", scanline_timer_callback) - MDRV_TIMER_ADD("render_timer", render_timer_callback) - MDRV_TIMER_ADD("irq6_timer", irq6_on_callback) - MDRV_TIMER_ADD("irq4_timer", irq4_on_callback) + + MDRV_IMPORT_FROM(megadriv_timers) MDRV_SCREEN_ADD("megadriv", RASTER) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB15) @@ -6132,11 +6137,7 @@ MACHINE_DRIVER_START( megadpal ) MDRV_MACHINE_START(megadriv) MDRV_MACHINE_RESET(megadriv) - MDRV_TIMER_ADD("frame_timer", frame_timer_callback) - MDRV_TIMER_ADD("scanline_timer", scanline_timer_callback) - MDRV_TIMER_ADD("render_timer", render_timer_callback) - MDRV_TIMER_ADD("irq6_timer", irq6_on_callback) - MDRV_TIMER_ADD("irq4_timer", irq4_on_callback) + MDRV_IMPORT_FROM(megadriv_timers) MDRV_SCREEN_ADD("megadriv", RASTER) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB15) diff --git a/src/mame/drivers/megadriv.h b/src/mame/drivers/megadriv.h index 9e1b76dd53f..dc45d7e7fc0 100644 --- a/src/mame/drivers/megadriv.h +++ b/src/mame/drivers/megadriv.h @@ -17,6 +17,8 @@ INPUT_PORTS_EXTERN( megadri6 ); INPUT_PORTS_EXTERN( ssf2ghw ); INPUT_PORTS_EXTERN( megdsvp ); +MACHINE_DRIVER_EXTERN( megadriv_timers ); + MACHINE_DRIVER_EXTERN( megdsvppal ); MACHINE_DRIVER_EXTERN( megadriv ); MACHINE_DRIVER_EXTERN( megadpal ); diff --git a/src/mame/drivers/miniboy7.c b/src/mame/drivers/miniboy7.c index 1793cc7a8f8..cc1bfd2ff37 100644 --- a/src/mame/drivers/miniboy7.c +++ b/src/mame/drivers/miniboy7.c @@ -185,7 +185,7 @@ static VIDEO_UPDATE( miniboy7 ) static ADDRESS_MAP_START( miniboy7_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x07ff) AM_RAM /* battery backed RAM? */ - AM_RANGE(0x0800, 0x0fff) AM_RAM_WRITE(miniboy7_videoram_w) AM_BASE_GENERIC(videoram) + AM_RANGE(0x0800, 0x0fff) AM_RAM_WRITE(miniboy7_videoram_w) AM_BASE(&videoram) AM_RANGE(0x1000, 0x17ff) AM_RAM_WRITE(miniboy7_colorram_w) AM_BASE(&colorram) AM_RANGE(0x1800, 0x25ff) AM_RAM /* looks like videoram */ AM_RANGE(0x2600, 0x27ff) AM_RAM diff --git a/src/mame/drivers/segac2.c b/src/mame/drivers/segac2.c index d74be7c1de0..1c0e4c2526f 100644 --- a/src/mame/drivers/segac2.c +++ b/src/mame/drivers/segac2.c @@ -1370,6 +1370,8 @@ static MACHINE_DRIVER_START( segac ) MDRV_MACHINE_RESET(segac2) MDRV_NVRAM_HANDLER(generic_randfill) + MDRV_IMPORT_FROM(megadriv_timers) + /* video hardware */ //MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS) diff --git a/src/mame/drivers/segas32.c b/src/mame/drivers/segas32.c index 1d17bdefdeb..a9c99fec17f 100644 --- a/src/mame/drivers/segas32.c +++ b/src/mame/drivers/segas32.c @@ -2246,6 +2246,9 @@ static MACHINE_DRIVER_START( multi32 ) MDRV_MACHINE_RESET(system32) MDRV_NVRAM_HANDLER(system32) + MDRV_TIMER_ADD("v60_irq0", signal_v60_irq_callback) + MDRV_TIMER_ADD("v60_irq1", signal_v60_irq_callback) + /* video hardware */ MDRV_GFXDECODE(segas32) MDRV_PALETTE_LENGTH(0x8000) diff --git a/src/mame/drivers/seibuspi.c b/src/mame/drivers/seibuspi.c index 229c46d4b24..cda1d90f97a 100644 --- a/src/mame/drivers/seibuspi.c +++ b/src/mame/drivers/seibuspi.c @@ -1916,11 +1916,15 @@ static MACHINE_DRIVER_START( spi ) MDRV_SOUND_ROUTE(1, "rspeaker", 1.0) MACHINE_DRIVER_END +static MACHINE_START( sxx2f ) +{ + z80_rom = auto_alloc_array(machine, UINT8, 0x40000); +} + static MACHINE_RESET( sxx2f ) { UINT8 *rom = memory_region(machine, "soundcpu"); - z80_rom = auto_alloc_array(machine, UINT8, 0x40000); memory_set_bankptr(machine, "bank4", z80_rom); memory_set_bankptr(machine, "bank5", z80_rom); @@ -1928,6 +1932,7 @@ static MACHINE_RESET( sxx2f ) memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000068c, 0x0000068f, 0, 0, eeprom_w); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00000680, 0x00000683, 0, 0, sb_coin_r); + cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), spi_irq_callback); sb_coin_latch = 0; @@ -1937,6 +1942,7 @@ static MACHINE_DRIVER_START( sxx2f ) /* Intel i386DX @ 25MHz, YMF271 @ 16.9344MH MDRV_IMPORT_FROM(spi) + MDRV_MACHINE_START(sxx2f) MDRV_MACHINE_RESET(sxx2f) MDRV_NVRAM_HANDLER(sxx2f) @@ -1956,6 +1962,7 @@ static MACHINE_DRIVER_START( sxx2g ) /* single board version using measured cloc MDRV_SOUND_ROUTE(0, "lspeaker", 1.0) MDRV_SOUND_ROUTE(1, "rspeaker", 1.0) + MDRV_MACHINE_START(sxx2f) MDRV_MACHINE_RESET(sxx2f) MDRV_NVRAM_HANDLER(sxx2f) diff --git a/src/mame/drivers/seta2.c b/src/mame/drivers/seta2.c index d9b1a88366b..64af01655e7 100644 --- a/src/mame/drivers/seta2.c +++ b/src/mame/drivers/seta2.c @@ -533,7 +533,7 @@ The same H8/3007 code "FC21 IOPR-0" at U49 is used for FUNCUBE 2,3,4 & 5 #include "cpu/m68000/m68000.h" #include "machine/tmp68301.h" #include "cpu/h83002/h8.h" -#include "machine/eeprom.h" +#include "machine/eepromdev.h" #include "sound/x1_010.h" #include "includes/seta.h" @@ -600,40 +600,16 @@ ADDRESS_MAP_END Mobile Suit Gundam EX Revue ***************************************************************************/ -static NVRAM_HANDLER(93C46_gundamex) +static READ16_DEVICE_HANDLER( gundamex_eeprom_r ) { - if (read_or_write) - { - eeprom_save(file); - } - else - { - eeprom_init(machine, &eeprom_interface_93C46); - if (file) - { - eeprom_load(file); - } - else - { - UINT32 length, size; - UINT16 *dat; - - dat = (UINT16 *)eeprom_get_data_pointer(&length, &size); - dat[0] = 0x7008; - } - } -} - -static READ16_HANDLER( gundamex_eeprom_r ) -{ - return ((eeprom_read_bit() & 1)) << 3; + return ((eepromdev_read_bit(device) & 1)) << 3; } -static WRITE16_HANDLER( gundamex_eeprom_w ) +static WRITE16_DEVICE_HANDLER( gundamex_eeprom_w ) { - eeprom_set_clock_line((data & 0x2) ? ASSERT_LINE : CLEAR_LINE); - eeprom_write_bit(data & 0x1); - eeprom_set_cs_line((data & 0x4) ? CLEAR_LINE : ASSERT_LINE); + eepromdev_set_clock_line(device, (data & 0x2) ? ASSERT_LINE : CLEAR_LINE); + eepromdev_write_bit(device, data & 0x1); + eepromdev_set_cs_line(device, (data & 0x4) ? CLEAR_LINE : ASSERT_LINE); } static ADDRESS_MAP_START( gundamex_map, ADDRESS_SPACE_PROGRAM, 16 ) @@ -655,7 +631,7 @@ static ADDRESS_MAP_START( gundamex_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0xc50000, 0xc5ffff) AM_RAM // cleared AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs) // Video Registers AM_RANGE(0xe00010, 0xe0001f) AM_WRITE(seta2_sound_bank_w) // Samples Banks - AM_RANGE(0xfffd0a, 0xfffd0b) AM_READWRITE(gundamex_eeprom_r,gundamex_eeprom_w) // parallel data register + AM_RANGE(0xfffd0a, 0xfffd0b) AM_DEVREADWRITE("eeprom", gundamex_eeprom_r,gundamex_eeprom_w) // parallel data register AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs) // TMP68301 Registers ADDRESS_MAP_END @@ -2298,6 +2274,7 @@ static MACHINE_DRIVER_START( mj4simai ) MDRV_CPU_PROGRAM_MAP(mj4simai_map) MDRV_CPU_VBLANK_INT("screen", seta2_interrupt) + MDRV_MACHINE_START( tmp68301 ) MDRV_MACHINE_RESET( tmp68301 ) /* video hardware */ @@ -2330,8 +2307,8 @@ static MACHINE_DRIVER_START( gundamex ) MDRV_IMPORT_FROM(mj4simai) MDRV_CPU_MODIFY("maincpu") MDRV_CPU_PROGRAM_MAP(gundamex_map) - - MDRV_NVRAM_HANDLER(93C46_gundamex) + + MDRV_EEPROM_93C46_NODEFAULT_ADD("eeprom") /* video hardware */ MDRV_SCREEN_MODIFY("screen") @@ -2533,6 +2510,9 @@ ROM_START( gundamex ) ROM_REGION( 0x300000, "x1snd", 0 ) /* Samples */ /* Leave 1MB empty (addressable by the chip) */ ROM_LOAD( "ka001015.u28", 0x100000, 0x200000, CRC(ada2843b) SHA1(09d06026031bc7558da511c3c0e29187ea0a0099) ) + + ROM_REGION16_BE( 0x80, "eeprom", 0 ) + ROM_LOAD( "eeprom.bin", 0x0000, 0x0080, CRC(80f8e248) SHA1(1a9787811e56d95f7acbedfb00225b6e7df265eb) ) ROM_END ROM_START( grdians ) diff --git a/src/mame/drivers/twinkle.c b/src/mame/drivers/twinkle.c index efc7903efb1..1febd967901 100644 --- a/src/mame/drivers/twinkle.c +++ b/src/mame/drivers/twinkle.c @@ -241,25 +241,6 @@ static UINT8 twinkle_spu_shared[0x400]; // SPU/PSX shared dual-ported RAM /* RTC */ -static UINT8 xram[ 4096 ]; - -static NVRAM_HANDLER(twinkle) -{ - if (read_or_write) - { - rtc65271_file_save(file); - } - else - { - if (file != NULL) - { - rtc65271_file_load(machine, file); - } - } - - NVRAM_HANDLER_CALL(i2cmem_0); -} - static UINT32 twinkle_unknown; static WRITE32_HANDLER( twinkle_unknown_w ) @@ -657,8 +638,8 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0x1f260000, 0x1f260003) AM_WRITE(serial_w) AM_RANGE(0x1f270000, 0x1f270003) AM_WRITE(security_w) AM_RANGE(0x1f280000, 0x1f280003) AM_READ(security_r) - AM_RANGE(0x1f290000, 0x1f29007f) AM_READWRITE8(rtc65271_rtc_r, rtc65271_rtc_w, 0x00ff00ff) - AM_RANGE(0x1f2a0000, 0x1f2a007f) AM_READWRITE8(rtc65271_xram_r, rtc65271_xram_w, 0x00ff00ff) + AM_RANGE(0x1f290000, 0x1f29007f) AM_DEVREADWRITE8("rtc", rtc65271_rtc_r, rtc65271_rtc_w, 0x00ff00ff) + AM_RANGE(0x1f2a0000, 0x1f2a007f) AM_DEVREADWRITE8("rtc", rtc65271_xram_r, rtc65271_xram_w, 0x00ff00ff) AM_RANGE(0x1f2b0000, 0x1f2b00ff) AM_WRITE(twinkle_output_w) AM_RANGE(0x1f800000, 0x1f8003ff) AM_RAM /* scratchpad */ AM_RANGE(0x1f801000, 0x1f801007) AM_WRITENOP @@ -894,8 +875,6 @@ static DRIVER_INIT( twinkle ) psx_dma_install_read_handler(5, scsi_dma_read); psx_dma_install_write_handler(5, scsi_dma_write); - rtc65271_init(machine, xram, NULL); - i2cmem_init( machine, 0, I2CMEM_SLAVE_ADDRESS, 0, memory_region_length( machine, "user2" ), memory_region( machine, "user2" ) ); i2cmem_write( machine, 0, I2CMEM_E0, 0 ); i2cmem_write( machine, 0, I2CMEM_E1, 0 ); @@ -936,9 +915,10 @@ static MACHINE_DRIVER_START( twinkle ) MDRV_WATCHDOG_TIME_INIT(MSEC(1200)) /* check TD pin on LTC1232 */ MDRV_MACHINE_RESET( twinkle ) - MDRV_NVRAM_HANDLER( twinkle ) + MDRV_NVRAM_HANDLER( i2cmem_0 ) MDRV_IDE_CONTROLLER_ADD("ide", ide_interrupt) + MDRV_RTC65271_ADD("rtc", NULL) /* video hardware */ MDRV_SCREEN_ADD("mainscreen", RASTER) diff --git a/src/mame/drivers/vicdual.c b/src/mame/drivers/vicdual.c index 26e958b256f..35abef5b5ae 100644 --- a/src/mame/drivers/vicdual.c +++ b/src/mame/drivers/vicdual.c @@ -125,12 +125,6 @@ static INPUT_CHANGED( coin_changed ) * *************************************/ -static int timer_started; -static UINT32 timer_value; - -#define TIMER_HALF_PERIOD ATTOTIME_IN_MSEC(4 / 2) /* 4Mhz square wave */ - - static int get_vcounter(running_machine *machine) { int vcounter = video_screen_get_vpos(machine->primary_screen); @@ -162,22 +156,10 @@ static CUSTOM_INPUT( vicdual_get_composite_blank_comp ) } -static TIMER_CALLBACK( vicdual_timer_callback ) -{ - timer_value = timer_value ^ 1; -} - - static CUSTOM_INPUT( vicdual_get_timer_value ) { - /* start the timer, if this is the first call */ - if (!timer_started) - { - timer_started = 1; - timer_pulse(field->port->machine, TIMER_HALF_PERIOD, NULL, 0, vicdual_timer_callback); - } - - return timer_value; + /* return the state of the timer (old code claims "4MHz square wave", but it was toggled once every 2msec, or 500Hz) */ + return attotime_to_ticks(timer_get_time(field->port->machine), 500) & 1; } |