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author Aaron Giles <aaron@aarongiles.com>2009-07-16 17:14:23 +0000
committer Aaron Giles <aaron@aarongiles.com>2009-07-16 17:14:23 +0000
commit560d8586be91c4a1f860718581ab9dfd6c47dba4 (patch)
tree21815cd037b03a0a24f21b6b25fa5b87135a84b4
parent514e6fb7861cc92edbd6a14102af509a53b662d4 (diff)
Added FP registers to PPC debugger interface.
Fixed copy/paste error in 64-bit backend that takes us from no 3D in scud to glitchy 3D. (Hey, it's an improvement.)
-rw-r--r--src/emu/cpu/drcbex64.c2
-rw-r--r--src/emu/cpu/powerpc/ppc.h35
-rw-r--r--src/emu/cpu/powerpc/ppccom.c102
3 files changed, 138 insertions, 1 deletions
diff --git a/src/emu/cpu/drcbex64.c b/src/emu/cpu/drcbex64.c
index 7cbd8725266..3764272fc61 100644
--- a/src/emu/cpu/drcbex64.c
+++ b/src/emu/cpu/drcbex64.c
@@ -6928,7 +6928,7 @@ static x86code *op_fabs(drcbe_state *drcbe, x86code *dst, const drcuml_instructi
{
emit_movsd_r128_p64(drcbe, &dst, dstreg, &srcp); // movsd dstreg,srcp
emit_andpd_r128_m128(&dst, dstreg, MABS(drcbe, drcbe->absmask64)); // andpd dstreg,[absmask64]
- emit_movsd_p64_r128(drcbe, &dst, &srcp, dstreg); // movsd dstp,dstreg
+ emit_movsd_p64_r128(drcbe, &dst, &dstp, dstreg); // movsd dstp,dstreg
}
return dst;
}
diff --git a/src/emu/cpu/powerpc/ppc.h b/src/emu/cpu/powerpc/ppc.h
index 6d6da615272..0e0f63488ae 100644
--- a/src/emu/cpu/powerpc/ppc.h
+++ b/src/emu/cpu/powerpc/ppc.h
@@ -77,6 +77,41 @@ enum
PPC_LR,
PPC_CTR,
PPC_XER,
+
+ PPC_F0,
+ PPC_F1,
+ PPC_F2,
+ PPC_F3,
+ PPC_F4,
+ PPC_F5,
+ PPC_F6,
+ PPC_F7,
+ PPC_F8,
+ PPC_F9,
+ PPC_F10,
+ PPC_F11,
+ PPC_F12,
+ PPC_F13,
+ PPC_F14,
+ PPC_F15,
+ PPC_F16,
+ PPC_F17,
+ PPC_F18,
+ PPC_F19,
+ PPC_F20,
+ PPC_F21,
+ PPC_F22,
+ PPC_F23,
+ PPC_F24,
+ PPC_F25,
+ PPC_F26,
+ PPC_F27,
+ PPC_F28,
+ PPC_F29,
+ PPC_F30,
+ PPC_F31,
+ PPC_FPSCR,
+
PPC_MSR,
PPC_SRR0,
PPC_SRR1,
diff --git a/src/emu/cpu/powerpc/ppccom.c b/src/emu/cpu/powerpc/ppccom.c
index 11abfb5ca10..9fb9c5cf4c3 100644
--- a/src/emu/cpu/powerpc/ppccom.c
+++ b/src/emu/cpu/powerpc/ppccom.c
@@ -1223,6 +1223,40 @@ void ppccom_set_info(powerpc_state *ppc, UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + PPC_R30: ppc->r[30] = info->i; break;
case CPUINFO_INT_SP:
case CPUINFO_INT_REGISTER + PPC_R31: ppc->r[31] = info->i; break;
+
+ case CPUINFO_INT_REGISTER + PPC_F0: ppc->f[0] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F1: ppc->f[1] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F2: ppc->f[2] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F3: ppc->f[3] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F4: ppc->f[4] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F5: ppc->f[5] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F6: ppc->f[6] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F7: ppc->f[7] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F8: ppc->f[8] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F9: ppc->f[9] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F10: ppc->f[10] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F11: ppc->f[11] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F12: ppc->f[12] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F13: ppc->f[13] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F14: ppc->f[14] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F15: ppc->f[15] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F16: ppc->f[16] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F17: ppc->f[17] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F18: ppc->f[18] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F19: ppc->f[19] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F20: ppc->f[20] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F21: ppc->f[21] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F22: ppc->f[22] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F23: ppc->f[23] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F24: ppc->f[24] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F25: ppc->f[25] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F26: ppc->f[26] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F27: ppc->f[27] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F28: ppc->f[28] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F29: ppc->f[29] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F30: ppc->f[30] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F31: ppc->f[31] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_FPSCR: ppc->fpscr = info->i; break;
}
}
@@ -1314,6 +1348,40 @@ void ppccom_get_info(powerpc_state *ppc, UINT32 state, cpuinfo *info)
case CPUINFO_INT_SP:
case CPUINFO_INT_REGISTER + PPC_R31: info->i = ppc->r[31]; break;
+ case CPUINFO_INT_REGISTER + PPC_F0: info->i = *(UINT64 *)&ppc->f[0]; break;
+ case CPUINFO_INT_REGISTER + PPC_F1: info->i = *(UINT64 *)&ppc->f[1]; break;
+ case CPUINFO_INT_REGISTER + PPC_F2: info->i = *(UINT64 *)&ppc->f[2]; break;
+ case CPUINFO_INT_REGISTER + PPC_F3: info->i = *(UINT64 *)&ppc->f[3]; break;
+ case CPUINFO_INT_REGISTER + PPC_F4: info->i = *(UINT64 *)&ppc->f[4]; break;
+ case CPUINFO_INT_REGISTER + PPC_F5: info->i = *(UINT64 *)&ppc->f[5]; break;
+ case CPUINFO_INT_REGISTER + PPC_F6: info->i = *(UINT64 *)&ppc->f[6]; break;
+ case CPUINFO_INT_REGISTER + PPC_F7: info->i = *(UINT64 *)&ppc->f[7]; break;
+ case CPUINFO_INT_REGISTER + PPC_F8: info->i = *(UINT64 *)&ppc->f[8]; break;
+ case CPUINFO_INT_REGISTER + PPC_F9: info->i = *(UINT64 *)&ppc->f[9]; break;
+ case CPUINFO_INT_REGISTER + PPC_F10: info->i = *(UINT64 *)&ppc->f[10]; break;
+ case CPUINFO_INT_REGISTER + PPC_F11: info->i = *(UINT64 *)&ppc->f[11]; break;
+ case CPUINFO_INT_REGISTER + PPC_F12: info->i = *(UINT64 *)&ppc->f[12]; break;
+ case CPUINFO_INT_REGISTER + PPC_F13: info->i = *(UINT64 *)&ppc->f[13]; break;
+ case CPUINFO_INT_REGISTER + PPC_F14: info->i = *(UINT64 *)&ppc->f[14]; break;
+ case CPUINFO_INT_REGISTER + PPC_F15: info->i = *(UINT64 *)&ppc->f[15]; break;
+ case CPUINFO_INT_REGISTER + PPC_F16: info->i = *(UINT64 *)&ppc->f[16]; break;
+ case CPUINFO_INT_REGISTER + PPC_F17: info->i = *(UINT64 *)&ppc->f[17]; break;
+ case CPUINFO_INT_REGISTER + PPC_F18: info->i = *(UINT64 *)&ppc->f[18]; break;
+ case CPUINFO_INT_REGISTER + PPC_F19: info->i = *(UINT64 *)&ppc->f[19]; break;
+ case CPUINFO_INT_REGISTER + PPC_F20: info->i = *(UINT64 *)&ppc->f[20]; break;
+ case CPUINFO_INT_REGISTER + PPC_F21: info->i = *(UINT64 *)&ppc->f[21]; break;
+ case CPUINFO_INT_REGISTER + PPC_F22: info->i = *(UINT64 *)&ppc->f[22]; break;
+ case CPUINFO_INT_REGISTER + PPC_F23: info->i = *(UINT64 *)&ppc->f[23]; break;
+ case CPUINFO_INT_REGISTER + PPC_F24: info->i = *(UINT64 *)&ppc->f[24]; break;
+ case CPUINFO_INT_REGISTER + PPC_F25: info->i = *(UINT64 *)&ppc->f[25]; break;
+ case CPUINFO_INT_REGISTER + PPC_F26: info->i = *(UINT64 *)&ppc->f[26]; break;
+ case CPUINFO_INT_REGISTER + PPC_F27: info->i = *(UINT64 *)&ppc->f[27]; break;
+ case CPUINFO_INT_REGISTER + PPC_F28: info->i = *(UINT64 *)&ppc->f[28]; break;
+ case CPUINFO_INT_REGISTER + PPC_F29: info->i = *(UINT64 *)&ppc->f[29]; break;
+ case CPUINFO_INT_REGISTER + PPC_F30: info->i = *(UINT64 *)&ppc->f[30]; break;
+ case CPUINFO_INT_REGISTER + PPC_F31: info->i = *(UINT64 *)&ppc->f[31]; break;
+ case CPUINFO_INT_REGISTER + PPC_FPSCR: info->i = ppc->fpscr; break;
+
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_FCT_SET_INFO: /* provided by core */ break;
case CPUINFO_FCT_INIT: /* provided by core */ break;
@@ -1386,6 +1454,40 @@ void ppccom_get_info(powerpc_state *ppc, UINT32 state, cpuinfo *info)
case CPUINFO_STR_REGISTER + PPC_R29: sprintf(info->s, "R29:%08X", ppc->r[29]); break;
case CPUINFO_STR_REGISTER + PPC_R30: sprintf(info->s, "R30:%08X", ppc->r[30]); break;
case CPUINFO_STR_REGISTER + PPC_R31: sprintf(info->s, "R31:%08X", ppc->r[31]); break;
+
+ case CPUINFO_STR_REGISTER + PPC_F0: sprintf(info->s, "F0: %12f", ppc->f[0]); break;
+ case CPUINFO_STR_REGISTER + PPC_F1: sprintf(info->s, "F1: %12f", ppc->f[1]); break;
+ case CPUINFO_STR_REGISTER + PPC_F2: sprintf(info->s, "F2: %12f", ppc->f[2]); break;
+ case CPUINFO_STR_REGISTER + PPC_F3: sprintf(info->s, "F3: %12f", ppc->f[3]); break;
+ case CPUINFO_STR_REGISTER + PPC_F4: sprintf(info->s, "F4: %12f", ppc->f[4]); break;
+ case CPUINFO_STR_REGISTER + PPC_F5: sprintf(info->s, "F5: %12f", ppc->f[5]); break;
+ case CPUINFO_STR_REGISTER + PPC_F6: sprintf(info->s, "F6: %12f", ppc->f[6]); break;
+ case CPUINFO_STR_REGISTER + PPC_F7: sprintf(info->s, "F7: %12f", ppc->f[7]); break;
+ case CPUINFO_STR_REGISTER + PPC_F8: sprintf(info->s, "F8: %12f", ppc->f[8]); break;
+ case CPUINFO_STR_REGISTER + PPC_F9: sprintf(info->s, "F9: %12f", ppc->f[9]); break;
+ case CPUINFO_STR_REGISTER + PPC_F10: sprintf(info->s, "F10:%12f", ppc->f[10]); break;
+ case CPUINFO_STR_REGISTER + PPC_F11: sprintf(info->s, "F11:%12f", ppc->f[11]); break;
+ case CPUINFO_STR_REGISTER + PPC_F12: sprintf(info->s, "F12:%12f", ppc->f[12]); break;
+ case CPUINFO_STR_REGISTER + PPC_F13: sprintf(info->s, "F13:%12f", ppc->f[13]); break;
+ case CPUINFO_STR_REGISTER + PPC_F14: sprintf(info->s, "F14:%12f", ppc->f[14]); break;
+ case CPUINFO_STR_REGISTER + PPC_F15: sprintf(info->s, "F15:%12f", ppc->f[15]); break;
+ case CPUINFO_STR_REGISTER + PPC_F16: sprintf(info->s, "F16:%12f", ppc->f[16]); break;
+ case CPUINFO_STR_REGISTER + PPC_F17: sprintf(info->s, "F17:%12f", ppc->f[17]); break;
+ case CPUINFO_STR_REGISTER + PPC_F18: sprintf(info->s, "F18:%12f", ppc->f[18]); break;
+ case CPUINFO_STR_REGISTER + PPC_F19: sprintf(info->s, "F19:%12f", ppc->f[19]); break;
+ case CPUINFO_STR_REGISTER + PPC_F20: sprintf(info->s, "F20:%12f", ppc->f[20]); break;
+ case CPUINFO_STR_REGISTER + PPC_F21: sprintf(info->s, "F21:%12f", ppc->f[21]); break;
+ case CPUINFO_STR_REGISTER + PPC_F22: sprintf(info->s, "F22:%12f", ppc->f[22]); break;
+ case CPUINFO_STR_REGISTER + PPC_F23: sprintf(info->s, "F23:%12f", ppc->f[23]); break;
+ case CPUINFO_STR_REGISTER + PPC_F24: sprintf(info->s, "F24:%12f", ppc->f[24]); break;
+ case CPUINFO_STR_REGISTER + PPC_F25: sprintf(info->s, "F25:%12f", ppc->f[25]); break;
+ case CPUINFO_STR_REGISTER + PPC_F26: sprintf(info->s, "F26:%12f", ppc->f[26]); break;
+ case CPUINFO_STR_REGISTER + PPC_F27: sprintf(info->s, "F27:%12f", ppc->f[27]); break;
+ case CPUINFO_STR_REGISTER + PPC_F28: sprintf(info->s, "F28:%12f", ppc->f[28]); break;
+ case CPUINFO_STR_REGISTER + PPC_F29: sprintf(info->s, "F29:%12f", ppc->f[29]); break;
+ case CPUINFO_STR_REGISTER + PPC_F30: sprintf(info->s, "F30:%12f", ppc->f[30]); break;
+ case CPUINFO_STR_REGISTER + PPC_F31: sprintf(info->s, "F31:%12f", ppc->f[31]); break;
+ case CPUINFO_STR_REGISTER + PPC_FPSCR: sprintf(info->s, "FPSCR:%08X", ppc->fpscr); break;
}
}