diff options
author | Angelo Salese <angelosa@users.noreply.github.com> | 2009-06-21 23:19:14 +0000 |
---|---|---|
committer | Angelo Salese <angelosa@users.noreply.github.com> | 2009-06-21 23:19:14 +0000 |
commit | e0473bb579425c13cd875d1b48ec1e6ab0486ae0 (patch) | |
tree | d5528cb5766928dad44ab5736ddf30af91af9e63 | |
parent | 23d8a233082cb6a5cb315c8fdbf5b76dc451cc3f (diff) |
mc68hc11: Added LSRA, LSRB, DEC EXT, BLS, NEGA, NEGB, BHI
-rw-r--r-- | src/emu/cpu/mc68hc11/hc11ops.c | 92 | ||||
-rw-r--r-- | src/emu/cpu/mc68hc11/hc11ops.h | 13 | ||||
-rw-r--r-- | src/mame/drivers/hitpoker.c | 54 |
3 files changed, 137 insertions, 22 deletions
diff --git a/src/emu/cpu/mc68hc11/hc11ops.c b/src/emu/cpu/mc68hc11/hc11ops.c index 36b7715b60a..ff572397425 100644 --- a/src/emu/cpu/mc68hc11/hc11ops.c +++ b/src/emu/cpu/mc68hc11/hc11ops.c @@ -824,6 +824,18 @@ static void HC11OP(beq)(hc11_state *cpustate) } +/* BHI 0x22 */ +static void HC11OP(bhi)(hc11_state *cpustate) +{ + INT8 rel = FETCH(cpustate); + if (((cpustate->ccr & CC_C) == 0) && ((cpustate->ccr & CC_Z) == 0)) /* Branch if C and Z flag clear */ + { + SET_PC(cpustate, cpustate->ppc + rel + 2); + } + CYCLES(cpustate, 3); +} + + /* BNE 0x26 */ static void HC11OP(bne)(hc11_state *cpustate) { @@ -849,6 +861,17 @@ static void HC11OP(ble)(hc11_state *cpustate) CYCLES(cpustate, 3); } +/* BLS 0x23 */ +static void HC11OP(bls)(hc11_state *cpustate) +{ + INT8 rel = FETCH(cpustate); + if (cpustate->ccr & CC_C || cpustate->ccr & CC_Z) /* Branch if C or Z flag set */ + { + SET_PC(cpustate, cpustate->ppc + rel + 2); + } + CYCLES(cpustate, 3); +} + /* BMI 0x2B */ static void HC11OP(bmi)(hc11_state *cpustate) { @@ -1485,6 +1508,22 @@ static void HC11OP(decb)(hc11_state *cpustate) CYCLES(cpustate, 2); } +/* DEC EXT 0x7A */ +static void HC11OP(dec_ext)(hc11_state *cpustate) +{ + UINT16 adr = FETCH16(cpustate); + UINT8 i = READ8(cpustate, adr); + + CLEAR_NZV(cpustate); + if (i == 0x80) + SET_VFLAG(cpustate); + i--; + SET_N8(i); + SET_Z8(i); + WRITE8(cpustate, adr, i); + CYCLES(cpustate, 6); +} + /* DEX 0x09 */ static void HC11OP(dex)(hc11_state *cpustate) { @@ -2123,6 +2162,32 @@ static void HC11OP(lsld)(hc11_state *cpustate) CYCLES(cpustate, 3); } +/* LSRA 0x44 */ +static void HC11OP(lsra)(hc11_state *cpustate) +{ + UINT16 r = REG_A >> 1; + CLEAR_NZVC(cpustate); + cpustate->ccr |= (REG_A & 1) ? CC_C : 0; + REG_A = (UINT8)(r); + cpustate->ccr |= ((cpustate->ccr & CC_C) == CC_C) ? CC_V : 0; + SET_Z8(REG_A); + + CYCLES(cpustate, 2); +} + +/* LSRB 0x54 */ +static void HC11OP(lsrb)(hc11_state *cpustate) +{ + UINT16 r = REG_B >> 1; + CLEAR_NZVC(cpustate); + cpustate->ccr |= (REG_B & 1) ? CC_C : 0; + REG_B = (UINT8)(r); + cpustate->ccr |= ((cpustate->ccr & CC_C) == CC_C) ? CC_V : 0; + SET_Z8(REG_B); + + CYCLES(cpustate, 2); +} + /* LSRD 0x04 */ static void HC11OP(lsrd)(hc11_state *cpustate) { @@ -2148,6 +2213,33 @@ static void HC11OP(mul)(hc11_state *cpustate) CYCLES(cpustate, 10); } +/* NEGA 0x40 */ +static void HC11OP(nega)(hc11_state *cpustate) +{ + INT8 r = 0x00 - REG_A; + REG_A = r; + CLEAR_NZVC(cpustate); + SET_N8(r); + SET_Z8(r); + cpustate->ccr |= (REG_A == 0x80) ? CC_V : 0; + cpustate->ccr |= (REG_A == 0x00) ? CC_C : 0; + CYCLES(cpustate, 2); +} + +/* NEGB 0x50 */ +static void HC11OP(negb)(hc11_state *cpustate) +{ + INT8 r = 0x00 - REG_B; + REG_B = r; + CLEAR_NZVC(cpustate); + SET_N8(r); + SET_Z8(r); + cpustate->ccr |= (REG_B == 0x80) ? CC_V : 0; + cpustate->ccr |= (REG_B == 0x00) ? CC_C : 0; + CYCLES(cpustate, 2); +} + + /* NOP 0x01 */ static void HC11OP(nop)(hc11_state *cpustate) { diff --git a/src/emu/cpu/mc68hc11/hc11ops.h b/src/emu/cpu/mc68hc11/hc11ops.h index e609e01bff3..feedf0fb100 100644 --- a/src/emu/cpu/mc68hc11/hc11ops.h +++ b/src/emu/cpu/mc68hc11/hc11ops.h @@ -65,6 +65,7 @@ static const hc11_opcode_list_struct hc11_opcode_list[] = { 0, 0x27, HC11OP(beq) }, // { 0, 0x2c, HC11OP(bge) }, // { 0, 0x2e, HC11OP(bgt) }, + { 0, 0x22, HC11OP(bhi) }, { 0, 0x85, HC11OP(bita_imm) }, { 0, 0x95, HC11OP(bita_dir) }, { 0, 0xb5, HC11OP(bita_ext) }, @@ -76,7 +77,7 @@ static const hc11_opcode_list_struct hc11_opcode_list[] = { 0, 0xe5, HC11OP(bitb_indx) }, { 0x18, 0xe5, HC11OP(bitb_indy) }, { 0, 0x2f, HC11OP(ble) }, -// { 0, 0x23, HC11OP(bls) }, + { 0, 0x23, HC11OP(bls) }, // { 0, 0x2d, HC11OP(blt) }, { 0, 0x2b, HC11OP(bmi) }, { 0, 0x26, HC11OP(bne) }, @@ -137,7 +138,7 @@ static const hc11_opcode_list_struct hc11_opcode_list[] = // { 0, 0x19, HC11OP(daa) }, { 0, 0x4a, HC11OP(deca) }, { 0, 0x5a, HC11OP(decb) }, -// { 0, 0x7a, HC11OP(dec_ext) }, + { 0, 0x7a, HC11OP(dec_ext) }, // { 0, 0x6a, HC11OP(dec_indx) }, // { 0x18, 0x6a, HC11OP(dec_indy) }, // { 0, 0x34, HC11OP(des) }, @@ -201,15 +202,15 @@ static const hc11_opcode_list_struct hc11_opcode_list[] = { 0x1a, 0xee, HC11OP(ldy_indx) }, { 0x18, 0xee, HC11OP(ldy_indy) }, { 0, 0x05, HC11OP(lsld) }, -// { 0, 0x44, HC11OP(lsra) }, -// { 0, 0x54, HC11OP(lsrb) }, + { 0, 0x44, HC11OP(lsra) }, + { 0, 0x54, HC11OP(lsrb) }, // { 0, 0x74, HC11OP(lsr_ext) }, // { 0, 0x64, HC11OP(lsr_indx) }, // { 0x18, 0x64, HC11OP(lsr_indy) }, { 0, 0x04, HC11OP(lsrd) }, { 0, 0x3d, HC11OP(mul) }, -// { 0, 0x40, HC11OP(nega) }, -// { 0, 0x50, HC11OP(negb) }, + { 0, 0x40, HC11OP(nega) }, + { 0, 0x50, HC11OP(negb) }, // { 0, 0x70, HC11OP(neg_ext) }, // { 0, 0x60, HC11OP(neg_indx) }, // { 0x18, 0x60, HC11OP(neg_indy) }, diff --git a/src/mame/drivers/hitpoker.c b/src/mame/drivers/hitpoker.c index f620b412d8f..e3dc560c06f 100644 --- a/src/mame/drivers/hitpoker.c +++ b/src/mame/drivers/hitpoker.c @@ -7,6 +7,7 @@ Many thanks to Olivier Galibert for the CPU identify effort ;-) TODO: - Fix the CPU core bugs! (too many to list) +- at some point it jumps to illegal ROM addresses, why? - video HW looks awkward; - paletteram format is wrong; - sound; @@ -63,9 +64,10 @@ Some debug tricks (let's test this CPU as more as possible): #include "driver.h" #include "cpu/mc68hc11/mc68hc11.h" +#include "sound/ay8910.h" -static UINT8 *work_ram; static UINT8 *hitpoker_sys_regs; +static UINT8 hitpoker_pic_data; VIDEO_START(hitpoker) { @@ -99,22 +101,11 @@ VIDEO_UPDATE(hitpoker) return 0; } -/* It wants that the even/odd memory is equal for this, 8-bit vram on a 16-bit wide bus? */ -static READ8_HANDLER( hitpoker_work_ram_r ) -{ - return work_ram[offset & ~1]; -} - -static WRITE8_HANDLER( hitpoker_work_ram_w ) -{ - work_ram[offset & ~1] = data; -} - static READ8_HANDLER( hitpoker_vram_r ) { UINT8 *ROM = memory_region(space->machine, "maincpu"); - if(hitpoker_sys_regs[0x00] & 0x10) + if(hitpoker_pic_data & 0x10) return videoram[offset]; else return ROM[offset+0x8000]; @@ -132,7 +123,7 @@ static READ8_HANDLER( hitpoker_cram_r ) { UINT8 *ROM = memory_region(space->machine, "maincpu"); - if(hitpoker_sys_regs[0x00] & 0x10) + if(hitpoker_pic_data & 0x10) return paletteram[offset]; else return ROM[offset+0xbf00]; @@ -174,15 +165,37 @@ static READ8_HANDLER( rtc_r ) return 0x80; //kludge it for now } +static READ8_HANDLER( hitpoker_pic_r ) +{ +// logerror("R\n"); + + if(cpu_get_pc(space->cpu) == 0x3143 || + cpu_get_pc(space->cpu) == 0x314e || + cpu_get_pc(space->cpu) == 0x3164 || + cpu_get_pc(space->cpu) == 0x3179) + return hitpoker_pic_data; + + return (hitpoker_pic_data & 0x7f) | (hitpoker_pic_data & 0x40 ? 0x80 : 0x00); +} + +static WRITE8_HANDLER( hitpoker_pic_w ) +{ + hitpoker_pic_data = (data & 0xff);// | (data & 0x40) ? 0x80 : 0x00; +// logerror("%02x W\n",data); +} + /* overlap empty rom addresses */ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x00ff) AM_RAM // stack ram + AM_RANGE(0x1000, 0x1000) AM_READWRITE(hitpoker_pic_r,hitpoker_pic_w) // protection AM_RANGE(0x1000, 0x103f) AM_RAM AM_BASE(&hitpoker_sys_regs) // hw regs? AM_RANGE(0x8000, 0xb5ff) AM_READWRITE(hitpoker_vram_r,hitpoker_vram_w) AM_RANGE(0xb600, 0xbdff) AM_RAM + AM_RANGE(0xbe0c, 0xbe0c) AM_READNOP //irq ack? AM_RANGE(0xbe0d, 0xbe0d) AM_READ(rtc_r) +// AM_RANGE(0xbe0a, 0xbe5f) AM_READ(test_r) AM_RANGE(0xbe80, 0xbe81) AM_WRITE(hitpoker_crtc_w) - AM_RANGE(0xbe90, 0xbe91) AM_READWRITE(hitpoker_work_ram_r,hitpoker_work_ram_w) AM_BASE(&work_ram) //??? + AM_RANGE(0xbe90, 0xbe91) AM_DEVREADWRITE("ay", ay8910_r,ay8910_address_data_w) AM_RANGE(0xbea0, 0xbea0) AM_READ_PORT("VBLANK") //probably other bits as well AM_RANGE(0xc000, 0xefff) AM_READWRITE(hitpoker_cram_r,hitpoker_cram_w) AM_RANGE(0x0000, 0xbdff) AM_ROM @@ -194,6 +207,9 @@ ADDRESS_MAP_END static INPUT_PORTS_START( hitpoker ) PORT_START("VBLANK") + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) //scanline counter probably + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK ) INPUT_PORTS_END @@ -235,6 +251,12 @@ static MACHINE_DRIVER_START( hitpoker ) MDRV_VIDEO_START(hitpoker) MDRV_VIDEO_UPDATE(hitpoker) + + MDRV_SPEAKER_STANDARD_MONO("mono") + + MDRV_SOUND_ADD("ay", AY8910, 1500000) +// MDRV_SOUND_CONFIG(ay8910_config) + MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50) MACHINE_DRIVER_END DRIVER_INIT(hitpoker) @@ -273,7 +295,7 @@ DRIVER_INIT(hitpoker) ROM_START( hitpoker ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "u4.bin", 0x0000, 0x10000, CRC(0016497a) SHA1(017320bfe05fea8a48e26a66c0412415846cee7c) ) + ROM_LOAD( "u4.bin", 0x00000, 0x10000, CRC(0016497a) SHA1(017320bfe05fea8a48e26a66c0412415846cee7c) ) ROM_REGION( 0x100000, "gfx1", 0 ) // tile 0x4c8 seems to contain something non-gfx related, could be tilemap / colour data, check! ROM_LOAD16_BYTE( "u42.bin", 0x00001, 0x40000, CRC(cbe56fec) SHA1(129bfd10243eaa7fb6a087f96de90228e6030353) ) |