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authorGravatarGravatar Aaron Giles <aaron@aarongiles.com>2009-03-07 22:59:34 +0000
committerGravatarGravatar Aaron Giles <aaron@aarongiles.com>2009-03-07 22:59:34 +0000
commita97f308b83a900eff947d73f20a01bf8ec30eb8f (patch)
tree6b83ba186659d1cdd381424b2a61955f0b9baf16
parent3004ebc740d8b42037164dedfbb1ecd731f50e04 (diff)
Converted PowerPC SET_INFOs to direct calls.
-rw-r--r--src/emu/cpu/powerpc/ppc.h49
-rw-r--r--src/emu/cpu/powerpc/ppccom.c28
-rw-r--r--src/emu/cpu/powerpc/ppcdrc.c69
-rw-r--r--src/mame/drivers/firebeat.c8
-rw-r--r--src/mame/drivers/gticlub.c8
-rw-r--r--src/mame/drivers/hornet.c8
-rw-r--r--src/mame/drivers/model3.c8
-rw-r--r--src/mame/drivers/nwk-tr.c8
-rw-r--r--src/mame/drivers/ultrsprt.c15
-rw-r--r--src/mame/drivers/zr107.c8
10 files changed, 96 insertions, 113 deletions
diff --git a/src/emu/cpu/powerpc/ppc.h b/src/emu/cpu/powerpc/ppc.h
index ad9af018360..6d6da615272 100644
--- a/src/emu/cpu/powerpc/ppc.h
+++ b/src/emu/cpu/powerpc/ppc.h
@@ -95,29 +95,6 @@ enum
};
-/* interface extensions */
-enum
-{
- CPUINFO_INT_PPC_DRC_OPTIONS = CPUINFO_INT_CPU_SPECIFIC,
-
- CPUINFO_INT_PPC_FASTRAM_SELECT,
- CPUINFO_INT_PPC_FASTRAM_START,
- CPUINFO_INT_PPC_FASTRAM_END,
- CPUINFO_INT_PPC_FASTRAM_READONLY,
-
- CPUINFO_INT_PPC_HOTSPOT_SELECT,
- CPUINFO_INT_PPC_HOTSPOT_PC,
- CPUINFO_INT_PPC_HOTSPOT_OPCODE,
- CPUINFO_INT_PPC_HOTSPOT_CYCLES,
-
- CPUINFO_INT_PPC_RX_DATA,
-
- CPUINFO_PTR_PPC_FASTRAM_BASE = CPUINFO_PTR_CPU_SPECIFIC,
-
- CPUINFO_FCT_SPU_TX_HANDLER = CPUINFO_FCT_CPU_SPECIFIC
-};
-
-
/* compiler-specific options */
#define PPCDRC_STRICT_VERIFY 0x0001 /* verify all instructions */
#define PPCDRC_FLUSH_PC 0x0002 /* flush the PC value before each memory access */
@@ -148,6 +125,14 @@ struct _powerpc_config
PUBLIC FUNCTIONS
***************************************************************************/
+void ppcdrc_set_options(const device_config *device, UINT32 options);
+void ppcdrc_add_fastram(const device_config *device, offs_t start, offs_t end, UINT8 readonly, void *base);
+void ppcdrc_add_hotspot(const device_config *device, offs_t pc, UINT32 opcode, UINT32 cycles);
+
+void ppc4xx_spu_set_tx_handler(const device_config *device, ppc4xx_spu_tx_handler handler);
+void ppc4xx_spu_receive_byte(const device_config *device, UINT8 byteval);
+
+
CPU_GET_INFO( ppc403ga );
#define CPU_PPC403GA CPU_GET_INFO_NAME( ppc403ga )
@@ -176,22 +161,4 @@ CPU_GET_INFO( mpc8240 );
#define CPU_MPC8240 CPU_GET_INFO_NAME( mpc8240 )
-
-/***************************************************************************
- INLINE FUNCTIONS
-***************************************************************************/
-
-INLINE void ppc4xx_spu_set_tx_handler(const device_config *cpu, ppc4xx_spu_tx_handler handler)
-{
- device_set_info_fct(cpu, CPUINFO_FCT_SPU_TX_HANDLER, (genf *)handler);
-}
-
-
-INLINE void ppc4xx_spu_receive_byte(const device_config *cpu, UINT8 byteval)
-{
- device_set_info_int(cpu, CPUINFO_INT_PPC_RX_DATA, byteval);
-}
-
-
-
#endif /* __PPC_H__ */
diff --git a/src/emu/cpu/powerpc/ppccom.c b/src/emu/cpu/powerpc/ppccom.c
index e0592b96be7..b2f7b146a2c 100644
--- a/src/emu/cpu/powerpc/ppccom.c
+++ b/src/emu/cpu/powerpc/ppccom.c
@@ -1812,6 +1812,30 @@ ADDRESS_MAP_END
/*-------------------------------------------------
+ ppc4xx_spu_set_tx_handler - PowerPC 4XX-
+ specific TX handler configuration
+-------------------------------------------------*/
+
+void ppc4xx_spu_set_tx_handler(const device_config *device, ppc4xx_spu_tx_handler handler)
+{
+ powerpc_state *ppc = *(powerpc_state **)device->token;
+ ppc->spu.tx_handler = handler;
+}
+
+
+/*-------------------------------------------------
+ ppc4xx_spu_receive_byte - PowerPC 4XX-
+ specific serial byte receive
+-------------------------------------------------*/
+
+void ppc4xx_spu_receive_byte(const device_config *device, UINT8 byteval)
+{
+ powerpc_state *ppc = *(powerpc_state **)device->token;
+ ppc4xx_spu_rx_data(ppc, byteval);
+}
+
+
+/*-------------------------------------------------
ppc4xx_set_info - PowerPC 4XX-specific
information setter
-------------------------------------------------*/
@@ -1826,10 +1850,6 @@ void ppc4xx_set_info(powerpc_state *ppc, UINT32 state, cpuinfo *info)
case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_2: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT2, info->i); break;
case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_3: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT3, info->i); break;
case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_4: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT4, info->i); break;
- case CPUINFO_INT_PPC_RX_DATA: ppc4xx_spu_rx_data(ppc, info->i); break;
-
- /* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SPU_TX_HANDLER: ppc->spu.tx_handler = (ppc4xx_spu_tx_handler)info->f; break;
/* --- everything else is handled generically --- */
default: ppccom_set_info(ppc, state, info); break;
diff --git a/src/emu/cpu/powerpc/ppcdrc.c b/src/emu/cpu/powerpc/ppcdrc.c
index cacc4c96996..1a561313e80 100644
--- a/src/emu/cpu/powerpc/ppcdrc.c
+++ b/src/emu/cpu/powerpc/ppcdrc.c
@@ -764,27 +764,9 @@ static CPU_DISASSEMBLE( ppcdrc )
static CPU_SET_INFO( ppcdrc )
{
powerpc_state *ppc = *(powerpc_state **)device->token;
- switch (state)
- {
- /* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_PPC_DRC_OPTIONS: ppc->impstate->drcoptions = info->i; break;
-
- case CPUINFO_INT_PPC_FASTRAM_SELECT: if (info->i >= 0 && info->i < PPC_MAX_FASTRAM) ppc->impstate->fastram_select = info->i; ppc->impstate->cache_dirty = TRUE; break;
- case CPUINFO_INT_PPC_FASTRAM_START: ppc->impstate->fastram[ppc->impstate->fastram_select].start = info->i; ppc->impstate->cache_dirty = TRUE; break;
- case CPUINFO_INT_PPC_FASTRAM_END: ppc->impstate->fastram[ppc->impstate->fastram_select].end = info->i; ppc->impstate->cache_dirty = TRUE; break;
- case CPUINFO_INT_PPC_FASTRAM_READONLY: ppc->impstate->fastram[ppc->impstate->fastram_select].readonly = info->i; ppc->impstate->cache_dirty = TRUE; break;
-
- case CPUINFO_INT_PPC_HOTSPOT_SELECT: if (info->i >= 0 && info->i < PPC_MAX_HOTSPOTS) ppc->impstate->hotspot_select = info->i; ppc->impstate->cache_dirty = TRUE; break;
- case CPUINFO_INT_PPC_HOTSPOT_PC: ppc->impstate->hotspot[ppc->impstate->hotspot_select].pc = info->i; ppc->impstate->cache_dirty = TRUE; break;
- case CPUINFO_INT_PPC_HOTSPOT_OPCODE: ppc->impstate->hotspot[ppc->impstate->hotspot_select].opcode = info->i; ppc->impstate->cache_dirty = TRUE; break;
- case CPUINFO_INT_PPC_HOTSPOT_CYCLES: ppc->impstate->hotspot[ppc->impstate->hotspot_select].cycles = info->i; ppc->impstate->cache_dirty = TRUE; break;
-
- /* --- the following bits of info are set as pointers to data or functions --- */
- case CPUINFO_PTR_PPC_FASTRAM_BASE: ppc->impstate->fastram[ppc->impstate->fastram_select].base = info->p; break;
- /* --- everything else is handled generically --- */
- default: ppccom_set_info(ppc, state, info); break;
- }
+ /* --- everything is handled generically --- */
+ ppccom_set_info(ppc, state, info);
}
@@ -820,6 +802,53 @@ static CPU_GET_INFO( ppcdrc )
}
+/*-------------------------------------------------
+ ppcdrc_set_options - configure DRC options
+-------------------------------------------------*/
+
+void ppcdrc_set_options(const device_config *device, UINT32 options)
+{
+ powerpc_state *ppc = *(powerpc_state **)device->token;
+ ppc->impstate->drcoptions = options;
+}
+
+
+/*-------------------------------------------------
+ ppcdrc_add_fastram - add a new fastram
+ region
+-------------------------------------------------*/
+
+void ppcdrc_add_fastram(const device_config *device, offs_t start, offs_t end, UINT8 readonly, void *base)
+{
+ powerpc_state *ppc = *(powerpc_state **)device->token;
+ if (ppc->impstate->fastram_select < ARRAY_LENGTH(ppc->impstate->fastram))
+ {
+ ppc->impstate->fastram[ppc->impstate->fastram_select].start = start;
+ ppc->impstate->fastram[ppc->impstate->fastram_select].end = end;
+ ppc->impstate->fastram[ppc->impstate->fastram_select].readonly = readonly;
+ ppc->impstate->fastram[ppc->impstate->fastram_select].base = base;
+ ppc->impstate->fastram_select++;
+ }
+}
+
+
+/*-------------------------------------------------
+ ppcdrc_add_hotspot - add a new hotspot
+-------------------------------------------------*/
+
+void ppcdrc_add_hotspot(const device_config *device, offs_t pc, UINT32 opcode, UINT32 cycles)
+{
+ powerpc_state *ppc = *(powerpc_state **)device->token;
+ if (ppc->impstate->hotspot_select < ARRAY_LENGTH(ppc->impstate->hotspot))
+ {
+ ppc->impstate->hotspot[ppc->impstate->hotspot_select].pc = pc;
+ ppc->impstate->hotspot[ppc->impstate->hotspot_select].opcode = opcode;
+ ppc->impstate->hotspot[ppc->impstate->hotspot_select].cycles = cycles;
+ ppc->impstate->hotspot_select++;
+ }
+}
+
+
/***************************************************************************
CACHE MANAGEMENT
diff --git a/src/mame/drivers/firebeat.c b/src/mame/drivers/firebeat.c
index 50e1ab39099..ec3a7c95671 100644
--- a/src/mame/drivers/firebeat.c
+++ b/src/mame/drivers/firebeat.c
@@ -1733,14 +1733,10 @@ static UINT32 *work_ram;
static MACHINE_START( firebeat )
{
/* set conservative DRC options */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS);
+ ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS);
/* configure fast RAM regions for DRC */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_END, 0x01ffffff);
- device_set_info_ptr(machine->cpu[0], CPUINFO_PTR_PPC_FASTRAM_BASE, work_ram);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
+ ppcdrc_add_fastram(machine->cpu[0], 0x00000000, 0x01ffffff, FALSE, work_ram);
}
static ADDRESS_MAP_START( firebeat_map, ADDRESS_SPACE_PROGRAM, 32 )
diff --git a/src/mame/drivers/gticlub.c b/src/mame/drivers/gticlub.c
index bb4798895a7..8cbd93f58f3 100644
--- a/src/mame/drivers/gticlub.c
+++ b/src/mame/drivers/gticlub.c
@@ -595,14 +595,10 @@ WRITE32_HANDLER( lanc_ram_w )
static MACHINE_START( gticlub )
{
/* set conservative DRC options */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS);
+ ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS);
/* configure fast RAM regions for DRC */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_END, 0x000fffff);
- device_set_info_ptr(machine->cpu[0], CPUINFO_PTR_PPC_FASTRAM_BASE, work_ram);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
+ ppcdrc_add_fastram(machine->cpu[0], 0x00000000, 0x000fffff, FALSE, work_ram);
}
static ADDRESS_MAP_START( gticlub_map, ADDRESS_SPACE_PROGRAM, 32 )
diff --git a/src/mame/drivers/hornet.c b/src/mame/drivers/hornet.c
index 7252cbee213..58d0912185c 100644
--- a/src/mame/drivers/hornet.c
+++ b/src/mame/drivers/hornet.c
@@ -969,14 +969,10 @@ static MACHINE_START( hornet )
memset(jvs_sdata, 0, 1024);
/* set conservative DRC options */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS);
+ ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS);
/* configure fast RAM regions for DRC */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_END, 0x003fffff);
- device_set_info_ptr(machine->cpu[0], CPUINFO_PTR_PPC_FASTRAM_BASE, workram);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
+ ppcdrc_add_fastram(machine->cpu[0], 0x00000000, 0x003fffff, FALSE, workram);
state_save_register_global(machine, led_reg0);
state_save_register_global(machine, led_reg1);
diff --git a/src/mame/drivers/model3.c b/src/mame/drivers/model3.c
index 733000b5306..7017b1433e1 100644
--- a/src/mame/drivers/model3.c
+++ b/src/mame/drivers/model3.c
@@ -981,14 +981,10 @@ static void model3_exit(running_machine *machine)
static void configure_fast_ram(running_machine *machine)
{
/* set conservative DRC options */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS - PPCDRC_ACCURATE_SINGLES);
+ ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS - PPCDRC_ACCURATE_SINGLES);
/* configure fast RAM regions for DRC */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_END, 0x007fffff);
- device_set_info_ptr(machine->cpu[0], CPUINFO_PTR_PPC_FASTRAM_BASE, work_ram);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
+ ppcdrc_add_fastram(machine->cpu[0], 0x00000000, 0x007fffff, FALSE, work_ram);
}
static MACHINE_START(model3_10)
diff --git a/src/mame/drivers/nwk-tr.c b/src/mame/drivers/nwk-tr.c
index 1bd06d3c11d..cb3e6aefa04 100644
--- a/src/mame/drivers/nwk-tr.c
+++ b/src/mame/drivers/nwk-tr.c
@@ -890,14 +890,10 @@ static WRITE32_HANDLER( lanc2_w )
static MACHINE_START( nwktr )
{
/* set conservative DRC options */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS);
+ ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS);
/* configure fast RAM regions for DRC */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_END, 0x003fffff);
- device_set_info_ptr(machine->cpu[0], CPUINFO_PTR_PPC_FASTRAM_BASE, work_ram);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
+ ppcdrc_add_fastram(machine->cpu[0], 0x00000000, 0x003fffff, FALSE, work_ram);
}
static ADDRESS_MAP_START( nwktr_map, ADDRESS_SPACE_PROGRAM, 32 )
diff --git a/src/mame/drivers/ultrsprt.c b/src/mame/drivers/ultrsprt.c
index 6ecd1ab4e72..446af0970c4 100644
--- a/src/mame/drivers/ultrsprt.c
+++ b/src/mame/drivers/ultrsprt.c
@@ -82,20 +82,11 @@ static WRITE32_HANDLER( int_ack_w )
static MACHINE_START( ultrsprt )
{
/* set conservative DRC options */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS);
+ ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS);
/* configure fast RAM regions for DRC */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_START, 0x80000000);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_END, 0x8007ffff);
- device_set_info_ptr(machine->cpu[0], CPUINFO_PTR_PPC_FASTRAM_BASE, vram);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
-
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_SELECT, 1);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_START, 0xff000000);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_END, 0xff01ffff);
- device_set_info_ptr(machine->cpu[0], CPUINFO_PTR_PPC_FASTRAM_BASE, workram);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
+ ppcdrc_add_fastram(machine->cpu[0], 0x80000000, 0x8007ffff, FALSE, vram);
+ ppcdrc_add_fastram(machine->cpu[0], 0xff000000, 0xff01ffff, FALSE, workram);
}
diff --git a/src/mame/drivers/zr107.c b/src/mame/drivers/zr107.c
index 61631343fbe..50424f086a3 100644
--- a/src/mame/drivers/zr107.c
+++ b/src/mame/drivers/zr107.c
@@ -442,14 +442,10 @@ static UINT32 *workram;
static MACHINE_START( zr107 )
{
/* set conservative DRC options */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS);
+ ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS);
/* configure fast RAM regions for DRC */
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_END, 0x000fffff);
- device_set_info_ptr(machine->cpu[0], CPUINFO_PTR_PPC_FASTRAM_BASE, workram);
- device_set_info_int(machine->cpu[0], CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
+ ppcdrc_add_fastram(machine->cpu[0], 0x00000000, 0x000fffff, FALSE, workram);
}
static ADDRESS_MAP_START( zr107_map, ADDRESS_SPACE_PROGRAM, 32 )