diff options
author | Aaron Giles <aaron@aarongiles.com> | 2008-12-05 15:17:40 +0000 |
---|---|---|
committer | Aaron Giles <aaron@aarongiles.com> | 2008-12-05 15:17:40 +0000 |
commit | 12f71dac82ee894f703c630d22625277ebee7821 (patch) | |
tree | a0e215170d52867ee75ec1786923551a60aa0166 | |
parent | d85a03d9adff33aa46f4cba0bd3ad2e1b8ee8b6d (diff) |
m68_state -> cpustate
-rw-r--r-- | src/emu/cpu/m6800/6800ops.c | 76 | ||||
-rw-r--r-- | src/emu/cpu/m6800/6800tbl.c | 498 | ||||
-rw-r--r-- | src/emu/cpu/m6800/m6800.c | 3054 |
3 files changed, 1814 insertions, 1814 deletions
diff --git a/src/emu/cpu/m6800/6800ops.c b/src/emu/cpu/m6800/6800ops.c index 0ecb0607679..e16ff0af52a 100644 --- a/src/emu/cpu/m6800/6800ops.c +++ b/src/emu/cpu/m6800/6800ops.c @@ -13,7 +13,7 @@ HNZVC */ -#define OP_HANDLER(_name) INLINE void _name (m68_state_t *m68_state) +#define OP_HANDLER(_name) INLINE void _name (m6800_state *cpustate) //OP_HANDLER( illegal ) OP_HANDLER( illegal ) @@ -65,7 +65,7 @@ OP_HANDLER( tap ) { CC=A; ONE_MORE_INSN(); - CHECK_IRQ_LINES(m68_state); /* HJB 990417 */ + CHECK_IRQ_LINES(cpustate); /* HJB 990417 */ } /* $07 TPA inherent ----- */ @@ -117,7 +117,7 @@ OP_HANDLER( cli ) { CLI; ONE_MORE_INSN(); - CHECK_IRQ_LINES(m68_state); /* HJB 990417 */ + CHECK_IRQ_LINES(cpustate); /* HJB 990417 */ } /* $0f SEI */ @@ -125,7 +125,7 @@ OP_HANDLER( sei ) { SEI; ONE_MORE_INSN(); - CHECK_IRQ_LINES(m68_state); /* HJB 990417 */ + CHECK_IRQ_LINES(cpustate); /* HJB 990417 */ } /* $10 SBA inherent -**** */ @@ -206,7 +206,7 @@ OP_HANDLER( daa ) OP_HANDLER( slp ) { /* wait for next IRQ (same as waiting of wai) */ - m68_state->wai_state |= M6800_SLP; + cpustate->wai_state |= M6800_SLP; EAT_CYCLES; } #endif @@ -358,13 +358,13 @@ OP_HANDLER( ins ) /* $32 PULA inherent ----- */ OP_HANDLER( pula ) { - PULLBYTE(m68_state->d.b.h); + PULLBYTE(cpustate->d.b.h); } /* $33 PULB inherent ----- */ OP_HANDLER( pulb ) { - PULLBYTE(m68_state->d.b.l); + PULLBYTE(cpustate->d.b.l); } /* $34 DES inherent ----- */ @@ -382,13 +382,13 @@ OP_HANDLER( txs ) /* $36 PSHA inherent ----- */ OP_HANDLER( psha ) { - PUSHBYTE(m68_state->d.b.h); + PUSHBYTE(cpustate->d.b.h); } /* $37 PSHB inherent ----- */ OP_HANDLER( pshb ) { - PUSHBYTE(m68_state->d.b.l); + PUSHBYTE(cpustate->d.b.l); } /* $38 PULX inherent ----- */ @@ -417,7 +417,7 @@ OP_HANDLER( rti ) PULLBYTE(A); PULLWORD(pX); PULLWORD(pPC); - CHECK_IRQ_LINES(m68_state); /* HJB 990417 */ + CHECK_IRQ_LINES(cpustate); /* HJB 990417 */ } /* $3c PSHX inherent ----- */ @@ -443,14 +443,14 @@ OP_HANDLER( wai ) * WAI stacks the entire machine state on the * hardware stack, then waits for an interrupt. */ - m68_state->wai_state |= M6800_WAI; + cpustate->wai_state |= M6800_WAI; PUSHWORD(pPC); PUSHWORD(pX); PUSHBYTE(A); PUSHBYTE(B); PUSHBYTE(CC); - CHECK_IRQ_LINES(m68_state); - if (m68_state->wai_state & M6800_WAI) EAT_CYCLES; + CHECK_IRQ_LINES(cpustate); + if (cpustate->wai_state & M6800_WAI) EAT_CYCLES; } /* $3f SWI absolute indirect ----- */ @@ -462,7 +462,7 @@ OP_HANDLER( swi ) PUSHBYTE(B); PUSHBYTE(CC); SEI; - PCD = RM16(m68_state, 0xfffa); + PCD = RM16(cpustate, 0xfffa); } /* $40 NEGA inherent ?**** */ @@ -1092,7 +1092,7 @@ OP_HANDLER( bsr ) /* $8e LDS immediate -**0- */ OP_HANDLER( lds_im ) { - IMMWORD(m68_state->s); + IMMWORD(cpustate->s); CLR_NZV; SET_NZ16(S); } @@ -1103,7 +1103,7 @@ OP_HANDLER( sts_im ) CLR_NZV; SET_NZ16(S); IMM16; - WM16(m68_state, EAD,&m68_state->s); + WM16(cpustate, EAD,&cpustate->s); } /* $90 SUBA direct ?**** */ @@ -1258,7 +1258,7 @@ OP_HANDLER( jsr_di ) /* $9e LDS direct -**0- */ OP_HANDLER( lds_di ) { - DIRWORD(m68_state->s); + DIRWORD(cpustate->s); CLR_NZV; SET_NZ16(S); } @@ -1269,7 +1269,7 @@ OP_HANDLER( sts_di ) CLR_NZV; SET_NZ16(S); DIRECT; - WM16(m68_state, EAD,&m68_state->s); + WM16(cpustate, EAD,&cpustate->s); } /* $a0 SUBA indexed ?**** */ @@ -1432,7 +1432,7 @@ OP_HANDLER( jsr_ix ) /* $ae LDS indexed -**0- */ OP_HANDLER( lds_ix ) { - IDXWORD(m68_state->s); + IDXWORD(cpustate->s); CLR_NZV; SET_NZ16(S); } @@ -1443,7 +1443,7 @@ OP_HANDLER( sts_ix ) CLR_NZV; SET_NZ16(S); INDEXED; - WM16(m68_state, EAD,&m68_state->s); + WM16(cpustate, EAD,&cpustate->s); } /* $b0 SUBA extended ?**** */ @@ -1608,7 +1608,7 @@ OP_HANDLER( jsr_ex ) /* $be LDS extended -**0- */ OP_HANDLER( lds_ex ) { - EXTWORD(m68_state->s); + EXTWORD(cpustate->s); CLR_NZV; SET_NZ16(S); } @@ -1619,7 +1619,7 @@ OP_HANDLER( sts_ex ) CLR_NZV; SET_NZ16(S); EXTENDED; - WM16(m68_state, EAD,&m68_state->s); + WM16(cpustate, EAD,&cpustate->s); } /* $c0 SUBB immediate ?**** */ @@ -1752,7 +1752,7 @@ OP_HANDLER( addb_im ) /* $CC LDD immediate -**0- */ OP_HANDLER( ldd_im ) { - IMMWORD(m68_state->d); + IMMWORD(cpustate->d); CLR_NZV; SET_NZ16(D); } @@ -1764,13 +1764,13 @@ OP_HANDLER( std_im ) IMM16; CLR_NZV; SET_NZ16(D); - WM16(m68_state, EAD,&m68_state->d); + WM16(cpustate, EAD,&cpustate->d); } /* $ce LDX immediate -**0- */ OP_HANDLER( ldx_im ) { - IMMWORD(m68_state->x); + IMMWORD(cpustate->x); CLR_NZV; SET_NZ16(X); } @@ -1781,7 +1781,7 @@ OP_HANDLER( stx_im ) CLR_NZV; SET_NZ16(X); IMM16; - WM16(m68_state, EAD,&m68_state->x); + WM16(cpustate, EAD,&cpustate->x); } /* $d0 SUBB direct ?**** */ @@ -1913,7 +1913,7 @@ OP_HANDLER( addb_di ) /* $dc LDD direct -**0- */ OP_HANDLER( ldd_di ) { - DIRWORD(m68_state->d); + DIRWORD(cpustate->d); CLR_NZV; SET_NZ16(D); } @@ -1924,13 +1924,13 @@ OP_HANDLER( std_di ) DIRECT; CLR_NZV; SET_NZ16(D); - WM16(m68_state, EAD,&m68_state->d); + WM16(cpustate, EAD,&cpustate->d); } /* $de LDX direct -**0- */ OP_HANDLER( ldx_di ) { - DIRWORD(m68_state->x); + DIRWORD(cpustate->x); CLR_NZV; SET_NZ16(X); } @@ -1941,7 +1941,7 @@ OP_HANDLER( stx_di ) CLR_NZV; SET_NZ16(X); DIRECT; - WM16(m68_state, EAD,&m68_state->x); + WM16(cpustate, EAD,&cpustate->x); } /* $e0 SUBB indexed ?**** */ @@ -2073,7 +2073,7 @@ OP_HANDLER( addb_ix ) /* $ec LDD indexed -**0- */ OP_HANDLER( ldd_ix ) { - IDXWORD(m68_state->d); + IDXWORD(cpustate->d); CLR_NZV; SET_NZ16(D); } @@ -2096,13 +2096,13 @@ OP_HANDLER( std_ix ) INDEXED; CLR_NZV; SET_NZ16(D); - WM16(m68_state, EAD,&m68_state->d); + WM16(cpustate, EAD,&cpustate->d); } /* $ee LDX indexed -**0- */ OP_HANDLER( ldx_ix ) { - IDXWORD(m68_state->x); + IDXWORD(cpustate->x); CLR_NZV; SET_NZ16(X); } @@ -2113,7 +2113,7 @@ OP_HANDLER( stx_ix ) CLR_NZV; SET_NZ16(X); INDEXED; - WM16(m68_state, EAD,&m68_state->x); + WM16(cpustate, EAD,&cpustate->x); } /* $f0 SUBB extended ?**** */ @@ -2245,7 +2245,7 @@ OP_HANDLER( addb_ex ) /* $fc LDD extended -**0- */ OP_HANDLER( ldd_ex ) { - EXTWORD(m68_state->d); + EXTWORD(cpustate->d); CLR_NZV; SET_NZ16(D); } @@ -2269,13 +2269,13 @@ OP_HANDLER( std_ex ) EXTENDED; CLR_NZV; SET_NZ16(D); - WM16(m68_state, EAD,&m68_state->d); + WM16(cpustate, EAD,&cpustate->d); } /* $fe LDX extended -**0- */ OP_HANDLER( ldx_ex ) { - EXTWORD(m68_state->x); + EXTWORD(cpustate->x); CLR_NZV; SET_NZ16(X); } @@ -2286,5 +2286,5 @@ OP_HANDLER( stx_ex ) CLR_NZV; SET_NZ16(X); EXTENDED; - WM16(m68_state, EAD,&m68_state->x); + WM16(cpustate, EAD,&cpustate->x); } diff --git a/src/emu/cpu/m6800/6800tbl.c b/src/emu/cpu/m6800/6800tbl.c index afc2cc8bd57..c0b9d4dc82e 100644 --- a/src/emu/cpu/m6800/6800tbl.c +++ b/src/emu/cpu/m6800/6800tbl.c @@ -1,255 +1,255 @@ -INLINE void aba(m68_state_t *m68_state); -INLINE void abx(m68_state_t *m68_state); -INLINE void adca_di(m68_state_t *m68_state); -INLINE void adca_ex(m68_state_t *m68_state); -INLINE void adca_im(m68_state_t *m68_state); -INLINE void adca_ix(m68_state_t *m68_state); -INLINE void adcb_di(m68_state_t *m68_state); -INLINE void adcb_ex(m68_state_t *m68_state); -INLINE void adcb_im(m68_state_t *m68_state); -INLINE void adcb_ix(m68_state_t *m68_state); -INLINE void adcx_im(m68_state_t *m68_state); -INLINE void adda_di(m68_state_t *m68_state); -INLINE void adda_ex(m68_state_t *m68_state); -INLINE void adda_im(m68_state_t *m68_state); -INLINE void adda_ix(m68_state_t *m68_state); -INLINE void addb_di(m68_state_t *m68_state); -INLINE void addb_ex(m68_state_t *m68_state); -INLINE void addb_im(m68_state_t *m68_state); -INLINE void addb_ix(m68_state_t *m68_state); -INLINE void addd_di(m68_state_t *m68_state); -INLINE void addd_ex(m68_state_t *m68_state); -INLINE void addx_ex(m68_state_t *m68_state); -INLINE void addd_im(m68_state_t *m68_state); -INLINE void addd_ix(m68_state_t *m68_state); -INLINE void aim_di(m68_state_t *m68_state); -INLINE void aim_ix(m68_state_t *m68_state); -INLINE void anda_di(m68_state_t *m68_state); -INLINE void anda_ex(m68_state_t *m68_state); -INLINE void anda_im(m68_state_t *m68_state); -INLINE void anda_ix(m68_state_t *m68_state); -INLINE void andb_di(m68_state_t *m68_state); -INLINE void andb_ex(m68_state_t *m68_state); -INLINE void andb_im(m68_state_t *m68_state); -INLINE void andb_ix(m68_state_t *m68_state); -INLINE void asl_ex(m68_state_t *m68_state); -INLINE void asl_ix(m68_state_t *m68_state); -INLINE void asla(m68_state_t *m68_state); -INLINE void aslb(m68_state_t *m68_state); -INLINE void asld(m68_state_t *m68_state); -INLINE void asr_ex(m68_state_t *m68_state); -INLINE void asr_ix(m68_state_t *m68_state); -INLINE void asra(m68_state_t *m68_state); -INLINE void asrb(m68_state_t *m68_state); -INLINE void bcc(m68_state_t *m68_state); -INLINE void bcs(m68_state_t *m68_state); -INLINE void beq(m68_state_t *m68_state); -INLINE void bge(m68_state_t *m68_state); -INLINE void bgt(m68_state_t *m68_state); -INLINE void bhi(m68_state_t *m68_state); -INLINE void bita_di(m68_state_t *m68_state); -INLINE void bita_ex(m68_state_t *m68_state); -INLINE void bita_im(m68_state_t *m68_state); -INLINE void bita_ix(m68_state_t *m68_state); -INLINE void bitb_di(m68_state_t *m68_state); -INLINE void bitb_ex(m68_state_t *m68_state); -INLINE void bitb_im(m68_state_t *m68_state); -INLINE void bitb_ix(m68_state_t *m68_state); -INLINE void ble(m68_state_t *m68_state); -INLINE void bls(m68_state_t *m68_state); -INLINE void blt(m68_state_t *m68_state); -INLINE void bmi(m68_state_t *m68_state); -INLINE void bne(m68_state_t *m68_state); -INLINE void bpl(m68_state_t *m68_state); -INLINE void bra(m68_state_t *m68_state); -INLINE void brn(m68_state_t *m68_state); -INLINE void bsr(m68_state_t *m68_state); -INLINE void bvc(m68_state_t *m68_state); -INLINE void bvs(m68_state_t *m68_state); -INLINE void cba(m68_state_t *m68_state); -INLINE void clc(m68_state_t *m68_state); -INLINE void cli(m68_state_t *m68_state); -INLINE void clr_ex(m68_state_t *m68_state); -INLINE void clr_ix(m68_state_t *m68_state); -INLINE void clra(m68_state_t *m68_state); -INLINE void clrb(m68_state_t *m68_state); -INLINE void clv(m68_state_t *m68_state); -INLINE void cmpa_di(m68_state_t *m68_state); -INLINE void cmpa_ex(m68_state_t *m68_state); -INLINE void cmpa_im(m68_state_t *m68_state); -INLINE void cmpa_ix(m68_state_t *m68_state); -INLINE void cmpb_di(m68_state_t *m68_state); -INLINE void cmpb_ex(m68_state_t *m68_state); -INLINE void cmpb_im(m68_state_t *m68_state); -INLINE void cmpb_ix(m68_state_t *m68_state); -INLINE void cmpx_di(m68_state_t *m68_state); -INLINE void cmpx_ex(m68_state_t *m68_state); -INLINE void cmpx_im(m68_state_t *m68_state); -INLINE void cmpx_ix(m68_state_t *m68_state); -INLINE void com_ex(m68_state_t *m68_state); -INLINE void com_ix(m68_state_t *m68_state); -INLINE void coma(m68_state_t *m68_state); -INLINE void comb(m68_state_t *m68_state); -INLINE void daa(m68_state_t *m68_state); -INLINE void dec_ex(m68_state_t *m68_state); -INLINE void dec_ix(m68_state_t *m68_state); -INLINE void deca(m68_state_t *m68_state); -INLINE void decb(m68_state_t *m68_state); -INLINE void des(m68_state_t *m68_state); -INLINE void dex(m68_state_t *m68_state); -INLINE void eim_di(m68_state_t *m68_state); -INLINE void eim_ix(m68_state_t *m68_state); -INLINE void eora_di(m68_state_t *m68_state); -INLINE void eora_ex(m68_state_t *m68_state); -INLINE void eora_im(m68_state_t *m68_state); -INLINE void eora_ix(m68_state_t *m68_state); -INLINE void eorb_di(m68_state_t *m68_state); -INLINE void eorb_ex(m68_state_t *m68_state); -INLINE void eorb_im(m68_state_t *m68_state); -INLINE void eorb_ix(m68_state_t *m68_state); -INLINE void illegal(m68_state_t *m68_state); -INLINE void inc_ex(m68_state_t *m68_state); -INLINE void inc_ix(m68_state_t *m68_state); -INLINE void inca(m68_state_t *m68_state); -INLINE void incb(m68_state_t *m68_state); -INLINE void ins(m68_state_t *m68_state); -INLINE void inx(m68_state_t *m68_state); -INLINE void jmp_ex(m68_state_t *m68_state); -INLINE void jmp_ix(m68_state_t *m68_state); -INLINE void jsr_di(m68_state_t *m68_state); -INLINE void jsr_ex(m68_state_t *m68_state); -INLINE void jsr_ix(m68_state_t *m68_state); -INLINE void lda_di(m68_state_t *m68_state); -INLINE void lda_ex(m68_state_t *m68_state); -INLINE void lda_im(m68_state_t *m68_state); -INLINE void lda_ix(m68_state_t *m68_state); -INLINE void ldb_di(m68_state_t *m68_state); -INLINE void ldb_ex(m68_state_t *m68_state); -INLINE void ldb_im(m68_state_t *m68_state); -INLINE void ldb_ix(m68_state_t *m68_state); -INLINE void ldd_di(m68_state_t *m68_state); -INLINE void ldd_ex(m68_state_t *m68_state); -INLINE void ldd_im(m68_state_t *m68_state); -INLINE void ldd_ix(m68_state_t *m68_state); -INLINE void lds_di(m68_state_t *m68_state); -INLINE void lds_ex(m68_state_t *m68_state); -INLINE void lds_im(m68_state_t *m68_state); -INLINE void lds_ix(m68_state_t *m68_state); -INLINE void ldx_di(m68_state_t *m68_state); -INLINE void ldx_ex(m68_state_t *m68_state); -INLINE void ldx_im(m68_state_t *m68_state); -INLINE void ldx_ix(m68_state_t *m68_state); -INLINE void lsr_ex(m68_state_t *m68_state); -INLINE void lsr_ix(m68_state_t *m68_state); -INLINE void lsra(m68_state_t *m68_state); -INLINE void lsrb(m68_state_t *m68_state); -INLINE void lsrd(m68_state_t *m68_state); -INLINE void mul(m68_state_t *m68_state); -INLINE void neg_ex(m68_state_t *m68_state); -INLINE void neg_ix(m68_state_t *m68_state); -INLINE void nega(m68_state_t *m68_state); -INLINE void negb(m68_state_t *m68_state); -INLINE void nop(m68_state_t *m68_state); -INLINE void oim_di(m68_state_t *m68_state); -INLINE void oim_ix(m68_state_t *m68_state); -INLINE void ora_di(m68_state_t *m68_state); -INLINE void ora_ex(m68_state_t *m68_state); -INLINE void ora_im(m68_state_t *m68_state); -INLINE void ora_ix(m68_state_t *m68_state); -INLINE void orb_di(m68_state_t *m68_state); -INLINE void orb_ex(m68_state_t *m68_state); -INLINE void orb_im(m68_state_t *m68_state); -INLINE void orb_ix(m68_state_t *m68_state); -INLINE void psha(m68_state_t *m68_state); -INLINE void pshb(m68_state_t *m68_state); -INLINE void pshx(m68_state_t *m68_state); -INLINE void pula(m68_state_t *m68_state); -INLINE void pulb(m68_state_t *m68_state); -INLINE void pulx(m68_state_t *m68_state); -INLINE void rol_ex(m68_state_t *m68_state); -INLINE void rol_ix(m68_state_t *m68_state); -INLINE void rola(m68_state_t *m68_state); -INLINE void rolb(m68_state_t *m68_state); -INLINE void ror_ex(m68_state_t *m68_state); -INLINE void ror_ix(m68_state_t *m68_state); -INLINE void rora(m68_state_t *m68_state); -INLINE void rorb(m68_state_t *m68_state); -INLINE void rti(m68_state_t *m68_state); -INLINE void rts(m68_state_t *m68_state); -INLINE void sba(m68_state_t *m68_state); -INLINE void sbca_di(m68_state_t *m68_state); -INLINE void sbca_ex(m68_state_t *m68_state); -INLINE void sbca_im(m68_state_t *m68_state); -INLINE void sbca_ix(m68_state_t *m68_state); -INLINE void sbcb_di(m68_state_t *m68_state); -INLINE void sbcb_ex(m68_state_t *m68_state); -INLINE void sbcb_im(m68_state_t *m68_state); -INLINE void sbcb_ix(m68_state_t *m68_state); -INLINE void sec(m68_state_t *m68_state); -INLINE void sei(m68_state_t *m68_state); -INLINE void sev(m68_state_t *m68_state); +INLINE void aba(m6800_state *cpustate); +INLINE void abx(m6800_state *cpustate); +INLINE void adca_di(m6800_state *cpustate); +INLINE void adca_ex(m6800_state *cpustate); +INLINE void adca_im(m6800_state *cpustate); +INLINE void adca_ix(m6800_state *cpustate); +INLINE void adcb_di(m6800_state *cpustate); +INLINE void adcb_ex(m6800_state *cpustate); +INLINE void adcb_im(m6800_state *cpustate); +INLINE void adcb_ix(m6800_state *cpustate); +INLINE void adcx_im(m6800_state *cpustate); +INLINE void adda_di(m6800_state *cpustate); +INLINE void adda_ex(m6800_state *cpustate); +INLINE void adda_im(m6800_state *cpustate); +INLINE void adda_ix(m6800_state *cpustate); +INLINE void addb_di(m6800_state *cpustate); +INLINE void addb_ex(m6800_state *cpustate); +INLINE void addb_im(m6800_state *cpustate); +INLINE void addb_ix(m6800_state *cpustate); +INLINE void addd_di(m6800_state *cpustate); +INLINE void addd_ex(m6800_state *cpustate); +INLINE void addx_ex(m6800_state *cpustate); +INLINE void addd_im(m6800_state *cpustate); +INLINE void addd_ix(m6800_state *cpustate); +INLINE void aim_di(m6800_state *cpustate); +INLINE void aim_ix(m6800_state *cpustate); +INLINE void anda_di(m6800_state *cpustate); +INLINE void anda_ex(m6800_state *cpustate); +INLINE void anda_im(m6800_state *cpustate); +INLINE void anda_ix(m6800_state *cpustate); +INLINE void andb_di(m6800_state *cpustate); +INLINE void andb_ex(m6800_state *cpustate); +INLINE void andb_im(m6800_state *cpustate); +INLINE void andb_ix(m6800_state *cpustate); +INLINE void asl_ex(m6800_state *cpustate); +INLINE void asl_ix(m6800_state *cpustate); +INLINE void asla(m6800_state *cpustate); +INLINE void aslb(m6800_state *cpustate); +INLINE void asld(m6800_state *cpustate); +INLINE void asr_ex(m6800_state *cpustate); +INLINE void asr_ix(m6800_state *cpustate); +INLINE void asra(m6800_state *cpustate); +INLINE void asrb(m6800_state *cpustate); +INLINE void bcc(m6800_state *cpustate); +INLINE void bcs(m6800_state *cpustate); +INLINE void beq(m6800_state *cpustate); +INLINE void bge(m6800_state *cpustate); +INLINE void bgt(m6800_state *cpustate); +INLINE void bhi(m6800_state *cpustate); +INLINE void bita_di(m6800_state *cpustate); +INLINE void bita_ex(m6800_state *cpustate); +INLINE void bita_im(m6800_state *cpustate); +INLINE void bita_ix(m6800_state *cpustate); +INLINE void bitb_di(m6800_state *cpustate); +INLINE void bitb_ex(m6800_state *cpustate); +INLINE void bitb_im(m6800_state *cpustate); +INLINE void bitb_ix(m6800_state *cpustate); +INLINE void ble(m6800_state *cpustate); +INLINE void bls(m6800_state *cpustate); +INLINE void blt(m6800_state *cpustate); +INLINE void bmi(m6800_state *cpustate); +INLINE void bne(m6800_state *cpustate); +INLINE void bpl(m6800_state *cpustate); +INLINE void bra(m6800_state *cpustate); +INLINE void brn(m6800_state *cpustate); +INLINE void bsr(m6800_state *cpustate); +INLINE void bvc(m6800_state *cpustate); +INLINE void bvs(m6800_state *cpustate); +INLINE void cba(m6800_state *cpustate); +INLINE void clc(m6800_state *cpustate); +INLINE void cli(m6800_state *cpustate); +INLINE void clr_ex(m6800_state *cpustate); +INLINE void clr_ix(m6800_state *cpustate); +INLINE void clra(m6800_state *cpustate); +INLINE void clrb(m6800_state *cpustate); +INLINE void clv(m6800_state *cpustate); +INLINE void cmpa_di(m6800_state *cpustate); +INLINE void cmpa_ex(m6800_state *cpustate); +INLINE void cmpa_im(m6800_state *cpustate); +INLINE void cmpa_ix(m6800_state *cpustate); +INLINE void cmpb_di(m6800_state *cpustate); +INLINE void cmpb_ex(m6800_state *cpustate); +INLINE void cmpb_im(m6800_state *cpustate); +INLINE void cmpb_ix(m6800_state *cpustate); +INLINE void cmpx_di(m6800_state *cpustate); +INLINE void cmpx_ex(m6800_state *cpustate); +INLINE void cmpx_im(m6800_state *cpustate); +INLINE void cmpx_ix(m6800_state *cpustate); +INLINE void com_ex(m6800_state *cpustate); +INLINE void com_ix(m6800_state *cpustate); +INLINE void coma(m6800_state *cpustate); +INLINE void comb(m6800_state *cpustate); +INLINE void daa(m6800_state *cpustate); +INLINE void dec_ex(m6800_state *cpustate); +INLINE void dec_ix(m6800_state *cpustate); +INLINE void deca(m6800_state *cpustate); +INLINE void decb(m6800_state *cpustate); +INLINE void des(m6800_state *cpustate); +INLINE void dex(m6800_state *cpustate); +INLINE void eim_di(m6800_state *cpustate); +INLINE void eim_ix(m6800_state *cpustate); +INLINE void eora_di(m6800_state *cpustate); +INLINE void eora_ex(m6800_state *cpustate); +INLINE void eora_im(m6800_state *cpustate); +INLINE void eora_ix(m6800_state *cpustate); +INLINE void eorb_di(m6800_state *cpustate); +INLINE void eorb_ex(m6800_state *cpustate); +INLINE void eorb_im(m6800_state *cpustate); +INLINE void eorb_ix(m6800_state *cpustate); +INLINE void illegal(m6800_state *cpustate); +INLINE void inc_ex(m6800_state *cpustate); +INLINE void inc_ix(m6800_state *cpustate); +INLINE void inca(m6800_state *cpustate); +INLINE void incb(m6800_state *cpustate); +INLINE void ins(m6800_state *cpustate); +INLINE void inx(m6800_state *cpustate); +INLINE void jmp_ex(m6800_state *cpustate); +INLINE void jmp_ix(m6800_state *cpustate); +INLINE void jsr_di(m6800_state *cpustate); +INLINE void jsr_ex(m6800_state *cpustate); +INLINE void jsr_ix(m6800_state *cpustate); +INLINE void lda_di(m6800_state *cpustate); +INLINE void lda_ex(m6800_state *cpustate); +INLINE void lda_im(m6800_state *cpustate); +INLINE void lda_ix(m6800_state *cpustate); +INLINE void ldb_di(m6800_state *cpustate); +INLINE void ldb_ex(m6800_state *cpustate); +INLINE void ldb_im(m6800_state *cpustate); +INLINE void ldb_ix(m6800_state *cpustate); +INLINE void ldd_di(m6800_state *cpustate); +INLINE void ldd_ex(m6800_state *cpustate); +INLINE void ldd_im(m6800_state *cpustate); +INLINE void ldd_ix(m6800_state *cpustate); +INLINE void lds_di(m6800_state *cpustate); +INLINE void lds_ex(m6800_state *cpustate); +INLINE void lds_im(m6800_state *cpustate); +INLINE void lds_ix(m6800_state *cpustate); +INLINE void ldx_di(m6800_state *cpustate); +INLINE void ldx_ex(m6800_state *cpustate); +INLINE void ldx_im(m6800_state *cpustate); +INLINE void ldx_ix(m6800_state *cpustate); +INLINE void lsr_ex(m6800_state *cpustate); +INLINE void lsr_ix(m6800_state *cpustate); +INLINE void lsra(m6800_state *cpustate); +INLINE void lsrb(m6800_state *cpustate); +INLINE void lsrd(m6800_state *cpustate); +INLINE void mul(m6800_state *cpustate); +INLINE void neg_ex(m6800_state *cpustate); +INLINE void neg_ix(m6800_state *cpustate); +INLINE void nega(m6800_state *cpustate); +INLINE void negb(m6800_state *cpustate); +INLINE void nop(m6800_state *cpustate); +INLINE void oim_di(m6800_state *cpustate); +INLINE void oim_ix(m6800_state *cpustate); +INLINE void ora_di(m6800_state *cpustate); +INLINE void ora_ex(m6800_state *cpustate); +INLINE void ora_im(m6800_state *cpustate); +INLINE void ora_ix(m6800_state *cpustate); +INLINE void orb_di(m6800_state *cpustate); +INLINE void orb_ex(m6800_state *cpustate); +INLINE void orb_im(m6800_state *cpustate); +INLINE void orb_ix(m6800_state *cpustate); +INLINE void psha(m6800_state *cpustate); +INLINE void pshb(m6800_state *cpustate); +INLINE void pshx(m6800_state *cpustate); +INLINE void pula(m6800_state *cpustate); +INLINE void pulb(m6800_state *cpustate); +INLINE void pulx(m6800_state *cpustate); +INLINE void rol_ex(m6800_state *cpustate); +INLINE void rol_ix(m6800_state *cpustate); +INLINE void rola(m6800_state *cpustate); +INLINE void rolb(m6800_state *cpustate); +INLINE void ror_ex(m6800_state *cpustate); +INLINE void ror_ix(m6800_state *cpustate); +INLINE void rora(m6800_state *cpustate); +INLINE void rorb(m6800_state *cpustate); +INLINE void rti(m6800_state *cpustate); +INLINE void rts(m6800_state *cpustate); +INLINE void sba(m6800_state *cpustate); +INLINE void sbca_di(m6800_state *cpustate); +INLINE void sbca_ex(m6800_state *cpustate); +INLINE void sbca_im(m6800_state *cpustate); +INLINE void sbca_ix(m6800_state *cpustate); +INLINE void sbcb_di(m6800_state *cpustate); +INLINE void sbcb_ex(m6800_state *cpustate); +INLINE void sbcb_im(m6800_state *cpustate); +INLINE void sbcb_ix(m6800_state *cpustate); +INLINE void sec(m6800_state *cpustate); +INLINE void sei(m6800_state *cpustate); +INLINE void sev(m6800_state *cpustate); #if (HAS_HD63701) -INLINE void slp(m68_state_t *m68_state); +INLINE void slp(m6800_state *cpustate); #endif -INLINE void sta_di(m68_state_t *m68_state); -INLINE void sta_ex(m68_state_t *m68_state); -INLINE void sta_im(m68_state_t *m68_state); -INLINE void sta_ix(m68_state_t *m68_state); -INLINE void stb_di(m68_state_t *m68_state); -INLINE void stb_ex(m68_state_t *m68_state); -INLINE void stb_im(m68_state_t *m68_state); -INLINE void stb_ix(m68_state_t *m68_state); -INLINE void std_di(m68_state_t *m68_state); -INLINE void std_ex(m68_state_t *m68_state); -INLINE void std_im(m68_state_t *m68_state); -INLINE void std_ix(m68_state_t *m68_state); -INLINE void sts_di(m68_state_t *m68_state); -INLINE void sts_ex(m68_state_t *m68_state); -INLINE void sts_im(m68_state_t *m68_state); -INLINE void sts_ix(m68_state_t *m68_state); -INLINE void stx_di(m68_state_t *m68_state); -INLINE void stx_ex(m68_state_t *m68_state); -INLINE void stx_im(m68_state_t *m68_state); -INLINE void stx_ix(m68_state_t *m68_state); -INLINE void suba_di(m68_state_t *m68_state); -INLINE void suba_ex(m68_state_t *m68_state); -INLINE void suba_im(m68_state_t *m68_state); -INLINE void suba_ix(m68_state_t *m68_state); -INLINE void subb_di(m68_state_t *m68_state); -INLINE void subb_ex(m68_state_t *m68_state); -INLINE void subb_im(m68_state_t *m68_state); -INLINE void subb_ix(m68_state_t *m68_state); -INLINE void subd_di(m68_state_t *m68_state); -INLINE void subd_ex(m68_state_t *m68_state); -INLINE void subd_im(m68_state_t *m68_state); -INLINE void subd_ix(m68_state_t *m68_state); -INLINE void swi(m68_state_t *m68_state); -INLINE void tab(m68_state_t *m68_state); -INLINE void tap(m68_state_t *m68_state); -INLINE void tba(m68_state_t *m68_state); -INLINE void tim_di(m68_state_t *m68_state); -INLINE void tim_ix(m68_state_t *m68_state); -INLINE void tpa(m68_state_t *m68_state); -INLINE void tst_ex(m68_state_t *m68_state); -INLINE void tst_ix(m68_state_t *m68_state); -INLINE void tsta(m68_state_t *m68_state); -INLINE void tstb(m68_state_t *m68_state); -INLINE void tsx(m68_state_t *m68_state); -INLINE void txs(m68_state_t *m68_state); -INLINE void undoc1(m68_state_t *m68_state); -INLINE void undoc2(m68_state_t *m68_state); -INLINE void wai(m68_state_t *m68_state); -INLINE void xgdx(m68_state_t *m68_state); +INLINE void sta_di(m6800_state *cpustate); +INLINE void sta_ex(m6800_state *cpustate); +INLINE void sta_im(m6800_state *cpustate); +INLINE void sta_ix(m6800_state *cpustate); +INLINE void stb_di(m6800_state *cpustate); +INLINE void stb_ex(m6800_state *cpustate); +INLINE void stb_im(m6800_state *cpustate); +INLINE void stb_ix(m6800_state *cpustate); +INLINE void std_di(m6800_state *cpustate); +INLINE void std_ex(m6800_state *cpustate); +INLINE void std_im(m6800_state *cpustate); +INLINE void std_ix(m6800_state *cpustate); +INLINE void sts_di(m6800_state *cpustate); +INLINE void sts_ex(m6800_state *cpustate); +INLINE void sts_im(m6800_state *cpustate); +INLINE void sts_ix(m6800_state *cpustate); +INLINE void stx_di(m6800_state *cpustate); +INLINE void stx_ex(m6800_state *cpustate); +INLINE void stx_im(m6800_state *cpustate); +INLINE void stx_ix(m6800_state *cpustate); +INLINE void suba_di(m6800_state *cpustate); +INLINE void suba_ex(m6800_state *cpustate); +INLINE void suba_im(m6800_state *cpustate); +INLINE void suba_ix(m6800_state *cpustate); +INLINE void subb_di(m6800_state *cpustate); +INLINE void subb_ex(m6800_state *cpustate); +INLINE void subb_im(m6800_state *cpustate); +INLINE void subb_ix(m6800_state *cpustate); +INLINE void subd_di(m6800_state *cpustate); +INLINE void subd_ex(m6800_state *cpustate); +INLINE void subd_im(m6800_state *cpustate); +INLINE void subd_ix(m6800_state *cpustate); +INLINE void swi(m6800_state *cpustate); +INLINE void tab(m6800_state *cpustate); +INLINE void tap(m6800_state *cpustate); +INLINE void tba(m6800_state *cpustate); +INLINE void tim_di(m6800_state *cpustate); +INLINE void tim_ix(m6800_state *cpustate); +INLINE void tpa(m6800_state *cpustate); +INLINE void tst_ex(m6800_state *cpustate); +INLINE void tst_ix(m6800_state *cpustate); +INLINE void tsta(m6800_state *cpustate); +INLINE void tstb(m6800_state *cpustate); +INLINE void tsx(m6800_state *cpustate); +INLINE void txs(m6800_state *cpustate); +INLINE void undoc1(m6800_state *cpustate); +INLINE void undoc2(m6800_state *cpustate); +INLINE void wai(m6800_state *cpustate); +INLINE void xgdx(m6800_state *cpustate); -INLINE void cpx_di(m68_state_t *m68_state); -INLINE void cpx_ex(m68_state_t *m68_state); -INLINE void cpx_im(m68_state_t *m68_state); -INLINE void cpx_ix(m68_state_t *m68_state); +INLINE void cpx_di(m6800_state *cpustate); +INLINE void cpx_ex(m6800_state *cpustate); +INLINE void cpx_im(m6800_state *cpustate); +INLINE void cpx_ix(m6800_state *cpustate); #if (HAS_HD63701) -INLINE void trap(m68_state_t *m68_state); +INLINE void trap(m6800_state *cpustate); #endif -static void (*const m6800_insn[0x100])(m68_state_t *m68_state) = { +static void (*const m6800_insn[0x100])(m6800_state *cpustate) = { illegal,nop, illegal,illegal,illegal,illegal,tap, tpa, inx, dex, clv, sev, clc, sec, cli, sei, sba, cba, illegal,illegal,illegal,illegal,tab, tba, @@ -285,7 +285,7 @@ eorb_ex,adcb_ex,orb_ex, addb_ex,illegal,illegal,ldx_ex, stx_ex }; #if (HAS_M6801||HAS_M6803) -static void (*const m6803_insn[0x100])(m68_state_t *m68_state) = { +static void (*const m6803_insn[0x100])(m6800_state *cpustate) = { illegal,nop, illegal,illegal,lsrd, asld, tap, tpa, inx, dex, clv, sev, clc, sec, cli, sei, sba, cba, illegal,illegal,illegal,illegal,tab, tba, @@ -322,7 +322,7 @@ eorb_ex,adcb_ex,orb_ex, addb_ex,ldd_ex, std_ex, ldx_ex, stx_ex #endif #if (HAS_HD63701) -static void (*const hd63701_insn[0x100])(m68_state_t *m68_state) = { +static void (*const hd63701_insn[0x100])(m6800_state *cpustate) = { trap ,nop, trap ,trap ,lsrd, asld, tap, tpa, inx, dex, clv, sev, clc, sec, cli, sei, sba, cba, undoc1, undoc2, trap ,trap ,tab, tba, @@ -359,7 +359,7 @@ eorb_ex,adcb_ex,orb_ex, addb_ex,ldd_ex, std_ex, ldx_ex, stx_ex #endif #if (HAS_NSC8105) -static void (*const nsc8105_insn[0x100])(m68_state_t *m68_state) = { +static void (*const nsc8105_insn[0x100])(m6800_state *cpustate) = { illegal,illegal,nop, illegal,illegal,tap, illegal,tpa, inx, clv, dex, sev, clc, cli, sec, sei, sba, illegal,cba, illegal,illegal,tab, illegal,tba, diff --git a/src/emu/cpu/m6800/m6800.c b/src/emu/cpu/m6800/m6800.c index 7967982fb54..070eec910e4 100644 --- a/src/emu/cpu/m6800/m6800.c +++ b/src/emu/cpu/m6800/m6800.c @@ -96,8 +96,8 @@ enum #endif /* 6800 Registers */ -typedef struct _m68_state_t m68_state_t; -struct _m68_state_t +typedef struct _m6800_state m6800_state; +struct _m6800_state { // int subtype; /* CPU subtype */ PAIR ppc; /* Previous program counter */ @@ -120,7 +120,7 @@ struct _m68_state_t const address_space *io; int extra_cycles; /* cycles used for interrupts */ - void (* const * insn)(m68_state_t *); /* instruction table */ + void (* const * insn)(m6800_state *); /* instruction table */ const UINT8 *cycles; /* clock cycle of instruction table */ /* internal registers */ UINT8 port1_ddr; @@ -156,36 +156,36 @@ struct _m68_state_t //static void *token; /* for READ8/WRITE8 handlers */ #if 0 -static void hd63701_trap_pc(m68_state_t *m68_state); +static void hd63701_trap_pc(m6800_state *cpustate); #endif -#define pPPC m68_state->ppc -#define pPC m68_state->pc -#define pS m68_state->s -#define pX m68_state->x -#define pD m68_state->d - -#define PC m68_state->pc.w.l -#define PCD m68_state->pc.d -#define S m68_state->s.w.l -#define SD m68_state->s.d -#define X m68_state->x.w.l -#define D m68_state->d.w.l -#define A m68_state->d.b.h -#define B m68_state->d.b.l -#define CC m68_state->cc - -#define CT m68_state->counter.w.l -#define CTH m68_state->counter.w.h -#define CTD m68_state->counter.d -#define OC m68_state->output_compare.w.l -#define OCH m68_state->output_compare.w.h -#define OCD m68_state->output_compare.d -#define TOH m68_state->timer_over.w.l -#define TOD m68_state->timer_over.d - -#define EAD m68_state->ea.d -#define EA m68_state->ea.w.l +#define pPPC cpustate->ppc +#define pPC cpustate->pc +#define pS cpustate->s +#define pX cpustate->x +#define pD cpustate->d + +#define PC cpustate->pc.w.l +#define PCD cpustate->pc.d +#define S cpustate->s.w.l +#define SD cpustate->s.d +#define X cpustate->x.w.l +#define D cpustate->d.w.l +#define A cpustate->d.b.h +#define B cpustate->d.b.l +#define CC cpustate->cc + +#define CT cpustate->counter.w.l +#define CTH cpustate->counter.w.h +#define CTD cpustate->counter.d +#define OC cpustate->output_compare.w.l +#define OCH cpustate->output_compare.w.h +#define OCD cpustate->output_compare.d +#define TOH cpustate->timer_over.w.l +#define TOD cpustate->timer_over.d + +#define EAD cpustate->ea.d +#define EA cpustate->ea.w.l /* point of next timer event */ static UINT32 timer_next; @@ -195,26 +195,26 @@ static UINT32 timer_next; /****************************************************************************/ /* Read a byte from given memory location */ /****************************************************************************/ -#define RM(Addr) ((unsigned)memory_read_byte_8be(m68_state->program, Addr)) +#define RM(Addr) ((unsigned)memory_read_byte_8be(cpustate->program, Addr)) /****************************************************************************/ /* Write a byte to given memory location */ /****************************************************************************/ -#define WM(Addr,Value) (memory_write_byte_8be(m68_state->program, Addr,Value)) +#define WM(Addr,Value) (memory_write_byte_8be(cpustate->program, Addr,Value)) /****************************************************************************/ /* M6800_RDOP() is identical to M6800_RDMEM() except it is used for reading */ /* opcodes. In case of system with memory mapped I/O, this function can be */ /* used to greatly speed up emulation */ /****************************************************************************/ -#define M_RDOP(Addr) ((unsigned)memory_decrypted_read_byte(m68_state->program, Addr)) +#define M_RDOP(Addr) ((unsigned)memory_decrypted_read_byte(cpustate->program, Addr)) /****************************************************************************/ /* M6800_RDOP_ARG() is identical to M6800_RDOP() but it's used for reading */ /* opcode arguments. This difference can be used to support systems that */ /* use different encoding mechanisms for opcodes and opcode arguments */ /****************************************************************************/ -#define M_RDOP_ARG(Addr) ((unsigned)memory_raw_read_byte(m68_state->program, Addr)) +#define M_RDOP_ARG(Addr) ((unsigned)memory_raw_read_byte(cpustate->program, Addr)) /* macros to access memory */ #define IMMBYTE(b) b = M_RDOP_ARG(PCD); PC++ @@ -226,7 +226,7 @@ static UINT32 timer_next; #define PULLWORD(w) S++; w.d = RM(SD)<<8; S++; w.d |= RM(SD) #define MODIFIED_tcsr { \ - m68_state->irq2 = (m68_state->tcsr&(m68_state->tcsr<<3))&(TCSR_ICF|TCSR_OCF|TCSR_TOF); \ + cpustate->irq2 = (cpustate->tcsr&(cpustate->tcsr<<3))&(TCSR_ICF|TCSR_OCF|TCSR_TOF); \ } #define SET_TIMER_EVENT { \ @@ -280,21 +280,21 @@ enum }; /* take interrupt */ -#define TAKE_ICI enter_interrupt(m68_state, "M6800 '%s' take ICI\n",0xfff6) -#define TAKE_OCI enter_interrupt(m68_state, "M6800 '%s' take OCI\n",0xfff4) -#define TAKE_TOI enter_interrupt(m68_state, "M6800 '%s' take TOI\n",0xfff2) -#define TAKE_SCI enter_interrupt(m68_state, "M6800 '%s' take SCI\n",0xfff0) -#define TAKE_TRAP enter_interrupt(m68_state, "M6800 '%s' take TRAP\n",0xffee) +#define TAKE_ICI enter_interrupt(cpustate, "M6800 '%s' take ICI\n",0xfff6) +#define TAKE_OCI enter_interrupt(cpustate, "M6800 '%s' take OCI\n",0xfff4) +#define TAKE_TOI enter_interrupt(cpustate, "M6800 '%s' take TOI\n",0xfff2) +#define TAKE_SCI enter_interrupt(cpustate, "M6800 '%s' take SCI\n",0xfff0) +#define TAKE_TRAP enter_interrupt(cpustate, "M6800 '%s' take TRAP\n",0xffee) /* operate one instruction for */ #define ONE_MORE_INSN() { \ UINT8 ireg; \ pPPC = pPC; \ - debugger_instruction_hook(m68_state->device, PCD); \ + debugger_instruction_hook(cpustate->device, PCD); \ ireg=M_RDOP(PCD); \ PC++; \ - (*m68_state->insn[ireg])(m68_state); \ - increment_counter(m68_state, m68_state->cycles[ireg]); \ + (*cpustate->insn[ireg])(cpustate); \ + increment_counter(cpustate, cpustate->cycles[ireg]); \ } /* CC masks HI NZVC @@ -374,7 +374,7 @@ static const UINT8 flags8d[256]= /* decrement */ #define DIRECT IMMBYTE(EAD) #define IMM8 EA=PC++ #define IMM16 {EA=PC;PC+=2;} -#define EXTENDED IMMWORD(m68_state->ea) +#define EXTENDED IMMWORD(cpustate->ea) #define INDEXED {EA=X+(UINT8)M_RDOP_ARG(PCD);PC++;} /* macros to set status flags */ @@ -406,12 +406,12 @@ static const UINT8 flags8d[256]= /* decrement */ /* macros for convenience */ #define DIRBYTE(b) {DIRECT;b=RM(EAD);} -#define DIRWORD(w) {DIRECT;w.d=RM16(m68_state, EAD);} +#define DIRWORD(w) {DIRECT;w.d=RM16(cpustate, EAD);} #define EXTBYTE(b) {EXTENDED;b=RM(EAD);} -#define EXTWORD(w) {EXTENDED;w.d=RM16(m68_state, EAD);} +#define EXTWORD(w) {EXTENDED;w.d=RM16(cpustate, EAD);} #define IDXBYTE(b) {INDEXED;b=RM(EAD);} -#define IDXWORD(w) {INDEXED;w.d=RM16(m68_state, EAD);} +#define IDXWORD(w) {INDEXED;w.d=RM16(cpustate, EAD);} /* Macros for branch instructions */ #define BRANCH(f) {IMMBYTE(t);if(f){PC+=SIGNED(t);}} @@ -511,34 +511,34 @@ static const UINT8 cycles_nsc8105[] = int cycles_to_eat; \ \ cycles_to_eat = timer_next - CTD; \ - if( cycles_to_eat > m68_state->icount) cycles_to_eat = m68_state->icount; \ + if( cycles_to_eat > cpustate->icount) cycles_to_eat = cpustate->icount; \ if (cycles_to_eat > 0) \ { \ - increment_counter(m68_state, cycles_to_eat); \ + increment_counter(cpustate, cycles_to_eat); \ } \ } -INLINE UINT32 RM16(m68_state_t *m68_state, UINT32 Addr ) +INLINE UINT32 RM16(m6800_state *cpustate, UINT32 Addr ) { UINT32 result = RM(Addr) << 8; return result | RM((Addr+1)&0xffff); } -INLINE void WM16(m68_state_t *m68_state, UINT32 Addr, PAIR *p ) +INLINE void WM16(m6800_state *cpustate, UINT32 Addr, PAIR *p ) { WM( Addr, p->b.h ); WM( (Addr+1)&0xffff, p->b.l ); } /* IRQ enter */ -static void enter_interrupt(m68_state_t *m68_state, const char *message,UINT16 irq_vector) +static void enter_interrupt(m6800_state *cpustate, const char *message,UINT16 irq_vector) { - LOG((message, m68_state->device->tag)); - if( m68_state->wai_state & (M6800_WAI|M6800_SLP) ) + LOG((message, cpustate->device->tag)); + if( cpustate->wai_state & (M6800_WAI|M6800_SLP) ) { - if( m68_state->wai_state & M6800_WAI ) - m68_state->extra_cycles += 4; - m68_state->wai_state &= ~(M6800_WAI|M6800_SLP); + if( cpustate->wai_state & M6800_WAI ) + cpustate->extra_cycles += 4; + cpustate->wai_state &= ~(M6800_WAI|M6800_SLP); } else { @@ -547,33 +547,33 @@ static void enter_interrupt(m68_state_t *m68_state, const char *message,UINT16 i PUSHBYTE(A); PUSHBYTE(B); PUSHBYTE(CC); - m68_state->extra_cycles += 12; + cpustate->extra_cycles += 12; } SEI; - PCD = RM16(m68_state, irq_vector ); + PCD = RM16(cpustate, irq_vector ); } -static void m6800_check_irq2(m68_state_t *m68_state) +static void m6800_check_irq2(m6800_state *cpustate) { - if ((m68_state->tcsr & (TCSR_EICI|TCSR_ICF)) == (TCSR_EICI|TCSR_ICF)) + if ((cpustate->tcsr & (TCSR_EICI|TCSR_ICF)) == (TCSR_EICI|TCSR_ICF)) { TAKE_ICI; - if( m68_state->irq_callback ) - (void)(*m68_state->irq_callback)(m68_state->device, M6800_TIN_LINE); + if( cpustate->irq_callback ) + (void)(*cpustate->irq_callback)(cpustate->device, M6800_TIN_LINE); } - else if ((m68_state->tcsr & (TCSR_EOCI|TCSR_OCF)) == (TCSR_EOCI|TCSR_OCF)) + else if ((cpustate->tcsr & (TCSR_EOCI|TCSR_OCF)) == (TCSR_EOCI|TCSR_OCF)) { TAKE_OCI; } - else if ((m68_state->tcsr & (TCSR_ETOI|TCSR_TOF)) == (TCSR_ETOI|TCSR_TOF)) + else if ((cpustate->tcsr & (TCSR_ETOI|TCSR_TOF)) == (TCSR_ETOI|TCSR_TOF)) { TAKE_TOI; } - else if (((m68_state->trcsr & (M6800_TRCSR_RIE|M6800_TRCSR_RDRF)) == (M6800_TRCSR_RIE|M6800_TRCSR_RDRF)) || - ((m68_state->trcsr & (M6800_TRCSR_RIE|M6800_TRCSR_ORFE)) == (M6800_TRCSR_RIE|M6800_TRCSR_ORFE)) || - ((m68_state->trcsr & (M6800_TRCSR_TIE|M6800_TRCSR_TDRE)) == (M6800_TRCSR_TIE|M6800_TRCSR_TDRE))) + else if (((cpustate->trcsr & (M6800_TRCSR_RIE|M6800_TRCSR_RDRF)) == (M6800_TRCSR_RIE|M6800_TRCSR_RDRF)) || + ((cpustate->trcsr & (M6800_TRCSR_RIE|M6800_TRCSR_ORFE)) == (M6800_TRCSR_RIE|M6800_TRCSR_ORFE)) || + ((cpustate->trcsr & (M6800_TRCSR_TIE|M6800_TRCSR_TDRE)) == (M6800_TRCSR_TIE|M6800_TRCSR_TDRE))) { TAKE_SCI; } @@ -581,32 +581,32 @@ static void m6800_check_irq2(m68_state_t *m68_state) /* check the IRQ lines for pending interrupts */ -INLINE void CHECK_IRQ_LINES(m68_state_t *m68_state) +INLINE void CHECK_IRQ_LINES(m6800_state *cpustate) { if( !(CC & 0x10) ) { - if( m68_state->irq_state[M6800_IRQ_LINE] != CLEAR_LINE ) + if( cpustate->irq_state[M6800_IRQ_LINE] != CLEAR_LINE ) { /* standard IRQ */ - enter_interrupt(m68_state, "M6800 '%s' take IRQ1n",0xfff8); - if( m68_state->irq_callback ) - (void)(*m68_state->irq_callback)(m68_state->device, M6800_IRQ_LINE); + enter_interrupt(cpustate, "M6800 '%s' take IRQ1n",0xfff8); + if( cpustate->irq_callback ) + (void)(*cpustate->irq_callback)(cpustate->device, M6800_IRQ_LINE); } else - m6800_check_irq2(m68_state); + m6800_check_irq2(cpustate); } } /* check OCI or TOI */ -static void check_timer_event(m68_state_t *m68_state) +static void check_timer_event(m6800_state *cpustate) { /* OCI */ if( CTD >= OCD) { OCH++; // next IRQ point - m68_state->tcsr |= TCSR_OCF; - m68_state->pending_tcsr |= TCSR_OCF; + cpustate->tcsr |= TCSR_OCF; + cpustate->pending_tcsr |= TCSR_OCF; MODIFIED_tcsr; - if ( !(CC & 0x10) && (m68_state->tcsr & TCSR_EOCI)) + if ( !(CC & 0x10) && (cpustate->tcsr & TCSR_EOCI)) TAKE_OCI; } /* TOI */ @@ -616,22 +616,22 @@ static void check_timer_event(m68_state_t *m68_state) #if 0 CLEANUP_COUNTERS(); #endif - m68_state->tcsr |= TCSR_TOF; - m68_state->pending_tcsr |= TCSR_TOF; + cpustate->tcsr |= TCSR_TOF; + cpustate->pending_tcsr |= TCSR_TOF; MODIFIED_tcsr; - if ( !(CC & 0x10) && (m68_state->tcsr & TCSR_ETOI)) + if ( !(CC & 0x10) && (cpustate->tcsr & TCSR_ETOI)) TAKE_TOI; } /* set next event */ SET_TIMER_EVENT; } -INLINE void increment_counter(m68_state_t *m68_state, int amount) +INLINE void increment_counter(m6800_state *cpustate, int amount) { - m68_state->icount -= amount; + cpustate->icount -= amount; CTD += amount; if( CTD >= timer_next) - check_timer_event(m68_state); + check_timer_event(cpustate); } /* include the opcode prototypes and function pointer tables */ @@ -641,161 +641,161 @@ INLINE void increment_counter(m68_state_t *m68_state, int amount) #include "6800ops.c" #if (HAS_M6801||HAS_M6803||HAS_HD63701) -static void m6800_tx(m68_state_t *m68_state, int value) +static void m6800_tx(m6800_state *cpustate, int value) { - m68_state->port2_data = (m68_state->port2_data & 0xef) | (value << 4); + cpustate->port2_data = (cpustate->port2_data & 0xef) | (value << 4); - if(m68_state->port2_ddr == 0xff) - memory_write_byte_8be(m68_state->io, M6803_PORT2,m68_state->port2_data); + if(cpustate->port2_ddr == 0xff) + memory_write_byte_8be(cpustate->io, M6803_PORT2,cpustate->port2_data); else - memory_write_byte_8be(m68_state->io, M6803_PORT2,(m68_state->port2_data & m68_state->port2_ddr) - | (memory_read_byte_8be(m68_state->io, M6803_PORT2) & (m68_state->port2_ddr ^ 0xff))); + memory_write_byte_8be(cpustate->io, M6803_PORT2,(cpustate->port2_data & cpustate->port2_ddr) + | (memory_read_byte_8be(cpustate->io, M6803_PORT2) & (cpustate->port2_ddr ^ 0xff))); } -static int m6800_rx(m68_state_t *m68_state) +static int m6800_rx(m6800_state *cpustate) { - return (memory_read_byte_8be(m68_state->io, M6803_PORT2) & M6800_PORT2_IO3) >> 3; + return (memory_read_byte_8be(cpustate->io, M6803_PORT2) & M6800_PORT2_IO3) >> 3; } static TIMER_CALLBACK(m6800_tx_tick) { - m68_state_t *m68_state = ptr; + m6800_state *cpustate = ptr; - cpu_push_context(m68_state->device); - if (m68_state->trcsr & M6800_TRCSR_TE) + cpu_push_context(cpustate->device); + if (cpustate->trcsr & M6800_TRCSR_TE) { // force Port 2 bit 4 as output - m68_state->port2_ddr |= M6800_PORT2_IO4; + cpustate->port2_ddr |= M6800_PORT2_IO4; - switch (m68_state->txstate) + switch (cpustate->txstate) { case M6800_TX_STATE_INIT: - m68_state->tx = 1; - m68_state->txbits++; + cpustate->tx = 1; + cpustate->txbits++; - if (m68_state->txbits == 10) + if (cpustate->txbits == 10) { - m68_state->txstate = M6800_TX_STATE_READY; - m68_state->txbits = M6800_SERIAL_START; + cpustate->txstate = M6800_TX_STATE_READY; + cpustate->txbits = M6800_SERIAL_START; } break; case M6800_TX_STATE_READY: - switch (m68_state->txbits) + switch (cpustate->txbits) { case M6800_SERIAL_START: - if (m68_state->trcsr & M6800_TRCSR_TDRE) + if (cpustate->trcsr & M6800_TRCSR_TDRE) { // transmit buffer is empty, send consecutive '1's - m68_state->tx = 1; + cpustate->tx = 1; } else { // transmit buffer is full, send data // load TDR to shift register - m68_state->tsr = m68_state->tdr; + cpustate->tsr = cpustate->tdr; // transmit buffer is empty, set TDRE flag - m68_state->trcsr |= M6800_TRCSR_TDRE; + cpustate->trcsr |= M6800_TRCSR_TDRE; // send start bit '0' - m68_state->tx = 0; + cpustate->tx = 0; - m68_state->txbits++; + cpustate->txbits++; } break; case M6800_SERIAL_STOP: // send stop bit '1' - m68_state->tx = 1; + cpustate->tx = 1; - CHECK_IRQ_LINES(m68_state); + CHECK_IRQ_LINES(cpustate); - m68_state->txbits = M6800_SERIAL_START; + cpustate->txbits = M6800_SERIAL_START; break; default: // send data bit '0' or '1' - m68_state->tx = m68_state->tsr & 0x01; + cpustate->tx = cpustate->tsr & 0x01; // shift transmit register - m68_state->tsr >>= 1; + cpustate->tsr >>= 1; - m68_state->txbits++; + cpustate->txbits++; break; } break; } } - m6800_tx(m68_state, m68_state->tx); + m6800_tx(cpustate, cpustate->tx); cpu_pop_context(); } static TIMER_CALLBACK(m6800_rx_tick) { - m68_state_t *m68_state =ptr; + m6800_state *cpustate =ptr; - cpu_push_context(m68_state->device); - if (m68_state->trcsr & M6800_TRCSR_RE) + cpu_push_context(cpustate->device); + if (cpustate->trcsr & M6800_TRCSR_RE) { - if (m68_state->trcsr & M6800_TRCSR_WU) + if (cpustate->trcsr & M6800_TRCSR_WU) { // wait for 10 bits of '1' - if (m6800_rx(m68_state) == 1) + if (m6800_rx(cpustate) == 1) { - m68_state->rxbits++; + cpustate->rxbits++; - if (m68_state->rxbits == 10) + if (cpustate->rxbits == 10) { - m68_state->trcsr &= ~M6800_TRCSR_WU; - m68_state->rxbits = M6800_SERIAL_START; + cpustate->trcsr &= ~M6800_TRCSR_WU; + cpustate->rxbits = M6800_SERIAL_START; } } else { - m68_state->rxbits = M6800_SERIAL_START; + cpustate->rxbits = M6800_SERIAL_START; } } else { // receive data - switch (m68_state->rxbits) + switch (cpustate->rxbits) { case M6800_SERIAL_START: - if (m6800_rx(m68_state) == 0) + if (m6800_rx(cpustate) == 0) { // start bit found - m68_state->rxbits++; + cpustate->rxbits++; } cpu_pop_context(); break; case M6800_SERIAL_STOP: - if (m6800_rx(m68_state) == 1) + if (m6800_rx(cpustate) == 1) { - if (m68_state->trcsr & M6800_TRCSR_RDRF) + if (cpustate->trcsr & M6800_TRCSR_RDRF) { // overrun error - m68_state->trcsr |= M6800_TRCSR_ORFE; + cpustate->trcsr |= M6800_TRCSR_ORFE; - CHECK_IRQ_LINES(m68_state); + CHECK_IRQ_LINES(cpustate); } else { - if (!(m68_state->trcsr & M6800_TRCSR_ORFE)) + if (!(cpustate->trcsr & M6800_TRCSR_ORFE)) { // transfer data into receive register - m68_state->rdr = m68_state->rsr; + cpustate->rdr = cpustate->rsr; // set RDRF flag - m68_state->trcsr |= M6800_TRCSR_RDRF; + cpustate->trcsr |= M6800_TRCSR_RDRF; - CHECK_IRQ_LINES(m68_state); + CHECK_IRQ_LINES(cpustate); } } } @@ -803,29 +803,29 @@ static TIMER_CALLBACK(m6800_rx_tick) { // framing error - if (!(m68_state->trcsr & M6800_TRCSR_ORFE)) + if (!(cpustate->trcsr & M6800_TRCSR_ORFE)) { // transfer unframed data into receive register - m68_state->rdr = m68_state->rsr; + cpustate->rdr = cpustate->rsr; } - m68_state->trcsr |= M6800_TRCSR_ORFE; - m68_state->trcsr &= ~M6800_TRCSR_RDRF; + cpustate->trcsr |= M6800_TRCSR_ORFE; + cpustate->trcsr &= ~M6800_TRCSR_RDRF; - CHECK_IRQ_LINES(m68_state); + CHECK_IRQ_LINES(cpustate); } - m68_state->rxbits = M6800_SERIAL_START; + cpustate->rxbits = M6800_SERIAL_START; break; default: // shift receive register - m68_state->rsr >>= 1; + cpustate->rsr >>= 1; // receive bit into register - m68_state->rsr |= (m6800_rx(m68_state) << 7); + cpustate->rsr |= (m6800_rx(cpustate) << 7); - m68_state->rxbits++; + cpustate->rxbits++; break; } } @@ -837,98 +837,98 @@ static TIMER_CALLBACK(m6800_rx_tick) /**************************************************************************** * Reset registers to their initial values ****************************************************************************/ -static void state_register(m68_state_t *m68_state, const char *type) +static void state_register(m6800_state *cpustate, const char *type) { - state_save_register_device_item(m68_state->device, 0, m68_state->ppc.w.l); - state_save_register_device_item(m68_state->device, 0, m68_state->pc.w.l); - state_save_register_device_item(m68_state->device, 0, m68_state->s.w.l); - state_save_register_device_item(m68_state->device, 0, m68_state->x.w.l); - state_save_register_device_item(m68_state->device, 0, m68_state->d.w.l); - state_save_register_device_item(m68_state->device, 0, m68_state->cc); - state_save_register_device_item(m68_state->device, 0, m68_state->wai_state); - state_save_register_device_item(m68_state->device, 0, m68_state->nmi_state); - state_save_register_device_item_array(m68_state->device, 0, m68_state->irq_state); - state_save_register_device_item(m68_state->device, 0, m68_state->ic_eddge); - - state_save_register_device_item(m68_state->device, 0, m68_state->port1_ddr); - state_save_register_device_item(m68_state->device, 0, m68_state->port2_ddr); - state_save_register_device_item(m68_state->device, 0, m68_state->port3_ddr); - state_save_register_device_item(m68_state->device, 0, m68_state->port4_ddr); - state_save_register_device_item(m68_state->device, 0, m68_state->port1_data); - state_save_register_device_item(m68_state->device, 0, m68_state->port2_data); - state_save_register_device_item(m68_state->device, 0, m68_state->port3_data); - state_save_register_device_item(m68_state->device, 0, m68_state->port4_data); - state_save_register_device_item(m68_state->device, 0, m68_state->tcsr); - state_save_register_device_item(m68_state->device, 0, m68_state->pending_tcsr); - state_save_register_device_item(m68_state->device, 0, m68_state->irq2); - state_save_register_device_item(m68_state->device, 0, m68_state->ram_ctrl); - - state_save_register_device_item(m68_state->device, 0, m68_state->counter.d); - state_save_register_device_item(m68_state->device, 0, m68_state->output_compare.d); - state_save_register_device_item(m68_state->device, 0, m68_state->input_capture); - state_save_register_device_item(m68_state->device, 0, m68_state->timer_over.d); - - state_save_register_device_item(m68_state->device, 0, m68_state->clock); - state_save_register_device_item(m68_state->device, 0, m68_state->trcsr); - state_save_register_device_item(m68_state->device, 0, m68_state->rmcr); - state_save_register_device_item(m68_state->device, 0, m68_state->rdr); - state_save_register_device_item(m68_state->device, 0, m68_state->tdr); - state_save_register_device_item(m68_state->device, 0, m68_state->rsr); - state_save_register_device_item(m68_state->device, 0, m68_state->tsr); - state_save_register_device_item(m68_state->device, 0, m68_state->rxbits); - state_save_register_device_item(m68_state->device, 0, m68_state->txbits); - state_save_register_device_item(m68_state->device, 0, m68_state->txstate); - state_save_register_device_item(m68_state->device, 0, m68_state->trcsr_read); - state_save_register_device_item(m68_state->device, 0, m68_state->tx); + state_save_register_device_item(cpustate->device, 0, cpustate->ppc.w.l); + state_save_register_device_item(cpustate->device, 0, cpustate->pc.w.l); + state_save_register_device_item(cpustate->device, 0, cpustate->s.w.l); + state_save_register_device_item(cpustate->device, 0, cpustate->x.w.l); + state_save_register_device_item(cpustate->device, 0, cpustate->d.w.l); + state_save_register_device_item(cpustate->device, 0, cpustate->cc); + state_save_register_device_item(cpustate->device, 0, cpustate->wai_state); + state_save_register_device_item(cpustate->device, 0, cpustate->nmi_state); + state_save_register_device_item_array(cpustate->device, 0, cpustate->irq_state); + state_save_register_device_item(cpustate->device, 0, cpustate->ic_eddge); + + state_save_register_device_item(cpustate->device, 0, cpustate->port1_ddr); + state_save_register_device_item(cpustate->device, 0, cpustate->port2_ddr); + state_save_register_device_item(cpustate->device, 0, cpustate->port3_ddr); + state_save_register_device_item(cpustate->device, 0, cpustate->port4_ddr); + state_save_register_device_item(cpustate->device, 0, cpustate->port1_data); + state_save_register_device_item(cpustate->device, 0, cpustate->port2_data); + state_save_register_device_item(cpustate->device, 0, cpustate->port3_data); + state_save_register_device_item(cpustate->device, 0, cpustate->port4_data); + state_save_register_device_item(cpustate->device, 0, cpustate->tcsr); + state_save_register_device_item(cpustate->device, 0, cpustate->pending_tcsr); + state_save_register_device_item(cpustate->device, 0, cpustate->irq2); + state_save_register_device_item(cpustate->device, 0, cpustate->ram_ctrl); + + state_save_register_device_item(cpustate->device, 0, cpustate->counter.d); + state_save_register_device_item(cpustate->device, 0, cpustate->output_compare.d); + state_save_register_device_item(cpustate->device, 0, cpustate->input_capture); + state_save_register_device_item(cpustate->device, 0, cpustate->timer_over.d); + + state_save_register_device_item(cpustate->device, 0, cpustate->clock); + state_save_register_device_item(cpustate->device, 0, cpustate->trcsr); + state_save_register_device_item(cpustate->device, 0, cpustate->rmcr); + state_save_register_device_item(cpustate->device, 0, cpustate->rdr); + state_save_register_device_item(cpustate->device, 0, cpustate->tdr); + state_save_register_device_item(cpustate->device, 0, cpustate->rsr); + state_save_register_device_item(cpustate->device, 0, cpustate->tsr); + state_save_register_device_item(cpustate->device, 0, cpustate->rxbits); + state_save_register_device_item(cpustate->device, 0, cpustate->txbits); + state_save_register_device_item(cpustate->device, 0, cpustate->txstate); + state_save_register_device_item(cpustate->device, 0, cpustate->trcsr_read); + state_save_register_device_item(cpustate->device, 0, cpustate->tx); } static CPU_INIT( m6800 ) { - m68_state_t *m68_state = device->token; - - m68_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); - m68_state->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); - m68_state->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); - - // m68_state->subtype = SUBTYPE_M6800; - m68_state->insn = m6800_insn; - m68_state->cycles = cycles_6800; - m68_state->irq_callback = irqcallback; - m68_state->device = device; - state_register(m68_state, "m6800"); + m6800_state *cpustate = device->token; + + cpustate->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); + cpustate->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); + cpustate->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); + + // cpustate->subtype = SUBTYPE_M6800; + cpustate->insn = m6800_insn; + cpustate->cycles = cycles_6800; + cpustate->irq_callback = irqcallback; + cpustate->device = device; + state_register(cpustate, "m6800"); } static CPU_RESET( m6800 ) { - m68_state_t *m68_state = device->token; + m6800_state *cpustate = device->token; SEI; /* IRQ disabled */ - PCD = RM16(m68_state, 0xfffe ); + PCD = RM16(cpustate, 0xfffe ); - m68_state->wai_state = 0; - m68_state->nmi_state = 0; - m68_state->irq_state[M6800_IRQ_LINE] = 0; - m68_state->irq_state[M6800_TIN_LINE] = 0; - m68_state->ic_eddge = 0; + cpustate->wai_state = 0; + cpustate->nmi_state = 0; + cpustate->irq_state[M6800_IRQ_LINE] = 0; + cpustate->irq_state[M6800_TIN_LINE] = 0; + cpustate->ic_eddge = 0; - m68_state->port1_ddr = 0x00; - m68_state->port2_ddr = 0x00; + cpustate->port1_ddr = 0x00; + cpustate->port2_ddr = 0x00; /* TODO: on reset port 2 should be read to determine the operating mode (bits 0-2) */ - m68_state->tcsr = 0x00; - m68_state->pending_tcsr = 0x00; - m68_state->irq2 = 0; + cpustate->tcsr = 0x00; + cpustate->pending_tcsr = 0x00; + cpustate->irq2 = 0; CTD = 0x0000; OCD = 0xffff; TOD = 0xffff; - m68_state->ram_ctrl |= 0x40; - - m68_state->trcsr = M6800_TRCSR_TDRE; - m68_state->rmcr = 0; - if (m68_state->m6800_rx_timer) timer_enable(m68_state->m6800_rx_timer, 0); - if (m68_state->m6800_tx_timer) timer_enable(m68_state->m6800_tx_timer, 0); - m68_state->txstate = M6800_TX_STATE_INIT; - m68_state->txbits = m68_state->rxbits = 0; - m68_state->trcsr_read = 0; + cpustate->ram_ctrl |= 0x40; + + cpustate->trcsr = M6800_TRCSR_TDRE; + cpustate->rmcr = 0; + if (cpustate->m6800_rx_timer) timer_enable(cpustate->m6800_rx_timer, 0); + if (cpustate->m6800_tx_timer) timer_enable(cpustate->m6800_tx_timer, 0); + cpustate->txstate = M6800_TX_STATE_INIT; + cpustate->txbits = cpustate->rxbits = 0; + cpustate->trcsr_read = 0; } /**************************************************************************** @@ -952,31 +952,31 @@ static CPU_GET_CONTEXT( m6800 ) ****************************************************************************/ static CPU_SET_CONTEXT( m6800 ) { - m68_state_t *m68_state = src; + m6800_state *cpustate = src; - CHECK_IRQ_LINES(m68_state); /* HJB 990417 */ + CHECK_IRQ_LINES(cpustate); /* HJB 990417 */ } -static void set_irq_line(m68_state_t *m68_state, int irqline, int state) +static void set_irq_line(m6800_state *cpustate, int irqline, int state) { if (irqline == INPUT_LINE_NMI) { - if (m68_state->nmi_state == state) return; - LOG(("M6800 '%s' set_nmi_line %d \n", m68_state->device->tag, state)); - m68_state->nmi_state = state; + if (cpustate->nmi_state == state) return; + LOG(("M6800 '%s' set_nmi_line %d \n", cpustate->device->tag, state)); + cpustate->nmi_state = state; if (state == CLEAR_LINE) return; /* NMI */ - enter_interrupt(m68_state, "M6800 '%s' take NMI\n",0xfffc); + enter_interrupt(cpustate, "M6800 '%s' take NMI\n",0xfffc); } else { int eddge; - if (m68_state->irq_state[irqline] == state) return; - LOG(("M6800 '%s' set_irq_line %d,%d\n", m68_state->device->tag, irqline, state)); - m68_state->irq_state[irqline] = state; + if (cpustate->irq_state[irqline] == state) return; + LOG(("M6800 '%s' set_irq_line %d,%d\n", cpustate->device->tag, irqline, state)); + cpustate->irq_state[irqline] = state; switch(irqline) { @@ -985,20 +985,20 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state) break; case M6800_TIN_LINE: eddge = (state == CLEAR_LINE ) ? 2 : 0; - if( ((m68_state->tcsr&TCSR_IEDG) ^ (state==CLEAR_LINE ? TCSR_IEDG : 0))==0 ) + if( ((cpustate->tcsr&TCSR_IEDG) ^ (state==CLEAR_LINE ? TCSR_IEDG : 0))==0 ) return; /* active edge in */ - m68_state->tcsr |= TCSR_ICF; - m68_state->pending_tcsr |= TCSR_ICF; - m68_state->input_capture = CT; + cpustate->tcsr |= TCSR_ICF; + cpustate->pending_tcsr |= TCSR_ICF; + cpustate->input_capture = CT; MODIFIED_tcsr; if( !(CC & 0x10) ) - m6800_check_irq2(m68_state); + m6800_check_irq2(cpustate); break; default: return; } - CHECK_IRQ_LINES(m68_state); /* HJB 990417 */ + CHECK_IRQ_LINES(cpustate); /* HJB 990417 */ } } @@ -1006,266 +1006,266 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state) * Execute one instruction ****************************************************************************/ -INLINE void m6800_execute_one(m68_state_t *m68_state, UINT8 ireg) +INLINE void m6800_execute_one(m6800_state *cpustate, UINT8 ireg) { switch( ireg ) { - case 0x00: illegal(m68_state); break; - case 0x01: nop(m68_state); break; - case 0x02: illegal(m68_state); break; - case 0x03: illegal(m68_state); break; - case 0x04: illegal(m68_state); break; - case 0x05: illegal(m68_state); break; - case 0x06: tap(m68_state); break; - case 0x07: tpa(m68_state); break; - case 0x08: inx(m68_state); break; - case 0x09: dex(m68_state); break; + case 0x00: illegal(cpustate); break; + case 0x01: nop(cpustate); break; + case 0x02: illegal(cpustate); break; + case 0x03: illegal(cpustate); break; + case 0x04: illegal(cpustate); break; + case 0x05: illegal(cpustate); break; + case 0x06: tap(cpustate); break; + case 0x07: tpa(cpustate); break; + case 0x08: inx(cpustate); break; + case 0x09: dex(cpustate); break; case 0x0A: CLV; break; case 0x0B: SEV; break; case 0x0C: CLC; break; case 0x0D: SEC; break; - case 0x0E: cli(m68_state); break; - case 0x0F: sei(m68_state); break; - case 0x10: sba(m68_state); break; - case 0x11: cba(m68_state); break; - case 0x12: illegal(m68_state); break; - case 0x13: illegal(m68_state); break; - case 0x14: illegal(m68_state); break; - case 0x15: illegal(m68_state); break; - case 0x16: tab(m68_state); break; - case 0x17: tba(m68_state); break; - case 0x18: illegal(m68_state); break; - case 0x19: daa(m68_state); break; - case 0x1a: illegal(m68_state); break; - case 0x1b: aba(m68_state); break; - case 0x1c: illegal(m68_state); break; - case 0x1d: illegal(m68_state); break; - case 0x1e: illegal(m68_state); break; - case 0x1f: illegal(m68_state); break; - case 0x20: bra(m68_state); break; - case 0x21: brn(m68_state); break; - case 0x22: bhi(m68_state); break; - case 0x23: bls(m68_state); break; - case 0x24: bcc(m68_state); break; - case 0x25: bcs(m68_state); break; - case 0x26: bne(m68_state); break; - case 0x27: beq(m68_state); break; - case 0x28: bvc(m68_state); break; - case 0x29: bvs(m68_state); break; - case 0x2a: bpl(m68_state); break; - case 0x2b: bmi(m68_state); break; - case 0x2c: bge(m68_state); break; - case 0x2d: blt(m68_state); break; - case 0x2e: bgt(m68_state); break; - case 0x2f: ble(m68_state); break; - case 0x30: tsx(m68_state); break; - case 0x31: ins(m68_state); break; - case 0x32: pula(m68_state); break; - case 0x33: pulb(m68_state); break; - case 0x34: des(m68_state); break; - case 0x35: txs(m68_state); break; - case 0x36: psha(m68_state); break; - case 0x37: pshb(m68_state); break; - case 0x38: illegal(m68_state); break; - case 0x39: rts(m68_state); break; - case 0x3a: illegal(m68_state); break; - case 0x3b: rti(m68_state); break; - case 0x3c: illegal(m68_state); break; - case 0x3d: illegal(m68_state); break; - case 0x3e: wai(m68_state); break; - case 0x3f: swi(m68_state); break; - case 0x40: nega(m68_state); break; - case 0x41: illegal(m68_state); break; - case 0x42: illegal(m68_state); break; - case 0x43: coma(m68_state); break; - case 0x44: lsra(m68_state); break; - case 0x45: illegal(m68_state); break; - case 0x46: rora(m68_state); break; - case 0x47: asra(m68_state); break; - case 0x48: asla(m68_state); break; - case 0x49: rola(m68_state); break; - case 0x4a: deca(m68_state); break; - case 0x4b: illegal(m68_state); break; - case 0x4c: inca(m68_state); break; - case 0x4d: tsta(m68_state); break; - case 0x4e: illegal(m68_state); break; - case 0x4f: clra(m68_state); break; - case 0x50: negb(m68_state); break; - case 0x51: illegal(m68_state); break; - case 0x52: illegal(m68_state); break; - case 0x53: comb(m68_state); break; - case 0x54: lsrb(m68_state); break; - case 0x55: illegal(m68_state); break; - case 0x56: rorb(m68_state); break; - case 0x57: asrb(m68_state); break; - case 0x58: aslb(m68_state); break; - case 0x59: rolb(m68_state); break; - case 0x5a: decb(m68_state); break; - case 0x5b: illegal(m68_state); break; - case 0x5c: incb(m68_state); break; - case 0x5d: tstb(m68_state); break; - case 0x5e: illegal(m68_state); break; - case 0x5f: clrb(m68_state); break; - case 0x60: neg_ix(m68_state); break; - case 0x61: illegal(m68_state); break; - case 0x62: illegal(m68_state); break; - case 0x63: com_ix(m68_state); break; - case 0x64: lsr_ix(m68_state); break; - case 0x65: illegal(m68_state); break; - case 0x66: ror_ix(m68_state); break; - case 0x67: asr_ix(m68_state); break; - case 0x68: asl_ix(m68_state); break; - case 0x69: rol_ix(m68_state); break; - case 0x6a: dec_ix(m68_state); break; - case 0x6b: illegal(m68_state); break; - case 0x6c: inc_ix(m68_state); break; - case 0x6d: tst_ix(m68_state); break; - case 0x6e: jmp_ix(m68_state); break; - case 0x6f: clr_ix(m68_state); break; - case 0x70: neg_ex(m68_state); break; - case 0x71: illegal(m68_state); break; - case 0x72: illegal(m68_state); break; - case 0x73: com_ex(m68_state); break; - case 0x74: lsr_ex(m68_state); break; - case 0x75: illegal(m68_state); break; - case 0x76: ror_ex(m68_state); break; - case 0x77: asr_ex(m68_state); break; - case 0x78: asl_ex(m68_state); break; - case 0x79: rol_ex(m68_state); break; - case 0x7a: dec_ex(m68_state); break; - case 0x7b: illegal(m68_state); break; - case 0x7c: inc_ex(m68_state); break; - case 0x7d: tst_ex(m68_state); break; - case 0x7e: jmp_ex(m68_state); break; - case 0x7f: clr_ex(m68_state); break; - case 0x80: suba_im(m68_state); break; - case 0x81: cmpa_im(m68_state); break; - case 0x82: sbca_im(m68_state); break; - case 0x83: illegal(m68_state); break; - case 0x84: anda_im(m68_state); break; - case 0x85: bita_im(m68_state); break; - case 0x86: lda_im(m68_state); break; - case 0x87: sta_im(m68_state); break; - case 0x88: eora_im(m68_state); break; - case 0x89: adca_im(m68_state); break; - case 0x8a: ora_im(m68_state); break; - case 0x8b: adda_im(m68_state); break; - case 0x8c: cmpx_im(m68_state); break; - case 0x8d: bsr(m68_state); break; - case 0x8e: lds_im(m68_state); break; - case 0x8f: sts_im(m68_state); /* orthogonality */ break; - case 0x90: suba_di(m68_state); break; - case 0x91: cmpa_di(m68_state); break; - case 0x92: sbca_di(m68_state); break; - case 0x93: illegal(m68_state); break; - case 0x94: anda_di(m68_state); break; - case 0x95: bita_di(m68_state); break; - case 0x96: lda_di(m68_state); break; - case 0x97: sta_di(m68_state); break; - case 0x98: eora_di(m68_state); break; - case 0x99: adca_di(m68_state); break; - case 0x9a: ora_di(m68_state); break; - case 0x9b: adda_di(m68_state); break; - case 0x9c: cmpx_di(m68_state); break; - case 0x9d: jsr_di(m68_state); break; - case 0x9e: lds_di(m68_state); break; - case 0x9f: sts_di(m68_state); break; - case 0xa0: suba_ix(m68_state); break; - case 0xa1: cmpa_ix(m68_state); break; - case 0xa2: sbca_ix(m68_state); break; - case 0xa3: illegal(m68_state); break; - case 0xa4: anda_ix(m68_state); break; - case 0xa5: bita_ix(m68_state); break; - case 0xa6: lda_ix(m68_state); break; - case 0xa7: sta_ix(m68_state); break; - case 0xa8: eora_ix(m68_state); break; - case 0xa9: adca_ix(m68_state); break; - case 0xaa: ora_ix(m68_state); break; - case 0xab: adda_ix(m68_state); break; - case 0xac: cmpx_ix(m68_state); break; - case 0xad: jsr_ix(m68_state); break; - case 0xae: lds_ix(m68_state); break; - case 0xaf: sts_ix(m68_state); break; - case 0xb0: suba_ex(m68_state); break; - case 0xb1: cmpa_ex(m68_state); break; - case 0xb2: sbca_ex(m68_state); break; - case 0xb3: illegal(m68_state); break; - case 0xb4: anda_ex(m68_state); break; - case 0xb5: bita_ex(m68_state); break; - case 0xb6: lda_ex(m68_state); break; - case 0xb7: sta_ex(m68_state); break; - case 0xb8: eora_ex(m68_state); break; - case 0xb9: adca_ex(m68_state); break; - case 0xba: ora_ex(m68_state); break; - case 0xbb: adda_ex(m68_state); break; - case 0xbc: cmpx_ex(m68_state); break; - case 0xbd: jsr_ex(m68_state); break; - case 0xbe: lds_ex(m68_state); break; - case 0xbf: sts_ex(m68_state); break; - case 0xc0: subb_im(m68_state); break; - case 0xc1: cmpb_im(m68_state); break; - case 0xc2: sbcb_im(m68_state); break; - case 0xc3: illegal(m68_state); break; - case 0xc4: andb_im(m68_state); break; - case 0xc5: bitb_im(m68_state); break; - case 0xc6: ldb_im(m68_state); break; - case 0xc7: stb_im(m68_state); break; - case 0xc8: eorb_im(m68_state); break; - case 0xc9: adcb_im(m68_state); break; - case 0xca: orb_im(m68_state); break; - case 0xcb: addb_im(m68_state); break; - case 0xcc: illegal(m68_state); break; - case 0xcd: illegal(m68_state); break; - case 0xce: ldx_im(m68_state); break; - case 0xcf: stx_im(m68_state); break; - case 0xd0: subb_di(m68_state); break; - case 0xd1: cmpb_di(m68_state); break; - case 0xd2: sbcb_di(m68_state); break; - case 0xd3: illegal(m68_state); break; - case 0xd4: andb_di(m68_state); break; - case 0xd5: bitb_di(m68_state); break; - case 0xd6: ldb_di(m68_state); break; - case 0xd7: stb_di(m68_state); break; - case 0xd8: eorb_di(m68_state); break; - case 0xd9: adcb_di(m68_state); break; - case 0xda: orb_di(m68_state); break; - case 0xdb: addb_di(m68_state); break; - case 0xdc: illegal(m68_state); break; - case 0xdd: illegal(m68_state); break; - case 0xde: ldx_di(m68_state); break; - case 0xdf: stx_di(m68_state); break; - case 0xe0: subb_ix(m68_state); break; - case 0xe1: cmpb_ix(m68_state); break; - case 0xe2: sbcb_ix(m68_state); break; - case 0xe3: illegal(m68_state); break; - case 0xe4: andb_ix(m68_state); break; - case 0xe5: bitb_ix(m68_state); break; - case 0xe6: ldb_ix(m68_state); break; - case 0xe7: stb_ix(m68_state); break; - case 0xe8: eorb_ix(m68_state); break; - case 0xe9: adcb_ix(m68_state); break; - case 0xea: orb_ix(m68_state); break; - case 0xeb: addb_ix(m68_state); break; - case 0xec: illegal(m68_state); break; - case 0xed: illegal(m68_state); break; - case 0xee: ldx_ix(m68_state); break; - case 0xef: stx_ix(m68_state); break; - case 0xf0: subb_ex(m68_state); break; - case 0xf1: cmpb_ex(m68_state); break; - case 0xf2: sbcb_ex(m68_state); break; - case 0xf3: illegal(m68_state); break; - case 0xf4: andb_ex(m68_state); break; - case 0xf5: bitb_ex(m68_state); break; - case 0xf6: ldb_ex(m68_state); break; - case 0xf7: stb_ex(m68_state); break; - case 0xf8: eorb_ex(m68_state); break; - case 0xf9: adcb_ex(m68_state); break; - case 0xfa: orb_ex(m68_state); break; - case 0xfb: addb_ex(m68_state); break; - case 0xfc: addx_ex(m68_state); break; - case 0xfd: illegal(m68_state); break; - case 0xfe: ldx_ex(m68_state); break; - case 0xff: stx_ex(m68_state); break; + case 0x0E: cli(cpustate); break; + case 0x0F: sei(cpustate); break; + case 0x10: sba(cpustate); break; + case 0x11: cba(cpustate); break; + case 0x12: illegal(cpustate); break; + case 0x13: illegal(cpustate); break; + case 0x14: illegal(cpustate); break; + case 0x15: illegal(cpustate); break; + case 0x16: tab(cpustate); break; + case 0x17: tba(cpustate); break; + case 0x18: illegal(cpustate); break; + case 0x19: daa(cpustate); break; + case 0x1a: illegal(cpustate); break; + case 0x1b: aba(cpustate); break; + case 0x1c: illegal(cpustate); break; + case 0x1d: illegal(cpustate); break; + case 0x1e: illegal(cpustate); break; + case 0x1f: illegal(cpustate); break; + case 0x20: bra(cpustate); break; + case 0x21: brn(cpustate); break; + case 0x22: bhi(cpustate); break; + case 0x23: bls(cpustate); break; + case 0x24: bcc(cpustate); break; + case 0x25: bcs(cpustate); break; + case 0x26: bne(cpustate); break; + case 0x27: beq(cpustate); break; + case 0x28: bvc(cpustate); break; + case 0x29: bvs(cpustate); break; + case 0x2a: bpl(cpustate); break; + case 0x2b: bmi(cpustate); break; + case 0x2c: bge(cpustate); break; + case 0x2d: blt(cpustate); break; + case 0x2e: bgt(cpustate); break; + case 0x2f: ble(cpustate); break; + case 0x30: tsx(cpustate); break; + case 0x31: ins(cpustate); break; + case 0x32: pula(cpustate); break; + case 0x33: pulb(cpustate); break; + case 0x34: des(cpustate); break; + case 0x35: txs(cpustate); break; + case 0x36: psha(cpustate); break; + case 0x37: pshb(cpustate); break; + case 0x38: illegal(cpustate); break; + case 0x39: rts(cpustate); break; + case 0x3a: illegal(cpustate); break; + case 0x3b: rti(cpustate); break; + case 0x3c: illegal(cpustate); break; + case 0x3d: illegal(cpustate); break; + case 0x3e: wai(cpustate); break; + case 0x3f: swi(cpustate); break; + case 0x40: nega(cpustate); break; + case 0x41: illegal(cpustate); break; + case 0x42: illegal(cpustate); break; + case 0x43: coma(cpustate); break; + case 0x44: lsra(cpustate); break; + case 0x45: illegal(cpustate); break; + case 0x46: rora(cpustate); break; + case 0x47: asra(cpustate); break; + case 0x48: asla(cpustate); break; + case 0x49: rola(cpustate); break; + case 0x4a: deca(cpustate); break; + case 0x4b: illegal(cpustate); break; + case 0x4c: inca(cpustate); break; + case 0x4d: tsta(cpustate); break; + case 0x4e: illegal(cpustate); break; + case 0x4f: clra(cpustate); break; + case 0x50: negb(cpustate); break; + case 0x51: illegal(cpustate); break; + case 0x52: illegal(cpustate); break; + case 0x53: comb(cpustate); break; + case 0x54: lsrb(cpustate); break; + case 0x55: illegal(cpustate); break; + case 0x56: rorb(cpustate); break; + case 0x57: asrb(cpustate); break; + case 0x58: aslb(cpustate); break; + case 0x59: rolb(cpustate); break; + case 0x5a: decb(cpustate); break; + case 0x5b: illegal(cpustate); break; + case 0x5c: incb(cpustate); break; + case 0x5d: tstb(cpustate); break; + case 0x5e: illegal(cpustate); break; + case 0x5f: clrb(cpustate); break; + case 0x60: neg_ix(cpustate); break; + case 0x61: illegal(cpustate); break; + case 0x62: illegal(cpustate); break; + case 0x63: com_ix(cpustate); break; + case 0x64: lsr_ix(cpustate); break; + case 0x65: illegal(cpustate); break; + case 0x66: ror_ix(cpustate); break; + case 0x67: asr_ix(cpustate); break; + case 0x68: asl_ix(cpustate); break; + case 0x69: rol_ix(cpustate); break; + case 0x6a: dec_ix(cpustate); break; + case 0x6b: illegal(cpustate); break; + case 0x6c: inc_ix(cpustate); break; + case 0x6d: tst_ix(cpustate); break; + case 0x6e: jmp_ix(cpustate); break; + case 0x6f: clr_ix(cpustate); break; + case 0x70: neg_ex(cpustate); break; + case 0x71: illegal(cpustate); break; + case 0x72: illegal(cpustate); break; + case 0x73: com_ex(cpustate); break; + case 0x74: lsr_ex(cpustate); break; + case 0x75: illegal(cpustate); break; + case 0x76: ror_ex(cpustate); break; + case 0x77: asr_ex(cpustate); break; + case 0x78: asl_ex(cpustate); break; + case 0x79: rol_ex(cpustate); break; + case 0x7a: dec_ex(cpustate); break; + case 0x7b: illegal(cpustate); break; + case 0x7c: inc_ex(cpustate); break; + case 0x7d: tst_ex(cpustate); break; + case 0x7e: jmp_ex(cpustate); break; + case 0x7f: clr_ex(cpustate); break; + case 0x80: suba_im(cpustate); break; + case 0x81: cmpa_im(cpustate); break; + case 0x82: sbca_im(cpustate); break; + case 0x83: illegal(cpustate); break; + case 0x84: anda_im(cpustate); break; + case 0x85: bita_im(cpustate); break; + case 0x86: lda_im(cpustate); break; + case 0x87: sta_im(cpustate); break; + case 0x88: eora_im(cpustate); break; + case 0x89: adca_im(cpustate); break; + case 0x8a: ora_im(cpustate); break; + case 0x8b: adda_im(cpustate); break; + case 0x8c: cmpx_im(cpustate); break; + case 0x8d: bsr(cpustate); break; + case 0x8e: lds_im(cpustate); break; + case 0x8f: sts_im(cpustate); /* orthogonality */ break; + case 0x90: suba_di(cpustate); break; + case 0x91: cmpa_di(cpustate); break; + case 0x92: sbca_di(cpustate); break; + case 0x93: illegal(cpustate); break; + case 0x94: anda_di(cpustate); break; + case 0x95: bita_di(cpustate); break; + case 0x96: lda_di(cpustate); break; + case 0x97: sta_di(cpustate); break; + case 0x98: eora_di(cpustate); break; + case 0x99: adca_di(cpustate); break; + case 0x9a: ora_di(cpustate); break; + case 0x9b: adda_di(cpustate); break; + case 0x9c: cmpx_di(cpustate); break; + case 0x9d: jsr_di(cpustate); break; + case 0x9e: lds_di(cpustate); break; + case 0x9f: sts_di(cpustate); break; + case 0xa0: suba_ix(cpustate); break; + case 0xa1: cmpa_ix(cpustate); break; + case 0xa2: sbca_ix(cpustate); break; + case 0xa3: illegal(cpustate); break; + case 0xa4: anda_ix(cpustate); break; + case 0xa5: bita_ix(cpustate); break; + case 0xa6: lda_ix(cpustate); break; + case 0xa7: sta_ix(cpustate); break; + case 0xa8: eora_ix(cpustate); break; + case 0xa9: adca_ix(cpustate); break; + case 0xaa: ora_ix(cpustate); break; + case 0xab: adda_ix(cpustate); break; + case 0xac: cmpx_ix(cpustate); break; + case 0xad: jsr_ix(cpustate); break; + case 0xae: lds_ix(cpustate); break; + case 0xaf: sts_ix(cpustate); break; + case 0xb0: suba_ex(cpustate); break; + case 0xb1: cmpa_ex(cpustate); break; + case 0xb2: sbca_ex(cpustate); break; + case 0xb3: illegal(cpustate); break; + case 0xb4: anda_ex(cpustate); break; + case 0xb5: bita_ex(cpustate); break; + case 0xb6: lda_ex(cpustate); break; + case 0xb7: sta_ex(cpustate); break; + case 0xb8: eora_ex(cpustate); break; + case 0xb9: adca_ex(cpustate); break; + case 0xba: ora_ex(cpustate); break; + case 0xbb: adda_ex(cpustate); break; + case 0xbc: cmpx_ex(cpustate); break; + case 0xbd: jsr_ex(cpustate); break; + case 0xbe: lds_ex(cpustate); break; + case 0xbf: sts_ex(cpustate); break; + case 0xc0: subb_im(cpustate); break; + case 0xc1: cmpb_im(cpustate); break; + case 0xc2: sbcb_im(cpustate); break; + case 0xc3: illegal(cpustate); break; + case 0xc4: andb_im(cpustate); break; + case 0xc5: bitb_im(cpustate); break; + case 0xc6: ldb_im(cpustate); break; + case 0xc7: stb_im(cpustate); break; + case 0xc8: eorb_im(cpustate); break; + case 0xc9: adcb_im(cpustate); break; + case 0xca: orb_im(cpustate); break; + case 0xcb: addb_im(cpustate); break; + case 0xcc: illegal(cpustate); break; + case 0xcd: illegal(cpustate); break; + case 0xce: ldx_im(cpustate); break; + case 0xcf: stx_im(cpustate); break; + case 0xd0: subb_di(cpustate); break; + case 0xd1: cmpb_di(cpustate); break; + case 0xd2: sbcb_di(cpustate); break; + case 0xd3: illegal(cpustate); break; + case 0xd4: andb_di(cpustate); break; + case 0xd5: bitb_di(cpustate); break; + case 0xd6: ldb_di(cpustate); break; + case 0xd7: stb_di(cpustate); break; + case 0xd8: eorb_di(cpustate); break; + case 0xd9: adcb_di(cpustate); break; + case 0xda: orb_di(cpustate); break; + case 0xdb: addb_di(cpustate); break; + case 0xdc: illegal(cpustate); break; + case 0xdd: illegal(cpustate); break; + case 0xde: ldx_di(cpustate); break; + case 0xdf: stx_di(cpustate); break; + case 0xe0: subb_ix(cpustate); break; + case 0xe1: cmpb_ix(cpustate); break; + case 0xe2: sbcb_ix(cpustate); break; + case 0xe3: illegal(cpustate); break; + case 0xe4: andb_ix(cpustate); break; + case 0xe5: bitb_ix(cpustate); break; + case 0xe6: ldb_ix(cpustate); break; + case 0xe7: stb_ix(cpustate); break; + case 0xe8: eorb_ix(cpustate); break; + case 0xe9: adcb_ix(cpustate); break; + case 0xea: orb_ix(cpustate); break; + case 0xeb: addb_ix(cpustate); break; + case 0xec: illegal(cpustate); break; + case 0xed: illegal(cpustate); break; + case 0xee: ldx_ix(cpustate); break; + case 0xef: stx_ix(cpustate); break; + case 0xf0: subb_ex(cpustate); break; + case 0xf1: cmpb_ex(cpustate); break; + case 0xf2: sbcb_ex(cpustate); break; + case 0xf3: illegal(cpustate); break; + case 0xf4: andb_ex(cpustate); break; + case 0xf5: bitb_ex(cpustate); break; + case 0xf6: ldb_ex(cpustate); break; + case 0xf7: stb_ex(cpustate); break; + case 0xf8: eorb_ex(cpustate); break; + case 0xf9: adcb_ex(cpustate); break; + case 0xfa: orb_ex(cpustate); break; + case 0xfb: addb_ex(cpustate); break; + case 0xfc: addx_ex(cpustate); break; + case 0xfd: illegal(cpustate); break; + case 0xfe: ldx_ex(cpustate); break; + case 0xff: stx_ex(cpustate); break; } } @@ -1274,17 +1274,17 @@ INLINE void m6800_execute_one(m68_state_t *m68_state, UINT8 ireg) ****************************************************************************/ static CPU_EXECUTE( m6800 ) { - m68_state_t *m68_state = device->token; + m6800_state *cpustate = device->token; UINT8 ireg; - m68_state->icount = cycles; + cpustate->icount = cycles; CLEANUP_COUNTERS(); - increment_counter(m68_state, m68_state->extra_cycles); - m68_state->extra_cycles = 0; + increment_counter(cpustate, cpustate->extra_cycles); + cpustate->extra_cycles = 0; do { - if( m68_state->wai_state & M6800_WAI ) + if( cpustate->wai_state & M6800_WAI ) { EAT_CYCLES; } @@ -1294,15 +1294,15 @@ static CPU_EXECUTE( m6800 ) debugger_instruction_hook(device, PCD); ireg=M_RDOP(PCD); PC++; - m6800_execute_one(m68_state, ireg); - increment_counter(m68_state, cycles_6800[ireg]); + m6800_execute_one(cpustate, ireg); + increment_counter(cpustate, cycles_6800[ireg]); } - } while( m68_state->icount>0 ); + } while( cpustate->icount>0 ); - increment_counter(m68_state, m68_state->extra_cycles); - m68_state->extra_cycles = 0; + increment_counter(cpustate, cpustate->extra_cycles); + cpustate->extra_cycles = 0; - return cycles - m68_state->icount; + return cycles - cpustate->icount; } /**************************************************************************** @@ -1311,22 +1311,22 @@ static CPU_EXECUTE( m6800 ) #if (HAS_M6801) static CPU_INIT( m6801 ) { - m68_state_t *m68_state = device->token; -// m68_state->subtype = SUBTYPE_M6801; - m68_state->insn = m6803_insn; - m68_state->cycles = cycles_6803; - m68_state->irq_callback = irqcallback; - m68_state->device = device; - - m68_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); - m68_state->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); - m68_state->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); - - m68_state->clock = clock; - m68_state->m6800_rx_timer = timer_alloc(device->machine, m6800_rx_tick, m68_state); - m68_state->m6800_tx_timer = timer_alloc(device->machine, m6800_tx_tick, m68_state); - - state_register(m68_state, "m6801"); + m6800_state *cpustate = device->token; +// cpustate->subtype = SUBTYPE_M6801; + cpustate->insn = m6803_insn; + cpustate->cycles = cycles_6803; + cpustate->irq_callback = irqcallback; + cpustate->device = device; + + cpustate->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); + cpustate->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); + cpustate->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); + + cpustate->clock = clock; + cpustate->m6800_rx_timer = timer_alloc(device->machine, m6800_rx_tick, cpustate); + cpustate->m6800_tx_timer = timer_alloc(device->machine, m6800_tx_tick, cpustate); + + state_register(cpustate, "m6801"); } #endif @@ -1336,18 +1336,18 @@ static CPU_INIT( m6801 ) #if (HAS_M6802) static CPU_INIT( m6802 ) { - m68_state_t *m68_state = device->token; - // m68_state->subtype = SUBTYPE_M6802; - m68_state->insn = m6800_insn; - m68_state->cycles = cycles_6800; - m68_state->irq_callback = irqcallback; - m68_state->device = device; - - m68_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); - m68_state->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); - m68_state->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); - - state_register(m68_state, "m6802"); + m6800_state *cpustate = device->token; + // cpustate->subtype = SUBTYPE_M6802; + cpustate->insn = m6800_insn; + cpustate->cycles = cycles_6800; + cpustate->irq_callback = irqcallback; + cpustate->device = device; + + cpustate->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); + cpustate->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); + cpustate->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); + + state_register(cpustate, "m6802"); } #endif @@ -1357,22 +1357,22 @@ static CPU_INIT( m6802 ) #if (HAS_M6803) static CPU_INIT( m6803 ) { - m68_state_t *m68_state = device->token; - // m68_state->subtype = SUBTYPE_M6803; - m68_state->insn = m6803_insn; - m68_state->cycles = cycles_6803; - m68_state->irq_callback = irqcallback; - m68_state->device = device; - - m68_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); - m68_state->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); - m68_state->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); - - m68_state->clock = clock; - m68_state->m6800_rx_timer = timer_alloc(device->machine, m6800_rx_tick, m68_state); - m68_state->m6800_tx_timer = timer_alloc(device->machine, m6800_tx_tick, m68_state); - - state_register(m68_state, "m6803"); + m6800_state *cpustate = device->token; + // cpustate->subtype = SUBTYPE_M6803; + cpustate->insn = m6803_insn; + cpustate->cycles = cycles_6803; + cpustate->irq_callback = irqcallback; + cpustate->device = device; + + cpustate->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); + cpustate->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); + cpustate->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); + + cpustate->clock = clock; + cpustate->m6800_rx_timer = timer_alloc(device->machine, m6800_rx_tick, cpustate); + cpustate->m6800_tx_timer = timer_alloc(device->machine, m6800_tx_tick, cpustate); + + state_register(cpustate, "m6803"); } #endif @@ -1380,266 +1380,266 @@ static CPU_INIT( m6803 ) * Execute one instruction ****************************************************************************/ -INLINE void m6803_execute_one(m68_state_t *m68_state, UINT8 ireg) +INLINE void m6803_execute_one(m6800_state *cpustate, UINT8 ireg) { switch( ireg ) { - case 0x00: illegal(m68_state); break; - case 0x01: nop(m68_state); break; - case 0x02: illegal(m68_state); break; - case 0x03: illegal(m68_state); break; - case 0x04: lsrd(m68_state); /* 6803 only */; break; - case 0x05: asld(m68_state); /* 6803 only */; break; - case 0x06: tap(m68_state); break; - case 0x07: tpa(m68_state); break; - case 0x08: inx(m68_state); break; - case 0x09: dex(m68_state); break; + case 0x00: illegal(cpustate); break; + case 0x01: nop(cpustate); break; + case 0x02: illegal(cpustate); break; + case 0x03: illegal(cpustate); break; + case 0x04: lsrd(cpustate); /* 6803 only */; break; + case 0x05: asld(cpustate); /* 6803 only */; break; + case 0x06: tap(cpustate); break; + case 0x07: tpa(cpustate); break; + case 0x08: inx(cpustate); break; + case 0x09: dex(cpustate); break; case 0x0A: CLV; break; case 0x0B: SEV; break; case 0x0C: CLC; break; case 0x0D: SEC; break; - case 0x0E: cli(m68_state); break; - case 0x0F: sei(m68_state); break; - case 0x10: sba(m68_state); break; - case 0x11: cba(m68_state); break; - case 0x12: illegal(m68_state); break; - case 0x13: illegal(m68_state); break; - case 0x14: illegal(m68_state); break; - case 0x15: illegal(m68_state); break; - case 0x16: tab(m68_state); break; - case 0x17: tba(m68_state); break; - case 0x18: illegal(m68_state); break; - case 0x19: daa(m68_state); break; - case 0x1a: illegal(m68_state); break; - case 0x1b: aba(m68_state); break; - case 0x1c: illegal(m68_state); break; - case 0x1d: illegal(m68_state); break; - case 0x1e: illegal(m68_state); break; - case 0x1f: illegal(m68_state); break; - case 0x20: bra(m68_state); break; - case 0x21: brn(m68_state); break; - case 0x22: bhi(m68_state); break; - case 0x23: bls(m68_state); break; - case 0x24: bcc(m68_state); break; - case 0x25: bcs(m68_state); break; - case 0x26: bne(m68_state); break; - case 0x27: beq(m68_state); break; - case 0x28: bvc(m68_state); break; - case 0x29: bvs(m68_state); break; - case 0x2a: bpl(m68_state); break; - case 0x2b: bmi(m68_state); break; - case 0x2c: bge(m68_state); break; - case 0x2d: blt(m68_state); break; - case 0x2e: bgt(m68_state); break; - case 0x2f: ble(m68_state); break; - case 0x30: tsx(m68_state); break; - case 0x31: ins(m68_state); break; - case 0x32: pula(m68_state); break; - case 0x33: pulb(m68_state); break; - case 0x34: des(m68_state); break; - case 0x35: txs(m68_state); break; - case 0x36: psha(m68_state); break; - case 0x37: pshb(m68_state); break; - case 0x38: pulx(m68_state); /* 6803 only */ break; - case 0x39: rts(m68_state); break; - case 0x3a: abx(m68_state); /* 6803 only */ break; - case 0x3b: rti(m68_state); break; - case 0x3c: pshx(m68_state); /* 6803 only */ break; - case 0x3d: mul(m68_state); /* 6803 only */ break; - case 0x3e: wai(m68_state); break; - case 0x3f: swi(m68_state); break; - case 0x40: nega(m68_state); break; - case 0x41: illegal(m68_state); break; - case 0x42: illegal(m68_state); break; - case 0x43: coma(m68_state); break; - case 0x44: lsra(m68_state); break; - case 0x45: illegal(m68_state); break; - case 0x46: rora(m68_state); break; - case 0x47: asra(m68_state); break; - case 0x48: asla(m68_state); break; - case 0x49: rola(m68_state); break; - case 0x4a: deca(m68_state); break; - case 0x4b: illegal(m68_state); break; - case 0x4c: inca(m68_state); break; - case 0x4d: tsta(m68_state); break; - case 0x4e: illegal(m68_state); break; - case 0x4f: clra(m68_state); break; - case 0x50: negb(m68_state); break; - case 0x51: illegal(m68_state); break; - case 0x52: illegal(m68_state); break; - case 0x53: comb(m68_state); break; - case 0x54: lsrb(m68_state); break; - case 0x55: illegal(m68_state); break; - case 0x56: rorb(m68_state); break; - case 0x57: asrb(m68_state); break; - case 0x58: aslb(m68_state); break; - case 0x59: rolb(m68_state); break; - case 0x5a: decb(m68_state); break; - case 0x5b: illegal(m68_state); break; - case 0x5c: incb(m68_state); break; - case 0x5d: tstb(m68_state); break; - case 0x5e: illegal(m68_state); break; - case 0x5f: clrb(m68_state); break; - case 0x60: neg_ix(m68_state); break; - case 0x61: illegal(m68_state); break; - case 0x62: illegal(m68_state); break; - case 0x63: com_ix(m68_state); break; - case 0x64: lsr_ix(m68_state); break; - case 0x65: illegal(m68_state); break; - case 0x66: ror_ix(m68_state); break; - case 0x67: asr_ix(m68_state); break; - case 0x68: asl_ix(m68_state); break; - case 0x69: rol_ix(m68_state); break; - case 0x6a: dec_ix(m68_state); break; - case 0x6b: illegal(m68_state); break; - case 0x6c: inc_ix(m68_state); break; - case 0x6d: tst_ix(m68_state); break; - case 0x6e: jmp_ix(m68_state); break; - case 0x6f: clr_ix(m68_state); break; - case 0x70: neg_ex(m68_state); break; - case 0x71: illegal(m68_state); break; - case 0x72: illegal(m68_state); break; - case 0x73: com_ex(m68_state); break; - case 0x74: lsr_ex(m68_state); break; - case 0x75: illegal(m68_state); break; - case 0x76: ror_ex(m68_state); break; - case 0x77: asr_ex(m68_state); break; - case 0x78: asl_ex(m68_state); break; - case 0x79: rol_ex(m68_state); break; - case 0x7a: dec_ex(m68_state); break; - case 0x7b: illegal(m68_state); break; - case 0x7c: inc_ex(m68_state); break; - case 0x7d: tst_ex(m68_state); break; - case 0x7e: jmp_ex(m68_state); break; - case 0x7f: clr_ex(m68_state); break; - case 0x80: suba_im(m68_state); break; - case 0x81: cmpa_im(m68_state); break; - case 0x82: sbca_im(m68_state); break; - case 0x83: subd_im(m68_state); /* 6803 only */ break; - case 0x84: anda_im(m68_state); break; - case 0x85: bita_im(m68_state); break; - case 0x86: lda_im(m68_state); break; - case 0x87: sta_im(m68_state); break; - case 0x88: eora_im(m68_state); break; - case 0x89: adca_im(m68_state); break; - case 0x8a: ora_im(m68_state); break; - case 0x8b: adda_im(m68_state); break; - case 0x8c: cpx_im(m68_state); /* 6803 difference */ break; - case 0x8d: bsr(m68_state); break; - case 0x8e: lds_im(m68_state); break; - case 0x8f: sts_im(m68_state); /* orthogonality */ break; - case 0x90: suba_di(m68_state); break; - case 0x91: cmpa_di(m68_state); break; - case 0x92: sbca_di(m68_state); break; - case 0x93: subd_di(m68_state); /* 6803 only */ break; - case 0x94: anda_di(m68_state); break; - case 0x95: bita_di(m68_state); break; - case 0x96: lda_di(m68_state); break; - case 0x97: sta_di(m68_state); break; - case 0x98: eora_di(m68_state); break; - case 0x99: adca_di(m68_state); break; - case 0x9a: ora_di(m68_state); break; - case 0x9b: adda_di(m68_state); break; - case 0x9c: cpx_di(m68_state); /* 6803 difference */ break; - case 0x9d: jsr_di(m68_state); break; - case 0x9e: lds_di(m68_state); break; - case 0x9f: sts_di(m68_state); break; - case 0xa0: suba_ix(m68_state); break; - case 0xa1: cmpa_ix(m68_state); break; - case 0xa2: sbca_ix(m68_state); break; - case 0xa3: subd_ix(m68_state); /* 6803 only */ break; - case 0xa4: anda_ix(m68_state); break; - case 0xa5: bita_ix(m68_state); break; - case 0xa6: lda_ix(m68_state); break; - case 0xa7: sta_ix(m68_state); break; - case 0xa8: eora_ix(m68_state); break; - case 0xa9: adca_ix(m68_state); break; - case 0xaa: ora_ix(m68_state); break; - case 0xab: adda_ix(m68_state); break; - case 0xac: cpx_ix(m68_state); /* 6803 difference */ break; - case 0xad: jsr_ix(m68_state); break; - case 0xae: lds_ix(m68_state); break; - case 0xaf: sts_ix(m68_state); break; - case 0xb0: suba_ex(m68_state); break; - case 0xb1: cmpa_ex(m68_state); break; - case 0xb2: sbca_ex(m68_state); break; - case 0xb3: subd_ex(m68_state); /* 6803 only */ break; - case 0xb4: anda_ex(m68_state); break; - case 0xb5: bita_ex(m68_state); break; - case 0xb6: lda_ex(m68_state); break; - case 0xb7: sta_ex(m68_state); break; - case 0xb8: eora_ex(m68_state); break; - case 0xb9: adca_ex(m68_state); break; - case 0xba: ora_ex(m68_state); break; - case 0xbb: adda_ex(m68_state); break; - case 0xbc: cpx_ex(m68_state); /* 6803 difference */ break; - case 0xbd: jsr_ex(m68_state); break; - case 0xbe: lds_ex(m68_state); break; - case 0xbf: sts_ex(m68_state); break; - case 0xc0: subb_im(m68_state); break; - case 0xc1: cmpb_im(m68_state); break; - case 0xc2: sbcb_im(m68_state); break; - case 0xc3: addd_im(m68_state); /* 6803 only */ break; - case 0xc4: andb_im(m68_state); break; - case 0xc5: bitb_im(m68_state); break; - case 0xc6: ldb_im(m68_state); break; - case 0xc7: stb_im(m68_state); break; - case 0xc8: eorb_im(m68_state); break; - case 0xc9: adcb_im(m68_state); break; - case 0xca: orb_im(m68_state); break; - case 0xcb: addb_im(m68_state); break; - case 0xcc: ldd_im(m68_state); /* 6803 only */ break; - case 0xcd: std_im(m68_state); /* 6803 only -- orthogonality */ break; - case 0xce: ldx_im(m68_state); break; - case 0xcf: stx_im(m68_state); break; - case 0xd0: subb_di(m68_state); break; - case 0xd1: cmpb_di(m68_state); break; - case 0xd2: sbcb_di(m68_state); break; - case 0xd3: addd_di(m68_state); /* 6803 only */ break; - case 0xd4: andb_di(m68_state); break; - case 0xd5: bitb_di(m68_state); break; - case 0xd6: ldb_di(m68_state); break; - case 0xd7: stb_di(m68_state); break; - case 0xd8: eorb_di(m68_state); break; - case 0xd9: adcb_di(m68_state); break; - case 0xda: orb_di(m68_state); break; - case 0xdb: addb_di(m68_state); break; - case 0xdc: ldd_di(m68_state); /* 6803 only */ break; - case 0xdd: std_di(m68_state); /* 6803 only */ break; - case 0xde: ldx_di(m68_state); break; - case 0xdf: stx_di(m68_state); break; - case 0xe0: subb_ix(m68_state); break; - case 0xe1: cmpb_ix(m68_state); break; - case 0xe2: sbcb_ix(m68_state); break; - case 0xe3: addd_ix(m68_state); /* 6803 only */ break; - case 0xe4: andb_ix(m68_state); break; - case 0xe5: bitb_ix(m68_state); break; - case 0xe6: ldb_ix(m68_state); break; - case 0xe7: stb_ix(m68_state); break; - case 0xe8: eorb_ix(m68_state); break; - case 0xe9: adcb_ix(m68_state); break; - case 0xea: orb_ix(m68_state); break; - case 0xeb: addb_ix(m68_state); break; - case 0xec: ldd_ix(m68_state); /* 6803 only */ break; - case 0xed: std_ix(m68_state); /* 6803 only */ break; - case 0xee: ldx_ix(m68_state); break; - case 0xef: stx_ix(m68_state); break; - case 0xf0: subb_ex(m68_state); break; - case 0xf1: cmpb_ex(m68_state); break; - case 0xf2: sbcb_ex(m68_state); break; - case 0xf3: addd_ex(m68_state); /* 6803 only */ break; - case 0xf4: andb_ex(m68_state); break; - case 0xf5: bitb_ex(m68_state); break; - case 0xf6: ldb_ex(m68_state); break; - case 0xf7: stb_ex(m68_state); break; - case 0xf8: eorb_ex(m68_state); break; - case 0xf9: adcb_ex(m68_state); break; - case 0xfa: orb_ex(m68_state); break; - case 0xfb: addb_ex(m68_state); break; - case 0xfc: ldd_ex(m68_state); /* 6803 only */ break; - case 0xfd: std_ex(m68_state); /* 6803 only */ break; - case 0xfe: ldx_ex(m68_state); break; - case 0xff: stx_ex(m68_state); break; + case 0x0E: cli(cpustate); break; + case 0x0F: sei(cpustate); break; + case 0x10: sba(cpustate); break; + case 0x11: cba(cpustate); break; + case 0x12: illegal(cpustate); break; + case 0x13: illegal(cpustate); break; + case 0x14: illegal(cpustate); break; + case 0x15: illegal(cpustate); break; + case 0x16: tab(cpustate); break; + case 0x17: tba(cpustate); break; + case 0x18: illegal(cpustate); break; + case 0x19: daa(cpustate); break; + case 0x1a: illegal(cpustate); break; + case 0x1b: aba(cpustate); break; + case 0x1c: illegal(cpustate); break; + case 0x1d: illegal(cpustate); break; + case 0x1e: illegal(cpustate); break; + case 0x1f: illegal(cpustate); break; + case 0x20: bra(cpustate); break; + case 0x21: brn(cpustate); break; + case 0x22: bhi(cpustate); break; + case 0x23: bls(cpustate); break; + case 0x24: bcc(cpustate); break; + case 0x25: bcs(cpustate); break; + case 0x26: bne(cpustate); break; + case 0x27: beq(cpustate); break; + case 0x28: bvc(cpustate); break; + case 0x29: bvs(cpustate); break; + case 0x2a: bpl(cpustate); break; + case 0x2b: bmi(cpustate); break; + case 0x2c: bge(cpustate); break; + case 0x2d: blt(cpustate); break; + case 0x2e: bgt(cpustate); break; + case 0x2f: ble(cpustate); break; + case 0x30: tsx(cpustate); break; + case 0x31: ins(cpustate); break; + case 0x32: pula(cpustate); break; + case 0x33: pulb(cpustate); break; + case 0x34: des(cpustate); break; + case 0x35: txs(cpustate); break; + case 0x36: psha(cpustate); break; + case 0x37: pshb(cpustate); break; + case 0x38: pulx(cpustate); /* 6803 only */ break; + case 0x39: rts(cpustate); break; + case 0x3a: abx(cpustate); /* 6803 only */ break; + case 0x3b: rti(cpustate); break; + case 0x3c: pshx(cpustate); /* 6803 only */ break; + case 0x3d: mul(cpustate); /* 6803 only */ break; + case 0x3e: wai(cpustate); break; + case 0x3f: swi(cpustate); break; + case 0x40: nega(cpustate); break; + case 0x41: illegal(cpustate); break; + case 0x42: illegal(cpustate); break; + case 0x43: coma(cpustate); break; + case 0x44: lsra(cpustate); break; + case 0x45: illegal(cpustate); break; + case 0x46: rora(cpustate); break; + case 0x47: asra(cpustate); break; + case 0x48: asla(cpustate); break; + case 0x49: rola(cpustate); break; + case 0x4a: deca(cpustate); break; + case 0x4b: illegal(cpustate); break; + case 0x4c: inca(cpustate); break; + case 0x4d: tsta(cpustate); break; + case 0x4e: illegal(cpustate); break; + case 0x4f: clra(cpustate); break; + case 0x50: negb(cpustate); break; + case 0x51: illegal(cpustate); break; + case 0x52: illegal(cpustate); break; + case 0x53: comb(cpustate); break; + case 0x54: lsrb(cpustate); break; + case 0x55: illegal(cpustate); break; + case 0x56: rorb(cpustate); break; + case 0x57: asrb(cpustate); break; + case 0x58: aslb(cpustate); break; + case 0x59: rolb(cpustate); break; + case 0x5a: decb(cpustate); break; + case 0x5b: illegal(cpustate); break; + case 0x5c: incb(cpustate); break; + case 0x5d: tstb(cpustate); break; + case 0x5e: illegal(cpustate); break; + case 0x5f: clrb(cpustate); break; + case 0x60: neg_ix(cpustate); break; + case 0x61: illegal(cpustate); break; + case 0x62: illegal(cpustate); break; + case 0x63: com_ix(cpustate); break; + case 0x64: lsr_ix(cpustate); break; + case 0x65: illegal(cpustate); break; + case 0x66: ror_ix(cpustate); break; + case 0x67: asr_ix(cpustate); break; + case 0x68: asl_ix(cpustate); break; + case 0x69: rol_ix(cpustate); break; + case 0x6a: dec_ix(cpustate); break; + case 0x6b: illegal(cpustate); break; + case 0x6c: inc_ix(cpustate); break; + case 0x6d: tst_ix(cpustate); break; + case 0x6e: jmp_ix(cpustate); break; + case 0x6f: clr_ix(cpustate); break; + case 0x70: neg_ex(cpustate); break; + case 0x71: illegal(cpustate); break; + case 0x72: illegal(cpustate); break; + case 0x73: com_ex(cpustate); break; + case 0x74: lsr_ex(cpustate); break; + case 0x75: illegal(cpustate); break; + case 0x76: ror_ex(cpustate); break; + case 0x77: asr_ex(cpustate); break; + case 0x78: asl_ex(cpustate); break; + case 0x79: rol_ex(cpustate); break; + case 0x7a: dec_ex(cpustate); break; + case 0x7b: illegal(cpustate); break; + case 0x7c: inc_ex(cpustate); break; + case 0x7d: tst_ex(cpustate); break; + case 0x7e: jmp_ex(cpustate); break; + case 0x7f: clr_ex(cpustate); break; + case 0x80: suba_im(cpustate); break; + case 0x81: cmpa_im(cpustate); break; + case 0x82: sbca_im(cpustate); break; + case 0x83: subd_im(cpustate); /* 6803 only */ break; + case 0x84: anda_im(cpustate); break; + case 0x85: bita_im(cpustate); break; + case 0x86: lda_im(cpustate); break; + case 0x87: sta_im(cpustate); break; + case 0x88: eora_im(cpustate); break; + case 0x89: adca_im(cpustate); break; + case 0x8a: ora_im(cpustate); break; + case 0x8b: adda_im(cpustate); break; + case 0x8c: cpx_im(cpustate); /* 6803 difference */ break; + case 0x8d: bsr(cpustate); break; + case 0x8e: lds_im(cpustate); break; + case 0x8f: sts_im(cpustate); /* orthogonality */ break; + case 0x90: suba_di(cpustate); break; + case 0x91: cmpa_di(cpustate); break; + case 0x92: sbca_di(cpustate); break; + case 0x93: subd_di(cpustate); /* 6803 only */ break; + case 0x94: anda_di(cpustate); break; + case 0x95: bita_di(cpustate); break; + case 0x96: lda_di(cpustate); break; + case 0x97: sta_di(cpustate); break; + case 0x98: eora_di(cpustate); break; + case 0x99: adca_di(cpustate); break; + case 0x9a: ora_di(cpustate); break; + case 0x9b: adda_di(cpustate); break; + case 0x9c: cpx_di(cpustate); /* 6803 difference */ break; + case 0x9d: jsr_di(cpustate); break; + case 0x9e: lds_di(cpustate); break; + case 0x9f: sts_di(cpustate); break; + case 0xa0: suba_ix(cpustate); break; + case 0xa1: cmpa_ix(cpustate); break; + case 0xa2: sbca_ix(cpustate); break; + case 0xa3: subd_ix(cpustate); /* 6803 only */ break; + case 0xa4: anda_ix(cpustate); break; + case 0xa5: bita_ix(cpustate); break; + case 0xa6: lda_ix(cpustate); break; + case 0xa7: sta_ix(cpustate); break; + case 0xa8: eora_ix(cpustate); break; + case 0xa9: adca_ix(cpustate); break; + case 0xaa: ora_ix(cpustate); break; + case 0xab: adda_ix(cpustate); break; + case 0xac: cpx_ix(cpustate); /* 6803 difference */ break; + case 0xad: jsr_ix(cpustate); break; + case 0xae: lds_ix(cpustate); break; + case 0xaf: sts_ix(cpustate); break; + case 0xb0: suba_ex(cpustate); break; + case 0xb1: cmpa_ex(cpustate); break; + case 0xb2: sbca_ex(cpustate); break; + case 0xb3: subd_ex(cpustate); /* 6803 only */ break; + case 0xb4: anda_ex(cpustate); break; + case 0xb5: bita_ex(cpustate); break; + case 0xb6: lda_ex(cpustate); break; + case 0xb7: sta_ex(cpustate); break; + case 0xb8: eora_ex(cpustate); break; + case 0xb9: adca_ex(cpustate); break; + case 0xba: ora_ex(cpustate); break; + case 0xbb: adda_ex(cpustate); break; + case 0xbc: cpx_ex(cpustate); /* 6803 difference */ break; + case 0xbd: jsr_ex(cpustate); break; + case 0xbe: lds_ex(cpustate); break; + case 0xbf: sts_ex(cpustate); break; + case 0xc0: subb_im(cpustate); break; + case 0xc1: cmpb_im(cpustate); break; + case 0xc2: sbcb_im(cpustate); break; + case 0xc3: addd_im(cpustate); /* 6803 only */ break; + case 0xc4: andb_im(cpustate); break; + case 0xc5: bitb_im(cpustate); break; + case 0xc6: ldb_im(cpustate); break; + case 0xc7: stb_im(cpustate); break; + case 0xc8: eorb_im(cpustate); break; + case 0xc9: adcb_im(cpustate); break; + case 0xca: orb_im(cpustate); break; + case 0xcb: addb_im(cpustate); break; + case 0xcc: ldd_im(cpustate); /* 6803 only */ break; + case 0xcd: std_im(cpustate); /* 6803 only -- orthogonality */ break; + case 0xce: ldx_im(cpustate); break; + case 0xcf: stx_im(cpustate); break; + case 0xd0: subb_di(cpustate); break; + case 0xd1: cmpb_di(cpustate); break; + case 0xd2: sbcb_di(cpustate); break; + case 0xd3: addd_di(cpustate); /* 6803 only */ break; + case 0xd4: andb_di(cpustate); break; + case 0xd5: bitb_di(cpustate); break; + case 0xd6: ldb_di(cpustate); break; + case 0xd7: stb_di(cpustate); break; + case 0xd8: eorb_di(cpustate); break; + case 0xd9: adcb_di(cpustate); break; + case 0xda: orb_di(cpustate); break; + case 0xdb: addb_di(cpustate); break; + case 0xdc: ldd_di(cpustate); /* 6803 only */ break; + case 0xdd: std_di(cpustate); /* 6803 only */ break; + case 0xde: ldx_di(cpustate); break; + case 0xdf: stx_di(cpustate); break; + case 0xe0: subb_ix(cpustate); break; + case 0xe1: cmpb_ix(cpustate); break; + case 0xe2: sbcb_ix(cpustate); break; + case 0xe3: addd_ix(cpustate); /* 6803 only */ break; + case 0xe4: andb_ix(cpustate); break; + case 0xe5: bitb_ix(cpustate); break; + case 0xe6: ldb_ix(cpustate); break; + case 0xe7: stb_ix(cpustate); break; + case 0xe8: eorb_ix(cpustate); break; + case 0xe9: adcb_ix(cpustate); break; + case 0xea: orb_ix(cpustate); break; + case 0xeb: addb_ix(cpustate); break; + case 0xec: ldd_ix(cpustate); /* 6803 only */ break; + case 0xed: std_ix(cpustate); /* 6803 only */ break; + case 0xee: ldx_ix(cpustate); break; + case 0xef: stx_ix(cpustate); break; + case 0xf0: subb_ex(cpustate); break; + case 0xf1: cmpb_ex(cpustate); break; + case 0xf2: sbcb_ex(cpustate); break; + case 0xf3: addd_ex(cpustate); /* 6803 only */ break; + case 0xf4: andb_ex(cpustate); break; + case 0xf5: bitb_ex(cpustate); break; + case 0xf6: ldb_ex(cpustate); break; + case 0xf7: stb_ex(cpustate); break; + case 0xf8: eorb_ex(cpustate); break; + case 0xf9: adcb_ex(cpustate); break; + case 0xfa: orb_ex(cpustate); break; + case 0xfb: addb_ex(cpustate); break; + case 0xfc: ldd_ex(cpustate); /* 6803 only */ break; + case 0xfd: std_ex(cpustate); /* 6803 only */ break; + case 0xfe: ldx_ex(cpustate); break; + case 0xff: stx_ex(cpustate); break; } } @@ -1649,17 +1649,17 @@ INLINE void m6803_execute_one(m68_state_t *m68_state, UINT8 ireg) #if (HAS_M6803||HAS_M6801) static CPU_EXECUTE( m6803 ) { - m68_state_t *m68_state = device->token; + m6800_state *cpustate = device->token; UINT8 ireg; - m68_state->icount = cycles; + cpustate->icount = cycles; CLEANUP_COUNTERS(); - increment_counter(m68_state, m68_state->extra_cycles); - m68_state->extra_cycles = 0; + increment_counter(cpustate, cpustate->extra_cycles); + cpustate->extra_cycles = 0; do { - if( m68_state->wai_state & M6800_WAI ) + if( cpustate->wai_state & M6800_WAI ) { EAT_CYCLES; } @@ -1669,15 +1669,15 @@ static CPU_EXECUTE( m6803 ) debugger_instruction_hook(device, PCD); ireg=M_RDOP(PCD); PC++; - m6803_execute_one(m68_state, ireg); - increment_counter(m68_state, cycles_6803[ireg]); + m6803_execute_one(cpustate, ireg); + increment_counter(cpustate, cycles_6803[ireg]); } - } while( m68_state->icount>0 ); + } while( cpustate->icount>0 ); - increment_counter(m68_state, m68_state->extra_cycles); - m68_state->extra_cycles = 0; + increment_counter(cpustate, cpustate->extra_cycles); + cpustate->extra_cycles = 0; - return cycles - m68_state->icount; + return cycles - cpustate->icount; } #endif @@ -1700,18 +1700,18 @@ ADDRESS_MAP_END #if (HAS_M6808) static CPU_INIT( m6808 ) { - m68_state_t *m68_state = device->token; - // m68_state->subtype = SUBTYPE_M6808; - m68_state->insn = m6800_insn; - m68_state->cycles = cycles_6800; - m68_state->irq_callback = irqcallback; - m68_state->device = device; - - m68_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); - m68_state->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); - m68_state->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); - - state_register(m68_state, "m6808"); + m6800_state *cpustate = device->token; + // cpustate->subtype = SUBTYPE_M6808; + cpustate->insn = m6800_insn; + cpustate->cycles = cycles_6800; + cpustate->irq_callback = irqcallback; + cpustate->device = device; + + cpustate->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); + cpustate->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); + cpustate->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); + + state_register(cpustate, "m6808"); } #endif @@ -1722,288 +1722,288 @@ static CPU_INIT( m6808 ) static CPU_INIT( hd63701 ) { - m68_state_t *m68_state = device->token; - // m68_state->subtype = SUBTYPE_HD63701; - m68_state->insn = hd63701_insn; - m68_state->cycles = cycles_63701; - m68_state->irq_callback = irqcallback; - m68_state->device = device; - - m68_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); - m68_state->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); - m68_state->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); - - m68_state->clock = clock; - m68_state->m6800_rx_timer = timer_alloc(device->machine, m6800_rx_tick, m68_state); - m68_state->m6800_tx_timer = timer_alloc(device->machine, m6800_tx_tick, m68_state); - - state_register(m68_state, "hd63701"); + m6800_state *cpustate = device->token; + // cpustate->subtype = SUBTYPE_HD63701; + cpustate->insn = hd63701_insn; + cpustate->cycles = cycles_63701; + cpustate->irq_callback = irqcallback; + cpustate->device = device; + + cpustate->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); + cpustate->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); + cpustate->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); + + cpustate->clock = clock; + cpustate->m6800_rx_timer = timer_alloc(device->machine, m6800_rx_tick, cpustate); + cpustate->m6800_tx_timer = timer_alloc(device->machine, m6800_tx_tick, cpustate); + + state_register(cpustate, "hd63701"); } /**************************************************************************** * Execute one instruction ****************************************************************************/ -INLINE void hd63071_execute_one(m68_state_t *m68_state, UINT8 ireg) +INLINE void hd63071_execute_one(m6800_state *cpustate, UINT8 ireg) { switch( ireg ) { - case 0x00: trap(m68_state); break; - case 0x01: nop(m68_state); break; - case 0x02: trap(m68_state); break; - case 0x03: trap(m68_state); break; - case 0x04: lsrd(m68_state); /* 6803 only */; break; - case 0x05: asld(m68_state); /* 6803 only */; break; - case 0x06: tap(m68_state); break; - case 0x07: tpa(m68_state); break; - case 0x08: inx(m68_state); break; - case 0x09: dex(m68_state); break; + case 0x00: trap(cpustate); break; + case 0x01: nop(cpustate); break; + case 0x02: trap(cpustate); break; + case 0x03: trap(cpustate); break; + case 0x04: lsrd(cpustate); /* 6803 only */; break; + case 0x05: asld(cpustate); /* 6803 only */; break; + case 0x06: tap(cpustate); break; + case 0x07: tpa(cpustate); break; + case 0x08: inx(cpustate); break; + case 0x09: dex(cpustate); break; case 0x0A: CLV; break; case 0x0B: SEV; break; case 0x0C: CLC; break; case 0x0D: SEC; break; - case 0x0E: cli(m68_state); break; - case 0x0F: sei(m68_state); break; - case 0x10: sba(m68_state); break; - case 0x11: cba(m68_state); break; - case 0x12: undoc1(m68_state); break; - case 0x13: undoc2(m68_state); break; - case 0x14: trap(m68_state); break; - case 0x15: trap(m68_state); break; - case 0x16: tab(m68_state); break; - case 0x17: tba(m68_state); break; - case 0x18: xgdx(m68_state); /* HD63701YO only */; break; - case 0x19: daa(m68_state); break; - case 0x1a: slp(m68_state); break; - case 0x1b: aba(m68_state); break; - case 0x1c: trap(m68_state); break; - case 0x1d: trap(m68_state); break; - case 0x1e: trap(m68_state); break; - case 0x1f: trap(m68_state); break; - case 0x20: bra(m68_state); break; - case 0x21: brn(m68_state); break; - case 0x22: bhi(m68_state); break; - case 0x23: bls(m68_state); break; - case 0x24: bcc(m68_state); break; - case 0x25: bcs(m68_state); break; - case 0x26: bne(m68_state); break; - case 0x27: beq(m68_state); break; - case 0x28: bvc(m68_state); break; - case 0x29: bvs(m68_state); break; - case 0x2a: bpl(m68_state); break; - case 0x2b: bmi(m68_state); break; - case 0x2c: bge(m68_state); break; - case 0x2d: blt(m68_state); break; - case 0x2e: bgt(m68_state); break; - case 0x2f: ble(m68_state); break; - case 0x30: tsx(m68_state); break; - case 0x31: ins(m68_state); break; - case 0x32: pula(m68_state); break; - case 0x33: pulb(m68_state); break; - case 0x34: des(m68_state); break; - case 0x35: txs(m68_state); break; - case 0x36: psha(m68_state); break; - case 0x37: pshb(m68_state); break; - case 0x38: pulx(m68_state); /* 6803 only */ break; - case 0x39: rts(m68_state); break; - case 0x3a: abx(m68_state); /* 6803 only */ break; - case 0x3b: rti(m68_state); break; - case 0x3c: pshx(m68_state); /* 6803 only */ break; - case 0x3d: mul(m68_state); /* 6803 only */ break; - case 0x3e: wai(m68_state); break; - case 0x3f: swi(m68_state); break; - case 0x40: nega(m68_state); break; - case 0x41: trap(m68_state); break; - case 0x42: trap(m68_state); break; - case 0x43: coma(m68_state); break; - case 0x44: lsra(m68_state); break; - case 0x45: trap(m68_state); break; - case 0x46: rora(m68_state); break; - case 0x47: asra(m68_state); break; - case 0x48: asla(m68_state); break; - case 0x49: rola(m68_state); break; - case 0x4a: deca(m68_state); break; - case 0x4b: trap(m68_state); break; - case 0x4c: inca(m68_state); break; - case 0x4d: tsta(m68_state); break; - case 0x4e: trap(m68_state); break; - case 0x4f: clra(m68_state); break; - case 0x50: negb(m68_state); break; - case 0x51: trap(m68_state); break; - case 0x52: trap(m68_state); break; - case 0x53: comb(m68_state); break; - case 0x54: lsrb(m68_state); break; - case 0x55: trap(m68_state); break; - case 0x56: rorb(m68_state); break; - case 0x57: asrb(m68_state); break; - case 0x58: aslb(m68_state); break; - case 0x59: rolb(m68_state); break; - case 0x5a: decb(m68_state); break; - case 0x5b: trap(m68_state); break; - case 0x5c: incb(m68_state); break; - case 0x5d: tstb(m68_state); break; - case 0x5e: trap(m68_state); break; - case 0x5f: clrb(m68_state); break; - case 0x60: neg_ix(m68_state); break; - case 0x61: aim_ix(m68_state); /* HD63701YO only */; break; - case 0x62: oim_ix(m68_state); /* HD63701YO only */; break; - case 0x63: com_ix(m68_state); break; - case 0x64: lsr_ix(m68_state); break; - case 0x65: eim_ix(m68_state); /* HD63701YO only */; break; - case 0x66: ror_ix(m68_state); break; - case 0x67: asr_ix(m68_state); break; - case 0x68: asl_ix(m68_state); break; - case 0x69: rol_ix(m68_state); break; - case 0x6a: dec_ix(m68_state); break; - case 0x6b: tim_ix(m68_state); /* HD63701YO only */; break; - case 0x6c: inc_ix(m68_state); break; - case 0x6d: tst_ix(m68_state); break; - case 0x6e: jmp_ix(m68_state); break; - case 0x6f: clr_ix(m68_state); break; - case 0x70: neg_ex(m68_state); break; - case 0x71: aim_di(m68_state); /* HD63701YO only */; break; - case 0x72: oim_di(m68_state); /* HD63701YO only */; break; - case 0x73: com_ex(m68_state); break; - case 0x74: lsr_ex(m68_state); break; - case 0x75: eim_di(m68_state); /* HD63701YO only */; break; - case 0x76: ror_ex(m68_state); break; - case 0x77: asr_ex(m68_state); break; - case 0x78: asl_ex(m68_state); break; - case 0x79: rol_ex(m68_state); break; - case 0x7a: dec_ex(m68_state); break; - case 0x7b: tim_di(m68_state); /* HD63701YO only */; break; - case 0x7c: inc_ex(m68_state); break; - case 0x7d: tst_ex(m68_state); break; - case 0x7e: jmp_ex(m68_state); break; - case 0x7f: clr_ex(m68_state); break; - case 0x80: suba_im(m68_state); break; - case 0x81: cmpa_im(m68_state); break; - case 0x82: sbca_im(m68_state); break; - case 0x83: subd_im(m68_state); /* 6803 only */ break; - case 0x84: anda_im(m68_state); break; - case 0x85: bita_im(m68_state); break; - case 0x86: lda_im(m68_state); break; - case 0x87: sta_im(m68_state); break; - case 0x88: eora_im(m68_state); break; - case 0x89: adca_im(m68_state); break; - case 0x8a: ora_im(m68_state); break; - case 0x8b: adda_im(m68_state); break; - case 0x8c: cpx_im(m68_state); /* 6803 difference */ break; - case 0x8d: bsr(m68_state); break; - case 0x8e: lds_im(m68_state); break; - case 0x8f: sts_im(m68_state); /* orthogonality */ break; - case 0x90: suba_di(m68_state); break; - case 0x91: cmpa_di(m68_state); break; - case 0x92: sbca_di(m68_state); break; - case 0x93: subd_di(m68_state); /* 6803 only */ break; - case 0x94: anda_di(m68_state); break; - case 0x95: bita_di(m68_state); break; - case 0x96: lda_di(m68_state); break; - case 0x97: sta_di(m68_state); break; - case 0x98: eora_di(m68_state); break; - case 0x99: adca_di(m68_state); break; - case 0x9a: ora_di(m68_state); break; - case 0x9b: adda_di(m68_state); break; - case 0x9c: cpx_di(m68_state); /* 6803 difference */ break; - case 0x9d: jsr_di(m68_state); break; - case 0x9e: lds_di(m68_state); break; - case 0x9f: sts_di(m68_state); break; - case 0xa0: suba_ix(m68_state); break; - case 0xa1: cmpa_ix(m68_state); break; - case 0xa2: sbca_ix(m68_state); break; - case 0xa3: subd_ix(m68_state); /* 6803 only */ break; - case 0xa4: anda_ix(m68_state); break; - case 0xa5: bita_ix(m68_state); break; - case 0xa6: lda_ix(m68_state); break; - case 0xa7: sta_ix(m68_state); break; - case 0xa8: eora_ix(m68_state); break; - case 0xa9: adca_ix(m68_state); break; - case 0xaa: ora_ix(m68_state); break; - case 0xab: adda_ix(m68_state); break; - case 0xac: cpx_ix(m68_state); /* 6803 difference */ break; - case 0xad: jsr_ix(m68_state); break; - case 0xae: lds_ix(m68_state); break; - case 0xaf: sts_ix(m68_state); break; - case 0xb0: suba_ex(m68_state); break; - case 0xb1: cmpa_ex(m68_state); break; - case 0xb2: sbca_ex(m68_state); break; - case 0xb3: subd_ex(m68_state); /* 6803 only */ break; - case 0xb4: anda_ex(m68_state); break; - case 0xb5: bita_ex(m68_state); break; - case 0xb6: lda_ex(m68_state); break; - case 0xb7: sta_ex(m68_state); break; - case 0xb8: eora_ex(m68_state); break; - case 0xb9: adca_ex(m68_state); break; - case 0xba: ora_ex(m68_state); break; - case 0xbb: adda_ex(m68_state); break; - case 0xbc: cpx_ex(m68_state); /* 6803 difference */ break; - case 0xbd: jsr_ex(m68_state); break; - case 0xbe: lds_ex(m68_state); break; - case 0xbf: sts_ex(m68_state); break; - case 0xc0: subb_im(m68_state); break; - case 0xc1: cmpb_im(m68_state); break; - case 0xc2: sbcb_im(m68_state); break; - case 0xc3: addd_im(m68_state); /* 6803 only */ break; - case 0xc4: andb_im(m68_state); break; - case 0xc5: bitb_im(m68_state); break; - case 0xc6: ldb_im(m68_state); break; - case 0xc7: stb_im(m68_state); break; - case 0xc8: eorb_im(m68_state); break; - case 0xc9: adcb_im(m68_state); break; - case 0xca: orb_im(m68_state); break; - case 0xcb: addb_im(m68_state); break; - case 0xcc: ldd_im(m68_state); /* 6803 only */ break; - case 0xcd: std_im(m68_state); /* 6803 only -- orthogonality */ break; - case 0xce: ldx_im(m68_state); break; - case 0xcf: stx_im(m68_state); break; - case 0xd0: subb_di(m68_state); break; - case 0xd1: cmpb_di(m68_state); break; - case 0xd2: sbcb_di(m68_state); break; - case 0xd3: addd_di(m68_state); /* 6803 only */ break; - case 0xd4: andb_di(m68_state); break; - case 0xd5: bitb_di(m68_state); break; - case 0xd6: ldb_di(m68_state); break; - case 0xd7: stb_di(m68_state); break; - case 0xd8: eorb_di(m68_state); break; - case 0xd9: adcb_di(m68_state); break; - case 0xda: orb_di(m68_state); break; - case 0xdb: addb_di(m68_state); break; - case 0xdc: ldd_di(m68_state); /* 6803 only */ break; - case 0xdd: std_di(m68_state); /* 6803 only */ break; - case 0xde: ldx_di(m68_state); break; - case 0xdf: stx_di(m68_state); break; - case 0xe0: subb_ix(m68_state); break; - case 0xe1: cmpb_ix(m68_state); break; - case 0xe2: sbcb_ix(m68_state); break; - case 0xe3: addd_ix(m68_state); /* 6803 only */ break; - case 0xe4: andb_ix(m68_state); break; - case 0xe5: bitb_ix(m68_state); break; - case 0xe6: ldb_ix(m68_state); break; - case 0xe7: stb_ix(m68_state); break; - case 0xe8: eorb_ix(m68_state); break; - case 0xe9: adcb_ix(m68_state); break; - case 0xea: orb_ix(m68_state); break; - case 0xeb: addb_ix(m68_state); break; - case 0xec: ldd_ix(m68_state); /* 6803 only */ break; - case 0xed: std_ix(m68_state); /* 6803 only */ break; - case 0xee: ldx_ix(m68_state); break; - case 0xef: stx_ix(m68_state); break; - case 0xf0: subb_ex(m68_state); break; - case 0xf1: cmpb_ex(m68_state); break; - case 0xf2: sbcb_ex(m68_state); break; - case 0xf3: addd_ex(m68_state); /* 6803 only */ break; - case 0xf4: andb_ex(m68_state); break; - case 0xf5: bitb_ex(m68_state); break; - case 0xf6: ldb_ex(m68_state); break; - case 0xf7: stb_ex(m68_state); break; - case 0xf8: eorb_ex(m68_state); break; - case 0xf9: adcb_ex(m68_state); break; - case 0xfa: orb_ex(m68_state); break; - case 0xfb: addb_ex(m68_state); break; - case 0xfc: ldd_ex(m68_state); /* 6803 only */ break; - case 0xfd: std_ex(m68_state); /* 6803 only */ break; - case 0xfe: ldx_ex(m68_state); break; - case 0xff: stx_ex(m68_state); break; + case 0x0E: cli(cpustate); break; + case 0x0F: sei(cpustate); break; + case 0x10: sba(cpustate); break; + case 0x11: cba(cpustate); break; + case 0x12: undoc1(cpustate); break; + case 0x13: undoc2(cpustate); break; + case 0x14: trap(cpustate); break; + case 0x15: trap(cpustate); break; + case 0x16: tab(cpustate); break; + case 0x17: tba(cpustate); break; + case 0x18: xgdx(cpustate); /* HD63701YO only */; break; + case 0x19: daa(cpustate); break; + case 0x1a: slp(cpustate); break; + case 0x1b: aba(cpustate); break; + case 0x1c: trap(cpustate); break; + case 0x1d: trap(cpustate); break; + case 0x1e: trap(cpustate); break; + case 0x1f: trap(cpustate); break; + case 0x20: bra(cpustate); break; + case 0x21: brn(cpustate); break; + case 0x22: bhi(cpustate); break; + case 0x23: bls(cpustate); break; + case 0x24: bcc(cpustate); break; + case 0x25: bcs(cpustate); break; + case 0x26: bne(cpustate); break; + case 0x27: beq(cpustate); break; + case 0x28: bvc(cpustate); break; + case 0x29: bvs(cpustate); break; + case 0x2a: bpl(cpustate); break; + case 0x2b: bmi(cpustate); break; + case 0x2c: bge(cpustate); break; + case 0x2d: blt(cpustate); break; + case 0x2e: bgt(cpustate); break; + case 0x2f: ble(cpustate); break; + case 0x30: tsx(cpustate); break; + case 0x31: ins(cpustate); break; + case 0x32: pula(cpustate); break; + case 0x33: pulb(cpustate); break; + case 0x34: des(cpustate); break; + case 0x35: txs(cpustate); break; + case 0x36: psha(cpustate); break; + case 0x37: pshb(cpustate); break; + case 0x38: pulx(cpustate); /* 6803 only */ break; + case 0x39: rts(cpustate); break; + case 0x3a: abx(cpustate); /* 6803 only */ break; + case 0x3b: rti(cpustate); break; + case 0x3c: pshx(cpustate); /* 6803 only */ break; + case 0x3d: mul(cpustate); /* 6803 only */ break; + case 0x3e: wai(cpustate); break; + case 0x3f: swi(cpustate); break; + case 0x40: nega(cpustate); break; + case 0x41: trap(cpustate); break; + case 0x42: trap(cpustate); break; + case 0x43: coma(cpustate); break; + case 0x44: lsra(cpustate); break; + case 0x45: trap(cpustate); break; + case 0x46: rora(cpustate); break; + case 0x47: asra(cpustate); break; + case 0x48: asla(cpustate); break; + case 0x49: rola(cpustate); break; + case 0x4a: deca(cpustate); break; + case 0x4b: trap(cpustate); break; + case 0x4c: inca(cpustate); break; + case 0x4d: tsta(cpustate); break; + case 0x4e: trap(cpustate); break; + case 0x4f: clra(cpustate); break; + case 0x50: negb(cpustate); break; + case 0x51: trap(cpustate); break; + case 0x52: trap(cpustate); break; + case 0x53: comb(cpustate); break; + case 0x54: lsrb(cpustate); break; + case 0x55: trap(cpustate); break; + case 0x56: rorb(cpustate); break; + case 0x57: asrb(cpustate); break; + case 0x58: aslb(cpustate); break; + case 0x59: rolb(cpustate); break; + case 0x5a: decb(cpustate); break; + case 0x5b: trap(cpustate); break; + case 0x5c: incb(cpustate); break; + case 0x5d: tstb(cpustate); break; + case 0x5e: trap(cpustate); break; + case 0x5f: clrb(cpustate); break; + case 0x60: neg_ix(cpustate); break; + case 0x61: aim_ix(cpustate); /* HD63701YO only */; break; + case 0x62: oim_ix(cpustate); /* HD63701YO only */; break; + case 0x63: com_ix(cpustate); break; + case 0x64: lsr_ix(cpustate); break; + case 0x65: eim_ix(cpustate); /* HD63701YO only */; break; + case 0x66: ror_ix(cpustate); break; + case 0x67: asr_ix(cpustate); break; + case 0x68: asl_ix(cpustate); break; + case 0x69: rol_ix(cpustate); break; + case 0x6a: dec_ix(cpustate); break; + case 0x6b: tim_ix(cpustate); /* HD63701YO only */; break; + case 0x6c: inc_ix(cpustate); break; + case 0x6d: tst_ix(cpustate); break; + case 0x6e: jmp_ix(cpustate); break; + case 0x6f: clr_ix(cpustate); break; + case 0x70: neg_ex(cpustate); break; + case 0x71: aim_di(cpustate); /* HD63701YO only */; break; + case 0x72: oim_di(cpustate); /* HD63701YO only */; break; + case 0x73: com_ex(cpustate); break; + case 0x74: lsr_ex(cpustate); break; + case 0x75: eim_di(cpustate); /* HD63701YO only */; break; + case 0x76: ror_ex(cpustate); break; + case 0x77: asr_ex(cpustate); break; + case 0x78: asl_ex(cpustate); break; + case 0x79: rol_ex(cpustate); break; + case 0x7a: dec_ex(cpustate); break; + case 0x7b: tim_di(cpustate); /* HD63701YO only */; break; + case 0x7c: inc_ex(cpustate); break; + case 0x7d: tst_ex(cpustate); break; + case 0x7e: jmp_ex(cpustate); break; + case 0x7f: clr_ex(cpustate); break; + case 0x80: suba_im(cpustate); break; + case 0x81: cmpa_im(cpustate); break; + case 0x82: sbca_im(cpustate); break; + case 0x83: subd_im(cpustate); /* 6803 only */ break; + case 0x84: anda_im(cpustate); break; + case 0x85: bita_im(cpustate); break; + case 0x86: lda_im(cpustate); break; + case 0x87: sta_im(cpustate); break; + case 0x88: eora_im(cpustate); break; + case 0x89: adca_im(cpustate); break; + case 0x8a: ora_im(cpustate); break; + case 0x8b: adda_im(cpustate); break; + case 0x8c: cpx_im(cpustate); /* 6803 difference */ break; + case 0x8d: bsr(cpustate); break; + case 0x8e: lds_im(cpustate); break; + case 0x8f: sts_im(cpustate); /* orthogonality */ break; + case 0x90: suba_di(cpustate); break; + case 0x91: cmpa_di(cpustate); break; + case 0x92: sbca_di(cpustate); break; + case 0x93: subd_di(cpustate); /* 6803 only */ break; + case 0x94: anda_di(cpustate); break; + case 0x95: bita_di(cpustate); break; + case 0x96: lda_di(cpustate); break; + case 0x97: sta_di(cpustate); break; + case 0x98: eora_di(cpustate); break; + case 0x99: adca_di(cpustate); break; + case 0x9a: ora_di(cpustate); break; + case 0x9b: adda_di(cpustate); break; + case 0x9c: cpx_di(cpustate); /* 6803 difference */ break; + case 0x9d: jsr_di(cpustate); break; + case 0x9e: lds_di(cpustate); break; + case 0x9f: sts_di(cpustate); break; + case 0xa0: suba_ix(cpustate); break; + case 0xa1: cmpa_ix(cpustate); break; + case 0xa2: sbca_ix(cpustate); break; + case 0xa3: subd_ix(cpustate); /* 6803 only */ break; + case 0xa4: anda_ix(cpustate); break; + case 0xa5: bita_ix(cpustate); break; + case 0xa6: lda_ix(cpustate); break; + case 0xa7: sta_ix(cpustate); break; + case 0xa8: eora_ix(cpustate); break; + case 0xa9: adca_ix(cpustate); break; + case 0xaa: ora_ix(cpustate); break; + case 0xab: adda_ix(cpustate); break; + case 0xac: cpx_ix(cpustate); /* 6803 difference */ break; + case 0xad: jsr_ix(cpustate); break; + case 0xae: lds_ix(cpustate); break; + case 0xaf: sts_ix(cpustate); break; + case 0xb0: suba_ex(cpustate); break; + case 0xb1: cmpa_ex(cpustate); break; + case 0xb2: sbca_ex(cpustate); break; + case 0xb3: subd_ex(cpustate); /* 6803 only */ break; + case 0xb4: anda_ex(cpustate); break; + case 0xb5: bita_ex(cpustate); break; + case 0xb6: lda_ex(cpustate); break; + case 0xb7: sta_ex(cpustate); break; + case 0xb8: eora_ex(cpustate); break; + case 0xb9: adca_ex(cpustate); break; + case 0xba: ora_ex(cpustate); break; + case 0xbb: adda_ex(cpustate); break; + case 0xbc: cpx_ex(cpustate); /* 6803 difference */ break; + case 0xbd: jsr_ex(cpustate); break; + case 0xbe: lds_ex(cpustate); break; + case 0xbf: sts_ex(cpustate); break; + case 0xc0: subb_im(cpustate); break; + case 0xc1: cmpb_im(cpustate); break; + case 0xc2: sbcb_im(cpustate); break; + case 0xc3: addd_im(cpustate); /* 6803 only */ break; + case 0xc4: andb_im(cpustate); break; + case 0xc5: bitb_im(cpustate); break; + case 0xc6: ldb_im(cpustate); break; + case 0xc7: stb_im(cpustate); break; + case 0xc8: eorb_im(cpustate); break; + case 0xc9: adcb_im(cpustate); break; + case 0xca: orb_im(cpustate); break; + case 0xcb: addb_im(cpustate); break; + case 0xcc: ldd_im(cpustate); /* 6803 only */ break; + case 0xcd: std_im(cpustate); /* 6803 only -- orthogonality */ break; + case 0xce: ldx_im(cpustate); break; + case 0xcf: stx_im(cpustate); break; + case 0xd0: subb_di(cpustate); break; + case 0xd1: cmpb_di(cpustate); break; + case 0xd2: sbcb_di(cpustate); break; + case 0xd3: addd_di(cpustate); /* 6803 only */ break; + case 0xd4: andb_di(cpustate); break; + case 0xd5: bitb_di(cpustate); break; + case 0xd6: ldb_di(cpustate); break; + case 0xd7: stb_di(cpustate); break; + case 0xd8: eorb_di(cpustate); break; + case 0xd9: adcb_di(cpustate); break; + case 0xda: orb_di(cpustate); break; + case 0xdb: addb_di(cpustate); break; + case 0xdc: ldd_di(cpustate); /* 6803 only */ break; + case 0xdd: std_di(cpustate); /* 6803 only */ break; + case 0xde: ldx_di(cpustate); break; + case 0xdf: stx_di(cpustate); break; + case 0xe0: subb_ix(cpustate); break; + case 0xe1: cmpb_ix(cpustate); break; + case 0xe2: sbcb_ix(cpustate); break; + case 0xe3: addd_ix(cpustate); /* 6803 only */ break; + case 0xe4: andb_ix(cpustate); break; + case 0xe5: bitb_ix(cpustate); break; + case 0xe6: ldb_ix(cpustate); break; + case 0xe7: stb_ix(cpustate); break; + case 0xe8: eorb_ix(cpustate); break; + case 0xe9: adcb_ix(cpustate); break; + case 0xea: orb_ix(cpustate); break; + case 0xeb: addb_ix(cpustate); break; + case 0xec: ldd_ix(cpustate); /* 6803 only */ break; + case 0xed: std_ix(cpustate); /* 6803 only */ break; + case 0xee: ldx_ix(cpustate); break; + case 0xef: stx_ix(cpustate); break; + case 0xf0: subb_ex(cpustate); break; + case 0xf1: cmpb_ex(cpustate); break; + case 0xf2: sbcb_ex(cpustate); break; + case 0xf3: addd_ex(cpustate); /* 6803 only */ break; + case 0xf4: andb_ex(cpustate); break; + case 0xf5: bitb_ex(cpustate); break; + case 0xf6: ldb_ex(cpustate); break; + case 0xf7: stb_ex(cpustate); break; + case 0xf8: eorb_ex(cpustate); break; + case 0xf9: adcb_ex(cpustate); break; + case 0xfa: orb_ex(cpustate); break; + case 0xfb: addb_ex(cpustate); break; + case 0xfc: ldd_ex(cpustate); /* 6803 only */ break; + case 0xfd: std_ex(cpustate); /* 6803 only */ break; + case 0xfe: ldx_ex(cpustate); break; + case 0xff: stx_ex(cpustate); break; } } @@ -2012,17 +2012,17 @@ INLINE void hd63071_execute_one(m68_state_t *m68_state, UINT8 ireg) ****************************************************************************/ static CPU_EXECUTE( hd63701 ) { - m68_state_t *m68_state = device->token; + m6800_state *cpustate = device->token; UINT8 ireg; - m68_state->icount = cycles; + cpustate->icount = cycles; CLEANUP_COUNTERS(); - increment_counter(m68_state, m68_state->extra_cycles); - m68_state->extra_cycles = 0; + increment_counter(cpustate, cpustate->extra_cycles); + cpustate->extra_cycles = 0; do { - if( m68_state->wai_state & (M6800_WAI|M6800_SLP) ) + if( cpustate->wai_state & (M6800_WAI|M6800_SLP) ) { EAT_CYCLES; } @@ -2032,26 +2032,26 @@ static CPU_EXECUTE( hd63701 ) debugger_instruction_hook(device, PCD); ireg=M_RDOP(PCD); PC++; - hd63071_execute_one(m68_state, ireg); - increment_counter(m68_state, cycles_63701[ireg]); + hd63071_execute_one(cpustate, ireg); + increment_counter(cpustate, cycles_63701[ireg]); } - } while( m68_state->icount>0 ); + } while( cpustate->icount>0 ); - increment_counter(m68_state, m68_state->extra_cycles); - m68_state->extra_cycles = 0; + increment_counter(cpustate, cpustate->extra_cycles); + cpustate->extra_cycles = 0; - return cycles - m68_state->icount; + return cycles - cpustate->icount; } /* - if change_pc(m68_state) direccted these areas ,Call hd63701_trap_pc(m68_state). + if change_pc(cpustate) direccted these areas ,Call hd63701_trap_pc(cpustate). 'mode' is selected by the sense of p2.0,p2.1,and p2.3 at reset timming. mode 0,1,2,4,6 : $0000-$001f mode 5 : $0000-$001f,$0200-$efff mode 7 : $0000-$001f,$0100-$efff */ #if 0 -static void hd63701_trap_pc(m68_state_t *m68_state) +static void hd63701_trap_pc(m6800_state *cpustate) { TAKE_TRAP; } @@ -2078,283 +2078,283 @@ WRITE8_HANDLER( hd63701_internal_registers_w ) #if (HAS_NSC8105) static CPU_INIT( nsc8105 ) { - m68_state_t *m68_state = device->token; - // m68_state->subtype = SUBTYPE_NSC8105; - m68_state->device = device; + m6800_state *cpustate = device->token; + // cpustate->subtype = SUBTYPE_NSC8105; + cpustate->device = device; - m68_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); - m68_state->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); - m68_state->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); + cpustate->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM); + cpustate->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA); + cpustate->io = cpu_get_address_space(device, ADDRESS_SPACE_IO); - m68_state->insn = nsc8105_insn; - m68_state->cycles = cycles_nsc8105; - state_register(m68_state, "nsc8105"); + cpustate->insn = nsc8105_insn; + cpustate->cycles = cycles_nsc8105; + state_register(cpustate, "nsc8105"); } /**************************************************************************** * Execute one instruction ****************************************************************************/ -INLINE void nsc8105_execute_one(m68_state_t *m68_state, UINT8 ireg) +INLINE void nsc8105_execute_one(m6800_state *cpustate, UINT8 ireg) { switch( ireg ) { - case 0x00: illegal(m68_state); break; - case 0x01: illegal(m68_state); break; - case 0x02: nop(m68_state); break; - case 0x03: illegal(m68_state); break; - case 0x04: illegal(m68_state); break; - case 0x05: tap(m68_state); break; - case 0x06: illegal(m68_state); break; - case 0x07: tpa(m68_state); break; - case 0x08: inx(m68_state); break; + case 0x00: illegal(cpustate); break; + case 0x01: illegal(cpustate); break; + case 0x02: nop(cpustate); break; + case 0x03: illegal(cpustate); break; + case 0x04: illegal(cpustate); break; + case 0x05: tap(cpustate); break; + case 0x06: illegal(cpustate); break; + case 0x07: tpa(cpustate); break; + case 0x08: inx(cpustate); break; case 0x09: CLV; break; - case 0x0a: dex(m68_state); break; + case 0x0a: dex(cpustate); break; case 0x0b: SEV; break; case 0x0c: CLC; break; - case 0x0d: cli(m68_state); break; + case 0x0d: cli(cpustate); break; case 0x0e: SEC; break; - case 0x0f: sei(m68_state); break; - case 0x10: sba(m68_state); break; - case 0x11: illegal(m68_state); break; - case 0x12: cba(m68_state); break; - case 0x13: illegal(m68_state); break; - case 0x14: illegal(m68_state); break; - case 0x15: tab(m68_state); break; - case 0x16: illegal(m68_state); break; - case 0x17: tba(m68_state); break; - case 0x18: illegal(m68_state); break; - case 0x19: illegal(m68_state); break; - case 0x1a: daa(m68_state); break; - case 0x1b: aba(m68_state); break; - case 0x1c: illegal(m68_state); break; - case 0x1d: illegal(m68_state); break; - case 0x1e: illegal(m68_state); break; - case 0x1f: illegal(m68_state); break; - case 0x20: bra(m68_state); break; - case 0x21: bhi(m68_state); break; - case 0x22: brn(m68_state); break; - case 0x23: bls(m68_state); break; - case 0x24: bcc(m68_state); break; - case 0x25: bne(m68_state); break; - case 0x26: bcs(m68_state); break; - case 0x27: beq(m68_state); break; - case 0x28: bvc(m68_state); break; - case 0x29: bpl(m68_state); break; - case 0x2a: bvs(m68_state); break; - case 0x2b: bmi(m68_state); break; - case 0x2c: bge(m68_state); break; - case 0x2d: bgt(m68_state); break; - case 0x2e: blt(m68_state); break; - case 0x2f: ble(m68_state); break; - case 0x30: tsx(m68_state); break; - case 0x31: pula(m68_state); break; - case 0x32: ins(m68_state); break; - case 0x33: pulb(m68_state); break; - case 0x34: des(m68_state); break; - case 0x35: psha(m68_state); break; - case 0x36: txs(m68_state); break; - case 0x37: pshb(m68_state); break; - case 0x38: illegal(m68_state); break; - case 0x39: illegal(m68_state); break; - case 0x3a: rts(m68_state); break; - case 0x3b: rti(m68_state); break; - case 0x3c: illegal(m68_state); break; - case 0x3d: wai(m68_state); break; - case 0x3e: illegal(m68_state); break; - case 0x3f: swi(m68_state); break; - case 0x40: suba_im(m68_state); break; - case 0x41: sbca_im(m68_state); break; - case 0x42: cmpa_im(m68_state); break; - case 0x43: illegal(m68_state); break; - case 0x44: anda_im(m68_state); break; - case 0x45: lda_im(m68_state); break; - case 0x46: bita_im(m68_state); break; - case 0x47: sta_im(m68_state); break; - case 0x48: eora_im(m68_state); break; - case 0x49: ora_im(m68_state); break; - case 0x4a: adca_im(m68_state); break; - case 0x4b: adda_im(m68_state); break; - case 0x4c: cmpx_im(m68_state); break; - case 0x4d: lds_im(m68_state); break; - case 0x4e: bsr(m68_state); break; - case 0x4f: sts_im(m68_state); /* orthogonality */ break; - case 0x50: suba_di(m68_state); break; - case 0x51: sbca_di(m68_state); break; - case 0x52: cmpa_di(m68_state); break; - case 0x53: illegal(m68_state); break; - case 0x54: anda_di(m68_state); break; - case 0x55: lda_di(m68_state); break; - case 0x56: bita_di(m68_state); break; - case 0x57: sta_di(m68_state); break; - case 0x58: eora_di(m68_state); break; - case 0x59: ora_di(m68_state); break; - case 0x5a: adca_di(m68_state); break; - case 0x5b: adda_di(m68_state); break; - case 0x5c: cmpx_di(m68_state); break; - case 0x5d: lds_di(m68_state); break; - case 0x5e: jsr_di(m68_state); break; - case 0x5f: sts_di(m68_state); break; - case 0x60: suba_ix(m68_state); break; - case 0x61: sbca_ix(m68_state); break; - case 0x62: cmpa_ix(m68_state); break; - case 0x63: illegal(m68_state); break; - case 0x64: anda_ix(m68_state); break; - case 0x65: lda_ix(m68_state); break; - case 0x66: bita_ix(m68_state); break; - case 0x67: sta_ix(m68_state); break; - case 0x68: eora_ix(m68_state); break; - case 0x69: ora_ix(m68_state); break; - case 0x6a: adca_ix(m68_state); break; - case 0x6b: adda_ix(m68_state); break; - case 0x6c: cmpx_ix(m68_state); break; - case 0x6d: lds_ix(m68_state); break; - case 0x6e: jsr_ix(m68_state); break; - case 0x6f: sts_ix(m68_state); break; - case 0x70: suba_ex(m68_state); break; - case 0x71: sbca_ex(m68_state); break; - case 0x72: cmpa_ex(m68_state); break; - case 0x73: illegal(m68_state); break; - case 0x74: anda_ex(m68_state); break; - case 0x75: lda_ex(m68_state); break; - case 0x76: bita_ex(m68_state); break; - case 0x77: sta_ex(m68_state); break; - case 0x78: eora_ex(m68_state); break; - case 0x79: ora_ex(m68_state); break; - case 0x7a: adca_ex(m68_state); break; - case 0x7b: adda_ex(m68_state); break; - case 0x7c: cmpx_ex(m68_state); break; - case 0x7d: lds_ex(m68_state); break; - case 0x7e: jsr_ex(m68_state); break; - case 0x7f: sts_ex(m68_state); break; - case 0x80: nega(m68_state); break; - case 0x81: illegal(m68_state); break; - case 0x82: illegal(m68_state); break; - case 0x83: coma(m68_state); break; - case 0x84: lsra(m68_state); break; - case 0x85: rora(m68_state); break; - case 0x86: illegal(m68_state); break; - case 0x87: asra(m68_state); break; - case 0x88: asla(m68_state); break; - case 0x89: deca(m68_state); break; - case 0x8a: rola(m68_state); break; - case 0x8b: illegal(m68_state); break; - case 0x8c: inca(m68_state); break; - case 0x8d: illegal(m68_state); break; - case 0x8e: tsta(m68_state); break; - case 0x8f: clra(m68_state); break; - case 0x90: negb(m68_state); break; - case 0x91: illegal(m68_state); break; - case 0x92: illegal(m68_state); break; - case 0x93: comb(m68_state); break; - case 0x94: lsrb(m68_state); break; - case 0x95: rorb(m68_state); break; - case 0x96: illegal(m68_state); break; - case 0x97: asrb(m68_state); break; - case 0x98: aslb(m68_state); break; - case 0x99: decb(m68_state); break; - case 0x9a: rolb(m68_state); break; - case 0x9b: illegal(m68_state); break; - case 0x9c: incb(m68_state); break; - case 0x9d: illegal(m68_state); break; - case 0x9e: tstb(m68_state); break; - case 0x9f: clrb(m68_state); break; - case 0xa0: neg_ix(m68_state); break; - case 0xa1: illegal(m68_state); break; - case 0xa2: illegal(m68_state); break; - case 0xa3: com_ix(m68_state); break; - case 0xa4: lsr_ix(m68_state); break; - case 0xa5: ror_ix(m68_state); break; - case 0xa6: illegal(m68_state); break; - case 0xa7: asr_ix(m68_state); break; - case 0xa8: asl_ix(m68_state); break; - case 0xa9: dec_ix(m68_state); break; - case 0xaa: rol_ix(m68_state); break; - case 0xab: illegal(m68_state); break; - case 0xac: inc_ix(m68_state); break; - case 0xad: jmp_ix(m68_state); break; - case 0xae: tst_ix(m68_state); break; - case 0xaf: clr_ix(m68_state); break; - case 0xb0: neg_ex(m68_state); break; - case 0xb1: illegal(m68_state); break; - case 0xb2: illegal(m68_state); break; - case 0xb3: com_ex(m68_state); break; - case 0xb4: lsr_ex(m68_state); break; - case 0xb5: ror_ex(m68_state); break; - case 0xb6: illegal(m68_state); break; - case 0xb7: asr_ex(m68_state); break; - case 0xb8: asl_ex(m68_state); break; - case 0xb9: dec_ex(m68_state); break; - case 0xba: rol_ex(m68_state); break; - case 0xbb: illegal(m68_state); break; - case 0xbc: inc_ex(m68_state); break; - case 0xbd: jmp_ex(m68_state); break; - case 0xbe: tst_ex(m68_state); break; - case 0xbf: clr_ex(m68_state); break; - case 0xc0: subb_im(m68_state); break; - case 0xc1: sbcb_im(m68_state); break; - case 0xc2: cmpb_im(m68_state); break; - case 0xc3: illegal(m68_state); break; - case 0xc4: andb_im(m68_state); break; - case 0xc5: ldb_im(m68_state); break; - case 0xc6: bitb_im(m68_state); break; - case 0xc7: stb_im(m68_state); break; - case 0xc8: eorb_im(m68_state); break; - case 0xc9: orb_im(m68_state); break; - case 0xca: adcb_im(m68_state); break; - case 0xcb: addb_im(m68_state); break; - case 0xcc: illegal(m68_state); break; - case 0xcd: ldx_im(m68_state); break; - case 0xce: illegal(m68_state); break; - case 0xcf: stx_im(m68_state); break; - case 0xd0: subb_di(m68_state); break; - case 0xd1: sbcb_di(m68_state); break; - case 0xd2: cmpb_di(m68_state); break; - case 0xd3: illegal(m68_state); break; - case 0xd4: andb_di(m68_state); break; - case 0xd5: ldb_di(m68_state); break; - case 0xd6: bitb_di(m68_state); break; - case 0xd7: stb_di(m68_state); break; - case 0xd8: eorb_di(m68_state); break; - case 0xd9: orb_di(m68_state); break; - case 0xda: adcb_di(m68_state); break; - case 0xdb: addb_di(m68_state); break; - case 0xdc: illegal(m68_state); break; - case 0xdd: ldx_di(m68_state); break; - case 0xde: illegal(m68_state); break; - case 0xdf: stx_di(m68_state); break; - case 0xe0: subb_ix(m68_state); break; - case 0xe1: sbcb_ix(m68_state); break; - case 0xe2: cmpb_ix(m68_state); break; - case 0xe3: illegal(m68_state); break; - case 0xe4: andb_ix(m68_state); break; - case 0xe5: ldb_ix(m68_state); break; - case 0xe6: bitb_ix(m68_state); break; - case 0xe7: stb_ix(m68_state); break; - case 0xe8: eorb_ix(m68_state); break; - case 0xe9: orb_ix(m68_state); break; - case 0xea: adcb_ix(m68_state); break; - case 0xeb: addb_ix(m68_state); break; - case 0xec: adcx_im(m68_state); break; /* NSC8105 only */ - case 0xed: ldx_ix(m68_state); break; - case 0xee: illegal(m68_state); break; - case 0xef: stx_ix(m68_state); break; - case 0xf0: subb_ex(m68_state); break; - case 0xf1: sbcb_ex(m68_state); break; - case 0xf2: cmpb_ex(m68_state); break; - case 0xf3: illegal(m68_state); break; - case 0xf4: andb_ex(m68_state); break; - case 0xf5: ldb_ex(m68_state); break; - case 0xf6: bitb_ex(m68_state); break; - case 0xf7: stb_ex(m68_state); break; - case 0xf8: eorb_ex(m68_state); break; - case 0xf9: orb_ex(m68_state); break; - case 0xfa: adcb_ex(m68_state); break; - case 0xfb: addb_ex(m68_state); break; - case 0xfc: addx_ex(m68_state); break; - case 0xfd: ldx_ex(m68_state); break; - case 0xfe: illegal(m68_state); break; - case 0xff: stx_ex(m68_state); break; + case 0x0f: sei(cpustate); break; + case 0x10: sba(cpustate); break; + case 0x11: illegal(cpustate); break; + case 0x12: cba(cpustate); break; + case 0x13: illegal(cpustate); break; + case 0x14: illegal(cpustate); break; + case 0x15: tab(cpustate); break; + case 0x16: illegal(cpustate); break; + case 0x17: tba(cpustate); break; + case 0x18: illegal(cpustate); break; + case 0x19: illegal(cpustate); break; + case 0x1a: daa(cpustate); break; + case 0x1b: aba(cpustate); break; + case 0x1c: illegal(cpustate); break; + case 0x1d: illegal(cpustate); break; + case 0x1e: illegal(cpustate); break; + case 0x1f: illegal(cpustate); break; + case 0x20: bra(cpustate); break; + case 0x21: bhi(cpustate); break; + case 0x22: brn(cpustate); break; + case 0x23: bls(cpustate); break; + case 0x24: bcc(cpustate); break; + case 0x25: bne(cpustate); break; + case 0x26: bcs(cpustate); break; + case 0x27: beq(cpustate); break; + case 0x28: bvc(cpustate); break; + case 0x29: bpl(cpustate); break; + case 0x2a: bvs(cpustate); break; + case 0x2b: bmi(cpustate); break; + case 0x2c: bge(cpustate); break; + case 0x2d: bgt(cpustate); break; + case 0x2e: blt(cpustate); break; + case 0x2f: ble(cpustate); break; + case 0x30: tsx(cpustate); break; + case 0x31: pula(cpustate); break; + case 0x32: ins(cpustate); break; + case 0x33: pulb(cpustate); break; + case 0x34: des(cpustate); break; + case 0x35: psha(cpustate); break; + case 0x36: txs(cpustate); break; + case 0x37: pshb(cpustate); break; + case 0x38: illegal(cpustate); break; + case 0x39: illegal(cpustate); break; + case 0x3a: rts(cpustate); break; + case 0x3b: rti(cpustate); break; + case 0x3c: illegal(cpustate); break; + case 0x3d: wai(cpustate); break; + case 0x3e: illegal(cpustate); break; + case 0x3f: swi(cpustate); break; + case 0x40: suba_im(cpustate); break; + case 0x41: sbca_im(cpustate); break; + case 0x42: cmpa_im(cpustate); break; + case 0x43: illegal(cpustate); break; + case 0x44: anda_im(cpustate); break; + case 0x45: lda_im(cpustate); break; + case 0x46: bita_im(cpustate); break; + case 0x47: sta_im(cpustate); break; + case 0x48: eora_im(cpustate); break; + case 0x49: ora_im(cpustate); break; + case 0x4a: adca_im(cpustate); break; + case 0x4b: adda_im(cpustate); break; + case 0x4c: cmpx_im(cpustate); break; + case 0x4d: lds_im(cpustate); break; + case 0x4e: bsr(cpustate); break; + case 0x4f: sts_im(cpustate); /* orthogonality */ break; + case 0x50: suba_di(cpustate); break; + case 0x51: sbca_di(cpustate); break; + case 0x52: cmpa_di(cpustate); break; + case 0x53: illegal(cpustate); break; + case 0x54: anda_di(cpustate); break; + case 0x55: lda_di(cpustate); break; + case 0x56: bita_di(cpustate); break; + case 0x57: sta_di(cpustate); break; + case 0x58: eora_di(cpustate); break; + case 0x59: ora_di(cpustate); break; + case 0x5a: adca_di(cpustate); break; + case 0x5b: adda_di(cpustate); break; + case 0x5c: cmpx_di(cpustate); break; + case 0x5d: lds_di(cpustate); break; + case 0x5e: jsr_di(cpustate); break; + case 0x5f: sts_di(cpustate); break; + case 0x60: suba_ix(cpustate); break; + case 0x61: sbca_ix(cpustate); break; + case 0x62: cmpa_ix(cpustate); break; + case 0x63: illegal(cpustate); break; + case 0x64: anda_ix(cpustate); break; + case 0x65: lda_ix(cpustate); break; + case 0x66: bita_ix(cpustate); break; + case 0x67: sta_ix(cpustate); break; + case 0x68: eora_ix(cpustate); break; + case 0x69: ora_ix(cpustate); break; + case 0x6a: adca_ix(cpustate); break; + case 0x6b: adda_ix(cpustate); break; + case 0x6c: cmpx_ix(cpustate); break; + case 0x6d: lds_ix(cpustate); break; + case 0x6e: jsr_ix(cpustate); break; + case 0x6f: sts_ix(cpustate); break; + case 0x70: suba_ex(cpustate); break; + case 0x71: sbca_ex(cpustate); break; + case 0x72: cmpa_ex(cpustate); break; + case 0x73: illegal(cpustate); break; + case 0x74: anda_ex(cpustate); break; + case 0x75: lda_ex(cpustate); break; + case 0x76: bita_ex(cpustate); break; + case 0x77: sta_ex(cpustate); break; + case 0x78: eora_ex(cpustate); break; + case 0x79: ora_ex(cpustate); break; + case 0x7a: adca_ex(cpustate); break; + case 0x7b: adda_ex(cpustate); break; + case 0x7c: cmpx_ex(cpustate); break; + case 0x7d: lds_ex(cpustate); break; + case 0x7e: jsr_ex(cpustate); break; + case 0x7f: sts_ex(cpustate); break; + case 0x80: nega(cpustate); break; + case 0x81: illegal(cpustate); break; + case 0x82: illegal(cpustate); break; + case 0x83: coma(cpustate); break; + case 0x84: lsra(cpustate); break; + case 0x85: rora(cpustate); break; + case 0x86: illegal(cpustate); break; + case 0x87: asra(cpustate); break; + case 0x88: asla(cpustate); break; + case 0x89: deca(cpustate); break; + case 0x8a: rola(cpustate); break; + case 0x8b: illegal(cpustate); break; + case 0x8c: inca(cpustate); break; + case 0x8d: illegal(cpustate); break; + case 0x8e: tsta(cpustate); break; + case 0x8f: clra(cpustate); break; + case 0x90: negb(cpustate); break; + case 0x91: illegal(cpustate); break; + case 0x92: illegal(cpustate); break; + case 0x93: comb(cpustate); break; + case 0x94: lsrb(cpustate); break; + case 0x95: rorb(cpustate); break; + case 0x96: illegal(cpustate); break; + case 0x97: asrb(cpustate); break; + case 0x98: aslb(cpustate); break; + case 0x99: decb(cpustate); break; + case 0x9a: rolb(cpustate); break; + case 0x9b: illegal(cpustate); break; + case 0x9c: incb(cpustate); break; + case 0x9d: illegal(cpustate); break; + case 0x9e: tstb(cpustate); break; + case 0x9f: clrb(cpustate); break; + case 0xa0: neg_ix(cpustate); break; + case 0xa1: illegal(cpustate); break; + case 0xa2: illegal(cpustate); break; + case 0xa3: com_ix(cpustate); break; + case 0xa4: lsr_ix(cpustate); break; + case 0xa5: ror_ix(cpustate); break; + case 0xa6: illegal(cpustate); break; + case 0xa7: asr_ix(cpustate); break; + case 0xa8: asl_ix(cpustate); break; + case 0xa9: dec_ix(cpustate); break; + case 0xaa: rol_ix(cpustate); break; + case 0xab: illegal(cpustate); break; + case 0xac: inc_ix(cpustate); break; + case 0xad: jmp_ix(cpustate); break; + case 0xae: tst_ix(cpustate); break; + case 0xaf: clr_ix(cpustate); break; + case 0xb0: neg_ex(cpustate); break; + case 0xb1: illegal(cpustate); break; + case 0xb2: illegal(cpustate); break; + case 0xb3: com_ex(cpustate); break; + case 0xb4: lsr_ex(cpustate); break; + case 0xb5: ror_ex(cpustate); break; + case 0xb6: illegal(cpustate); break; + case 0xb7: asr_ex(cpustate); break; + case 0xb8: asl_ex(cpustate); break; + case 0xb9: dec_ex(cpustate); break; + case 0xba: rol_ex(cpustate); break; + case 0xbb: illegal(cpustate); break; + case 0xbc: inc_ex(cpustate); break; + case 0xbd: jmp_ex(cpustate); break; + case 0xbe: tst_ex(cpustate); break; + case 0xbf: clr_ex(cpustate); break; + case 0xc0: subb_im(cpustate); break; + case 0xc1: sbcb_im(cpustate); break; + case 0xc2: cmpb_im(cpustate); break; + case 0xc3: illegal(cpustate); break; + case 0xc4: andb_im(cpustate); break; + case 0xc5: ldb_im(cpustate); break; + case 0xc6: bitb_im(cpustate); break; + case 0xc7: stb_im(cpustate); break; + case 0xc8: eorb_im(cpustate); break; + case 0xc9: orb_im(cpustate); break; + case 0xca: adcb_im(cpustate); break; + case 0xcb: addb_im(cpustate); break; + case 0xcc: illegal(cpustate); break; + case 0xcd: ldx_im(cpustate); break; + case 0xce: illegal(cpustate); break; + case 0xcf: stx_im(cpustate); break; + case 0xd0: subb_di(cpustate); break; + case 0xd1: sbcb_di(cpustate); break; + case 0xd2: cmpb_di(cpustate); break; + case 0xd3: illegal(cpustate); break; + case 0xd4: andb_di(cpustate); break; + case 0xd5: ldb_di(cpustate); break; + case 0xd6: bitb_di(cpustate); break; + case 0xd7: stb_di(cpustate); break; + case 0xd8: eorb_di(cpustate); break; + case 0xd9: orb_di(cpustate); break; + case 0xda: adcb_di(cpustate); break; + case 0xdb: addb_di(cpustate); break; + case 0xdc: illegal(cpustate); break; + case 0xdd: ldx_di(cpustate); break; + case 0xde: illegal(cpustate); break; + case 0xdf: stx_di(cpustate); break; + case 0xe0: subb_ix(cpustate); break; + case 0xe1: sbcb_ix(cpustate); break; + case 0xe2: cmpb_ix(cpustate); break; + case 0xe3: illegal(cpustate); break; + case 0xe4: andb_ix(cpustate); break; + case 0xe5: ldb_ix(cpustate); break; + case 0xe6: bitb_ix(cpustate); break; + case 0xe7: stb_ix(cpustate); break; + case 0xe8: eorb_ix(cpustate); break; + case 0xe9: orb_ix(cpustate); break; + case 0xea: adcb_ix(cpustate); break; + case 0xeb: addb_ix(cpustate); break; + case 0xec: adcx_im(cpustate); break; /* NSC8105 only */ + case 0xed: ldx_ix(cpustate); break; + case 0xee: illegal(cpustate); break; + case 0xef: stx_ix(cpustate); break; + case 0xf0: subb_ex(cpustate); break; + case 0xf1: sbcb_ex(cpustate); break; + case 0xf2: cmpb_ex(cpustate); break; + case 0xf3: illegal(cpustate); break; + case 0xf4: andb_ex(cpustate); break; + case 0xf5: ldb_ex(cpustate); break; + case 0xf6: bitb_ex(cpustate); break; + case 0xf7: stb_ex(cpustate); break; + case 0xf8: eorb_ex(cpustate); break; + case 0xf9: orb_ex(cpustate); break; + case 0xfa: adcb_ex(cpustate); break; + case 0xfb: addb_ex(cpustate); break; + case 0xfc: addx_ex(cpustate); break; + case 0xfd: ldx_ex(cpustate); break; + case 0xfe: illegal(cpustate); break; + case 0xff: stx_ex(cpustate); break; } } @@ -2363,17 +2363,17 @@ INLINE void nsc8105_execute_one(m68_state_t *m68_state, UINT8 ireg) ****************************************************************************/ static CPU_EXECUTE( nsc8105 ) { - m68_state_t *m68_state = device->token; + m6800_state *cpustate = device->token; UINT8 ireg; - m68_state->icount = cycles; + cpustate->icount = cycles; CLEANUP_COUNTERS(); - increment_counter(m68_state, m68_state->extra_cycles); - m68_state->extra_cycles = 0; + increment_counter(cpustate, cpustate->extra_cycles); + cpustate->extra_cycles = 0; do { - if( m68_state->wai_state & M6800_WAI ) + if( cpustate->wai_state & M6800_WAI ) { EAT_CYCLES; } @@ -2383,15 +2383,15 @@ static CPU_EXECUTE( nsc8105 ) debugger_instruction_hook(device, PCD); ireg=M_RDOP(PCD); PC++; - nsc8105_execute_one(m68_state, ireg); - increment_counter(m68_state, cycles_nsc8105[ireg]); + nsc8105_execute_one(cpustate, ireg); + increment_counter(cpustate, cycles_nsc8105[ireg]); } - } while( m68_state->icount>0 ); + } while( cpustate->icount>0 ); - increment_counter(m68_state, m68_state->extra_cycles); - m68_state->extra_cycles = 0; + increment_counter(cpustate, cpustate->extra_cycles); + cpustate->extra_cycles = 0; - return cycles - m68_state->icount; + return cycles - cpustate->icount; } #endif @@ -2400,85 +2400,85 @@ static CPU_EXECUTE( nsc8105 ) static READ8_HANDLER( m6803_internal_registers_r ) { - m68_state_t *m68_state = space->cpu->token; + m6800_state *cpustate = space->cpu->token; switch (offset) { case 0x00: - return m68_state->port1_ddr; + return cpustate->port1_ddr; case 0x01: - return m68_state->port2_ddr; + return cpustate->port2_ddr; case 0x02: - return (memory_read_byte_8be(m68_state->io, M6803_PORT1) & (m68_state->port1_ddr ^ 0xff)) - | (m68_state->port1_data & m68_state->port1_ddr); + return (memory_read_byte_8be(cpustate->io, M6803_PORT1) & (cpustate->port1_ddr ^ 0xff)) + | (cpustate->port1_data & cpustate->port1_ddr); case 0x03: - return (memory_read_byte_8be(m68_state->io, M6803_PORT2) & (m68_state->port2_ddr ^ 0xff)) - | (m68_state->port2_data & m68_state->port2_ddr); + return (memory_read_byte_8be(cpustate->io, M6803_PORT2) & (cpustate->port2_ddr ^ 0xff)) + | (cpustate->port2_data & cpustate->port2_ddr); case 0x04: - return m68_state->port3_ddr; + return cpustate->port3_ddr; case 0x05: - return m68_state->port4_ddr; + return cpustate->port4_ddr; case 0x06: - return (memory_read_byte_8be(m68_state->io, M6803_PORT3) & (m68_state->port3_ddr ^ 0xff)) - | (m68_state->port3_data & m68_state->port3_ddr); + return (memory_read_byte_8be(cpustate->io, M6803_PORT3) & (cpustate->port3_ddr ^ 0xff)) + | (cpustate->port3_data & cpustate->port3_ddr); case 0x07: - return (memory_read_byte_8be(m68_state->io, M6803_PORT4) & (m68_state->port4_ddr ^ 0xff)) - | (m68_state->port4_data & m68_state->port4_ddr); + return (memory_read_byte_8be(cpustate->io, M6803_PORT4) & (cpustate->port4_ddr ^ 0xff)) + | (cpustate->port4_data & cpustate->port4_ddr); case 0x08: - m68_state->pending_tcsr = 0; - return m68_state->tcsr; + cpustate->pending_tcsr = 0; + return cpustate->tcsr; case 0x09: - if(!(m68_state->pending_tcsr&TCSR_TOF)) + if(!(cpustate->pending_tcsr&TCSR_TOF)) { - m68_state->tcsr &= ~TCSR_TOF; + cpustate->tcsr &= ~TCSR_TOF; MODIFIED_tcsr; } - return m68_state->counter.b.h; + return cpustate->counter.b.h; case 0x0a: - return m68_state->counter.b.l; + return cpustate->counter.b.l; case 0x0b: - if(!(m68_state->pending_tcsr&TCSR_OCF)) + if(!(cpustate->pending_tcsr&TCSR_OCF)) { - m68_state->tcsr &= ~TCSR_OCF; + cpustate->tcsr &= ~TCSR_OCF; MODIFIED_tcsr; } - return m68_state->output_compare.b.h; + return cpustate->output_compare.b.h; case 0x0c: - if(!(m68_state->pending_tcsr&TCSR_OCF)) + if(!(cpustate->pending_tcsr&TCSR_OCF)) { - m68_state->tcsr &= ~TCSR_OCF; + cpustate->tcsr &= ~TCSR_OCF; MODIFIED_tcsr; } - return m68_state->output_compare.b.l; + return cpustate->output_compare.b.l; case 0x0d: - if(!(m68_state->pending_tcsr&TCSR_ICF)) + if(!(cpustate->pending_tcsr&TCSR_ICF)) { - m68_state->tcsr &= ~TCSR_ICF; + cpustate->tcsr &= ~TCSR_ICF; MODIFIED_tcsr; } - return (m68_state->input_capture >> 0) & 0xff; + return (cpustate->input_capture >> 0) & 0xff; case 0x0e: - return (m68_state->input_capture >> 8) & 0xff; + return (cpustate->input_capture >> 8) & 0xff; case 0x0f: logerror("CPU '%s' PC %04x: warning - read from unsupported register %02x\n",space->cpu->tag,cpu_get_pc(space->cpu),offset); return 0; case 0x10: - return m68_state->rmcr; + return cpustate->rmcr; case 0x11: - m68_state->trcsr_read = 1; - return m68_state->trcsr; + cpustate->trcsr_read = 1; + return cpustate->trcsr; case 0x12: - if (m68_state->trcsr_read) + if (cpustate->trcsr_read) { - m68_state->trcsr_read = 0; - m68_state->trcsr = m68_state->trcsr & 0x3f; + cpustate->trcsr_read = 0; + cpustate->trcsr = cpustate->trcsr & 0x3f; } - return m68_state->rdr; + return cpustate->rdr; case 0x13: - return m68_state->tdr; + return cpustate->tdr; case 0x14: logerror("CPU '%s' PC %04x: read RAM control register\n",space->cpu->tag,cpu_get_pc(space->cpu)); - return m68_state->ram_ctrl; + return cpustate->ram_ctrl; case 0x15: case 0x16: case 0x17: @@ -2498,125 +2498,125 @@ static READ8_HANDLER( m6803_internal_registers_r ) static WRITE8_HANDLER( m6803_internal_registers_w ) { - m68_state_t *m68_state = space->cpu->token; + m6800_state *cpustate = space->cpu->token; switch (offset) { case 0x00: - if (m68_state->port1_ddr != data) + if (cpustate->port1_ddr != data) { - m68_state->port1_ddr = data; - if(m68_state->port1_ddr == 0xff) - memory_write_byte_8be(m68_state->io, M6803_PORT1,m68_state->port1_data); + cpustate->port1_ddr = data; + if(cpustate->port1_ddr == 0xff) + memory_write_byte_8be(cpustate->io, M6803_PORT1,cpustate->port1_data); else - memory_write_byte_8be(m68_state->io, M6803_PORT1,(m68_state->port1_data & m68_state->port1_ddr) - | (memory_read_byte_8be(m68_state->io, M6803_PORT1) & (m68_state->port1_ddr ^ 0xff))); + memory_write_byte_8be(cpustate->io, M6803_PORT1,(cpustate->port1_data & cpustate->port1_ddr) + | (memory_read_byte_8be(cpustate->io, M6803_PORT1) & (cpustate->port1_ddr ^ 0xff))); } break; case 0x01: - if (m68_state->port2_ddr != data) + if (cpustate->port2_ddr != data) { - m68_state->port2_ddr = data; - if(m68_state->port2_ddr == 0xff) - memory_write_byte_8be(m68_state->io, M6803_PORT2,m68_state->port2_data); + cpustate->port2_ddr = data; + if(cpustate->port2_ddr == 0xff) + memory_write_byte_8be(cpustate->io, M6803_PORT2,cpustate->port2_data); else - memory_write_byte_8be(m68_state->io, M6803_PORT2,(m68_state->port2_data & m68_state->port2_ddr) - | (memory_read_byte_8be(m68_state->io, M6803_PORT2) & (m68_state->port2_ddr ^ 0xff))); + memory_write_byte_8be(cpustate->io, M6803_PORT2,(cpustate->port2_data & cpustate->port2_ddr) + | (memory_read_byte_8be(cpustate->io, M6803_PORT2) & (cpustate->port2_ddr ^ 0xff))); - if (m68_state->port2_ddr & 2) + if (cpustate->port2_ddr & 2) logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space->cpu->tag,cpu_get_pc(space->cpu)); } break; case 0x02: - m68_state->port1_data = data; - if(m68_state->port1_ddr == 0xff) - memory_write_byte_8be(m68_state->io, M6803_PORT1,m68_state->port1_data); + cpustate->port1_data = data; + if(cpustate->port1_ddr == 0xff) + memory_write_byte_8be(cpustate->io, M6803_PORT1,cpustate->port1_data); else - memory_write_byte_8be(m68_state->io, M6803_PORT1,(m68_state->port1_data & m68_state->port1_ddr) - | (memory_read_byte_8be(m68_state->io, M6803_PORT1) & (m68_state->port1_ddr ^ 0xff))); + memory_write_byte_8be(cpustate->io, M6803_PORT1,(cpustate->port1_data & cpustate->port1_ddr) + | (memory_read_byte_8be(cpustate->io, M6803_PORT1) & (cpustate->port1_ddr ^ 0xff))); break; case 0x03: - if (m68_state->trcsr & M6800_TRCSR_TE) + if (cpustate->trcsr & M6800_TRCSR_TE) { - m68_state->port2_data = (data & 0xef) | (m68_state->tx << 4); + cpustate->port2_data = (data & 0xef) | (cpustate->tx << 4); } else { - m68_state->port2_data = data; + cpustate->port2_data = data; } - if(m68_state->port2_ddr == 0xff) - memory_write_byte_8be(m68_state->io, M6803_PORT2,m68_state->port2_data); + if(cpustate->port2_ddr == 0xff) + memory_write_byte_8be(cpustate->io, M6803_PORT2,cpustate->port2_data); else - memory_write_byte_8be(m68_state->io, M6803_PORT2,(m68_state->port2_data & m68_state->port2_ddr) - | (memory_read_byte_8be(m68_state->io, M6803_PORT2) & (m68_state->port2_ddr ^ 0xff))); + memory_write_byte_8be(cpustate->io, M6803_PORT2,(cpustate->port2_data & cpustate->port2_ddr) + | (memory_read_byte_8be(cpustate->io, M6803_PORT2) & (cpustate->port2_ddr ^ 0xff))); break; case 0x04: - if (m68_state->port3_ddr != data) + if (cpustate->port3_ddr != data) { - m68_state->port3_ddr = data; - if(m68_state->port3_ddr == 0xff) - memory_write_byte_8be(m68_state->io, M6803_PORT3,m68_state->port3_data); + cpustate->port3_ddr = data; + if(cpustate->port3_ddr == 0xff) + memory_write_byte_8be(cpustate->io, M6803_PORT3,cpustate->port3_data); else - memory_write_byte_8be(m68_state->io, M6803_PORT3,(m68_state->port3_data & m68_state->port3_ddr) - | (memory_read_byte_8be(m68_state->io, M6803_PORT3) & (m68_state->port3_ddr ^ 0xff))); + memory_write_byte_8be(cpustate->io, M6803_PORT3,(cpustate->port3_data & cpustate->port3_ddr) + | (memory_read_byte_8be(cpustate->io, M6803_PORT3) & (cpustate->port3_ddr ^ 0xff))); } break; case 0x05: - if (m68_state->port4_ddr != data) + if (cpustate->port4_ddr != data) { - m68_state->port4_ddr = data; - if(m68_state->port4_ddr == 0xff) - memory_write_byte_8be(m68_state->io, M6803_PORT4,m68_state->port4_data); + cpustate->port4_ddr = data; + if(cpustate->port4_ddr == 0xff) + memory_write_byte_8be(cpustate->io, M6803_PORT4,cpustate->port4_data); else - memory_write_byte_8be(m68_state->io, M6803_PORT4,(m68_state->port4_data & m68_state->port4_ddr) - | (memory_read_byte_8be(m68_state->io, M6803_PORT4) & (m68_state->port4_ddr ^ 0xff))); + memory_write_byte_8be(cpustate->io, M6803_PORT4,(cpustate->port4_data & cpustate->port4_ddr) + | (memory_read_byte_8be(cpustate->io, M6803_PORT4) & (cpustate->port4_ddr ^ 0xff))); } break; case 0x06: - m68_state->port3_data = data; - if(m68_state->port3_ddr == 0xff) - memory_write_byte_8be(m68_state->io, M6803_PORT3,m68_state->port3_data); + cpustate->port3_data = data; + if(cpustate->port3_ddr == 0xff) + memory_write_byte_8be(cpustate->io, M6803_PORT3,cpustate->port3_data); else - memory_write_byte_8be(m68_state->io, M6803_PORT3,(m68_state->port3_data & m68_state->port3_ddr) - | (memory_read_byte_8be(m68_state->io, M6803_PORT3) & (m68_state->port3_ddr ^ 0xff))); + memory_write_byte_8be(cpustate->io, M6803_PORT3,(cpustate->port3_data & cpustate->port3_ddr) + | (memory_read_byte_8be(cpustate->io, M6803_PORT3) & (cpustate->port3_ddr ^ 0xff))); break; case 0x07: - m68_state->port4_data = data; - if(m68_state->port4_ddr == 0xff) - memory_write_byte_8be(m68_state->io, M6803_PORT4,m68_state->port4_data); + cpustate->port4_data = data; + if(cpustate->port4_ddr == 0xff) + memory_write_byte_8be(cpustate->io, M6803_PORT4,cpustate->port4_data); else - memory_write_byte_8be(m68_state->io, M6803_PORT4,(m68_state->port4_data & m68_state->port4_ddr) - | (memory_read_byte_8be(m68_state->io, M6803_PORT4) & (m68_state->port4_ddr ^ 0xff))); + memory_write_byte_8be(cpustate->io, M6803_PORT4,(cpustate->port4_data & cpustate->port4_ddr) + | (memory_read_byte_8be(cpustate->io, M6803_PORT4) & (cpustate->port4_ddr ^ 0xff))); break; case 0x08: - m68_state->tcsr = data; - m68_state->pending_tcsr &= m68_state->tcsr; + cpustate->tcsr = data; + cpustate->pending_tcsr &= cpustate->tcsr; MODIFIED_tcsr; if( !(CC & 0x10) ) - m6800_check_irq2(m68_state); + m6800_check_irq2(cpustate); break; case 0x09: - m68_state->latch09 = data & 0xff; /* 6301 only */ + cpustate->latch09 = data & 0xff; /* 6301 only */ CT = 0xfff8; TOH = CTH; MODIFIED_counters; break; case 0x0a: /* 6301 only */ - CT = (m68_state->latch09 << 8) | (data & 0xff); + CT = (cpustate->latch09 << 8) | (data & 0xff); TOH = CTH; MODIFIED_counters; break; case 0x0b: - if( m68_state->output_compare.b.h != data) + if( cpustate->output_compare.b.h != data) { - m68_state->output_compare.b.h = data; + cpustate->output_compare.b.h = data; MODIFIED_counters; } break; case 0x0c: - if( m68_state->output_compare.b.l != data) + if( cpustate->output_compare.b.l != data) { - m68_state->output_compare.b.l = data; + cpustate->output_compare.b.l = data; MODIFIED_counters; } break; @@ -2629,45 +2629,45 @@ static WRITE8_HANDLER( m6803_internal_registers_w ) logerror("CPU '%s' PC %04x: warning - write %02x to unsupported internal register %02x\n",space->cpu->tag,cpu_get_pc(space->cpu),data,offset); break; case 0x10: - m68_state->rmcr = data & 0x0f; + cpustate->rmcr = data & 0x0f; - switch ((m68_state->rmcr & M6800_RMCR_CC_MASK) >> 2) + switch ((cpustate->rmcr & M6800_RMCR_CC_MASK) >> 2) { case 0: case 3: // not implemented - timer_enable(m68_state->m6800_rx_timer, 0); - timer_enable(m68_state->m6800_tx_timer, 0); + timer_enable(cpustate->m6800_rx_timer, 0); + timer_enable(cpustate->m6800_tx_timer, 0); break; case 1: case 2: { - int divisor = M6800_RMCR_SS[m68_state->rmcr & M6800_RMCR_SS_MASK]; + int divisor = M6800_RMCR_SS[cpustate->rmcr & M6800_RMCR_SS_MASK]; - timer_adjust_periodic(m68_state->m6800_rx_timer, attotime_zero, 0, ATTOTIME_IN_HZ(m68_state->clock / divisor)); - timer_adjust_periodic(m68_state->m6800_tx_timer, attotime_zero, 0, ATTOTIME_IN_HZ(m68_state->clock / divisor)); + timer_adjust_periodic(cpustate->m6800_rx_timer, attotime_zero, 0, ATTOTIME_IN_HZ(cpustate->clock / divisor)); + timer_adjust_periodic(cpustate->m6800_tx_timer, attotime_zero, 0, ATTOTIME_IN_HZ(cpustate->clock / divisor)); } break; } break; case 0x11: - if ((data & M6800_TRCSR_TE) && !(m68_state->trcsr & M6800_TRCSR_TE)) + if ((data & M6800_TRCSR_TE) && !(cpustate->trcsr & M6800_TRCSR_TE)) { - m68_state->txstate = M6800_TX_STATE_INIT; + cpustate->txstate = M6800_TX_STATE_INIT; } - m68_state->trcsr = (m68_state->trcsr & 0xe0) | (data & 0x1f); + cpustate->trcsr = (cpustate->trcsr & 0xe0) | (data & 0x1f); break; case 0x13: - if (m68_state->trcsr_read) + if (cpustate->trcsr_read) { - m68_state->trcsr_read = 0; - m68_state->trcsr &= ~M6800_TRCSR_TDRE; + cpustate->trcsr_read = 0; + cpustate->trcsr &= ~M6800_TRCSR_TDRE; } - m68_state->tdr = data; + cpustate->tdr = data; break; case 0x14: logerror("CPU '%s' PC %04x: write %02x to RAM control register\n",space->cpu->tag,cpu_get_pc(space->cpu),data); - m68_state->ram_ctrl = data; + cpustate->ram_ctrl = data; break; case 0x15: case 0x16: @@ -2694,23 +2694,23 @@ static WRITE8_HANDLER( m6803_internal_registers_w ) static CPU_SET_INFO( m6800 ) { - m68_state_t *m68_state = device->token; + m6800_state *cpustate = device->token; switch (state) { /* --- the following bits of info are set as 64-bit signed integers --- */ - case CPUINFO_INT_INPUT_STATE + M6800_IRQ_LINE: set_irq_line(m68_state, M6800_IRQ_LINE, info->i); break; - case CPUINFO_INT_INPUT_STATE + M6800_TIN_LINE: set_irq_line(m68_state, M6800_TIN_LINE, info->i); break; - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(m68_state, INPUT_LINE_NMI, info->i); break; + case CPUINFO_INT_INPUT_STATE + M6800_IRQ_LINE: set_irq_line(cpustate, M6800_IRQ_LINE, info->i); break; + case CPUINFO_INT_INPUT_STATE + M6800_TIN_LINE: set_irq_line(cpustate, M6800_TIN_LINE, info->i); break; + case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break; case CPUINFO_INT_PC: PC = info->i; break; - case CPUINFO_INT_REGISTER + M6800_PC: m68_state->pc.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M6800_PC: cpustate->pc.w.l = info->i; break; case CPUINFO_INT_SP: S = info->i; break; - case CPUINFO_INT_REGISTER + M6800_S: m68_state->s.w.l = info->i; break; - case CPUINFO_INT_REGISTER + M6800_CC: m68_state->cc = info->i; break; - case CPUINFO_INT_REGISTER + M6800_A: m68_state->d.b.h = info->i; break; - case CPUINFO_INT_REGISTER + M6800_B: m68_state->d.b.l = info->i; break; - case CPUINFO_INT_REGISTER + M6800_X: m68_state->x.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M6800_S: cpustate->s.w.l = info->i; break; + case CPUINFO_INT_REGISTER + M6800_CC: cpustate->cc = info->i; break; + case CPUINFO_INT_REGISTER + M6800_A: cpustate->d.b.h = info->i; break; + case CPUINFO_INT_REGISTER + M6800_B: cpustate->d.b.l = info->i; break; + case CPUINFO_INT_REGISTER + M6800_X: cpustate->x.w.l = info->i; break; } } @@ -2722,14 +2722,14 @@ static CPU_SET_INFO( m6800 ) CPU_GET_INFO( m6800 ) { - m68_state_t *m68_state = device ? device->token : NULL; + m6800_state *cpustate = device ? device->token : NULL; switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m68_state_t); break; + case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m6800_state); break; case CPUINFO_INT_INPUT_LINES: info->i = 2; break; case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; - case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break; + case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break; case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break; case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break; case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break; @@ -2747,21 +2747,21 @@ CPU_GET_INFO( m6800 ) case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break; case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break; - case CPUINFO_INT_INPUT_STATE + M6800_IRQ_LINE: info->i = m68_state->irq_state[M6800_IRQ_LINE]; break; - case CPUINFO_INT_INPUT_STATE + M6800_TIN_LINE: info->i = m68_state->irq_state[M6800_TIN_LINE]; break; - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = m68_state->nmi_state; break; + case CPUINFO_INT_INPUT_STATE + M6800_IRQ_LINE: info->i = cpustate->irq_state[M6800_IRQ_LINE]; break; + case CPUINFO_INT_INPUT_STATE + M6800_TIN_LINE: info->i = cpustate->irq_state[M6800_TIN_LINE]; break; + case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break; - case CPUINFO_INT_PREVIOUSPC: info->i = m68_state->ppc.w.l; break; + case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc.w.l; break; case CPUINFO_INT_PC: info->i = PC; break; - case CPUINFO_INT_REGISTER + M6800_PC: info->i = m68_state->pc.w.l; break; + case CPUINFO_INT_REGISTER + M6800_PC: info->i = cpustate->pc.w.l; break; case CPUINFO_INT_SP: info->i = S; break; - case CPUINFO_INT_REGISTER + M6800_S: info->i = m68_state->s.w.l; break; - case CPUINFO_INT_REGISTER + M6800_CC: info->i = m68_state->cc; break; - case CPUINFO_INT_REGISTER + M6800_A: info->i = m68_state->d.b.h; break; - case CPUINFO_INT_REGISTER + M6800_B: info->i = m68_state->d.b.l; break; - case CPUINFO_INT_REGISTER + M6800_X: info->i = m68_state->x.w.l; break; - case CPUINFO_INT_REGISTER + M6800_WAI_STATE: info->i = m68_state->wai_state; break; + case CPUINFO_INT_REGISTER + M6800_S: info->i = cpustate->s.w.l; break; + case CPUINFO_INT_REGISTER + M6800_CC: info->i = cpustate->cc; break; + case CPUINFO_INT_REGISTER + M6800_A: info->i = cpustate->d.b.h; break; + case CPUINFO_INT_REGISTER + M6800_B: info->i = cpustate->d.b.l; break; + case CPUINFO_INT_REGISTER + M6800_X: info->i = cpustate->x.w.l; break; + case CPUINFO_INT_REGISTER + M6800_WAI_STATE: info->i = cpustate->wai_state; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m6800); break; @@ -2773,7 +2773,7 @@ CPU_GET_INFO( m6800 ) case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6800); break; case CPUINFO_PTR_BURN: info->burn = NULL; break; case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6800); break; - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68_state->icount; break; + case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "M6800"); break; @@ -2784,23 +2784,23 @@ CPU_GET_INFO( m6800 ) case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c", - m68_state->cc & 0x80 ? '?':'.', - m68_state->cc & 0x40 ? '?':'.', - m68_state->cc & 0x20 ? 'H':'.', - m68_state->cc & 0x10 ? 'I':'.', - m68_state->cc & 0x08 ? 'N':'.', - m68_state->cc & 0x04 ? 'Z':'.', - m68_state->cc & 0x02 ? 'V':'.', - m68_state->cc & 0x01 ? 'C':'.'); + cpustate->cc & 0x80 ? '?':'.', + cpustate->cc & 0x40 ? '?':'.', + cpustate->cc & 0x20 ? 'H':'.', + cpustate->cc & 0x10 ? 'I':'.', + cpustate->cc & 0x08 ? 'N':'.', + cpustate->cc & 0x04 ? 'Z':'.', + cpustate->cc & 0x02 ? 'V':'.', + cpustate->cc & 0x01 ? 'C':'.'); break; - case CPUINFO_STR_REGISTER + M6800_A: sprintf(info->s, "A:%02X", m68_state->d.b.h); break; - case CPUINFO_STR_REGISTER + M6800_B: sprintf(info->s, "B:%02X", m68_state->d.b.l); break; - case CPUINFO_STR_REGISTER + M6800_PC: sprintf(info->s, "PC:%04X", m68_state->pc.w.l); break; - case CPUINFO_STR_REGISTER + M6800_S: sprintf(info->s, "S:%04X", m68_state->s.w.l); break; - case CPUINFO_STR_REGISTER + M6800_X: sprintf(info->s, "X:%04X", m68_state->x.w.l); break; - case CPUINFO_STR_REGISTER + M6800_CC: sprintf(info->s, "CC:%02X", m68_state->cc); break; - case CPUINFO_STR_REGISTER + M6800_WAI_STATE: sprintf(info->s, "WAI:%X", m68_state->wai_state); break; + case CPUINFO_STR_REGISTER + M6800_A: sprintf(info->s, "A:%02X", cpustate->d.b.h); break; + case CPUINFO_STR_REGISTER + M6800_B: sprintf(info->s, "B:%02X", cpustate->d.b.l); break; + case CPUINFO_STR_REGISTER + M6800_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break; + case CPUINFO_STR_REGISTER + M6800_S: sprintf(info->s, "S:%04X", cpustate->s.w.l); break; + case CPUINFO_STR_REGISTER + M6800_X: sprintf(info->s, "X:%04X", cpustate->x.w.l); break; + case CPUINFO_STR_REGISTER + M6800_CC: sprintf(info->s, "CC:%02X", cpustate->cc); break; + case CPUINFO_STR_REGISTER + M6800_WAI_STATE: sprintf(info->s, "WAI:%X", cpustate->wai_state); break; } } |