diff options
author | Roberto Zandona <robertoz@mamedev.org> | 2008-08-24 11:55:22 +0000 |
---|---|---|
committer | Roberto Zandona <robertoz@mamedev.org> | 2008-08-24 11:55:22 +0000 |
commit | 65a96e4f7ad3429df87aa08cc3f076e5c564544a (patch) | |
tree | cd9dfda7944782bd7b2acabadfa7b6909c11115d | |
parent | bfc0c6a5b299cad1b4a9a9611ee3bbca51a4d0fc (diff) |
some fix for m4510 core
-rw-r--r-- | src/emu/cpu/m6502/m4510.c | 9 | ||||
-rw-r--r-- | src/emu/cpu/m6502/minc4510.h | 2 | ||||
-rw-r--r-- | src/emu/cpu/m6502/ops4510.h | 44 | ||||
-rw-r--r-- | src/emu/cpu/m6502/opsce02.h | 27 |
4 files changed, 39 insertions, 43 deletions
diff --git a/src/emu/cpu/m6502/m4510.c b/src/emu/cpu/m6502/m4510.c index 92285fe03b3..e3078b6d0ca 100644 --- a/src/emu/cpu/m6502/m4510.c +++ b/src/emu/cpu/m6502/m4510.c @@ -133,6 +133,7 @@ typedef struct { UINT8 y; /* Y index register */ UINT8 z; /* Z index register */ UINT8 p; /* Processor status */ + UINT8 interrupt_inhibit; /* Some instructions, like MAP, inhibit interrupt */ UINT8 pending_irq; /* nonzero if an IRQ is pending */ UINT8 after_cli; /* pending IRQ and last insn cleared I */ UINT8 nmi_state; @@ -172,11 +173,12 @@ INLINE int m4510_cpu_readop_arg(void) #define M4510 #include "t65ce02.c" -static READ8_HANDLER( default_rdmem_id ) { return program_read_byte_8le(offset); } -static WRITE8_HANDLER( default_wrmem_id ) { program_write_byte_8le(offset, data); } +static READ8_HANDLER( default_rdmem_id ) { return program_read_byte_8le(M4510_MEM(offset)); } +static WRITE8_HANDLER( default_wrmem_id ) { program_write_byte_8le(M4510_MEM(offset), data); } static void m4510_init(int index, int clock, const void *config, int (*irqcallback)(int)) { + m4510.interrupt_inhibit = 0; m4510.rdmem_id = default_rdmem_id; m4510.wrmem_id = default_wrmem_id; m4510.irq_callback = irqcallback; @@ -197,6 +199,7 @@ static void m4510_reset (void) m4510.z = 0; B = 0; m4510.p = F_E|F_B|F_I|F_Z; /* set E, I and Z flags */ + m4510.interrupt_inhibit = 0; m4510.pending_irq = 0; /* nonzero if an IRQ is pending */ m4510.after_cli = 0; /* pending IRQ and last insn cleared I */ m4510.irq_callback = NULL; @@ -234,7 +237,7 @@ static void m4510_set_context (void *src) INLINE void m4510_take_irq(void) { - if( !(P & F_I) ) + if(( !(P & F_I) ) && (m4510.interrupt_inhibit == 0)) { EAD = M4510_IRQ_VEC; m4510_ICount -= 7; diff --git a/src/emu/cpu/m6502/minc4510.h b/src/emu/cpu/m6502/minc4510.h index 64232abd5b2..178b96e0ed9 100644 --- a/src/emu/cpu/m6502/minc4510.h +++ b/src/emu/cpu/m6502/minc4510.h @@ -54,7 +54,7 @@ #define CHANGE_PC change_pc(M4510_MEM(PCD)) -#define PEEK_OP() cpu_readop(M4510_MEM(PCD)) +#define PEEK_OP() cpu_readop(M4510_MEM(PCW)) #define RDMEM(addr) program_read_byte_8le(M4510_MEM(addr)); m4510_ICount -= 1 #define WRMEM(addr,data) program_write_byte_8le(M4510_MEM(addr),data); m4510_ICount -= 1 diff --git a/src/emu/cpu/m6502/ops4510.h b/src/emu/cpu/m6502/ops4510.h index 33ea7c7318f..6c4cb9455ff 100644 --- a/src/emu/cpu/m6502/ops4510.h +++ b/src/emu/cpu/m6502/ops4510.h @@ -31,47 +31,33 @@ #undef TXS #define TXS \ SPL = X; \ - if (PEEK_OP() == 0x2b /*TYS*/ ) { \ + if (PEEK_OP() == 0x2b /*TYS*/ ) { \ UINT8 op = RDOP(); \ (*m4510.insn[op])(); \ } +#undef NOP +#define NOP \ + m4510.interrupt_inhibit = 0; \ + /* SEI */ + /* c65 docu says transfer of axyz to the mapper register so no readback!? */ -#define MAP \ - if (PEEK_OP() == 0xea /*NOP, in this case end of map*/ )\ - { \ - m4510.mem[0]=0; \ - m4510.mem[1]=0; \ - m4510.mem[2]=0; \ - m4510.mem[3]=0; \ - m4510.mem[4]=0; \ - m4510.mem[5]=0; \ - m4510.mem[6]=0; \ - m4510.mem[7]=0; \ - CHANGE_PC; \ -} else { \ - /*UINT16 low, high;*/ \ - /*low=m4510.low;*/ \ - /*high=m4510.high;*/ \ +#define MAP \ + m4510.interrupt_inhibit = 1; \ m4510.low=m4510.a|(m4510.x<<8); \ m4510.high=m4510.y|(m4510.z<<8); \ - /*m4510.a=low&0xff;*/ \ - /*m4510.x=low>>8;*/ \ - /*m4510.y=high&0xff;*/ \ - /*m4510.z=high>>8;*/ \ - m4510.mem[0]=(m4510.low&0x1000) ? (m4510.low&0xfff)<<8:0; \ - m4510.mem[1]=(m4510.low&0x2000) ? (m4510.low&0xfff)<<8:0; \ - m4510.mem[2]=(m4510.low&0x4000) ? (m4510.low&0xfff)<<8:0; \ - m4510.mem[3]=(m4510.low&0x8000) ? (m4510.low&0xfff)<<8:0; \ + m4510.mem[0]=(m4510.low&0x1000) ? (m4510.low&0xfff)<<8:0; \ + m4510.mem[1]=(m4510.low&0x2000) ? (m4510.low&0xfff)<<8:0; \ + m4510.mem[2]=(m4510.low&0x4000) ? (m4510.low&0xfff)<<8:0; \ + m4510.mem[3]=(m4510.low&0x8000) ? (m4510.low&0xfff)<<8:0; \ m4510.mem[4]=(m4510.high&0x1000) ? (m4510.high&0xfff)<<8:0; \ m4510.mem[5]=(m4510.high&0x2000) ? (m4510.high&0xfff)<<8:0; \ m4510.mem[6]=(m4510.high&0x4000) ? (m4510.high&0xfff)<<8:0; \ m4510.mem[7]=(m4510.high&0x8000) ? (m4510.high&0xfff)<<8:0; \ CHANGE_PC; \ - } \ - m4510_ICount -= 3; \ - { \ + m4510_ICount -= 3; \ + { \ UINT8 op = RDOP(); \ (*m4510.insn[op])(); \ - } + } diff --git a/src/emu/cpu/m6502/opsce02.h b/src/emu/cpu/m6502/opsce02.h index 020373fb8e4..658f8355306 100644 --- a/src/emu/cpu/m6502/opsce02.h +++ b/src/emu/cpu/m6502/opsce02.h @@ -125,7 +125,7 @@ else \ pair.w.l++; \ EAH = RDMEM(pair.d); \ - RDMEM(PCW-1); \ + /* RDMEM(PCW-1); */ \ EAW += Y; \ } @@ -135,7 +135,7 @@ #define EA_IND \ EA_ABS; \ tmp = RDMEM(EAD); \ - EAD++; \ + EAL++; \ EAH = RDMEM(EAD); \ EAL = tmp @@ -146,7 +146,7 @@ EA_ABS; \ EAW += X; \ tmp = RDMEM(EAD); \ - EAD++; \ + EAL++; \ EAH = RDMEM(EAD); \ EAL = tmp @@ -317,27 +317,34 @@ * BRA branch relative ***************************************************************/ #define BRA(cond) \ - tmp = RDOPARG(); \ if (cond) \ { \ - EAW = PCW + (signed char)tmp; \ + tmp = RDOPARG(); \ + EAW = PCW + (signed char)tmp; \ PCD = EAD; \ CHANGE_PC; \ + } \ + else \ + { \ + PCW += 1; \ } /*************************************************************** * BRA branch relative ***************************************************************/ -#define BRA_WORD(cond) \ - EAL = RDOPARG(); \ - EAH = RDOPARG(); \ +#define BRA_WORD(cond) \ if (cond) \ { \ - EAW = PCW + (short)(EAW-1); \ + EAL = RDOPARG(); \ + EAH = RDOPARG(); \ + EAW = PCW + (short)(EAW-1); \ PCD = EAD; \ CHANGE_PC; \ + } \ + else \ + { \ + PCW += 2; \ } - /* 65ce02 ****************************************************** * BRK Break * increment PC, push PC hi, PC lo, flags (with B bit set), |