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author Aaron Giles <aaron@aarongiles.com>2008-06-23 16:37:34 +0000
committer Aaron Giles <aaron@aarongiles.com>2008-06-23 16:37:34 +0000
commita4918351e16e335d85d3e2e46a47e303eaf6e03f (patch)
tree978ee9be9d75a221af1ccd2a31e04c6ac4837fa3
parentdfb5755f25d7c8f4021db822129dc175cfef9a3e (diff)
Save state support:
* added save state support to the SHARC CPU core * added save state support to the PowerPC recompiler * added save state support to the virtual TLB system * added save state support to the RF5C400 sound core * added save state support to konppc module * added save state support to K056800 host controller * added save state support to the Konami hornet driver Fixed poor default CLUT handling in the voodoo driver
-rw-r--r--src/emu/cpu/mips/mips3com.c24
-rw-r--r--src/emu/cpu/powerpc/ppccom.c34
-rw-r--r--src/emu/cpu/powerpc/ppccom.h2
-rw-r--r--src/emu/cpu/powerpc/ppcdrc.c22
-rw-r--r--src/emu/cpu/sharc/sharc.c156
-rw-r--r--src/emu/cpu/vtlb.c5
-rw-r--r--src/emu/sound/rf5c400.c27
-rw-r--r--src/emu/video/voodoo.c18
-rw-r--r--src/mame/drivers/hornet.c308
-rw-r--r--src/mame/machine/konamiic.c6
-rw-r--r--src/mame/machine/konppc.c32
11 files changed, 412 insertions, 222 deletions
diff --git a/src/emu/cpu/mips/mips3com.c b/src/emu/cpu/mips/mips3com.c
index e4b75658320..81ddfaa8a34 100644
--- a/src/emu/cpu/mips/mips3com.c
+++ b/src/emu/cpu/mips/mips3com.c
@@ -22,7 +22,6 @@
FUNCTION PROTOTYPES
***************************************************************************/
-static STATE_POSTLOAD( mips3_postload );
static TIMER_CALLBACK( compare_int_callback );
static UINT32 compute_config_register(const mips3_state *mips);
@@ -109,29 +108,6 @@ void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, int in
state_save_register_item("mips3", index * ARRAY_LENGTH(mips->tlb) + tlbindex, mips->tlb[tlbindex].entry_hi);
state_save_register_item_array("mips3", index * ARRAY_LENGTH(mips->tlb) + tlbindex, mips->tlb[tlbindex].entry_lo);
}
- state_save_register_postload(Machine, mips3_postload, mips);
-}
-
-
-/*-------------------------------------------------
- mips3_postload - post state load callback
--------------------------------------------------*/
-
-static STATE_POSTLOAD( mips3_postload )
-{
- mips3_state *mips = param;
- int tlbindex;
-
- /* first clear out the existing TLB */
- for (tlbindex = 0; tlbindex < ARRAY_LENGTH(mips->tlb); tlbindex++)
- {
- vtlb_load(mips->vtlb, 2 * tlbindex + 0, 0, 0, 0);
- vtlb_load(mips->vtlb, 2 * tlbindex + 1, 0, 0, 0);
- }
-
- /* then remap the TLB */
- for (tlbindex = 0; tlbindex < ARRAY_LENGTH(mips->tlb); tlbindex++)
- tlb_map_entry(mips, tlbindex);
}
diff --git a/src/emu/cpu/powerpc/ppccom.c b/src/emu/cpu/powerpc/ppccom.c
index 07eb604c19f..3f72d03a1e5 100644
--- a/src/emu/cpu/powerpc/ppccom.c
+++ b/src/emu/cpu/powerpc/ppccom.c
@@ -183,7 +183,7 @@ INLINE void set_decrementer(powerpc_state *ppc, UINT32 newdec)
structure based on the configured type
-------------------------------------------------*/
-void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, int clock, const powerpc_config *config, int (*irqcallback)(int))
+void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, int index, int clock, const powerpc_config *config, int (*irqcallback)(int))
{
/* initialize based on the config */
memset(ppc, 0, sizeof(*ppc));
@@ -214,6 +214,38 @@ void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_di
/* reset the state */
ppccom_reset(ppc);
+
+ /* register for save states */
+ state_save_register_item("ppc", index, ppc->pc);
+ state_save_register_item_array("ppc", index, ppc->r);
+ state_save_register_item_array("ppc", index, ppc->f);
+ state_save_register_item_array("ppc", index, ppc->cr);
+ state_save_register_item("ppc", index, ppc->xerso);
+ state_save_register_item("ppc", index, ppc->fpscr);
+ state_save_register_item("ppc", index, ppc->msr);
+ state_save_register_item_array("ppc", index, ppc->sr);
+ state_save_register_item_array("ppc", index, ppc->spr);
+ state_save_register_item_array("ppc", index, ppc->dcr);
+ if (cap & PPCCAP_4XX)
+ {
+ state_save_register_item_array("ppc", index, ppc->spu.regs);
+ state_save_register_item("ppc", index, ppc->spu.txbuf);
+ state_save_register_item("ppc", index, ppc->spu.rxbuf);
+ state_save_register_item_array("ppc", index, ppc->spu.rxbuffer);
+ state_save_register_item("ppc", index, ppc->spu.rxin);
+ state_save_register_item("ppc", index, ppc->spu.rxout);
+ state_save_register_item("ppc", index, ppc->pit_reload);
+ state_save_register_item("ppc", index, ppc->irqstate);
+ }
+ if (cap & PPCCAP_603_MMU)
+ {
+ state_save_register_item("ppc", index, ppc->mmu603_cmp);
+ state_save_register_item_array("ppc", index, ppc->mmu603_hash);
+ state_save_register_item_array("ppc", index, ppc->mmu603_r);
+ }
+ state_save_register_item("ppc", index, ppc->irq_pending);
+ state_save_register_item("ppc", index, ppc->tb_zero_cycles);
+ state_save_register_item("ppc", index, ppc->dec_zero_cycles);
}
diff --git a/src/emu/cpu/powerpc/ppccom.h b/src/emu/cpu/powerpc/ppccom.h
index e825728a93c..232bca5bc57 100644
--- a/src/emu/cpu/powerpc/ppccom.h
+++ b/src/emu/cpu/powerpc/ppccom.h
@@ -568,7 +568,7 @@ struct _powerpc_state
FUNCTION PROTOTYPES
***************************************************************************/
-void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, int clock, const powerpc_config *config, int (*irqcallback)(int));
+void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, int index, int clock, const powerpc_config *config, int (*irqcallback)(int));
void ppccom_exit(powerpc_state *ppc);
void ppccom_reset(powerpc_state *ppc);
diff --git a/src/emu/cpu/powerpc/ppcdrc.c b/src/emu/cpu/powerpc/ppcdrc.c
index da78e66d87c..7909eeeca7c 100644
--- a/src/emu/cpu/powerpc/ppcdrc.c
+++ b/src/emu/cpu/powerpc/ppcdrc.c
@@ -534,7 +534,7 @@ INLINE UINT32 compute_spr(UINT32 spr)
ppcdrc_init - initialize the processor
-------------------------------------------------*/
-static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, int clock, const powerpc_config *config, int (*irqcallback)(int))
+static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, int index, int clock, const powerpc_config *config, int (*irqcallback)(int))
{
drcfe_config feconfig =
{
@@ -558,7 +558,7 @@ static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, int cl
memset(ppc, 0, sizeof(*ppc));
/* initialize the core */
- ppccom_init(ppc, flavor, cap, tb_divisor, clock, config, irqcallback);
+ ppccom_init(ppc, flavor, cap, tb_divisor, index, clock, config, irqcallback);
/* allocate the implementation-specific state from the full cache */
ppc->impstate = drccache_memory_alloc_near(cache, sizeof(*ppc->impstate));
@@ -4220,7 +4220,7 @@ static void ppcdrc4xx_set_info(UINT32 state, cpuinfo *info)
static void ppc403ga_init(int index, int clock, const void *config, int (*irqcallback)(int))
{
- ppcdrc_init(PPC_MODEL_403GA, PPCCAP_4XX, 1, clock, config, irqcallback);
+ ppcdrc_init(PPC_MODEL_403GA, PPCCAP_4XX, 1, index, clock, config, irqcallback);
}
@@ -4259,7 +4259,7 @@ void ppc403ga_get_info(UINT32 state, cpuinfo *info)
static void ppc403gcx_init(int index, int clock, const void *config, int (*irqcallback)(int))
{
- ppcdrc_init(PPC_MODEL_403GCX, PPCCAP_4XX, 1, clock, config, irqcallback);
+ ppcdrc_init(PPC_MODEL_403GCX, PPCCAP_4XX, 1, index, clock, config, irqcallback);
}
@@ -4303,7 +4303,7 @@ void ppc403gcx_get_info(UINT32 state, cpuinfo *info)
static void ppc601_init(int index, int clock, const void *config, int (*irqcallback)(int))
{
- ppcdrc_init(PPC_MODEL_601, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 0/* no TB */, clock, config, irqcallback);
+ ppcdrc_init(PPC_MODEL_601, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 0/* no TB */, index, clock, config, irqcallback);
}
@@ -4341,7 +4341,7 @@ void ppc601_get_info(UINT32 state, cpuinfo *info)
static void ppc602_init(int index, int clock, const void *config, int (*irqcallback)(int))
{
- ppcdrc_init(PPC_MODEL_602, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 1/* unknown */, clock, config, irqcallback);
+ ppcdrc_init(PPC_MODEL_602, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 1/* unknown */, index, clock, config, irqcallback);
}
@@ -4379,7 +4379,7 @@ void ppc602_get_info(UINT32 state, cpuinfo *info)
static void ppc603_init(int index, int clock, const void *config, int (*irqcallback)(int))
{
- ppcdrc_init(PPC_MODEL_603, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, clock, config, irqcallback);
+ ppcdrc_init(PPC_MODEL_603, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, index, clock, config, irqcallback);
}
@@ -4417,7 +4417,7 @@ void ppc603_get_info(UINT32 state, cpuinfo *info)
static void ppc603e_init(int index, int clock, const void *config, int (*irqcallback)(int))
{
- ppcdrc_init(PPC_MODEL_603E, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, clock, config, irqcallback);
+ ppcdrc_init(PPC_MODEL_603E, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, index, clock, config, irqcallback);
}
@@ -4455,7 +4455,7 @@ void ppc603e_get_info(UINT32 state, cpuinfo *info)
static void ppc603r_init(int index, int clock, const void *config, int (*irqcallback)(int))
{
- ppcdrc_init(PPC_MODEL_603R, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, clock, config, irqcallback);
+ ppcdrc_init(PPC_MODEL_603R, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, index, clock, config, irqcallback);
}
@@ -4493,7 +4493,7 @@ void ppc603r_get_info(UINT32 state, cpuinfo *info)
static void ppc604_init(int index, int clock, const void *config, int (*irqcallback)(int))
{
- ppcdrc_init(PPC_MODEL_604, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 4, clock, config, irqcallback);
+ ppcdrc_init(PPC_MODEL_604, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 4, index, clock, config, irqcallback);
}
@@ -4536,7 +4536,7 @@ void ppc604_get_info(UINT32 state, cpuinfo *info)
static void mpc8240_init(int index, int clock, const void *config, int (*irqcallback)(int))
{
- ppcdrc_init(PPC_MODEL_MPC8240, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 4/* unknown */, clock, config, irqcallback);
+ ppcdrc_init(PPC_MODEL_MPC8240, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED, 4/* unknown */, index, clock, config, irqcallback);
}
diff --git a/src/emu/cpu/sharc/sharc.c b/src/emu/cpu/sharc/sharc.c
index dfbf8516d64..5c47389a604 100644
--- a/src/emu/cpu/sharc/sharc.c
+++ b/src/emu/cpu/sharc/sharc.c
@@ -120,13 +120,12 @@ typedef struct
UINT32 mode1;
UINT32 astat;
} status_stack[5];
- int status_stkp;
+ INT32 status_stkp;
UINT64 px;
UINT16 *internal_ram;
UINT16 *internal_ram_block0, *internal_ram_block1;
- int internal_ram_size;
int (*irq_callback)(int irqline);
void (*opcode_handler)(void);
@@ -136,34 +135,34 @@ typedef struct
UINT32 nfaddr;
- int idle;
- int irq_active;
- int active_irq_num;
+ INT32 idle;
+ INT32 irq_active;
+ INT32 active_irq_num;
SHARC_BOOT_MODE boot_mode;
UINT32 dmaop_src;
UINT32 dmaop_dst;
UINT32 dmaop_chain_ptr;
- int dmaop_src_modifier;
- int dmaop_dst_modifier;
- int dmaop_src_count;
- int dmaop_dst_count;
- int dmaop_pmode;
- int dmaop_cycles;
- int dmaop_channel;
- int dmaop_chained_direction;
-
- int interrupt_active;
-
- int iop_latency_cycles;
- int iop_latency_reg;
+ INT32 dmaop_src_modifier;
+ INT32 dmaop_dst_modifier;
+ INT32 dmaop_src_count;
+ INT32 dmaop_dst_count;
+ INT32 dmaop_pmode;
+ INT32 dmaop_cycles;
+ INT32 dmaop_channel;
+ INT32 dmaop_chained_direction;
+
+ INT32 interrupt_active;
+
+ INT32 iop_latency_cycles;
+ INT32 iop_latency_reg;
UINT32 iop_latency_data;
UINT32 delay_slot1, delay_slot2;
- int systemreg_latency_cycles;
- int systemreg_latency_reg;
+ INT32 systemreg_latency_cycles;
+ INT32 systemreg_latency_reg;
UINT32 systemreg_latency_data;
UINT32 systemreg_previous_data;
@@ -425,6 +424,8 @@ static offs_t sharc_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT
static void sharc_init(int index, int clock, const void *config, int (*irqcallback)(int))
{
const sharc_config *cfg = config;
+ int saveindex;
+
sharc.boot_mode = cfg->boot_mode;
sharc.irq_callback = irqcallback;
@@ -434,6 +435,121 @@ static void sharc_init(int index, int clock, const void *config, int (*irqcallba
sharc.internal_ram = auto_malloc(2 * 0x10000 * sizeof(UINT16)); // 2x 128KB
sharc.internal_ram_block0 = &sharc.internal_ram[0];
sharc.internal_ram_block1 = &sharc.internal_ram[0x20000/2];
+
+ state_save_register_item("sharc", index, sharc.pc);
+ state_save_register_item_pointer("sharc", index, (&sharc.r[0].r), ARRAY_LENGTH(sharc.r));
+ state_save_register_item_pointer("sharc", index, (&sharc.reg_alt[0].r), ARRAY_LENGTH(sharc.reg_alt));
+ state_save_register_item("sharc", index, sharc.mrf);
+ state_save_register_item("sharc", index, sharc.mrb);
+
+ state_save_register_item_array("sharc", index, sharc.pcstack);
+ state_save_register_item_array("sharc", index, sharc.lcstack);
+ state_save_register_item_array("sharc", index, sharc.lastack);
+ state_save_register_item("sharc", index, sharc.lstkp);
+
+ state_save_register_item("sharc", index, sharc.faddr);
+ state_save_register_item("sharc", index, sharc.daddr);
+ state_save_register_item("sharc", index, sharc.pcstk);
+ state_save_register_item("sharc", index, sharc.pcstkp);
+ state_save_register_item("sharc", index, sharc.laddr);
+ state_save_register_item("sharc", index, sharc.curlcntr);
+ state_save_register_item("sharc", index, sharc.lcntr);
+
+ state_save_register_item_array("sharc", index, sharc.dag1.i);
+ state_save_register_item_array("sharc", index, sharc.dag1.m);
+ state_save_register_item_array("sharc", index, sharc.dag1.b);
+ state_save_register_item_array("sharc", index, sharc.dag1.l);
+ state_save_register_item_array("sharc", index, sharc.dag2.i);
+ state_save_register_item_array("sharc", index, sharc.dag2.m);
+ state_save_register_item_array("sharc", index, sharc.dag2.b);
+ state_save_register_item_array("sharc", index, sharc.dag2.l);
+ state_save_register_item_array("sharc", index, sharc.dag1_alt.i);
+ state_save_register_item_array("sharc", index, sharc.dag1_alt.m);
+ state_save_register_item_array("sharc", index, sharc.dag1_alt.b);
+ state_save_register_item_array("sharc", index, sharc.dag1_alt.l);
+ state_save_register_item_array("sharc", index, sharc.dag2_alt.i);
+ state_save_register_item_array("sharc", index, sharc.dag2_alt.m);
+ state_save_register_item_array("sharc", index, sharc.dag2_alt.b);
+ state_save_register_item_array("sharc", index, sharc.dag2_alt.l);
+
+ for (saveindex = 0; saveindex < ARRAY_LENGTH(sharc.dma); saveindex++)
+ {
+ state_save_register_item("sharc", index * ARRAY_LENGTH(sharc.dma) + saveindex, sharc.dma[saveindex].control);
+ state_save_register_item("sharc", index * ARRAY_LENGTH(sharc.dma) + saveindex, sharc.dma[saveindex].int_index);
+ state_save_register_item("sharc", index * ARRAY_LENGTH(sharc.dma) + saveindex, sharc.dma[saveindex].int_modifier);
+ state_save_register_item("sharc", index * ARRAY_LENGTH(sharc.dma) + saveindex, sharc.dma[saveindex].int_count);
+ state_save_register_item("sharc", index * ARRAY_LENGTH(sharc.dma) + saveindex, sharc.dma[saveindex].chain_ptr);
+ state_save_register_item("sharc", index * ARRAY_LENGTH(sharc.dma) + saveindex, sharc.dma[saveindex].gen_purpose);
+ state_save_register_item("sharc", index * ARRAY_LENGTH(sharc.dma) + saveindex, sharc.dma[saveindex].ext_index);
+ state_save_register_item("sharc", index * ARRAY_LENGTH(sharc.dma) + saveindex, sharc.dma[saveindex].ext_modifier);
+ state_save_register_item("sharc", index * ARRAY_LENGTH(sharc.dma) + saveindex, sharc.dma[saveindex].ext_count);
+ }
+
+ state_save_register_item("sharc", index, sharc.mode1);
+ state_save_register_item("sharc", index, sharc.mode2);
+ state_save_register_item("sharc", index, sharc.astat);
+ state_save_register_item("sharc", index, sharc.stky);
+ state_save_register_item("sharc", index, sharc.irptl);
+ state_save_register_item("sharc", index, sharc.imask);
+ state_save_register_item("sharc", index, sharc.imaskp);
+ state_save_register_item("sharc", index, sharc.ustat1);
+ state_save_register_item("sharc", index, sharc.ustat2);
+
+ state_save_register_item_array("sharc", index, sharc.flag);
+
+ state_save_register_item("sharc", index, sharc.syscon);
+ state_save_register_item("sharc", index, sharc.sysstat);
+
+ for (saveindex = 0; saveindex < ARRAY_LENGTH(sharc.status_stack); saveindex++)
+ {
+ state_save_register_item("sharc", index * ARRAY_LENGTH(sharc.status_stack) + saveindex, sharc.status_stack[saveindex].mode1);
+ state_save_register_item("sharc", index * ARRAY_LENGTH(sharc.status_stack) + saveindex, sharc.status_stack[saveindex].astat);
+ }
+ state_save_register_item("sharc", index, sharc.status_stkp);
+
+ state_save_register_item("sharc", index, sharc.px);
+
+ state_save_register_item_pointer("sharc", index, sharc.internal_ram, 2 * 0x10000);
+
+ state_save_register_item("sharc", index, sharc.opcode);
+ state_save_register_item("sharc", index, sharc.fetch_opcode);
+ state_save_register_item("sharc", index, sharc.decode_opcode);
+
+ state_save_register_item("sharc", index, sharc.nfaddr);
+
+ state_save_register_item("sharc", index, sharc.idle);
+ state_save_register_item("sharc", index, sharc.irq_active);
+ state_save_register_item("sharc", index, sharc.active_irq_num);
+
+ state_save_register_item("sharc", index, sharc.dmaop_src);
+ state_save_register_item("sharc", index, sharc.dmaop_dst);
+ state_save_register_item("sharc", index, sharc.dmaop_chain_ptr);
+ state_save_register_item("sharc", index, sharc.dmaop_src_modifier);
+ state_save_register_item("sharc", index, sharc.dmaop_dst_modifier);
+ state_save_register_item("sharc", index, sharc.dmaop_src_count);
+ state_save_register_item("sharc", index, sharc.dmaop_dst_count);
+ state_save_register_item("sharc", index, sharc.dmaop_pmode);
+ state_save_register_item("sharc", index, sharc.dmaop_cycles);
+ state_save_register_item("sharc", index, sharc.dmaop_channel);
+ state_save_register_item("sharc", index, sharc.dmaop_chained_direction);
+
+ state_save_register_item("sharc", index, sharc.interrupt_active);
+
+ state_save_register_item("sharc", index, sharc.iop_latency_cycles);
+ state_save_register_item("sharc", index, sharc.iop_latency_reg);
+ state_save_register_item("sharc", index, sharc.iop_latency_data);
+
+ state_save_register_item("sharc", index, sharc.delay_slot1);
+ state_save_register_item("sharc", index, sharc.delay_slot2);
+
+ state_save_register_item("sharc", index, sharc.systemreg_latency_cycles);
+ state_save_register_item("sharc", index, sharc.systemreg_latency_reg);
+ state_save_register_item("sharc", index, sharc.systemreg_latency_data);
+ state_save_register_item("sharc", index, sharc.systemreg_previous_data);
+
+ state_save_register_item("sharc", index, sharc.astat_old);
+ state_save_register_item("sharc", index, sharc.astat_old_old);
+ state_save_register_item("sharc", index, sharc.astat_old_old_old);
}
static void sharc_reset(void)
diff --git a/src/emu/cpu/vtlb.c b/src/emu/cpu/vtlb.c
index 921cd01551b..95a6c06554d 100644
--- a/src/emu/cpu/vtlb.c
+++ b/src/emu/cpu/vtlb.c
@@ -38,6 +38,7 @@ struct _vtlb_state
offs_t * live; /* array of live entries by table index */
int * fixedpages; /* number of pages each fixed entry covers */
vtlb_entry * table; /* table of entries by address */
+ vtlb_entry * save; /* cache of live table entries for saving */
cpu_translate_func translate; /* translate function */
};
@@ -76,18 +77,20 @@ vtlb_state *vtlb_alloc(int cpunum, int space, int fixed_entries, int dynamic_ent
/* allocate the entry array */
vtlb->live = malloc_or_die(sizeof(vtlb->live[0]) * (fixed_entries + dynamic_entries));
memset(vtlb->live, 0, sizeof(vtlb->live[0]) * (fixed_entries + dynamic_entries));
+ state_save_register_item_pointer("vtlb", cpunum * ADDRESS_SPACES + space, vtlb->live, fixed_entries + dynamic_entries);
/* allocate the lookup table */
vtlb->table = malloc_or_die(sizeof(vtlb->table[0]) << (vtlb->addrwidth - vtlb->pageshift));
memset(vtlb->table, 0, sizeof(vtlb->table[0]) << (vtlb->addrwidth - vtlb->pageshift));
+ state_save_register_item_pointer("vtlb", cpunum * ADDRESS_SPACES + space, vtlb->table, 1 << (vtlb->addrwidth - vtlb->pageshift));
/* allocate the fixed page count array */
if (fixed_entries > 0)
{
vtlb->fixedpages = malloc_or_die(sizeof(vtlb->fixedpages[0]) * fixed_entries);
memset(vtlb->fixedpages, 0, sizeof(vtlb->fixedpages[0]) * fixed_entries);
+ state_save_register_item_pointer("vtlb", cpunum * ADDRESS_SPACES + space, vtlb->fixedpages, fixed_entries);
}
-
return vtlb;
}
diff --git a/src/emu/sound/rf5c400.c b/src/emu/sound/rf5c400.c
index 352a0f719c6..59b98fe8620 100644
--- a/src/emu/sound/rf5c400.c
+++ b/src/emu/sound/rf5c400.c
@@ -29,9 +29,6 @@ struct rf5c400_info
sound_stream *stream;
- int current_channel;
- int keyon_channel;
-
double env_ar_table[0x9f];
double env_dr_table[0x9f];
double env_rr_table[0x9f];
@@ -315,6 +312,30 @@ static void rf5c400_init_chip(struct rf5c400_info *info, int sndindex, int clock
info->channels[i].env_step = 0.0;
info->channels[i].env_scale = 1.0;
}
+
+ for (i = 0; i < ARRAY_LENGTH(info->channels); i++)
+ {
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].startH);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].startL);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].freq);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].endL);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].endHloopH);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].loopL);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].pan);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].effect);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].volume);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].attack);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].decay);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].release);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].cutoff);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].pos);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].step);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].keyon);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].env_phase);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].env_level);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].env_step);
+ state_save_register_item("rf5c400", sndindex * ARRAY_LENGTH(info->channels) + i, info->channels[i].env_scale);
+ }
info->stream = stream_create(0, 2, clock/384, info, rf5c400_update);
}
diff --git a/src/emu/video/voodoo.c b/src/emu/video/voodoo.c
index d1443d70283..2a2b188f68f 100644
--- a/src/emu/video/voodoo.c
+++ b/src/emu/video/voodoo.c
@@ -472,15 +472,17 @@ static void init_fbi(voodoo_state *v, fbi_state *f, void *memory, int fbmem)
f->height = 384;
/* init the pens */
- for (pen = 0; pen < 65536; pen++)
+ f->clut_dirty = TRUE;
+ if (v->type <= VOODOO_2)
+ {
+ for (pen = 0; pen < 32; pen++)
+ v->fbi.clut[pen] = MAKE_ARGB(pen, pal5bit(pen), pal5bit(pen), pal5bit(pen));
+ v->fbi.clut[32] = MAKE_ARGB(32,0xff,0xff,0xff);
+ }
+ else
{
- int r = (pen >> 11) & 0x1f;
- int g = (pen >> 5) & 0x3f;
- int b = pen & 0x1f;
- r = (r << 3) | (r >> 2);
- g = (g << 2) | (g >> 4);
- b = (b << 3) | (b >> 2);
- f->pen[pen] = MAKE_RGB(r, g, b);
+ for (pen = 0; pen < 512; pen++)
+ v->fbi.clut[pen] = MAKE_RGB(pen,pen,pen);
}
/* allocate a VBLANK timer */
diff --git a/src/mame/drivers/hornet.c b/src/mame/drivers/hornet.c
index 63a6c13164c..9bf7a5bab41 100644
--- a/src/mame/drivers/hornet.c
+++ b/src/mame/drivers/hornet.c
@@ -318,6 +318,12 @@
#include "rendlay.h"
static UINT8 led_reg0 = 0x7f, led_reg1 = 0x7f;
+static UINT32 *workram;
+static UINT32 *sharc_dataram[2];
+static UINT8 jvs_sdata[1024];
+static UINT32 jvs_sdata_ptr = 0;
+static UINT8 *backup_ram;
+
/* K037122 Tilemap chip (move to konamiic.c ?) */
@@ -403,6 +409,13 @@ static TILE_GET_INFO( K037122_1_tile_info_layer1 )
SET_TILE_INFO(K037122_gfx_index[1], tile, color, flags);
}
+static STATE_POSTLOAD( K037122_postload )
+{
+ int chip = (FPTR)param;
+ K037122_char_dirty[chip] = 1;
+ memset(K037122_dirty_map[chip], 1, K037122_NUM_TILES);
+}
+
static int K037122_vh_start(running_machine *machine, int chip)
{
for(K037122_gfx_index[chip] = 0; K037122_gfx_index[chip] < MAX_GFX_ELEMENTS; K037122_gfx_index[chip]++)
@@ -440,6 +453,11 @@ static int K037122_vh_start(running_machine *machine, int chip)
machine->gfx[K037122_gfx_index[chip]]->total_colors = machine->config->total_colors / 16;
+ state_save_register_item_array("K037122", chip, K037122_reg[chip]);
+ state_save_register_item_pointer("K037122", chip, K037122_char_ram[chip], 0x200000/sizeof(K037122_char_ram[chip][0]));
+ state_save_register_item_pointer("K037122", chip, K037122_tile_ram[chip], 0x20000/sizeof(K037122_tile_ram[chip][0]));
+ state_save_register_postload(machine, K037122_postload, (void *)chip);
+
return 0;
}
@@ -642,8 +660,6 @@ static VIDEO_UPDATE( hornet_2board )
}
/*****************************************************************************/
-static UINT32 *workram;
-
static READ8_HANDLER( sysreg_r )
{
UINT8 r = 0;
@@ -692,8 +708,6 @@ static WRITE8_HANDLER( sysreg_w )
}
}
-static int comm_rombank = 0;
-
static WRITE32_HANDLER( comm1_w )
{
printf("comm1_w: %08X, %08X, %08X\n", offset, data, mem_mask);
@@ -703,12 +717,8 @@ static WRITE32_HANDLER( comm_rombank_w )
{
int bank = data >> 24;
UINT8 *usr3 = memory_region(machine, REGION_USER3);
- if (usr3)
- if( bank != comm_rombank ) {
- printf("rombank %02X\n", bank);
- comm_rombank = bank & 0x7f;
- memory_set_bankptr(1, usr3 + (comm_rombank * 0x10000));
- }
+ if (usr3 != NULL)
+ memory_set_bank(1, bank & 0x7f);
}
static READ32_HANDLER( comm0_unk_r )
@@ -728,7 +738,7 @@ static ADDRESS_MAP_START( hornet_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x780c0000, 0x780c0003) AM_READWRITE(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
AM_RANGE(0x7d000000, 0x7d00ffff) AM_READ8(sysreg_r, 0xffffffff)
AM_RANGE(0x7d010000, 0x7d01ffff) AM_WRITE8(sysreg_w, 0xffffffff)
- AM_RANGE(0x7d020000, 0x7d021fff) AM_READWRITE(timekeeper_0_32be_r, timekeeper_0_32be_w) /* M48T58Y RTC/NVRAM */
+ AM_RANGE(0x7d020000, 0x7d021fff) AM_READWRITE8(timekeeper_0_r, timekeeper_0_w, 0xffffffff) /* M48T58Y RTC/NVRAM */
AM_RANGE(0x7d030000, 0x7d030007) AM_READWRITE(K056800_host_r, K056800_host_w)
AM_RANGE(0x7d042000, 0x7d043fff) AM_RAM /* COMM BOARD 0 */
AM_RANGE(0x7d044000, 0x7d044007) AM_READ(comm0_unk_r)
@@ -752,8 +762,6 @@ ADDRESS_MAP_END
/*****************************************************************************/
-static UINT32 *sharc_dataram[2];
-
static READ32_HANDLER( dsp_dataram0_r )
{
return sharc_dataram[0][offset] & 0xffff;
@@ -776,7 +784,7 @@ static WRITE32_HANDLER( dsp_dataram1_w )
static ADDRESS_MAP_START( sharc0_map, ADDRESS_SPACE_DATA, 32 )
AM_RANGE(0x0400000, 0x041ffff) AM_READWRITE(cgboard_0_shared_sharc_r, cgboard_0_shared_sharc_w)
- AM_RANGE(0x0500000, 0x05fffff) AM_READWRITE(dsp_dataram0_r, dsp_dataram0_w)
+ AM_RANGE(0x0500000, 0x05fffff) AM_READWRITE(dsp_dataram0_r, dsp_dataram0_w) AM_BASE(&sharc_dataram[0])
AM_RANGE(0x1400000, 0x14fffff) AM_RAM
AM_RANGE(0x2400000, 0x27fffff) AM_DEVREADWRITE(VOODOO_GRAPHICS, "voodoo0", voodoo_r, voodoo_w)
AM_RANGE(0x3400000, 0x34000ff) AM_READWRITE(cgboard_0_comm_sharc_r, cgboard_0_comm_sharc_w)
@@ -786,7 +794,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sharc1_map, ADDRESS_SPACE_DATA, 32 )
AM_RANGE(0x0400000, 0x041ffff) AM_READWRITE(cgboard_1_shared_sharc_r, cgboard_1_shared_sharc_w)
- AM_RANGE(0x0500000, 0x05fffff) AM_READWRITE(dsp_dataram1_r, dsp_dataram1_w)
+ AM_RANGE(0x0500000, 0x05fffff) AM_READWRITE(dsp_dataram1_r, dsp_dataram1_w) AM_BASE(&sharc_dataram[1])
AM_RANGE(0x1400000, 0x14fffff) AM_RAM
AM_RANGE(0x2400000, 0x27fffff) AM_DEVREADWRITE(VOODOO_GRAPHICS, "voodoo1", voodoo_r, voodoo_w)
AM_RANGE(0x3400000, 0x34000ff) AM_READWRITE(cgboard_1_comm_sharc_r, cgboard_1_comm_sharc_w)
@@ -929,14 +937,23 @@ static MACHINE_START( hornet )
cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_END, 0x003fffff);
cpunum_set_info_ptr(0, CPUINFO_PTR_PPC_FASTRAM_BASE, workram);
cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
+
+ state_save_register_global(led_reg0);
+ state_save_register_global(led_reg1);
+ state_save_register_global_array(jvs_sdata);
+ state_save_register_global(jvs_sdata_ptr);
}
static MACHINE_RESET( hornet )
{
UINT8 *usr3 = memory_region(machine, REGION_USER3);
UINT8 *usr5 = memory_region(machine, REGION_USER5);
- if (usr3)
- memory_set_bankptr(1, usr3);
+ if (usr3 != NULL)
+ {
+ memory_configure_bank(1, 0, memory_region_length(machine, REGION_USER3) / 0x40000, usr3, 0x40000);
+ memory_set_bank(1, 0);
+ }
+
cpunum_set_input_line(machine, 2, INPUT_LINE_RESET, ASSERT_LINE);
if (usr5)
@@ -993,8 +1010,11 @@ static MACHINE_RESET( hornet_2board )
UINT8 *usr3 = memory_region(machine, REGION_USER3);
UINT8 *usr5 = memory_region(machine, REGION_USER5);
- if (usr3)
- memory_set_bankptr(1, usr3);
+ if (usr3 != NULL)
+ {
+ memory_configure_bank(1, 0, memory_region_length(machine, REGION_USER3) / 0x40000, usr3, 0x40000);
+ memory_set_bank(1, 0);
+ }
cpunum_set_input_line(machine, 2, INPUT_LINE_RESET, ASSERT_LINE);
cpunum_set_input_line(machine, 3, INPUT_LINE_RESET, ASSERT_LINE);
@@ -1061,10 +1081,6 @@ MACHINE_DRIVER_END
static void jamma_jvs_cmd_exec(void);
-static UINT8 jvs_sdata[1024];
-
-static int jvs_sdata_ptr = 0;
-
static void jamma_jvs_w(UINT8 data)
{
if (jvs_sdata_ptr == 0 && data != 0xe0)
@@ -1208,34 +1224,32 @@ static void sound_irq_callback(running_machine *machine, int irq)
cpunum_set_input_line(machine, 1, INPUT_LINE_IRQ2, PULSE_LINE);
}
-static UINT8 backup_ram[0x2000];
-static void init_hornet(running_machine *machine)
+static void init_hornet(running_machine *machine, const UINT8 *backupdef)
{
init_konami_cgboard(1, CGBOARD_TYPE_HORNET);
set_cgboard_texture_bank(0, 5, memory_region(machine, REGION_USER5));
- sharc_dataram[0] = auto_malloc(0x100000);
-
K056800_init(sound_irq_callback);
K033906_init();
+ backup_ram = auto_malloc(0x2000);
+ memcpy(backup_ram, backupdef, 0x2000);
timekeeper_init(0, TIMEKEEPER_M48T58, backup_ram);
ppc4xx_spu_set_tx_handler(0, jamma_jvs_w);
}
-static void init_hornet_2board(running_machine *machine)
+static void init_hornet_2board(running_machine *machine, const UINT8 *backupdef)
{
init_konami_cgboard(2, CGBOARD_TYPE_HORNET);
set_cgboard_texture_bank(0, 5, memory_region(machine, REGION_USER5));
set_cgboard_texture_bank(1, 6, memory_region(machine, REGION_USER5));
- sharc_dataram[0] = auto_malloc(0x100000);
- sharc_dataram[1] = auto_malloc(0x100000);
-
K056800_init(sound_irq_callback);
K033906_init();
+ backup_ram = auto_malloc(0x2000);
+ memcpy(backup_ram, backupdef, 0x2000);
timekeeper_init(0, TIMEKEEPER_M48T58, backup_ram);
ppc4xx_spu_set_tx_handler(0, jamma_jvs_w);
@@ -1243,185 +1257,191 @@ static void init_hornet_2board(running_machine *machine)
static DRIVER_INIT(gradius4)
{
+ UINT8 backupdef[0x2000] = { 0 };
+
/* RTC data */
- backup_ram[0x00] = 0x47; // 'G'
- backup_ram[0x01] = 0x58; // 'X'
- backup_ram[0x02] = 0x38; // '8'
- backup_ram[0x03] = 0x33; // '3'
- backup_ram[0x04] = 0x37; // '7'
- backup_ram[0x05] = 0x00; //
- backup_ram[0x06] = 0x11; //
- backup_ram[0x07] = 0x06; // 06 / 11
- backup_ram[0x08] = 0x19; //
- backup_ram[0x09] = 0x98; // 1998
- backup_ram[0x0a] = 0x4a; // 'J'
- backup_ram[0x0b] = 0x41; // 'A'
- backup_ram[0x0c] = 0x43; // 'C'
- backup_ram[0x0d] = 0x00; //
- backup_ram[0x0e] = 0x02; // checksum
- backup_ram[0x0f] = 0xd7; // checksum
-
- init_hornet(machine);
+ backupdef[0x00] = 0x47; // 'G'
+ backupdef[0x01] = 0x58; // 'X'
+ backupdef[0x02] = 0x38; // '8'
+ backupdef[0x03] = 0x33; // '3'
+ backupdef[0x04] = 0x37; // '7'
+ backupdef[0x05] = 0x00; //
+ backupdef[0x06] = 0x11; //
+ backupdef[0x07] = 0x06; // 06 / 11
+ backupdef[0x08] = 0x19; //
+ backupdef[0x09] = 0x98; // 1998
+ backupdef[0x0a] = 0x4a; // 'J'
+ backupdef[0x0b] = 0x41; // 'A'
+ backupdef[0x0c] = 0x43; // 'C'
+ backupdef[0x0d] = 0x00; //
+ backupdef[0x0e] = 0x02; // checksum
+ backupdef[0x0f] = 0xd7; // checksum
+
+ init_hornet(machine, backupdef);
}
static DRIVER_INIT(nbapbp)
{
+ UINT8 backupdef[0x2000] = { 0 };
int i;
UINT16 checksum;
/* RTC data */
- backup_ram[0x00] = 0x47; // 'G'
- backup_ram[0x01] = 0x58; // 'X'
- backup_ram[0x02] = 0x37; // '7'
- backup_ram[0x03] = 0x37; // '7'
- backup_ram[0x04] = 0x38; // '8'
- backup_ram[0x05] = 0x00; //
- backup_ram[0x06] = 0x00; //
- backup_ram[0x07] = 0x00; //
- backup_ram[0x08] = 0x19; //
- backup_ram[0x09] = 0x98; // 1998
- backup_ram[0x0a] = 0x4a; // 'J'
- backup_ram[0x0b] = 0x41; // 'A'
- backup_ram[0x0c] = 0x41; // 'A'
- backup_ram[0x0d] = 0x00; //
+ backupdef[0x00] = 0x47; // 'G'
+ backupdef[0x01] = 0x58; // 'X'
+ backupdef[0x02] = 0x37; // '7'
+ backupdef[0x03] = 0x37; // '7'
+ backupdef[0x04] = 0x38; // '8'
+ backupdef[0x05] = 0x00; //
+ backupdef[0x06] = 0x00; //
+ backupdef[0x07] = 0x00; //
+ backupdef[0x08] = 0x19; //
+ backupdef[0x09] = 0x98; // 1998
+ backupdef[0x0a] = 0x4a; // 'J'
+ backupdef[0x0b] = 0x41; // 'A'
+ backupdef[0x0c] = 0x41; // 'A'
+ backupdef[0x0d] = 0x00; //
checksum = 0;
for (i=0; i < 14; i++)
{
- checksum += backup_ram[i];
+ checksum += backupdef[i];
checksum &= 0xffff;
}
- backup_ram[0x0e] = (checksum >> 8) & 0xff; // checksum
- backup_ram[0x0f] = (checksum >> 0) & 0xff; // checksum
+ backupdef[0x0e] = (checksum >> 8) & 0xff; // checksum
+ backupdef[0x0f] = (checksum >> 0) & 0xff; // checksum
- init_hornet(machine);
+ init_hornet(machine, backupdef);
}
static DRIVER_INIT(terabrst)
{
+ UINT8 backupdef[0x2000] = { 0 };
int i;
UINT16 checksum;
/* RTC data */
- backup_ram[0x00] = 0x47; // 'G'
- backup_ram[0x01] = 0x4e; // 'N'
- backup_ram[0x02] = 0x37; // '7'
- backup_ram[0x03] = 0x31; // '1'
- backup_ram[0x04] = 0x35; // '5'
- backup_ram[0x05] = 0x00; //
- backup_ram[0x06] = 0x00; //
- backup_ram[0x07] = 0x00; //
- backup_ram[0x08] = 0x19; //
- backup_ram[0x09] = 0x98; // 1998
- backup_ram[0x0a] = 0x41; // 'J'
- backup_ram[0x0b] = 0x41; // 'A'
- backup_ram[0x0c] = 0x45; // 'E'
- backup_ram[0x0d] = 0x00; //
+ backupdef[0x00] = 0x47; // 'G'
+ backupdef[0x01] = 0x4e; // 'N'
+ backupdef[0x02] = 0x37; // '7'
+ backupdef[0x03] = 0x31; // '1'
+ backupdef[0x04] = 0x35; // '5'
+ backupdef[0x05] = 0x00; //
+ backupdef[0x06] = 0x00; //
+ backupdef[0x07] = 0x00; //
+ backupdef[0x08] = 0x19; //
+ backupdef[0x09] = 0x98; // 1998
+ backupdef[0x0a] = 0x41; // 'J'
+ backupdef[0x0b] = 0x41; // 'A'
+ backupdef[0x0c] = 0x45; // 'E'
+ backupdef[0x0d] = 0x00; //
checksum = 0;
for (i=0; i < 14; i+=2)
{
- checksum += (backup_ram[i] << 8) | (backup_ram[i+1]);
+ checksum += (backupdef[i] << 8) | (backupdef[i+1]);
}
checksum = ~checksum - 0;
- backup_ram[0x0e] = (checksum >> 8) & 0xff; // checksum
- backup_ram[0x0f] = (checksum >> 0) & 0xff; // checksum
+ backupdef[0x0e] = (checksum >> 8) & 0xff; // checksum
+ backupdef[0x0f] = (checksum >> 0) & 0xff; // checksum
- init_hornet_2board(machine);
+ init_hornet_2board(machine, backupdef);
}
static DRIVER_INIT(sscope)
{
+ UINT8 backupdef[0x2000] = { 0 };
int i;
UINT16 checksum;
/* RTC data */
- backup_ram[0x00] = 0x47; // 'G'
- backup_ram[0x01] = 0x51; // 'Q'
- backup_ram[0x02] = 0x38; // '8'
- backup_ram[0x03] = 0x33; // '3'
- backup_ram[0x04] = 0x30; // '0'
- backup_ram[0x05] = 0x00; //
- backup_ram[0x06] = 0x00; //
- backup_ram[0x07] = 0x00; //
- backup_ram[0x08] = 0x20; //
- backup_ram[0x09] = 0x00; // 2000
- backup_ram[0x0a] = 0x55; // 'U'
- backup_ram[0x0b] = 0x41; // 'A'
- backup_ram[0x0c] = 0x41; // 'A'
- backup_ram[0x0d] = 0x00; //
+ backupdef[0x00] = 0x47; // 'G'
+ backupdef[0x01] = 0x51; // 'Q'
+ backupdef[0x02] = 0x38; // '8'
+ backupdef[0x03] = 0x33; // '3'
+ backupdef[0x04] = 0x30; // '0'
+ backupdef[0x05] = 0x00; //
+ backupdef[0x06] = 0x00; //
+ backupdef[0x07] = 0x00; //
+ backupdef[0x08] = 0x20; //
+ backupdef[0x09] = 0x00; // 2000
+ backupdef[0x0a] = 0x55; // 'U'
+ backupdef[0x0b] = 0x41; // 'A'
+ backupdef[0x0c] = 0x41; // 'A'
+ backupdef[0x0d] = 0x00; //
checksum = 0;
for (i=0; i < 14; i+=2)
{
- checksum += (backup_ram[i] << 8) | (backup_ram[i+1]);
+ checksum += (backupdef[i] << 8) | (backupdef[i+1]);
}
checksum = ~checksum - 1;
- backup_ram[0x0e] = (checksum >> 8) & 0xff; // checksum
- backup_ram[0x0f] = (checksum >> 0) & 0xff; // checksum
+ backupdef[0x0e] = (checksum >> 8) & 0xff; // checksum
+ backupdef[0x0f] = (checksum >> 0) & 0xff; // checksum
- init_hornet_2board(machine);
+ init_hornet_2board(machine, backupdef);
}
static DRIVER_INIT(sscope2)
{
+ UINT8 backupdef[0x2000] = { 0 };
int i;
int checksum;
/* RTC data */
- backup_ram[0x00] = 0x47; // 'G'
- backup_ram[0x01] = 0x4b; // 'K'
- backup_ram[0x02] = 0x39; // '9'
- backup_ram[0x03] = 0x33; // '3'
- backup_ram[0x04] = 0x31; // '1'
- backup_ram[0x05] = 0x00; //
- backup_ram[0x06] = 0x00; //
- backup_ram[0x07] = 0x00; //
- backup_ram[0x08] = 0x20; //
- backup_ram[0x09] = 0x00; // 2000
- backup_ram[0x0a] = 0x55; // 'U'
- backup_ram[0x0b] = 0x41; // 'A'
- backup_ram[0x0c] = 0x41; // 'A'
- backup_ram[0x0d] = 0x00; //
+ backupdef[0x00] = 0x47; // 'G'
+ backupdef[0x01] = 0x4b; // 'K'
+ backupdef[0x02] = 0x39; // '9'
+ backupdef[0x03] = 0x33; // '3'
+ backupdef[0x04] = 0x31; // '1'
+ backupdef[0x05] = 0x00; //
+ backupdef[0x06] = 0x00; //
+ backupdef[0x07] = 0x00; //
+ backupdef[0x08] = 0x20; //
+ backupdef[0x09] = 0x00; // 2000
+ backupdef[0x0a] = 0x55; // 'U'
+ backupdef[0x0b] = 0x41; // 'A'
+ backupdef[0x0c] = 0x41; // 'A'
+ backupdef[0x0d] = 0x00; //
checksum = 0;
for (i=0; i < 14; i+=2)
{
- checksum += (backup_ram[i] << 8) | (backup_ram[i+1]);
+ checksum += (backupdef[i] << 8) | (backupdef[i+1]);
checksum &= 0xffff;
}
checksum = (-1 - checksum) - 1;
- backup_ram[0x0e] = (checksum >> 8) & 0xff; // checksum
- backup_ram[0x0f] = (checksum >> 0) & 0xff; // checksum
+ backupdef[0x0e] = (checksum >> 8) & 0xff; // checksum
+ backupdef[0x0f] = (checksum >> 0) & 0xff; // checksum
/* Silent Scope data */
- backup_ram[0x1f40] = 0x47; // 'G'
- backup_ram[0x1f41] = 0x4b; // 'Q'
- backup_ram[0x1f42] = 0x38; // '8'
- backup_ram[0x1f43] = 0x33; // '3'
- backup_ram[0x1f44] = 0x30; // '0'
- backup_ram[0x1f45] = 0x00; //
- backup_ram[0x1f46] = 0x00; //
- backup_ram[0x1f47] = 0x00; //
- backup_ram[0x1f48] = 0x20; //
- backup_ram[0x1f49] = 0x00; // 2000
- backup_ram[0x1f4a] = 0x55; // 'U'
- backup_ram[0x1f4b] = 0x41; // 'A'
- backup_ram[0x1f4c] = 0x41; // 'A'
- backup_ram[0x1f4d] = 0x00; //
+ backupdef[0x1f40] = 0x47; // 'G'
+ backupdef[0x1f41] = 0x4b; // 'Q'
+ backupdef[0x1f42] = 0x38; // '8'
+ backupdef[0x1f43] = 0x33; // '3'
+ backupdef[0x1f44] = 0x30; // '0'
+ backupdef[0x1f45] = 0x00; //
+ backupdef[0x1f46] = 0x00; //
+ backupdef[0x1f47] = 0x00; //
+ backupdef[0x1f48] = 0x20; //
+ backupdef[0x1f49] = 0x00; // 2000
+ backupdef[0x1f4a] = 0x55; // 'U'
+ backupdef[0x1f4b] = 0x41; // 'A'
+ backupdef[0x1f4c] = 0x41; // 'A'
+ backupdef[0x1f4d] = 0x00; //
checksum = 0;
for (i=0x1f40; i < 0x1f4e; i+=2)
{
- checksum += (backup_ram[i] << 8) | (backup_ram[i+1]);
+ checksum += (backupdef[i] << 8) | (backupdef[i+1]);
checksum &= 0xffff;
}
checksum = (-1 - checksum) - 1;
- backup_ram[0x1f4e] = (checksum >> 8) & 0xff; // checksum
- backup_ram[0x1f4f] = (checksum >> 0) & 0xff; // checksum
+ backupdef[0x1f4e] = (checksum >> 8) & 0xff; // checksum
+ backupdef[0x1f4f] = (checksum >> 0) & 0xff; // checksum
- init_hornet_2board(machine);
+ init_hornet_2board(machine, backupdef);
}
/*****************************************************************************/
@@ -1561,9 +1581,9 @@ ROM_END
/*************************************************************************/
-GAME( 1998, gradius4, 0, hornet, hornet, gradius4, ROT0, "Konami", "Gradius 4: Fukkatsu", GAME_IMPERFECT_SOUND )
-GAME( 1998, nbapbp, 0, hornet, hornet, nbapbp, ROT0, "Konami", "NBA Play By Play", GAME_IMPERFECT_SOUND )
-GAMEL( 1998, terabrst, 0, hornet_2board, hornet, terabrst, ROT0, "Konami", "Teraburst", GAME_IMPERFECT_SOUND, layout_dualhsxs )
-GAMEL( 2000, sscope, 0, hornet_2board, sscope, sscope, ROT0, "Konami", "Silent Scope (ver UAB)", GAME_IMPERFECT_SOUND|GAME_NOT_WORKING, layout_dualhsxs )
-GAMEL( 2000, sscopea, sscope, hornet_2board, sscope, sscope, ROT0, "Konami", "Silent Scope (ver UAA)", GAME_IMPERFECT_SOUND|GAME_NOT_WORKING, layout_dualhsxs )
-GAMEL( 2000, sscope2, 0, hornet_2board_v2, sscope, sscope2, ROT0, "Konami", "Silent Scope 2", GAME_IMPERFECT_SOUND|GAME_NOT_WORKING, layout_dualhsxs )
+GAME( 1998, gradius4, 0, hornet, hornet, gradius4, ROT0, "Konami", "Gradius 4: Fukkatsu", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
+GAME( 1998, nbapbp, 0, hornet, hornet, nbapbp, ROT0, "Konami", "NBA Play By Play", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
+GAMEL( 1998, terabrst, 0, hornet_2board, hornet, terabrst, ROT0, "Konami", "Teraburst", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE, layout_dualhsxs )
+GAMEL( 2000, sscope, 0, hornet_2board, sscope, sscope, ROT0, "Konami", "Silent Scope (ver UAB)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE, layout_dualhsxs )
+GAMEL( 2000, sscopea, sscope, hornet_2board, sscope, sscope, ROT0, "Konami", "Silent Scope (ver UAA)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE, layout_dualhsxs )
+GAMEL( 2000, sscope2, 0, hornet_2board_v2, sscope, sscope2, ROT0, "Konami", "Silent Scope 2", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE, layout_dualhsxs )
diff --git a/src/mame/machine/konamiic.c b/src/mame/machine/konamiic.c
index 6335936f88c..3688e618117 100644
--- a/src/mame/machine/konamiic.c
+++ b/src/mame/machine/konamiic.c
@@ -7,7 +7,7 @@ static UINT8 K056800_host_reg[8];
static UINT8 K056800_sound_reg[8];
static emu_timer *K056800_sound_cpu_timer;
-static int K056800_sound_cpu_irq1_enable;
+static UINT8 K056800_sound_cpu_irq1_enable;
static void (*K056800_sound_irq_callback)(running_machine *, int);
static UINT8 K056800_host_reg_r(int reg)
@@ -65,6 +65,10 @@ void K056800_init(void (* irq_callback)(running_machine *, int))
K056800_sound_cpu_timer = timer_alloc(K056800_sound_cpu_timer_tick, NULL);
timer_adjust_periodic(K056800_sound_cpu_timer, timer_period, 0, timer_period);
+
+ state_save_register_item_array("K056800", 0, K056800_host_reg);
+ state_save_register_item_array("K056800", 0, K056800_sound_reg);
+ state_save_register_item("K056800", 0, K056800_sound_cpu_irq1_enable);
}
READ32_HANDLER(K056800_host_r)
diff --git a/src/mame/machine/konppc.c b/src/mame/machine/konppc.c
index abc1030c14a..91e2492619f 100644
--- a/src/mame/machine/konppc.c
+++ b/src/mame/machine/konppc.c
@@ -9,11 +9,11 @@
static UINT32 dsp_comm_ppc[MAX_CG_BOARDS][2];
static UINT32 dsp_comm_sharc[MAX_CG_BOARDS][2];
-static int dsp_shared_ram_bank[MAX_CG_BOARDS];
+static UINT8 dsp_shared_ram_bank[MAX_CG_BOARDS];
-static int cgboard_id;
-static int cgboard_type;
-static int num_cgboards;
+static INT32 cgboard_id;
+static INT32 cgboard_type;
+static INT32 num_cgboards;
static UINT32 *dsp_shared_ram[MAX_CG_BOARDS];
@@ -23,7 +23,7 @@ static UINT32 *dsp_shared_ram[MAX_CG_BOARDS];
static UINT32 dsp_state[MAX_CG_BOARDS];
static UINT32 pci_bridge_enable[MAX_CG_BOARDS];
static UINT32 nwk_device_sel[MAX_CG_BOARDS];
-static int texture_bank[MAX_CG_BOARDS];
+static INT32 texture_bank[MAX_CG_BOARDS];
static int nwk_fifo_half_full_r;
static int nwk_fifo_half_full_w;
@@ -32,8 +32,8 @@ static int nwk_fifo_mask;
static UINT32 *nwk_fifo[MAX_CG_BOARDS];
-static int nwk_fifo_read_ptr[MAX_CG_BOARDS];
-static int nwk_fifo_write_ptr[MAX_CG_BOARDS];
+static INT32 nwk_fifo_read_ptr[MAX_CG_BOARDS];
+static INT32 nwk_fifo_write_ptr[MAX_CG_BOARDS];
static UINT32 *nwk_ram[MAX_CG_BOARDS];
@@ -60,7 +60,21 @@ void init_konami_cgboard(int num_boards, int type)
nwk_fifo[i] = auto_malloc(sizeof(UINT32) * 0x800);
nwk_ram[i] = auto_malloc(sizeof(UINT32) * 0x2000);
- }
+
+ state_save_register_item_array("konppc", i, dsp_comm_ppc[i]);
+ state_save_register_item_array("konppc", i, dsp_comm_sharc[i]);
+ state_save_register_item("konppc", i, dsp_shared_ram_bank[i]);
+ state_save_register_item_pointer("konppc", i, dsp_shared_ram[i], DSP_BANK_SIZE * 2 / sizeof(dsp_shared_ram[i][0]));
+ state_save_register_item("konppc", i, dsp_state[i]);
+ state_save_register_item("konppc", i, texture_bank[i]);
+ state_save_register_item("konppc", i, pci_bridge_enable[i]);
+ state_save_register_item("konppc", i, nwk_device_sel[i]);
+ state_save_register_item("konppc", i, nwk_fifo_read_ptr[i]);
+ state_save_register_item("konppc", i, nwk_fifo_write_ptr[i]);
+ state_save_register_item_pointer("konppc", i, nwk_fifo[i], 0x800);
+ state_save_register_item_pointer("konppc", i, nwk_ram[i], 0x2000);
+ }
+ state_save_register_item("konppc", 0, cgboard_id);
cgboard_type = type;
if (type == CGBOARD_TYPE_NWKTR)
@@ -417,6 +431,8 @@ void K033906_init(void)
{
K033906_reg[i] = auto_malloc(sizeof(UINT32) * 256);
K033906_ram[i] = auto_malloc(sizeof(UINT32) * 32768);
+ state_save_register_item_pointer("K033906", i, K033906_reg[i], 256);
+ state_save_register_item_pointer("K033906", i, K033906_ram[i], 32768);
}
}