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author Aaron Giles <aaron@aarongiles.com>2008-06-25 15:02:07 +0000
committer Aaron Giles <aaron@aarongiles.com>2008-06-25 15:02:07 +0000
commit25abe2749dfe852ea26d09dac07311b271ea6702 (patch)
tree598e4571ae26e7a05175ef62fc95826500992440
parent058462cb9cfd48c3f51da1e0299532450c4b97a8 (diff)
Hornet driver:
- connected EEPROM (doesn't seem to affect much) - cleaned up system register access GTI Club driver: - altered network IRQ clear to fix several problems - added Guru readme - fixed crashes due to missing inputs - gticlub "works" again ZR107 driver: - added Guru readme - cleaned up system register access - these games work again with altered network IRQ timing NWK-TR driver: - added Guru readme DRC frontend: - now passes pointer to previous instruction when describing PPC frontend: - attempts to roughly take into account branch and CR logical folding in timing computations
-rw-r--r--src/emu/cpu/drcfe.c10
-rw-r--r--src/emu/cpu/drcfe.h2
-rw-r--r--src/emu/cpu/mips/mips3fe.c2
-rw-r--r--src/emu/cpu/mips/mips3fe.h2
-rw-r--r--src/emu/cpu/powerpc/ppcfe.c39
-rw-r--r--src/emu/cpu/powerpc/ppcfe.h2
-rw-r--r--src/mame/drivers/gticlub.c202
-rw-r--r--src/mame/drivers/hornet.c112
-rw-r--r--src/mame/drivers/nwk-tr.c183
-rw-r--r--src/mame/drivers/zr107.c304
10 files changed, 750 insertions, 108 deletions
diff --git a/src/emu/cpu/drcfe.c b/src/emu/cpu/drcfe.c
index 1e2a68021cd..f625d4f6ec6 100644
--- a/src/emu/cpu/drcfe.c
+++ b/src/emu/cpu/drcfe.c
@@ -72,7 +72,7 @@ struct _drcfe_state
FUNCTION PROTOTYPES
***************************************************************************/
-static opcode_desc *describe_one(drcfe_state *drcfe, offs_t curpc);
+static opcode_desc *describe_one(drcfe_state *drcfe, offs_t curpc, const opcode_desc *prevdesc);
static opcode_desc **build_sequence(drcfe_state *drcfe, opcode_desc **tailptr, int start, int end, UINT32 endflag);
static void accumulate_required_backwards(opcode_desc *desc, UINT32 *reqmask);
static void release_descriptions(drcfe_state *drcfe, opcode_desc *desc);
@@ -228,7 +228,7 @@ const opcode_desc *drcfe_describe_code(drcfe_state *drcfe, offs_t startpc)
for (curpc = curstack->targetpc; curpc >= minpc && curpc < maxpc && drcfe->desc_array[curpc - minpc] == NULL; curpc += drcfe->desc_array[curpc - minpc]->length)
{
/* allocate a new description and describe this instruction */
- drcfe->desc_array[curpc - minpc] = curdesc = describe_one(drcfe, curpc);
+ drcfe->desc_array[curpc - minpc] = curdesc = describe_one(drcfe, curpc, curdesc);
/* first instruction in a sequence is always a branch target */
if (curpc == curstack->targetpc)
@@ -276,7 +276,7 @@ const opcode_desc *drcfe_describe_code(drcfe_state *drcfe, offs_t startpc)
slots of branches as well
-------------------------------------------------*/
-static opcode_desc *describe_one(drcfe_state *drcfe, offs_t curpc)
+static opcode_desc *describe_one(drcfe_state *drcfe, offs_t curpc, const opcode_desc *prevdesc)
{
opcode_desc *desc = desc_alloc(drcfe);
@@ -307,7 +307,7 @@ static opcode_desc *describe_one(drcfe_state *drcfe, offs_t curpc)
}
/* call the callback to describe an instruction */
- if (!(*drcfe->describe)(drcfe->param, desc))
+ if (!(*drcfe->describe)(drcfe->param, desc, prevdesc))
{
desc->flags |= OPFLAG_WILL_CAUSE_EXCEPTION | OPFLAG_INVALID_OPCODE;
return desc;
@@ -332,7 +332,7 @@ static opcode_desc *describe_one(drcfe_state *drcfe, offs_t curpc)
for (slotnum = 0; slotnum < desc->delayslots; slotnum++)
{
/* recursively describe the next instruction */
- *tailptr = describe_one(drcfe, delaypc);
+ *tailptr = describe_one(drcfe, delaypc, prev);
if (*tailptr == NULL)
break;
diff --git a/src/emu/cpu/drcfe.h b/src/emu/cpu/drcfe.h
index abed7d3e3c4..201e2a3ff2c 100644
--- a/src/emu/cpu/drcfe.h
+++ b/src/emu/cpu/drcfe.h
@@ -128,7 +128,7 @@ struct _opcode_desc
/* callback function that is used to describe a single opcode */
-typedef int (*drcfe_describe_func)(void *param, opcode_desc *desc);
+typedef int (*drcfe_describe_func)(void *param, opcode_desc *desc, const opcode_desc *prev);
/* description of a given opcode */
diff --git a/src/emu/cpu/mips/mips3fe.c b/src/emu/cpu/mips/mips3fe.c
index 4fd7ccf1295..7b31d8aa3e0 100644
--- a/src/emu/cpu/mips/mips3fe.c
+++ b/src/emu/cpu/mips/mips3fe.c
@@ -39,7 +39,7 @@ static int describe_instruction_cop2(mips3_state *mips, UINT32 op, opcode_desc *
of a single instruction
-------------------------------------------------*/
-int mips3fe_describe(void *param, opcode_desc *desc)
+int mips3fe_describe(void *param, opcode_desc *desc, const opcode_desc *prev)
{
mips3_state *mips = param;
UINT32 op = *desc->opptr.l;
diff --git a/src/emu/cpu/mips/mips3fe.h b/src/emu/cpu/mips/mips3fe.h
index db366e65888..4a8f1030bab 100644
--- a/src/emu/cpu/mips/mips3fe.h
+++ b/src/emu/cpu/mips/mips3fe.h
@@ -37,6 +37,6 @@
FUNCTION PROTOTYPES
***************************************************************************/
-int mips3fe_describe(void *param, opcode_desc *desc);
+int mips3fe_describe(void *param, opcode_desc *desc, const opcode_desc *prev);
#endif
diff --git a/src/emu/cpu/powerpc/ppcfe.c b/src/emu/cpu/powerpc/ppcfe.c
index 550a2810fbe..d735310db92 100644
--- a/src/emu/cpu/powerpc/ppcfe.c
+++ b/src/emu/cpu/powerpc/ppcfe.c
@@ -55,10 +55,10 @@
FUNCTION PROTOTYPES
***************************************************************************/
-static int describe_instruction_13(powerpc_state *ppc, UINT32 op, opcode_desc *desc);
-static int describe_instruction_1f(powerpc_state *ppc, UINT32 op, opcode_desc *desc);
-static int describe_instruction_3b(powerpc_state *ppc, UINT32 op, opcode_desc *desc);
-static int describe_instruction_3f(powerpc_state *ppc, UINT32 op, opcode_desc *desc);
+static int describe_instruction_13(powerpc_state *ppc, UINT32 op, opcode_desc *desc, const opcode_desc *prev);
+static int describe_instruction_1f(powerpc_state *ppc, UINT32 op, opcode_desc *desc, const opcode_desc *prev);
+static int describe_instruction_3b(powerpc_state *ppc, UINT32 op, opcode_desc *desc, const opcode_desc *prev);
+static int describe_instruction_3f(powerpc_state *ppc, UINT32 op, opcode_desc *desc, const opcode_desc *prev);
@@ -117,7 +117,7 @@ INLINE int is_603_class(const powerpc_state *ppc)
of a single instruction
-------------------------------------------------*/
-int ppcfe_describe(void *param, opcode_desc *desc)
+int ppcfe_describe(void *param, opcode_desc *desc, const opcode_desc *prev)
{
powerpc_state *ppc = param;
UINT32 op = *desc->opptr.l;
@@ -187,7 +187,12 @@ int ppcfe_describe(void *param, opcode_desc *desc)
case 0x10: /* BCx */
if (!(G_BO(op) & 0x10))
+ {
CR_BIT_USED(desc, G_BI(op));
+ /* branch folding */
+ if (prev == NULL || prev->regout[2] == 0)
+ desc->cycles = 0;
+ }
if (!(G_BO(op) & 0x04))
{
CTR_USED(desc);
@@ -219,10 +224,12 @@ int ppcfe_describe(void *param, opcode_desc *desc)
LR_MODIFIED(desc);
desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc->targetpc = ((INT32)(G_LI(op) << 8) >> 6) + ((op & M_AA) ? 0 : desc->pc);
+ /* branch folding */
+ desc->cycles = 0;
return TRUE;
case 0x13: /* 0x13 group */
- return describe_instruction_13(ppc, op, desc);
+ return describe_instruction_13(ppc, op, desc, prev);
case 0x14: /* RLWIMIx */
GPR_USED(desc, G_RS(op));
@@ -273,7 +280,7 @@ int ppcfe_describe(void *param, opcode_desc *desc)
return TRUE;
case 0x1f: /* 0x1f group */
- return describe_instruction_1f(ppc, op, desc);
+ return describe_instruction_1f(ppc, op, desc, prev);
case 0x20: /* LWZ */
case 0x22: /* LBZ */
@@ -374,10 +381,10 @@ int ppcfe_describe(void *param, opcode_desc *desc)
return TRUE;
case 0x3b: /* 0x3b group */
- return describe_instruction_3b(ppc, op, desc);
+ return describe_instruction_3b(ppc, op, desc, prev);
case 0x3f: /* 0x3f group */
- return describe_instruction_3f(ppc, op, desc);
+ return describe_instruction_3f(ppc, op, desc, prev);
}
return FALSE;
@@ -390,7 +397,7 @@ int ppcfe_describe(void *param, opcode_desc *desc)
0x13 group
-------------------------------------------------*/
-static int describe_instruction_13(powerpc_state *ppc, UINT32 op, opcode_desc *desc)
+static int describe_instruction_13(powerpc_state *ppc, UINT32 op, opcode_desc *desc, const opcode_desc *prev)
{
UINT32 opswitch = (op >> 1) & 0x3ff;
@@ -399,6 +406,9 @@ static int describe_instruction_13(powerpc_state *ppc, UINT32 op, opcode_desc *d
case 0x000: /* MTCRF */
CR_USED(desc, G_CRFS(op));
CR_MODIFIED(desc, G_CRFD(op));
+ /* CR logical folding */
+ if (prev == NULL || prev->regout[2] == 0)
+ desc->cycles = 0;
return TRUE;
case 0x010: /* BCLRx */
@@ -430,6 +440,9 @@ static int describe_instruction_13(powerpc_state *ppc, UINT32 op, opcode_desc *d
CR_BIT_USED(desc, G_CRBA(op));
CR_BIT_USED(desc, G_CRBB(op));
CR_BIT_MODIFIED(desc, G_CRBD(op));
+ /* CR logical folding */
+ if (prev == NULL || prev->regout[2] == 0)
+ desc->cycles = 0;
return TRUE;
case 0x032: /* RFI */
@@ -485,7 +498,7 @@ static int describe_instruction_13(powerpc_state *ppc, UINT32 op, opcode_desc *d
0x1f group
-------------------------------------------------*/
-static int describe_instruction_1f(powerpc_state *ppc, UINT32 op, opcode_desc *desc)
+static int describe_instruction_1f(powerpc_state *ppc, UINT32 op, opcode_desc *desc, const opcode_desc *prev)
{
UINT32 opswitch = (op >> 1) & 0x3ff;
int spr, regnum;
@@ -1177,7 +1190,7 @@ static int describe_instruction_1f(powerpc_state *ppc, UINT32 op, opcode_desc *d
0x3b group
-------------------------------------------------*/
-static int describe_instruction_3b(powerpc_state *ppc, UINT32 op, opcode_desc *desc)
+static int describe_instruction_3b(powerpc_state *ppc, UINT32 op, opcode_desc *desc, const opcode_desc *prev)
{
UINT32 opswitch = (op >> 1) & 0x1f;
@@ -1241,7 +1254,7 @@ static int describe_instruction_3b(powerpc_state *ppc, UINT32 op, opcode_desc *d
0x3f group
-------------------------------------------------*/
-static int describe_instruction_3f(powerpc_state *ppc, UINT32 op, opcode_desc *desc)
+static int describe_instruction_3f(powerpc_state *ppc, UINT32 op, opcode_desc *desc, const opcode_desc *prev)
{
UINT32 opswitch = (op >> 1) & 0x3ff;
diff --git a/src/emu/cpu/powerpc/ppcfe.h b/src/emu/cpu/powerpc/ppcfe.h
index 1799dcf6542..d6a46e5dc8e 100644
--- a/src/emu/cpu/powerpc/ppcfe.h
+++ b/src/emu/cpu/powerpc/ppcfe.h
@@ -46,6 +46,6 @@
FUNCTION PROTOTYPES
***************************************************************************/
-int ppcfe_describe(void *param, opcode_desc *desc);
+int ppcfe_describe(void *param, opcode_desc *desc, const opcode_desc *prev);
#endif
diff --git a/src/mame/drivers/gticlub.c b/src/mame/drivers/gticlub.c
index 06ff7517987..7102dbf2b8d 100644
--- a/src/mame/drivers/gticlub.c
+++ b/src/mame/drivers/gticlub.c
@@ -32,6 +32,190 @@
Solar Assault | GX680 | GN672(A) | GN678(B) |
Hang Pilot | GN685 | ?? | 2x ?? | 3dfx-based CG boards
+
+
+Konami 'GTI Club' Hardware
+Konami, 1996-1998
+
+Known games on this hardware include....
+
+Game (C) Year
+-----------------------------------------
+GTI Club Konami 1996
+Jet Wave / Wave Shark Konami 1996 (video board only)
+Operation Thunder Hurricane Konami 1997
+Solar Assault Konami 1997
+Solar Assault : Revised Konami 1998
+
+
+PCB Layouts
+-----------
+
+Top Board
+
+GN672 PWB(A)3020088
+Konami 1996
+|--------------------------------------------------------------|
+| DRAM1M MASKROM.2S |
+|CN13 NJM5532 PAL(002616) |
+| SM5877 MASKROM.5S |
+| AN7395S NJM5532 |
+| RF5C400 MASKROM.7S |
+| |
+| 056800 SRAM256K MASKROM.9S |
+| 058232 SRAM256K |
+| RESET_SW EPROM.13K MASKROM.12U|
+|5 |
+|6 MASKROM.14U|
+|W TEST_SW 68EC000FN16 |
+|A EPROM.19R EPROM.19U|
+|Y EPROM.19R EPROM.19U|
+| 33.868MHz |
+| PAL(002248) |---------| |
+| PAL(002249) |PPC403GA | |
+| 93C56 | | |
+|LED PAL(002247) DRAM4MX16 | | |
+| |---------| |
+| 056230 DRAM4MX16 |
+|SRAM64K |
+| 64MHz MACH111 |
+|CN4 |
+| PAL(056787A) |
+|CN5 |
+|DSW(4) CN12 |
+|--------------------------------------------------------------|
+Notes:
+ DRAM1M - OKI M514256 1Mx4 DRAM (SOJ26/20)
+ SRAM64K - 8kx8 SRAM (DIP28)
+ SRAM256K - Fujitsu 84256 32kx8 SRAM (DIP28)
+ DRAM4MX16 - Hitachi HM514260 4Mx16 DRAM (SOJ42)
+ RF5C400 - Ricoh RF5C400 PCM 32Ch, 44.1 kHz Stereo, 3D Effect Spatializer, clock input 16.934MHz (33.868/2)
+ 056800 - Konami Custom (QFP80)
+ 056230 - Konami Custom (QFP80)
+ 058232 - Konami Custom Ceramic Package (SIL14, D/A filter?)
+ MACH111 - AMD MACH111 PLCC44 CPLD (stamped '002246')
+ 68EC000 - Motorola MC68EC000, running at 16.0MHz (64/4)
+ 93C56 - EEPROM (DIP8)
+ PPC403GA - IBM PowerPC 403GA CPU, clock input 32.0MHz (64/2) (QFP160)
+ SM5877AM - Nippon Precision Circuits 3rd Order 2-Channel D/A Converter (SOIC24)
+ NJM5532AN - Dual Low-Noise High-Speed Audio OP Amp (DIP8)
+ AN7395S - Panasonic AN7395S Spatializer Audio Processor IC for 3D surround (SOIC20)
+ CN4/5 - Network connectors
+ CN12 - DIN96 connector joining to lower PCB
+ CN13 - Audio OUT connector
+ LED - Alpha-numeric 7-segment LED
+
+ROM Usage
+---------
+ |--------------------------------------- ROM Locations --------------------------------------|
+Game 13K 2S 5S 7S 9S 12U 14U 19R 19U 21R 21U
+--------------------------------------------------------------------------------------------------------------------------
+GTI Club 688A07 688A12 688A11 688A10 688A09 688A06 688A05 688AAA04 688AAA02 688AAA03 688AAA01
+Jet Wave - see note -
+Hang Pilot 685A07 - - 685A10 685A09 685A06 685A05 685JAB04 685JAB02 685JAB03 685JAB01
+Operation Thunder Hurricane 680A07 680A12 680A11 680A10 680A09 680A06 680A05 680UAA04 680UAA02 680UAA03 680UAA01
+Solar Assault 792A07 792A12 792A11 792A10 792A09 792A06 792A05 792UAA04 792UAA02 792UAA03 792UAA01
+Solar Assault : Revised - N/A -
+
+Note : Jet Wave uses the lower board (GN678) from GTI Club, but it uses a different top board (ZR107 PWB(A)300769A)
+Check zr107.c for details on the top board.
+
+Operation Thunder Hurricane uses an additional top board for sound, network and analog
+control functions...
+
+GN680 PWB(E)403381B
+|------------------------------------------|
+|CN11 CN12 CN8 CN9 CN10 DSW(4)|
+| NRPS11 NRPS11 |
+| |
+| LM1881 LM1881 |
+| |
+|LED(x4) |
+| |
+| 68EC000FN16 8464 |
+| RESET_SW 8464 |
+|32MHz 680C22.20K|
+|8464 PAL(002962) |
+|CN4 056230 PAL(002961) |
+| PAL(056787A) PAL(002960) |
+|CN5 |
+|------------------------------------------|
+Notes:
+ 68000 @ 16MHz (32/2)
+ CN11/12 - Power connectors
+ CN8/9 - 6-pin analog control connectors
+ CN10 - 4-pin sound output connector
+ NRPS11 - Idec NRPS11 PC Board circuit protector
+ LM1881 - Video sync separator (DIP8)
+
+
+Bottom Board
+
+GN678 PWB(B)302009A
+Konami 1996
+|-------------------------------------------------------------------------------------------|
+|CN4 MASKROM.2D |--------| SDR4M16 SDR4M16 |--------| SDR4M16 SDR4M16 |
+| |KS10081 | |KS10081 | |
+| MASKROM.4D | | | | SDR4M16|
+| |--------| |----------| |--------| |----------| |
+|CN2 MASKROM.6D | KS10071 | SDR4M16 | KS10071 | |
+| | | | | |
+| MASKROM.9D | | SDR4M16 | | |
+| |----------| |----------| |
+| MASKROM.11D SDR4M16|
+| SDR4M16 SDR4M16 |
+| MASKROM.13D |
+| MC88916 |
+| MASKROM.16D PAL(002304) |
+| MC44200 PAL(002303) |
+| MASKROM.18D |
+| |
+| 36MHz |
+| AM7203 AM7203 AM7203 AM7203 |-------------| |
+| 256KSRAM 256KSRAM |ANALOG | |
+| |DEVICES | |
+| PAL(002305) 64KSRAM 64KSRAM 256KSRAM 256KSRAM |ADSP-21062 | |
+| |SHARC | |
+| |--------| MACH110 |KS-160X | |
+|1MSRAM |KONAMI | |-------------| |
+|1MSRAM |001604 | |
+|1MSRAM | | 1MSRAM 1MSRAM |
+|1MSRAM |--------| |
+|1MSRAM 256KSRAM 1MSRAM 1MSRAM |
+|1MSRAM 256KSRAM 256KSRAM CN1 |
+|-------------------------------------------------------------------------------------------|
+Notes:
+ SDR4M16 - Fujitsu 81141622-015 4M SDRAM (TSOP50)
+ 1MSRAM - Sharp LH521007 128kx8 SRAM (SOJ32)
+ 256KSRAM - Cypress CY7C199 32kx8 SRAM (SOJ28)
+ 64KSRAM - Cypress CY7C185 8kx8 SRAM (DIP28)
+ KS10071 - Konami Custom video chip
+ KS10081 - Konami Custom video chip
+ 001604 - Konami Custom (QFP208)
+ MC44200FT - Motorola MC44200FT 3 Channel Video D/A Converter (QFP44)
+ MACH110 - AMD MACH110 or MACH111 PLCC44 CPLD (Jet Wave stamped '002302')
+ (GTI Club stamped '003161')
+ (Thund.Hurr. stamped '003161')
+ AM7203 - AMD AM7203 FIFO (PLCC32)
+ MC88916 - Motorola MC88916 Low Skew CMOS PLL Clock Driver
+ CN1 - 96 Pin joining connector to upper PCB
+ CN2 - 8-Pin 24kHz RGB OUT
+ CN4 - 6-Pin Power Connector
+
+ROM Usage
+---------
+ |---------------------- ROM Locations -----------------------|
+Game 2D 4D 6D 9D 11D 13D 16D 18D
+------------------------------------------------------------------------------------------
+GTI Club - 688A16 - 688A15 - 688A14 - 688A13
+Jet Wave - 678A16 - 678A15 - 678A14 - 678A13
+Operation Thunder Hurricane - 680A16 - 680A15 - 680A14 - 680A13
+Solar Assault - 792A16 - 792A15 - 792A14 - 792A13
+Solar Assault : Revised - N/A -
+
+Hang Pilot (uses an unknown but similar video board) 12W 4W
+ - - - - - 678A14 - 678A13
+
*/
#include "driver.h"
@@ -368,7 +552,7 @@ WRITE8_HANDLER( K056230_w )
if (mame_stricmp(machine->gamedrv->name, "thunderh") != 0)
{
cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ2, ASSERT_LINE);
- timer_set(ATTOTIME_IN_USEC(1), NULL, 0, network_irq_clear);
+ timer_set(ATTOTIME_IN_USEC(10), NULL, 0, network_irq_clear);
}
}
// else
@@ -591,6 +775,11 @@ static INPUT_PORTS_START( slrasslt )
PORT_START_TAG("AN1")
PORT_BIT( 0x3ff, 0x000, IPT_AD_STICK_X ) PORT_MINMAX(0x000,0x3ff) PORT_SENSITIVITY(35) PORT_KEYDELTA(5) PORT_REVERSE
+ PORT_START_TAG("AN2")
+ PORT_BIT( 0x3ff, 0x000, IPT_UNUSED )
+
+ PORT_START_TAG("AN3")
+ PORT_BIT( 0x3ff, 0x000, IPT_UNUSED )
INPUT_PORTS_END
static INPUT_PORTS_START( thunderh )
@@ -672,6 +861,17 @@ static INPUT_PORTS_START( hangplt )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_START_TAG("AN0")
+ PORT_BIT( 0x3ff, 0x000, IPT_UNKNOWN )
+
+ PORT_START_TAG("AN1")
+ PORT_BIT( 0x3ff, 0x000, IPT_UNKNOWN )
+
+ PORT_START_TAG("AN2")
+ PORT_BIT( 0x3ff, 0x000, IPT_UNKNOWN )
+
+ PORT_START_TAG("AN3")
+ PORT_BIT( 0x3ff, 0x000, IPT_UNKNOWN )
INPUT_PORTS_END
/* PowerPC interrupts
diff --git a/src/mame/drivers/hornet.c b/src/mame/drivers/hornet.c
index 17e2f0166c3..c5e66c11824 100644
--- a/src/mame/drivers/hornet.c
+++ b/src/mame/drivers/hornet.c
@@ -310,6 +310,7 @@
#include "driver.h"
#include "cpu/powerpc/ppc.h"
#include "cpu/sharc/sharc.h"
+#include "machine/eeprom.h"
#include "machine/konppc.h"
#include "machine/konamiic.h"
#include "video/voodoo.h"
@@ -660,6 +661,7 @@ static VIDEO_UPDATE( hornet_2board )
}
/*****************************************************************************/
+
static READ8_HANDLER( sysreg_r )
{
UINT8 r = 0;
@@ -667,17 +669,26 @@ static READ8_HANDLER( sysreg_r )
switch (offset)
{
- case 0:
- case 1:
- case 2:
+ case 0: /* I/O port 0 */
+ case 1: /* I/O port 1 */
+ case 2: /* I/O port 2 */
r = input_port_read(machine, portnames[offset]);
break;
- case 3:
- r = 0xf7;
+ case 3: /* I/O port 3 */
+ /*
+ 0x80 = JVSINIT (JAMMA I/F SENSE)
+ 0x40 = COMMST
+ 0x20 = GSENSE
+ 0x08 = EEPDO (EEPROM DO)
+ 0x04 = ADEOC (ADC EOC)
+ 0x02 = ADDOR (ADC DOR)
+ 0x01 = ADDO (ADC DO)
+ */
+ r = 0xf7 | (eeprom_read_bit() << 3);
break;
- case 4:
+ case 4: /* I/O port 4 - DIP switches */
r = input_port_read(machine, "DSW");
break;
}
@@ -688,26 +699,91 @@ static WRITE8_HANDLER( sysreg_w )
{
switch (offset)
{
- case 0:
+ case 0: /* LED Register 0 */
led_reg0 = data;
break;
- case 1:
+ case 1: /* LED Register 1 */
led_reg1 = data;
break;
+
+ case 2: /* Parallel data register */
+ mame_printf_debug("Parallel data = %02X\n", data);
+ break;
+
+ case 3: /* System Register 0 */
+ /*
+ 0x80 = EEPWEN (EEPROM write enable)
+ 0x40 = EEPCS (EEPROM CS)
+ 0x20 = EEPSCL (EEPROM SCL?)
+ 0x10 = EEPDT (EEPROM data)
+ 0x08 = JVSTXEN / LAMP3 (something about JAMMA interface)
+ 0x04 = LAMP2
+ 0x02 = LAMP1
+ 0x01 = LAMP0
+ */
+ eeprom_write_bit((data & 0x10) ? 1 : 0);
+ eeprom_set_clock_line((data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
+ eeprom_set_cs_line((data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
+ mame_printf_debug("System register 0 = %02X\n", data);
+ break;
- case 7:
- if (data & 0x80) /* CG Board 1 IRQ Ack */
- cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ1, CLEAR_LINE);
+ case 4: /* System Register 1 */
+ /*
+ 0x80 = SNDRES (sound reset)
+ 0x40 = COMRES (COM reset)
+ 0x20 = COINRQ2 (EEPROM SCL?)
+ 0x10 = COINRQ1 (EEPROM data)
+ 0x08 = ADCS (ADC CS)
+ 0x04 = ADCONV (ADC CONV)
+ 0x02 = ADDI (ADC DI)
+ 0x01 = ADDSCLK (ADC SCLK)
+ */
+ cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
+ mame_printf_debug("System register 1 = %02X\n", data);
+ break;
+
+ case 5: /* Sound Control Register */
+ /*
+ 0x80 = MODE1
+ 0x40 = MUTE1
+ 0x20 = DEEN1
+ 0x10 = ATCK1
+ 0x08 = MODE0
+ 0x04 = MUTE0
+ 0x02 = DEEN0
+ 0x01 = ATCK0
+ */
+ mame_printf_debug("Sound control register = %02X\n", data);
+ break;
- if (data & 0x40) /* CG Board 0 IRQ Ack */
- cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ0, CLEAR_LINE);
+ case 6: /* WDT Register */
+ /*
+ 0x80 = WDTCLK
+ */
+ if (data & 0x80)
+ watchdog_reset(machine);
+ break;
- set_cgboard_id((data >> 4) & 0x3);
+ case 7: /* CG Control Register */
+ /*
+ 0x80 = EXRES1
+ 0x40 = EXRES0
+ 0x20 = EXID1
+ 0x10 = EXID0
+ 0x01 = EXRGB
+ */
+ if (data & 0x80)
+ cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ1, CLEAR_LINE);
+ if (data & 0x40)
+ cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ0, CLEAR_LINE);
+ set_cgboard_id((data >> 4) & 3);
break;
}
}
+/*****************************************************************************/
+
static WRITE32_HANDLER( comm1_w )
{
printf("comm1_w: %08X, %08X, %08X\n", offset, data, mem_mask);
@@ -960,6 +1036,12 @@ static MACHINE_RESET( hornet )
memory_set_bankptr(5, usr5);
}
+static NVRAM_HANDLER( hornet )
+{
+ NVRAM_HANDLER_CALL(timekeeper_0);
+ NVRAM_HANDLER_CALL(93C46);
+}
+
static MACHINE_DRIVER_START( hornet )
/* basic machine hardware */
@@ -978,7 +1060,7 @@ static MACHINE_DRIVER_START( hornet )
MDRV_MACHINE_START( hornet )
MDRV_MACHINE_RESET( hornet )
- MDRV_NVRAM_HANDLER( timekeeper_0 )
+ MDRV_NVRAM_HANDLER( hornet )
MDRV_3DFX_VOODOO_1_ADD("voodoo0", STD_VOODOO_1_CLOCK, 2, "main")
MDRV_3DFX_VOODOO_TMU_MEMORY(0, 4)
diff --git a/src/mame/drivers/nwk-tr.c b/src/mame/drivers/nwk-tr.c
index 275a67b1a58..a9caa12e905 100644
--- a/src/mame/drivers/nwk-tr.c
+++ b/src/mame/drivers/nwk-tr.c
@@ -27,6 +27,189 @@
Xilinx XC5210 FPGA
Xilinx XC5204 FPGA
+
+Konami 'NWK-TR' Hardware
+Konami, 1998-1999
+
+Known games on this hardware include....
+
+Game (C) Year
+---------------------------------------
+Racing Jam Konami 1998
+Racing Jam : Chapter 2 Konami 1999
+Thrill Drive Konami 1998
+
+PCB Layouts
+-----------
+
+Note, the top board is virtually identical to GN715 used on Hornet.
+Some extra RCA connectors have been added (for dual sound output), the LED and
+DIPSW are present on the main board (instead of on the filter board) and the
+SOIC8 chip (a secured PIC?) is not populated (the solder pads are there though).
+There's an extra sound IC AN7395S (it's not populated on Hornet).
+The PALs/PLDs are the same on NWK-TR and Hornet.
+
+
+Top Board
+GN676 PWB(A)B
+Konami 1997
+|--------------------------------------------------------------|
+| SP485CS CN10 CN11 7805 CN9 JP8 JP9 JP10 JP11|
+|CN19 7809 PAL1 |
+|CN21 JP13 PAL2 68EC000 EPROM.7S |
+| NE5532 PAL3 CN12|
+| JP12 JP16 DRM1M4SJ8 CN13|
+| NE5532 AN7395S MASKROM.9P MASKROM.9T |
+| SM5877 JP15 RF5C400 |
+|CN18 MASKROM.12P MASKROM.12T|
+| SM5877 16.9344MHz CN7|
+|CN14 SRAM256K MASKROM.14P MASKROM.14T|
+| |
+|CN16 SRAM256K MASKROM.16P MASKROM.16T|
+| ADC12138 |
+|CN15 056800 JP5 |
+| JP4 |
+|CN17 MACH111 JP3 |---------| |
+| TEST_SW EPROM.22P | | |
+|CN1 DRAM16X16 |PPC403GA | |
+| EPROM.25P | | |
+| | | |
+| DRAM16X16 EPROM.27P |---------| |
+| 4AK16 JP6|
+| |
+|CN3 |
+| PAL4 CN5 7.3728MHz|
+| 058232 |
+| 50.000MHz|
+|CN2 RESET_SW JP1 JP2 |
+|M48T58Y-70PC1 CN4 DSW(8) CN6 64.000MHz|
+|--------------------------------------------------------------|
+Notes:
+ DRM1M4SJ8 - Fujitsu 81C4256 256kx4 DRAM (SOJ24)
+ SRAM256K - Cypress CY7C199 32kx8 SRAM (SOJ28)
+ DRAM16X16 - Fujitsu 8118160A-60 16megx16 DRAM (SOJ42)
+ M48T58Y-70PC1 - ST Timekeeper RAM
+ RF5C400 - Ricoh RF5C400 PCM 32Ch, 44.1 kHz Stereo, 3D Effect Spatializer, clock input 16.9344MHz
+ 056800 - Konami Custom (QFP80)
+ 058232 - Konami Custom Ceramic Package (SIL14)
+ ADC12138 - National Semiconductor ADC12138 A/D Converter, 12-bit + Serial I/O With MUX (SOP28)
+ MACH111 - AMD MACH111 CPLD (Stamped 'N676A1', PLCC44)
+ 68EC000 - Motorola MC68EC000, running at 16.0MHz (64/4)
+ PPC403GA - IBM PowerPC 403GA CPU, clock input 32.0MHz (64/2) (QFP160)
+ SM5877AM - Nippon Precision Circuits 3rd Order 2-Channel D/A Converter (SOIC24)
+ 4AK16 - Hitachi 4AK16 Silicon N-Channel Power MOS FET Array (SIL10)
+ NE5532AN - Philips, Dual Low-Noise High-Speed Audio OP Amp (DIP8)
+ SP485CS - Sipex SP485CS Low Power Half Duplex RS485 Transceiver (DIP8)
+ AN7395S - Panasonic AM7395S Spatializer Audio Processor IC for 3D surround (SOIC20)
+ PAL1 - AMD PALCE16V8 (stamped 'N676A4', DIP20)
+ PAL2 - AMD PALCE16V8 (stamped 'N676A2', DIP20)
+ PAL3 - AMD PALCE16V8 (stamped 'N676A3', DIP20)
+ PAL4 - AMD PALCE16V8 (stamped 'N676A5', DIP20)
+ JP1 - 25M O O-O 32M
+ JP2 - 25M O O-O 32M
+ JP3 - RW O O O RO
+ JP4 - PROG 32M O O-O 16M
+ JP5 - DATA 32M O-O O 16M
+ JP6 - BOOT 16 O-O O 32
+ JP7 - SRC DOUT2 O O-O 0
+ JP8 - 64M&32M O-O O 16M
+ JP9 - 64M O O-O 32M&16M
+ JP10 - 64M&32M O-O O 16M
+ JP11 - 64M O O-O 32M&16M
+ JP12 - THRU O-O O SP
+ JP13 - THRU O-O O SP
+ JP14 - WDT O O
+ JP15 - MONO O-O O SURR
+ JP16 - HIGH O O O MID (N/C LOW)
+ CN1 THRU CN3 - D-SUB Connectors
+ CN4 - Multi-pin Connector for Network PCB
+ CN5 - DIN96 connector (pads only, not used)
+ CN6 - DIN96 joining connector to lower PCB
+ CN7 - Multi-pin connector (pads only, not used)
+ CN9 THRU CN13 - Power Connectors
+ CN14 THRU CN17 - RCA Stereo Audio OUT
+ CN18 - RCA Mono Audio OUT
+ CN19 - USB Connector
+
+
+ROM Usage
+---------
+ |------------------------------- ROM Locations -------------------------------------|
+Game 27P 25P 22P 16P 14P 12P 9P 16T 14T 12T 9T 7S
+--------------------------------------------------------------------------------------------------
+Racing Jam 676NC01 - - 676A09 676A10 - - 676A04 676A05 - - 676A08
+Racing Jam 2 888A01 - - 888A09 888A10 - - 676A04 676A05 888A06 - 888A08
+Thrill Drive 713BE01 - - 713A09 713A10 - - 713A04 713A05 - - 713A08
+
+
+Bottom Board
+GN676 PWB(B)B
+|-------------------------------------------------------------------------------------------|
+|CN4 CN2 CN8 CN6 CN5|
+|JP1 |---------| 4M_EDO 4M_EDO |
+| | | |----------| |
+| 4M_EDO 4M_EDO | TEXELFX | | | 4M_EDO MASKROM.8X |
+|CN3 | | | PIXELFX | MASKROM.8Y |
+| 4M_EDO 4M_EDO | | | | |
+| |---------| | | 4M_EDO |
+| 4M_EDO 4M_EDO |----------| |
+| |---------| 50MHz |--------| |
+| 4M_EDO 4M_EDO | | |KONAMI | |
+| | TEXELFX | |33906 | MASKROM.16X |
+| | | | | MASKROM.16Y |
+| | | PLCC44_SOCKET |--------| AM7201 |
+| MC44200 |---------| |
+| |
+| |
+| PAL3 256KSRAM 36MHz |
+| 256KSRAM AM7201 AM7201 |-------------| |
+| 256KSRAM |ANALOG | |
+| 256KSRAM MACH111 256KSRAM AM7201 AM7201 |DEVICES | |
+| 256KSRAM AV9170 |ADSP-21062 | |
+| |SHARC | |
+| |--------| |KS-160 | |
+| |KONAMI | |-------------| |
+| |001604 | 1MSRAM 1MSRAM 1MSRAM 1MSRAM |
+|1MSRAM | | 1MSRAM 1MSRAM 1MSRAM 1MSRAM |
+| |--------| |
+|1MSRAM 256KSRAM PAL1 |
+| 256KSRAM 256KSRAM JP2 CN1 PAL2 |
+|-------------------------------------------------------------------------------------------|
+Notes:
+ 4M_EDO - Silicon Magic SM81C256K16CJ-35 EDO DRAM 66MHz (SOJ40)
+ 1MSRAM - Cypress CY7C109-25VC 1Meg SRAM (SOJ32)
+ 256KSRAM - Winbond W24257AJ-15 256k SRAM (SOJ28)
+ TEXELFX - 3DFX 500-0004-02 BD0665.1 TMU (QFP208)
+ PIXELFX - 3DFX 500-0003-03 F001701.1 FBI (QFP240)
+ 001604 - Konami Custom (QFP208)
+ MC44200FT - Motorola MC44200FT 3 Channel Video D/A Converter (QFP44)
+ MACH111 - AMD MACH111 CPLD (Stamped '03161A', PLCC44)
+PLCC44_SOCKET- empty PLCC44 socket
+ AV9170 - Integrated Circuit Systems Inc. Clock Multiplier (SOIC8)
+ AM7201 - AMD AM7201 FIFO (PLCC32)
+ PAL1 - AMD PALCE16V8 (stamped 'N676B4', DIP20)
+ PAL2 - AMD PALCE16V8 (stamped 'N676B5', DIP20)
+ PAL3 - AMD PALCE16V8 (stamped 'N676B2', DIP20)
+ JP1 - SLV O O-O MST,TWN
+ JP2 - SLV O O-O MST
+ CN1 - 96 Pin joining connector to upper PCB
+ CN2 - 8-Pin 24kHz RGB OUT
+ CN3 - 15-Pin DSUB VGA Video MAIN OUT
+ CN4 - 6-Pin Power Connector
+ CN5 - 4-Pin Power Connector
+ CN6 - 2-Pin Connector (Not Used)
+ CN7 - 6-Pin Connector
+
+
+ROM Usage
+---------
+ |------ ROM Locations -------|
+Game 8X 8Y 16X 16Y
+-------------------------------------------
+Racing Jam 676A13 - 676A14 -
+Racing Jam 2 888A13 - 888A14 -
+Thrill Drive 713A13 - 713A14 -
+
*/
#include "driver.h"
diff --git a/src/mame/drivers/zr107.c b/src/mame/drivers/zr107.c
index 3d30375c7b6..adb674eee3c 100644
--- a/src/mame/drivers/zr107.c
+++ b/src/mame/drivers/zr107.c
@@ -37,6 +37,146 @@
Winding Heat | GX677 | ZR107 | ZR107
Jetwave / Waveshark | GX678 | ZR107 | GN678
+
+Winding Heat
+Konami, 1996
+
+This game runs on Konami PPC hardware, and is similar to GTI Club hardware.
+
+PCB Layout
+----------
+
+Top Board
+
+ZR107 PWB(A)300769A
+|------------------------------------------------------------|
+| 677A09.3R |
+| 677A10.5N 677A08.5R |
+| 056800 058141 68EC000FN8 *1 *2 |
+| RESET_SW *1 *2 |
+| |
+| 001535 001536 8464 8464 677UBC04.13U |
+| |
+| *4 677UBC03.15U |
+| |
+| *3 *4 677UBC02.17U |
+| 677A07.19L 18.432MHz |
+| 93C46.20E 677UBC01.20U |
+| LED 814260-70 |
+| 001534 |
+| ADC0838 |
+| 001533 814260-70 |
+| TEST_SW |
+| 001532 |
+| 056787A |
+| |
+| 8464 |
+| PPC403GA |
+| 64MHz |
+| 056230 *5 |
+| |
+| DSW4P |
+|------------------------------------------------------------|
+
+Notes:
+ *1: Unpopulated position for 16MBit TSOP56 Flash ROM.
+ *2: Unpopulated position for 16MBit DIP42 MASK ROM.
+ *3: Unpopulated position for 4MBit EPROM
+ *4: Unpopulated position for DRAM 814260-70
+ *5: Unpopulated position for MB89371FL
+ 001532-001536, 056787A = PALCE16V8H
+ 056230 also marked KS40011
+ 8464: 64k SRAM
+ 814260: 4Mx16 DRAM
+ LED has 2 digit numerical output
+ DSW4P: 4 position DIP SWITCH
+ 677A07.19L - AM27C1024 EPROM
+ 677A08.5R - 42 PIN 16M MASK ROM
+ 677A09.3R - 42 PIN 16M MASK ROM
+ 677A10.5N - 42 PIN 16M MASK ROM
+ 677UBC0* - AM27C040 EPROM
+
+
+Bottom Board
+
+ZR107 PWB(B)300816D
+|------------------------------------------------------------|
+| *6 677A16.2H 001006 81141622 81141622 |
+| |
+| *6 677A15.5H 81141622 |
+| 001005 |
+| *6 677A14.7H 81141622 |
+| |
+| *6 677A13.9H 81141622 |
+| |
+| MC88916 |
+| 001785 AM7203 AM7203 AM7203 AM7203 |
+| |
+| |
+| 001782 001781 |
+| |
+| |
+| |
+| MC44200 CY7C128 CY7C128 CY7C199 CY7C199 |
+| CY7C199 CY7C199 36MHz |
+| |
+| 001779 056832 ADSP21062 |
+| |
+| 001784 058143 CY7C109 CY7C109 |
+| 677A12.35A |
+| 62256 62256 001780 CY7C109 CY7C109 |
+| 677A11.35B 62256 |
+| DSW4P |
+|------------------------------------------------------------|
+
+Notes:
+ 001006 also marked KS10081
+ 81141622: 4Mx16Bit SDRAM
+ 001005 also marked KS10071, chip is heatsinked.
+ AM7203: PLCC32 PLD, marked FIFO 2Kx9
+ 001779,001780: MACH110 PLD
+ DSW4P: 4 position DIP SWITCH
+ 001781,001782,001784,001785: PALCE16V8H
+ CY7C128: 16k SRAM
+ CY7C199: 256k SRAM
+ CY7C109: 1M SRAM
+ 62256: 256k SRAM
+ ADSP21062 also marked SHARC and KS-160
+ *6: Unpopulated position for 8MBit x 8bit DIP42 MASK ROM
+ 677A13.9H - 42 PIN 16M MASK ROM
+ 677A14.7H - 42 PIN 16M MASK ROM
+ 677A15.5H - 42 PIN 16M MASK ROM
+ 677A16.2H - 42 PIN 16M MASK ROM
+ 677A12.35A - 40 PIN 4M MASK ROM
+ 677A11.35B - 40 PIN 4M MASK ROM
+
+
+
+Jet Wave / Wave Shark
+Konami, 1996
+
+This game uses the same video PCB as GTI Club (board number GN678 PWB(B)302009A)
+The top board is the same PCB used on Winding Heat & Midnight Run (board number ZR107 PWB(A)300769A)
+
+Main parts on the top board include....
+IBM PowerPC403GA @32MHz [64/2]
+HM514260-7 (x2)
+MC68EC000-8 @8MHz [64/8]
+058141
+056800
+MB8464 (8kx8, x3)
+KS40011-PF 056230
+93C46 EEPROM
+DSW (4-position)
+64MHz OSC
+18.432 XTAL
+Test SW
+Reset SW
+2-position numeric LED display
+LA4705 AMP
+5 EPROMs
+5 MASKROMs
+
*/
#include "driver.h"
@@ -164,84 +304,105 @@ static VIDEO_UPDATE( zr107 )
/******************************************************************/
-static READ32_HANDLER( sysreg_r )
+static CUSTOM_INPUT( adcdo_r )
+{
+ return adc083x_do_read(0);
+}
+
+static READ8_HANDLER( sysreg_r )
{
UINT32 r = 0;
- if (offset == 0)
+
+ switch (offset)
{
- if (ACCESSING_BITS_24_31)
- {
- r |= input_port_read_indexed(machine, 0) << 24;
- }
- if (ACCESSING_BITS_16_23)
- {
- r |= input_port_read_indexed(machine, 1) << 16;
- }
- if (ACCESSING_BITS_8_15)
- {
- int adc_bit = adc083x_do_read(0);
- r |= ((input_port_read_indexed(machine, 2) & 0x7f) | (adc_bit << 7)) << 8;
- }
- if (ACCESSING_BITS_0_7)
- {
- r |= input_port_read_indexed(machine, 3) << 0;
- }
+ case 0: /* I/O port 0 */
+ case 1: /* I/O port 1 */
+ case 2: /* I/O port 2 */
+ case 3: /* System Port 0 */
+ r = input_port_read_indexed(machine, offset);
+ break;
+
+ case 4: /* System Port 1 */
+ /*
+ 0x80 = PARAACK
+ 0x40 = unused
+ 0x20 = SARS (A/D busy flag)
+ 0x10 = EEPDO (EEPROM DO)
+ */
+ r = (adc083x_sars_read(0) << 5) | (eeprom_read_bit() << 4);
+ break;
+
+ case 5: /* Parallel data port */
+ break;
}
- else if (offset == 1)
- {
- if (ACCESSING_BITS_24_31)
- {
- r |= ((adc083x_sars_read(0) << 5) | (eeprom_read_bit() << 4)) << 24;
- }
- }
- //mame_printf_debug("sysreg_r: %08X, %08X at %08X\n", offset, mem_mask, activecpu_get_pc());
return r;
}
-static WRITE32_HANDLER( sysreg_w )
+static WRITE8_HANDLER( sysreg_w )
{
- if( offset == 0 )
- {
- if (ACCESSING_BITS_24_31)
- {
- led_reg0 = (data >> 24) & 0xff;
- }
- if (ACCESSING_BITS_16_23)
- {
- led_reg1 = (data >> 16) & 0xff;
- }
- if (ACCESSING_BITS_0_7)
- {
- eeprom_write_bit((data & 0x1) ? 1 : 0);
- eeprom_set_clock_line((data & 0x2) ? ASSERT_LINE : CLEAR_LINE);
- eeprom_set_cs_line((data & 0x4) ? CLEAR_LINE : ASSERT_LINE);
-
- if (data & 0x10)
- cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, CLEAR_LINE);
- else
- cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, ASSERT_LINE);
- }
- return;
- }
- else if( offset == 1 )
+ switch (offset)
{
- if (ACCESSING_BITS_24_31)
- {
- if (data & 0x80000000) /* CG Board 1 IRQ Ack */
+ case 0: /* LED Register 0 */
+ led_reg0 = data;
+ break;
+
+ case 1: /* LED Register 1 */
+ led_reg1 = data;
+ break;
+
+ case 2: /* Parallel data register */
+ mame_printf_debug("Parallel data = %02X\n", data);
+ break;
+
+ case 3: /* System Register 0 */
+ /*
+ 0x80 = unused
+ 0x40 = COINREQ1
+ 0x20 = COINREQ2
+ 0x10 = SNDRES
+ 0x08 = unused
+ 0x04 = EEPCS
+ 0x02 = EEPCLK
+ 0x01 = EEPDI
+ */
+ eeprom_write_bit((data & 0x01) ? 1 : 0);
+ eeprom_set_clock_line((data & 0x02) ? ASSERT_LINE : CLEAR_LINE);
+ eeprom_set_cs_line((data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
+ cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
+ mame_printf_debug("System register 0 = %02X\n", data);
+ break;
+
+ case 4: /* System Register 1 */
+ /*
+ 0x80 = EXRES1
+ 0x40 = EXRES0
+ 0x20 = EXID1
+ 0x10 = EXID0
+ 0x08 = unused
+ 0x04 = ADCS (ADC CS)
+ 0x02 = ADDI (ADC DI)
+ 0x01 = ADDSCLK (ADC SCLK)
+ */
+ if (data & 0x80) /* CG Board 1 IRQ Ack */
cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ1, CLEAR_LINE);
-
- if (data & 0x40000000) /* CG Board 0 IRQ Ack */
+ if (data & 0x40) /* CG Board 0 IRQ Ack */
cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ0, CLEAR_LINE);
+ set_cgboard_id((data >> 4) & 3);
+ adc083x_cs_write(0, (data >> 2) & 1);
+ adc083x_di_write(0, (data >> 1) & 1);
+ adc083x_clk_write(0, (data >> 0) & 1);
+ mame_printf_debug("System register 1 = %02X\n", data);
+ break;
+
+ case 5: /* System Register 2 */
+ /*
+ 0x01 = AFE
+ */
+ if (data & 0x01)
+ watchdog_reset(machine);
+ break;
- set_cgboard_id((data >> 28) & 0x3);
-
- adc083x_cs_write(0, (data >> 26) & 1);
- adc083x_di_write(0, (data >> 25) & 1);
- adc083x_clk_write(0, (data >> 24) & 1);
- }
- return;
}
- mame_printf_debug("sysreg_w: %08X, %08X, %08X\n", offset, data, mem_mask);
}
static double adc0838_callback(int input)
@@ -325,7 +486,7 @@ static ADDRESS_MAP_START( zr107_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x78010000, 0x7801ffff) AM_WRITE(cgboard_dsp_shared_w_ppc)
AM_RANGE(0x78040000, 0x7804000f) AM_READWRITE(K001006_0_r, K001006_0_w)
AM_RANGE(0x780c0000, 0x780c0007) AM_READWRITE(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
- AM_RANGE(0x7e000000, 0x7e003fff) AM_READWRITE(sysreg_r, sysreg_w)
+ AM_RANGE(0x7e000000, 0x7e003fff) AM_READWRITE8(sysreg_r, sysreg_w, 0xffffffff)
AM_RANGE(0x7e008000, 0x7e009fff) AM_READWRITE8(K056230_r, K056230_w, 0xffffffff) /* LANC registers */
AM_RANGE(0x7e00a000, 0x7e00bfff) AM_READWRITE(lanc_ram_r, lanc_ram_w) /* LANC Buffer RAM (27E) */
AM_RANGE(0x7e00c000, 0x7e00c007) AM_WRITE(K056800_host_w)
@@ -353,7 +514,7 @@ static ADDRESS_MAP_START( jetwave_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x78040000, 0x7804000f) AM_MIRROR(0x80000000) AM_READWRITE(K001006_0_r, K001006_0_w)
AM_RANGE(0x78080000, 0x7808000f) AM_MIRROR(0x80000000) AM_READWRITE(K001006_1_r, K001006_1_w)
AM_RANGE(0x780c0000, 0x780c0007) AM_MIRROR(0x80000000) AM_READWRITE(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
- AM_RANGE(0x7e000000, 0x7e003fff) AM_MIRROR(0x80000000) AM_READWRITE(sysreg_r, sysreg_w)
+ AM_RANGE(0x7e000000, 0x7e003fff) AM_MIRROR(0x80000000) AM_READWRITE8(sysreg_r, sysreg_w, 0xffffffff)
AM_RANGE(0x7e008000, 0x7e009fff) AM_MIRROR(0x80000000) AM_READWRITE8(K056230_r, K056230_w, 0xffffffff) /* LANC registers */
AM_RANGE(0x7e00a000, 0x7e00bfff) AM_MIRROR(0x80000000) AM_READWRITE(lanc_ram_r, lanc_ram_w) /* LANC Buffer RAM (27E) */
AM_RANGE(0x7e00c000, 0x7e00c007) AM_MIRROR(0x80000000) AM_WRITE(K056800_host_w)
@@ -438,7 +599,8 @@ static INPUT_PORTS_START( midnrun )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START
- PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
+ PORT_BIT( 0x7f, IP_ACTIVE_HIGH, IPT_UNKNOWN )
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(adcdo_r, 0)
PORT_START
PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )
@@ -481,7 +643,8 @@ static INPUT_PORTS_START( windheat )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START
- PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
+ PORT_BIT( 0x7f, IP_ACTIVE_HIGH, IPT_UNKNOWN )
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(adcdo_r, 0)
PORT_START
PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )
@@ -524,7 +687,8 @@ static INPUT_PORTS_START( jetwave )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START
- PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
+ PORT_BIT( 0x7f, IP_ACTIVE_HIGH, IPT_UNKNOWN )
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(adcdo_r, 0)
PORT_START
PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )