diff options
author | Luca Elia <lucaelia@mamedev.org> | 2008-02-02 22:36:24 +0000 |
---|---|---|
committer | Luca Elia <lucaelia@mamedev.org> | 2008-02-02 22:36:24 +0000 |
commit | fbe874547242bb09eb05e17f5a34cb225b1da2e4 (patch) | |
tree | 5df24a60410c5cd2455b2edb6cd662874ef63c2e | |
parent | 5eaaf398e9ca0fc79fd747c0856f2e3b60cd5945 (diff) |
- New game: Puzzlet (NOT_WORKING)
- Added some instructions to the H8/30xx CPU:
or.l ERs, ERd
rotl/shal.l ERd
not.l/neg.l ERd
exts.w Rd
sub/or/xor.l #Imm:32, ERd
bset/bnot/bclr.b Rn, @ERd
bst/bist.b #Imm:3, @ERd
bnot.b #Imm:3, @ERd
- Added H8/3007 & H8/3044 variants with their memory maps.
Preliminary implementation of the H8/3007 timers.
(a make clean is required)
P.S.
I've moved the docs we have in docs/cpu/H8-30xx and added a couple more.
Roms are in roms/current/p/puzzlet.zip
-rw-r--r-- | src/emu/cpu/h83002/h83002.c | 415 | ||||
-rw-r--r-- | src/emu/cpu/h83002/h8disasm.c | 79 | ||||
-rw-r--r-- | src/emu/cpu/h83002/h8periph.c | 339 | ||||
-rw-r--r-- | src/emu/cpu/h83002/h8priv.h | 10 | ||||
-rw-r--r-- | src/emu/cpuexec.h | 2 | ||||
-rw-r--r-- | src/emu/cpuintrf.c | 4 | ||||
-rw-r--r-- | src/mame/drivers/bishjan.c | 2 | ||||
-rw-r--r-- | src/mame/drivers/lastfght.c | 2 | ||||
-rw-r--r-- | src/mame/drivers/metro.c | 346 | ||||
-rw-r--r-- | src/mame/mamedriv.c | 1 | ||||
-rw-r--r-- | src/mame/video/metro.c | 8 |
11 files changed, 1096 insertions, 112 deletions
diff --git a/src/emu/cpu/h83002/h83002.c b/src/emu/cpu/h83002/h83002.c index 61ec815de5d..ad0a85218ff 100644 --- a/src/emu/cpu/h83002/h83002.c +++ b/src/emu/cpu/h83002/h83002.c @@ -19,6 +19,9 @@ instructions were being picked. TS 20060412 Added exts.l, sub.l, divxs.w (buggy), jsr @reg, rotxl.l reg, mov.l @(adr, reg), reg + LE 20070903 Added divxu.b shal.l extu.w dec.l #Imm,Rd subx.b + LE 20080202 Separated 3002/3044/3007, Added or.l shal.l rotl.l not.l neg.l exts.w + sub/or/xor.l #Imm:32,ERd bset/bnot/bclr.b Rn,@ERd bst/bist.b #Imm:3,@ERd bnot.b #Imm:3,@ERd Note: The H8/3000 series is normally back-compatible to the 8-bit H8/300, but the 3002 does not include "emulation mode" - it always runs in full @@ -49,9 +52,6 @@ #define H8_WORD_TIMING(x, adr) if (address24 >= 0xffff10) h8_cyccnt -= (x) * 3; else h8_cyccnt -= (x) * 4; #define H8_IOP_TIMING(x) h8_cyccnt -= (x); -extern UINT8 h8_register_read8(UINT32 address); -extern void h8_register_write8(UINT32 address, UINT8 val); - INLINE UINT32 h8_mem_read32(offs_t address) { UINT32 result = program_read_word_16be(address) << 16; @@ -110,6 +110,7 @@ static UINT8 h8_subx8(UINT8 src, UINT8 dst); static UINT8 h8_or8(UINT8 src, UINT8 dst); static UINT16 h8_or16(UINT16 src, UINT16 dst); +static UINT32 h8_or32(UINT32 src, UINT32 dst); static UINT8 h8_xor8(UINT8 src, UINT8 dst); static UINT16 h8_xor16(UINT16 src, UINT16 dst); @@ -121,15 +122,18 @@ static UINT32 h8_and32(UINT32 src, UINT32 dst); static INT8 h8_neg8(INT8 src); static INT16 h8_neg16(INT16 src); +static INT32 h8_neg32(INT32 src); static UINT16 h8_divxu8 (UINT16 dst, UINT8 src); static UINT32 h8_divxu16(UINT32 dst, UINT16 src); static UINT8 h8_not8(UINT8 src); static UINT16 h8_not16(UINT16 src); +static UINT32 h8_not32(UINT32 src); static UINT8 h8_rotl8(UINT8 src); static UINT16 h8_rotl16(UINT16 src); +static UINT32 h8_rotl32(UINT32 src); static UINT8 h8_rotxl8(UINT8 src); static UINT16 h8_rotxl16(UINT16 src); @@ -148,6 +152,7 @@ static UINT32 h8_shlr32(UINT32 src); static INT8 h8_shal8(INT8 src); static INT16 h8_shal16(INT16 src); +static INT32 h8_shal32(INT32 src); static INT8 h8_shar8(INT8 src); static INT16 h8_shar16(INT16 src); @@ -161,7 +166,7 @@ static UINT8 h8_inc8(UINT8 src); static UINT16 h8_inc16(UINT16 src); static UINT32 h8_inc32(UINT32 src); -//static UINT8 h8_bnot8(UINT8 src, UINT8 dst); +static UINT8 h8_bnot8(UINT8 src, UINT8 dst); static UINT8 h8_bst8(UINT8 src, UINT8 dst); static UINT8 h8_bist8(UINT8 src, UINT8 dst); static UINT8 h8_bset8(UINT8 src, UINT8 dst); @@ -344,6 +349,12 @@ static void h8_init(int index, int clock, const void *config, int (*irqcallback) h8_itu_init(); } +static void h8_3007_init(int index, int clock, const void *config, int (*irqcallback)(int)) +{ + h8_init(index, clock, config, irqcallback); + h8_3007_itu_init(); +} + static void h8_reset(void) { h8.h8err = 0; @@ -368,6 +379,8 @@ static void h8_GenException(UINT8 vectornr) // generate address from vector h8_set_ccr(h8_get_ccr() | 0x80); + if (h8.h8uiflag == 0) + h8_set_ccr(h8_get_ccr() | 0x40); h8.pc = h8_mem_read32(vectornr * 4) & 0xffffff; change_pc(h8.pc); @@ -606,24 +619,24 @@ static void h8_group0(UINT16 opcode) } else { + dstreg = ext16 & 0x7; switch((ext16>>8)&0xff) { - case 0x65: - dstreg = ext16 & 0x7; + case 0x64: // or.l ERs, ERd + udata32 = h8_or32(h8_getreg32((ext16>>4) & 0x7), h8_getreg32(dstreg)); + break; + case 0x65: // xor.l ERs, ERd udata32 = h8_xor32(h8_getreg32((ext16>>4) & 0x7), h8_getreg32(dstreg)); - h8_setreg32(dstreg, udata32); - H8_IFETCH_TIMING(2); break; - case 0x66: - dstreg = ext16 & 0x7; + case 0x66: // and.l ERs, ERd udata32 = h8_and32(h8_getreg32((ext16>>4) & 0x7), h8_getreg32(dstreg)); - h8_setreg32(dstreg, udata32); - H8_IFETCH_TIMING(2); break; default: h8.h8err = 1; - break; + return; } + h8_setreg32(dstreg, udata32); + H8_IFETCH_TIMING(2); } break; @@ -1084,13 +1097,20 @@ static void h8_group1(UINT16 opcode) h8_setreg8(opcode & 0xf, udata8); H8_IFETCH_TIMING(1); break; - // shal.w Rx case 0x9: + // shal.w Rx udata16 = h8_getreg16(opcode & 0xf); udata16 = h8_shal16(udata16); h8_setreg16(opcode & 0xf, udata16); H8_IFETCH_TIMING(1); break; + case 0xb: + // shal.l ERx + udata32 = h8_getreg32(opcode & 0x7); + udata32 = h8_shal32(udata32); + h8_setreg32(opcode & 0x7, udata32); + H8_IFETCH_TIMING(1); + break; default: logerror("H8/3002: Unk. group 1 0 %x\n", opcode); @@ -1189,7 +1209,14 @@ static void h8_group1(UINT16 opcode) h8_setreg16(opcode & 0xf, udata16); H8_IFETCH_TIMING(1); break; - // rotl.l Rx + case 0xb: + // rotl.l ERx + udata32 = h8_getreg32(opcode & 0x7); + udata32 = h8_rotl32(udata32); + h8_setreg32(opcode & 0x7, udata32); + H8_IFETCH_TIMING(1); + break; + default: logerror("H8/3002: Unk. group 1 2 %x\n", opcode); h8.h8err = 1; @@ -1258,6 +1285,13 @@ static void h8_group1(UINT16 opcode) h8_setreg16(dstreg, udata16); H8_IFETCH_TIMING(1); break; + case 0x3: + // not.l ERx + dstreg = opcode & 0x7; + udata32 = h8_not32(h8_getreg32(dstreg)); + h8_setreg32(dstreg, udata32); + H8_IFETCH_TIMING(1); + break; case 0x5: // extu.w Rx @@ -1281,7 +1315,6 @@ static void h8_group1(UINT16 opcode) break; case 0x8: // neg.b Rx - //sprintf(output, "%4.4x neg.b %s", opcode, reg_names8[opcode & 0xf]); dstreg = opcode & 0xf; sdata8 = h8_neg8(h8_getreg8(dstreg)); h8_setreg8(dstreg, sdata8); @@ -1289,15 +1322,38 @@ static void h8_group1(UINT16 opcode) break; case 0x9: // neg.w Rx - //sprintf(output, "%4.4x neg.w %s", opcode, reg_names16[opcode & 0xf]); dstreg = opcode & 0xf; sdata16 = h8_neg16(h8_getreg16(dstreg)); h8_setreg16(dstreg, sdata16); H8_IFETCH_TIMING(1); break; + case 0xb: + // neg.l ERx + dstreg = opcode & 0x7; + sdata32 = h8_neg32(h8_getreg32(dstreg)); + h8_setreg32(dstreg, sdata32); + H8_IFETCH_TIMING(1); + break; + case 0xd: + // exts.w Rx + dstreg = opcode & 0xf; + udata16=h8_getreg16(dstreg)&0xff; + if(udata16&0x80) + { + udata16|=0xff00; + } + h8_setreg16(dstreg, udata16); + + h8.h8vflag = 0; + h8.h8nflag = (udata16 & 0xff00) ? 1 : 0; + h8.h8zflag = (udata16) ? 0 : 1; + + H8_IFETCH_TIMING(1); + break; + case 0xf: // exts.l Rx - dstreg = opcode & 0xf; + dstreg = opcode & 0x7; udata32=h8_getreg32(dstreg)&0xffff; if(udata32&0x8000) { @@ -2112,6 +2168,9 @@ static void h8_group7(UINT16 opcode) case 0: dst32 = h8_mov32(udata32); h8_setreg32(dstreg, dst32); H8_IFETCH_TIMING(3); break; case 1: dst32 = h8_add32(udata32, dst32); h8_setreg32(dstreg, dst32); H8_IFETCH_TIMING(3); break; case 2: h8_cmp32(udata32, dst32); H8_IFETCH_TIMING(3); break; + case 3: dst32 = h8_sub32(udata32, dst32); h8_setreg32(dstreg, dst32); H8_IFETCH_TIMING(3); break; + case 4: dst32 = h8_or32(udata32, dst32); h8_setreg32(dstreg, dst32); H8_IFETCH_TIMING(3); break; + case 5: dst32 = h8_xor32(udata32, dst32); h8_setreg32(dstreg, dst32); H8_IFETCH_TIMING(3); break; case 6: dst32 = h8_and32(udata32, dst32); h8_setreg32(dstreg, dst32); H8_IFETCH_TIMING(3); break; default: logerror("H8/3002: Unk. group 7 a2 %x\n", opcode); @@ -2178,40 +2237,55 @@ static void h8_group7(UINT16 opcode) } break; case 0xd: + ext16 = h8_mem_read16(h8.pc); + h8.pc += 2; + address24 = h8_getreg32((opcode>>4) & 0x7); + H8_IFETCH_TIMING(2); + H8_BYTE_TIMING(1, address24); + switch(ext16>>8) { - UINT8 bitnr; - sdata16 = h8_mem_read16(h8.pc); - h8.pc += 2; - address24 = h8_getreg32((opcode>>4) & 0x7); - udata8 = h8_mem_read8(address24); - bitnr = (sdata16>>4)&7; + // bset/bnot/bclr.b Rn, @ERd + case 0x60: + if (((opcode & 0x8f)!=0)||((ext16 & 0x0f)!=0)) { h8.h8err=1; break; } + h8_mem_write8(address24, h8_bset8(h8_getreg16((ext16>>4)&0xf)&7, h8_mem_read8(address24))); + break; + case 0x61: + if (((opcode & 0x8f)!=0)||((ext16 & 0x0f)!=0)) { h8.h8err=1; break; } + h8_mem_write8(address24, h8_bnot8(h8_getreg16((ext16>>4)&0xf)&7, h8_mem_read8(address24))); + break; + case 0x62: + if (((opcode & 0x8f)!=0)||((ext16 & 0x0f)!=0)) { h8.h8err=1; break; } + h8_mem_write8(address24, h8_bclr8(h8_getreg16((ext16>>4)&0xf)&7, h8_mem_read8(address24))); + break; - if(((sdata16>>4)&0x8) == 0) - { - switch ((sdata16>>8)&0xff) + case 0x67: // bst/bist.b #Imm:3, @ERd + if (((opcode & 0x8f)!=0)||((ext16 & 0x0f)!=0)) { h8.h8err=1; break; } + if ((ext16 & 0x80)!=0) { - // bset.b #imm, @Rn - case 0x70: udata8 = h8_bset8(bitnr, udata8); h8_mem_write8(address24, udata8); H8_IFETCH_TIMING(2); H8_BYTE_TIMING(2, address24); break; - // bclr.b #imm, @Rn - case 0x72: udata8 = h8_bclr8(bitnr, udata8); h8_mem_write8(address24, udata8); H8_IFETCH_TIMING(2); H8_BYTE_TIMING(2, address24); break; - default: - h8.h8err=1; - logerror("H8/3002: Unk. group 7 cd-1 %x (%x)\n", opcode, (sdata16>>4)&7); - break; + h8_mem_write8(address24, h8_bist8((ext16>>4)&7, h8_mem_read8(address24))); } - } - else - { - switch ((sdata16>>8)&7) + else { - default: - h8.h8err=1; - logerror("H8/3002: Unk. group 7 cd-2 %x %x\n", opcode, sdata16); - break; + h8_mem_write8(address24, h8_bst8((ext16>>4)&7, h8_mem_read8(address24))); } - } + break; + + // bset/bnot/bclr.b #Imm:3, @ERd + case 0x70: + if (((opcode & 0x8f)!=0)||((ext16 & 0x8f)!=0)) { h8.h8err=1; break; } + h8_mem_write8(address24, h8_bset8((ext16>>4)&7, h8_mem_read8(address24))); + break; + case 0x71: + if (((opcode & 0x8f)!=0)||((ext16 & 0x8f)!=0)) { h8.h8err=1; break; } + h8_mem_write8(address24, h8_bnot8((ext16>>4)&7, h8_mem_read8(address24))); + break; + case 0x72: + if (((opcode & 0x8f)!=0)||((ext16 & 0x8f)!=0)) { h8.h8err=1; break; } + h8_mem_write8(address24, h8_bclr8((ext16>>4)&7, h8_mem_read8(address24))); + break; } break; + // bxxx.b #imm, @aa:8 case 0xe: case 0xf: @@ -2603,6 +2677,27 @@ static UINT16 h8_or16(UINT16 src, UINT16 dst) return res; } +static UINT32 h8_or32(UINT32 src, UINT32 dst) +{ + UINT32 res; + res = src | dst; + + h8.h8nflag = (res>>31) & 1; + h8.h8vflag = 0; + + // zflag + if(res==0) + { + h8.h8zflag = 1; + } + else + { + h8.h8zflag = 0; + } + + return res; +} + static UINT8 h8_xor8(UINT8 src, UINT8 dst) { UINT8 res; @@ -2751,17 +2846,11 @@ static void h8_bld8(UINT8 bit, UINT8 dst) h8.h8cflag = (dst >> bit) & 1; } -#ifdef UNUSED_FUNCTION static UINT8 h8_bnot8(UINT8 src, UINT8 dst) { - UINT8 res; - // invert single bit, no effect on C flag - res = dst ^ (1<<src); - - return res; + return dst ^ (1<<src); } -#endif static UINT8 h8_bst8(UINT8 src, UINT8 dst) { @@ -2898,6 +2987,40 @@ static INT16 h8_neg16(INT16 src) return res; } +static INT32 h8_neg32(INT32 src) +{ + INT32 res; + + if((UINT32)src == 0x80000000) + { + // overflow ! + h8.h8vflag = 1; + res = 0x80000000; + } + else + { + h8.h8vflag = 0; + res = 0-src; + } + + // N and Z modified + h8.h8nflag = (res>>31) & 1; + // zflag + if(res==0) + { + h8.h8zflag = 1; + } + else + { + h8.h8zflag = 0; + } + + h8.h8hflag = ((src|res)&0x08000000) ? 1 : 0; + h8.h8cflag = ((src|res)&0x80000000) ? 1 : 0; + + return res; +} + static UINT8 h8_not8(UINT8 src) { UINT8 res; @@ -2944,6 +3067,29 @@ static UINT16 h8_not16(UINT16 src) return res; } +static UINT32 h8_not32(UINT32 src) +{ + UINT32 res; + + res = ~src; + + // N and Z modified + h8.h8nflag = (res>>31) & 1; + h8.h8vflag = 0; + + // zflag + if(res==0) + { + h8.h8zflag = 1; + } + else + { + h8.h8zflag = 0; + } + + return res; +} + static UINT8 h8_rotxr8(UINT8 src) { UINT8 res; @@ -3127,6 +3273,32 @@ static UINT16 h8_rotl16(UINT16 src) return res; } +static UINT32 h8_rotl32(UINT32 src) +{ + UINT32 res; + + // rotate + res = src<<1; + h8.h8cflag = (src>>31) & 1; + res |= (h8.h8cflag & 1); + + // N and Z modified + h8.h8nflag = (res>>31) & 1; + h8.h8vflag = 0; + + // zflag + if(res==0) + { + h8.h8zflag = 1; + } + else + { + h8.h8zflag = 0; + } + + return res; +} + static UINT8 h8_shll8(UINT8 src) { UINT8 res; @@ -3335,7 +3507,7 @@ static INT8 h8_shal8(INT8 src) res = src<<1; // N and Z modified h8.h8nflag = (res>>7)&1; - h8.h8vflag = (((src>>7)&(~src>>6)) | ((~src>>7)&(~src>>6)))&1; + h8.h8vflag = (src ^ res) >> 7; // zflag if(res==0) @@ -3358,7 +3530,30 @@ static INT16 h8_shal16(INT16 src) res = src<<1; // N and Z modified h8.h8nflag = (res>>15)&1; - h8.h8vflag = (((src>>15)&(~src>>14)) | ((~src>>15)&(~src>>14)))&1; + h8.h8vflag = (src ^ res) >> 15; + + // zflag + if(res==0) + { + h8.h8zflag = 1; + } + else + { + h8.h8zflag = 0; + } + + return res; +} + +static INT32 h8_shal32(INT32 src) +{ + INT32 res; + + h8.h8cflag = (src>>31)&1; + res = src<<1; + // N and Z modified + h8.h8nflag = (res>>31)&1; + h8.h8vflag = (src ^ res) >> 31; // zflag if(res==0) @@ -3781,12 +3976,99 @@ static WRITE16_HANDLER( h8_itu_w ) } } +static READ16_HANDLER( h8_3007_itu_r ) +{ + if (mem_mask == 0) + { + // 16-bit read + return h8_3007_register_read8(offset*2 + 0xffff20)<<8 | h8_3007_register_read8((offset*2) + 1 + 0xffff20); + } + else if (mem_mask == 0xff) + { + return h8_3007_register_read8(offset*2 + 0xffff20)<<8; + } + else if (mem_mask == 0xff00) + { + return h8_3007_register_read8((offset*2) + 1 + 0xffff20); + } + + return 0; +} +static WRITE16_HANDLER( h8_3007_itu_w ) +{ + if (mem_mask == 0) + { + // 16-bit write + h8_3007_register_write8(offset*2 + 0xffff20, data>>8); + h8_3007_register_write8((offset*2) + 1 + 0xffff20, data&0xff); + } + else if (mem_mask == 0xff) + { + h8_3007_register_write8(offset*2 + 0xffff20, data>>8); + } + else if (mem_mask == 0xff00) + { + h8_3007_register_write8((offset*2) + 1 + 0xffff20, data&0xff); + } +} + +static READ16_HANDLER( h8_3007_itu1_r ) +{ + if (mem_mask == 0) + { + // 16-bit read + return h8_3007_register1_read8(offset*2 + 0xfee000)<<8 | h8_3007_register1_read8((offset*2) + 1 + 0xfee000); + } + else if (mem_mask == 0xff) + { + return h8_3007_register1_read8(offset*2 + 0xfee000)<<8; + } + else if (mem_mask == 0xff00) + { + return h8_3007_register1_read8((offset*2) + 1 + 0xfee000); + } + + return 0; +} +static WRITE16_HANDLER( h8_3007_itu1_w ) +{ + if (mem_mask == 0) + { + // 16-bit write + h8_3007_register1_write8(offset*2 + 0xfee000, data>>8); + h8_3007_register1_write8((offset*2) + 1 + 0xfee000, data&0xff); + } + else if (mem_mask == 0xff) + { + h8_3007_register1_write8(offset*2 + 0xfee000, data>>8); + } + else if (mem_mask == 0xff00) + { + h8_3007_register1_write8((offset*2) + 1 + 0xfee000, data&0xff); + } +} + // On-board RAM and peripherals -static ADDRESS_MAP_START( h8_internal_map, ADDRESS_SPACE_PROGRAM, 16 ) +static ADDRESS_MAP_START( h8_3002_internal_map, ADDRESS_SPACE_PROGRAM, 16 ) + // 512B RAM AM_RANGE(0xfffd10, 0xffff0f) AM_RAM AM_RANGE(0xffff10, 0xffffff) AM_READWRITE( h8_itu_r, h8_itu_w ) ADDRESS_MAP_END +static ADDRESS_MAP_START( h8_3044_internal_map, ADDRESS_SPACE_PROGRAM, 16 ) + // 32k ROM, 2k RAM + AM_RANGE(0xfff710, 0xffff0f) AM_RAM + AM_RANGE(0xffff1c, 0xffffff) AM_READWRITE( h8_itu_r, h8_itu_w ) +ADDRESS_MAP_END + +static ADDRESS_MAP_START( h8_3007_internal_map, ADDRESS_SPACE_PROGRAM, 16 ) + // ROM-less, 4k RAM + AM_RANGE(0xfee000, 0xfee0ff) AM_READWRITE( h8_3007_itu1_r, h8_3007_itu1_w ) + AM_RANGE(0xffef20, 0xffff1f) AM_RAM + AM_RANGE(0xffff20, 0xffffe9) AM_READWRITE( h8_3007_itu_r, h8_3007_itu_w ) +ADDRESS_MAP_END + + void h8_3002_get_info(UINT32 state, cpuinfo *info) { switch(state) { @@ -3819,7 +4101,7 @@ void h8_3002_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break; // Internal maps - case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map = construct_map_h8_internal_map; break; + case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map = construct_map_h8_3002_internal_map; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map = 0; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_IO: info->internal_map = 0; break; @@ -3863,3 +4145,26 @@ void h8_3002_get_info(UINT32 state, cpuinfo *info) case CPUINFO_STR_REGISTER + H8_E7: sprintf(info->s, " SP :%08x", h8.regs[7]); break; } } + +void h8_3044_get_info(UINT32 state, cpuinfo *info) +{ + switch (state) + { + case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map = construct_map_h8_3044_internal_map; break; + case CPUINFO_STR_NAME: strcpy(info->s, "H8/3044"); break; + default: + h8_3002_get_info(state,info); + } +} + +void h8_3007_get_info(UINT32 state, cpuinfo *info) +{ + switch (state) + { + case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM: info->internal_map = construct_map_h8_3007_internal_map; break; + case CPUINFO_PTR_INIT: info->init = h8_3007_init; break; + case CPUINFO_STR_NAME: strcpy(info->s, "H8/3007"); break; + default: + h8_3002_get_info(state,info); + } +} diff --git a/src/emu/cpu/h83002/h8disasm.c b/src/emu/cpu/h83002/h8disasm.c index 99ae25b216e..7811b7f251c 100644 --- a/src/emu/cpu/h83002/h8disasm.c +++ b/src/emu/cpu/h83002/h8disasm.c @@ -11,13 +11,14 @@ #include "debugger.h" #include "h83002.h" -static const char *const bit_instr[8] = {"bset", "bnot", "bclr", "btst", "bor", "bxor", "band", "bld"}; -static const char *const bit_instr2[8] = {"bset", "bnot", "bclr", "btst", "bior", "bixor", "biand", "bild"}; -static const char *const imm32l_instr[8] = {"mov", "add", "cmp", "sub", "or", "xor", "and", "?"}; -static const char *const branch_instr[16] = {"bt", "bf", "bhi", "bls", "bcc", "bcs", "bne", "beq", "bvc", "bvs", "bpl", "bmi", "bge", "blt", "bgt", "ble"}; -static const char *const reg_names32[8] = {"ER0", "ER1", "ER2", "ER3", "ER4", "ER5", "ER6", "SP"}; -static const char *const reg_names16[16] = {"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "E0", "E1", "E2", "E3", "E4", "E5", "E6", "E7"}; -static const char *const reg_names8[16] = {"R0H", "R1H", "R2H", "R3H", "R4H", "R5H", "R6H", "R7H","R0L", "R1L", "R2L", "R3L", "R4L", "R5L", "R6L", "R7L"}; +static const char *const bit_instr[8] = {"bset", "bnot", "bclr", "btst", "bor", "bxor", "band", "bld"}; +static const char *const bit_instr2[8] = {"bset", "bnot", "bclr", "btst", "bior", "bixor", "biand", "bild"}; +static const char *const imm32l_instr[8] = {"mov", "add", "cmp", "sub", "or", "xor", "and", "?"}; +static const char *const branch_instr[16] = {"bt", "bf", "bhi", "bls", "bcc", "bcs", "bne", "beq", "bvc", "bvs", "bpl", "bmi", "bge", "blt", "bgt", "ble"}; + +static const char *const reg_names32[8] = {"ER0", "ER1", "ER2", "ER3", "ER4", "ER5", "ER6", "SP"}; +static const char *const reg_names16[16] = {"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "E0", "E1", "E2", "E3", "E4", "E5", "E6", "E7"}; +static const char *const reg_names8[16] = {"R0H", "R1H", "R2H", "R3H", "R4H", "R5H", "R6H", "R7H","R0L", "R1L", "R2L", "R3L", "R4L", "R5L", "R6L", "R7L"}; static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom); static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom); @@ -248,10 +249,24 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT break; // 01f0 and.l prefix case 0xf: - // and.l rs, rd + // or.l/xor.l/and.l rs, rd data16 = h8_mem_read16(2); - sprintf(output, "%4.4x and.l %s, %s", opcode, reg_names16[(data16>>4) & 0x7], reg_names16[data16 & 0x7]); - size = 2; + size = 4; + switch((data16>>8)&0xff) + { + case 0x64: // or.l ERs, ERd + sprintf(output, "%4.4x or.l %s, %s", opcode, reg_names32[(data16>>4) & 0x7], reg_names32[data16 & 0x7]); + break; + case 0x65: // xor.l ERs, ERd + sprintf(output, "%4.4x xor.l %s, %s", opcode, reg_names32[(data16>>4) & 0x7], reg_names32[data16 & 0x7]); + break; + case 0x66: // and.l ERs, ERd + sprintf(output, "%4.4x and.l %s, %s", opcode, reg_names32[(data16>>4) & 0x7], reg_names32[data16 & 0x7]); + break; + default: + sprintf(output, "%4.4x default", opcode); + break; + } break; default: sprintf(output, "%4.4x default", opcode); @@ -355,7 +370,7 @@ static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT sprintf(output, "%4.4x adds.l #2, %s", opcode, reg_names32[opcode & 0x7]); break; case 9: - sprintf(output, "%4.4x adds.l #3, %s", opcode, reg_names32[opcode & 0x7]); + sprintf(output, "%4.4x adds.l #4, %s", opcode, reg_names32[opcode & 0x7]); break; case 0xd: sprintf(output, "%4.4x inc.w #2, %s", opcode, reg_names16[opcode & 0xf]); @@ -1196,15 +1211,43 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *output, const UINT case 0xc: case 0xd: data16 = h8_mem_read16(2); - if(((data16>>4)&0x8) == 0) - { - sprintf(output, "%4.4x %s.b #%1.1x, @%s", opcode, bit_instr[(data16>>8)&7], (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]); - } - else + size = 4; + switch(data16>>8) { - sprintf(output, "%4.4x %s.b #%1.1x, @%s", opcode, bit_instr2[(opcode>>4)&7], (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]); + case 0x60: // bset/bnot/bclr.b rn, @erd + case 0x61: + case 0x62: + if (((opcode & 0x8f)!=0)||((data16 & 0x0f)!=0)) + { + sprintf(output, "%4.4x default", opcode); + break; + } + sprintf(output, "%4.4x %s.b %s, @%s", opcode, bit_instr[(data16>>8)&7], reg_names16[(data16>>4)&0xf], reg_names32[(opcode>>4) & 0x7]); + break; + + case 0x67: // bst/bist.b #xx:3, @erd + if (((opcode & 0x8f)!=0)||((data16 & 0x0f)!=0)) + { + sprintf(output, "%4.4x default", opcode); + break; + } + if ((data16 & 0x80)!=0) + sprintf(output, "%4.4x bist.b #%1.1x, @%s", opcode, (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]); + else + sprintf(output, "%4.4x bst.b #%1.1x, @%s", opcode, (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]); + break; + + case 0x70: // bset/bnot/bclr.b #xx:3, @erd + case 0x71: + case 0x72: + if (((opcode & 0x8f)!=0)||((data16 & 0x8f)!=0)) + { + sprintf(output, "%4.4x default", opcode); + break; + } + sprintf(output, "%4.4x %s.b #%1.1x, @%s", opcode, bit_instr[(data16>>8)&7], (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]); + break; } - size = 4; break; // bxx.b #imm, @aa:8 case 0xe: diff --git a/src/emu/cpu/h83002/h8periph.c b/src/emu/cpu/h83002/h8periph.c index fffd009c273..709cd26eb30 100644 --- a/src/emu/cpu/h83002/h8periph.c +++ b/src/emu/cpu/h83002/h8periph.c @@ -349,6 +349,25 @@ UINT8 h8_debugger_itu_read8(UINT8 reg) #endif +static UINT8 h8_ISR_r(void) +{ + UINT8 res = 0; + + int i; + for (i = 0; i < 6; i++) + if (h8.h8_IRQrequestL & (1 << (12+i))) res |= (1 << i); + + return res; +} + +static void h8_ISR_w(UINT8 val) +{ + int i; + for (i = 0; i < 6; i++) + if ((~val) & (1 << i)) h8.h8_IRQrequestL &= ~(1 << (12+i)); +} + + UINT8 h8_register_read8(UINT32 address) { UINT8 val; @@ -428,6 +447,10 @@ UINT8 h8_register_read8(UINT32 address) case 0xd6: // port b data val = io_read_byte_8(H8_PORTB); break; + case 0xf6: + val = h8_ISR_r(); + break; + default: val = h8.per_regs[reg]; break; @@ -479,9 +502,325 @@ void h8_register_write8(UINT32 address, UINT8 val) case 0xd6: // port b data io_write_byte_8(H8_PORTB, val); break; + case 0xf6: + h8_ISR_w(val); + break; + } + + h8.per_regs[reg] = val; +} + +static void h8_3007_itu_refresh_timer(int tnum) +{ + attotime period; + static const int tscales[4] = { 1, 2, 4, 8 }; + int ourTCR = h8.per_regs[0x68+(tnum*8)]; + + period = attotime_mul(ATTOTIME_IN_HZ(cpunum_get_clock(h8.cpu_number)), tscales[ourTCR & 3]); + + if (ourTCR & 4) + { + logerror("H8/3007: Timer %d is using an external clock. Unsupported!\n", tnum); + } + + timer_adjust(h8.timer[tnum], period, 0, attotime_zero); +} + +INLINE void h8itu_3007_timer_cb(int tnum) +{ + int base = 0x68 + (tnum*8); + UINT16 count = (h8.per_regs[base + 0x2]<<8) | h8.per_regs[base + 0x3]; + count++; + +// logerror("h8/3007 timer %d count = %04x\n",tnum,count); + + // GRA match + if ((h8.per_regs[base + 0x1] & 0x03) && (count == ((h8.per_regs[base + 0x4]<<8) | h8.per_regs[base + 0x5]))) + { + if ((h8.per_regs[base + 0x0] & 0x60) == 0x20) + { +// logerror("h8/3007 timer %d GRA match, restarting\n",tnum); + count = 0; + h8_3007_itu_refresh_timer(tnum); + } + else + { +// logerror("h8/3007 timer %d GRA match, stopping\n",tnum); + timer_adjust(h8.timer[tnum], attotime_never, 0, attotime_zero); + } + + h8.per_regs[0x64] |= 1<<tnum; + if(h8.per_regs[0x64] & (4<<tnum)) // interrupt enable + { +// logerror("h8/3007 timer %d GRA INTERRUPT\n",tnum); + h8_3002_InterruptRequest(24+tnum*4); + } + } + // GRB match + if ((h8.per_regs[base + 0x1] & 0x30) && (count == ((h8.per_regs[base + 0x6]<<8) | h8.per_regs[base + 0x7]))) + { + if ((h8.per_regs[base + 0x0] & 0x60) == 0x40) + { +// logerror("h8/3007 timer %d GRB match, restarting\n",tnum); + count = 0; + h8_3007_itu_refresh_timer(tnum); + } + else + { +// logerror("h8/3007 timer %d GRB match, stopping\n",tnum); + timer_adjust(h8.timer[tnum], attotime_never, 0, attotime_zero); + } + + h8.per_regs[0x65] |= 1<<tnum; + if(h8.per_regs[0x65] & (4<<tnum)) // interrupt enable + { +// logerror("h8/3007 timer %d GRB INTERRUPT\n",tnum); + h8_3002_InterruptRequest(25+tnum*4); + } + } + // Overflow + if (((h8.per_regs[base + 0x1] & 0x33) == 0) && (count == 0)) + { +// logerror("h8/3007 timer %d OVF match, restarting\n",tnum); + h8.per_regs[0x66] |= 1<<tnum; + if(h8.per_regs[0x66] & (4<<tnum)) // interrupt enable + { +// logerror("h8/3007 timer %d OVF INTERRUPT\n",tnum); + h8_3002_InterruptRequest(26+tnum*4); + } + } + + h8.per_regs[base + 0x2] = count >> 8; + h8.per_regs[base + 0x3] = count & 0xff; +} + +static TIMER_CALLBACK( h8itu_3007_timer_0_cb ) +{ + h8itu_3007_timer_cb(0); +} +static TIMER_CALLBACK( h8itu_3007_timer_1_cb ) +{ + h8itu_3007_timer_cb(1); +} +static TIMER_CALLBACK( h8itu_3007_timer_2_cb ) +{ + h8itu_3007_timer_cb(2); +} + + +UINT8 h8_3007_itu_read8(UINT8 reg) +{ + UINT8 val; + + switch(reg) + { + case 0x60: + val = h8.h8TSTR | 0xf8; + break; + default: + val = h8.per_regs[reg]; + break; + } + + return val; +} + +void h8_3007_itu_write8(UINT8 reg, UINT8 val) +{ +// logerror("%06x: h8/3007 reg %02x = %02x\n",activecpu_get_pc(),reg,val); + h8.per_regs[reg] = val; + switch(reg) + { + case 0x60: + if ((val & 1) && !(h8.h8TSTR & 1)) + { + h8_3007_itu_refresh_timer(0); + } + if ((val & 2) && !(h8.h8TSTR & 2)) + { + h8_3007_itu_refresh_timer(1); + } + if ((val & 4) && !(h8.h8TSTR & 4)) + { + h8_3007_itu_refresh_timer(2); + } + h8.h8TSTR = val; + break; + default: + val = 0; + break; + } +} + +UINT8 h8_3007_register_read8(UINT32 address) +{ + UINT8 val; + UINT8 reg; + + address &= 0xffffff; + + reg = address & 0xff; + + if(reg >= 0x60 && reg <= 0x7f) + { + return h8_3007_itu_read8(reg); + } + else + { + switch(reg) + { + case 0xb4: // serial port A status + val = h8.per_regs[reg]; + val |= 0xc4; // transmit finished, receive ready, no errors + break; + case 0xb5: // serial port A receive + val = io_read_byte(H8_SERIAL_A); + break; + case 0xbc: // serial port B status + val = h8.per_regs[reg]; + val |= 0xc4; // transmit finished, receive ready, no errors + break; + case 0xbd: // serial port B receive + val = io_read_byte(H8_SERIAL_B); + break; + case 0xe0: + val = io_read_byte_8(H8_ADC_0_H); + break; + case 0xe1: + val = io_read_byte_8(H8_ADC_0_L); + break; + case 0xe2: + val = io_read_byte_8(H8_ADC_1_H); + break; + case 0xe3: + val = io_read_byte_8(H8_ADC_1_L); + break; + case 0xe4: + val = io_read_byte_8(H8_ADC_2_H); + break; + case 0xe5: + val = io_read_byte_8(H8_ADC_2_L); + break; + case 0xe6: + val = io_read_byte_8(H8_ADC_3_H); + break; + case 0xe7: + val = io_read_byte_8(H8_ADC_3_L); + break; + case 0xe8: // adc status + val = 0x80; + break; + + case 0xd3: // port 4 data + val = io_read_byte_8(H8_PORT4); + break; + case 0xd5: // port 6 data + val = io_read_byte_8(H8_PORT6); + break; + case 0xd6: // port 7 data + val = io_read_byte_8(H8_PORT7); + break; + case 0xd7: // port 8 data + val = io_read_byte_8(H8_PORT8); + break; + case 0xd8: // port 9 data + val = io_read_byte_8(H8_PORT9); + break; + case 0xd9: // port a data + val = io_read_byte_8(H8_PORTA); + break; + case 0xda: // port b data + val = io_read_byte_8(H8_PORTB); + break; + default: + val = h8.per_regs[reg]; + break; + } } + return val; +} + +void h8_3007_register_write8(UINT32 address, UINT8 val) +{ + UINT8 reg; + + address &= 0xffffff; + + reg = address & 0xff; + h8.per_regs[reg] = val; + + if(reg >= 0x60 && reg <= 0x7f) + { + h8_3007_itu_write8(reg, val); + } + else + { + switch (reg) + { + case 0xb3: + io_write_byte(H8_SERIAL_A, val); + break; + case 0xbb: + io_write_byte(H8_SERIAL_B, val); + break; + case 0xd3: + io_write_byte_8(H8_PORT4, val); + break; + case 0xd5: // port 6 data + io_write_byte_8(H8_PORT6, val); + break; + case 0xd6: // port 7 data + io_write_byte_8(H8_PORT7, val); + break; + case 0xd7: // port 8 data + io_write_byte_8(H8_PORT8, val); + break; + case 0xd8: // port 9 data + io_write_byte_8(H8_PORT9, val); + break; + case 0xd9: // port a data + io_write_byte_8(H8_PORTA, val); + break; + case 0xda: // port b data + io_write_byte_8(H8_PORTB, val); + break; + } + } +} + +UINT8 h8_3007_register1_read8(UINT32 address) +{ + switch (address) + { + case 0xfee012: return h8.per_regs[0xF2]; // SYSCR + case 0xfee016: return h8_ISR_r(); // ISR + case 0xfee018: return h8.per_regs[0xF8]; // IPRA + } + + logerror("cpu #%d (PC=%08X): unmapped I/O(1) byte read from %08X\n",cpu_getactivecpu(),activecpu_get_pc(),address); + return 0; +} + +void h8_3007_register1_write8(UINT32 address, UINT8 val) +{ + switch (address) + { + case 0xfee012: h8.per_regs[0xF2] = val; return; // SYSCR + case 0xfee016: h8_ISR_w(val); return; // ISR + case 0xfee018: h8.per_regs[0xF8] = val; return; // IPRA + } + logerror("cpu #%d (PC=%08X): unmapped I/O(1) byte write to %08X = %02X\n",cpu_getactivecpu(),activecpu_get_pc(),address,val); +} + +void h8_3007_itu_init(void) +{ + h8.timer[0] = timer_alloc(h8itu_3007_timer_0_cb, NULL); + h8.timer[1] = timer_alloc(h8itu_3007_timer_1_cb, NULL); + h8.timer[2] = timer_alloc(h8itu_3007_timer_2_cb, NULL); + + h8_itu_reset(); } void h8_itu_init(void) diff --git a/src/emu/cpu/h83002/h8priv.h b/src/emu/cpu/h83002/h8priv.h index fa73d5c2633..923eca4005d 100644 --- a/src/emu/cpu/h83002/h8priv.h +++ b/src/emu/cpu/h83002/h8priv.h @@ -36,9 +36,19 @@ typedef struct extern h83002_state h8; +UINT8 h8_register_read8(UINT32 address); +UINT8 h8_3007_register_read8(UINT32 address); +UINT8 h8_3007_register1_read8(UINT32 address); +void h8_register_write8(UINT32 address, UINT8 val); +void h8_3007_register_write8(UINT32 address, UINT8 val); +void h8_3007_register1_write8(UINT32 address, UINT8 val); + void h8_itu_init(void); +void h8_3007_itu_init(void); void h8_itu_reset(void); UINT8 h8_itu_read8(UINT8 reg); +UINT8 h8_3007_itu_read8(UINT8 reg); void h8_itu_write8(UINT8 reg, UINT8 val); +void h8_3007_itu_write8(UINT8 reg, UINT8 val); #endif diff --git a/src/emu/cpuexec.h b/src/emu/cpuexec.h index c6d488e3332..344aa315afd 100644 --- a/src/emu/cpuexec.h +++ b/src/emu/cpuexec.h @@ -189,6 +189,8 @@ enum _cpu_type CPU_MEDIAGX, CPU_I960, CPU_H83002, + CPU_H83007, + CPU_H83044, CPU_V810, CPU_M37702, CPU_M37710, diff --git a/src/emu/cpuintrf.c b/src/emu/cpuintrf.c index 6aaf44793ae..8eb2bd07bed 100644 --- a/src/emu/cpuintrf.c +++ b/src/emu/cpuintrf.c @@ -161,6 +161,8 @@ void pentium_get_info(UINT32 state, cpuinfo *info); void mediagx_get_info(UINT32 state, cpuinfo *info); void i960_get_info(UINT32 state, cpuinfo *info); void h8_3002_get_info(UINT32 state, cpuinfo *info); +void h8_3007_get_info(UINT32 state, cpuinfo *info); +void h8_3044_get_info(UINT32 state, cpuinfo *info); void v810_get_info(UINT32 state, cpuinfo *info); void m37702_get_info(UINT32 state, cpuinfo *info); void m37710_get_info(UINT32 state, cpuinfo *info); @@ -674,6 +676,8 @@ static const struct #endif #if (HAS_H83002) { CPU_H83002, h8_3002_get_info }, + { CPU_H83007, h8_3007_get_info }, + { CPU_H83044, h8_3044_get_info }, #endif #if (HAS_V810) { CPU_V810, v810_get_info }, diff --git a/src/mame/drivers/bishjan.c b/src/mame/drivers/bishjan.c index 7a0241e3e58..e5d957e9848 100644 --- a/src/mame/drivers/bishjan.c +++ b/src/mame/drivers/bishjan.c @@ -440,7 +440,7 @@ static INTERRUPT_GEN( bishjan_interrupt ) } static MACHINE_DRIVER_START( bishjan ) - MDRV_CPU_ADD(H83002, 44100000/3) + MDRV_CPU_ADD(H83044, 44100000/3) MDRV_CPU_PROGRAM_MAP( bishjan_map, 0 ) MDRV_CPU_VBLANK_INT(bishjan_interrupt,2) diff --git a/src/mame/drivers/lastfght.c b/src/mame/drivers/lastfght.c index b7860ba318e..3035aaf4751 100644 --- a/src/mame/drivers/lastfght.c +++ b/src/mame/drivers/lastfght.c @@ -461,7 +461,7 @@ static INTERRUPT_GEN( unknown_interrupt ) } static MACHINE_DRIVER_START( lastfght ) - MDRV_CPU_ADD(H83002, 32000000/2) + MDRV_CPU_ADD(H83044, 32000000/2) MDRV_CPU_PROGRAM_MAP( lastfght_map, 0 ) MDRV_CPU_VBLANK_INT(unknown_interrupt,2) diff --git a/src/mame/drivers/metro.c b/src/mame/drivers/metro.c index 46fe729b1dc..ac8f9608cb8 100644 --- a/src/mame/drivers/metro.c +++ b/src/mame/drivers/metro.c @@ -5,7 +5,7 @@ driver by Luca Elia (l.elia@tin.it) -Main CPU : MC68000 +Main CPU : MC68000 Or H8/3007 Video Chips : Imagetek 14100 052 9227KK701 Or Imagetek 14220 071 9338EK707 Or @@ -45,6 +45,7 @@ Year + Game PCB Video Chip Issues / Notes 98 Mahjong Gakuensai 2 VG340-A 14300 No sound CPU 96 Mouja VG410-B 14300 No sound CPU 99 Battle Bubble v2.00 LM2D-Y 14220 No sound CPU +00 Puzzlet VG2200-(B) 14300 PIC? Protection? --------------------------------------------------------------------------- Not dumped yet: @@ -81,9 +82,10 @@ driver modified by Eisuke Watanabe #include "driver.h" #include "deprecat.h" -#include "video/konamiic.h" +#include "cpu/h83002/h83002.h" #include "cpu/upd7810/upd7810.h" #include "machine/eeprom.h" +#include "video/konamiic.h" #include "sound/2610intf.h" #include "sound/2151intf.h" #include "sound/2413intf.h" @@ -207,6 +209,7 @@ static WRITE16_HANDLER( metro_irq_cause_w ) if (ACCESSING_LSB) { data &= ~*metro_irq_enable; + if (data & 0x01) requested_int[0] = 0; if (data & 0x02) requested_int[1] = 0; // DAITORIDE, BALCUBE, KARATOUR, MOUJA if (data & 0x04) requested_int[2] = 0; @@ -2089,6 +2092,86 @@ ADDRESS_MAP_END /*************************************************************************** + Puzzlet +***************************************************************************/ + +static READ16_HANDLER( puzzlet_dsw_r ) +{ + return readinputport(3); +} + +static WRITE16_HANDLER( puzzlet_irq_enable_w ) +{ + if (ACCESSING_LSB) + *metro_irq_enable = data^0xffff; +} + +// H8/3007 CPU +static ADDRESS_MAP_START( puzzlet_map, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE( 0x000000, 0x1fffff ) AM_ROM + AM_RANGE( 0x430000, 0x433fff ) AM_RAM + AM_RANGE( 0x470000, 0x47dfff ) AM_RAM + + AM_RANGE( 0x500000, 0x500001 ) AM_READWRITE( OKIM6295_status_0_msb_r, OKIM6295_data_0_msb_w ) + AM_RANGE( 0x580000, 0x580001 ) AM_WRITE( YM2413_register_port_0_msb_w ) + AM_RANGE( 0x580002, 0x580003 ) AM_WRITE( YM2413_data_port_0_msb_w ) + + AM_RANGE( 0x700000, 0x71ffff ) AM_READWRITE( MRA16_RAM, metro_vram_0_w ) AM_BASE( &metro_vram_0 ) // Layer 0 + AM_RANGE( 0x720000, 0x73ffff ) AM_READWRITE( MRA16_RAM, metro_vram_1_w ) AM_BASE( &metro_vram_1 ) // Layer 1 + AM_RANGE( 0x740000, 0x75ffff ) AM_READWRITE( MRA16_RAM, metro_vram_2_w ) AM_BASE( &metro_vram_2 ) // Layer 2 + AM_RANGE( 0x774000, 0x774fff ) AM_RAM AM_BASE( &spriteram16 ) AM_SIZE( &spriteram_size ) // Sprites + + AM_RANGE( 0x760000, 0x76ffff ) AM_READ( metro_bankedrom_r ) // Banked ROM + +// AM_RANGE( 0x772000, 0x773fff ) AM_RAM + AM_RANGE( 0x770000, 0x773fff ) AM_READWRITE( MRA16_RAM, metro_paletteram_w ) AM_BASE( &paletteram16 ) // Palette + + AM_RANGE( 0x775000, 0x777fff ) AM_RAM + + AM_RANGE( 0x778000, 0x7787ff ) AM_READWRITE( MRA16_RAM, MWA16_RAM ) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size ) // Tiles Set + AM_RANGE( 0x778800, 0x778813 ) AM_WRITE( MWA16_RAM ) AM_BASE( &metro_videoregs ) // Video Registers + AM_RANGE( 0x778840, 0x77884f ) AM_WRITE( metro_blitter_w ) AM_BASE( &metro_blitter_regs ) // Tiles Blitter + AM_RANGE( 0x778860, 0x77886b ) AM_WRITE( metro_window_w ) AM_BASE( &metro_window ) // Tilemap Window + AM_RANGE( 0x778870, 0x77887b ) AM_WRITE( MWA16_RAM ) AM_BASE( &metro_scroll ) // Scroll + AM_RANGE( 0x778890, 0x778891 ) AM_WRITE( MWA16_NOP ) // ? increasing + AM_RANGE( 0x7788a2, 0x7788a3 ) AM_WRITE( metro_irq_cause_w ) // IRQ Cause + AM_RANGE( 0x7788a4, 0x7788a5 ) AM_WRITE( puzzlet_irq_enable_w ) AM_BASE( &metro_irq_enable ) // IRQ Enable + + AM_RANGE( 0x7788aa, 0x7788ab ) AM_WRITE( MWA16_RAM ) AM_BASE( &metro_rombank ) // Rom Bank + AM_RANGE( 0x7788ac, 0x7788ad ) AM_WRITE( MWA16_RAM ) AM_BASE( &metro_screenctrl ) // Screen Control + + AM_RANGE( 0x7f2000, 0x7f3fff ) AM_RAM + + AM_RANGE( 0x7f8880, 0x7f8881 ) AM_READ( input_port_1_word_r ) + AM_RANGE( 0x7f8884, 0x7f8885 ) AM_READ( puzzlet_dsw_r ) + AM_RANGE( 0x7f8886, 0x7f8887 ) AM_READ( puzzlet_dsw_r ) + + AM_RANGE( 0x7f88a2, 0x7f88a3 ) AM_READ( metro_irq_cause_r ) // IRQ Cause +ADDRESS_MAP_END + +static READ8_HANDLER( puzzlet_port7_r ) +{ + return input_port_2_word_r(0,0); +} + +static READ8_HANDLER( puzzlet_serB_r ) +{ + return input_port_0_word_r(0,0); // coin +} + +static WRITE8_HANDLER( puzzlet_portb_w ) +{ +// popmessage("PORTB %02x",data); +} + +static ADDRESS_MAP_START( puzzlet_io_map, ADDRESS_SPACE_IO, 8 ) + AM_RANGE( H8_PORT7, H8_PORT7 ) AM_READ( puzzlet_port7_r ) + AM_RANGE( H8_SERIAL_B, H8_SERIAL_B ) AM_READ( puzzlet_serB_r ) + AM_RANGE( H8_PORTB, H8_PORTB ) AM_READWRITE( input_port_3_r, puzzlet_portb_w ) +ADDRESS_MAP_END + + +/*************************************************************************** Input Ports @@ -3301,6 +3384,71 @@ INPUT_PORTS_END /*************************************************************************** + Puzzlet +***************************************************************************/ + +static INPUT_PORTS_START( puzzlet ) + PORT_START // IN0 - ser B + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START // IN1 - 7f8880.w + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) // Next + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) // Rotate CW + PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) // Push + PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START // IN2 - port 7 + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START // IN3 - dsw? + PORT_DIPUNKNOWN( 0x0001, 0x0001 ) + PORT_DIPUNKNOWN( 0x0002, 0x0002 ) + PORT_DIPUNKNOWN( 0x0004, 0x0004 ) + PORT_DIPUNKNOWN( 0x0008, 0x0008 ) + PORT_DIPUNKNOWN( 0x0010, 0x0010 ) + PORT_DIPUNKNOWN( 0x0020, 0x0020 ) + PORT_DIPUNKNOWN( 0x0040, 0x0040 ) + PORT_DIPUNKNOWN( 0x0080, 0x0080 ) + + PORT_DIPUNKNOWN( 0x0100, 0x0100 ) + PORT_DIPUNKNOWN( 0x0200, 0x0200 ) + PORT_DIPUNKNOWN( 0x0400, 0x0400 ) + PORT_DIPUNKNOWN( 0x0800, 0x0800 ) + PORT_DIPUNKNOWN( 0x1000, 0x1000 ) + PORT_DIPUNKNOWN( 0x2000, 0x2000 ) + PORT_DIPUNKNOWN( 0x4000, 0x4000 ) + PORT_DIPUNKNOWN( 0x8000, 0x8000 ) +INPUT_PORTS_END + + +/*************************************************************************** Puzzli ***************************************************************************/ @@ -4501,6 +4649,75 @@ static MACHINE_DRIVER_START( gstrik2 ) MACHINE_DRIVER_END +static INTERRUPT_GEN( puzzlet_interrupt ) +{ + switch ( cpu_getiloops() ) + { + case 0: + requested_int[1] = 1; + update_irq_state(); + break; + + case 1: + requested_int[3] = 1; + update_irq_state(); + break; + + case 2: + requested_int[5] = 1; + update_irq_state(); + break; + + case 3: + requested_int[2] = 1; + update_irq_state(); + break; + + default: + // timer + h8_3002_InterruptRequest(24); + break; + } +} +static MACHINE_DRIVER_START( puzzlet ) + + /* basic machine hardware */ + MDRV_CPU_ADD(H83007, XTAL_20MHz) // H8/3007 - Hitachi HD6413007F20 CPU. Clock 20MHz + + MDRV_CPU_PROGRAM_MAP(puzzlet_map,0) + MDRV_CPU_IO_MAP(puzzlet_io_map,0) + MDRV_CPU_VBLANK_INT(puzzlet_interrupt, 5) + + MDRV_SCREEN_REFRESH_RATE(58) + MDRV_SCREEN_VBLANK_TIME(DEFAULT_60HZ_VBLANK_DURATION) + + MDRV_MACHINE_RESET(metro) + + /* video hardware */ + MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER) + MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) + MDRV_SCREEN_SIZE(320, 256-32) + MDRV_SCREEN_VISIBLE_AREA(0, 320-1, 0, 256-32-1) + MDRV_GFXDECODE(14300) + MDRV_PALETTE_LENGTH(8192) + + MDRV_VIDEO_START(metro_14300) + MDRV_VIDEO_UPDATE(metro) + + /* sound hardware */ + MDRV_SPEAKER_STANDARD_STEREO("left", "right") + + MDRV_SOUND_ADD(OKIM6295, XTAL_20MHz/5) + MDRV_SOUND_CONFIG(okim6295_interface_region_1_pin7low) + MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 0.50) + MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 0.50) + + MDRV_SOUND_ADD(YM2413, XTAL_20MHz/5) + MDRV_SOUND_ROUTE(0, "left", 0.90) + MDRV_SOUND_ROUTE(1, "right", 0.90) +MACHINE_DRIVER_END + + /*************************************************************************** @@ -4642,6 +4859,12 @@ static DRIVER_INIT( gakusai ) blitter_bit = 3; } +static DRIVER_INIT( puzzlet ) +{ + metro_common(); + irq_line = 0; + blitter_bit = 0; +} /*************************************************************************** @@ -5622,6 +5845,62 @@ ROM_END /*************************************************************************** +Puzzlet +2000 Yunizu Corporation + +Very small PCB using Metro-like hardware with +Imagetek GFX chip and H8/3007 CPU + +PCB Layout +---------- +VG2200-(B) +|--------------------------------------------| +|TA7222 YM2413B SOUND4 PRG1 | +| VOL JRC3403 DSW1(8) | +| M6295 DSW2(8) CG2 CG3 | +| 20MHz | +| MM1035 |---------| | +| H8/3007 |IMAGETEK | CY7C199 | +|TD62307 HM6216255|14300 | | +|TD62064 | | CY7C199 | +| | | | +| DIP18 |---------| CY7C199 | +| JAMMA 26.666MHz | +|--------------------------------------------| +Notes: + H8/3007 - Hitachi HD6413007F20 CPU. Clock 20MHz + M6295 - Clock 4MHz [20/5]. Pin7 LOW + 14300 - Imagetek 14300 Graphics Generator IC + VSync - 58Hz + HSync - 15.26kHz + DIP18 - unknown chip with scratched surface. Probably a PIC. + HM6216255 - Hitachi 4M high speed SRAM (256-kword x16-bit) + CY7C199 - 32k x8 SRAM + YM2413B - Clock 4MHz [20/5] + MM1035 - System Reset IC with Watchdog Timer + TD62307 - 7 Channel Low Saturation Driver + TD62064 - 4 Channel High Current Darlington Driver + TA7222 - 40V 4.5A 12.5W 5.8W Audio Power Amplifier IC + + All ROMs 27C160 + +***************************************************************************/ + +ROM_START( puzzlet ) + ROM_REGION( 0x200000, REGION_CPU1, 0 ) /* H8/3007 Code */ + ROM_LOAD16_WORD_SWAP( "prg1_ver2.u9", 0x000000, 0x200000, CRC(592760da) SHA1(08f7493d2e50831438f53bbf0ae211ec40057da7) ) + + ROM_REGION( 0x400000, REGION_GFX1, 0 ) /* Gfx + Data (Addressable by CPU & Blitter) */ + ROMX_LOAD( "cg2.u2", 0x000000, 0x200000, CRC(7720f2d8) SHA1(8e0ccd1e8efe00df909327aefdb1e23e50487524), ROM_GROUPWORD | ROM_SKIP(2)) + ROMX_LOAD( "cg3.u1", 0x000002, 0x200000, CRC(77d39d12) SHA1(4bb339e479f0425931cff4eef3a6bc6ad1fac1f5), ROM_GROUPWORD | ROM_SKIP(2)) + + ROM_REGION( 0x200000, REGION_SOUND1, 0 ) /* Samples */ + ROM_LOAD( "sound4.u23", 0x000000, 0x200000, CRC(9a611369) SHA1(97b9188354292b120a1bd0f01b4d884461bfa298) ) +ROM_END + + +/*************************************************************************** + Puzzli Metro/Banpresto 1995 @@ -5877,35 +6156,34 @@ ROM_END ***************************************************************************/ -/* year rom clone machine inputs init */ -GAME( 1992, karatour, 0, karatour, karatour, karatour, ROT0, "Mitchell", "The Karate Tournament", GAME_IMPERFECT_GRAPHICS ) -GAME( 1992, pangpoms, 0, pangpoms, pangpoms, metro, ROT0, "Metro", "Pang Pom's" , 0 ) -GAME( 1992, pangpomm, pangpoms, pangpoms, pangpoms, metro, ROT0, "Metro (Mitchell license)", "Pang Pom's (Mitchell)" , 0 ) -GAME( 1992, skyalert, 0, skyalert, skyalert, metro, ROT270, "Metro", "Sky Alert" , 0 ) -GAME( 1993?,ladykill, 0, karatour, ladykill, karatour, ROT90, "Yanyaka (Mitchell license)", "Lady Killer", GAME_IMPERFECT_GRAPHICS ) -GAME( 1993?,moegonta, ladykill, karatour, moegonta, karatour, ROT90, "Yanyaka", "Moeyo Gonta!! (Japan)", GAME_IMPERFECT_GRAPHICS ) -GAME( 1993, poitto, 0, poitto, poitto, metro, ROT0, "Metro / Able Corp.", "Poitto!" , 0 ) -GAME( 1994, dharma, 0, dharma, dharma, metro, ROT0, "Metro", "Dharma Doujou" , 0 ) -GAME( 1994, dharmak, dharma, dharma, dharma, dharmak, ROT0, "Metro", "Dharma Doujou (Korea)" , 0 ) -GAME( 1994, lastfort, 0, lastfort, lastfort, metro, ROT0, "Metro", "Last Fortress - Toride" , 0 ) -GAME( 1994, lastfero, lastfort, lastfort, lastfero, metro, ROT0, "Metro", "Last Fortress - Toride (Erotic)" , 0 ) -GAME( 1994, lastforg, lastfort, lastforg, ladykill, metro, ROT0, "Metro", "Last Fortress - Toride (German)" , 0 ) -GAME( 1994, toride2g, 0, toride2g, toride2g, metro, ROT0, "Metro", "Toride II Adauchi Gaiden", GAME_IMPERFECT_GRAPHICS ) -GAME( 1994, torid2gg, toride2g, toride2g, toride2g, metro, ROT0, "Metro", "Toride II Adauchi Gaiden (German)", GAME_IMPERFECT_GRAPHICS ) -GAME( 1994, toride2j, toride2g, toride2g, toride2g, metro, ROT0, "Metro", "Toride II (Japan)", GAME_IMPERFECT_GRAPHICS ) -GAME( 1994, gunmast, 0, pururun, gunmast, daitorid, ROT0, "Metro", "Gun Master" , 0 ) -GAME( 1995, daitorid, 0, daitorid, daitorid, daitorid, ROT0, "Metro", "Daitoride", GAME_IMPERFECT_GRAPHICS ) -GAME( 1995, dokyusei, 0, dokyusei, dokyusei, gakusai, ROT0, "Make Software / Elf / Media Trading", "Mahjong Doukyuusei" , 0 ) -GAME( 1995, dokyusp, 0, dokyusp, gakusai, gakusai, ROT0, "Make Software / Elf / Media Trading", "Mahjong Doukyuusei Special", 0 ) -GAME( 1995, pururun, 0, pururun, pururun, daitorid, ROT0, "Metro / Banpresto", "Pururun" , 0 ) -GAME( 1995, puzzli, 0, daitorid, puzzli, daitorid, ROT0, "Metro / Banpresto", "Puzzli", GAME_IMPERFECT_GRAPHICS ) -GAME( 1996, 3kokushi, 0, 3kokushi, 3kokushi, karatour, ROT0, "Mitchell", "Sankokushi (Japan)", GAME_IMPERFECT_GRAPHICS ) -GAME( 1996, balcube, 0, balcube, balcube, balcube, ROT0, "Metro", "Bal Cube" , 0 ) -GAME( 1996, bangball, 0, bangball, bangball, balcube, ROT0, "Banpresto / Kunihiko Tashiro+Goodhouse", "Bang Bang Ball (v1.05)" , 0 ) -GAME( 1999, batlbubl, bangball, batlbubl, batlbubl, balcube, ROT0, "Limenko", "Battle Bubble (v2.00)" , 0 ) -GAME( 1996, mouja, 0, mouja, mouja, mouja, ROT0, "Etona", "Mouja (Japan)", GAME_NO_COCKTAIL ) -GAME( 1997, gakusai, 0, gakusai, gakusai, gakusai, ROT0, "MakeSoft", "Mahjong Gakuensai (Japan)", GAME_IMPERFECT_GRAPHICS ) -GAME( 1998, gakusai2, 0, gakusai2, gakusai, gakusai, ROT0, "MakeSoft", "Mahjong Gakuensai 2 (Japan)" , 0 ) - -GAME( 1994, blzntrnd, 0, blzntrnd, blzntrnd, blzntrnd, ROT0, "Human Amusement", "Blazing Tornado", GAME_IMPERFECT_GRAPHICS ) -GAME( 1996, gstrik2, 0, gstrik2, gstrik2, blzntrnd, ROT0, "Human Amusement", "Grand Striker 2 (Japan)", GAME_IMPERFECT_GRAPHICS ) // priority between rounds +GAME( 1992, karatour, 0, karatour, karatour, karatour, ROT0, "Mitchell", "The Karate Tournament", GAME_IMPERFECT_GRAPHICS ) +GAME( 1992, pangpoms, 0, pangpoms, pangpoms, metro, ROT0, "Metro", "Pang Pom's", 0 ) +GAME( 1992, pangpomm, pangpoms, pangpoms, pangpoms, metro, ROT0, "Metro (Mitchell license)", "Pang Pom's (Mitchell)", 0 ) +GAME( 1992, skyalert, 0, skyalert, skyalert, metro, ROT270, "Metro", "Sky Alert", 0 ) +GAME( 1993?,ladykill, 0, karatour, ladykill, karatour, ROT90, "Yanyaka (Mitchell license)", "Lady Killer", GAME_IMPERFECT_GRAPHICS ) +GAME( 1993?,moegonta, ladykill, karatour, moegonta, karatour, ROT90, "Yanyaka", "Moeyo Gonta!! (Japan)", GAME_IMPERFECT_GRAPHICS ) +GAME( 1993, poitto, 0, poitto, poitto, metro, ROT0, "Metro / Able Corp.", "Poitto!", 0 ) +GAME( 1994, blzntrnd, 0, blzntrnd, blzntrnd, blzntrnd, ROT0, "Human Amusement", "Blazing Tornado", GAME_IMPERFECT_GRAPHICS ) +GAME( 1994, dharma, 0, dharma, dharma, metro, ROT0, "Metro", "Dharma Doujou", 0 ) +GAME( 1994, dharmak, dharma, dharma, dharma, dharmak, ROT0, "Metro", "Dharma Doujou (Korea)", 0 ) +GAME( 1994, lastfort, 0, lastfort, lastfort, metro, ROT0, "Metro", "Last Fortress - Toride", 0 ) +GAME( 1994, lastfero, lastfort, lastfort, lastfero, metro, ROT0, "Metro", "Last Fortress - Toride (Erotic)", 0 ) +GAME( 1994, lastforg, lastfort, lastforg, ladykill, metro, ROT0, "Metro", "Last Fortress - Toride (German)", 0 ) +GAME( 1994, toride2g, 0, toride2g, toride2g, metro, ROT0, "Metro", "Toride II Adauchi Gaiden", GAME_IMPERFECT_GRAPHICS ) +GAME( 1994, torid2gg, toride2g, toride2g, toride2g, metro, ROT0, "Metro", "Toride II Adauchi Gaiden (German)", GAME_IMPERFECT_GRAPHICS ) +GAME( 1994, toride2j, toride2g, toride2g, toride2g, metro, ROT0, "Metro", "Toride II (Japan)", GAME_IMPERFECT_GRAPHICS ) +GAME( 1994, gunmast, 0, pururun, gunmast, daitorid, ROT0, "Metro", "Gun Master", 0 ) +GAME( 1995, daitorid, 0, daitorid, daitorid, daitorid, ROT0, "Metro", "Daitoride", GAME_IMPERFECT_GRAPHICS ) +GAME( 1995, dokyusei, 0, dokyusei, dokyusei, gakusai, ROT0, "Make Software / Elf / Media Trading", "Mahjong Doukyuusei", 0 ) +GAME( 1995, dokyusp, 0, dokyusp, gakusai, gakusai, ROT0, "Make Software / Elf / Media Trading", "Mahjong Doukyuusei Special", 0 ) +GAME( 1995, pururun, 0, pururun, pururun, daitorid, ROT0, "Metro / Banpresto", "Pururun", 0 ) +GAME( 1995, puzzli, 0, daitorid, puzzli, daitorid, ROT0, "Metro / Banpresto", "Puzzli", GAME_IMPERFECT_GRAPHICS ) +GAME( 1996, 3kokushi, 0, 3kokushi, 3kokushi, karatour, ROT0, "Mitchell", "Sankokushi (Japan)", GAME_IMPERFECT_GRAPHICS ) +GAME( 1996, balcube, 0, balcube, balcube, balcube, ROT0, "Metro", "Bal Cube", 0 ) +GAME( 1996, bangball, 0, bangball, bangball, balcube, ROT0, "Banpresto / Kunihiko Tashiro+Goodhouse", "Bang Bang Ball (v1.05)", 0 ) +GAME( 1996, gstrik2, 0, gstrik2, gstrik2, blzntrnd, ROT0, "Human Amusement", "Grand Striker 2 (Japan)", GAME_IMPERFECT_GRAPHICS ) // priority between rounds +GAME( 1999, batlbubl, bangball, batlbubl, batlbubl, balcube, ROT0, "Limenko", "Battle Bubble (v2.00)", 0 ) +GAME( 1996, mouja, 0, mouja, mouja, mouja, ROT0, "Etona", "Mouja (Japan)", GAME_NO_COCKTAIL ) +GAME( 1997, gakusai, 0, gakusai, gakusai, gakusai, ROT0, "MakeSoft", "Mahjong Gakuensai (Japan)", GAME_IMPERFECT_GRAPHICS ) +GAME( 1998, gakusai2, 0, gakusai2, gakusai, gakusai, ROT0, "MakeSoft", "Mahjong Gakuensai 2 (Japan)", 0 ) +GAME( 2000, puzzlet, 0, puzzlet, puzzlet, puzzlet, ROT0, "Yunizu Corporation", "Puzzlet (Japan)", GAME_NOT_WORKING | GAME_NO_SOUND ) diff --git a/src/mame/mamedriv.c b/src/mame/mamedriv.c index 1f2bc7c2933..b725c96ac96 100644 --- a/src/mame/mamedriv.c +++ b/src/mame/mamedriv.c @@ -6955,6 +6955,7 @@ Other Sun games DRIVER( hyprduel ) /* (c) 1993 Technosoft (World) */ DRIVER( hyprdelj ) /* (c) 1993 Technosoft (Japan) */ DRIVER( magerror ) /* (c) 199? Technosoft (Japan) */ + DRIVER( puzzlet ) /* (c) 2000 Yunizu Corporation (Japan) */ /* Venture Line games */ DRIVER( spcforce ) /* (c) 1980 Venture Line */ diff --git a/src/mame/video/metro.c b/src/mame/video/metro.c index ae3bfb3e97a..d64b40f974e 100644 --- a/src/mame/video/metro.c +++ b/src/mame/video/metro.c @@ -906,9 +906,10 @@ VIDEO_UPDATE( metro ) } -#if 0 +#if MAME_DEBUG if (input_code_pressed(KEYCODE_Z)) -{ int msk = 0; +{ + int msk = 0; if (input_code_pressed(KEYCODE_Q)) msk |= 1; if (input_code_pressed(KEYCODE_W)) msk |= 2; if (input_code_pressed(KEYCODE_E)) msk |= 4; @@ -920,7 +921,8 @@ if (input_code_pressed(KEYCODE_Z)) popmessage("l %x-%x-%x r %04x %04x %04x", (metro_videoregs[0x10/2]&0x30)>>4,(metro_videoregs[0x10/2]&0xc)>>2,metro_videoregs[0x10/2]&3, metro_videoregs[0x02/2], metro_videoregs[0x12/2], - *metro_screenctrl); } + *metro_screenctrl); +} #endif if (has_zoom) K053936_0_zoom_draw(bitmap,cliprect,metro_K053936_tilemap,0,0); |