diff options
author | 2016-11-14 10:16:58 +0100 | |
---|---|---|
committer | 2016-11-14 10:16:58 +0100 | |
commit | 9f25bbeacc7759dde4c606c9fe3b71677c2192ea (patch) | |
tree | 8e2221ba5d99c1311e47e1aa2c3884481c3ee2e5 | |
parent | 2d57012beebba7ea94c17162a4b165b098157dbd (diff) | |
parent | 377ddbf4f1b3ce417d84ac66a07a55a86a097152 (diff) |
Merge branch 'master' into cashier-knifecashier-knife
Conflicts:
src/emu/rendlay.cpp
src/osd/modules/osdwindow.cpp
src/osd/modules/render/d3d/d3dhlsl.cpp
src/osd/modules/render/drawogl.cpp
232 files changed, 9086 insertions, 8478 deletions
diff --git a/3rdparty/lua-linenoise/linenoise_none.c b/3rdparty/lua-linenoise/linenoise_none.c new file mode 100644 index 00000000000..1cb1564f595 --- /dev/null +++ b/3rdparty/lua-linenoise/linenoise_none.c @@ -0,0 +1,6 @@ +#include <lua.h> + +int luaopen_linenoise(lua_State *L) +{ + return 1; +} diff --git a/3rdparty/luafilesystem/src/lfs.c b/3rdparty/luafilesystem/src/lfs.c index ca89223e8f2..4eed5d99a9c 100644 --- a/3rdparty/luafilesystem/src/lfs.c +++ b/3rdparty/luafilesystem/src/lfs.c @@ -288,7 +288,7 @@ static int lfs_lock_dir(lua_State *L) { lua_pushnil(L); lua_pushstring(L, strerror(errno)); return 2; } strcpy(ln, path); strcat(ln, lockfile); - if((fd = CreateFile(ln, GENERIC_WRITE, 0, NULL, CREATE_NEW, + if((fd = CreateFileA(ln, GENERIC_WRITE, 0, NULL, CREATE_NEW, FILE_ATTRIBUTE_NORMAL | FILE_FLAG_DELETE_ON_CLOSE, NULL)) == INVALID_HANDLE_VALUE) { int en = GetLastError(); free(ln); lua_pushnil(L); diff --git a/hash/megadriv.xml b/hash/megadriv.xml index 962305ec3bc..d2b1b7e2e16 100644 --- a/hash/megadriv.xml +++ b/hash/megadriv.xml @@ -1681,7 +1681,26 @@ Info on Sega chip labels (from Sunbeam / Digital Corruption) </dataarea> </part> </software> - + + <software name="coolspotp" cloneof="coolspot"> + <description>Cool Spot (Euro, Prototype)</description> + <year>1993</year> + <publisher>Virgin Games</publisher> + <part name="cart" interface="megadriv_cart"> + <feature name="pcb" value="171-5694-01"/> + <feature name="ic1" value="IC1"/> <!-- EPROM1 --> + <feature name="ic2" value="IC2"/> <!-- EPROM2 --> + <feature name="ic3" value="IC3"/> <!-- EPROM3 --> + <feature name="ic4" value="IC4"/> <!-- EPROM4 --> + <feature name="ic5" value="IC5"/> <!-- 74HC139P --> + <dataarea name="rom" width="16" endianness="big" size="1048576"> + <rom name="Cool Spot Sega Mega Drive EP ROM 0 of 4.ic1" size="262144" crc="eaa7a911" sha1="663b8394eee1d6b679db7ae45ee39df9e3aaabd6" offset="0x000000"/> + <rom name="Cool Spot Sega Mega Drive EP ROM 1 of 4.ic2" size="262144" crc="c7bc6cfb" sha1="e5d818993d162b5f2ed18b74848a514525cfd587" offset="0x040000"/> + <rom name="Cool Spot Sega Mega Drive EP ROM 2 of 4.ic3" size="262144" crc="3dff64f4" sha1="380c1e183769d8a32b9e52ce7465090ac3872580" offset="0x080000"/> + <rom name="Cool Spot Sega Mega Drive EP ROM 3 of 4.ic4" size="262144" crc="8fcce53a" sha1="cbe736a696319771b670c6c539f49d7d1956cd8e" offset="0x0c0000"/> + </dataarea> + </part> + </software> <software name="coolspotu" cloneof="coolspot"> <description>Cool Spot (USA)</description> diff --git a/hash/snes.xml b/hash/snes.xml index 87002f4bc8c..d3a430f1d3b 100644 --- a/hash/snes.xml +++ b/hash/snes.xml @@ -2883,6 +2883,31 @@ Beyond that last category are the roms waiting to be classified. </part> </software> + <software name="syvalionp" cloneof="syvalion"> + <!-- TeamEurope --> + <description>Syvalion (Euro, Prototype)</description> + <year>1992</year> + <publisher>Toshiba EMI</publisher> + <part name="cart" interface="snes_cart"> + <feature name="pcb" value="SHVC-2P3B-01" /> + <feature name="u1" value="U1 EPROM(J)" /> + <feature name="u2" value="U2 EPROM(J)" /> + <feature name="u3" value="U3 SRAM" /> + <feature name="u4" value="U4 74F139" /> + <feature name="u5" value="U5 CIC" /> + <feature name="lockout" value="D413 9208 C" /> + <feature name="battery" value="BATT CR2032" /> + <feature name="cart_model" value="SHVC-006" /> + <feature name="slot" value="lorom" /> + <dataarea name="rom" size="1048576"> + <rom name="SY PAL 0.u1" size="524288" crc="466f4e49" sha1="aed93ef5c31371b3278dcb59d8a116416f2994ed" offset="0x000000" /> + <rom name="SY PAL 1.u2" size="524288" crc="c3e1dac2" sha1="750f1f3dd5d2863fcb128edccc4841faf24813cc" offset="0x080000" /> + </dataarea> + <dataarea name="nvram" size="8192"> + </dataarea> + </part> + </software> + <software name="tecmonbaup" cloneof="tecmonba"> <!-- i2a2n2 --> <description>Tecmo Super NBA Basketball (USA, Prototype 19921026)</description> @@ -59495,14 +59520,15 @@ to ensure nothing has been touched in the Retro Quest cart production in 2013/20 </part> </software> - <software name="syvalionp" cloneof="syvalion"> - <description>Syvalion (Euro, Prototype)</description> + <!-- Most likely this is simply a bad dump of syvalionp. --> + <software name="syvalionp2" cloneof="syvalion"> + <description>Syvalion (Euro, Prototype 2)</description> <year>1992</year> <publisher>Toshiba EMI</publisher> <part name="cart" interface="snes_cart"> <feature name="slot" value="lorom" /> <dataarea name="rom" size="1048576"> - <rom name="syvalion (europe) (beta).sfc" size="1048576" crc="be122755" sha1="ddfa611f1177f371c1107dbd8e8ecdb19011a232" offset="0x000000" /> + <rom name="syvalion (europe) (beta).sfc" size="1048576" crc="be122755" sha1="ddfa611f1177f371c1107dbd8e8ecdb19011a232" offset="0x000000" status="baddump" /> </dataarea> </part> </software> @@ -1043,7 +1043,7 @@ endif .PHONY: vs2015_uwp vs2015_uwp: generate - $(SILENT) $(GENIE) $(PARAMS) $(TARGET_PARAMS) --vs=winstore82 --osd=windows --NO_USE_MIDI=1 --NO_OPENGL=1 --USE_QTDEBUG=0 --MODERN_WIN_API=1 vs2015 + $(SILENT) $(GENIE) $(PARAMS) $(TARGET_PARAMS) --vs=winstore82 --osd=uwp --NO_USE_MIDI=1 --NO_OPENGL=1 --USE_QTDEBUG=0 --MODERN_WIN_API=1 vs2015 ifdef MSBUILD $(SILENT) msbuild.exe $(PROJECTDIR_WIN)/vs2015-winstore82/$(PROJECT_NAME).sln $(MSBUILD_PARAMS) endif diff --git a/plugins/data/data_command.lua b/plugins/data/data_command.lua index a868b792c22..6923d80c1e8 100644 --- a/plugins/data/data_command.lua +++ b/plugins/data/data_command.lua @@ -1,8 +1,10 @@ local dat = {} local info, ver - local datread = require("data/load_dat") -datread, ver = datread.open("command.dat", nil) +do + local convert = require("data/button_char") + datread, ver = datread.open("command.dat", "# Command List%-Shorthand", convert) +end function dat.check(set, softlist) if softlist or not datread then @@ -13,8 +15,7 @@ function dat.check(set, softlist) if not status or not info then return nil end - local convert = require("data/button_char") - info = "#jf\n" .. convert(info) + info = "#jf\n" .. info return "Command" end diff --git a/plugins/data/data_mameinfo.lua b/plugins/data/data_mameinfo.lua index 5f42fe6a36f..9246c393e3e 100644 --- a/plugins/data/data_mameinfo.lua +++ b/plugins/data/data_mameinfo.lua @@ -1,7 +1,7 @@ local dat = {} local ver, info local datread = require("data/load_dat") -datread, ver = datread.open("mameinfo.dat", "# MAMEINFO.DAT") +datread, ver = datread.open("mameinfo.dat", "# MAMEINFO.DAT", function(str) return str:gsub("\n\n", "\n") end) function dat.check(set, softlist) if softlist or not datread then @@ -17,7 +17,6 @@ function dat.check(set, softlist) if drvinfo then info = info .. "\n\n--- DRIVER INFO ---\nDriver: " .. sourcefile .. "\n\n" .. drvinfo end - info = info:gsub("\n\n", "\n") return "Mameinfo" end diff --git a/plugins/data/data_messinfo.lua b/plugins/data/data_messinfo.lua index 86949e30431..f77463f1617 100644 --- a/plugins/data/data_messinfo.lua +++ b/plugins/data/data_messinfo.lua @@ -2,7 +2,7 @@ local dat = {} local ver, info local datread = require("data/load_dat") -datread, ver = datread.open("messinfo.dat", "# MESSINFO.DAT") +datread, ver = datread.open("messinfo.dat", "# MESSINFO.DAT", function(str) return str:gsub("\n\n", "\n") end) function dat.check(set, softlist) if softlist or not datread then @@ -18,7 +18,6 @@ function dat.check(set, softlist) if drvinfo then info = info .. "\n\n--- DRIVER INFO ---\nDriver: " .. sourcefile .. "\n\n" .. drvinfo end - info = info:gsub("\n\n", "\n") return "Messinfo" end diff --git a/plugins/data/load_dat.lua b/plugins/data/load_dat.lua index 3e9f88dab80..881ed40f5b3 100644 --- a/plugins/data/load_dat.lua +++ b/plugins/data/load_dat.lua @@ -1,95 +1,163 @@ +local sql = require("lsqlite3") local datfile = {} +local db = sql.open(lfs.env_replace(mame_manager:ui():options().entries.historypath:value():match("([^;]+)")) .. "/history.db") +if db then + local found = false + db:exec("select * from sqllite_master where name = version", function() found = true return 0 end) + if not found then + db:exec([[ + CREATE TABLE version ( + version VARCHAR NOT NULL, + datfile VARCHAR UNIQUE NOT NULL)]]) + end +end + +function datfile.open(file, vertag, fixupcb) + if not db then + return nil + end + local function read(tag1, tag2, set) + local data + local stmt = db:prepare("SELECT f.data FROM \"" .. file .. "_idx\" AS fi, \"" .. file .. [[" + AS f WHERE fi.type = ? AND fi.val = ? AND fi.romset = ? AND f.rowid = fi.data]]) + stmt:bind_values(tag1, tag2, set) + if stmt:step() == sql.ROW then + data = stmt:get_value(0) + end + stmt:finalize() + return data + end -function datfile.open(file, vertag) - local data = {} - local ver + local ver, dbver local filepath local fh + for path in mame_manager:ui():options().entries.historypath:value():gmatch("([^;]+)") do filepath = lfs.env_replace(path) .. "/" .. file - fh = io.open(filepath, "rb") + fh = io.open(filepath, "r") if fh then break end + return end - if not fh then + -- remove unsafe chars from file for use in sql statement + file = file:gsub("[^%w%._]", "") + + local stmt = db:prepare("SELECT version FROM version WHERE datfile = ?") + stmt:bind_values(file) + if stmt:step() == sql.ROW then + dbver = stmt:get_value(0) + end + stmt:finalize() + + if not dbver then + db:exec("CREATE TABLE \"" .. file .. [[_idx" ( + type VARCHAR NOT NULL, + val VARCHAR NOT NULL, + romset VARCHAR NOT NULL, + data INTEGER NOT NULL)]]) + db:exec("CREATE TABLE \"" .. file .. "\" (data CLOB NOT NULL)") + db:exec("CREATE INDEX \"typeval_" .. file .. "\" ON \"" .. file .. "_idx\"(type, val)") + elseif not fh then + -- data in database but missing file, just use what we have + return read, dbver + elseif not fh and not dbver then return nil end - do - local inblock = false - local buffer = fh:read("a") - if vertag then - local match = buffer:match(vertag .. "%s*([^%s]+)") + + if vertag then + for line in fh:lines() do + local match = line:match(vertag .. "%s*([^%s]+)") if match then ver = match + break end end + else + -- use file ctime for version + ver = tostring(lfs.attributes(filepath, "change")) + end + if ver == dbver then + return read, dbver + end + + if dbver then + db:exec("DELETE FROM \"" .. file .. "\"") + db:exec("DELETE FROM \"" .. file .. "_idx\"") + stmt = db:prepare("UPDATE version SET version = ? WHERE datfile = ?") + else + stmt = db:prepare("INSERT INTO version VALUES (?, ?)") + end + stmt:bind_values(ver, file) + stmt:step() + stmt:finalize() + + do + local inblock = false + fh:seek("set") + local buffer = fh:read("a") + db:exec("BEGIN TRANSACTION") local function gmatchpos() local pos = 1 local function iter() - local spos, epos = buffer:find("\n$", pos, true) - if not spos then - return nil + local tag1, tag2, data, start, inblock = false + while not data do + local spos, epos, match = buffer:find("\n($[^\n]*)", pos) + if not spos then + return nil + end + if match ~= "$end" and not inblock then + if not tag1 then + tag1 = match + else + tag2 = match + start = epos + 1 + inblock = true + end + elseif inblock == true then + data = buffer:sub(start, spos) + inblock = false + end + pos = epos end - spos = spos + 1 - local spos, epos, match = buffer:find("([^\n]+)", spos) - pos = epos + 1 - return match, pos, iter + return tag1, tag2, data end return iter end - for line, epos, iter in gmatchpos() do - - local flag = line:sub(1, 1) - if flag ~= "#" then - if flag == "$" then - if line:sub(1, 4) == "$end" then - inblock = false - elseif not inblock then - local tag, set = line:match("^%$([^%s=]+)=?([^%s]*)") - if set and set ~= "" then - local tags = {} - local sets = {} - local tag1 = "" - tag:gsub("([^,]+)", function(s) tags[#tags + 1] = s end) - set:gsub("([^,]+)", function(s) sets[#sets + 1] = s end) - repeat - tag1, epos = iter() - until tag1:sub(1, 1) == "$" - tag1 = tag1:match("^$([^%s]*)") - if not data[tag1] then - data[tag1] = {} - end - for num1, tag2 in pairs(tags) do - if not data[tag1][tag2] then - data[tag1][tag2] = {} - end - for num2, set in pairs(sets) do - data[tag1][tag2][set] = epos - end + for info1, info2, data in gmatchpos() do + local tag, set = info1:match("^%$([^%s=]+)=?([^%s]*)") + if set and set ~= "" then + local tags = {} + local sets = {} + tag:gsub("([^,]+)", function(s) tags[#tags + 1] = s end) + set:gsub("([^,]+)", function(s) sets[#sets + 1] = s end) + if #tags > 0 and #sets > 0 then + local tag1 = info2:match("^$([^%s]*)") + if fixupcb then + data = fixupcb(data) + end + stmt = db:prepare("INSERT INTO \"" .. file .. "\" VALUES (?)") + stmt:bind_values(data) + stmt:step() + local row = stmt:last_insert_rowid() + stmt:finalize() + for num1, tag2 in pairs(tags) do + for num2, set in pairs(sets) do + if fixupcb then + fixupcb(data) end + stmt = db:prepare("INSERT INTO \"" .. file .. "_idx\" VALUES (?, ?, ?, ?)") + stmt:bind_values(tag1, tag2, set, row) + stmt:step() + stmt:finalize() end - inblock = true end end end end + db:exec("END TRANSACTION") end fh:close() - fh = io.open(filepath, "r") - local function read(tag1, tag2, set) - local output = {} - if not data[tag1][tag2][set] then - return nil - end - fh:seek("set", data[tag1][tag2][set]) - for line in fh:lines() do - if line:sub(1, 4) == "$end" then - return table.concat(output, "\n") - end - output[#output + 1] = line - end - end return read, ver end diff --git a/plugins/timer/init.lua b/plugins/timer/init.lua index 3f833b56eaa..c0f47836398 100644 --- a/plugins/timer/init.lua +++ b/plugins/timer/init.lua @@ -12,7 +12,8 @@ exports.author = { name = "Carl" } local timer = exports function timer.startplugin() - local timer_db = "timer/timer.db" + local dir = lfs.env_replace(manager:options().entries.homepath:value()) + local timer_db = dir .. "/timer/timer.db" local timer_started = false local total_time = 0 local start_time = 0 @@ -43,7 +44,7 @@ function timer.startplugin() save() end timer_started = true - lfs.mkdir('timer') + lfs.mkdir(dir .. '/timer') local db = assert(sqlite3.open(timer_db)) local found=false db:exec([[select * from sqlite_master where name='timer';]], function(...) found=true return 0 end) diff --git a/scripts/genie.lua b/scripts/genie.lua index 576b031bd22..12bef987a0d 100644 --- a/scripts/genie.lua +++ b/scripts/genie.lua @@ -495,6 +495,12 @@ end configuration {} +if _OPTIONS["osd"] == "uwp" then + windowstargetplatformversion("10.0.14393.0") + windowstargetplatformminversion("10.0.14393.0") + premake._filelevelconfig = true +end + msgcompile ("Compiling $(subst ../,,$<)...") msgcompile_objc ("Objective-C compiling $(subst ../,,$<)...") diff --git a/scripts/resources/uwp/Package.appxmanifest b/scripts/resources/uwp/Package.appxmanifest new file mode 100644 index 00000000000..60092db9fed --- /dev/null +++ b/scripts/resources/uwp/Package.appxmanifest @@ -0,0 +1,36 @@ +<?xml version="1.0" encoding="utf-8"?> +<Package xmlns="http://schemas.microsoft.com/appx/manifest/foundation/windows10" xmlns:mp="http://schemas.microsoft.com/appx/2014/phone/manifest" xmlns:uap="http://schemas.microsoft.com/appx/manifest/uap/windows10" IgnorableNamespaces="uap mp"> + <Identity Name="f0273023-de0a-46a5-b0db-1514f3a84c71" Publisher="CN=bradhugh" Version="1.0.0.0" /> + <mp:PhoneIdentity PhoneProductId="f0273023-de0a-46a5-b0db-1514f3a84c71" PhonePublisherId="00000000-0000-0000-0000-000000000000" /> + <Properties> + <DisplayName>MAME</DisplayName> + <PublisherDisplayName>MAME Team</PublisherDisplayName> + <Logo>scripts\resources\uwp\assets\StoreLogo.png</Logo> + </Properties> + <Dependencies> + <TargetDeviceFamily Name="Windows.Universal" MinVersion="10.0.0.0" MaxVersionTested="10.0.0.0" /> + </Dependencies> + <Resources> + <Resource Language="x-generate" /> + </Resources> + <Applications> + <Application Id="App" Executable="$targetnametoken$.exe" EntryPoint="Mameuwp.App"> + <uap:VisualElements DisplayName="MAME" Square150x150Logo="scripts\resources\uwp\assets\Square150x150Logo.png" Square44x44Logo="scripts\resources\uwp\assets\Square44x44Logo.png" Description="MAME for Windows 10" BackgroundColor="transparent"> + <uap:DefaultTile Wide310x150Logo="scripts\resources\uwp\assets\Wide310x150Logo.png"> + <uap:ShowNameOnTiles> + <uap:ShowOn Tile="square150x150Logo" /> + </uap:ShowNameOnTiles> + </uap:DefaultTile> + <uap:SplashScreen Image="scripts\resources\uwp\assets\SplashScreen.scale-200.png" /> + <uap:InitialRotationPreference> + <uap:Rotation Preference="landscape" /> + </uap:InitialRotationPreference> + </uap:VisualElements> + </Application> + </Applications> + <Capabilities> + <Capability Name="internetClient" /> + <Capability Name="codeGeneration" /> + <Capability Name="privateNetworkClientServer" /> + </Capabilities> +</Package>
\ No newline at end of file diff --git a/scripts/resources/uwp/assets/LockScreenLogo.scale-200.png b/scripts/resources/uwp/assets/LockScreenLogo.scale-200.png Binary files differnew file mode 100644 index 00000000000..989319d4ec3 --- /dev/null +++ b/scripts/resources/uwp/assets/LockScreenLogo.scale-200.png diff --git a/scripts/resources/uwp/assets/SplashScreen.scale-200.png b/scripts/resources/uwp/assets/SplashScreen.scale-200.png Binary files differnew file mode 100644 index 00000000000..538a6ad95a9 --- /dev/null +++ b/scripts/resources/uwp/assets/SplashScreen.scale-200.png diff --git a/scripts/resources/uwp/assets/Square150x150Logo.scale-200.png b/scripts/resources/uwp/assets/Square150x150Logo.scale-200.png Binary files differnew file mode 100644 index 00000000000..15b8043caa8 --- /dev/null +++ b/scripts/resources/uwp/assets/Square150x150Logo.scale-200.png diff --git a/scripts/resources/uwp/assets/Square44x44Logo.scale-200.png b/scripts/resources/uwp/assets/Square44x44Logo.scale-200.png Binary files differnew file mode 100644 index 00000000000..420dc54bf73 --- /dev/null +++ b/scripts/resources/uwp/assets/Square44x44Logo.scale-200.png diff --git a/scripts/resources/uwp/assets/Square44x44Logo.targetsize-24_altform-unplated.png b/scripts/resources/uwp/assets/Square44x44Logo.targetsize-24_altform-unplated.png Binary files differnew file mode 100644 index 00000000000..ba31e4f883f --- /dev/null +++ b/scripts/resources/uwp/assets/Square44x44Logo.targetsize-24_altform-unplated.png diff --git a/scripts/resources/uwp/assets/StoreLogo.png b/scripts/resources/uwp/assets/StoreLogo.png Binary files differnew file mode 100644 index 00000000000..a16e59dcee9 --- /dev/null +++ b/scripts/resources/uwp/assets/StoreLogo.png diff --git a/scripts/resources/uwp/assets/Wide310x150Logo.scale-200.png b/scripts/resources/uwp/assets/Wide310x150Logo.scale-200.png Binary files differnew file mode 100644 index 00000000000..b6fd1f57bca --- /dev/null +++ b/scripts/resources/uwp/assets/Wide310x150Logo.scale-200.png diff --git a/scripts/src/3rdparty.lua b/scripts/src/3rdparty.lua index fc9e157635b..061f3867922 100644 --- a/scripts/src/3rdparty.lua +++ b/scripts/src/3rdparty.lua @@ -197,6 +197,11 @@ if _OPTIONS["vs"]=="intel-15" then } end + configuration { "winstore*" } + defines { + "NO_GETENV" + } + configuration { } files { @@ -377,6 +382,10 @@ end "/wd4456", -- warning C4456: declaration of 'xxx' hides previous local declaration "/wd4457", -- warning C4457: declaration of 'xxx' hides function parameter } + configuration { "winstore*" } + forcedincludes { + MAME_DIR .. "src/osd/uwp/uwpcompat.h" + } configuration { } defines { @@ -463,6 +472,12 @@ if _OPTIONS["vs"]=="intel-15" then "/Qwd592", -- error #592: variable "xxx" is used before its value is set } end + + configuration { "winstore*" } + forcedincludes { + MAME_DIR .. "src/osd/uwp/uwpcompat.h", + } + configuration { } defines { "LUA_COMPAT_ALL", @@ -555,20 +570,39 @@ project "lualibs" includedirs { MAME_DIR .. "3rdparty", + } +if (_OPTIONS["osd"] ~= "uwp") then + includedirs { MAME_DIR .. "3rdparty/linenoise-ng/include", } +end includedirs { ext_includedir("lua"), ext_includedir("zlib"), ext_includedir("sqlite3"), } + configuration { "winstore*" } + forcedincludes { + MAME_DIR .. "src/osd/uwp/uwpcompat.h" + } + + configuration {} + files { MAME_DIR .. "3rdparty/lsqlite3/lsqlite3.c", MAME_DIR .. "3rdparty/lua-zlib/lua_zlib.c", MAME_DIR .. "3rdparty/luafilesystem/src/lfs.c", + } +if (_OPTIONS["osd"] == "uwp") then + files { + MAME_DIR .. "3rdparty/lua-linenoise/linenoise_none.c", + } +else + files { MAME_DIR .. "3rdparty/lua-linenoise/linenoise.c", } +end -------------------------------------------------- -- SQLite3 library objects @@ -586,11 +620,16 @@ project "sqlite3" "-Wno-bad-function-cast", "-Wno-undef", } -if _OPTIONS["gcc"]~=nil and string.find(_OPTIONS["gcc"], "clang") then +if _OPTIONS["gcc"]~=nil and ((string.find(_OPTIONS["gcc"], "clang") or string.find(_OPTIONS["gcc"], "asmjs") or string.find(_OPTIONS["gcc"], "android"))) then buildoptions_c { "-Wno-incompatible-pointer-types-discards-qualifiers", } end + configuration { "winstore*" } + defines { + "SQLITE_OS_WINRT", + } + configuration { } files { @@ -1514,7 +1553,7 @@ end -------------------------------------------------- -- linenoise-ng library -------------------------------------------------- - +if (_OPTIONS["osd"] ~= "uwp") then project "linenoise-ng" uuid "7320ffc8-2748-4add-8864-ae29b72a8511" kind (LIBTYPE) @@ -1537,3 +1576,4 @@ project "linenoise-ng" MAME_DIR .. "3rdparty/linenoise-ng/src/linenoise.cpp", MAME_DIR .. "3rdparty/linenoise-ng/src/wcwidth.cpp", } +end
\ No newline at end of file diff --git a/scripts/src/main.lua b/scripts/src/main.lua index e231ffe065b..c3c4ac235be 100644 --- a/scripts/src/main.lua +++ b/scripts/src/main.lua @@ -48,6 +48,10 @@ end "ppapi_gles2", "pthread", } + + configuration { "winstore*" } + kind "WindowedApp" + configuration { } addprojectflags() @@ -69,6 +73,36 @@ end "Unicode", } + configuration { "winstore*" } + -- Windows Required Files + files { + -- Manifest file + MAME_DIR .. "scripts/resources/uwp/Package.appxmanifest", + } + + configuration { "winstore*" } + files { + MAME_DIR .. "scripts/resources/uwp/assets/*.png" + } + configuration "**/scripts/resources/uwp/assets/*.png" + flags { "DeploymentContent" } + + -- Effects and Shaders + configuration { "winstore*" } + files { + MAME_DIR .. "artwork/*", + MAME_DIR .. "artwork/**/*", + MAME_DIR .. "bgfx/*", + MAME_DIR .. "bgfx/**/*", + MAME_DIR .. "hash/*", + MAME_DIR .. "language/*", + MAME_DIR .. "language/**/*", + MAME_DIR .. "plugins/*", + MAME_DIR .. "plugins/**/*", + } + configuration "**/*" + flags { "DeploymentContent" } + configuration { "x64", "Release" } targetsuffix "64" if _OPTIONS["PROFILE"] then @@ -233,9 +267,13 @@ if (STANDALONE~=true) then links { ext_lib("lua"), "lualibs", + } +if (_OPTIONS["osd"] ~= "uwp") then + links { "linenoise-ng", } end +end links { ext_lib("zlib"), ext_lib("flac"), diff --git a/scripts/src/osd/modules.lua b/scripts/src/osd/modules.lua index 128b811c0fc..88bf69a3671 100644 --- a/scripts/src/osd/modules.lua +++ b/scripts/src/osd/modules.lua @@ -101,6 +101,7 @@ function osdmodulesbuild() MAME_DIR .. "src/osd/modules/input/input_xinput.cpp", MAME_DIR .. "src/osd/modules/input/input_xinput.h", MAME_DIR .. "src/osd/modules/input/input_winhybrid.cpp", + MAME_DIR .. "src/osd/modules/input/input_uwp.cpp", MAME_DIR .. "src/osd/modules/output/output_module.h", MAME_DIR .. "src/osd/modules/output/none.cpp", MAME_DIR .. "src/osd/modules/output/console.cpp", diff --git a/scripts/src/osd/sdl_cfg.lua b/scripts/src/osd/sdl_cfg.lua index 4c7c5d4e225..b8f24d27d3b 100644 --- a/scripts/src/osd/sdl_cfg.lua +++ b/scripts/src/osd/sdl_cfg.lua @@ -111,10 +111,6 @@ if _OPTIONS["targetos"]=="windows" then "_WIN32_WINNT=0x0501", } - configuration { "Debug" } - defines { - "MALLOC_DEBUG", - } configuration { } elseif _OPTIONS["targetos"]=="linux" then diff --git a/scripts/src/osd/uwp.lua b/scripts/src/osd/uwp.lua new file mode 100644 index 00000000000..540116fe018 --- /dev/null +++ b/scripts/src/osd/uwp.lua @@ -0,0 +1,121 @@ +-- license:BSD-3-Clause +-- copyright-holders:MAMEdev Team + +--------------------------------------------------------------------------- +-- +-- uwp.lua +-- +-- Rules for the building of UWP OSD +-- +--------------------------------------------------------------------------- + +dofile("modules.lua") + +function maintargetosdoptions(_target,_subtarget) +end + +project ("qtdbg_" .. _OPTIONS["osd"]) + uuid (os.uuid("qtdbg_" .. _OPTIONS["osd"])) + kind (LIBTYPE) + + dofile("uwp_cfg.lua") + includedirs { + MAME_DIR .. "src/emu", + MAME_DIR .. "src/devices", -- accessing imagedev from debugger + MAME_DIR .. "src/osd", + MAME_DIR .. "src/lib", + MAME_DIR .. "src/lib/util", + MAME_DIR .. "src/osd/modules/render", + MAME_DIR .. "3rdparty", + } + removeflags { + "SingleOutputDir", + } + + files { + MAME_DIR .. "src/osd/modules/debugger/debugqt.cpp", + } + +project ("osd_" .. _OPTIONS["osd"]) + uuid (os.uuid("osd_" .. _OPTIONS["osd"])) + kind (LIBTYPE) + + removeflags { + "SingleOutputDir", + } + + dofile("uwp_cfg.lua") + osdmodulesbuild() + + includedirs { + MAME_DIR .. "src/emu", + MAME_DIR .. "src/devices", -- accessing imagedev from debugger + MAME_DIR .. "src/osd", + MAME_DIR .. "src/lib", + MAME_DIR .. "src/lib/util", + MAME_DIR .. "src/osd/modules/file", + MAME_DIR .. "src/osd/modules/render", + MAME_DIR .. "3rdparty", + } + + includedirs { + MAME_DIR .. "src/osd/uwp", + MAME_DIR .. "src/osd/windows", + } + + files { + MAME_DIR .. "src/osd/uwp/video.cpp", + MAME_DIR .. "src/osd/uwp/video.h", + MAME_DIR .. "src/osd/uwp/window.cpp", + MAME_DIR .. "src/osd/uwp/window.h", + MAME_DIR .. "src/osd/windows/winutf8.cpp", + MAME_DIR .. "src/osd/windows/winutf8.h", + MAME_DIR .. "src/osd/modules/osdwindow.cpp", + MAME_DIR .. "src/osd/modules/osdwindow.h", + MAME_DIR .. "src/osd/windows/winmain.cpp", + MAME_DIR .. "src/osd/windows/winmain.h", + MAME_DIR .. "src/osd/modules/render/drawnone.cpp", + MAME_DIR .. "src/osd/modules/render/drawnone.h", + MAME_DIR .. "src/osd/uwp/uwpcompat.cpp", + MAME_DIR .. "src/osd/uwp/uwpcompat.h", + MAME_DIR .. "src/osd/osdepend.h", + } + +project ("ocore_" .. _OPTIONS["osd"]) + uuid (os.uuid("ocore_" .. _OPTIONS["osd"])) + kind (LIBTYPE) + + removeflags { + "SingleOutputDir", + } + + dofile("uwp_cfg.lua") + + includedirs { + MAME_DIR .. "3rdparty", + MAME_DIR .. "src/emu", + MAME_DIR .. "src/osd", + MAME_DIR .. "src/osd/modules/file", + MAME_DIR .. "src/lib", + MAME_DIR .. "src/lib/util", + } + + files { + MAME_DIR .. "src/osd/osdcomm.h", + MAME_DIR .. "src/osd/osdcore.cpp", + MAME_DIR .. "src/osd/osdcore.h", + MAME_DIR .. "src/osd/strconv.cpp", + MAME_DIR .. "src/osd/strconv.h", + MAME_DIR .. "src/osd/osdsync.cpp", + MAME_DIR .. "src/osd/osdsync.h", + MAME_DIR .. "src/osd/windows/winutil.cpp", + MAME_DIR .. "src/osd/windows/winutil.h", + MAME_DIR .. "src/osd/modules/osdmodule.cpp", + MAME_DIR .. "src/osd/modules/osdmodule.h", + MAME_DIR .. "src/osd/modules/file/winrtdir.cpp", + MAME_DIR .. "src/osd/modules/file/winrtfile.cpp", + MAME_DIR .. "src/osd/modules/file/winrtfile.h", + MAME_DIR .. "src/osd/modules/file/winrtptty.cpp", + MAME_DIR .. "src/osd/modules/file/winrtsocket.cpp", + MAME_DIR .. "src/osd/modules/lib/osdlib_uwp.cpp", + } diff --git a/scripts/src/osd/uwp_cfg.lua b/scripts/src/osd/uwp_cfg.lua new file mode 100644 index 00000000000..234327aada0 --- /dev/null +++ b/scripts/src/osd/uwp_cfg.lua @@ -0,0 +1,18 @@ +-- license:BSD-3-Clause +-- copyright-holders:MAMEdev Team + +defines { + "OSD_UWP=1", + "USE_QTDEBUG=0", + "SDLMAME_NOASM=1", + "USE_OPENGL=0", + "NO_USE_MIDI=1", + "WINVER=0x0603", + "_WIN32_WINNT=0x0603", + "NTDDI_VERSION=0x06030000", + "MODERN_WIN_API", +} + +flags { + "Unicode", +} diff --git a/scripts/src/osd/windows_cfg.lua b/scripts/src/osd/windows_cfg.lua index b7636e5b435..1ba0efe6151 100644 --- a/scripts/src/osd/windows_cfg.lua +++ b/scripts/src/osd/windows_cfg.lua @@ -12,11 +12,6 @@ configuration { "mingw* or vs*" } "main=utf8_main", } -configuration { "Debug" } - defines { - "MALLOC_DEBUG", - } - configuration { "vs*" } flags { "Unicode", diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index 2b099d410b0..f3670262e62 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -3433,8 +3433,8 @@ files { createMAMEProjects(_target, _subtarget, "sony") files { MAME_DIR .. "src/mame/drivers/zn.cpp", - MAME_DIR .. "src/mame/machine/zndip.cpp", - MAME_DIR .. "src/mame/machine/zndip.h", + MAME_DIR .. "src/mame/machine/znmcu.cpp", + MAME_DIR .. "src/mame/machine/znmcu.h", MAME_DIR .. "src/mame/machine/cat702.cpp", MAME_DIR .. "src/mame/machine/cat702.h", } @@ -4341,11 +4341,11 @@ files { MAME_DIR .. "src/mame/machine/cdicdic.cpp", MAME_DIR .. "src/mame/machine/cdicdic.h", MAME_DIR .. "src/mame/drivers/cedar_magnet.cpp", - MAME_DIR .. "src/mame/drivers/cedar_magnet_sound.cpp", - MAME_DIR .. "src/mame/drivers/cedar_magnet_plane.cpp", - MAME_DIR .. "src/mame/drivers/cedar_magnet_sprite.cpp", - MAME_DIR .. "src/mame/drivers/cedar_magnet_board.cpp", - MAME_DIR .. "src/mame/drivers/cedar_magnet_flop.cpp", + MAME_DIR .. "src/mame/machine/cedar_magnet_sound.cpp", + MAME_DIR .. "src/mame/machine/cedar_magnet_plane.cpp", + MAME_DIR .. "src/mame/machine/cedar_magnet_sprite.cpp", + MAME_DIR .. "src/mame/machine/cedar_magnet_board.cpp", + MAME_DIR .. "src/mame/machine/cedar_magnet_flop.cpp", MAME_DIR .. "src/mame/drivers/cesclass.cpp", MAME_DIR .. "src/mame/drivers/chance32.cpp", MAME_DIR .. "src/mame/drivers/chexx.cpp", diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua index fe26b9885c8..ccc0f9f2cba 100644 --- a/scripts/target/mame/mess.lua +++ b/scripts/target/mame/mess.lua @@ -2860,6 +2860,7 @@ files { MAME_DIR .. "src/mame/drivers/ts802.cpp", MAME_DIR .. "src/mame/drivers/ts803.cpp", MAME_DIR .. "src/mame/drivers/ts816.cpp", + MAME_DIR .. "src/mame/drivers/tv910.cpp", MAME_DIR .. "src/mame/drivers/tv950.cpp", MAME_DIR .. "src/mame/drivers/tv990.cpp", } diff --git a/scripts/toolchain.lua b/scripts/toolchain.lua index 6f5476bdd0a..99a3647b6ec 100644 --- a/scripts/toolchain.lua +++ b/scripts/toolchain.lua @@ -468,6 +468,9 @@ function toolchain(_buildDir, _subDir) "StaticRuntime", "NoExceptions", } + flags { + "WinMain" + } configuration { "mingw*" } defines { "WIN32" } diff --git a/src/devices/bus/isa/isa.h b/src/devices/bus/isa/isa.h index cd389f4b365..d4f67b55f74 100644 --- a/src/devices/bus/isa/isa.h +++ b/src/devices/bus/isa/isa.h @@ -216,7 +216,7 @@ public: } void install_device(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler); - template<typename T> void install_device(offs_t addrstart, offs_t addrend, T &device, void (T::*map)(class address_map &map, device_t &device), int bits = 8, uint64_t unitmask = U64(0xffffffffffffffff)) + template<typename T> void install_device(offs_t addrstart, offs_t addrend, T &device, void (T::*map)(class address_map &map), int bits = 8, uint64_t unitmask = U64(0xffffffffffffffff)) { m_iospace->install_device(addrstart, addrend, device, map, bits, unitmask); } diff --git a/src/devices/bus/isa/mcd.cpp b/src/devices/bus/isa/mcd.cpp index 1ee7b66ccfd..1d268f23815 100644 --- a/src/devices/bus/isa/mcd.cpp +++ b/src/devices/bus/isa/mcd.cpp @@ -89,8 +89,8 @@ bool mcd_isa_device::read_sector(bool first) if(m_mode & 0x40) { //correct the header - m_buf[12] = dec_2_bcd(m_readmsf >> 16); - m_buf[13] = dec_2_bcd(m_readmsf >> 8); + m_buf[12] = dec_2_bcd((m_readmsf >> 16) & 0xff); + m_buf[13] = dec_2_bcd((m_readmsf >> 8) & 0xff); } m_readmsf = lba_to_msf_alt(lba + 1); m_buf_count = m_dmalen + 1; diff --git a/src/devices/bus/pofo/exp.cpp b/src/devices/bus/pofo/exp.cpp index 68613967ff3..0052fd41e3c 100644 --- a/src/devices/bus/pofo/exp.cpp +++ b/src/devices/bus/pofo/exp.cpp @@ -32,7 +32,6 @@ device_portfolio_expansion_slot_interface::device_portfolio_expansion_slot_inter m_slot = dynamic_cast<portfolio_expansion_slot_t *>(device.owner()); } -WRITE_LINE_MEMBER( device_portfolio_expansion_slot_interface::iint_w ) { m_slot->iint_w(state); } WRITE_LINE_MEMBER( device_portfolio_expansion_slot_interface::eint_w ) { m_slot->eint_w(state); } WRITE_LINE_MEMBER( device_portfolio_expansion_slot_interface::nmio_w ) { m_slot->nmio_w(state); } WRITE_LINE_MEMBER( device_portfolio_expansion_slot_interface::wake_w ) { m_slot->wake_w(state); } @@ -50,7 +49,6 @@ WRITE_LINE_MEMBER( device_portfolio_expansion_slot_interface::wake_w ) { m_slot- portfolio_expansion_slot_t::portfolio_expansion_slot_t(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, PORTFOLIO_EXPANSION_SLOT, "Atari Portfolio expansion port", tag, owner, clock, "portfolio_expansion_slot", __FILE__), device_slot_interface(mconfig, *this), - m_write_iint(*this), m_write_eint(*this), m_write_nmio(*this), m_write_wake(*this), @@ -68,7 +66,6 @@ void portfolio_expansion_slot_t::device_start() m_card = dynamic_cast<device_portfolio_expansion_slot_interface *>(get_card_device()); // resolve callbacks - m_write_iint.resolve_safe(); m_write_eint.resolve_safe(); m_write_nmio.resolve_safe(); m_write_wake.resolve_safe(); diff --git a/src/devices/bus/pofo/exp.h b/src/devices/bus/pofo/exp.h index 8bfabe9bf93..4c0f512dad5 100644 --- a/src/devices/bus/pofo/exp.h +++ b/src/devices/bus/pofo/exp.h @@ -64,9 +64,6 @@ MCFG_DEVICE_ADD(_tag, PORTFOLIO_EXPANSION_SLOT, _clock) \ MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) -#define MCFG_PORTFOLIO_EXPANSION_SLOT_IINT_CALLBACK(_write) \ - devcb = &portfolio_expansion_slot_t::set_iint_wr_callback(*device, DEVCB_##_write); - #define MCFG_PORTFOLIO_EXPANSION_SLOT_EINT_CALLBACK(_write) \ devcb = &portfolio_expansion_slot_t::set_eint_wr_callback(*device, DEVCB_##_write); @@ -103,7 +100,8 @@ public: virtual uint8_t nrdi_r(address_space &space, offs_t offset, uint8_t data, bool iom, bool bcom, bool ncc1) { return data; }; virtual void nwri_w(address_space &space, offs_t offset, uint8_t data, bool iom, bool bcom, bool ncc1) { }; - DECLARE_WRITE_LINE_MEMBER( iint_w ); + virtual WRITE_LINE_MEMBER( iint_w ) { }; + DECLARE_WRITE_LINE_MEMBER( eint_w ); DECLARE_WRITE_LINE_MEMBER( nmio_w ); DECLARE_WRITE_LINE_MEMBER( wake_w ); @@ -123,7 +121,6 @@ public: portfolio_expansion_slot_t(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~portfolio_expansion_slot_t() { } - template<class _Object> static devcb_base &set_iint_wr_callback(device_t &device, _Object object) { return downcast<portfolio_expansion_slot_t &>(device).m_write_iint.set_callback(object); } template<class _Object> static devcb_base &set_eint_wr_callback(device_t &device, _Object object) { return downcast<portfolio_expansion_slot_t &>(device).m_write_eint.set_callback(object); } template<class _Object> static devcb_base &set_nmio_wr_callback(device_t &device, _Object object) { return downcast<portfolio_expansion_slot_t &>(device).m_write_nmio.set_callback(object); } template<class _Object> static devcb_base &set_wake_wr_callback(device_t &device, _Object object) { return downcast<portfolio_expansion_slot_t &>(device).m_write_wake.set_callback(object); } @@ -139,8 +136,9 @@ public: uint8_t nrdi_r(address_space &space, offs_t offset, uint8_t data, bool iom, bool bcom, bool ncc1) { return (m_card != nullptr) ? m_card->nrdi_r(space, offset, data, iom, bcom, ncc1) : data; } void nwri_w(address_space &space, offs_t offset, uint8_t data, bool iom, bool bcom, bool ncc1) { if (m_card != nullptr) m_card->nwri_w(space, offset, data, iom, bcom, ncc1); } + WRITE_LINE_MEMBER( iint_w ) { if (m_card != nullptr) m_card->iint_w(state); } + // peripheral interface - WRITE_LINE_MEMBER( iint_w ) { m_write_iint(state); } WRITE_LINE_MEMBER( eint_w ) { m_write_eint(state); } WRITE_LINE_MEMBER( nmio_w ) { m_write_nmio(state); } WRITE_LINE_MEMBER( wake_w ) { m_write_wake(state); } @@ -150,7 +148,6 @@ protected: virtual void device_start() override; virtual void device_reset() override; - devcb_write_line m_write_iint; devcb_write_line m_write_eint; devcb_write_line m_write_nmio; devcb_write_line m_write_wake; diff --git a/src/devices/bus/pofo/hpc104.cpp b/src/devices/bus/pofo/hpc104.cpp index 03c982f792e..8fb8f69c8e8 100644 --- a/src/devices/bus/pofo/hpc104.cpp +++ b/src/devices/bus/pofo/hpc104.cpp @@ -34,7 +34,6 @@ static MACHINE_CONFIG_FRAGMENT( hpc104 ) MCFG_PORTFOLIO_MEMORY_CARD_SLOT_ADD(PORTFOLIO_MEMORY_CARD_SLOT_B_TAG, portfolio_memory_cards, nullptr) MCFG_PORTFOLIO_EXPANSION_SLOT_ADD(PORTFOLIO_EXPANSION_SLOT_TAG, XTAL_4_9152MHz, portfolio_expansion_cards, nullptr) - MCFG_PORTFOLIO_EXPANSION_SLOT_IINT_CALLBACK(DEVWRITELINE(DEVICE_SELF_OWNER, portfolio_expansion_slot_t, iint_w)) MCFG_PORTFOLIO_EXPANSION_SLOT_EINT_CALLBACK(DEVWRITELINE(DEVICE_SELF_OWNER, portfolio_expansion_slot_t, eint_w)) MCFG_PORTFOLIO_EXPANSION_SLOT_NMIO_CALLBACK(DEVWRITELINE(DEVICE_SELF_OWNER, portfolio_expansion_slot_t, nmio_w)) MCFG_PORTFOLIO_EXPANSION_SLOT_WAKE_CALLBACK(DEVWRITELINE(DEVICE_SELF_OWNER, portfolio_expansion_slot_t, wake_w)) diff --git a/src/devices/bus/pofo/hpc104.h b/src/devices/bus/pofo/hpc104.h index 9dda5f9778b..3d771653c35 100644 --- a/src/devices/bus/pofo/hpc104.h +++ b/src/devices/bus/pofo/hpc104.h @@ -53,6 +53,8 @@ protected: virtual uint8_t nrdi_r(address_space &space, offs_t offset, uint8_t data, bool iom, bool bcom, bool ncc1) override; virtual void nwri_w(address_space &space, offs_t offset, uint8_t data, bool iom, bool bcom, bool ncc1) override; + virtual WRITE_LINE_MEMBER( iint_w ) override { m_exp->iint_w(state); } + private: required_device<portfolio_memory_card_slot_t> m_ccm; required_device<portfolio_expansion_slot_t> m_exp; diff --git a/src/devices/cpu/8x300/8x300dasm.cpp b/src/devices/cpu/8x300/8x300dasm.cpp index 562dbaf4693..5b66dbd1f05 100644 --- a/src/devices/cpu/8x300/8x300dasm.cpp +++ b/src/devices/cpu/8x300/8x300dasm.cpp @@ -41,9 +41,8 @@ static inline bool is_src_rot(uint16_t opcode) return true; } -CPU_DISASSEMBLE( n8x300 ) +static offs_t internal_disasm_n8x300(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { - char tmp[16]; unsigned startpc = pc; uint16_t opcode = (oprom[pc - startpc] << 8) | oprom[pc+1 - startpc]; uint8_t inst = opcode >> 13; @@ -53,99 +52,90 @@ CPU_DISASSEMBLE( n8x300 ) switch (inst) { case 0x00: - sprintf(buffer,"MOVE "); - strcat(buffer,reg_names[SRC]); + stream << "MOVE " << reg_names[SRC]; if(is_rot(opcode)) - sprintf(tmp,"(%i),",ROTLEN); + util::stream_format(stream, "(%i),", ROTLEN); else - sprintf(tmp,",%i,",ROTLEN); - strcat(buffer,tmp); - strcat(buffer,reg_names[DST]); + util::stream_format(stream, ",%i,", ROTLEN); + stream << reg_names[DST]; break; case 0x01: - sprintf(buffer,"ADD "); - strcat(buffer,reg_names[SRC]); + stream << "ADD " << reg_names[SRC]; if(is_rot(opcode)) - sprintf(tmp,"(%i),",ROTLEN); + util::stream_format(stream, "(%i),", ROTLEN); else - sprintf(tmp,",%i,",ROTLEN); - strcat(buffer,tmp); - strcat(buffer,reg_names[DST]); + util::stream_format(stream, ",%i,", ROTLEN); + stream << reg_names[DST]; break; case 0x02: - sprintf(buffer,"AND "); - strcat(buffer,reg_names[SRC]); + stream << "AND " << reg_names[SRC]; if(is_rot(opcode)) - sprintf(tmp,"(%i),",ROTLEN); + util::stream_format(stream, "(%i),", ROTLEN); else - sprintf(tmp,",%i,",ROTLEN); - strcat(buffer,tmp); - strcat(buffer,reg_names[DST]); + util::stream_format(stream, ",%i,", ROTLEN); + stream << reg_names[DST]; break; case 0x03: - sprintf(buffer,"XOR "); - strcat(buffer,reg_names[SRC]); + stream << "XOR " << reg_names[SRC]; if(is_rot(opcode)) - sprintf(tmp,"(%i),",ROTLEN); + util::stream_format(stream, "(%i),", ROTLEN); else - sprintf(tmp,",%i,",ROTLEN); - strcat(buffer,tmp); - strcat(buffer,reg_names[DST]); + util::stream_format(stream, ",%i,", ROTLEN); + stream << reg_names[DST]; break; case 0x04: - sprintf(buffer,"XEC "); - strcat(buffer,reg_names[SRC]); + stream << "XEC " << reg_names[SRC]; if(is_src_rot(opcode)) { - sprintf(tmp,",%02XH",IMM8); - strcat(buffer,tmp); + util::stream_format(stream, ",%02XH", IMM8); } else { - sprintf(tmp,",%i",ROTLEN); - strcat(buffer,tmp); - sprintf(tmp,",%02XH",IMM5); - strcat(buffer,tmp); + util::stream_format(stream, ",%i", ROTLEN); + util::stream_format(stream, ",%02XH", IMM5); } break; case 0x05: - sprintf(buffer,"NZT "); - strcat(buffer,reg_names[SRC]); + stream << "NZT " << reg_names[SRC]; if(is_src_rot(opcode)) { - sprintf(tmp,",%02XH",IMM8); - strcat(buffer,tmp); + util::stream_format(stream, ",%02XH", IMM8); } else { - sprintf(tmp,",%i",ROTLEN); - strcat(buffer,tmp); - sprintf(tmp,",%02XH",IMM5); - strcat(buffer,tmp); + util::stream_format(stream, ",%i", ROTLEN); + util::stream_format(stream, ",%02XH", IMM5); } break; case 0x06: - sprintf(buffer,"XMIT "); + stream << "XMIT "; if(is_src_rot(opcode)) { - sprintf(tmp,"%02XH,",IMM8); - strcat(buffer,tmp); - strcat(buffer,reg_names[SRC]); + util::stream_format(stream, "%02XH,", IMM8); + stream << reg_names[SRC]; } else { - sprintf(tmp,"%02XH,",IMM5); - strcat(buffer,tmp); - strcat(buffer,reg_names[SRC]); - sprintf(tmp,",%i",ROTLEN); - strcat(buffer,tmp); + util::stream_format(stream, "%02XH,", IMM5); + stream << reg_names[SRC]; + util::stream_format(stream, ",%i", ROTLEN); } break; case 0x07: - sprintf(buffer,"JMP %04XH",opcode & 0x1fff); + util::stream_format(stream, "JMP %04XH", opcode & 0x1fff); break; } return (pc - startpc); } + + +CPU_DISASSEMBLE(n8x300) +{ + std::ostringstream stream; + offs_t result = internal_disasm_n8x300(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} diff --git a/src/devices/cpu/apexc/apexcdsm.cpp b/src/devices/cpu/apexc/apexcdsm.cpp index a5d5cfbf754..6113ef2e137 100644 --- a/src/devices/cpu/apexc/apexcdsm.cpp +++ b/src/devices/cpu/apexc/apexcdsm.cpp @@ -83,7 +83,7 @@ static const instr_desc instructions[16] = { "A", store }, { "S", swap } }; -CPU_DISASSEMBLE( apexc ) +static offs_t internal_disasm_apexc(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { uint32_t instruction; /* 32-bit machine instruction */ int x, y, function, c6, vector; /* instruction fields */ @@ -114,7 +114,7 @@ CPU_DISASSEMBLE( apexc ) case two_address: case branch: case swap: - buffer += sprintf(buffer, " %-10s", mnemonic); /* 10 chars*/ + util::stream_format(stream, " %-10s", mnemonic); /* 10 chars*/ break; case shiftl: @@ -123,32 +123,32 @@ CPU_DISASSEMBLE( apexc ) n = c6; else n = 64-c6; - buffer += sprintf(buffer, " %-2s(%2d) ", mnemonic, n); /* 10 chars */ + util::stream_format(stream, " %-2s(%2d) ", mnemonic, n); /* 10 chars */ break; case multiply: n = 33-c6; if (n == 32) /* case "32" : do not show bit specifier */ - buffer += sprintf(buffer, " %-10s", mnemonic); /* 10 chars */ + util::stream_format(stream, " %-10s", mnemonic); /* 10 chars */ else - buffer += sprintf(buffer, " %-2s(%2d) ", mnemonic, n); /* 10 chars */ + util::stream_format(stream, " %-2s(%2d) ", mnemonic, n); /* 10 chars */ break; case store: if (c6 == 0) { /* case "1-32" : do not show bit specifier */ - buffer += sprintf(buffer, " %-10s", mnemonic); /* 10 chars*/ + util::stream_format(stream, " %-10s", mnemonic); /* 10 chars*/ } else if (c6 & 0x20) { /* case "1-n" */ n = c6-32; - buffer += sprintf(buffer, " %-2s (1-%02d) ", mnemonic, n); /* 10 chars */ + util::stream_format(stream, " %-2s (1-%02d) ", mnemonic, n); /* 10 chars */ } else { /* case "n-32" */ n = c6+1; - buffer += sprintf(buffer, " %-2s(%02d-32) ", mnemonic, n); /* 8 chars */ + util::stream_format(stream, " %-2s(%02d-32) ", mnemonic, n); /* 8 chars */ } } @@ -156,29 +156,39 @@ CPU_DISASSEMBLE( apexc ) switch (the_desc->format) { case branch: - buffer--; /* eat last char */ - buffer += sprintf(buffer, "<%03X(%02d/%02d) >=", x<<2, (x >> 5) & 0x1f, x & 0x1f); /* 10+1 chars */ + stream.seekp(-1, std::ios_base::cur); /* eat last char */ + util::stream_format(stream, "<%03X(%02d/%02d) >=", x<<2, (x >> 5) & 0x1f, x & 0x1f); /* 10+1 chars */ break; case multiply: case swap: - buffer += sprintf(buffer, " (%02d) ", (x >> 5) & 0x1f); /* 10 chars */ + util::stream_format(stream, " (%02d) ", (x >> 5) & 0x1f); /* 10 chars */ break; case one_address: case shiftl: case shiftr: - buffer += sprintf(buffer, " "); /* 10 chars */ + util::stream_format(stream, " "); /* 10 chars */ break; case two_address: case store: - buffer += sprintf(buffer, "%03X(%02d/%02d) ", x<<2, (x >> 5) & 0x1f, x & 0x1f); /* 10 chars */ + util::stream_format(stream, "%03X(%02d/%02d) ", x<<2, (x >> 5) & 0x1f, x & 0x1f); /* 10 chars */ break; } /* print Y address */ - buffer += sprintf(buffer, "%03X(%02d/%02d)", y<<2, (y >> 5) & 0x1f, y & 0x1f); /* 7 chars */ + util::stream_format(stream, "%03X(%02d/%02d)", y<<2, (y >> 5) & 0x1f, y & 0x1f); /* 7 chars */ return 4; } + + +CPU_DISASSEMBLE(apexc) +{ + std::ostringstream stream; + offs_t result = internal_disasm_apexc(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} diff --git a/src/devices/cpu/arm/arm.cpp b/src/devices/cpu/arm/arm.cpp index a51e1fd8882..1b342b3ea56 100644 --- a/src/devices/cpu/arm/arm.cpp +++ b/src/devices/cpu/arm/arm.cpp @@ -675,7 +675,7 @@ void arm_cpu_device::HandleMemSingle( uint32_t insn ) { if (rd == eR15) { - R15 = (cpu_read32(rnv) & ADDRESS_MASK) | (R15 & PSR_MASK) | (R15 & MODE_MASK); + R15 = (cpu_read32(rnv) & ADDRESS_MASK) | (R15 & PSR_MASK) | (R15 & IRQ_MASK) | (R15 & MODE_MASK); /* The docs are explicit in that the bottom bits should be masked off @@ -1364,7 +1364,7 @@ uint32_t arm_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry) if (k) { while (k > 32) k -= 32; - if (pCarry) *pCarry = rm & SIGN_BIT; + if (pCarry) *pCarry = rm & (1 << (k - 1)); return ROR(rm, k); } else diff --git a/src/devices/cpu/arm/armdasm.cpp b/src/devices/cpu/arm/armdasm.cpp index 08a0b282afe..b93b509789e 100644 --- a/src/devices/cpu/arm/armdasm.cpp +++ b/src/devices/cpu/arm/armdasm.cpp @@ -9,7 +9,7 @@ #include "emu.h" #include "arm.h" -static char *WriteImmediateOperand( char *pBuf, uint32_t opcode ) +static void WriteImmediateOperand( std::ostream &stream, uint32_t opcode ) { /* rrrrbbbbbbbb */ uint32_t imm; @@ -18,69 +18,70 @@ static char *WriteImmediateOperand( char *pBuf, uint32_t opcode ) imm = opcode&0xff; r = ((opcode>>8)&0xf)*2; imm = (imm>>r)|(r?(imm<<(32-r)):0); - pBuf += sprintf( pBuf, ", #$%x", imm ); - return pBuf; + util::stream_format( stream, ", #$%x", imm ); } -static char *WriteDataProcessingOperand( char *pBuf, uint32_t opcode, int printOp0, int printOp1, int printOp2 ) +static void WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, int printOp0, int printOp1, int printOp2 ) { /* ccccctttmmmm */ static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" }; if (printOp0) - pBuf += sprintf(pBuf,"R%d, ", (opcode>>12)&0xf); + util::stream_format(stream, "R%d, ", (opcode>>12)&0xf); if (printOp1) - pBuf += sprintf(pBuf,"R%d, ", (opcode>>16)&0xf); + util::stream_format(stream, "R%d, ", (opcode>>16)&0xf); /* Immediate Op2 */ - if( opcode&0x02000000 ) - return WriteImmediateOperand(pBuf-2,opcode); + if (opcode & 0x02000000) + { + stream.seekp(-2, std::ios_base::cur); + WriteImmediateOperand(stream, opcode); + return; + } /* Register Op2 */ if (printOp2) - pBuf += sprintf(pBuf,"R%d, ", (opcode>>0)&0xf); + util::stream_format(stream, "R%d, ", (opcode>>0)&0xf); - pBuf += sprintf(pBuf, "%s ", pRegOp[(opcode>>5)&3] ); + util::stream_format(stream, "%s ", pRegOp[(opcode>>5)&3]); if( opcode&0x10 ) /* Shift amount specified in bottom bits of RS */ { - pBuf += sprintf( pBuf, "R%d", (opcode>>8)&0xf ); + util::stream_format( stream, "R%d", (opcode>>8)&0xf ); } else /* Shift amount immediate 5 bit unsigned integer */ { int c=(opcode>>7)&0x1f; if( c==0 ) c = 32; - pBuf += sprintf( pBuf, "#%d", c ); + util::stream_format( stream, "#%d", c ); } - return pBuf; } -static char *WriteRegisterOperand1( char *pBuf, uint32_t opcode ) +static void WriteRegisterOperand1( std::ostream &stream, uint32_t opcode ) { /* ccccctttmmmm */ static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" }; - pBuf += sprintf( - pBuf, + util::stream_format( + stream, ", R%d %s ", /* Operand 1 register, Operand 2 register, shift type */ (opcode>> 0)&0xf, - pRegOp[(opcode>>5)&3] ); + pRegOp[(opcode>>5)&3]); if( opcode&0x10 ) /* Shift amount specified in bottom bits of RS */ { - pBuf += sprintf( pBuf, "R%d", (opcode>>7)&0xf ); + util::stream_format( stream, "R%d", (opcode>>7)&0xf ); } else /* Shift amount immediate 5 bit unsigned integer */ { int c=(opcode>>7)&0x1f; if( c==0 ) c = 32; - pBuf += sprintf( pBuf, "#%d", c ); + util::stream_format( stream, "#%d", c ); } - return pBuf; } /* WriteRegisterOperand */ -static char *WriteBranchAddress( char *pBuf, uint32_t pc, uint32_t opcode ) +static void WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opcode ) { opcode &= 0x00ffffff; if( opcode&0x00800000 ) @@ -88,24 +89,18 @@ static char *WriteBranchAddress( char *pBuf, uint32_t pc, uint32_t opcode ) opcode |= 0xff000000; /* sign-extend */ } pc += 8+4*opcode; - sprintf( pBuf, "$%x", pc ); - return pBuf; + util::stream_format( stream, "$%x", pc ); } /* WriteBranchAddress */ -static char *WritePadding( char *pBuf, const char *pBuf0 ) +static void WritePadding(std::ostream &stream, std::streampos start_position) { - pBuf0 += 8; - while( pBuf<pBuf0 ) - { - *pBuf++ = ' '; - } - return pBuf; + std::streamoff difference = stream.tellp() - start_position; + for (std::streamoff i = difference; i < 8; i++) + stream << ' '; } -static uint32_t arm_disasm( char *pBuf, uint32_t pc, uint32_t opcode ) +static uint32_t arm_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode ) { - const char *pBuf0; - static const char *const pConditionCodeTable[16] = { "EQ","NE","CS","CC", @@ -122,9 +117,9 @@ static uint32_t arm_disasm( char *pBuf, uint32_t pc, uint32_t opcode ) }; const char *pConditionCode; uint32_t dasmflags = 0; + std::streampos start_position = stream.tellp(); pConditionCode= pConditionCodeTable[opcode>>28]; - pBuf0 = pBuf; if( (opcode&0x0fc000f0)==0x00000090u ) { @@ -132,28 +127,28 @@ static uint32_t arm_disasm( char *pBuf, uint32_t pc, uint32_t opcode ) /* xxxx0000 00ASdddd nnnnssss 1001mmmm */ if( opcode&0x00200000 ) { - pBuf += sprintf( pBuf, "MLA" ); + util::stream_format( stream, "MLA" ); } else { - pBuf += sprintf( pBuf, "MUL" ); + util::stream_format( stream, "MUL" ); } - pBuf += sprintf( pBuf, "%s", pConditionCode ); + util::stream_format( stream, "%s", pConditionCode ); if( opcode&0x00100000 ) { - *pBuf++ = 'S'; + stream << 'S'; } - pBuf = WritePadding( pBuf, pBuf0 ); + WritePadding(stream, start_position); - pBuf += sprintf( pBuf, + util::stream_format(stream, "R%d, R%d, R%d", (opcode>>16)&0xf, (opcode&0xf), - (opcode>>8)&0xf ); + (opcode>>8)&0xf); if( opcode&0x00200000 ) { - pBuf += sprintf( pBuf, ", R%d", (opcode>>12)&0xf ); + util::stream_format( stream, ", R%d", (opcode>>12)&0xf ); } } else if( (opcode&0x0c000000)==0 ) @@ -164,17 +159,17 @@ static uint32_t arm_disasm( char *pBuf, uint32_t pc, uint32_t opcode ) /* xxxx001a aaaSnnnn ddddrrrr bbbbbbbb */ /* xxxx000a aaaSnnnn ddddcccc ctttmmmm */ - pBuf += sprintf( - pBuf, "%s%s", + util::stream_format(stream, + "%s%s", pOperation[op], - pConditionCode ); + pConditionCode); if( (opcode&0x01000000) ) { - *pBuf++ = 'S'; + stream << 'S'; } - pBuf = WritePadding( pBuf, pBuf0 ); + WritePadding(stream, start_position); switch (op) { case 0x00: @@ -187,20 +182,20 @@ static uint32_t arm_disasm( char *pBuf, uint32_t pc, uint32_t opcode ) case 0x07: case 0x0c: case 0x0e: - WriteDataProcessingOperand(pBuf, opcode, 1, 1, 1); + WriteDataProcessingOperand(stream, opcode, 1, 1, 1); break; case 0x08: case 0x09: case 0x0a: case 0x0b: - WriteDataProcessingOperand(pBuf, opcode, 0, 1, 1); + WriteDataProcessingOperand(stream, opcode, 0, 1, 1); break; case 0x0d: /* look for mov pc,lr */ if (((opcode >> 12) & 0x0f) == 15 && ((opcode >> 0) & 0x0f) == 14 && (opcode & 0x02000000) == 0) dasmflags = DASMFLAG_STEP_OUT; case 0x0f: - WriteDataProcessingOperand(pBuf, opcode, 1, 0, 1); + WriteDataProcessingOperand(stream, opcode, 1, 0, 1); break; } } @@ -212,17 +207,17 @@ static uint32_t arm_disasm( char *pBuf, uint32_t pc, uint32_t opcode ) /* xxxx011P UBWLnnnn ddddcccc ctt0mmmm Register form */ if( opcode&0x00100000 ) { - pBuf += sprintf( pBuf, "LDR" ); + util::stream_format( stream, "LDR" ); } else { - pBuf += sprintf( pBuf, "STR" ); + util::stream_format( stream, "STR" ); } - pBuf += sprintf( pBuf, "%s", pConditionCode ); + util::stream_format( stream, "%s", pConditionCode ); if( opcode&0x00400000 ) { - pBuf += sprintf( pBuf, "B" ); + util::stream_format( stream, "B" ); } if( opcode&0x00200000 ) @@ -231,36 +226,36 @@ static uint32_t arm_disasm( char *pBuf, uint32_t pc, uint32_t opcode ) if( opcode&0x01000000 ) { /* pre-indexed addressing */ - pBuf += sprintf( pBuf, "!" ); + util::stream_format( stream, "!" ); } else { /* post-indexed addressing */ - pBuf += sprintf( pBuf, "T" ); + util::stream_format( stream, "T" ); } } - pBuf = WritePadding( pBuf, pBuf0 ); - pBuf += sprintf( pBuf, "R%d, [R%d", + WritePadding(stream, start_position); + util::stream_format( stream, "R%d, [R%d", (opcode>>12)&0xf, (opcode>>16)&0xf ); if( opcode&0x02000000 ) { /* register form */ - pBuf = WriteRegisterOperand1( pBuf, opcode ); - pBuf += sprintf( pBuf, "]" ); + WriteRegisterOperand1( stream, opcode ); + util::stream_format( stream, "]" ); } else { /* immediate form */ - pBuf += sprintf( pBuf, "]" ); + util::stream_format( stream, "]" ); if( opcode&0x00800000 ) { - pBuf += sprintf( pBuf, ", #$%x", opcode&0xfff ); + util::stream_format( stream, ", #$%x", opcode&0xfff ); } else { - pBuf += sprintf( pBuf, ", -#$%x", opcode&0xfff ); + util::stream_format( stream, ", -#$%x", opcode&0xfff ); } } } @@ -271,33 +266,33 @@ static uint32_t arm_disasm( char *pBuf, uint32_t pc, uint32_t opcode ) if( opcode&0x00100000 ) { - pBuf += sprintf( pBuf, "LDM" ); + util::stream_format( stream, "LDM" ); } else { - pBuf += sprintf( pBuf, "STM" ); + util::stream_format( stream, "STM" ); } - pBuf += sprintf( pBuf, "%s", pConditionCode ); + util::stream_format( stream, "%s", pConditionCode ); if( opcode&0x01000000 ) { - pBuf += sprintf( pBuf, "P" ); + util::stream_format( stream, "P" ); } if( opcode&0x00800000 ) { - pBuf += sprintf( pBuf, "U" ); + util::stream_format( stream, "U" ); } if( opcode&0x00400000 ) { - pBuf += sprintf( pBuf, "^" ); + util::stream_format( stream, "^" ); } if( opcode&0x00200000 ) { - pBuf += sprintf( pBuf, "W" ); + util::stream_format( stream, "W" ); } - pBuf = WritePadding( pBuf, pBuf0 ); - pBuf += sprintf( pBuf, "[R%d], {",(opcode>>16)&0xf); + WritePadding(stream, start_position); + util::stream_format( stream, "[R%d], {",(opcode>>16)&0xf); { int j=0,last=0,found=0; @@ -308,20 +303,20 @@ static uint32_t arm_disasm( char *pBuf, uint32_t pc, uint32_t opcode ) } else if ((opcode&(1<<j))==0 && found) { if (last==j-1) - pBuf += sprintf( pBuf, " R%d,",last); + util::stream_format( stream, " R%d,",last); else - pBuf += sprintf( pBuf, " R%d-R%d,",last,j-1); + util::stream_format( stream, " R%d-R%d,",last,j-1); found=0; } } if (found && last==15) - pBuf += sprintf( pBuf, " R15,"); + util::stream_format( stream, " R15,"); else if (found) - pBuf += sprintf( pBuf, " R%d-R%d,",last,15); + util::stream_format( stream, " R%d-R%d,",last,15); } - pBuf--; - pBuf += sprintf( pBuf, " }"); + stream.seekp(-1, std::ios_base::cur); + util::stream_format( stream, " }"); } else if( (opcode&0x0e000000)==0x0a000000 ) { @@ -329,19 +324,19 @@ static uint32_t arm_disasm( char *pBuf, uint32_t pc, uint32_t opcode ) /* xxxx101L oooooooo oooooooo oooooooo */ if( opcode&0x01000000 ) { - pBuf += sprintf( pBuf, "BL" ); + util::stream_format( stream, "BL" ); dasmflags = DASMFLAG_STEP_OVER; } else { - pBuf += sprintf( pBuf, "B" ); + util::stream_format( stream, "B" ); } - pBuf += sprintf( pBuf, "%s", pConditionCode ); + util::stream_format( stream, "%s", pConditionCode ); - pBuf = WritePadding( pBuf, pBuf0 ); + WritePadding(stream, start_position); - pBuf = WriteBranchAddress( pBuf, pc, opcode ); + WriteBranchAddress( stream, pc, opcode ); } else if( (opcode&0x0f000000) == 0x0e000000 ) { @@ -351,50 +346,59 @@ static uint32_t arm_disasm( char *pBuf, uint32_t pc, uint32_t opcode ) { if( (opcode&0x0f100010)==0x0e100010 ) { - pBuf += sprintf( pBuf, "MRC" ); + util::stream_format( stream, "MRC" ); } else if( (opcode&0x0f100010)==0x0e000010 ) { - pBuf += sprintf( pBuf, "MCR" ); + util::stream_format( stream, "MCR" ); } else { - pBuf += sprintf( pBuf, "???" ); + util::stream_format( stream, "???" ); } - pBuf += sprintf( pBuf, "%s", pConditionCode ); - pBuf = WritePadding( pBuf, pBuf0 ); - pBuf += sprintf( pBuf, "R%d, CR%d {CRM%d, q%d}",(opcode>>12)&0xf, (opcode>>16)&0xf, (opcode>>0)&0xf, (opcode>>5)&0x7); + util::stream_format( stream, "%s", pConditionCode ); + WritePadding(stream, start_position); + util::stream_format( stream, "R%d, CR%d {CRM%d, q%d}",(opcode>>12)&0xf, (opcode>>16)&0xf, (opcode>>0)&0xf, (opcode>>5)&0x7); /* Nb: full form should be o, p, R, CR, CRM, q */ } else if( (opcode&0x0f000010)==0x0e000000 ) { - pBuf += sprintf( pBuf, "CDP" ); - pBuf += sprintf( pBuf, "%s", pConditionCode ); - pBuf = WritePadding( pBuf, pBuf0 ); - pBuf += sprintf( pBuf, "%08x", opcode ); + util::stream_format( stream, "CDP" ); + util::stream_format( stream, "%s", pConditionCode ); + WritePadding(stream, start_position); + util::stream_format( stream, "%08x", opcode ); } else { - pBuf += sprintf( pBuf, "???" ); + util::stream_format( stream, "???" ); } } else if( (opcode&0x0f000000) == 0x0f000000 ) { /* Software Interrupt */ - pBuf += sprintf( pBuf, "SWI%s $%x", + util::stream_format( stream, "SWI%s $%x", pConditionCode, opcode&0x00ffffff ); dasmflags = DASMFLAG_STEP_OVER; } else { - pBuf += sprintf( pBuf, "Undefined" ); + util::stream_format( stream, "Undefined" ); } return dasmflags | DASMFLAG_SUPPORTED; } +static uint32_t arm_disasm(char *buffer, uint32_t pc, uint32_t opcode) +{ + std::ostringstream stream; + uint32_t result = arm_disasm(stream, pc, opcode); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} + CPU_DISASSEMBLE( arm ) { uint32_t opcode = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24); diff --git a/src/devices/cpu/asap/asapdasm.cpp b/src/devices/cpu/asap/asapdasm.cpp index 47665331da2..1f24fef64ec 100644 --- a/src/devices/cpu/asap/asapdasm.cpp +++ b/src/devices/cpu/asap/asapdasm.cpp @@ -45,7 +45,7 @@ static inline char *src2(uint32_t op, int scale) return temp; } -CPU_DISASSEMBLE( asap ) +static offs_t internal_disasm_asap(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { uint32_t op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24); int opcode = op >> 27; @@ -58,89 +58,99 @@ CPU_DISASSEMBLE( asap ) switch (opcode) { - case 0x00: sprintf(buffer, "trap $00"); flags = DASMFLAG_STEP_OVER; break; - case 0x01: sprintf(buffer, "b%s $%08x", condition[rdst & 15], pc + ((int32_t)(op << 10) >> 8)); break; + case 0x00: util::stream_format(stream, "trap $00"); flags = DASMFLAG_STEP_OVER; break; + case 0x01: util::stream_format(stream, "b%s $%08x", condition[rdst & 15], pc + ((int32_t)(op << 10) >> 8)); break; case 0x02: if ((op & 0x003fffff) == 3) { uint32_t nextop = oprom[4] | (oprom[5] << 8) | (oprom[6] << 16) | (oprom[7] << 24); if ((nextop >> 27) == 0x10 && ((nextop >> 22) & 31) == rdst && (nextop & 0xffff) == 0) { uint32_t nextnextop = oprom[8] | (oprom[9] << 8) | (oprom[10] << 16) | (oprom[11] << 24); - sprintf(buffer, "llit%s $%08x,%s", setcond[cond], nextnextop, reg[rdst]); + util::stream_format(stream, "llit%s $%08x,%s", setcond[cond], nextnextop, reg[rdst]); return 12 | DASMFLAG_STEP_OVER | DASMFLAG_SUPPORTED; } } if (rdst) { flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); - sprintf(buffer, "bsr %s,$%08x", reg[rdst], pc + ((int32_t)(op << 10) >> 8)); + util::stream_format(stream, "bsr %s,$%08x", reg[rdst], pc + ((int32_t)(op << 10) >> 8)); } else - sprintf(buffer, "bra $%08x", pc + ((int32_t)(op << 10) >> 8)); + util::stream_format(stream, "bra $%08x", pc + ((int32_t)(op << 10) >> 8)); break; - case 0x03: sprintf(buffer, "lea%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break; - case 0x04: sprintf(buffer, "leah%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break; - case 0x05: sprintf(buffer, "subr%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x06: sprintf(buffer, "xor%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x07: sprintf(buffer, "xorn%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x03: util::stream_format(stream, "lea%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break; + case 0x04: util::stream_format(stream, "leah%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break; + case 0x05: util::stream_format(stream, "subr%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x06: util::stream_format(stream, "xor%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x07: util::stream_format(stream, "xorn%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; case 0x08: if (!rsrc1 && !rdst && rsrc2_iszero) - sprintf(buffer, "nop"); + util::stream_format(stream, "nop"); else if (!rsrc1) - sprintf(buffer, "mov%s %s,%s", setcond[cond], src2(op,0), reg[rdst]); + util::stream_format(stream, "mov%s %s,%s", setcond[cond], src2(op,0), reg[rdst]); else if (rsrc2_iszero) - sprintf(buffer, "mov%s %s,%s", setcond[cond], reg[rsrc1], reg[rdst]); + util::stream_format(stream, "mov%s %s,%s", setcond[cond], reg[rsrc1], reg[rdst]); else - sprintf(buffer, "add%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); + util::stream_format(stream, "add%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x09: sprintf(buffer, "sub%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x0a: sprintf(buffer, "addc%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x0b: sprintf(buffer, "subc%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x0c: sprintf(buffer, "and%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x0d: sprintf(buffer, "andn%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x09: util::stream_format(stream, "sub%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x0a: util::stream_format(stream, "addc%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x0b: util::stream_format(stream, "subc%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x0c: util::stream_format(stream, "and%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x0d: util::stream_format(stream, "andn%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; case 0x0e: if (!rsrc1 && !rdst && rsrc2_iszero) - sprintf(buffer, "nop"); + util::stream_format(stream, "nop"); else if (!rsrc1) - sprintf(buffer, "mov%s %s,%s", setcond[cond], src2(op,0), reg[rdst]); + util::stream_format(stream, "mov%s %s,%s", setcond[cond], src2(op,0), reg[rdst]); else if (rsrc2_iszero) - sprintf(buffer, "mov%s %s,%s", setcond[cond], reg[rsrc1], reg[rdst]); + util::stream_format(stream, "mov%s %s,%s", setcond[cond], reg[rsrc1], reg[rdst]); else - sprintf(buffer, "or%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); + util::stream_format(stream, "or%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x0f: sprintf(buffer, "orn%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x10: sprintf(buffer, "ld%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break; - case 0x11: sprintf(buffer, "ldh%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break; - case 0x12: sprintf(buffer, "lduh%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break; - case 0x13: sprintf(buffer, "sth%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break; - case 0x14: sprintf(buffer, "st%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break; - case 0x15: sprintf(buffer, "ldb%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x16: sprintf(buffer, "ldub%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x17: sprintf(buffer, "stb%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x18: sprintf(buffer, "ashr%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x19: sprintf(buffer, "lshr%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x1a: sprintf(buffer, "ashl%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x1b: sprintf(buffer, "rotl%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; - case 0x1c: sprintf(buffer, "getps %s", reg[rdst]); break; - case 0x1d: sprintf(buffer, "putps %s", src2(op,0)); break; + case 0x0f: util::stream_format(stream, "orn%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x10: util::stream_format(stream, "ld%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break; + case 0x11: util::stream_format(stream, "ldh%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break; + case 0x12: util::stream_format(stream, "lduh%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break; + case 0x13: util::stream_format(stream, "sth%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break; + case 0x14: util::stream_format(stream, "st%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break; + case 0x15: util::stream_format(stream, "ldb%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x16: util::stream_format(stream, "ldub%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x17: util::stream_format(stream, "stb%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x18: util::stream_format(stream, "ashr%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x19: util::stream_format(stream, "lshr%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x1a: util::stream_format(stream, "ashl%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x1b: util::stream_format(stream, "rotl%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break; + case 0x1c: util::stream_format(stream, "getps %s", reg[rdst]); break; + case 0x1d: util::stream_format(stream, "putps %s", src2(op,0)); break; case 0x1e: if (rdst && rsrc2_iszero) { flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); - sprintf(buffer, "jsr%s %s,%s", setcond[cond], reg[rdst], reg[rsrc1]); + util::stream_format(stream, "jsr%s %s,%s", setcond[cond], reg[rdst], reg[rsrc1]); } else if (rdst) { flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); - sprintf(buffer, "jsr%s %s,%s[%s]", setcond[cond], reg[rdst], reg[rsrc1], src2(op,2)); + util::stream_format(stream, "jsr%s %s,%s[%s]", setcond[cond], reg[rdst], reg[rsrc1], src2(op,2)); } else if (rsrc2_iszero) { if (rsrc1 == 28) flags = DASMFLAG_STEP_OUT; - sprintf(buffer, "jmp%s %s", setcond[cond], reg[rsrc1]); + util::stream_format(stream, "jmp%s %s", setcond[cond], reg[rsrc1]); } else - sprintf(buffer, "jmp%s %s[%s]", setcond[cond], reg[rsrc1], src2(op,2)); + util::stream_format(stream, "jmp%s %s[%s]", setcond[cond], reg[rsrc1], src2(op,2)); break; - case 0x1f: sprintf(buffer, "trap $1f"); flags = DASMFLAG_STEP_OVER; break; + case 0x1f: util::stream_format(stream, "trap $1f"); flags = DASMFLAG_STEP_OVER; break; } return 4 | flags | DASMFLAG_SUPPORTED; } + + +CPU_DISASSEMBLE(asap) +{ + std::ostringstream stream; + offs_t result = internal_disasm_asap(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} diff --git a/src/devices/cpu/ccpu/ccpudasm.cpp b/src/devices/cpu/ccpu/ccpudasm.cpp index 9a02ee58d49..309b4167cc1 100644 --- a/src/devices/cpu/ccpu/ccpudasm.cpp +++ b/src/devices/cpu/ccpu/ccpudasm.cpp @@ -14,7 +14,7 @@ #include "ccpu.h" -CPU_DISASSEMBLE( ccpu ) +static offs_t internal_disasm_ccpu(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { unsigned startpc = pc; uint8_t opcode = oprom[pc++ - startpc]; @@ -27,7 +27,7 @@ CPU_DISASSEMBLE( ccpu ) case 0x04: case 0x05: case 0x06: case 0x07: case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: - sprintf(buffer, "LDAI $%X", opcode & 0x0f); + util::stream_format(stream, "LDAI $%X", opcode & 0x0f); break; /* INP */ @@ -35,12 +35,12 @@ CPU_DISASSEMBLE( ccpu ) case 0x14: case 0x15: case 0x16: case 0x17: case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: - sprintf(buffer, "INP $%X", opcode & 0x0f); + util::stream_format(stream, "INP $%X", opcode & 0x0f); break; /* A8I */ case 0x20: - sprintf(buffer, "A8I $%X", oprom[pc++ - startpc]); + util::stream_format(stream, "A8I $%X", oprom[pc++ - startpc]); break; /* A4I */ @@ -48,12 +48,12 @@ CPU_DISASSEMBLE( ccpu ) case 0x24: case 0x25: case 0x26: case 0x27: case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: - sprintf(buffer, "A4I $%X", opcode & 0x0f); + util::stream_format(stream, "A4I $%X", opcode & 0x0f); break; /* S8I */ case 0x30: - sprintf(buffer, "S8I $%X", oprom[pc++ - startpc]); + util::stream_format(stream, "S8I $%X", oprom[pc++ - startpc]); break; /* S4I */ @@ -61,7 +61,7 @@ CPU_DISASSEMBLE( ccpu ) case 0x34: case 0x35: case 0x36: case 0x37: case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: - sprintf(buffer, "S4I $%X", opcode & 0x0f); + util::stream_format(stream, "S4I $%X", opcode & 0x0f); break; /* LPAI */ @@ -70,87 +70,87 @@ CPU_DISASSEMBLE( ccpu ) case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f: tempval = oprom[pc++ - startpc]; - sprintf(buffer, "LPAI $%03X", (opcode & 0x0f) + (tempval & 0xf0) + ((tempval & 0x0f) << 8)); + util::stream_format(stream, "LPAI $%03X", (opcode & 0x0f) + (tempval & 0xf0) + ((tempval & 0x0f) << 8)); break; /* T4K */ case 0x50: - sprintf(buffer, "T4K"); + util::stream_format(stream, "T4K"); break; /* JMIB/JEHB */ case 0x51: - sprintf(buffer, "JMIB/JEHB"); + util::stream_format(stream, "JMIB/JEHB"); break; /* JVNB */ case 0x52: - sprintf(buffer, "JVNB"); + util::stream_format(stream, "JVNB"); break; /* JLTB */ case 0x53: - sprintf(buffer, "JLTB"); + util::stream_format(stream, "JLTB"); break; /* JEQB */ case 0x54: - sprintf(buffer, "JEQB"); + util::stream_format(stream, "JEQB"); break; /* JCZB */ case 0x55: - sprintf(buffer, "JCZB"); + util::stream_format(stream, "JCZB"); break; /* JOSB */ case 0x56: - sprintf(buffer, "JOSB"); + util::stream_format(stream, "JOSB"); break; /* SSA */ case 0x57: - sprintf(buffer, "SSA"); + util::stream_format(stream, "SSA"); break; /* JMP */ case 0x58: - sprintf(buffer, "JMP"); + util::stream_format(stream, "JMP"); break; /* JMI/JEH */ case 0x59: - sprintf(buffer, "JMI/JEH"); + util::stream_format(stream, "JMI/JEH"); break; /* JVN */ case 0x5a: - sprintf(buffer, "JVN"); + util::stream_format(stream, "JVN"); break; /* JLT */ case 0x5b: - sprintf(buffer, "JLT"); + util::stream_format(stream, "JLT"); break; /* JEQ */ case 0x5c: - sprintf(buffer, "JEQ"); + util::stream_format(stream, "JEQ"); break; /* JCZ */ case 0x5d: - sprintf(buffer, "JCZ"); + util::stream_format(stream, "JCZ"); break; /* JOS */ case 0x5e: - sprintf(buffer, "JOS"); + util::stream_format(stream, "JOS"); break; /* NOP */ case 0x5f: - sprintf(buffer, "NOP"); + util::stream_format(stream, "NOP"); break; /* ADD */ @@ -158,7 +158,7 @@ CPU_DISASSEMBLE( ccpu ) case 0x64: case 0x65: case 0x66: case 0x67: case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f: - sprintf(buffer, "ADD $%X", opcode & 0x0f); + util::stream_format(stream, "ADD $%X", opcode & 0x0f); break; /* SUB n */ @@ -166,7 +166,7 @@ CPU_DISASSEMBLE( ccpu ) case 0x74: case 0x75: case 0x76: case 0x77: case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f: - sprintf(buffer, "SUB $%X", opcode & 0x0f); + util::stream_format(stream, "SUB $%X", opcode & 0x0f); break; /* SETP n */ @@ -174,7 +174,7 @@ CPU_DISASSEMBLE( ccpu ) case 0x84: case 0x85: case 0x86: case 0x87: case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f: - sprintf(buffer, "SETP $%X", opcode & 0x0f); + util::stream_format(stream, "SETP $%X", opcode & 0x0f); break; /* OUT */ @@ -182,7 +182,7 @@ CPU_DISASSEMBLE( ccpu ) case 0x94: case 0x95: case 0x96: case 0x97: case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f: - sprintf(buffer, "OUT $%X", opcode & 0x0f); + util::stream_format(stream, "OUT $%X", opcode & 0x0f); break; /* LDA */ @@ -190,7 +190,7 @@ CPU_DISASSEMBLE( ccpu ) case 0xa4: case 0xa5: case 0xa6: case 0xa7: case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf: - sprintf(buffer, "LDA $%X", opcode & 0x0f); + util::stream_format(stream, "LDA $%X", opcode & 0x0f); break; /* CMP */ @@ -198,7 +198,7 @@ CPU_DISASSEMBLE( ccpu ) case 0xb4: case 0xb5: case 0xb6: case 0xb7: case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf: - sprintf(buffer, "TST $%X", opcode & 0x0f); + util::stream_format(stream, "TST $%X", opcode & 0x0f); break; /* WS */ @@ -206,7 +206,7 @@ CPU_DISASSEMBLE( ccpu ) case 0xc4: case 0xc5: case 0xc6: case 0xc7: case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: - sprintf(buffer, "WS $%X", opcode & 0x0f); + util::stream_format(stream, "WS $%X", opcode & 0x0f); break; /* STA n */ @@ -214,117 +214,127 @@ CPU_DISASSEMBLE( ccpu ) case 0xd4: case 0xd5: case 0xd6: case 0xd7: case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf: - sprintf(buffer, "STA $%X", opcode & 0x0f); + util::stream_format(stream, "STA $%X", opcode & 0x0f); break; /* DV */ case 0xe0: - sprintf(buffer, "DV"); + util::stream_format(stream, "DV"); break; /* LPAP */ case 0xe1: - sprintf(buffer, "LPAP"); + util::stream_format(stream, "LPAP"); break; /* WSP */ case 0xf1: - sprintf(buffer, "WSP"); + util::stream_format(stream, "WSP"); break; /* LKP */ case 0xe2: case 0xf2: - sprintf(buffer, "LKP"); + util::stream_format(stream, "LKP"); break; /* MUL */ case 0xe3: case 0xf3: - sprintf(buffer, "MUL"); + util::stream_format(stream, "MUL"); break; /* NV */ case 0xe4: case 0xf4: - sprintf(buffer, "NV"); + util::stream_format(stream, "NV"); break; /* FRM */ case 0xe5: case 0xf5: - sprintf(buffer, "FRM"); + util::stream_format(stream, "FRM"); break; /* STAP */ case 0xe6: case 0xf6: - sprintf(buffer, "STAP"); + util::stream_format(stream, "STAP"); break; /* CST */ case 0xf7: - sprintf(buffer, "CST"); + util::stream_format(stream, "CST"); break; /* ADDP */ case 0xe7: - sprintf(buffer, "ADDP"); + util::stream_format(stream, "ADDP"); break; /* SUBP */ case 0xe8: case 0xf8: - sprintf(buffer, "SUBP"); + util::stream_format(stream, "SUBP"); break; /* ANDP */ case 0xe9: case 0xf9: - sprintf(buffer, "ANDP"); + util::stream_format(stream, "ANDP"); break; /* LDAP */ case 0xea: case 0xfa: - sprintf(buffer, "LDAP"); + util::stream_format(stream, "LDAP"); break; /* SHR */ case 0xeb: case 0xfb: - sprintf(buffer, "SHR"); + util::stream_format(stream, "SHR"); break; /* SHL */ case 0xec: case 0xfc: - sprintf(buffer, "SHL"); + util::stream_format(stream, "SHL"); break; /* ASR */ case 0xed: case 0xfd: - sprintf(buffer, "ASR"); + util::stream_format(stream, "ASR"); break; /* SHRB */ case 0xee: case 0xfe: - sprintf(buffer, "SHRB"); + util::stream_format(stream, "SHRB"); break; /* SHLB */ case 0xef: case 0xff: - sprintf(buffer, "SHLB"); + util::stream_format(stream, "SHLB"); break; /* IV */ case 0xf0: - sprintf(buffer, "IV"); + util::stream_format(stream, "IV"); break; } return (pc - startpc) | DASMFLAG_SUPPORTED; } + + +CPU_DISASSEMBLE(ccpu) +{ + std::ostringstream stream; + offs_t result = internal_disasm_ccpu(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} diff --git a/src/devices/cpu/cop400/cop410ds.cpp b/src/devices/cpu/cop400/cop410ds.cpp index fa8f675506e..1c28ea070bf 100644 --- a/src/devices/cpu/cop400/cop410ds.cpp +++ b/src/devices/cpu/cop400/cop410ds.cpp @@ -10,7 +10,7 @@ #include "emu.h" -CPU_DISASSEMBLE( cop410 ) +static offs_t internal_disasm_cop410(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { uint8_t opcode = oprom[0]; uint8_t next_opcode = oprom[1]; @@ -23,130 +23,130 @@ CPU_DISASSEMBLE( cop410 ) if ((pc & 0x3E0) >= 0x80 && (pc & 0x3E0) < 0x100) //JP pages 2,3 { address = (uint16_t)((pc & 0x380) | (opcode & 0x7F)); - sprintf(buffer, "JP %x", address); + util::stream_format(stream, "JP %x", address); } else { if ((opcode & 0xC0) == 0xC0) //JP other pages { address = (uint16_t)((pc & 0x3C0) | (opcode & 0x3F)); - sprintf(buffer, "JP %x", address); + util::stream_format(stream, "JP %x", address); } else //JSRP { address = (uint16_t)(0x80 | (opcode & 0x3F)); - sprintf(buffer, "JSRP %x", address); + util::stream_format(stream, "JSRP %x", address); flags = DASMFLAG_STEP_OVER; } } } else if (opcode >= 0x08 && opcode <= 0x0F) { - sprintf(buffer, "LBI 0,%u", ((opcode & 0xF) + 1) & 0xF); + util::stream_format(stream, "LBI 0,%u", ((opcode & 0xF) + 1) & 0xF); } else if (opcode >= 0x18 && opcode <= 0x1F) { - sprintf(buffer, "LBI 1,%u", ((opcode & 0xF) + 1) & 0xF); + util::stream_format(stream, "LBI 1,%u", ((opcode & 0xF) + 1) & 0xF); } else if (opcode >= 0x28 && opcode <= 0x2F) { - sprintf(buffer, "LBI 2,%u", ((opcode & 0xF) + 1) & 0xF); + util::stream_format(stream, "LBI 2,%u", ((opcode & 0xF) + 1) & 0xF); } else if (opcode >= 0x38 && opcode <= 0x3F) { - sprintf(buffer, "LBI 3,%u", ((opcode & 0xF) + 1) & 0xF); + util::stream_format(stream, "LBI 3,%u", ((opcode & 0xF) + 1) & 0xF); } else if (opcode >= 0x51 && opcode <= 0x5F) { - sprintf(buffer, "AISC %u", opcode & 0xF); + util::stream_format(stream, "AISC %u", opcode & 0xF); } else if (opcode >= 0x60 && opcode <= 0x61) { address = ((opcode & 0x01) << 8) | next_opcode; - sprintf(buffer, "JMP %x", address); + util::stream_format(stream, "JMP %x", address); bytes = 2; } else if (opcode >= 0x68 && opcode <= 0x69) { address = ((opcode & 0x01) << 8) | next_opcode; - sprintf(buffer, "JSR %x", address); + util::stream_format(stream, "JSR %x", address); flags = DASMFLAG_STEP_OVER; bytes = 2; } else if (opcode >= 0x70 && opcode <= 0x7F) { - sprintf(buffer, "STII %u", opcode & 0xF); + util::stream_format(stream, "STII %u", opcode & 0xF); } else { switch (opcode) { case 0: - sprintf(buffer, "CLRA"); + util::stream_format(stream, "CLRA"); break; case 1: - sprintf(buffer, "SKMBZ 0"); + util::stream_format(stream, "SKMBZ 0"); break; case 2: - sprintf(buffer, "XOR"); + util::stream_format(stream, "XOR"); break; case 3: - sprintf(buffer, "SKMBZ 2"); + util::stream_format(stream, "SKMBZ 2"); break; case 4: - sprintf(buffer, "XIS 0"); + util::stream_format(stream, "XIS 0"); break; case 5: - sprintf(buffer, "LD 0"); + util::stream_format(stream, "LD 0"); break; case 6: - sprintf(buffer, "X 0"); + util::stream_format(stream, "X 0"); break; case 7: - sprintf(buffer, "XDS 0"); + util::stream_format(stream, "XDS 0"); break; case 0x11: - sprintf(buffer, "SKMBZ 1"); + util::stream_format(stream, "SKMBZ 1"); break; case 0x13: - sprintf(buffer, "SKMBZ 3"); + util::stream_format(stream, "SKMBZ 3"); break; case 0x14: - sprintf(buffer, "XIS 1"); + util::stream_format(stream, "XIS 1"); break; case 0x15: - sprintf(buffer, "LD 1"); + util::stream_format(stream, "LD 1"); break; case 0x16: - sprintf(buffer, "X 1"); + util::stream_format(stream, "X 1"); break; case 0x17: - sprintf(buffer, "XDS 1"); + util::stream_format(stream, "XDS 1"); break; case 0x20: - sprintf(buffer, "SKC"); + util::stream_format(stream, "SKC"); break; case 0x21: - sprintf(buffer, "SKE"); + util::stream_format(stream, "SKE"); break; case 0x22: - sprintf(buffer, "SC"); + util::stream_format(stream, "SC"); break; case 0x23: @@ -155,40 +155,40 @@ CPU_DISASSEMBLE( cop410 ) if (next_opcode >= 0x80 && next_opcode <= 0xbf) { address = (uint16_t)(next_opcode & 0x3F); - sprintf(buffer, "XAD %x,%x", ((address & 0x30) >> 4),address & 0x0F); + util::stream_format(stream, "XAD %x,%x", ((address & 0x30) >> 4),address & 0x0F); } else { - sprintf(buffer, "Invalid"); + util::stream_format(stream, "Invalid"); } break; case 0x24: - sprintf(buffer, "XIS 2"); + util::stream_format(stream, "XIS 2"); break; case 0x25: - sprintf(buffer, "LD 2"); + util::stream_format(stream, "LD 2"); break; case 0x26: - sprintf(buffer, "X 2"); + util::stream_format(stream, "X 2"); break; case 0x27: - sprintf(buffer, "XDS 2"); + util::stream_format(stream, "XDS 2"); break; case 0x30: - sprintf(buffer, "ASC"); + util::stream_format(stream, "ASC"); break; case 0x31: - sprintf(buffer, "ADD"); + util::stream_format(stream, "ADD"); break; case 0x32: - sprintf(buffer, "RC"); + util::stream_format(stream, "RC"); break; case 0x33: @@ -196,154 +196,165 @@ CPU_DISASSEMBLE( cop410 ) if (next_opcode >= 0x60 && next_opcode <= 0x6F) { - sprintf(buffer, "LEI %x", next_opcode & 0xF); + util::stream_format(stream, "LEI %x", next_opcode & 0xF); } else { switch (next_opcode) { case 0x01: - sprintf(buffer, "SKGBZ 0"); + util::stream_format(stream, "SKGBZ 0"); break; case 0x03: - sprintf(buffer, "SKGBZ 2"); + util::stream_format(stream, "SKGBZ 2"); break; case 0x11: - sprintf(buffer, "SKGBZ 1"); + util::stream_format(stream, "SKGBZ 1"); break; case 0x13: - sprintf(buffer, "SKGBZ 3"); + util::stream_format(stream, "SKGBZ 3"); break; case 0x21: - sprintf(buffer, "SKGZ"); + util::stream_format(stream, "SKGZ"); break; case 0x2A: - sprintf(buffer, "ING"); + util::stream_format(stream, "ING"); break; case 0x2E: - sprintf(buffer, "INL"); + util::stream_format(stream, "INL"); break; case 0x38: - sprintf(buffer, "HALT"); + util::stream_format(stream, "HALT"); break; case 0x3A: - sprintf(buffer, "OMG"); + util::stream_format(stream, "OMG"); break; case 0x3C: - sprintf(buffer, "CAMQ"); + util::stream_format(stream, "CAMQ"); break; case 0x3E: - sprintf(buffer, "OBD"); + util::stream_format(stream, "OBD"); break; default: - sprintf(buffer, "Invalid"); + util::stream_format(stream, "Invalid"); break; } break; } + break; case 0x34: - sprintf(buffer, "XIS 3"); + util::stream_format(stream, "XIS 3"); break; case 0x35: - sprintf(buffer, "LD 3"); + util::stream_format(stream, "LD 3"); break; case 0x36: - sprintf(buffer, "X 3"); + util::stream_format(stream, "X 3"); break; case 0x37: - sprintf(buffer, "XDS 3"); + util::stream_format(stream, "XDS 3"); break; case 0x40: - sprintf(buffer, "COMP"); + util::stream_format(stream, "COMP"); break; case 0x42: - sprintf(buffer, "RMB 2"); + util::stream_format(stream, "RMB 2"); break; case 0x43: - sprintf(buffer, "RMB 3"); + util::stream_format(stream, "RMB 3"); break; case 0x44: - sprintf(buffer, "NOP"); + util::stream_format(stream, "NOP"); break; case 0x45: - sprintf(buffer, "RMB 1"); + util::stream_format(stream, "RMB 1"); break; case 0x46: - sprintf(buffer, "SMB 2"); + util::stream_format(stream, "SMB 2"); break; case 0x47: - sprintf(buffer, "SMB 1"); + util::stream_format(stream, "SMB 1"); break; case 0x48: - sprintf(buffer, "RET"); + util::stream_format(stream, "RET"); flags = DASMFLAG_STEP_OUT; break; case 0x49: - sprintf(buffer, "RETSK"); + util::stream_format(stream, "RETSK"); flags = DASMFLAG_STEP_OUT; break; case 0x4B: - sprintf(buffer, "SMB 3"); + util::stream_format(stream, "SMB 3"); break; case 0x4C: - sprintf(buffer, "RMB 0"); + util::stream_format(stream, "RMB 0"); break; case 0x4D: - sprintf(buffer, "SMB 0"); + util::stream_format(stream, "SMB 0"); break; case 0x4E: - sprintf(buffer, "CBA"); + util::stream_format(stream, "CBA"); break; case 0x4F: - sprintf(buffer, "XAS"); + util::stream_format(stream, "XAS"); break; case 0x50: - sprintf(buffer, "CAB"); + util::stream_format(stream, "CAB"); break; case 0xBF: - sprintf(buffer, "LQID"); + util::stream_format(stream, "LQID"); break; case 0xFF: - sprintf(buffer, "JID"); + util::stream_format(stream, "JID"); break; default: - sprintf(buffer, "Invalid"); + util::stream_format(stream, "Invalid"); break; } } return bytes | flags | DASMFLAG_SUPPORTED; } + + +CPU_DISASSEMBLE(cop410) +{ + std::ostringstream stream; + offs_t result = internal_disasm_cop410(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} diff --git a/src/devices/cpu/cop400/cop420ds.cpp b/src/devices/cpu/cop400/cop420ds.cpp index e1e90eb7130..bf032238687 100644 --- a/src/devices/cpu/cop400/cop420ds.cpp +++ b/src/devices/cpu/cop400/cop420ds.cpp @@ -10,7 +10,7 @@ #include "emu.h" -CPU_DISASSEMBLE( cop420 ) +static offs_t internal_disasm_cop420(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { uint8_t opcode = oprom[0]; uint8_t next_opcode = oprom[1]; @@ -23,138 +23,138 @@ CPU_DISASSEMBLE( cop420 ) if ((pc & 0x3E0) >= 0x80 && (pc & 0x3E0) < 0x100) //JP pages 2,3 { address = (uint16_t)((pc & 0x380) | (opcode & 0x7F)); - sprintf(buffer, "JP %x", address); + util::stream_format(stream, "JP %x", address); } else { if ((opcode & 0xC0) == 0xC0) //JP other pages { address = (uint16_t)((pc & 0x3C0) | (opcode & 0x3F)); - sprintf(buffer, "JP %x", address); + util::stream_format(stream, "JP %x", address); } else //JSRP { address = (uint16_t)(0x80 | (opcode & 0x3F)); - sprintf(buffer, "JSRP %x", address); + util::stream_format(stream, "JSRP %x", address); flags = DASMFLAG_STEP_OVER; } } } else if (opcode >= 0x08 && opcode <= 0x0F) { - sprintf(buffer, "LBI 0,%u", ((opcode & 0xF) + 1) & 0xF); + util::stream_format(stream, "LBI 0,%u", ((opcode & 0xF) + 1) & 0xF); } else if (opcode >= 0x18 && opcode <= 0x1F) { - sprintf(buffer, "LBI 1,%u", ((opcode & 0xF) + 1) & 0xF); + util::stream_format(stream, "LBI 1,%u", ((opcode & 0xF) + 1) & 0xF); } else if (opcode >= 0x28 && opcode <= 0x2F) { - sprintf(buffer, "LBI 2,%u", ((opcode & 0xF) + 1) & 0xF); + util::stream_format(stream, "LBI 2,%u", ((opcode & 0xF) + 1) & 0xF); } else if (opcode >= 0x38 && opcode <= 0x3F) { - sprintf(buffer, "LBI 3,%u", ((opcode & 0xF) + 1) & 0xF); + util::stream_format(stream, "LBI 3,%u", ((opcode & 0xF) + 1) & 0xF); } else if (opcode >= 0x51 && opcode <= 0x5F) { - sprintf(buffer, "AISC %u", opcode & 0xF); + util::stream_format(stream, "AISC %u", opcode & 0xF); } else if (opcode >= 0x60 && opcode <= 0x63) { address = ((opcode & 0x03) << 8) | next_opcode; - sprintf(buffer, "JMP %x", address); + util::stream_format(stream, "JMP %x", address); bytes = 2; } else if (opcode >= 0x68 && opcode <= 0x6B) { address = ((opcode & 0x03) << 8) | next_opcode; - sprintf(buffer, "JSR %x", address); + util::stream_format(stream, "JSR %x", address); flags = DASMFLAG_STEP_OVER; bytes = 2; } else if (opcode >= 0x70 && opcode <= 0x7F) { - sprintf(buffer, "STII %u", opcode & 0xF); + util::stream_format(stream, "STII %u", opcode & 0xF); } else { switch (opcode) { case 0: - sprintf(buffer, "CLRA"); + util::stream_format(stream, "CLRA"); break; case 1: - sprintf(buffer, "SKMBZ 0"); + util::stream_format(stream, "SKMBZ 0"); break; case 2: - sprintf(buffer, "XOR"); + util::stream_format(stream, "XOR"); break; case 3: - sprintf(buffer, "SKMBZ 2"); + util::stream_format(stream, "SKMBZ 2"); break; case 4: - sprintf(buffer, "XIS 0"); + util::stream_format(stream, "XIS 0"); break; case 5: - sprintf(buffer, "LD 0"); + util::stream_format(stream, "LD 0"); break; case 6: - sprintf(buffer, "X 0"); + util::stream_format(stream, "X 0"); break; case 7: - sprintf(buffer, "XDS 0"); + util::stream_format(stream, "XDS 0"); break; case 0x10: - sprintf(buffer, "CASC"); + util::stream_format(stream, "CASC"); break; case 0x11: - sprintf(buffer, "SKMBZ 1"); + util::stream_format(stream, "SKMBZ 1"); break; case 0x12: - sprintf(buffer, "XABR"); + util::stream_format(stream, "XABR"); break; case 0x13: - sprintf(buffer, "SKMBZ 3"); + util::stream_format(stream, "SKMBZ 3"); break; case 0x14: - sprintf(buffer, "XIS 1"); + util::stream_format(stream, "XIS 1"); break; case 0x15: - sprintf(buffer, "LD 1"); + util::stream_format(stream, "LD 1"); break; case 0x16: - sprintf(buffer, "X 1"); + util::stream_format(stream, "X 1"); break; case 0x17: - sprintf(buffer, "XDS 1"); + util::stream_format(stream, "XDS 1"); break; case 0x20: - sprintf(buffer, "SKC"); + util::stream_format(stream, "SKC"); break; case 0x21: - sprintf(buffer, "SKE"); + util::stream_format(stream, "SKE"); break; case 0x22: - sprintf(buffer, "SC"); + util::stream_format(stream, "SC"); break; case 0x23: @@ -163,45 +163,45 @@ CPU_DISASSEMBLE( cop420 ) if (next_opcode <= 0x3f) { address = (uint16_t)(next_opcode & 0x3F); - sprintf(buffer, "LDD %x,%x", ((address & 0x30) >> 4),address & 0x0F); + util::stream_format(stream, "LDD %x,%x", ((address & 0x30) >> 4),address & 0x0F); } else if (next_opcode >= 0x80 && next_opcode <= 0xbf) { address = (uint16_t)(next_opcode & 0x3F); - sprintf(buffer, "XAD %x,%x", ((address & 0x30) >> 4),address & 0x0F); + util::stream_format(stream, "XAD %x,%x", ((address & 0x30) >> 4),address & 0x0F); } else { - sprintf(buffer, "Invalid"); + util::stream_format(stream, "Invalid"); } break; case 0x24: - sprintf(buffer, "XIS 2"); + util::stream_format(stream, "XIS 2"); break; case 0x25: - sprintf(buffer, "LD 2"); + util::stream_format(stream, "LD 2"); break; case 0x26: - sprintf(buffer, "X 2"); + util::stream_format(stream, "X 2"); break; case 0x27: - sprintf(buffer, "XDS 2"); + util::stream_format(stream, "XDS 2"); break; case 0x30: - sprintf(buffer, "ASC"); + util::stream_format(stream, "ASC"); break; case 0x31: - sprintf(buffer, "ADD"); + util::stream_format(stream, "ADD"); break; case 0x32: - sprintf(buffer, "RC"); + util::stream_format(stream, "RC"); break; case 0x33: @@ -209,190 +209,200 @@ CPU_DISASSEMBLE( cop420 ) if (next_opcode >= 0x50 && next_opcode <= 0x5F) { - sprintf(buffer, "OGI %u", next_opcode & 0xF); + util::stream_format(stream, "OGI %u", next_opcode & 0xF); } else if (next_opcode >= 0x60 && next_opcode <= 0x6F) { - sprintf(buffer, "LEI %u", next_opcode & 0xF); + util::stream_format(stream, "LEI %u", next_opcode & 0xF); } else if (next_opcode >= 0x80 && next_opcode <= 0x8F) { - sprintf(buffer, "LBI 0,%u", next_opcode & 0xF); + util::stream_format(stream, "LBI 0,%u", next_opcode & 0xF); } else if (next_opcode >= 0x90 && next_opcode <= 0x9F) { - sprintf(buffer, "LBI 1,%u", next_opcode & 0xF); + util::stream_format(stream, "LBI 1,%u", next_opcode & 0xF); } else if (next_opcode >= 0xA0 && next_opcode <= 0xAF) { - sprintf(buffer, "LBI 2,%u", next_opcode & 0xF); + util::stream_format(stream, "LBI 2,%u", next_opcode & 0xF); } else if (next_opcode >= 0xB0 && next_opcode <= 0xBF) { - sprintf(buffer, "LBI 3,%u", next_opcode & 0xF); + util::stream_format(stream, "LBI 3,%u", next_opcode & 0xF); } else { switch (next_opcode) { case 0x01: - sprintf(buffer, "SKGBZ 0"); + util::stream_format(stream, "SKGBZ 0"); break; case 0x03: - sprintf(buffer, "SKGBZ 2"); + util::stream_format(stream, "SKGBZ 2"); break; case 0x11: - sprintf(buffer, "SKGBZ 1"); + util::stream_format(stream, "SKGBZ 1"); break; case 0x13: - sprintf(buffer, "SKGBZ 3"); + util::stream_format(stream, "SKGBZ 3"); break; case 0x21: - sprintf(buffer, "SKGZ"); + util::stream_format(stream, "SKGZ"); break; case 0x28: - sprintf(buffer, "ININ"); + util::stream_format(stream, "ININ"); break; case 0x29: - sprintf(buffer, "INIL"); + util::stream_format(stream, "INIL"); break; case 0x2A: - sprintf(buffer, "ING"); + util::stream_format(stream, "ING"); break; case 0x2C: - sprintf(buffer, "CQMA"); + util::stream_format(stream, "CQMA"); break; case 0x2E: - sprintf(buffer, "INL"); + util::stream_format(stream, "INL"); break; case 0x3A: - sprintf(buffer, "OMG"); + util::stream_format(stream, "OMG"); break; case 0x3C: - sprintf(buffer, "CAMQ"); + util::stream_format(stream, "CAMQ"); break; case 0x3E: - sprintf(buffer, "OBD"); + util::stream_format(stream, "OBD"); break; default: - sprintf(buffer, "Invalid"); + util::stream_format(stream, "Invalid"); break; } } break; case 0x34: - sprintf(buffer, "XIS 3"); + util::stream_format(stream, "XIS 3"); break; case 0x35: - sprintf(buffer, "LD 3"); + util::stream_format(stream, "LD 3"); break; case 0x36: - sprintf(buffer, "X 3"); + util::stream_format(stream, "X 3"); break; case 0x37: - sprintf(buffer, "XDS 3"); + util::stream_format(stream, "XDS 3"); break; case 0x40: - sprintf(buffer, "COMP"); + util::stream_format(stream, "COMP"); break; case 0x41: - sprintf(buffer, "SKT"); + util::stream_format(stream, "SKT"); break; case 0x42: - sprintf(buffer, "RMB 2"); + util::stream_format(stream, "RMB 2"); break; case 0x43: - sprintf(buffer, "RMB 3"); + util::stream_format(stream, "RMB 3"); break; case 0x44: - sprintf(buffer, "NOP"); + util::stream_format(stream, "NOP"); break; case 0x45: - sprintf(buffer, "RMB 1"); + util::stream_format(stream, "RMB 1"); break; case 0x46: - sprintf(buffer, "SMB 2"); + util::stream_format(stream, "SMB 2"); break; case 0x47: - sprintf(buffer, "SMB 1"); + util::stream_format(stream, "SMB 1"); break; case 0x48: - sprintf(buffer, "RET"); + util::stream_format(stream, "RET"); flags = DASMFLAG_STEP_OUT; break; case 0x49: - sprintf(buffer, "RETSK"); + util::stream_format(stream, "RETSK"); flags = DASMFLAG_STEP_OUT; break; case 0x4A: - sprintf(buffer, "ADT"); + util::stream_format(stream, "ADT"); break; case 0x4B: - sprintf(buffer, "SMB 3"); + util::stream_format(stream, "SMB 3"); break; case 0x4C: - sprintf(buffer, "RMB 0"); + util::stream_format(stream, "RMB 0"); break; case 0x4D: - sprintf(buffer, "SMB 0"); + util::stream_format(stream, "SMB 0"); break; case 0x4E: - sprintf(buffer, "CBA"); + util::stream_format(stream, "CBA"); break; case 0x4F: - sprintf(buffer, "XAS"); + util::stream_format(stream, "XAS"); break; case 0x50: - sprintf(buffer, "CAB"); + util::stream_format(stream, "CAB"); break; case 0xBF: - sprintf(buffer, "LQID"); + util::stream_format(stream, "LQID"); break; case 0xFF: - sprintf(buffer, "JID"); + util::stream_format(stream, "JID"); break; default: - sprintf(buffer, "Invalid"); + util::stream_format(stream, "Invalid"); break; } } return bytes | flags | DASMFLAG_SUPPORTED; } + + +CPU_DISASSEMBLE(cop420) +{ + std::ostringstream stream; + offs_t result = internal_disasm_cop420(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} diff --git a/src/devices/cpu/cop400/cop440ds.cpp b/src/devices/cpu/cop400/cop440ds.cpp index 460cf0a4e5b..0150e20ea76 100644 --- a/src/devices/cpu/cop400/cop440ds.cpp +++ b/src/devices/cpu/cop400/cop440ds.cpp @@ -4,13 +4,13 @@ cop440ds.c - National Semiconductor COP420 Emulator. + National Semiconductor COP440 Emulator. ***************************************************************************/ #include "emu.h" -CPU_DISASSEMBLE( cop444 ) +static offs_t internal_disasm_cop444(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { uint8_t opcode = oprom[0]; uint8_t next_opcode = oprom[1]; @@ -23,138 +23,138 @@ CPU_DISASSEMBLE( cop444 ) if ((pc & 0x3E0) >= 0x80 && (pc & 0x3E0) < 0x100) //JP pages 2,3 { address = (uint16_t)((pc & 0x380) | (opcode & 0x7F)); - sprintf(buffer, "JP %x", address); + util::stream_format(stream, "JP %x", address); } else { if ((opcode & 0xC0) == 0xC0) //JP other pages { address = (uint16_t)((pc & 0x3C0) | (opcode & 0x3F)); - sprintf(buffer, "JP %x", address); + util::stream_format(stream, "JP %x", address); } else //JSRP { address = (uint16_t)(0x80 | (opcode & 0x3F)); - sprintf(buffer, "JSRP %x", address); + util::stream_format(stream, "JSRP %x", address); flags = DASMFLAG_STEP_OVER; } } } else if (opcode >= 0x08 && opcode <= 0x0F) { - sprintf(buffer, "LBI 0,%u", ((opcode & 0xF) + 1) & 0xF); + util::stream_format(stream, "LBI 0,%u", ((opcode & 0xF) + 1) & 0xF); } else if (opcode >= 0x18 && opcode <= 0x1F) { - sprintf(buffer, "LBI 1,%u", ((opcode & 0xF) + 1) & 0xF); + util::stream_format(stream, "LBI 1,%u", ((opcode & 0xF) + 1) & 0xF); } else if (opcode >= 0x28 && opcode <= 0x2F) { - sprintf(buffer, "LBI 2,%u", ((opcode & 0xF) + 1) & 0xF); + util::stream_format(stream, "LBI 2,%u", ((opcode & 0xF) + 1) & 0xF); } else if (opcode >= 0x38 && opcode <= 0x3F) { - sprintf(buffer, "LBI 3,%u", ((opcode & 0xF) + 1) & 0xF); + util::stream_format(stream, "LBI 3,%u", ((opcode & 0xF) + 1) & 0xF); } else if (opcode >= 0x51 && opcode <= 0x5F) { - sprintf(buffer, "AISC %u", opcode & 0xF); + util::stream_format(stream, "AISC %u", opcode & 0xF); } else if (opcode >= 0x60 && opcode <= 0x63) { address = ((opcode & 0x03) << 8) | next_opcode; - sprintf(buffer, "JMP %x", address); + util::stream_format(stream, "JMP %x", address); bytes = 2; } else if (opcode >= 0x68 && opcode <= 0x6B) { address = ((opcode & 0x03) << 8) | next_opcode; - sprintf(buffer, "JSR %x", address); + util::stream_format(stream, "JSR %x", address); flags = DASMFLAG_STEP_OVER; bytes = 2; } else if (opcode >= 0x70 && opcode <= 0x7F) { - sprintf(buffer, "STII %u", opcode & 0xF); + util::stream_format(stream, "STII %u", opcode & 0xF); } else { switch (opcode) { case 0: - sprintf(buffer, "CLRA"); + util::stream_format(stream, "CLRA"); break; case 1: - sprintf(buffer, "SKMBZ 0"); + util::stream_format(stream, "SKMBZ 0"); break; case 2: - sprintf(buffer, "XOR"); + util::stream_format(stream, "XOR"); break; case 3: - sprintf(buffer, "SKMBZ 2"); + util::stream_format(stream, "SKMBZ 2"); break; case 4: - sprintf(buffer, "XIS 0"); + util::stream_format(stream, "XIS 0"); break; case 5: - sprintf(buffer, "LD 0"); + util::stream_format(stream, "LD 0"); break; case 6: - sprintf(buffer, "X 0"); + util::stream_format(stream, "X 0"); break; case 7: - sprintf(buffer, "XDS 0"); + util::stream_format(stream, "XDS 0"); break; case 0x10: - sprintf(buffer, "CASC"); + util::stream_format(stream, "CASC"); break; case 0x11: - sprintf(buffer, "SKMBZ 1"); + util::stream_format(stream, "SKMBZ 1"); break; case 0x12: - sprintf(buffer, "XABR"); + util::stream_format(stream, "XABR"); break; case 0x13: - sprintf(buffer, "SKMBZ 3"); + util::stream_format(stream, "SKMBZ 3"); break; case 0x14: - sprintf(buffer, "XIS 1"); + util::stream_format(stream, "XIS 1"); break; case 0x15: - sprintf(buffer, "LD 1"); + util::stream_format(stream, "LD 1"); break; case 0x16: - sprintf(buffer, "X 1"); + util::stream_format(stream, "X 1"); break; case 0x17: - sprintf(buffer, "XDS 1"); + util::stream_format(stream, "XDS 1"); break; case 0x20: - sprintf(buffer, "SKC"); + util::stream_format(stream, "SKC"); break; case 0x21: - sprintf(buffer, "SKE"); + util::stream_format(stream, "SKE"); break; case 0x22: - sprintf(buffer, "SC"); + util::stream_format(stream, "SC"); break; case 0x23: @@ -163,45 +163,45 @@ CPU_DISASSEMBLE( cop444 ) if (next_opcode <= 0x3f) { address = (uint16_t)(next_opcode & 0x3F); - sprintf(buffer, "LDD %x,%x", ((address & 0x30) >> 4),address & 0x0F); + util::stream_format(stream, "LDD %x,%x", ((address & 0x30) >> 4),address & 0x0F); } else if (next_opcode >= 0x80 && next_opcode <= 0xbf) { address = (uint16_t)(next_opcode & 0x3F); - sprintf(buffer, "XAD %x,%x", ((address & 0x30) >> 4),address & 0x0F); + util::stream_format(stream, "XAD %x,%x", ((address & 0x30) >> 4),address & 0x0F); } else { - sprintf(buffer, "Invalid"); + util::stream_format(stream, "Invalid"); } break; case 0x24: - sprintf(buffer, "XIS 2"); + util::stream_format(stream, "XIS 2"); break; case 0x25: - sprintf(buffer, "LD 2"); + util::stream_format(stream, "LD 2"); break; case 0x26: - sprintf(buffer, "X 2"); + util::stream_format(stream, "X 2"); break; case 0x27: - sprintf(buffer, "XDS 2"); + util::stream_format(stream, "XDS 2"); break; case 0x30: - sprintf(buffer, "ASC"); + util::stream_format(stream, "ASC"); break; case 0x31: - sprintf(buffer, "ADD"); + util::stream_format(stream, "ADD"); break; case 0x32: - sprintf(buffer, "RC"); + util::stream_format(stream, "RC"); break; case 0x33: @@ -209,207 +209,217 @@ CPU_DISASSEMBLE( cop444 ) if (next_opcode >= 0x50 && next_opcode <= 0x5F) { - sprintf(buffer, "OGI %u", next_opcode & 0xF); + util::stream_format(stream, "OGI %u", next_opcode & 0xF); } else if (next_opcode >= 0x60 && next_opcode <= 0x6F) { - sprintf(buffer, "LEI %u", next_opcode & 0xF); + util::stream_format(stream, "LEI %u", next_opcode & 0xF); } else if (next_opcode >= 0x80 && next_opcode <= 0x8F) { - sprintf(buffer, "LBI 0,%u", next_opcode & 0xF); + util::stream_format(stream, "LBI 0,%u", next_opcode & 0xF); } else if (next_opcode >= 0x90 && next_opcode <= 0x9F) { - sprintf(buffer, "LBI 1,%u", next_opcode & 0xF); + util::stream_format(stream, "LBI 1,%u", next_opcode & 0xF); } else if (next_opcode >= 0xA0 && next_opcode <= 0xAF) { - sprintf(buffer, "LBI 2,%u", next_opcode & 0xF); + util::stream_format(stream, "LBI 2,%u", next_opcode & 0xF); } else if (next_opcode >= 0xB0 && next_opcode <= 0xBF) { - sprintf(buffer, "LBI 3,%u", next_opcode & 0xF); + util::stream_format(stream, "LBI 3,%u", next_opcode & 0xF); } else { switch (next_opcode) { case 0x01: - sprintf(buffer, "SKGBZ 0"); + util::stream_format(stream, "SKGBZ 0"); break; case 0x03: - sprintf(buffer, "SKGBZ 2"); + util::stream_format(stream, "SKGBZ 2"); break; case 0x11: - sprintf(buffer, "SKGBZ 1"); + util::stream_format(stream, "SKGBZ 1"); break; case 0x13: - sprintf(buffer, "SKGBZ 3"); + util::stream_format(stream, "SKGBZ 3"); break; case 0x21: - sprintf(buffer, "SKGZ"); + util::stream_format(stream, "SKGZ"); break; case 0x28: - sprintf(buffer, "ININ"); + util::stream_format(stream, "ININ"); break; case 0x29: - sprintf(buffer, "INIL"); + util::stream_format(stream, "INIL"); break; case 0x2A: - sprintf(buffer, "ING"); + util::stream_format(stream, "ING"); break; case 0x2C: - sprintf(buffer, "CQMA"); + util::stream_format(stream, "CQMA"); break; case 0x2E: - sprintf(buffer, "INL"); + util::stream_format(stream, "INL"); break; case 0x2F: - sprintf(buffer, "CTMA"); + util::stream_format(stream, "CTMA"); break; case 0x38: - sprintf(buffer, "HALT"); + util::stream_format(stream, "HALT"); break; case 0x39: - sprintf(buffer, "IT"); + util::stream_format(stream, "IT"); break; case 0x3A: - sprintf(buffer, "OMG"); + util::stream_format(stream, "OMG"); break; case 0x3C: - sprintf(buffer, "CAMQ"); + util::stream_format(stream, "CAMQ"); break; case 0x3E: - sprintf(buffer, "OBD"); + util::stream_format(stream, "OBD"); break; case 0x3F: - sprintf(buffer, "CAMT"); + util::stream_format(stream, "CAMT"); break; default: - sprintf(buffer, "Invalid"); + util::stream_format(stream, "Invalid"); break; } } break; case 0x34: - sprintf(buffer, "XIS 3"); + util::stream_format(stream, "XIS 3"); break; case 0x35: - sprintf(buffer, "LD 3"); + util::stream_format(stream, "LD 3"); break; case 0x36: - sprintf(buffer, "X 3"); + util::stream_format(stream, "X 3"); break; case 0x37: - sprintf(buffer, "XDS 3"); + util::stream_format(stream, "XDS 3"); break; case 0x40: - sprintf(buffer, "COMP"); + util::stream_format(stream, "COMP"); break; case 0x41: - sprintf(buffer, "SKT"); + util::stream_format(stream, "SKT"); break; case 0x42: - sprintf(buffer, "RMB 2"); + util::stream_format(stream, "RMB 2"); break; case 0x43: - sprintf(buffer, "RMB 3"); + util::stream_format(stream, "RMB 3"); break; case 0x44: - sprintf(buffer, "NOP"); + util::stream_format(stream, "NOP"); break; case 0x45: - sprintf(buffer, "RMB 1"); + util::stream_format(stream, "RMB 1"); break; case 0x46: - sprintf(buffer, "SMB 2"); + util::stream_format(stream, "SMB 2"); break; case 0x47: - sprintf(buffer, "SMB 1"); + util::stream_format(stream, "SMB 1"); break; case 0x48: - sprintf(buffer, "RET"); + util::stream_format(stream, "RET"); flags = DASMFLAG_STEP_OUT; break; case 0x49: - sprintf(buffer, "RETSK"); + util::stream_format(stream, "RETSK"); flags = DASMFLAG_STEP_OUT; break; case 0x4A: - sprintf(buffer, "ADT"); + util::stream_format(stream, "ADT"); break; case 0x4B: - sprintf(buffer, "SMB 3"); + util::stream_format(stream, "SMB 3"); break; case 0x4C: - sprintf(buffer, "RMB 0"); + util::stream_format(stream, "RMB 0"); break; case 0x4D: - sprintf(buffer, "SMB 0"); + util::stream_format(stream, "SMB 0"); break; case 0x4E: - sprintf(buffer, "CBA"); + util::stream_format(stream, "CBA"); break; case 0x4F: - sprintf(buffer, "XAS"); + util::stream_format(stream, "XAS"); break; case 0x50: - sprintf(buffer, "CAB"); + util::stream_format(stream, "CAB"); break; case 0xBF: - sprintf(buffer, "LQID"); + util::stream_format(stream, "LQID"); break; case 0xFF: - sprintf(buffer, "JID"); + util::stream_format(stream, "JID"); break; default: - sprintf(buffer, "Invalid"); + util::stream_format(stream, "Invalid"); break; } } return bytes | flags | DASMFLAG_SUPPORTED; } + + +CPU_DISASSEMBLE(cop444) +{ + std::ostringstream stream; + offs_t result = internal_disasm_cop444(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} diff --git a/src/devices/cpu/cosmac/cosdasm.cpp b/src/devices/cpu/cosmac/cosdasm.cpp index ce93110e021..c5689b25fcc 100644 --- a/src/devices/cpu/cosmac/cosdasm.cpp +++ b/src/devices/cpu/cosmac/cosdasm.cpp @@ -18,10 +18,10 @@ enum }; #define CDP1801_OPCODE(...) \ - sprintf(buffer, __VA_ARGS__) + util::stream_format(stream, __VA_ARGS__) #define CDP1802_OPCODE(...) \ - if (variant < TYPE_1802) sprintf(buffer, "illegal"); else sprintf(buffer, __VA_ARGS__) + if (variant < TYPE_1802) stream << "illegal"; else util::stream_format(stream, __VA_ARGS__) static offs_t implied(const uint8_t opcode) { @@ -53,7 +53,7 @@ static offs_t long_skip(offs_t pc) return pc + 3; } -static uint32_t disassemble(device_t *device, char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t variant) +static uint32_t disassemble(device_t *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t variant) { const uint8_t *startram = opram; uint32_t flags = 0; @@ -185,6 +185,16 @@ static uint32_t disassemble(device_t *device, char *buffer, offs_t pc, const uin } +static uint32_t disassemble(device_t *device, char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t variant) +{ + std::ostringstream stream; + uint32_t result = disassemble(device, stream, pc, oprom, opram, variant); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} + + CPU_DISASSEMBLE( cdp1801 ) { return disassemble(device, buffer, pc, oprom, opram, TYPE_1801); diff --git a/src/devices/cpu/cp1610/1610dasm.cpp b/src/devices/cpu/cp1610/1610dasm.cpp index 964b1a5e612..5a2daf2cbfe 100644 --- a/src/devices/cpu/cp1610/1610dasm.cpp +++ b/src/devices/cpu/cp1610/1610dasm.cpp @@ -4,7 +4,7 @@ #include "debugger.h" #include "cp1610.h" -CPU_DISASSEMBLE( cp1610 ) +static offs_t internal_disasm_cp1610(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { uint16_t oprom16[4]={ static_cast<uint16_t>((oprom[0] << 8) | oprom[1]), static_cast<uint16_t>((oprom[2] << 8) | oprom[3]), static_cast<uint16_t>((oprom[4] << 8) | oprom[5]), static_cast<uint16_t>((oprom[6] << 8) | oprom[7]) }; uint16_t op = oprom16[0]; uint16_t subop; @@ -17,7 +17,7 @@ CPU_DISASSEMBLE( cp1610 ) /* opcode bitmask */ case 0x00: /* 0 000 000 000 */ // sym = set_ea_info( 0, 12, EA_UINT8, EA_ZPG_RD ); - sprintf(buffer, "HLT"); + util::stream_format(stream, "HLT"); break; case 0x001: /* 0 000 000 001 */ subop = oprom16[1]; @@ -30,14 +30,14 @@ CPU_DISASSEMBLE( cp1610 ) case 0x2a0: /* 1 010 100 xxx */ case 0x2a8: /* 1 010 101 xxx */ case 0x2b0: /* 1 010 110 xxx */ - sprintf(buffer,"MVI@ (R%01d), R%01d",(subop&0x38)>>3,subop&7); + util::stream_format(stream, "MVI@ (R%01d), R%01d",(subop&0x38)>>3,subop&7); size += 1; break; case 0x2b8: /* 1 010 111 xxx */ ea1 = oprom16[2]; ea2 = oprom16[3]; ea = ((ea2&0xff)<<8) | (ea1&0xff); - sprintf(buffer,"MVII #%04X, R%01d",ea,subop&7); + util::stream_format(stream, "MVII #%04X, R%01d",ea,subop&7); size += 3; break; case 0x2c0: /* 1 011 000 xxx */ @@ -47,14 +47,14 @@ CPU_DISASSEMBLE( cp1610 ) case 0x2e0: /* 1 011 100 xxx */ case 0x2e8: /* 1 011 101 xxx */ case 0x2f0: /* 1 011 110 xxx */ - sprintf(buffer,"ADD@ (R%01d), R%01d",(subop&0x38)>>3,subop&7); + util::stream_format(stream, "ADD@ (R%01d), R%01d",(subop&0x38)>>3,subop&7); size += 1; break; case 0x2f8: /* 1 011 111 xxx */ ea1 = oprom16[2]; ea2 = oprom16[3]; ea = ((ea2&0xff)<<8) | (ea1&0xff); - sprintf(buffer,"ADDI #%04X, R%01d",ea,subop&7); + util::stream_format(stream, "ADDI #%04X, R%01d",ea,subop&7); size += 3; break; case 0x300: /* 1 100 000 xxx */ @@ -64,14 +64,14 @@ CPU_DISASSEMBLE( cp1610 ) case 0x320: /* 1 100 100 xxx */ case 0x328: /* 1 100 101 xxx */ case 0x330: /* 1 100 110 xxx */ - sprintf(buffer,"SUB@ (R%01d), R%01d",(subop&0x38)>>3,subop&7); + util::stream_format(stream, "SUB@ (R%01d), R%01d",(subop&0x38)>>3,subop&7); size += 1; break; case 0x338: /* 1 100 111 xxx */ ea1 = oprom16[2]; ea2 = oprom16[3]; ea = ((ea2&0xff)<<8) | (ea1&0xff); - sprintf(buffer,"SUBI #%04X, R%01d",ea,subop&7); + util::stream_format(stream, "SUBI #%04X, R%01d",ea,subop&7); size += 3; break; case 0x340: /* 1 101 000 xxx */ @@ -81,14 +81,14 @@ CPU_DISASSEMBLE( cp1610 ) case 0x360: /* 1 101 100 xxx */ case 0x368: /* 1 101 101 xxx */ case 0x370: /* 1 101 110 xxx */ - sprintf(buffer,"CMP@ (R%01d), R%01d",(subop&0x38)>>3,subop&7); + util::stream_format(stream, "CMP@ (R%01d), R%01d",(subop&0x38)>>3,subop&7); size += 1; break; case 0x378: /* 1 101 111 xxx */ ea1 = oprom16[2]; ea2 = oprom16[3]; ea = ((ea2&0xff)<<8) | (ea1&0xff); - sprintf(buffer,"CMPI #%04X, R%01d",ea,subop&7); + util::stream_format(stream, "CMPI #%04X, R%01d",ea,subop&7); size += 3; break; case 0x380: /* 1 110 000 xxx */ @@ -98,14 +98,14 @@ CPU_DISASSEMBLE( cp1610 ) case 0x3a0: /* 1 110 100 xxx */ case 0x3a8: /* 1 110 101 xxx */ case 0x3b0: /* 1 110 110 xxx */ - sprintf(buffer,"AND@ (R%01d), R%01d",(subop&0x38)>>3,subop&7); + util::stream_format(stream, "AND@ (R%01d), R%01d",(subop&0x38)>>3,subop&7); size += 1; break; case 0x3b8: /* 1 110 111 xxx */ ea1 = oprom16[2]; ea2 = oprom16[3]; ea = ((ea2&0xff)<<8) | (ea1&0xff); - sprintf(buffer,"ANDI #%04X, R%01d",ea,subop&7); + util::stream_format(stream, "ANDI #%04X, R%01d",ea,subop&7); size += 3; break; case 0x3c0: /* 1 111 000 xxx */ @@ -115,26 +115,26 @@ CPU_DISASSEMBLE( cp1610 ) case 0x3e0: /* 1 111 100 xxx */ case 0x3e8: /* 1 111 101 xxx */ case 0x3f0: /* 1 111 110 xxx */ - sprintf(buffer,"XOR@ (R%01d), R%01d",(subop&0x38)>>3,subop&7); + util::stream_format(stream, "XOR@ (R%01d), R%01d",(subop&0x38)>>3,subop&7); size += 1; break; case 0x3f8: /* 1 111 111 xxx */ ea1 = oprom16[2]; ea2 = oprom16[3]; ea = ((ea2&0xff)<<8) | (ea1&0xff); - sprintf(buffer,"XORI #%04X, R%01d",ea,subop&7); + util::stream_format(stream, "XORI #%04X, R%01d",ea,subop&7); size += 3; break; default: size += 1; - sprintf(buffer, "SDBD ????"); + util::stream_format(stream, "SDBD ????"); } break; case 0x002: /* 0 000 000 010 */ - sprintf(buffer, "EIS"); + util::stream_format(stream, "EIS"); break; case 0x003: /* 0 000 000 011 */ - sprintf(buffer, "DIS"); + util::stream_format(stream, "DIS"); break; case 0x004: /* 0 000 000 100 */ size += 2; @@ -147,16 +147,16 @@ CPU_DISASSEMBLE( cp1610 ) switch(ea1 & 0x03) { case 0: - sprintf(buffer, "J %04X",ea); + util::stream_format(stream, "J %04X",ea); break; case 1: - sprintf(buffer, "JE %04X",ea); + util::stream_format(stream, "JE %04X",ea); break; case 2: - sprintf(buffer, "JD %04X",ea); + util::stream_format(stream, "JD %04X",ea); break; case 3: - sprintf(buffer, "????"); + util::stream_format(stream, "????"); break; } } @@ -166,28 +166,28 @@ CPU_DISASSEMBLE( cp1610 ) switch(ea1 & 0x03) { case 0: - sprintf(buffer, "JSR R%01d,%04X",((ea1&0x300)>>8)+4,ea); + util::stream_format(stream, "JSR R%01d,%04X",((ea1&0x300)>>8)+4,ea); break; case 1: - sprintf(buffer, "JSRE R%01d,%04X",((ea1&0x300)>>8)+4,ea); + util::stream_format(stream, "JSRE R%01d,%04X",((ea1&0x300)>>8)+4,ea); break; case 2: - sprintf(buffer, "JSRD R%01d,%04X",((ea1&0x300)>>8)+4,ea); + util::stream_format(stream, "JSRD R%01d,%04X",((ea1&0x300)>>8)+4,ea); break; case 3: - sprintf(buffer, "????"); + util::stream_format(stream, "????"); break; } } break; case 0x005: /* 0 000 000 101 */ - sprintf(buffer, "TCI"); + util::stream_format(stream, "TCI"); break; case 0x006: /* 0 000 000 110 */ - sprintf(buffer, "CLRC"); + util::stream_format(stream, "CLRC"); break; case 0x007: /* 0 000 000 111 */ - sprintf(buffer, "SETC"); + util::stream_format(stream, "SETC"); break; case 0x008: /* 0 000 001 000 */ case 0x009: /* 0 000 001 001 */ @@ -197,7 +197,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x00d: /* 0 000 001 101 */ case 0x00e: /* 0 000 001 110 */ case 0x00f: /* 0 000 001 111 */ - sprintf(buffer, "INCR R%01d",op&0x7); + util::stream_format(stream, "INCR R%01d",op&0x7); break; case 0x010: /* 0 000 010 000 */ case 0x011: /* 0 000 010 001 */ @@ -207,7 +207,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x015: /* 0 000 010 101 */ case 0x016: /* 0 000 010 110 */ case 0x017: /* 0 000 010 111 */ - sprintf(buffer, "DECR R%01d",op&0x7); + util::stream_format(stream, "DECR R%01d",op&0x7); break; case 0x018: /* 0 000 011 000 */ case 0x019: /* 0 000 011 001 */ @@ -217,7 +217,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x01d: /* 0 000 011 101 */ case 0x01e: /* 0 000 011 110 */ case 0x01f: /* 0 000 011 111 */ - sprintf(buffer, "COMR R%01d",op&0x7); + util::stream_format(stream, "COMR R%01d",op&0x7); break; case 0x020: /* 0 000 100 000 */ case 0x021: /* 0 000 100 001 */ @@ -227,7 +227,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x025: /* 0 000 100 101 */ case 0x026: /* 0 000 100 110 */ case 0x027: /* 0 000 100 111 */ - sprintf(buffer, "NEGR R%01d",op&0x7); + util::stream_format(stream, "NEGR R%01d",op&0x7); break; case 0x028: /* 0 000 101 000 */ case 0x029: /* 0 000 101 001 */ @@ -237,21 +237,21 @@ CPU_DISASSEMBLE( cp1610 ) case 0x02d: /* 0 000 101 101 */ case 0x02e: /* 0 000 101 110 */ case 0x02f: /* 0 000 101 111 */ - sprintf(buffer, "ADCR R%01d",op&0x7); + util::stream_format(stream, "ADCR R%01d",op&0x7); break; case 0x030: /* 0 000 110 000 */ case 0x031: /* 0 000 110 001 */ case 0x032: /* 0 000 110 010 */ case 0x033: /* 0 000 110 011 */ - sprintf(buffer, "GSWD R%01d",op&0x3); + util::stream_format(stream, "GSWD R%01d",op&0x3); break; case 0x034: /* 0 000 110 100 */ case 0x035: /* 0 000 110 101 */ - sprintf(buffer, "NOP (%01d)",op&0x1); //??? + util::stream_format(stream, "NOP (%01d)",op&0x1); //??? break; case 0x036: /* 0 000 110 110 */ case 0x037: /* 0 000 110 111 */ - sprintf(buffer, "SIN"); + util::stream_format(stream, "SIN"); break; case 0x038: /* 0 000 111 000 */ case 0x039: /* 0 000 111 001 */ @@ -261,103 +261,103 @@ CPU_DISASSEMBLE( cp1610 ) case 0x03d: /* 0 000 111 101 */ case 0x03e: /* 0 000 111 110 */ case 0x03f: /* 0 000 111 111 */ - sprintf(buffer, "RSWD R%01d",op&0x7); + util::stream_format(stream, "RSWD R%01d",op&0x7); break; case 0x040: /* 0 001 000 000 */ case 0x041: /* 0 001 000 001 */ case 0x042: /* 0 001 000 010 */ case 0x043: /* 0 001 000 011 */ - sprintf(buffer, "SWAP R%01d,1",op&0x3); + util::stream_format(stream, "SWAP R%01d,1",op&0x3); break; case 0x044: /* 0 001 000 100 */ case 0x045: /* 0 001 000 101 */ case 0x046: /* 0 001 000 110 */ case 0x047: /* 0 001 000 111 */ - sprintf(buffer, "SWAP R%01d,2",op&0x3); + util::stream_format(stream, "SWAP R%01d,2",op&0x3); break; case 0x048: /* 0 001 001 000 */ case 0x049: /* 0 001 001 001 */ case 0x04a: /* 0 001 001 010 */ case 0x04b: /* 0 001 001 011 */ - sprintf(buffer, "SLL R%01d,1",op&0x3); + util::stream_format(stream, "SLL R%01d,1",op&0x3); break; case 0x04c: /* 0 001 001 100 */ case 0x04d: /* 0 001 001 101 */ case 0x04e: /* 0 001 001 110 */ case 0x04f: /* 0 001 001 111 */ - sprintf(buffer, "SLL R%01d,2",op&0x3); + util::stream_format(stream, "SLL R%01d,2",op&0x3); break; case 0x050: /* 0 001 010 000 */ case 0x051: /* 0 001 010 001 */ case 0x052: /* 0 001 010 010 */ case 0x053: /* 0 001 010 011 */ - sprintf(buffer, "RLC R%01d,1",op&0x3); + util::stream_format(stream, "RLC R%01d,1",op&0x3); break; case 0x054: /* 0 001 010 100 */ case 0x055: /* 0 001 010 101 */ case 0x056: /* 0 001 010 110 */ case 0x057: /* 0 001 010 111 */ - sprintf(buffer, "RLC R%01d,2",op&0x3); + util::stream_format(stream, "RLC R%01d,2",op&0x3); break; case 0x058: /* 0 001 011 000 */ case 0x059: /* 0 001 011 001 */ case 0x05a: /* 0 001 011 010 */ case 0x05b: /* 0 001 011 011 */ - sprintf(buffer, "SLLC R%01d,1",op&0x3); + util::stream_format(stream, "SLLC R%01d,1",op&0x3); break; case 0x05c: /* 0 001 011 100 */ case 0x05d: /* 0 001 011 101 */ case 0x05e: /* 0 001 011 110 */ case 0x05f: /* 0 001 011 111 */ - sprintf(buffer, "SLLC R%01d,2",op&0x3); + util::stream_format(stream, "SLLC R%01d,2",op&0x3); break; case 0x060: /* 0 001 100 000 */ case 0x061: /* 0 001 100 001 */ case 0x062: /* 0 001 100 010 */ case 0x063: /* 0 001 100 011 */ - sprintf(buffer, "SLR R%01d,1",op&0x3); + util::stream_format(stream, "SLR R%01d,1",op&0x3); break; case 0x064: /* 0 001 100 100 */ case 0x065: /* 0 001 100 101 */ case 0x066: /* 0 001 100 110 */ case 0x067: /* 0 001 100 111 */ - sprintf(buffer, "SLR R%01d,2",op&0x3); + util::stream_format(stream, "SLR R%01d,2",op&0x3); break; case 0x068: /* 0 001 101 000 */ case 0x069: /* 0 001 101 001 */ case 0x06a: /* 0 001 101 010 */ case 0x06b: /* 0 001 101 011 */ - sprintf(buffer, "SAR R%01d,1",op&0x3); + util::stream_format(stream, "SAR R%01d,1",op&0x3); break; case 0x06c: /* 0 001 101 100 */ case 0x06d: /* 0 001 101 101 */ case 0x06e: /* 0 001 101 110 */ case 0x06f: /* 0 001 101 111 */ - sprintf(buffer, "SAR R%01d,2",op&0x3); + util::stream_format(stream, "SAR R%01d,2",op&0x3); break; case 0x070: /* 0 001 110 000 */ case 0x071: /* 0 001 110 001 */ case 0x072: /* 0 001 110 010 */ case 0x073: /* 0 001 110 011 */ - sprintf(buffer, "RRC R%01d,1",op&0x3); + util::stream_format(stream, "RRC R%01d,1",op&0x3); break; case 0x074: /* 0 001 110 100 */ case 0x075: /* 0 001 110 101 */ case 0x076: /* 0 001 110 110 */ case 0x077: /* 0 001 110 111 */ - sprintf(buffer, "RRC R%01d,2",op&0x3); + util::stream_format(stream, "RRC R%01d,2",op&0x3); break; case 0x078: /* 0 001 111 000 */ case 0x079: /* 0 001 111 001 */ case 0x07a: /* 0 001 111 010 */ case 0x07b: /* 0 001 111 011 */ - sprintf(buffer, "SARC R%01d,1",op&0x3); + util::stream_format(stream, "SARC R%01d,1",op&0x3); break; case 0x07c: /* 0 001 111 100 */ case 0x07d: /* 0 001 111 101 */ case 0x07e: /* 0 001 111 110 */ case 0x07f: /* 0 001 111 111 */ - sprintf(buffer, "SARC R%01d,2",op&0x3); + util::stream_format(stream, "SARC R%01d,2",op&0x3); break; case 0x080: /* 0 010 000 000 */ case 0x089: /* 0 010 001 001 */ @@ -367,7 +367,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x0ad: /* 0 010 101 101 */ case 0x0b6: /* 0 010 110 110 */ case 0x0bf: /* 0 010 111 111 */ - sprintf(buffer, "TSTR R%01d",op&0x7); + util::stream_format(stream, "TSTR R%01d",op&0x7); break; case 0x087: /* 0 010 000 111 */ case 0x08f: /* 0 010 001 111 */ @@ -376,7 +376,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x0a7: /* 0 010 100 111 */ case 0x0af: /* 0 010 101 111 */ case 0x0b7: /* 0 010 110 111 */ - sprintf(buffer, "JR R%01d",(op&0x38)>>3); + util::stream_format(stream, "JR R%01d",(op&0x38)>>3); break; case 0x081: /* 0 010 000 001 */ case 0x082: /* 0 010 000 010 */ @@ -427,7 +427,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x0bc: /* 0 010 111 100 */ case 0x0bd: /* 0 010 111 101 */ case 0x0be: /* 0 010 111 110 */ - sprintf(buffer, "MOVR R%01d,R%01d",(op&0x38)>>3,op&0x7); + util::stream_format(stream, "MOVR R%01d,R%01d",(op&0x38)>>3,op&0x7); break; case 0x0c0: /* 0 011 000 000 */ case 0x0c1: /* 0 011 000 001 */ @@ -493,7 +493,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x0fd: /* 0 011 111 101 */ case 0x0fe: /* 0 011 111 110 */ case 0x0ff: /* 0 011 111 111 */ - sprintf(buffer, "ADDR R%01d,R%01d",(op&0x38)>>3,op&7); + util::stream_format(stream, "ADDR R%01d,R%01d",(op&0x38)>>3,op&7); break; case 0x100: /* 0 100 000 000 */ case 0x101: /* 0 100 000 001 */ @@ -559,7 +559,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x13d: /* 0 100 111 101 */ case 0x13e: /* 0 100 111 110 */ case 0x13f: /* 0 100 111 111 */ - sprintf(buffer, "SUBR R%01d,R%01d",(op&0x38)>>3,op&7); + util::stream_format(stream, "SUBR R%01d,R%01d",(op&0x38)>>3,op&7); break; case 0x140: /* 0 101 000 000 */ case 0x141: /* 0 101 000 001 */ @@ -625,7 +625,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x17d: /* 0 101 111 101 */ case 0x17e: /* 0 101 111 110 */ case 0x17f: /* 0 101 111 111 */ - sprintf(buffer, "CMPR R%01d,R%01d",(op&0x38)>>3,op&7); + util::stream_format(stream, "CMPR R%01d,R%01d",(op&0x38)>>3,op&7); break; case 0x180: /* 0 110 000 000 */ case 0x181: /* 0 110 000 001 */ @@ -691,7 +691,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x1bd: /* 0 110 111 101 */ case 0x1be: /* 0 110 111 110 */ case 0x1bf: /* 0 110 111 111 */ - sprintf(buffer, "ANDR R%01d,R%01d",(op&0x38)>>3,op&7); + util::stream_format(stream, "ANDR R%01d,R%01d",(op&0x38)>>3,op&7); break; case 0x1c0: /* 0 111 000 000 */ case 0x1c9: /* 0 111 001 001 */ @@ -701,7 +701,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x1ed: /* 0 111 101 101 */ case 0x1f6: /* 0 111 110 110 */ case 0x1ff: /* 0 111 111 111 */ - sprintf(buffer, "CLRR R%01d",op&7); + util::stream_format(stream, "CLRR R%01d",op&7); break; case 0x1c1: /* 0 111 000 001 */ case 0x1c2: /* 0 111 000 010 */ @@ -759,87 +759,87 @@ CPU_DISASSEMBLE( cp1610 ) case 0x1fc: /* 0 111 111 100 */ case 0x1fd: /* 0 111 111 101 */ case 0x1fe: /* 0 111 111 110 */ - sprintf(buffer, "XORR R%01d,R%01d",(op&0x38)>>3,op&7); + util::stream_format(stream, "XORR R%01d,R%01d",(op&0x38)>>3,op&7); break; case 0x200: /* 1 000 000 000 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "B %04X",pc+2+ea); + util::stream_format(stream, "B %04X",pc+2+ea); break; case 0x201: /* 1 000 000 001 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BC %04X",pc+2+ea); + util::stream_format(stream, "BC %04X",pc+2+ea); break; case 0x202: /* 1 000 000 010 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BOV %04X",pc+2+ea); + util::stream_format(stream, "BOV %04X",pc+2+ea); break; case 0x203: /* 1 000 000 011 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BPL %04X",pc+2+ea); + util::stream_format(stream, "BPL %04X",pc+2+ea); break; case 0x204: /* 1 000 000 100 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BZE %04X",pc+2+ea); + util::stream_format(stream, "BZE %04X",pc+2+ea); break; case 0x205: /* 1 000 000 101 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BLT %04X",pc+2+ea); + util::stream_format(stream, "BLT %04X",pc+2+ea); break; case 0x206: /* 1 000 000 110 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BLE %04X",pc+2+ea); + util::stream_format(stream, "BLE %04X",pc+2+ea); break; case 0x207: /* 1 000 000 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BUSC %04X",pc+2+ea); + util::stream_format(stream, "BUSC %04X",pc+2+ea); break; case 0x208: /* 1 000 001 000 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "NOPP %04X",pc+2+ea); + util::stream_format(stream, "NOPP %04X",pc+2+ea); break; case 0x209: /* 1 000 001 001 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BNC %04X",pc+2+ea); + util::stream_format(stream, "BNC %04X",pc+2+ea); break; case 0x20a: /* 1 000 001 010 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BNOV %04X",pc+2+ea); + util::stream_format(stream, "BNOV %04X",pc+2+ea); break; case 0x20b: /* 1 000 001 011 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BMI %04X",pc+2+ea); + util::stream_format(stream, "BMI %04X",pc+2+ea); break; case 0x20c: /* 1 000 001 100 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BNZE %04X",pc+2+ea); + util::stream_format(stream, "BNZE %04X",pc+2+ea); break; case 0x20d: /* 1 000 001 101 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BGE %04X",pc+2+ea); + util::stream_format(stream, "BGE %04X",pc+2+ea); break; case 0x20e: /* 1 000 001 110 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BGT %04X",pc+2+ea); + util::stream_format(stream, "BGT %04X",pc+2+ea); break; case 0x20f: /* 1 000 001 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BESC %04X",pc+2+ea); + util::stream_format(stream, "BESC %04X",pc+2+ea); break; case 0x210: /* 1 000 010 000 */ case 0x211: /* 1 000 010 001 */ @@ -859,87 +859,87 @@ CPU_DISASSEMBLE( cp1610 ) case 0x21f: /* 1 000 011 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BEXT %04X,%01X",pc+2+ea,op&0x0f); + util::stream_format(stream, "BEXT %04X,%01X",pc+2+ea,op&0x0f); break; case 0x220: /* 1 000 100 000 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "B %04X",pc+1-ea); + util::stream_format(stream, "B %04X",pc+1-ea); break; case 0x221: /* 1 000 100 001 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BC %04X",pc+1-ea); + util::stream_format(stream, "BC %04X",pc+1-ea); break; case 0x222: /* 1 000 100 010 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BOV %04X",pc+1-ea); + util::stream_format(stream, "BOV %04X",pc+1-ea); break; case 0x223: /* 1 000 100 011 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BPL %04X",pc+1-ea); + util::stream_format(stream, "BPL %04X",pc+1-ea); break; case 0x224: /* 1 000 100 100 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BZE %04X",pc+1-ea); + util::stream_format(stream, "BZE %04X",pc+1-ea); break; case 0x225: /* 1 000 100 101 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BLT %04X",pc+1-ea); + util::stream_format(stream, "BLT %04X",pc+1-ea); break; case 0x226: /* 1 000 100 110 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BLE %04X",pc+1-ea); + util::stream_format(stream, "BLE %04X",pc+1-ea); break; case 0x227: /* 1 000 100 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BUSC %04X",pc+1-ea); + util::stream_format(stream, "BUSC %04X",pc+1-ea); break; case 0x228: /* 1 000 101 000 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "NOPP %04X",pc+1-ea); + util::stream_format(stream, "NOPP %04X",pc+1-ea); break; case 0x229: /* 1 000 101 001 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BNC %04X",pc+1-ea); + util::stream_format(stream, "BNC %04X",pc+1-ea); break; case 0x22a: /* 1 000 101 010 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BNOV %04X",pc+1-ea); + util::stream_format(stream, "BNOV %04X",pc+1-ea); break; case 0x22b: /* 1 000 101 011 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BMI %04X",pc+1-ea); + util::stream_format(stream, "BMI %04X",pc+1-ea); break; case 0x22c: /* 1 000 101 100 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BNZE %04X",pc+1-ea); + util::stream_format(stream, "BNZE %04X",pc+1-ea); break; case 0x22d: /* 1 000 101 101 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BGE %04X",pc+1-ea); + util::stream_format(stream, "BGE %04X",pc+1-ea); break; case 0x22e: /* 1 000 101 110 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BGT %04X",pc+1-ea); + util::stream_format(stream, "BGT %04X",pc+1-ea); break; case 0x22f: /* 1 000 101 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BESC %04X",pc+1-ea); + util::stream_format(stream, "BESC %04X",pc+1-ea); break; case 0x230: /* 1 000 110 000 */ case 0x231: /* 1 000 110 001 */ @@ -959,7 +959,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x23f: /* 1 000 111 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "BEXT %04X,%01X",pc+1-ea,op&0x0f); + util::stream_format(stream, "BEXT %04X,%01X",pc+1-ea,op&0x0f); break; case 0x240: /* 1 001 000 000 */ case 0x241: /* 1 001 000 001 */ @@ -971,7 +971,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x247: /* 1 001 000 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "MVO R%01d,(%04X)",op&0x7,ea); + util::stream_format(stream, "MVO R%01d,(%04X)",op&0x7,ea); break; case 0x248: /* 1 001 001 000 */ case 0x249: /* 1 001 001 001 */ @@ -1013,7 +1013,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x26d: /* 1 001 101 101 */ case 0x26e: /* 1 001 101 110 */ case 0x26f: /* 1 001 101 111 */ - sprintf(buffer, "MVO@ R%01d,(R%01d)",op&0x7,(op&0x38)>>3); + util::stream_format(stream, "MVO@ R%01d,(R%01d)",op&0x7,(op&0x38)>>3); break; case 0x270: /* 1 001 110 000 */ case 0x271: /* 1 001 110 001 */ @@ -1023,7 +1023,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x275: /* 1 001 110 101 */ case 0x276: /* 1 001 110 110 */ case 0x277: /* 1 001 110 111 */ - sprintf(buffer, "PSHR R%01d",op&0x7); + util::stream_format(stream, "PSHR R%01d",op&0x7); break; case 0x278: /* 1 001 111 000 */ case 0x279: /* 1 001 111 001 */ @@ -1034,7 +1034,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x27e: /* 1 001 111 110 */ case 0x27f: /* 1 001 111 111 */ size += 1; - sprintf(buffer, "MVOI R%01d,(%04X)",op&0x7,pc+1); + util::stream_format(stream, "MVOI R%01d,(%04X)",op&0x7,pc+1); break; case 0x280: /* 1 010 000 000 */ case 0x281: /* 1 010 000 001 */ @@ -1046,7 +1046,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x287: /* 1 010 000 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "MVI (%04X),R%01d",ea,op&0x7); + util::stream_format(stream, "MVI (%04X),R%01d",ea,op&0x7); break; case 0x288: /* 1 010 001 000 */ case 0x289: /* 1 010 001 001 */ @@ -1088,7 +1088,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x2ad: /* 1 010 101 101 */ case 0x2ae: /* 1 010 101 110 */ case 0x2af: /* 1 010 101 111 */ - sprintf(buffer, "MVI@ (R%01d),R%01d",(op&0x38)>>3,op&0x7); + util::stream_format(stream, "MVI@ (R%01d),R%01d",(op&0x38)>>3,op&0x7); break; case 0x2b0: /* 1 010 110 000 */ case 0x2b1: /* 1 010 110 001 */ @@ -1098,7 +1098,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x2b5: /* 1 010 110 101 */ case 0x2b6: /* 1 010 110 110 */ case 0x2b7: /* 1 010 110 111 */ - sprintf(buffer, "PULR R%01d",op&0x7); + util::stream_format(stream, "PULR R%01d",op&0x7); break; case 0x2b8: /* 1 010 111 000 */ case 0x2b9: /* 1 010 111 001 */ @@ -1110,7 +1110,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x2bf: /* 1 010 111 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "MVII #%04X,R%01d",ea,op&0x7); + util::stream_format(stream, "MVII #%04X,R%01d",ea,op&0x7); break; case 0x2c0: /* 1 011 010 000 */ case 0x2c1: /* 1 011 010 001 */ @@ -1122,7 +1122,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x2c7: /* 1 011 010 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "ADD (%04X),R%01d",ea,op&0x7); + util::stream_format(stream, "ADD (%04X),R%01d",ea,op&0x7); break; case 0x2c8: /* 1 011 001 000 */ case 0x2c9: /* 1 011 001 001 */ @@ -1172,7 +1172,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x2f5: /* 1 011 110 101 */ case 0x2f6: /* 1 011 110 110 */ case 0x2f7: /* 1 011 110 111 */ - sprintf(buffer, "ADD@ (R%01d),R%01d",(op&0x38)>>3,op&0x7); + util::stream_format(stream, "ADD@ (R%01d),R%01d",(op&0x38)>>3,op&0x7); break; case 0x2f8: /* 1 011 111 000 */ case 0x2f9: /* 1 011 111 001 */ @@ -1184,7 +1184,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x2ff: /* 1 011 111 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "ADDI #%04X,R%01d",ea,op&0x7); + util::stream_format(stream, "ADDI #%04X,R%01d",ea,op&0x7); break; case 0x300: /* 1 100 000 000 */ case 0x301: /* 1 100 000 001 */ @@ -1196,7 +1196,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x307: /* 1 100 000 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "SUB (%04X),R%01d",ea,op&0x7); + util::stream_format(stream, "SUB (%04X),R%01d",ea,op&0x7); break; case 0x308: /* 1 100 001 000 */ case 0x309: /* 1 100 001 001 */ @@ -1246,7 +1246,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x335: /* 1 100 110 101 */ case 0x336: /* 1 100 110 110 */ case 0x337: /* 1 100 110 111 */ - sprintf(buffer, "SUB@ (R%01d),R%01d",(op&0x38)>>3,op&0x7); + util::stream_format(stream, "SUB@ (R%01d),R%01d",(op&0x38)>>3,op&0x7); break; case 0x338: /* 1 100 111 000 */ case 0x339: /* 1 100 111 001 */ @@ -1258,7 +1258,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x33f: /* 1 100 111 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "SUBI #%04X,R%01d",ea,op&0x7); + util::stream_format(stream, "SUBI #%04X,R%01d",ea,op&0x7); break; case 0x340: /* 1 101 000 000 */ case 0x341: /* 1 101 000 001 */ @@ -1270,7 +1270,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x347: /* 1 101 000 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "CMP (%04X),R%01d",ea,op&0x7); + util::stream_format(stream, "CMP (%04X),R%01d",ea,op&0x7); break; case 0x348: /* 1 101 001 000 */ case 0x349: /* 1 101 001 001 */ @@ -1320,7 +1320,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x375: /* 1 101 110 101 */ case 0x376: /* 1 101 110 110 */ case 0x377: /* 1 101 110 111 */ - sprintf(buffer, "CMP@ (R%01d),R%01d",(op&0x38)>>3,op&0x7); + util::stream_format(stream, "CMP@ (R%01d),R%01d",(op&0x38)>>3,op&0x7); break; case 0x378: /* 1 101 111 000 */ case 0x379: /* 1 101 111 001 */ @@ -1332,7 +1332,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x37f: /* 1 101 111 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "CMPI #%04X,R%01d",ea,op&0x7); + util::stream_format(stream, "CMPI #%04X,R%01d",ea,op&0x7); break; case 0x380: /* 1 110 000 000 */ case 0x381: /* 1 110 000 001 */ @@ -1344,7 +1344,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x387: /* 1 110 000 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "AND (%04X),R%01d",ea,op&0x7); + util::stream_format(stream, "AND (%04X),R%01d",ea,op&0x7); break; case 0x388: /* 1 110 001 000 */ case 0x389: /* 1 110 001 001 */ @@ -1394,7 +1394,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x3b5: /* 1 110 110 101 */ case 0x3b6: /* 1 110 110 110 */ case 0x3b7: /* 1 110 110 111 */ - sprintf(buffer, "AND@ (R%01d),R%01d",(op&0x38)>>3,op&0x7); + util::stream_format(stream, "AND@ (R%01d),R%01d",(op&0x38)>>3,op&0x7); break; case 0x3b8: /* 1 110 111 000 */ case 0x3b9: /* 1 110 111 001 */ @@ -1406,7 +1406,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x3bf: /* 1 110 111 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "ANDI #%04X,R%01d",ea,op&0x7); + util::stream_format(stream, "ANDI #%04X,R%01d",ea,op&0x7); break; case 0x3c0: /* 1 111 000 000 */ case 0x3c1: /* 1 111 000 001 */ @@ -1418,7 +1418,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x3c7: /* 1 111 000 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "XOR (%04X),R%01d",ea,op&0x7); + util::stream_format(stream, "XOR (%04X),R%01d",ea,op&0x7); break; case 0x3c8: /* 1 111 001 000 */ case 0x3c9: /* 1 111 001 001 */ @@ -1468,7 +1468,7 @@ CPU_DISASSEMBLE( cp1610 ) case 0x3f5: /* 1 111 110 101 */ case 0x3f6: /* 1 111 110 110 */ case 0x3f7: /* 1 111 110 111 */ - sprintf(buffer, "XOR@ (R%01d),R%01d",(op&0x38)>>3,op&0x7); + util::stream_format(stream, "XOR@ (R%01d),R%01d",(op&0x38)>>3,op&0x7); break; case 0x3f8: /* 1 111 111 000 */ case 0x3f9: /* 1 111 111 001 */ @@ -1480,11 +1480,21 @@ CPU_DISASSEMBLE( cp1610 ) case 0x3ff: /* 1 111 111 111 */ size += 1; ea = oprom16[1]; - sprintf(buffer, "XORI #%04X,R%01d",ea,op&0x7); + util::stream_format(stream, "XORI #%04X,R%01d",ea,op&0x7); break; default: - sprintf(buffer, "????"); + util::stream_format(stream, "????"); } return size; } + + +CPU_DISASSEMBLE(cp1610) +{ + std::ostringstream stream; + offs_t result = internal_disasm_cp1610(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} diff --git a/src/devices/cpu/cubeqcpu/cubedasm.cpp b/src/devices/cpu/cubeqcpu/cubedasm.cpp index 034ac4873b2..6d346f9dc7a 100644 --- a/src/devices/cpu/cubeqcpu/cubedasm.cpp +++ b/src/devices/cpu/cubeqcpu/cubedasm.cpp @@ -58,7 +58,7 @@ static const char *const dst[] = SOUND DISASSEMBLY HOOK ***************************************************************************/ -CPU_DISASSEMBLE( cquestsnd ) +static offs_t internal_disasm_cquestsnd(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { static const char *const jmps[] = { @@ -103,7 +103,7 @@ CPU_DISASSEMBLE( cquestsnd ) int _rin = (inslow >> 26) & 1; - sprintf(buffer, "%s %s %s %x,%x,%c %.2x %s %s %.2x %s %s %s %c %c %c", + util::stream_format(stream, "%s %s %s %x,%x,%c %02x %s %s %02x %s %s %s %c %c %c", ins[i5_3], src[i2_0], dst[i8_6], @@ -125,11 +125,21 @@ CPU_DISASSEMBLE( cquestsnd ) } +CPU_DISASSEMBLE(cquestsnd) +{ + std::ostringstream stream; + offs_t result = internal_disasm_cquestsnd(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} + + /*************************************************************************** ROTATE DISASSEMBLY HOOK ***************************************************************************/ -CPU_DISASSEMBLE( cquestrot ) +static offs_t internal_disasm_cquestrot(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { static const char *const jmps[] = { @@ -204,7 +214,7 @@ CPU_DISASSEMBLE( cquestrot ) // int _sex = (inslow >> 19) & 0x1; int i2_0 = (inslow >> 16) & 0x7; - sprintf(buffer, "%s %s,%s %x,%x,%c %d %s %s %s %.2x", + util::stream_format(stream, "%s %s,%s %x,%x,%c %d %s %s %s %02x", ins[i5_3], src[i2_0], dst[i8_6], @@ -220,11 +230,22 @@ CPU_DISASSEMBLE( cquestrot ) return 1 | DASMFLAG_SUPPORTED; } + +CPU_DISASSEMBLE(cquestrot) +{ + std::ostringstream stream; + offs_t result = internal_disasm_cquestrot(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} + + /*************************************************************************** LINE DRAWER DISASSEMBLY HOOK ***************************************************************************/ -CPU_DISASSEMBLE( cquestlin ) +static offs_t internal_disasm_cquestlin(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { static const char *const jmps[] = { @@ -288,7 +309,7 @@ CPU_DISASSEMBLE( cquestlin ) int _pbcs = (inslow >> 27) & 0x1; int i2_0 = (inslow >> 24) & 0x7; - sprintf(buffer, "%s %s,%s %x,%x %c %s %.2x %s %s %s %s", + util::stream_format(stream, "%s %s,%s %x,%x %c %s %02x %s %s %s %s", ins[i5_3], src[i2_0], dst[i8_6], @@ -304,3 +325,13 @@ CPU_DISASSEMBLE( cquestlin ) return 1 | DASMFLAG_SUPPORTED; } + + +CPU_DISASSEMBLE(cquestlin) +{ + std::ostringstream stream; + offs_t result = internal_disasm_cquestlin(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} diff --git a/src/devices/cpu/dsp16/dsp16dis.cpp b/src/devices/cpu/dsp16/dsp16dis.cpp index 136eaab0e22..52b76fee297 100644 --- a/src/devices/cpu/dsp16/dsp16dis.cpp +++ b/src/devices/cpu/dsp16/dsp16dis.cpp @@ -248,7 +248,7 @@ bool disasmSIField(const uint8_t& SI) } -CPU_DISASSEMBLE( dsp16a ) +static offs_t internal_disasm_dsp16a(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { uint8_t opSize = 1; uint32_t dasmflags = 0; @@ -270,7 +270,7 @@ CPU_DISASSEMBLE( dsp16a ) const uint8_t F1 = (op & 0x01e0) >> 5; std::string yString = disasmYField(Y); std::string fString = disasmF1Field(F1, D, S); - sprintf(buffer, "%s, %s", fString.c_str(), yString.c_str()); + util::stream_format(stream, "%s, %s", fString, yString); break; } case 0x04: case 0x1c: @@ -285,7 +285,7 @@ CPU_DISASSEMBLE( dsp16a ) std::string fString = disasmF1Field(F1, D, S); std::string aString = (opcode == 0x1c) ? "a0" : "a1"; std::string xString = (X) ? "" : "l"; - sprintf(buffer, "%s = %s%s, %s", yString.c_str(), aString.c_str(), xString.c_str(), fString.c_str()); + util::stream_format(stream, "%s = %s%s, %s", yString, aString, xString, fString); break; } case 0x16: @@ -297,7 +297,7 @@ CPU_DISASSEMBLE( dsp16a ) const uint8_t F1 = (op & 0x01e0) >> 5; std::string yString = disasmYField(Y); std::string fString = disasmF1Field(F1, D, S); - sprintf(buffer, "%s, x = %s", fString.c_str(), yString.c_str()); + util::stream_format(stream, "%s, x = %s", fString, yString); break; } case 0x17: @@ -311,7 +311,7 @@ CPU_DISASSEMBLE( dsp16a ) std::string yString = disasmYField(Y); std::string fString = disasmF1Field(F1, D, S); std::string xString = (X ? "y" : "y1"); - sprintf(buffer, "%s, %s = %s", fString.c_str(), xString.c_str(), yString.c_str()); + util::stream_format(stream, "%s, %s = %s", fString, xString, yString); break; } case 0x1f: @@ -325,7 +325,7 @@ CPU_DISASSEMBLE( dsp16a ) std::string yString = disasmYField(Y); std::string fString = disasmF1Field(F1, D, S); std::string xString = (X ? "*pt++i" : "*pt++"); - sprintf(buffer, "%s, y = %s, x = %s", fString.c_str(), yString.c_str(), xString.c_str()); + util::stream_format(stream, "%s, y = %s, x = %s", fString, yString, xString); break; } case 0x19: case 0x1b: @@ -339,8 +339,11 @@ CPU_DISASSEMBLE( dsp16a ) std::string fString = disasmF1Field(F1, D, S); std::string xString = (X ? "*pt++i" : "*pt++"); std::string aString = (opcode == 0x19) ? "a0" : "a1"; - sprintf(buffer, "%s, y = %s, x = %s", fString.c_str(), aString.c_str(), xString.c_str()); - if (Y != 0x00) sprintf(buffer, "UNKNOWN"); + + if (Y != 0x00) + util::stream_format(stream, "UNKNOWN"); + else + util::stream_format(stream, "%s, y = %s, x = %s", fString, aString, xString); break; } case 0x14: @@ -354,7 +357,7 @@ CPU_DISASSEMBLE( dsp16a ) std::string yString = disasmYField(Y); std::string xString = (X ? "y" : "y1"); std::string fString = disasmF1Field(F1, D, S); - sprintf(buffer, "%s, %s = %s", fString.c_str(), yString.c_str(), xString.c_str()); + util::stream_format(stream, "%s, %s = %s", fString, yString, xString); break; } @@ -369,7 +372,7 @@ CPU_DISASSEMBLE( dsp16a ) std::string yString = disasmYField(Y); std::string atString = (aT ? "a0" : "a1"); std::string fString = disasmF1Field(F1, aT, S); - sprintf(buffer, "%s, %s = %s", fString.c_str(), atString.c_str(), yString.c_str()); + util::stream_format(stream, "%s, %s = %s", fString, atString, yString); break; } @@ -385,7 +388,7 @@ CPU_DISASSEMBLE( dsp16a ) std::string zString = disasmZField(Z); std::string xString = (X ? "y" : "y1"); std::string fString = disasmF1Field(F1, D, S); - sprintf(buffer, "%s, %s <=> %s", fString.c_str(), xString.c_str(), zString.c_str()); + util::stream_format(stream, "%s, %s <=> %s", fString, xString, zString); break; } case 0x1d: @@ -399,7 +402,7 @@ CPU_DISASSEMBLE( dsp16a ) std::string zString = disasmZField(Z); std::string xString = (X ? "*pt++i" : "*pt++"); std::string fString = disasmF1Field(F1, D, S); - sprintf(buffer, "%s, %s <=> y, x = %s", fString.c_str(), zString.c_str(), xString.c_str()); + util::stream_format(stream, "%s, %s <=> y, x = %s", fString, zString, xString); break; } @@ -416,7 +419,7 @@ CPU_DISASSEMBLE( dsp16a ) std::string atString = (aT ? "a0" : "a1"); atString += X ? "" : "1"; // TODO: Figure out unclear wording. std::string fString = disasmF1Field(F1, aT, S); - sprintf(buffer, "%s, %s <=> %s", fString.c_str(), zString.c_str(), atString.c_str()); + util::stream_format(stream, "%s, %s <=> %s", fString, zString, atString); break; } @@ -431,8 +434,8 @@ CPU_DISASSEMBLE( dsp16a ) const uint8_t F2 = (op & 0x01e0) >> 5; std::string fString = disasmF2Field(F2, D, S); std::string conString = disasmCONField(CON); - if (op & 0x0800) sprintf(buffer, "if %s : %s", conString.c_str(), fString.c_str()); - else sprintf(buffer, "ifc %s : %s", conString.c_str(), fString.c_str()); + if (op & 0x0800) util::stream_format(stream, "if %s : %s", conString, fString); + else util::stream_format(stream, "ifc %s : %s", conString, fString); break; } @@ -441,14 +444,14 @@ CPU_DISASSEMBLE( dsp16a ) { // goto JA const uint16_t JA = (op & 0x0fff) | (pc & 0xf000); - sprintf(buffer, "goto 0x%04x", JA); + util::stream_format(stream, "goto 0x%04x", JA); break; } case 0x10: case 0x11: { // call JA const uint16_t JA = (op & 0x0fff) | (pc & 0xf000); - sprintf(buffer, "call 0x%04x", JA); + util::stream_format(stream, "call 0x%04x", JA); break; } @@ -458,7 +461,7 @@ CPU_DISASSEMBLE( dsp16a ) // goto B const uint8_t B = (op & 0x0700) >> 8; std::string bString = disasmBField(B); - sprintf(buffer, "%s", bString.c_str()); + util::stream_format(stream, "%s", bString); break; } @@ -468,10 +471,10 @@ CPU_DISASSEMBLE( dsp16a ) // if CON [goto/call/return] const uint8_t CON = (op & 0x001f); std::string conString = disasmCONField(CON); - sprintf(buffer, "if %s:", conString.c_str()); + util::stream_format(stream, "if %s:", conString); // TODO: Test for invalid ops // icall - if (op == 0xd40e) sprintf(buffer, "icall"); + if (op == 0xd40e) util::stream_format(stream, "icall"); break; } @@ -482,7 +485,7 @@ CPU_DISASSEMBLE( dsp16a ) const uint8_t R = (op & 0x03f0) >> 4; const uint8_t S = (op & 0x1000) >> 12; std::string rString = disasmRField(R); - sprintf(buffer, "%s = %s", rString.c_str(), (S ? "a1" : "a0")); + util::stream_format(stream, "%s = %s", rString, (S ? "a1" : "a0")); break; } case 0x08: @@ -491,7 +494,7 @@ CPU_DISASSEMBLE( dsp16a ) const uint8_t R = (op & 0x03f0) >> 4; const uint8_t aT = (op & 0x0400) >> 10; std::string rString = disasmRField(R); - sprintf(buffer, "%s = %s", (aT ? "a0" : "a1"), rString.c_str()); + util::stream_format(stream, "%s = %s", (aT ? "a0" : "a1"), rString); break; } case 0x0f: @@ -501,7 +504,7 @@ CPU_DISASSEMBLE( dsp16a ) const uint8_t R = (op & 0x03f0) >> 4; std::string yString = disasmYField(Y); std::string rString = disasmRField(R); - sprintf(buffer, "%s = %s", rString.c_str(), yString.c_str()); + util::stream_format(stream, "%s = %s", rString, yString); // TODO: Special case the R == [y, y1, or x] case break; } @@ -513,7 +516,7 @@ CPU_DISASSEMBLE( dsp16a ) std::string yString = disasmYField(Y); std::string rString = disasmRField(R); // TODO: page 3-31 "special function encoding" - sprintf(buffer, "%s = %s", yString.c_str(), rString.c_str()); + util::stream_format(stream, "%s = %s", yString, rString); break; } case 0x0d: @@ -523,7 +526,7 @@ CPU_DISASSEMBLE( dsp16a ) const uint8_t R = (op & 0x03f0) >> 4; std::string zString = disasmZField(Z); std::string rString = disasmRField(R); - sprintf(buffer, "%s <=> %s", zString.c_str(), rString.c_str()); + util::stream_format(stream, "%s <=> %s", zString, rString); break; } @@ -533,7 +536,7 @@ CPU_DISASSEMBLE( dsp16a ) // R = N const uint8_t R = (op & 0x03f0) >> 4; std::string rString = disasmRField(R); - sprintf(buffer, "%s = 0x%04x", rString.c_str(), op2); + util::stream_format(stream, "%s = 0x%04x", rString, op2); opSize = 2; break; } @@ -545,7 +548,7 @@ CPU_DISASSEMBLE( dsp16a ) const uint16_t M = (op & 0x01ff); const uint8_t R = (op & 0x0e00) >> 9; std::string rString = disasmRImmediateField(R); - sprintf(buffer, "%s = 0x%04x", rString.c_str(), M); + util::stream_format(stream, "%s = 0x%04x", rString, M); break; } @@ -555,27 +558,39 @@ CPU_DISASSEMBLE( dsp16a ) // do|redo K const uint8_t K = (op & 0x007f); const uint8_t NI = (op & 0x0780) >> 7; - sprintf(buffer, "do (next %d inst) %d times", NI, K); + // TODO: Limits on K & NI if (NI == 0x00) - sprintf(buffer, "redo %d", K); + util::stream_format(stream, "redo %d", K); + else + util::stream_format(stream, "do (next %d inst) %d times", NI, K); break; } // RESERVED case 0x1e: { - sprintf(buffer, "RESERVED"); + util::stream_format(stream, "RESERVED"); break; } // UNKNOWN default: { - sprintf(buffer, "UNKNOWN"); + util::stream_format(stream, "UNKNOWN"); break; } } return opSize | dasmflags | DASMFLAG_SUPPORTED; } + + +CPU_DISASSEMBLE(dsp16a) +{ + std::ostringstream stream; + offs_t result = internal_disasm_dsp16a(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} diff --git a/src/devices/cpu/dsp32/dsp32dis.cpp b/src/devices/cpu/dsp32/dsp32dis.cpp index 52dbfdeb79e..d893b412f44 100644 --- a/src/devices/cpu/dsp32/dsp32dis.cpp +++ b/src/devices/cpu/dsp32/dsp32dis.cpp @@ -83,8 +83,6 @@ static const char *const regnamee[] = "r20e", "r21e", "dauce", "ioce", "res1ce", "r22e", "pcshe", "res1fe" }; -static char tempbuf[10][40]; - static inline char *signed_16bit_unary(int16_t val) { static char temp[10]; @@ -126,8 +124,9 @@ static inline char *unsigned_16bit_size(int16_t val, uint8_t size) } static uint8_t lastp; -static const char *dasm_XYZ(uint8_t bits, char *buffer) +static std::string dasm_XYZ(uint8_t bits) { + std::string buffer; uint8_t p = bits >> 3; uint8_t i = bits & 7; @@ -137,14 +136,14 @@ static const char *dasm_XYZ(uint8_t bits, char *buffer) lastp = p; switch (i) { - case 0: sprintf(buffer, "*r%d", p); break; + case 0: buffer = util::string_format("*r%d", p); break; case 1: case 2: case 3: case 4: - case 5: sprintf(buffer, "*r%d++r%d", p, i + 14); break; - case 6: sprintf(buffer, "*r%d--", p); break; - case 7: sprintf(buffer, "*r%d++", p); break; + case 5: buffer = util::string_format("*r%d++r%d", p, i + 14); break; + case 6: buffer = util::string_format("*r%d--", p); break; + case 7: buffer = util::string_format("*r%d++", p); break; } } else @@ -154,19 +153,20 @@ static const char *dasm_XYZ(uint8_t bits, char *buffer) case 0: case 1: case 2: - case 3: sprintf(buffer, "a%d", i); break; - case 4: sprintf(buffer, "ibuf"); break; - case 5: sprintf(buffer, "obuf"); break; - case 6: sprintf(buffer, "pdr"); break; - case 7: buffer[0] = 0; break; + case 3: buffer = util::string_format("a%d", i); break; + case 4: buffer = util::string_format("ibuf"); break; + case 5: buffer = util::string_format("obuf"); break; + case 6: buffer = util::string_format("pdr"); break; + case 7: break; } } return buffer; } -static const char *dasm_PI(uint16_t bits, char *buffer) +static std::string dasm_PI(uint16_t bits) { + std::string buffer; uint8_t p = bits >> 5; uint8_t i = bits & 0x1f; @@ -175,31 +175,31 @@ static const char *dasm_PI(uint16_t bits, char *buffer) switch (i) { case 0: - case 16: sprintf(buffer, "*%s", regname[p]); break; - case 22: sprintf(buffer, "*%s--", regname[p]); break; - case 23: sprintf(buffer, "*%s++", regname[p]); break; - default: sprintf(buffer, "*%s++%s", regname[p], regname[i]); break; + case 16: buffer = util::string_format("*%s", regname[p]); break; + case 22: buffer = util::string_format("*%s--", regname[p]); break; + case 23: buffer = util::string_format("*%s++", regname[p]); break; + default: buffer = util::string_format("*%s++%s", regname[p], regname[i]); break; } } else { switch (i) { - case 4: sprintf(buffer, "ibuf"); break; - case 5: sprintf(buffer, "obuf"); break; - case 6: sprintf(buffer, "pdr"); break; - case 14: sprintf(buffer, "piop"); break; - case 20: sprintf(buffer, "pdr2"); break; - case 22: sprintf(buffer, "pir"); break; - case 30: sprintf(buffer, "pcw"); break; - default: sprintf(buffer, "????"); break; + case 4: buffer = util::string_format("ibuf"); break; + case 5: buffer = util::string_format("obuf"); break; + case 6: buffer = util::string_format("pdr"); break; + case 14: buffer = util::string_format("piop"); break; + case 20: buffer = util::string_format("pdr2"); break; + case 22: buffer = util::string_format("pir"); break; + case 30: buffer = util::string_format("pcw"); break; + default: buffer = util::string_format("????"); break; } } return buffer; } -static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) +static unsigned dasm_dsp32(std::ostream &stream, unsigned pc, uint32_t op) { uint32_t flags = 0; @@ -210,28 +210,28 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) case 0x14: case 0x15: case 0x16: case 0x17: case 0x18: case 0x19: case 0x1a: case 0x1b: { - const char *X = dasm_XYZ((op >> 14) & 0x7f, tempbuf[0]); - const char *Y = dasm_XYZ((op >> 7) & 0x7f, tempbuf[1]); - const char *Z = dasm_XYZ((op >> 0) & 0x7f, tempbuf[2]); + std::string X = dasm_XYZ((op >> 14) & 0x7f); + std::string Y = dasm_XYZ((op >> 7) & 0x7f); + std::string Z = dasm_XYZ((op >> 0) & 0x7f); const char *aM = aMvals[(op >> 26) & 7]; uint8_t aN = (op >> 21) & 3; if ((op & 0x7f) == 7) { if (aM[0] == '0') - sprintf(buffer, "a%d = %s%s", aN, unarysign[(op >> 24) & 1], Y); + util::stream_format(stream, "a%d = %s%s", aN, unarysign[(op >> 24) & 1], Y); else if (aM[0] == '1') - sprintf(buffer, "a%d = %s%s %s %s", aN, unarysign[(op >> 24) & 1], Y, sign[(op >> 23) & 1], X); + util::stream_format(stream, "a%d = %s%s %s %s", aN, unarysign[(op >> 24) & 1], Y, sign[(op >> 23) & 1], X); else - sprintf(buffer, "a%d = %s%s %s %s * %s", aN, unarysign[(op >> 24) & 1], Y, sign[(op >> 23) & 1], aM, X); + util::stream_format(stream, "a%d = %s%s %s %s * %s", aN, unarysign[(op >> 24) & 1], Y, sign[(op >> 23) & 1], aM, X); } else { if (aM[0] == '0') - sprintf(buffer, "%s = a%d = %s%s", Z, aN, unarysign[(op >> 24) & 1], Y); + util::stream_format(stream, "%s = a%d = %s%s", Z, aN, unarysign[(op >> 24) & 1], Y); else if (aM[0] == '1') - sprintf(buffer, "%s = a%d = %s%s %s %s", Z, aN, unarysign[(op >> 24) & 1], Y, sign[(op >> 23) & 1], X); + util::stream_format(stream, "%s = a%d = %s%s %s %s", Z, aN, unarysign[(op >> 24) & 1], Y, sign[(op >> 23) & 1], X); else - sprintf(buffer, "%s = a%d = %s%s %s %s * %s", Z, aN, unarysign[(op >> 24) & 1], Y, sign[(op >> 23) & 1], aM, X); + util::stream_format(stream, "%s = a%d = %s%s %s %s * %s", Z, aN, unarysign[(op >> 24) & 1], Y, sign[(op >> 23) & 1], aM, X); } break; } @@ -241,25 +241,25 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) case 0x24: case 0x25: case 0x26: case 0x27: case 0x28: case 0x29: case 0x2a: case 0x2b: { - const char *X = dasm_XYZ((op >> 14) & 0x7f, tempbuf[0]); - const char *Y = dasm_XYZ((op >> 7) & 0x7f, tempbuf[1]); - const char *Z = dasm_XYZ((op >> 0) & 0x7f, tempbuf[2]); + std::string X = dasm_XYZ((op >> 14) & 0x7f); + std::string Y = dasm_XYZ((op >> 7) & 0x7f); + std::string Z = dasm_XYZ((op >> 0) & 0x7f); const char *aM = aMvals[(op >> 26) & 7]; uint8_t aN = (op >> 21) & 3; if ((op & 0x7f) == 7) { if (aM[0] == '0') - sprintf(buffer, "a%d = %s%s * %s", aN, unarysign[(op >> 23) & 1], Y, X); + util::stream_format(stream, "a%d = %s%s * %s", aN, unarysign[(op >> 23) & 1], Y, X); else - sprintf(buffer, "a%d = %s%s %s %s * %s", aN, unarysign[(op >> 24) & 1], aM, sign[(op >> 23) & 1], Y, X); + util::stream_format(stream, "a%d = %s%s %s %s * %s", aN, unarysign[(op >> 24) & 1], aM, sign[(op >> 23) & 1], Y, X); } else { if (aM[0] == '0') - sprintf(buffer, "a%d = %s(%s=%s) * %s", aN, unarysign[(op >> 23) & 1], Z, Y, X); + util::stream_format(stream, "a%d = %s(%s=%s) * %s", aN, unarysign[(op >> 23) & 1], Z, Y, X); else - sprintf(buffer, "a%d = %s%s %s (%s=%s) * %s", aN, unarysign[(op >> 24) & 1], aM, sign[(op >> 23) & 1], Z, Y, X); + util::stream_format(stream, "a%d = %s%s %s (%s=%s) * %s", aN, unarysign[(op >> 24) & 1], aM, sign[(op >> 23) & 1], Z, Y, X); } break; } @@ -269,25 +269,25 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) case 0x34: case 0x35: case 0x36: case 0x37: case 0x38: case 0x39: case 0x3a: case 0x3b: { - const char *X = dasm_XYZ((op >> 14) & 0x7f, tempbuf[0]); - const char *Y = dasm_XYZ((op >> 7) & 0x7f, tempbuf[1]); - const char *Z = dasm_XYZ((op >> 0) & 0x7f, tempbuf[2]); + std::string X = dasm_XYZ((op >> 14) & 0x7f); + std::string Y = dasm_XYZ((op >> 7) & 0x7f); + std::string Z = dasm_XYZ((op >> 0) & 0x7f); const char *aM = aMvals[(op >> 26) & 7]; uint8_t aN = (op >> 21) & 3; if ((op & 0x7f) == 7) { if (aM[0] == '0') - sprintf(buffer, "a%d = %s%s * %s", aN, unarysign[(op >> 23) & 1], Y, X); + util::stream_format(stream, "a%d = %s%s * %s", aN, unarysign[(op >> 23) & 1], Y, X); else - sprintf(buffer, "a%d = %s%s %s %s * %s", aN, unarysign[(op >> 24) & 1], aM, sign[(op >> 23) & 1], Y, X); + util::stream_format(stream, "a%d = %s%s %s %s * %s", aN, unarysign[(op >> 24) & 1], aM, sign[(op >> 23) & 1], Y, X); } else { if (aM[0] == '0') - sprintf(buffer, "%s = a%d = %s%s * %s", Z, aN, unarysign[(op >> 23) & 1], Y, X); + util::stream_format(stream, "%s = a%d = %s%s * %s", Z, aN, unarysign[(op >> 23) & 1], Y, X); else - sprintf(buffer, "%s = a%d = %s%s %s %s * %s", Z, aN, unarysign[(op >> 24) & 1], aM, sign[(op >> 23) & 1], Y, X); + util::stream_format(stream, "%s = a%d = %s%s %s %s * %s", Z, aN, unarysign[(op >> 24) & 1], aM, sign[(op >> 23) & 1], Y, X); } break; } @@ -295,31 +295,31 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) /* DA format 4 */ case 0x1c: case 0x1d: { - const char *X = dasm_XYZ((op >> 14) & 0x7f, tempbuf[0]); - const char *Y = dasm_XYZ((op >> 7) & 0x7f, tempbuf[1]); - const char *Z = dasm_XYZ((op >> 0) & 0x7f, tempbuf[2]); + std::string X = dasm_XYZ((op >> 14) & 0x7f); + std::string Y = dasm_XYZ((op >> 7) & 0x7f); + std::string Z = dasm_XYZ((op >> 0) & 0x7f); uint8_t aN = (op >> 21) & 3; if ((op & 0x7f) == 7) - sprintf(buffer, "a%d = %s%s %s %s", aN, unarysign[(op >> 24) & 1], Y, sign[(op >> 23) & 1], X); + util::stream_format(stream, "a%d = %s%s %s %s", aN, unarysign[(op >> 24) & 1], Y, sign[(op >> 23) & 1], X); else - sprintf(buffer, "a%d = %s(%s=%s) %s %s", aN, unarysign[(op >> 24) & 1], Z, Y, sign[(op >> 23) & 1], X); + util::stream_format(stream, "a%d = %s(%s=%s) %s %s", aN, unarysign[(op >> 24) & 1], Z, Y, sign[(op >> 23) & 1], X); break; } /* DA format 5 */ case 0x3c: case 0x3d: case 0x3e: case 0x3f: if ((op & 0x7f) == 7) - sprintf(buffer, "a%d = %s(%s)", + util::stream_format(stream, "a%d = %s(%s)", (op >> 21) & 3, // aN functable[(op >> 23) & 15], // G - dasm_XYZ((op >> 7) & 0x7f, tempbuf[0])); // Y + dasm_XYZ((op >> 7) & 0x7f)); // Y else - sprintf(buffer, "%s = a%d = %s(%s)", - dasm_XYZ((op >> 0) & 0x7f, tempbuf[2]), // Z + util::stream_format(stream, "%s = a%d = %s(%s)", + dasm_XYZ((op >> 0) & 0x7f), // Z (op >> 21) & 3, // aN functable[(op >> 23) & 15], // G - dasm_XYZ((op >> 7) & 0x7f, tempbuf[0])); // Y + dasm_XYZ((op >> 7) & 0x7f)); // Y break; /* CA formats 0/1 */ @@ -330,37 +330,37 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) int16_t N = (int16_t)op; if (op == 0) - sprintf(buffer, "nop"); + util::stream_format(stream, "nop"); else if (C == 1 && N == 0 && ((op >> 16) & 0x1f) == 0x1e) - sprintf(buffer, "ireturn"); + util::stream_format(stream, "ireturn"); else if (C == 1) { if (((op >> 16) & 0x1f) == 15) - sprintf(buffer, "goto %s%s [%x]", rH, signed_16bit_sep_nospace(N), (pc + 8 + N) & 0xffffff); + util::stream_format(stream, "goto %s%s [%x]", rH, signed_16bit_sep_nospace(N), (pc + 8 + N) & 0xffffff); else if (N && rH[0] != '0') - sprintf(buffer, "goto %s%s", rH, signed_16bit_sep_nospace(N)); + util::stream_format(stream, "goto %s%s", rH, signed_16bit_sep_nospace(N)); else if (N) - sprintf(buffer, "goto $%x", ((int32_t)N & 0xffffff)); + util::stream_format(stream, "goto $%x", ((int32_t)N & 0xffffff)); else { if (((op >> 16) & 0x1f) == 20) flags = DASMFLAG_STEP_OUT; - sprintf(buffer, "goto %s", rH); + util::stream_format(stream, "goto %s", rH); } } else { if (((op >> 16) & 0x1f) == 15) - sprintf(buffer, "if (%s) goto %s%s [%x]", condtable[C], rH, signed_16bit_sep_nospace(N), (pc + 8 + N) & 0xffffff); + util::stream_format(stream, "if (%s) goto %s%s [%x]", condtable[C], rH, signed_16bit_sep_nospace(N), (pc + 8 + N) & 0xffffff); else if (N && rH[0] != '0') - sprintf(buffer, "if (%s) goto %s%s", condtable[C], rH, signed_16bit_sep_nospace(N)); + util::stream_format(stream, "if (%s) goto %s%s", condtable[C], rH, signed_16bit_sep_nospace(N)); else if (N) - sprintf(buffer, "if (%s) goto $%x", condtable[C], ((int32_t)N & 0xffffff)); + util::stream_format(stream, "if (%s) goto $%x", condtable[C], ((int32_t)N & 0xffffff)); else { if (((op >> 16) & 0x1f) == 20) flags = DASMFLAG_STEP_OUT; - sprintf(buffer, "if (%s) goto %s", condtable[C], rH); + util::stream_format(stream, "if (%s) goto %s", condtable[C], rH); } } break; @@ -375,21 +375,21 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) if (((op >> 16) & 0x1f) == 15) { - sprintf(buffer, "if (%s-- >= 0) goto %s%s [%x]", rM, rH, signed_16bit_sep_nospace(N), (pc + 8 + N) & 0xffffff); + util::stream_format(stream, "if (%s-- >= 0) goto %s%s [%x]", rM, rH, signed_16bit_sep_nospace(N), (pc + 8 + N) & 0xffffff); if (((pc + 8 + N) & 0xffffff) < pc) flags = DASMFLAG_STEP_OVER; } else if (N && rH[0] != '0') - sprintf(buffer, "if (%s-- >= 0) goto %s%s", rM, rH, signed_16bit_sep_nospace(N)); + util::stream_format(stream, "if (%s-- >= 0) goto %s%s", rM, rH, signed_16bit_sep_nospace(N)); else if (N) { - sprintf(buffer, "if (%s-- >= 0) goto $%x", rM, ((int32_t)N & 0xffffff)); + util::stream_format(stream, "if (%s-- >= 0) goto $%x", rM, ((int32_t)N & 0xffffff)); if (((int32_t)N & 0xffffff) < pc) flags = DASMFLAG_STEP_OVER; } else { - sprintf(buffer, "if (%s-- >= 0) goto %s", rM, rH); + util::stream_format(stream, "if (%s-- >= 0) goto %s", rM, rH); if (((op >> 16) & 0x1f) == 20) flags = DASMFLAG_STEP_OUT; } @@ -399,9 +399,9 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) /* CA format 3b/3c */ case 0x46: if (((op >> 21) & 0x1f) == 0) - sprintf(buffer, "do %d,%d", (op >> 16) & 0x1f, op & 0x7ff); + util::stream_format(stream, "do %d,%d", (op >> 16) & 0x1f, op & 0x7ff); else if (((op >> 21) & 0x1f) == 1) - sprintf(buffer, "do %d,%s", (op >> 16) & 0x1f, regname[op & 0x1f]); + util::stream_format(stream, "do %d,%s", (op >> 16) & 0x1f, regname[op & 0x1f]); break; /* CA format 4 */ @@ -412,13 +412,13 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) int16_t N = (int16_t)op; if (((op >> 16) & 0x1f) == 15) - sprintf(buffer, "call %s%s (%s) [%x]", rH, signed_16bit_sep_nospace(N), rM, (pc + 8 + N) & 0xffffff); + util::stream_format(stream, "call %s%s (%s) [%x]", rH, signed_16bit_sep_nospace(N), rM, (pc + 8 + N) & 0xffffff); else if (N && rH[0] != '0') - sprintf(buffer, "call %s%s (%s)", rH, signed_16bit_sep_nospace(N), rM); + util::stream_format(stream, "call %s%s (%s)", rH, signed_16bit_sep_nospace(N), rM); else if (N) - sprintf(buffer, "call $%x (%s)", ((int32_t)N & 0xffffff), rM); + util::stream_format(stream, "call $%x (%s)", ((int32_t)N & 0xffffff), rM); else - sprintf(buffer, "call %s (%s)", rH, rM); + util::stream_format(stream, "call %s (%s)", rH, rM); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; } @@ -432,11 +432,11 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) const char *s = sizesuffix[(op >> 31) & 1]; int16_t N = (int16_t)op; if (N == 0) - sprintf(buffer, "%s%s = %s%s", rD, s, rH, s); + util::stream_format(stream, "%s%s = %s%s", rD, s, rH, s); else if (rH[0] == '0') - sprintf(buffer, "%s%s = %s", rD, s, signed_16bit_unary(N)); + util::stream_format(stream, "%s%s = %s", rD, s, signed_16bit_unary(N)); else - sprintf(buffer, "%s%s = %s%s%s", rD, s, rH, s, signed_16bit_sep((int16_t)op)); + util::stream_format(stream, "%s%s = %s%s%s", rD, s, rH, s, signed_16bit_sep((int16_t)op)); break; } @@ -460,108 +460,108 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) if (threeop) { if (rS1[0] == '0' && rS2[0] == '0') - sprintf(buffer, "%s%s%s = 0", condbuf, rD, s); + util::stream_format(stream, "%s%s%s = 0", condbuf, rD, s); else if (rS1[0] == '0') - sprintf(buffer, "%s%s%s = %s%s", condbuf, rD, s, rS2, s); + util::stream_format(stream, "%s%s%s = %s%s", condbuf, rD, s, rS2, s); else if (rS2[0] == '0') - sprintf(buffer, "%s%s%s = %s%s", condbuf, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s", condbuf, rD, s, rS1, s); else - sprintf(buffer, "%s%s%s = %s%s + %s%s", condbuf, rD, s, rS2, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s + %s%s", condbuf, rD, s, rS2, s, rS1, s); } else { if (rS1[0] == '0') - sprintf(buffer, "%s%s%s = %s%s", condbuf, rD, s, rD, s); + util::stream_format(stream, "%s%s%s = %s%s", condbuf, rD, s, rD, s); else - sprintf(buffer, "%s%s%s = %s%s + %s%s", condbuf, rD, s, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s + %s%s", condbuf, rD, s, rD, s, rS1, s); } break; case 1: - sprintf(buffer, "%s%s%s = %s%s * 2", condbuf, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s * 2", condbuf, rD, s, rS1, s); break; case 2: if (threeop) - sprintf(buffer, "%s%s%s = %s%s - %s%s", condbuf, rD, s, rS1, s, rS2, s); + util::stream_format(stream, "%s%s%s = %s%s - %s%s", condbuf, rD, s, rS1, s, rS2, s); else - sprintf(buffer, "%s%s%s = %s%s - %s%s", condbuf, rD, s, rS1, s, rD, s); + util::stream_format(stream, "%s%s%s = %s%s - %s%s", condbuf, rD, s, rS1, s, rD, s); break; case 3: if (threeop) - sprintf(buffer, "%s%s%s = %s%s # %s%s", condbuf, rD, s, rS2, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s # %s%s", condbuf, rD, s, rS2, s, rS1, s); else - sprintf(buffer, "%s%s%s = %s%s # %s%s", condbuf, rD, s, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s # %s%s", condbuf, rD, s, rD, s, rS1, s); break; case 4: if (threeop) - sprintf(buffer, "%s%s%s = %s%s - %s%s", condbuf, rD, s, rS2, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s - %s%s", condbuf, rD, s, rS2, s, rS1, s); else - sprintf(buffer, "%s%s%s = %s%s - %s%s", condbuf, rD, s, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s - %s%s", condbuf, rD, s, rD, s, rS1, s); break; case 5: - sprintf(buffer, "%s%s%s = -%s%s", condbuf, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = -%s%s", condbuf, rD, s, rS1, s); break; case 6: if (threeop) - sprintf(buffer, "%s%s%s = %s%s &~ %s%s", condbuf, rD, s, rS2, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s &~ %s%s", condbuf, rD, s, rS2, s, rS1, s); else - sprintf(buffer, "%s%s%s = %s%s &~ %s%s", condbuf, rD, s, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s &~ %s%s", condbuf, rD, s, rD, s, rS1, s); break; case 7: // if (threeop) -// sprintf(buffer, "%s%s%s - %s%s", condbuf, rS2, s, rS1, s); +// util::stream_format(stream, "%s%s%s - %s%s", condbuf, rS2, s, rS1, s); // else - sprintf(buffer, "%s%s%s - %s%s", condbuf, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s - %s%s", condbuf, rD, s, rS1, s); break; case 8: if (threeop) - sprintf(buffer, "%s%s%s = %s%s ^ %s%s", condbuf, rD, s, rS2, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s ^ %s%s", condbuf, rD, s, rS2, s, rS1, s); else - sprintf(buffer, "%s%s%s = %s%s ^ %s%s", condbuf, rD, s, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s ^ %s%s", condbuf, rD, s, rD, s, rS1, s); break; case 9: - sprintf(buffer, "%s%s%s = %s%s >>> 1", condbuf, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s >>> 1", condbuf, rD, s, rS1, s); break; case 10: if (threeop) - sprintf(buffer, "%s%s%s = %s%s | %s%s", condbuf, rD, s, rS2, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s | %s%s", condbuf, rD, s, rS2, s, rS1, s); else - sprintf(buffer, "%s%s%s = %s%s | %s%s", condbuf, rD, s, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s | %s%s", condbuf, rD, s, rD, s, rS1, s); break; case 11: - sprintf(buffer, "%s%s%s = %s%s <<< 1", condbuf, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s <<< 1", condbuf, rD, s, rS1, s); break; case 12: - sprintf(buffer, "%s%s%s = %s%s >> 1", condbuf, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s >> 1", condbuf, rD, s, rS1, s); break; case 13: - sprintf(buffer, "%s%s%s = %s%s / 2", condbuf, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s / 2", condbuf, rD, s, rS1, s); break; case 14: if (threeop) - sprintf(buffer, "%s%s%s = %s%s & %s%s", condbuf, rD, s, rS2, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s & %s%s", condbuf, rD, s, rS2, s, rS1, s); else - sprintf(buffer, "%s%s%s = %s%s & %s%s", condbuf, rD, s, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s = %s%s & %s%s", condbuf, rD, s, rD, s, rS1, s); break; case 15: // if (threeop) -// sprintf(buffer, "%s%s%s & %s%s", condbuf, rS1, s, rS2, s); +// util::stream_format(stream, "%s%s%s & %s%s", condbuf, rS1, s, rS2, s); // else - sprintf(buffer, "%s%s%s & %s%s", condbuf, rD, s, rS1, s); + util::stream_format(stream, "%s%s%s & %s%s", condbuf, rD, s, rS1, s); break; } break; @@ -583,43 +583,43 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) case 11: case 12: case 13: - sprintf(buffer, "Unexpected: %08X", op); + util::stream_format(stream, "Unexpected: %08X", op); break; case 2: - sprintf(buffer, "%s%s = %s - %s%s", rD, s, signed_16bit_unary(N), rD, s); + util::stream_format(stream, "%s%s = %s - %s%s", rD, s, signed_16bit_unary(N), rD, s); break; case 3: - sprintf(buffer, "%s%s = %s%s # %s", rD, s, rD, s, signed_16bit_unary(N)); + util::stream_format(stream, "%s%s = %s%s # %s", rD, s, rD, s, signed_16bit_unary(N)); break; case 4: - sprintf(buffer, "%s%s = %s%s - %s", rD, s, rD, s, signed_16bit_unary(N)); + util::stream_format(stream, "%s%s = %s%s - %s", rD, s, rD, s, signed_16bit_unary(N)); break; case 6: - sprintf(buffer, "%s%s = %s%s &~ %s", rD, s, rD, s, unsigned_16bit_size(N, (op >> 31) & 1)); + util::stream_format(stream, "%s%s = %s%s &~ %s", rD, s, rD, s, unsigned_16bit_size(N, (op >> 31) & 1)); break; case 7: - sprintf(buffer, "%s%s - %s", rD, s, signed_16bit_unary(N)); + util::stream_format(stream, "%s%s - %s", rD, s, signed_16bit_unary(N)); break; case 8: - sprintf(buffer, "%s%s = %s%s ^ %s", rD, s, rD, s, unsigned_16bit_size(N, (op >> 31) & 1)); + util::stream_format(stream, "%s%s = %s%s ^ %s", rD, s, rD, s, unsigned_16bit_size(N, (op >> 31) & 1)); break; case 10: - sprintf(buffer, "%s%s = %s%s | %s", rD, s, rD, s, unsigned_16bit_size(N, (op >> 31) & 1)); + util::stream_format(stream, "%s%s = %s%s | %s", rD, s, rD, s, unsigned_16bit_size(N, (op >> 31) & 1)); break; case 14: - sprintf(buffer, "%s%s = %s%s & %s", rD, s, rD, s, unsigned_16bit_size(N, (op >> 31) & 1)); + util::stream_format(stream, "%s%s = %s%s & %s", rD, s, rD, s, unsigned_16bit_size(N, (op >> 31) & 1)); break; case 15: - sprintf(buffer, "%s%s & %s", rD, s, unsigned_16bit_size(N, (op >> 31) & 1)); + util::stream_format(stream, "%s%s & %s", rD, s, unsigned_16bit_size(N, (op >> 31) & 1)); break; } break; @@ -628,17 +628,17 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) /* CA format 7a */ case 0x0e: if ((op >> 24) & 1) - sprintf(buffer, "*%08X = %s%s", (int16_t)op, regname[(op >> 16) & 0x1f], memsuffix[(op >> 22) & 3]); + util::stream_format(stream, "*%08X = %s%s", (int16_t)op, regname[(op >> 16) & 0x1f], memsuffix[(op >> 22) & 3]); else - sprintf(buffer, "%s%s = *%08X", regname[(op >> 16) & 0x1f], memsuffix[(op >> 22) & 3], (int16_t)op); + util::stream_format(stream, "%s%s = *%08X", regname[(op >> 16) & 0x1f], memsuffix[(op >> 22) & 3], (int16_t)op); break; /* CA format 7b */ case 0x0f: if ((op >> 24) & 1) - sprintf(buffer, "%s = %s%s", dasm_PI(op & 0x3ff, tempbuf[0]), regname[(op >> 16) & 0x1f], memsuffix[(op >> 22) & 3]); + util::stream_format(stream, "%s = %s%s", dasm_PI(op & 0x3ff), regname[(op >> 16) & 0x1f], memsuffix[(op >> 22) & 3]); else - sprintf(buffer, "%s%s = %s", regname[(op >> 16) & 0x1f], memsuffix[(op >> 22) & 3], dasm_PI(op & 0x3ff, tempbuf[0])); + util::stream_format(stream, "%s%s = %s", regname[(op >> 16) & 0x1f], memsuffix[(op >> 22) & 3], dasm_PI(op & 0x3ff)); break; /* CA format 8a */ @@ -651,16 +651,16 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) const char *rH = regname[(op >> 16) & 0x1f]; if (((op >> 16) & 0x1f) == 15) - sprintf(buffer, "goto %s%s [%x]", rH, signed_16bit_sep_nospace(N), (pc + 8 + N) & 0xffffff); + util::stream_format(stream, "goto %s%s [%x]", rH, signed_16bit_sep_nospace(N), (pc + 8 + N) & 0xffffff); else if (N && rH[0] != '0') - sprintf(buffer, "goto %s%s", rH, signed_16bit_sep_nospace(N)); + util::stream_format(stream, "goto %s%s", rH, signed_16bit_sep_nospace(N)); else if (N) - sprintf(buffer, "goto $%x", ((int32_t)N & 0xffffff)); + util::stream_format(stream, "goto $%x", ((int32_t)N & 0xffffff)); else { if (((op >> 16) & 0x1f) == 20) flags = DASMFLAG_STEP_OUT; - sprintf(buffer, "goto %s", rH); + util::stream_format(stream, "goto %s", rH); } break; } @@ -672,7 +672,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) case 0x6c: case 0x6d: case 0x6e: case 0x6f: { int32_t immed = (op & 0xffff) | ((int32_t)((op & 0x1fe00000) << 3) >> 8); - sprintf(buffer, "%s = $%x", regnamee[(op >> 16) & 0x1f], immed & 0xffffff); + util::stream_format(stream, "%s = $%x", regnamee[(op >> 16) & 0x1f], immed & 0xffffff); break; } @@ -684,7 +684,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) { int32_t N = (op & 0xffff) | ((int32_t)((op & 0x1fe00000) << 3) >> 8); const char *rM = regname[(op >> 16) & 0x1f]; - sprintf(buffer, "call $%x (%s)", N & 0xffffff, rM); + util::stream_format(stream, "call $%x (%s)", N & 0xffffff, rM); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; } @@ -694,6 +694,16 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) } +static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op) +{ + std::ostringstream stream; + unsigned result = dasm_dsp32(stream, pc, op); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} + + /*************************************************************************** DISASSEMBLY HOOK ***************************************************************************/ diff --git a/src/devices/cpu/dsp56k/dsp56dsm.cpp b/src/devices/cpu/dsp56k/dsp56dsm.cpp index 1fd102bdc66..27d80cbfc77 100644 --- a/src/devices/cpu/dsp56k/dsp56dsm.cpp +++ b/src/devices/cpu/dsp56k/dsp56dsm.cpp @@ -16,15 +16,25 @@ /*****************************/ /* Main disassembly function */ /*****************************/ -CPU_DISASSEMBLE( dsp56k ) +static offs_t internal_disasm_dsp56k(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { const uint16_t w0 = oprom[0] | (oprom[1] << 8); const uint16_t w1 = oprom[2] | (oprom[3] << 8); // Decode and disassemble. DSP56K::Opcode op(w0, w1); - sprintf(buffer, "%s", op.disassemble().c_str()); + stream << op.disassemble(); const unsigned size = op.size(); return (size | DASMFLAG_SUPPORTED); } + + +CPU_DISASSEMBLE(dsp56k) +{ + std::ostringstream stream; + offs_t result = internal_disasm_dsp56k(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} diff --git a/src/devices/cpu/e0c6200/e0c6200d.cpp b/src/devices/cpu/e0c6200/e0c6200d.cpp index 04025e1c484..62cbfab9ad5 100644 --- a/src/devices/cpu/e0c6200/e0c6200d.cpp +++ b/src/devices/cpu/e0c6200/e0c6200d.cpp @@ -110,7 +110,7 @@ static char* decode_param(uint16_t opcode, int param, char* buffer) } -CPU_DISASSEMBLE(e0c6200) +static offs_t internal_disasm_e0c6200(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { uint16_t op = (oprom[1] | oprom[0] << 8) & 0xfff; @@ -690,19 +690,28 @@ CPU_DISASSEMBLE(e0c6200) // fetch mnemonic - char *dst = buffer; - dst += sprintf(dst, "%-6s", em_name[m]); + util::stream_format(stream, "%-6s", em_name[m]); // fetch param(s) char pbuffer[10]; if (p1 != -1) { - dst += sprintf(dst, "%s", decode_param(op, p1, pbuffer)); + util::stream_format(stream, "%s", decode_param(op, p1, pbuffer)); if (p2 != -1) { - dst += sprintf(dst, ",%s", decode_param(op, p2, pbuffer)); + util::stream_format(stream, ",%s", decode_param(op, p2, pbuffer)); } } return 1 | em_flags[m] | DASMFLAG_SUPPORTED; } + + +CPU_DISASSEMBLE(e0c6200) +{ + std::ostringstream stream; + offs_t result = internal_disasm_e0c6200(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} diff --git a/src/devices/cpu/e132xs/32xsdasm.cpp b/src/devices/cpu/e132xs/32xsdasm.cpp index a69f5d9dbcd..bf230f9137a 100644 --- a/src/devices/cpu/e132xs/32xsdasm.cpp +++ b/src/devices/cpu/e132xs/32xsdasm.cpp @@ -392,7 +392,7 @@ static uint32_t RRdis_format(char *source, char *dest, uint16_t op, uint16_t nex return ret; } -unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsigned h_flag, int private_fp) +unsigned dasm_hyperstone(std::ostream &stream, unsigned pc, const uint8_t *oprom, unsigned h_flag, int private_fp) { uint16_t op; uint8_t op_num; @@ -425,7 +425,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_bit && dest_bit && source_code == 0 && dest_code == 0 ) { - sprintf(buffer, "NOP"); + util::stream_format(stream, "NOP"); } else { @@ -433,11 +433,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( !source_bit && source_code == SR_REGISTER ) { - sprintf(buffer, "CHKZ %s, 0", dest); + util::stream_format(stream, "CHKZ %s, 0", dest); } else { - sprintf(buffer, "CHK %s, %s", dest, source); + util::stream_format(stream, "CHK %s, %s", dest, source); } } @@ -452,16 +452,16 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { global_fp = 0; RR_format(source, dest, op, 0); - sprintf(buffer, "RET PC, %s", source); + util::stream_format(stream, "RET PC, %s", source); flags = DASMFLAG_STEP_OUT; } else if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "MOVD %s, 0", dest); + util::stream_format(stream, "MOVD %s, 0", dest); } else { - sprintf(buffer, "MOVD %s, %s", dest, source); + util::stream_format(stream, "MOVD %s, %s", dest, source); } break; @@ -470,7 +470,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign case 0x08: case 0x09: case 0x0a: case 0x0b: RR_format(source, dest, op, 0); - sprintf(buffer, "DIVU %s, %s", dest, source); + util::stream_format(stream, "DIVU %s, %s", dest, source); break; @@ -478,7 +478,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign case 0x0c: case 0x0d: case 0x0e: case 0x0f: RR_format(source, dest, op, 0); - sprintf(buffer, "DIVS %s, %s", dest, source); + util::stream_format(stream, "DIVS %s, %s", dest, source); break; @@ -516,12 +516,12 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign lim = op & 0xfff; } - sprintf(buffer, "XM%x %s, %s, $%x", (uint8_t)(float) pow(2.0, xcode), dest, source, lim); + util::stream_format(stream, "XM%x %s, %s, $%x", (uint8_t)(float) pow(2.0, xcode), dest, source, lim); } else { - sprintf(buffer, "XX%x %s, %s, 0", (uint8_t)(float) pow(2.0, (xcode - 4)), dest, source); + util::stream_format(stream, "XX%x %s, %s, 0", (uint8_t)(float) pow(2.0, (xcode - 4)), dest, source); } break; @@ -532,7 +532,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { uint32_t const_val = RRconst_format(source, dest, op, &pc); - sprintf(buffer, "MASK %s, %s, $%x", dest, source, const_val); + util::stream_format(stream, "MASK %s, %s, $%x", dest, source, const_val); break; } @@ -544,11 +544,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "SUM %s, C, $%x", dest, const_val); + util::stream_format(stream, "SUM %s, C, $%x", dest, const_val); } else { - sprintf(buffer, "SUM %s, %s, $%x", dest, source, const_val); + util::stream_format(stream, "SUM %s, %s, $%x", dest, source, const_val); } break; @@ -561,11 +561,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "SUMS %s, C, $%x", dest, const_val); + util::stream_format(stream, "SUMS %s, C, $%x", dest, const_val); } else { - sprintf(buffer, "SUMS %s, %s, $%x", dest, source, const_val); + util::stream_format(stream, "SUMS %s, %s, $%x", dest, source, const_val); } break; @@ -578,11 +578,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "CMP %s, C", dest); + util::stream_format(stream, "CMP %s, C", dest); } else { - sprintf(buffer, "CMP %s, %s", dest, source); + util::stream_format(stream, "CMP %s, %s", dest, source); } break; @@ -591,7 +591,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign case 0x24: case 0x25: case 0x26: case 0x27: RR_format(source, dest, op, h_flag); - sprintf(buffer, "MOV %s, %s", dest, source); + util::stream_format(stream, "MOV %s, %s", dest, source); break; @@ -602,11 +602,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "ADD %s, C", dest); + util::stream_format(stream, "ADD %s, C", dest); } else { - sprintf(buffer, "ADD %s, %s", dest, source); + util::stream_format(stream, "ADD %s, %s", dest, source); } break; @@ -618,11 +618,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "ADDS %s, C", dest); + util::stream_format(stream, "ADDS %s, C", dest); } else { - sprintf(buffer, "ADDS %s, %s", dest, source); + util::stream_format(stream, "ADDS %s, %s", dest, source); } break; @@ -631,7 +631,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign case 0x30: case 0x31: case 0x32: case 0x33: RR_format(source, dest, op, 0); - sprintf(buffer, "CMPB %s, %s", dest, source); + util::stream_format(stream, "CMPB %s, %s", dest, source); break; @@ -639,7 +639,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign case 0x34: case 0x35: case 0x36: case 0x37: RR_format(source, dest, op, 0); - sprintf(buffer, "ANDN %s, %s", dest, source); + util::stream_format(stream, "ANDN %s, %s", dest, source); break; @@ -647,7 +647,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign case 0x38: case 0x39: case 0x3a: case 0x3b: RR_format(source, dest, op, 0); - sprintf(buffer, "OR %s, %s", dest, source); + util::stream_format(stream, "OR %s, %s", dest, source); break; @@ -655,7 +655,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign case 0x3c: case 0x3d: case 0x3e: case 0x3f: RR_format(source, dest, op, 0); - sprintf(buffer, "XOR %s, %s", dest, source); + util::stream_format(stream, "XOR %s, %s", dest, source); break; @@ -666,11 +666,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "SUBC %s, C", dest); + util::stream_format(stream, "SUBC %s, C", dest); } else { - sprintf(buffer, "SUBC %s, %s", dest, source); + util::stream_format(stream, "SUBC %s, %s", dest, source); } break; @@ -680,7 +680,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign RR_format(source, dest, op, 0); - sprintf(buffer, "NOT %s, %s", dest, source); + util::stream_format(stream, "NOT %s, %s", dest, source); break; @@ -691,11 +691,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "SUB %s, C", dest); + util::stream_format(stream, "SUB %s, C", dest); } else { - sprintf(buffer, "SUB %s, %s", dest, source); + util::stream_format(stream, "SUB %s, %s", dest, source); } break; @@ -707,11 +707,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "SUBS %s, C", dest); + util::stream_format(stream, "SUBS %s, C", dest); } else { - sprintf(buffer, "SUBS %s, %s", dest, source); + util::stream_format(stream, "SUBS %s, %s", dest, source); } break; @@ -723,11 +723,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "ADDC %s, C", dest); + util::stream_format(stream, "ADDC %s, C", dest); } else { - sprintf(buffer, "ADDC %s, %s", dest, source); + util::stream_format(stream, "ADDC %s, %s", dest, source); } break; @@ -736,7 +736,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign case 0x54: case 0x55: case 0x56: case 0x57: RR_format(source, dest, op, 0); - sprintf(buffer, "AND %s, %s", dest, source); + util::stream_format(stream, "AND %s, %s", dest, source); break; @@ -747,11 +747,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "NEG %s, C", dest); + util::stream_format(stream, "NEG %s, C", dest); } else { - sprintf(buffer, "NEG %s, %s", dest, source); + util::stream_format(stream, "NEG %s, %s", dest, source); } break; @@ -763,11 +763,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "NEGS %s, C", dest); + util::stream_format(stream, "NEGS %s, C", dest); } else { - sprintf(buffer, "NEGS %s, %s", dest, source); + util::stream_format(stream, "NEGS %s, %s", dest, source); } break; @@ -777,7 +777,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { uint32_t imm = Rimm_format(dest, op, &pc, 0); - sprintf(buffer, "CMPI %s, $%x", dest, imm); + util::stream_format(stream, "CMPI %s, $%x", dest, imm); break; } @@ -787,7 +787,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { uint32_t imm = Rimm_format(dest, op, &pc, h_flag); - sprintf(buffer, "MOVI %s, $%x", dest, imm); + util::stream_format(stream, "MOVI %s, $%x", dest, imm); break; } @@ -799,11 +799,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( !N_VALUE(op) ) { - sprintf(buffer, "ADDI %s, CZ", dest); + util::stream_format(stream, "ADDI %s, CZ", dest); } else { - sprintf(buffer, "ADDI %s, $%x", dest, imm); + util::stream_format(stream, "ADDI %s, $%x", dest, imm); } break; @@ -816,11 +816,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( !N_VALUE(op) ) { - sprintf(buffer, "ADDSI %s, CZ", dest); + util::stream_format(stream, "ADDSI %s, CZ", dest); } else { - sprintf(buffer, "ADDSI %s, $%x", dest, imm); + util::stream_format(stream, "ADDSI %s, $%x", dest, imm); } break; @@ -833,14 +833,14 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( !N_VALUE(op) ) { - sprintf(buffer, "CMPBI %s, ANYBZ", dest); + util::stream_format(stream, "CMPBI %s, ANYBZ", dest); } else { if( N_VALUE(op) == 31 ) imm = 0x7fffffff; //bit 31 = 0, others = 1 - sprintf(buffer, "CMPBI %s, $%x", dest, imm); + util::stream_format(stream, "CMPBI %s, $%x", dest, imm); } break; @@ -854,7 +854,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( N_VALUE(op) == 31 ) imm = 0x7fffffff; //bit 31 = 0, others = 1 - sprintf(buffer, "ANDNI %s, $%x", dest, imm); + util::stream_format(stream, "ANDNI %s, $%x", dest, imm); break; } @@ -864,7 +864,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { uint32_t imm = Rimm_format(dest, op, &pc, 0); - sprintf(buffer, "ORI %s, $%x", dest, imm); + util::stream_format(stream, "ORI %s, $%x", dest, imm); break; } @@ -874,7 +874,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { uint32_t imm = Rimm_format(dest, op, &pc, 0); - sprintf(buffer, "XORI %s, $%x", dest, imm); + util::stream_format(stream, "XORI %s, $%x", dest, imm); break; } @@ -884,7 +884,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { uint8_t n = Ln_format(dest, op); - sprintf(buffer, "SHRDI %s, $%x", dest, n); + util::stream_format(stream, "SHRDI %s, $%x", dest, n); break; } @@ -894,7 +894,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "SHRD %s, %s", dest, source); + util::stream_format(stream, "SHRD %s, %s", dest, source); break; @@ -903,7 +903,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "SHR %s, %s", dest, source); + util::stream_format(stream, "SHR %s, %s", dest, source); break; @@ -912,7 +912,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { uint8_t n = Ln_format(dest, op); - sprintf(buffer, "SARDI %s, $%x", dest, n); + util::stream_format(stream, "SARDI %s, $%x", dest, n); break; } @@ -922,7 +922,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "SARD %s, %s", dest, source); + util::stream_format(stream, "SARD %s, %s", dest, source); break; @@ -931,7 +931,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "SAR %s, %s", dest, source); + util::stream_format(stream, "SAR %s, %s", dest, source); break; @@ -940,7 +940,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { uint8_t n = Ln_format(dest, op); - sprintf(buffer, "SHLDI %s, $%x", dest, n); + util::stream_format(stream, "SHLDI %s, $%x", dest, n); break; } @@ -950,7 +950,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "SHLD %s, %s", dest, source); + util::stream_format(stream, "SHLD %s, %s", dest, source); break; @@ -959,7 +959,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "SHL %s, %s", dest, source); + util::stream_format(stream, "SHL %s, %s", dest, source); break; @@ -967,7 +967,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign case 0x8c: case 0x8d: case 0xac: case 0xad: case 0xae: case 0xaf: - sprintf(buffer, "Reserved"); + util::stream_format(stream, "Reserved"); break; @@ -976,7 +976,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "TESTLZ %s, %s", dest, source); + util::stream_format(stream, "TESTLZ %s, %s", dest, source); break; @@ -985,7 +985,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "ROL %s, %s", dest, source); + util::stream_format(stream, "ROL %s, %s", dest, source); break; @@ -1004,24 +1004,24 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { case 0: // LDBS.A - sprintf(buffer, "LDBS.A 0, %s, $%x", source, dis); + util::stream_format(stream, "LDBS.A 0, %s, $%x", source, dis); break; case 1: // LDBU.A - sprintf(buffer, "LDBU.A 0, %s, $%x", source, dis); + util::stream_format(stream, "LDBU.A 0, %s, $%x", source, dis); break; case 2: // LDHS.A if( dis & 1 ) { - sprintf(buffer, "LDHS.A 0, %s, $%x", source, dis & ~1); + util::stream_format(stream, "LDHS.A 0, %s, $%x", source, dis & ~1); } // LDHU.A else { - sprintf(buffer, "LDHU.A 0, %s, $%x", source, dis & ~1); + util::stream_format(stream, "LDHU.A 0, %s, $%x", source, dis & ~1); } break; @@ -1030,22 +1030,22 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign // LDD.IOA if( (dis & 3) == 3 ) { - sprintf(buffer, "LDD.IOA 0, %s, $%x", source, dis & ~3); + util::stream_format(stream, "LDD.IOA 0, %s, $%x", source, dis & ~3); } // LDW.IOA else if( (dis & 3) == 2 ) { - sprintf(buffer, "LDW.IOA 0, %s, $%x", source, dis & ~3); + util::stream_format(stream, "LDW.IOA 0, %s, $%x", source, dis & ~3); } // LDD.A else if( (dis & 3) == 1 ) { - sprintf(buffer, "LDD.A 0, %s, $%x", source, dis & ~1); + util::stream_format(stream, "LDD.A 0, %s, $%x", source, dis & ~1); } // LDW.A else { - sprintf(buffer, "LDW.A 0, %s, $%x", source, dis & ~1); + util::stream_format(stream, "LDW.A 0, %s, $%x", source, dis & ~1); } break; @@ -1057,24 +1057,24 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { case 0: // LDBS.D - sprintf(buffer, "LDBS.D %s, %s, $%x", dest, source, dis); + util::stream_format(stream, "LDBS.D %s, %s, $%x", dest, source, dis); break; case 1: // LDBU.D - sprintf(buffer, "LDBU.D %s, %s, $%x", dest, source, dis); + util::stream_format(stream, "LDBU.D %s, %s, $%x", dest, source, dis); break; case 2: // LDHS.D if( dis & 1 ) { - sprintf(buffer, "LDHS.D %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "LDHS.D %s, %s, $%x", dest, source, dis & ~1); } // LDHU.D else { - sprintf(buffer, "LDHU.D %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "LDHU.D %s, %s, $%x", dest, source, dis & ~1); } break; @@ -1082,22 +1082,22 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign // LDD.IOD if( (dis & 3) == 3 ) { - sprintf(buffer, "LDD.IOD %s, %s, $%x", dest, source, dis & ~3); + util::stream_format(stream, "LDD.IOD %s, %s, $%x", dest, source, dis & ~3); } // LDW.IOD else if( (dis & 3) == 2 ) { - sprintf(buffer, "LDW.IOD %s, %s, $%x", dest, source, dis & ~3); + util::stream_format(stream, "LDW.IOD %s, %s, $%x", dest, source, dis & ~3); } // LDD.D else if( (dis & 3) == 1 ) { - sprintf(buffer, "LDD.D %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "LDD.D %s, %s, $%x", dest, source, dis & ~1); } // LDW.D else { - sprintf(buffer, "LDW.D %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "LDW.D %s, %s, $%x", dest, source, dis & ~1); } break; @@ -1118,7 +1118,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( (dest_code == PC_REGISTER && !dest_bit) || (dest_code == SR_REGISTER && !dest_bit) ) { - sprintf(buffer, "Reserved"); + util::stream_format(stream, "Reserved"); break; } @@ -1126,24 +1126,24 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { case 0: // LDBS.N - sprintf(buffer, "LDBS.N %s, %s, $%x", dest, source, dis); + util::stream_format(stream, "LDBS.N %s, %s, $%x", dest, source, dis); break; case 1: // LDBU.N - sprintf(buffer, "LDBU.N %s, %s, $%x", dest, source, dis); + util::stream_format(stream, "LDBU.N %s, %s, $%x", dest, source, dis); break; case 2: // LDHS.N if( dis & 1 ) { - sprintf(buffer, "LDHS.N %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "LDHS.N %s, %s, $%x", dest, source, dis & ~1); } // LDHU.N else { - sprintf(buffer, "LDHU.N %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "LDHU.N %s, %s, $%x", dest, source, dis & ~1); } break; @@ -1152,22 +1152,22 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign // LDW.S if( (dis & 3) == 3 ) { - sprintf(buffer, "LDW.S %s, %s, $%x", dest, source, dis & ~3); + util::stream_format(stream, "LDW.S %s, %s, $%x", dest, source, dis & ~3); } // Reserved else if( (dis & 3) == 2 ) { - sprintf(buffer, "Reserved"); + util::stream_format(stream, "Reserved"); } // LDD.N else if( (dis & 3) == 1 ) { - sprintf(buffer, "LDD.N %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "LDD.N %s, %s, $%x", dest, source, dis & ~1); } // LDW.N else { - sprintf(buffer, "LDW.N %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "LDW.N %s, %s, $%x", dest, source, dis & ~1); } break; @@ -1194,24 +1194,24 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { case 0: // STBS.A - sprintf(buffer, "STBS.A 0, %s, $%x", source, dis); + util::stream_format(stream, "STBS.A 0, %s, $%x", source, dis); break; case 1: // STBU.A - sprintf(buffer, "STBU.A 0, %s, $%x", source, dis); + util::stream_format(stream, "STBU.A 0, %s, $%x", source, dis); break; case 2: // STHS.A if( dis & 1 ) { - sprintf(buffer, "STHS.A 0, %s, $%x", source, dis & ~1); + util::stream_format(stream, "STHS.A 0, %s, $%x", source, dis & ~1); } // STHU.A else { - sprintf(buffer, "STHU.A 0, %s, $%x", source, dis & ~1); + util::stream_format(stream, "STHU.A 0, %s, $%x", source, dis & ~1); } break; @@ -1220,22 +1220,22 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign // STD.IOA if( (dis & 3) == 3 ) { - sprintf(buffer, "STD.IOA 0, %s, $%x", source, dis & ~3); + util::stream_format(stream, "STD.IOA 0, %s, $%x", source, dis & ~3); } // STW.IOA else if( (dis & 3) == 2 ) { - sprintf(buffer, "STW.IOA 0, %s, $%x", source, dis & ~3); + util::stream_format(stream, "STW.IOA 0, %s, $%x", source, dis & ~3); } // STD.A else if( (dis & 3) == 1 ) { - sprintf(buffer, "STD.A 0, %s, $%x", source, dis & ~1); + util::stream_format(stream, "STD.A 0, %s, $%x", source, dis & ~1); } // STW.A else { - sprintf(buffer, "STW.A 0, %s, $%x", source, dis & ~1); + util::stream_format(stream, "STW.A 0, %s, $%x", source, dis & ~1); } break; @@ -1247,24 +1247,24 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { case 0: // STBS.D - sprintf(buffer, "STBS.D %s, %s, $%x", dest, source, dis); + util::stream_format(stream, "STBS.D %s, %s, $%x", dest, source, dis); break; case 1: // STBU.D - sprintf(buffer, "STBU.D %s, %s, $%x", dest, source, dis); + util::stream_format(stream, "STBU.D %s, %s, $%x", dest, source, dis); break; case 2: // STHS.D if( dis & 1 ) { - sprintf(buffer, "STHS.D %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "STHS.D %s, %s, $%x", dest, source, dis & ~1); } // STHU.D else { - sprintf(buffer, "STHU.D %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "STHU.D %s, %s, $%x", dest, source, dis & ~1); } break; @@ -1272,22 +1272,22 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign // STD.IOD if( (dis & 3) == 3 ) { - sprintf(buffer, "STD.IOD %s, %s, $%x", dest, source, dis & ~3); + util::stream_format(stream, "STD.IOD %s, %s, $%x", dest, source, dis & ~3); } // STW.IOD else if( (dis & 3) == 2 ) { - sprintf(buffer, "STW.IOD %s, %s, $%x", dest, source, dis & ~3); + util::stream_format(stream, "STW.IOD %s, %s, $%x", dest, source, dis & ~3); } // STD.D else if( (dis & 3) == 1 ) { - sprintf(buffer, "STD.D %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "STD.D %s, %s, $%x", dest, source, dis & ~1); } // STW.D else { - sprintf(buffer, "STW.D %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "STW.D %s, %s, $%x", dest, source, dis & ~1); } break; @@ -1311,7 +1311,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( (dest_code == PC_REGISTER && !dest_bit) || (dest_code == SR_REGISTER && !dest_bit) ) { - sprintf(buffer, "Reserved"); + util::stream_format(stream, "Reserved"); break; } @@ -1319,24 +1319,24 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { case 0: // STBS.N - sprintf(buffer, "STBS.N %s, %s, $%x", dest, source, dis); + util::stream_format(stream, "STBS.N %s, %s, $%x", dest, source, dis); break; case 1: // STBU.N - sprintf(buffer, "STBU.N %s, %s, $%x", dest, source, dis); + util::stream_format(stream, "STBU.N %s, %s, $%x", dest, source, dis); break; case 2: // STHS.N if( dis & 1 ) { - sprintf(buffer, "STHS.N %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "STHS.N %s, %s, $%x", dest, source, dis & ~1); } // STHU.N else { - sprintf(buffer, "STHU.N %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "STHU.N %s, %s, $%x", dest, source, dis & ~1); } break; @@ -1345,22 +1345,22 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign // STW.S if( (dis & 3) == 3 ) { - sprintf(buffer, "STW.S %s, %s, $%x", dest, source, dis & ~3); + util::stream_format(stream, "STW.S %s, %s, $%x", dest, source, dis & ~3); } // Reserved else if( (dis & 3) == 2 ) { - sprintf(buffer, "Reserved"); + util::stream_format(stream, "Reserved"); } // STD.N else if( (dis & 3) == 1 ) { - sprintf(buffer, "STD.N %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "STD.N %s, %s, $%x", dest, source, dis & ~1); } // STW.N else { - sprintf(buffer, "STW.N %s, %s, $%x", dest, source, dis & ~1); + util::stream_format(stream, "STW.N %s, %s, $%x", dest, source, dis & ~1); } break; @@ -1374,7 +1374,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { uint8_t n = Rn_format(dest, op); - sprintf(buffer, "SHRI %s, $%x", dest, n); + util::stream_format(stream, "SHRI %s, $%x", dest, n); break; } @@ -1384,7 +1384,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { uint8_t n = Rn_format(dest, op); - sprintf(buffer, "SARI %s, $%x", dest, n); + util::stream_format(stream, "SARI %s, $%x", dest, n); break; } @@ -1394,7 +1394,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { uint8_t n = Rn_format(dest, op); - sprintf(buffer, "SHLI %s, $%x", dest, n); + util::stream_format(stream, "SHLI %s, $%x", dest, n); break; } @@ -1404,7 +1404,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign RR_format(source, dest, op, 0); - sprintf(buffer, "MULU %s, %s", dest, source); + util::stream_format(stream, "MULU %s, %s", dest, source); break; @@ -1413,7 +1413,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign RR_format(source, dest, op, 0); - sprintf(buffer, "MULS %s, %s", dest, source); + util::stream_format(stream, "MULS %s, %s", dest, source); break; @@ -1424,15 +1424,15 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( dest_code == PC_REGISTER && !dest_bit ) { - sprintf(buffer, "Illegal PC: $%x OP: $%x", pc, op); + util::stream_format(stream, "Illegal PC: $%x OP: $%x", pc, op); } else if( dest_code == SR_REGISTER && !dest_bit ) { - sprintf(buffer, "FETCH $%x", (n / 2) + 1); + util::stream_format(stream, "FETCH $%x", (n / 2) + 1); } else { - sprintf(buffer, "%s %s", SETxx[n], dest); + util::stream_format(stream, "%s %s", SETxx[n], dest); } break; @@ -1443,7 +1443,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign RR_format(source, dest, op, 0); - sprintf(buffer, "MUL %s, %s", dest, source); + util::stream_format(stream, "MUL %s, %s", dest, source); break; @@ -1452,7 +1452,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FADD %s, %s", dest, source); + util::stream_format(stream, "FADD %s, %s", dest, source); break; @@ -1461,7 +1461,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FADDD %s, %s", dest, source); + util::stream_format(stream, "FADDD %s, %s", dest, source); break; @@ -1470,7 +1470,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FSUB %s, %s", dest, source); + util::stream_format(stream, "FSUB %s, %s", dest, source); break; @@ -1479,7 +1479,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FSUBD %s, %s", dest, source); + util::stream_format(stream, "FSUBD %s, %s", dest, source); break; @@ -1488,7 +1488,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FMUL %s, %s", dest, source); + util::stream_format(stream, "FMUL %s, %s", dest, source); break; @@ -1497,7 +1497,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FMULD %s, %s", dest, source); + util::stream_format(stream, "FMULD %s, %s", dest, source); break; @@ -1506,7 +1506,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FDIV %s, %s", dest, source); + util::stream_format(stream, "FDIV %s, %s", dest, source); break; @@ -1515,7 +1515,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FDIVD %s, %s", dest, source); + util::stream_format(stream, "FDIVD %s, %s", dest, source); break; @@ -1524,7 +1524,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FCMP %s, %s", dest, source); + util::stream_format(stream, "FCMP %s, %s", dest, source); break; @@ -1533,7 +1533,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FCMPD %s, %s", dest, source); + util::stream_format(stream, "FCMPD %s, %s", dest, source); break; @@ -1542,7 +1542,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FCMPU %s, %s", dest, source); + util::stream_format(stream, "FCMPU %s, %s", dest, source); break; @@ -1551,7 +1551,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FCMPUD %s, %s", dest, source); + util::stream_format(stream, "FCMPUD %s, %s", dest, source); break; @@ -1560,7 +1560,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FCVT %s, %s", dest, source); + util::stream_format(stream, "FCVT %s, %s", dest, source); break; @@ -1569,7 +1569,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "FCVTD %s, %s", dest, source); + util::stream_format(stream, "FCVTD %s, %s", dest, source); break; @@ -1589,64 +1589,64 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { case 0x100: case EMUL: - sprintf(buffer, "EMUL %s, %s", dest, source); + util::stream_format(stream, "EMUL %s, %s", dest, source); break; case EMULU: - sprintf(buffer, "EMULU %s, %s", dest, source); + util::stream_format(stream, "EMULU %s, %s", dest, source); break; case EMULS: - sprintf(buffer, "EMULS %s, %s", dest, source); + util::stream_format(stream, "EMULS %s, %s", dest, source); break; case EMAC: - sprintf(buffer, "EMAC %s, %s", dest, source); + util::stream_format(stream, "EMAC %s, %s", dest, source); break; case EMACD: - sprintf(buffer, "EMACD %s, %s", dest, source); + util::stream_format(stream, "EMACD %s, %s", dest, source); break; case EMSUB: - sprintf(buffer, "EMSUB %s, %s", dest, source); + util::stream_format(stream, "EMSUB %s, %s", dest, source); break; case EMSUBD: - sprintf(buffer, "EMSUBD %s, %s", dest, source); + util::stream_format(stream, "EMSUBD %s, %s", dest, source); break; case EHMAC: - sprintf(buffer, "EHMAC %s, %s", dest, source); + util::stream_format(stream, "EHMAC %s, %s", dest, source); break; case EHMACD: - sprintf(buffer, "EHMACD %s, %s", dest, source); + util::stream_format(stream, "EHMACD %s, %s", dest, source); break; case EHCMULD: - sprintf(buffer, "EHCMULD %s, %s", dest, source); + util::stream_format(stream, "EHCMULD %s, %s", dest, source); break; case EHCMACD: - sprintf(buffer, "EHCMACD %s, %s", dest, source); + util::stream_format(stream, "EHCMACD %s, %s", dest, source); break; case EHCSUMD: - sprintf(buffer, "EHCSUMD %s, %s", dest, source); + util::stream_format(stream, "EHCSUMD %s, %s", dest, source); break; case EHCFFTD: - sprintf(buffer, "EHCFFTD %s, %s", dest, source); + util::stream_format(stream, "EHCFFTD %s, %s", dest, source); break; case EHCFFTSD: - sprintf(buffer, "EHCFFTSD %s, %s", dest, source); + util::stream_format(stream, "EHCFFTSD %s, %s", dest, source); break; default: - sprintf(buffer, "Ext. OP $%X @ %X\n", extended_op, pc); - osd_printf_verbose(buffer, "Illegal Extended Opcode: %X @ %X\n", extended_op, pc); + util::stream_format(stream, "Ext. OP $%X @ %X\n", extended_op, pc); + osd_printf_verbose("Illegal Extended Opcode: %X @ %X\n", extended_op, pc); break; } @@ -1658,7 +1658,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LL_format(source, dest, op); - sprintf(buffer, "DO %s, %s", dest, source); + util::stream_format(stream, "DO %s, %s", dest, source); break; @@ -1667,7 +1667,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LR_format(source, dest, op); - sprintf(buffer, "LDW.R %s, %s", dest, source); + util::stream_format(stream, "LDW.R %s, %s", dest, source); break; @@ -1676,7 +1676,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LR_format(source, dest, op); - sprintf(buffer, "LDD.R %s, %s", dest, source); + util::stream_format(stream, "LDD.R %s, %s", dest, source); break; @@ -1685,7 +1685,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LR_format(source, dest, op); - sprintf(buffer, "LDW.P %s, %s", dest, source); + util::stream_format(stream, "LDW.P %s, %s", dest, source); break; @@ -1694,7 +1694,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign LR_format(source, dest, op); - sprintf(buffer, "LDD.P %s, %s", dest, source); + util::stream_format(stream, "LDD.P %s, %s", dest, source); break; @@ -1706,7 +1706,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) strcpy(source,"0"); - sprintf(buffer, "STW.R %s, %s", dest, source); + util::stream_format(stream, "STW.R %s, %s", dest, source); break; @@ -1718,7 +1718,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) strcpy(source,"0"); - sprintf(buffer, "STD.R %s, %s", dest, source); + util::stream_format(stream, "STD.R %s, %s", dest, source); break; @@ -1730,7 +1730,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) strcpy(source,"0"); - sprintf(buffer, "STW.P %s, %s", dest, source); + util::stream_format(stream, "STW.P %s, %s", dest, source); break; @@ -1742,7 +1742,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) strcpy(source,"0"); - sprintf(buffer, "STD.P %s, %s", dest, source); + util::stream_format(stream, "STD.P %s, %s", dest, source); break; @@ -1751,7 +1751,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBV $%x", rel); + util::stream_format(stream, "DBV $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1762,7 +1762,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBNV $%x", rel); + util::stream_format(stream, "DBNV $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1773,7 +1773,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBE $%x", rel); + util::stream_format(stream, "DBE $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1784,7 +1784,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBNE $%x", rel); + util::stream_format(stream, "DBNE $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1795,7 +1795,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBC $%x", rel); + util::stream_format(stream, "DBC $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1806,7 +1806,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBNC $%x", rel); + util::stream_format(stream, "DBNC $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1817,7 +1817,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBSE $%x", rel); + util::stream_format(stream, "DBSE $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1828,7 +1828,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBHT $%x", rel); + util::stream_format(stream, "DBHT $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1839,7 +1839,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBN $%x", rel); + util::stream_format(stream, "DBN $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1850,7 +1850,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBNN $%x", rel); + util::stream_format(stream, "DBNN $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1861,7 +1861,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBLE $%x", rel); + util::stream_format(stream, "DBLE $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1872,7 +1872,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBGT $%x", rel); + util::stream_format(stream, "DBGT $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1883,7 +1883,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "DBR $%x", rel); + util::stream_format(stream, "DBR $%x", rel); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; @@ -1895,7 +1895,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign global_fp = 0; LL_format(source, dest, op); - sprintf(buffer, "FRAME %s, %s", dest, source); + util::stream_format(stream, "FRAME %s, %s", dest, source); break; @@ -1906,12 +1906,12 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign if( source_code == SR_REGISTER && !source_bit ) { - sprintf(buffer, "CALL %s, 0, $%x", dest, const_val); + util::stream_format(stream, "CALL %s, 0, $%x", dest, const_val); flags = DASMFLAG_STEP_OVER; } else { - sprintf(buffer, "CALL %s, %s, $%x", dest, source, const_val); + util::stream_format(stream, "CALL %s, %s, $%x", dest, source, const_val); flags = DASMFLAG_STEP_OVER; } @@ -1923,7 +1923,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BV $%x", rel); + util::stream_format(stream, "BV $%x", rel); break; } @@ -1933,7 +1933,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BNV $%x", rel); + util::stream_format(stream, "BNV $%x", rel); break; } @@ -1943,7 +1943,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BE $%x", rel); + util::stream_format(stream, "BE $%x", rel); break; } @@ -1953,7 +1953,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BNE $%x", rel); + util::stream_format(stream, "BNE $%x", rel); break; } @@ -1963,7 +1963,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BC $%x", rel); + util::stream_format(stream, "BC $%x", rel); break; } @@ -1973,7 +1973,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BNC $%x", rel); + util::stream_format(stream, "BNC $%x", rel); break; } @@ -1983,7 +1983,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BSE $%x", rel); + util::stream_format(stream, "BSE $%x", rel); break; } @@ -1993,7 +1993,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BHT $%x", rel); + util::stream_format(stream, "BHT $%x", rel); break; } @@ -2003,7 +2003,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BN $%x", rel); + util::stream_format(stream, "BN $%x", rel); break; } @@ -2013,7 +2013,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BNN $%x", rel); + util::stream_format(stream, "BNN $%x", rel); break; } @@ -2023,7 +2023,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BLE $%x", rel); + util::stream_format(stream, "BLE $%x", rel); break; } @@ -2033,7 +2033,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BGT $%x", rel); + util::stream_format(stream, "BGT $%x", rel); break; } @@ -2043,7 +2043,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign { int32_t rel = PCrel_format(op, pc) + 2; - sprintf(buffer, "BR $%x", rel); + util::stream_format(stream, "BR $%x", rel); break; } @@ -2057,73 +2057,73 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign switch( code ) { case TRAPLE: - sprintf(buffer, "TRAPLE %d", trapno); + util::stream_format(stream, "TRAPLE %d", trapno); flags = DASMFLAG_STEP_OVER; break; case TRAPGT: - sprintf(buffer, "TRAPGT %d", trapno); + util::stream_format(stream, "TRAPGT %d", trapno); flags = DASMFLAG_STEP_OVER; break; case TRAPLT: - sprintf(buffer, "TRAPLT %d", trapno); + util::stream_format(stream, "TRAPLT %d", trapno); flags = DASMFLAG_STEP_OVER; break; case TRAPGE: - sprintf(buffer, "TRAPGE %d", trapno); + util::stream_format(stream, "TRAPGE %d", trapno); flags = DASMFLAG_STEP_OVER; break; case TRAPSE: - sprintf(buffer, "TRAPSE %d", trapno); + util::stream_format(stream, "TRAPSE %d", trapno); flags = DASMFLAG_STEP_OVER; break; case TRAPHT: - sprintf(buffer, "TRAPHT %d", trapno); + util::stream_format(stream, "TRAPHT %d", trapno); flags = DASMFLAG_STEP_OVER; break; case TRAPST: - sprintf(buffer, "TRAPST %d", trapno); + util::stream_format(stream, "TRAPST %d", trapno); flags = DASMFLAG_STEP_OVER; break; case TRAPHE: - sprintf(buffer, "TRAPHE %d", trapno); + util::stream_format(stream, "TRAPHE %d", trapno); flags = DASMFLAG_STEP_OVER; break; case TRAPE: - sprintf(buffer, "TRAPE %d", trapno); + util::stream_format(stream, "TRAPE %d", trapno); flags = DASMFLAG_STEP_OVER; break; case TRAPNE: - sprintf(buffer, "TRAPNE %d", trapno); + util::stream_format(stream, "TRAPNE %d", trapno); flags = DASMFLAG_STEP_OVER; break; case TRAPV: - sprintf(buffer, "TRAPV %d", trapno); + util::stream_format(stream, "TRAPV %d", trapno); flags = DASMFLAG_STEP_OVER; break; case TRAP: - sprintf(buffer, "TRAP %d", trapno); + util::stream_format(stream, "TRAP %d", trapno); flags = DASMFLAG_STEP_OVER; break; @@ -2136,6 +2136,15 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsign return size | flags | DASMFLAG_SUPPORTED; } +static unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsigned h_flag, int private_fp) +{ + std::ostringstream stream; + unsigned result = dasm_hyperstone(stream, pc, oprom, h_flag, private_fp); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +} + CPU_DISASSEMBLE( hyperstone_generic ) { return dasm_hyperstone( buffer, pc, oprom, 0, 0 ); diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index 8bbdd4f5bbb..0fea0efe55b 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -1906,8 +1906,11 @@ uint32_t hyperstone_device::disasm_max_opcode_bytes() const offs_t hyperstone_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { - extern CPU_DISASSEMBLE( hyperstone ); - return dasm_hyperstone( buffer, pc, oprom, GET_H, GET_FP ); + std::ostringstream stream; + offs_t result = dasm_hyperstone(stream, pc, oprom, GET_H, GET_FP); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; } /* Opcodes */ diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 8c2710aee68..376e0cf634a 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -174,7 +174,7 @@ enum E132XS_L60, E132XS_L61, E132XS_L62, E132XS_L63 }; -extern unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsigned h_flag, int private_fp); +extern unsigned dasm_hyperstone(std::ostream &stream, unsigned pc, const uint8_t *oprom, unsigned h_flag, int private_fp); /* Memory access */ /* read byte */ diff --git a/src/devices/cpu/psx/dismips.cpp b/src/devices/cpu/psx/dismips.cpp index bfbc3428c94..09b14d9d06b 100644 --- a/src/devices/cpu/psx/dismips.cpp +++ b/src/devices/cpu/psx/dismips.cpp @@ -331,31 +331,3 @@ int main( int argc, char *argv[] ) free (filebuf); return 0; } - -void *osd_malloc_array(size_t size) -{ - return osd_malloc(size); -} - -void *malloc_array_file_line(size_t size, const char *file, int line) -{ - // allocate the memory and fail if we can't - return osd_malloc_array(size); -} - -void free_file_line( void *memory, const char *file, int line ) -{ - osd_free( memory ); -} - -void osd_free( void *memory ) -{ -#undef free - free( memory ); -} - -void *osd_malloc( size_t size ) -{ -#undef malloc - return malloc( size ); -} diff --git a/src/devices/cpu/tms9900/99xxcore.h b/src/devices/cpu/tms9900/99xxcore.h deleted file mode 100644 index 6eaef876d95..00000000000 --- a/src/devices/cpu/tms9900/99xxcore.h +++ /dev/null @@ -1,5319 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Raphael Nabet - -/*************************************************************************** - Legacy TMS99xx core implementation - - PLEASE DO NOT REMOVE THIS FILE from the source tree, even if none of the - drivers make use of it anymore. It still contains documentation and - incomplete implementations of cores that are not (yet) used in drivers. - - It need not be included in the build process, however. - - Michael Zapf, February 2014 - -***************************************************************************/ - -/* - 99xxcore.h : generic tms99xx emulation - - The TMS99XX_MODEL switch tells which emulator we want to build. Set the - switch, then include 99xxcore.h, and you will have an emulator for this - processor. - - Only ti990/10, tms9900, tms9980a/9981, and tms9995 work OK for now. Note - that tms9995 has not been tested extensively. - - tms9940 is WIP: it is probably still buggy (particularily the BCD support), - as it has not been tested. tms9985 has been implemented as a 9940 with - a data bus, which should be mostly correct. - - I think all software aspects of tms9985 and tms9989 are implemented. - You just need to implement bus interfaces, provided you know them. - (I don't...) - - tms99000 cannot be implemented fully yet, due to lack of documentation. - - ti990/12 is not supported at all, and it should probably be implemented as - a separate processor core, anyway. - - Original tms9900 emulator by Edward Swartz - Smoothed out by Raphael Nabet - Originally converted for Mame by M.Coates - Processor timing, support for tms9980 and tms9995, and many bug fixes by R Nabet -*/ - -/* - The first member of the family was actually the ti990/10 minicomputer, - released in 1975. tms9900 was released in 1976, and has the same - instruction set as ti990/10: however, tms9900 is slower, it does not - support privileges and memory mapping, and illegal instructions do not - cause an error interrupt. - - The ti990 family later evoluted into the huge ti990/12 system, with support - for 144 different instructions, and microcode programming in case some user - found it was not enough. ti990/10 was eventually replaced by a cheaper - ti990/10a board, built around a tms99000 microprocessor. - - The tms9980 processor is merely a tms9900 with a 8-bit data bus (instead of - 16-bit on tms9900). - - tms9940 is a microcontroller, and is mostly similar to 9900/9980. The - variant I know has 2kb of ROM, 128 bytes of RAM, a timer, 32 I/O line, some - of which can be reconfigured as a CRU bus, but no external memory bus. It - includes three additional opcodes, which are not supported by any other - member of the family (with the probable exception of TMS9985). - - tms9985 is similar to tms9940, but it supports an external 8-bit-wide - memory bus. At least one variant included 8kb of ROM, 256 bytes of RAM. - It was ill-fated, as it was never released due to technical problems. - - tms9989 is mostly alien to me. I guess it is a close relative of tms9995, - although I am not sure. I have read that the SBP68689 supports tms9995 - opcodes, but that tms9989 does not. - - tms9995 belongs to another generation. It is quite faster than tms9900, - and supports 4 extra opcodes. Its external bus is 8-bit-wide, and it has - 256 bytes of internal 16-bit RAM. - - tms99000 is the successor to both ti9900 and ti990/10. It supports - privileges, and has a coprocessor interface which enables the use of an - external memory mapper. Additionnally, it can use a Macrostore ROM to - emulate additional instructions. - - This feature allowed TI to expand the 99000 family with the tms99105 (which - was said to support 84 instructions types), the tms99110 (which supported - floating point instructions), and possibly another chip (tms99220???) which - included parts of the UCSD P-system in Macrostore. - -References : -* 9900 family systems design, chapter 6, 7, 8 -* TMS 9980A/ TMS 9981 Product Data Book -* TMS 9995 16-Bit Microcomputer Data Manual -* Model 990/10A computer general description, section 4 (p/n 2302633-9701 A) -* 990/99000 assembly language reference manual (p/n 2270509-9701 A) -* Chapter 18 of unidentified book is the only reference on tms9940 I have found so far (Paperport format) - <ftp://ftp.whtech.com//datasheets/Hardware manuals/tms9900 9901 9904 9940 9980 (by a osborne).max> - -Other references can be found on spies.com: -<http://www.spies.com/arcade/simulation/processors/index.html> -<http://www.spies.com/~aek/pdf/ti/> - -*/ - - -#if (TMS99XX_MODEL == TI990_10_ID) - - #define TMS99XX_PREFIX ti990_10 - #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( ti990_10l ) - #define TMS99XX_device_get_name "TI990/10L" - #define TMS99XX_device_get_shortname "ti990_10l" - -#elif (TMS99XX_MODEL == TMS9900_ID) - - #define TMS99XX_PREFIX tms9900 - #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms9900l ) - #define TMS99XX_device_get_name "TMS9900L" - #define TMS99XX_device_get_shortname "tms9900l" - -#elif (TMS99XX_MODEL == TMS9940_ID) - - #define TMS99XX_PREFIX tms9940 - #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms9940l ) - #define TMS99XX_device_get_name "TMS9940L" - #define TMS99XX_device_get_shortname "tms9940l" - - #error "tms9940 is not yet supported" - -#elif (TMS99XX_MODEL == TMS9980_ID) - - #define TMS99XX_PREFIX tms9980a - #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms9980al ) - #define TMS99XX_device_get_name "TMS9980AL/TMS9981L" - #define TMS99XX_device_get_shortname "tms9980al" - -#elif (TMS99XX_MODEL == TMS9985_ID) - - #define TMS99XX_PREFIX tms9985 - #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms9985l ) - #define TMS99XX_device_get_name "TMS9985L" - #define TMS99XX_device_get_shortname "tms9985l" - - #error "tms9985 is not yet supported" - -#elif (TMS99XX_MODEL == TMS9989_ID) - - #define TMS99XX_PREFIX tms9989 - #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms9989l ) - #define TMS99XX_device_get_name "TMS9989L" - #define TMS99XX_device_get_shortname "tms9989l" - - #error "tms9989 is not yet supported" - -#elif (TMS99XX_MODEL == TMS9995_ID) - - #define TMS99XX_PREFIX tms9995 - #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms9995l ) - #define TMS99XX_device_get_name "TMS9995L" - #define TMS99XX_device_get_shortname "tms9995l" - -#elif (TMS99XX_MODEL == TMS99000_ID) - - #define TMS99XX_PREFIX tms99000 - #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms99000l ) - #define TMS99XX_device_get_name "TMS99000L" - #define TMS99XX_device_get_shortname "tms99000l" - - #error "tms99000 is not yet supported" - -#elif (TMS99XX_MODEL == TMS99105A_ID) - - #define TMS99XX_PREFIX tms99105a - #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms99105al ) - #define TMS99XX_device_get_name "TMS99105AL" - #define TMS99XX_device_get_shortname "tms99105al" - - #error "tms99105a is not yet supported" - -#elif (TMS99XX_MODEL == TMS99110A_ID) - - #define TMS99XX_PREFIX tms99110a - #define TMS99XX_GET_INFO CPU_GET_INFO_NAME( tms99110al ) - #define TMS99XX_device_get_name "TMS99110AL" - #define TMS99XX_device_get_shortname "tms99110al" - - #error "tms99110a is not yet supported" - -#endif - -/* - Now for some preprocessor wizardry. -*/ -#define concat2(a,b) a##b - -#define GET_INFO(prefix) concat2(prefix,_get_info) -#define RESET_PARAM(prefix) concat2(prefix,reset_param) - -#define TMS99XX_RESET_PARAM RESET_PARAM(TMS99XX_PREFIX) - - - -/* - I include this macro because we may eventually support other 99000 variants such as tms99110, - and this macro will remain true for every 99000 family member, even when we have - (TMS99XX_MODEL != TMS99000_ID). -*/ -#define IS_99000 (TMS99XX_MODEL == TMS99000_ID) - -/* - On microprocessor implementations (other than TMS9940 and, probably, TMS9985), the CKOF, CKON, - IDLE, LREX and RSET cause an external CRU write. CKOF, CKON and LREX do nothing apart of this, - therefore they must be implemented with external hardware (CKON and CKOF are supposed to - enable/disable a line clock interrupt, and LREX to trigger a LOAD interrupt). IDLE and RSET - are functional, but, on the one hand, the design allowed to light a diagnostic LED when - the processor is in IDLE state, and, on the other hand, the RSET instruction is supposed - to reset external devices as well. - - On the TI990/10 and TI990/12 minicomputers, there is no such CRU write. The line clock - interrupt latch is part of the CPU board, LREX is fully functional, the IDLE led is connected - to the board, and the RSET line is part of the TILINE bus connector. - - On the TMS9940, CKOF, CKON, LREX and RSET are not supported. IDLE, on the other hand, is - supported, and the CPU can be configured to output its IDLE state on the P16 I/O pin. -*/ -#define EXTERNAL_INSTRUCTION_DECODING (TMS99XX_MODEL != TI990_10_ID) && (TMS99XX_MODEL != TI9940_ID) && (TMS99XX_MODEL != TI9985_ID) -#define EXTERNAL_INSTRUCTION_CALLBACK (TMS99XX_MODEL == TI990_10_ID) - -/* - ti990/10, ti990/12 and tms99000 support privileges - - privileged instructions: - CKOF, CKON, IDLE, LIMI, LREX, RSET, - LDD, LDS, LMF, (memory mapping instructions) - DINT, EINT, EMD , LCS, LIM, SLSP. (990/12 instructions) - - instructions which are privileged when the effective CRU address is higher than 0xE00: - LDCR, SBO, SBZ, STCR, TB. - - instructions whose behaviour is modified in user mode (only user flags in ST are affected): - RTWP, - LST. (ti990/12 and tms99000 instruction) -*/ -#define HAS_PRIVILEGE ((TMS99XX_MODEL == TI990_10_ID) || IS_99000) - -/* - opcode groups - - * 69 basic opcodes implemented on all family members - * 3 memory mapping opcodes implemented on ti990/10 with mapping option, ti990/12, and - the tim99610 mapper in conjunction with any tms99000 family member: LMF, LDS, LDD - * 3 opcodes implemented on tms9940 (and probably tms9985) only: DCA, DCS, LIIM - * 4 opcodes implemented on ti990/12, tms9989 and above: MPYS, DIVS, LST, LWP - * 1 opcode implemented on ti990/12, and tms99000: BIND - * 72 opcodes implemented on ti990/12 only (some of which are emulated by tms99105 & tms99110) -*/ - -#define HAS_MAPPING ((TMS99XX_MODEL == TI990_10_ID) /*|| IS_99000*/) -#define HAS_9995_OPCODES ((TMS99XX_MODEL == TMS9989_ID) || (TMS99XX_MODEL == TMS9995_ID) || IS_99000) -#define HAS_BIND_OPCODE IS_99000 - -#define HAS_OVERFLOW_INTERRUPT ((TMS99XX_MODEL == TMS9995_ID) || IS_99000) - -/* - Under tms9900, opcodes >0200->03FF are incompletely decoded: bits 11 is ignored, and so are - bits 12-15 for instructions which do not require a register. On the other hand, ti990/10 - generates an illegal instruction error when bit 11 is set, but still ignores bits 12-15. - Additionally, ti990/12 and tms9995 will generate an illegal error when bits 12-15 are - non-zero. -*/ -#define BETTER_0200_DECODING (TMS99XX_MODEL == TI990_10_ID) -#define COMPLETE_0200_DECODING (TMS99XX_MODEL >= TMS9995_ID) - -/* - TI990/10 and tms9900 force unused bits in the ST register to 0. - TMS9995 does not. -*/ -#define USE_ST_MASK (TMS99XX_MODEL <= TMS9985_ID) - -/* - TI990/10, TMS9900 and TMS99000 have a 16-bit-wide memory bus, and use 16-bus accessors. - TMS9940 use 16-bit accessors, too, as it has an internal 16-bit bus, and no external bus. -*/ -#define USE_16_BIT_ACCESSORS ((TMS99XX_MODEL == TI990_10_ID) || (TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9940_ID) || (IS_99000)) - -struct tms99xx_state; - -static inline void execute(tms99xx_state *cpustate, uint16_t opcode); - -#if EXTERNAL_INSTRUCTION_DECODING -static void external_instruction_notify(tms99xx_state *cpustate, int ext_op_ID); -#endif -static uint16_t decipheraddr(tms99xx_state *cpustate, uint16_t opcode); -static uint16_t decipheraddrbyte(tms99xx_state *cpustate, uint16_t opcode); -static void contextswitch(tms99xx_state *cpustate, uint16_t addr); -#if HAS_MAPPING || HAS_PRIVILEGE -static void contextswitchX(tms99xx_state *cpustate, uint16_t addr); -#else -#define contextswitchX(cs, addr) contextswitch(cs, addr) -#endif -static void field_interrupt(tms99xx_state *cpustate); - -/***************************/ -/* Mame Interface Routines */ -/***************************/ - - -/* tms9900 ST register bits. */ - -/* These bits are set by every compare, move and arithmetic or logical operation : */ -/* (Well, COC, CZC and TB only set the E bit, but these are kind of exceptions.) */ -#define ST_LGT 0x8000 /* Logical Greater Than (strictly) */ -#define ST_AGT 0x4000 /* Arithmetical Greater Than (strictly) */ -#define ST_EQ 0x2000 /* Equal */ - -/* These bits are set by arithmetic operations, when it makes sense to update them. */ -#define ST_C 0x1000 /* Carry */ -#define ST_OV 0x0800 /* OVerflow (overflow with operations on signed integers, */ - /* and when the result of a 32bits:16bits division cannot fit in a 16-bit word.) */ - -/* This bit is set by move and arithmetic operations WHEN THEY USE BYTE OPERANDS. */ -#define ST_OP 0x0400 /* Odd Parity */ - -#if (TMS99XX_MODEL != TMS9940_ID) - -/* This bit is set by the XOP instruction. */ -#define ST_X 0x0200 /* Xop */ - -#endif - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - -/* This bit is set by arithmetic operations to support BCD */ -#define ST_DC 0x0100 /* Digit Carry */ - -#endif - -#if HAS_PRIVILEGE - -/* This bit is set in user (i.e. non-supervisor) mode */ -#define ST_PR 0x0100 /* PRivilege */ - -#endif - -#if HAS_MAPPING - -/* This tells which map is currently in use */ -#define ST_MF 0x0080 /* Map File */ - -#endif - -#if (HAS_OVERFLOW_INTERRUPT) - -/* This bit is set in ti990/12, TMS9995 and later chips to generate a level-2 interrupt when -the Overflow status bit is set */ -#define ST_OVIE 0x0020 /* OVerflow Interrupt Enable */ - -#endif - -#if (IS_99000) - -/* This bit enables the macrostore feature on tms99000 */ -/* (It is used on ti990/12 with a different meaning.) */ -#define ST_EMR 0x0010 /* Enable Macrostore Rom */ - -#endif - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - -#define ST_IM 0x0003 /* Interrupt Mask */ - -#else - -#define ST_IM 0x000F /* Interrupt Mask */ - -#endif - -/* On models before TMS9995 (TMS9989 ?), unused ST bits are always forced to 0, so we define -a ST_MASK */ -#if (USE_ST_MASK) - #if (TMS99XX_MODEL == TI990_10_ID) - #define ST_MASK 0xFF8F - #elif (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) -#define ST_MASK 0xFD03 - #else - #define ST_MASK 0xFE0F - #endif -#endif - - -/* error interrupt register bits */ - -#if (TMS99XX_MODEL == TI990_10_ID) - -/* This bit is set in user (i.e. non-supervisor) mode */ -#define EIR_MAPERR 0x0800 /* memory MAPping ERRor */ -#define EIR_MER 0x1000 /* Memory parity ERRor */ -#define EIR_ILLOP 0x2000 /* ILLegal OPcode */ -#define EIR_PRIVOP 0x4000 /* PRiviledged OPeration */ -#define EIR_TIMEOUT 0x8000 /* TILINE TIMEOUT */ - -#endif - - -/* Offsets for registers. */ -#define R0 0 -#define R1 2 -#define R2 4 -#define R3 6 -#define R4 8 -#define R5 10 -#define R6 12 -#define R7 14 -#define R8 16 -#define R9 18 -#define R10 20 -#define R11 22 -#define R12 24 -#define R13 26 -#define R14 28 -#define R15 30 - -struct map_file_t -{ - uint16_t L[3], B[3]; /* actual registers */ - uint32_t limit[3], bias[3]; /* equivalent in a more convenient form */ -}; - -struct tms99xx_state -{ -/* "actual" tms9900 registers : */ - uint16_t WP; /* Workspace pointer */ - uint16_t PC; /* Program counter */ - uint16_t STATUS; /* STatus register */ - -/* Now, data used for emulation */ - uint8_t lastparity; - char lds_flag, ldd_flag; - uint16_t IR; /* Instruction register, with the currently parsed opcode */ - - uint8_t interrupt_pending; /* true if an interrupt must be honored... */ - -#if ! ((TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)) - uint8_t load_state; /* nonzero if the LOAD* line is active (low) */ -#endif - -#if (TMS99XX_MODEL == TI990_10_ID) || (TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9980_ID) - /* On tms9900, we cache the state of INTREQ* and IC0-IC3 here */ - /* On tms9980/9981, we translate the state of IC0-IC2 to the equivalent state for a tms9900, - and store the result here */ - uint8_t irq_level; /* when INTREQ* is active, interrupt level on IC0-IC3 ; else always 16 */ - uint8_t irq_state; /* nonzero if the INTREQ* line is active (low) */ - /* with TMS9940, bit 0 means INT1, bit 1 decrementer, bit 2 INT2 */ -#elif (TMS99XX_MODEL == TMS9995_ID) - /* tms9995 is quite different : it latches the interrupt inputs */ - uint8_t irq_level; /* We store the level of the request with the highest level here */ - uint8_t int_state; /* interrupt lines state */ - uint8_t int_latch; /* interrupt latches state */ -#endif - - /* interrupt callback */ - /* note that this callback is used by tms9900_set_irq_line(cpustate) and tms9980a_set_irq_line(cpustate) to - retreive the value on IC0-IC3 (non-standard behaviour) */ - device_irq_acknowledge_delegate irq_callback; - legacy_cpu_device *device; - address_space *program; - address_space *io; - int icount; - - uint8_t IDLE; /* nonzero if processor is IDLE - i.e waiting for interrupt while writing - special data on CRU bus */ - -#if HAS_MAPPING - uint8_t mapping_on; /* set by a CRU write */ - map_file_t map_files[3]; /* internal mapper registers */ - uint8_t cur_map; /* equivalent to ST_MF status bit */ - uint8_t cur_src_map; /* set to 2 by LDS */ - uint8_t cur_dst_map; /* set to 2 by LDD */ - -#if (TMS99XX_MODEL == TI990_10_ID) - uint8_t reset_maperr; /* reset mapper error flag line (reset flags in 945417-9701 p. 3-90) */ - - uint32_t mapper_address_latch; /* used to load the map file and for diagnostic purpose */ - uint16_t mapper_cru_read_register; /* read register select code for mapper cru interface */ - uint8_t diaglat; /* set when diagnostic address latch is done */ - uint8_t latch_control[3]; /* latch control */ - -#endif -#endif - -#if (TMS99XX_MODEL == TI990_10_ID) - uint16_t error_interrupt_register; /* one flag for each interrupt condition */ - ti99xx_error_interrupt_func error_interrupt_callback; -#endif - -#if (TMS99XX_MODEL == TMS9985_ID) || (TMS99XX_MODEL == TMS9995_ID) - uint8_t RAM[256]; /* on-chip RAM (I know this is weird, but the internal bus is 16-bit-wide, whereas the external bus is 8-bit-wide) */ -#endif - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) || (TMS99XX_MODEL == TMS9995_ID) - /* on-chip event counter/timer*/ - uint8_t decrementer_enabled; - uint16_t decrementer_interval; - uint16_t decrementer_count; /* used in event counter mode*/ - emu_timer *timer; /* used in timer mode */ -#endif - -#if (TMS99XX_MODEL == TMS9995_ID) - /* additionnal registers */ - uint16_t flag; /* flag register */ - uint8_t MID_flag; /* MID flag register */ - - /* chip config, which can be set on reset */ - uint8_t memory_wait_states_byte; - uint8_t memory_wait_states_word; - - /* mask option (off on normal tms9995) */ - uint8_t is_mp9537; -#endif - - /* Some instructions (i.e. XOP, BLWP, and MID) disable interrupt recognition until another - instruction is executed : so they set this flag */ - uint8_t disable_interrupt_recognition; - - /* notify the driver of changes in IDLE state */ - ti99xx_idle_func idle_callback; - -#if EXTERNAL_INSTRUCTION_CALLBACK - ti99xx_rset_func rset_callback; - ti99xx_lrex_func lrex_callback; - ti99xx_ckon_ckof_func ckon_ckof_callback; -#endif - - int write_inhibit; - int extra_byte; /* buffer holding the unused byte in a word read */ -}; - -static inline tms99xx_state *get_safe_token(device_t *device) -{ - assert(device != nullptr); -// assert(device->type() == TMS99XX_GET_INFO); - return (tms99xx_state *)downcast<legacy_cpu_device *>(device)->token(); -} - -#if (TMS99XX_MODEL == TMS9995_ID) -static void reset_decrementer(tms99xx_state *cpustate); -#endif - - -#if (TMS99XX_MODEL == TI990_10_ID) - -/* - accessor for the internal ROM -*/ -READ16_HANDLER(ti990_10_internal_r) -{ - //return cpustate->ROM[offset]; - return space.read_word(0x1ffc00+offset); -} - -#endif - -#if (TMS99XX_MODEL == TMS9995_ID) - -/* - accessor for the first 252 bytes of internal RAM -*/ -READ8_HANDLER(tms9995_internal1_r) -{ - tms99xx_state *cpustate = get_safe_token(&space.device()); - return cpustate->RAM[offset]; -} - -WRITE8_HANDLER(tms9995_internal1_w) -{ - tms99xx_state *cpustate = get_safe_token(&space.device()); - cpustate->RAM[offset]=data; -} - -/* - accessor for the last 4 bytes of internal RAM -*/ -READ8_HANDLER(tms9995_internal2_r) -{ - tms99xx_state *cpustate = get_safe_token(&space.device()); - return cpustate->RAM[offset+0xfc]; -} - -WRITE8_HANDLER(tms9995_internal2_w) -{ - tms99xx_state *cpustate = get_safe_token(&space.device()); - cpustate->RAM[offset+0xfc]=data; -} - -#endif - -#if (TMS99XX_MODEL == TI990_10_ID) - - /* on-board ROMs are not emulated (we use a hack) */ - - #define readword(cs, addr) readwordX((cs), (addr), (cs)->cur_map) - static int readwordX(tms99xx_state *cpustate, int addr, int map_file) - { - if ((map_file == 0) && (addr >= 0xf800)) - { /* intercept TPCS and CPU ROM */ - if (addr < 0xfc00) - /* TPCS */ - return cpustate->program->read_word(0x1f0000+addr); - else - /* CPU ROM */ - return cpustate->program->read_word(0x1f0000+addr); /* hack... */ - } - else if (! cpustate->mapping_on) - { - return cpustate->program->read_word(addr); - } - else - { - int map_index; - - if (addr <= cpustate->map_files[map_file].limit[0]) - map_index = 0; - else if (addr <= cpustate->map_files[map_file].limit[1]) - map_index = 1; - else if (addr <= cpustate->map_files[map_file].limit[2]) - map_index = 2; - else - { /* mapping error */ - if ((! (cpustate->error_interrupt_register & EIR_MAPERR)) && ! (cpustate->diaglat)) - cpustate->mapper_address_latch = addr; - if ((! cpustate->reset_maperr) && ! (cpustate->error_interrupt_register & EIR_MAPERR)) - { - cpustate->error_interrupt_register |= EIR_MAPERR; - cpustate->write_inhibit = 1; - } - return cpustate->program->read_word(addr); - } - if ((! (cpustate->error_interrupt_register & EIR_MAPERR)) && ! (cpustate->diaglat)) - cpustate->mapper_address_latch = cpustate->map_files[map_file].bias[map_index]+addr; - if ((cpustate->latch_control[map_index]) && (! cpustate->reset_maperr)) - cpustate->diaglat = 1; - return cpustate->program->read_word(cpustate->map_files[map_file].bias[map_index]+addr); - } - } - - #define writeword(cs, addr, data) writewordX((cs), (addr), (data), (cs)->cur_map) - static void writewordX(tms99xx_state *cpustate, int addr, int data, int map_file) - { - if ((map_file == 0) && (addr >= 0xf800)) - { /* intercept TPCS and CPU ROM */ - if (addr < 0xfc00) - /* TPCS */ - cpustate->program->write_word(0x1f0000+addr, data); - else - /* CPU ROM */ - cpustate->program->write_word(0x1f0000+addr, data); /* hack... */ - } - else if (! cpustate->mapping_on) - { - cpustate->program->write_word(addr, data); - } - else - { - int map_index; - - if (addr <= cpustate->map_files[map_file].limit[0]) - map_index = 0; - else if (addr <= cpustate->map_files[map_file].limit[1]) - map_index = 1; - else if (addr <= cpustate->map_files[map_file].limit[2]) - map_index = 2; - else - { /* mapping error */ - if ((! (cpustate->error_interrupt_register & EIR_MAPERR)) && ! (cpustate->diaglat)) - cpustate->mapper_address_latch = addr; - if ((! cpustate->reset_maperr) && ! (cpustate->error_interrupt_register & EIR_MAPERR)) - { - cpustate->error_interrupt_register |= EIR_MAPERR; - cpustate->write_inhibit = 1; - } - if (cpustate->write_inhibit) - (void)cpustate->program->read_word(addr); - else - cpustate->program->write_word(addr, data); - return; - } - if ((! (cpustate->error_interrupt_register & EIR_MAPERR)) && ! (cpustate->diaglat)) - cpustate->mapper_address_latch = cpustate->map_files[map_file].bias[map_index]+addr; - if ((cpustate->latch_control[map_index]) && (! cpustate->reset_maperr)) - cpustate->diaglat = 1; - cpustate->program->write_word(cpustate->map_files[map_file].bias[map_index]+addr, data); - } - } - - #define readbyte(cs, addr) readbyteX((cs), (addr), (cs)->cur_map) - static int readbyteX(tms99xx_state *cpustate, int addr, int map_file) - { - if ((map_file == 0) && (addr >= 0xf800)) - { /* intercept TPCS and CPU ROM */ - if (addr < 0xfc00) - /* TPCS */ - return cpustate->program->read_byte(0x1f0000+addr); - else - /* CPU ROM */ - return cpustate->program->read_byte(0x1f0000+addr); /* hack... */ - } - else if (! cpustate->mapping_on) - { - return cpustate->program->read_byte(addr); - } - else - { - int map_index; - - if (addr <= cpustate->map_files[map_file].limit[0]) - map_index = 0; - else if (addr <= cpustate->map_files[map_file].limit[1]) - map_index = 1; - else if (addr <= cpustate->map_files[map_file].limit[2]) - map_index = 2; - else - { /* mapping error */ - if ((! (cpustate->error_interrupt_register & EIR_MAPERR)) && ! (cpustate->diaglat)) - cpustate->mapper_address_latch = addr; - if ((! cpustate->reset_maperr) && ! (cpustate->error_interrupt_register & EIR_MAPERR)) - { - cpustate->error_interrupt_register |= EIR_MAPERR; - cpustate->write_inhibit = 1; - } - return cpustate->program->read_byte(addr); - } - if ((! (cpustate->error_interrupt_register & EIR_MAPERR)) && ! (cpustate->diaglat)) - cpustate->mapper_address_latch = cpustate->map_files[map_file].bias[map_index]+addr; - if ((cpustate->latch_control[map_index]) && (! cpustate->reset_maperr)) - cpustate->diaglat = 1; - return cpustate->program->read_byte(cpustate->map_files[map_file].bias[map_index]+addr); - } - } - - #define writebyte(cs, addr, data) writebyteX((cs), (addr), (data), (cs)->cur_map) - static void writebyteX(tms99xx_state *cpustate, int addr, int data, int map_file) - { - if ((map_file == 0) && (addr >= 0xf800)) - { /* intercept TPCS and CPU ROM */ - if (addr < 0xfc00) - /* TPCS */ - cpustate->program->write_byte(0x1f0000+addr, data); - else - /* CPU ROM */ - cpustate->program->write_byte(0x1f0000+addr, data); /* hack... */ - } - else if (! cpustate->mapping_on) - { - cpustate->program->write_byte(addr, data); - } - else - { - int map_index; - - if (addr <= cpustate->map_files[map_file].limit[0]) - map_index = 0; - else if (addr <= cpustate->map_files[map_file].limit[1]) - map_index = 1; - else if (addr <= cpustate->map_files[map_file].limit[2]) - map_index = 2; - else - { /* mapping error */ - if ((! (cpustate->error_interrupt_register & EIR_MAPERR)) && ! (cpustate->diaglat)) - cpustate->mapper_address_latch = addr; - if ((! cpustate->reset_maperr) && ! (cpustate->error_interrupt_register & EIR_MAPERR)) - { - cpustate->error_interrupt_register |= EIR_MAPERR; - cpustate->write_inhibit = 1; - } - if (cpustate->write_inhibit) - (void)cpustate->program->read_byte(addr); - else - cpustate->program->write_byte(addr, data); - return; - } - if ((! (cpustate->error_interrupt_register & EIR_MAPERR)) && ! (cpustate->diaglat)) - cpustate->mapper_address_latch = cpustate->map_files[map_file].bias[map_index]+addr; - if ((cpustate->latch_control[map_index]) && (! cpustate->reset_maperr)) - cpustate->diaglat = 1; - cpustate->program->write_byte(cpustate->map_files[map_file].bias[map_index]+addr, data); - } - } - -#elif (TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9940_ID) - /*16-bit data bus, 16-bit address bus (internal bus in the case of TMS9940)*/ - /*Note that tms9900 actually never accesses a single byte : when performing byte operations, - it reads a 16-bit word, changes the relevant byte, then write a complete word. You should - remember this when writing memory handlers.*/ - /*This does not apply to tms9995 and tms99xxx, but does apply to tms9980 (see below).*/ - - #define readword(cs, addr) (cs)->program->read_word(addr) - #define writeword(cs, addr,data) (cs)->program->write_word((addr), (data)) - - #define readbyte(cs, addr) (cs)->program->read_byte(addr) - #define writebyte(cs, addr,data) (cs)->program->write_byte((addr),(data)) - -#elif (TMS99XX_MODEL == TMS9980_ID) - /*8-bit data bus, 14-bit address*/ - /*Note that tms9980 never accesses a single byte (however crazy it may seem). Although this - makes memory access slower, I have emulated this feature, because if I did otherwise, - there would be some implementation problems in some driver sooner or later.*/ - - static inline int readword(tms99xx_state *cpustate, int addr) - { - int val; - - cpustate->icount -= 2; - val = cpustate->program->read_byte(addr); - return (val << 8) | cpustate->program->read_byte(addr+1); - } - #define writeword(cs, addr,data) { (cs)->icount -= 2; (cs)->program->write_byte((addr), (data) >> 8); cpustate->program->write_byte((addr) + 1, (data) & 0xff); } - -#if 0 - #define readbyte(cs, addr) ((cs)->icount -= 2, (cs)->program->read_byte(addr)) - #define writebyte(cs, addr,data) { (cs)->icount -= 2; (cs)->program->write_byte((addr),(data)); } -#else - /*This is how it really works*/ - /*Note that every writebyte must match a readbyte (which is indeed the case)*/ - - static int readbyte(tms99xx_state *cpustate, int addr) - { - cpustate->icount -= 2; - if (addr & 1) - { - cpustate->extra_byte = cpustate->program->read_byte(addr-1); - return cpustate->program->read_byte(addr); - } - else - { - int val = cpustate->program->read_byte(addr); - cpustate->extra_byte = cpustate->program->read_byte(addr+1); - return val; - } - } - static void writebyte (tms99xx_state *cpustate, int addr, int data) - { - cpustate->icount -= 2; - if (addr & 1) - { - cpustate->program->write_byte(addr-1, cpustate->extra_byte); - cpustate->program->write_byte(addr, data); - } - else - { - cpustate->program->write_byte(addr, data); - cpustate->program->write_byte(addr+1, cpustate->extra_byte); - } - } -#endif - -#elif (TMS99XX_MODEL == TMS9985_ID) - /*Note that every writebyte must match a readbyte (which is indeed the case)*/ - - static int readword(tms99xx_state *cpustate, int addr) - { - if (addr < 0x2000) - { - } - else if ((addr >= 0x8300) && (addr < 0x8400)) - { - } - else - { - cpustate->icount -= 2; - return (cpustate->program->read_byte(addr) << 8) + cpustate->program->read_byte(addr + 1); - } - } - static void writeword(tms99xx_state *cpustate, int addr, int data) - { - if ((addr >= 0x8300) && (addr < 0x8400)) - { - } - else if (!(addr < 0x2000)) - { - cpustate->icount -= 2; - cpustate->program->write_byte(addr, data >> 8); - cpustate->program->write_byte(addr + 1, data & 0xff); - } - } - - static int readbyte(tms99xx_state *cpustate, int addr) - { - if (addr < 0x2000) - { - } - else if ((addr >= 0x8300) && (addr < 0x8400)) - { - } - else - { - cpustate->icount -= 2; - if (addr & 1) - { - cpustate->extra_byte = cpustate->program->read_byte(addr-1); - return cpustate->program->read_byte(addr); - } - else - { - int val = cpustate->program->read_byte(addr); - cpustate->extra_byte = cpustate->program->read_byte(addr+1); - return val; - } - } - } - static void writebyte(tms99xx_state *cpustate, int addr, int data) - { - if ((addr >= 0x8300) && (addr < 0x8400)) - { - } - else if (!(addr < 0x2000)) - { - cpustate->icount -= 2; - if (addr & 1) - { - cpustate->program->write_byte(addr-1, cpustate->extra_byte); - cpustate->program->write_byte(addr, data); - } - else - { - cpustate->program->write_byte(addr, data); - cpustate->program->write_byte(addr+1, cpustate->extra_byte); - } - } - } - -#elif (TMS99XX_MODEL == TMS9995_ID) - /*8-bit external data bus, with on-chip 16-bit RAM, and 16-bit address bus*/ - /*The code is complex, so we use functions rather than macros*/ - - static TIMER_CALLBACK( decrementer_callback ); - - static int readword(tms99xx_state *cpustate, int addr) - { - if ((addr < 0xf000) || (cpustate->is_mp9537)) - { - int reply; - cpustate->icount -= cpustate->memory_wait_states_word; - reply = cpustate->program->read_byte(addr); - return (reply << 8) | cpustate->program->read_byte(addr + 1); - } - else if (addr < 0xf0fc) - { - return *(uint16_t *)(& cpustate->RAM[addr - 0xf000]); - } - else if (addr < 0xfffa) - { - int reply; - cpustate->icount -= cpustate->memory_wait_states_word; - reply = cpustate->program->read_byte(addr); - return (reply << 8) | cpustate->program->read_byte(addr + 1); - } - else if (addr < 0xfffc) - { - /* read decrementer */ - if (cpustate->decrementer_enabled && !(cpustate->flag & 1)) - /* timer mode, timer enabled */ - return cpustate->device->attotime_to_cycles(cpustate->timer->remaining() / 16); - else - /* event counter mode or timer mode, timer disabled */ - return cpustate->decrementer_count; - } - else - { - return *(uint16_t *)(& cpustate->RAM[addr - 0xff00]); - } - } - - static void writeword (tms99xx_state *cpustate, int addr, int data) - { - if ((addr < 0xf000) || (cpustate->is_mp9537)) - { - cpustate->icount -= cpustate->memory_wait_states_word; - cpustate->program->write_byte(addr, data >> 8); - cpustate->program->write_byte(addr + 1, data & 0xff); - } - else if (addr < 0xf0fc) - { - *(uint16_t *)(& cpustate->RAM[addr - 0xf000]) = data; - } - else if (addr < 0xfffa) - { - cpustate->icount -= cpustate->memory_wait_states_word; - cpustate->program->write_byte(addr, data >> 8); - cpustate->program->write_byte(addr + 1, data & 0xff); - } - else if (addr < 0xfffc) - { - /* write decrementer */ - cpustate->decrementer_interval = data; - reset_decrementer(cpustate); - } - else - { - *(uint16_t *)(& cpustate->RAM[addr - 0xff00]) = data; - } - } - - static int readbyte(tms99xx_state *cpustate, int addr) - { - if ((addr < 0xf000) || (cpustate->is_mp9537)) - { - cpustate->icount -= cpustate->memory_wait_states_byte; - return cpustate->program->read_byte(addr); - } - else if (addr < 0xf0fc) - { - return cpustate->RAM[BYTE_XOR_BE(addr - 0xf000)]; - } - else if (addr < 0xfffa) - { - cpustate->icount -= cpustate->memory_wait_states_byte; - return cpustate->program->read_byte(addr); - } - else if (addr < 0xfffc) - { - /* read decrementer */ - int value; - - if (cpustate->decrementer_enabled && !(cpustate->flag & 1)) - /* timer mode, timer enabled */ - value = cpustate->device->attotime_to_cycles(cpustate->timer->remaining() / 16); - else - /* event counter mode or timer mode, timer disabled */ - value = cpustate->decrementer_count; - - if (addr & 1) - return (value & 0xFF); - else - return (value >> 8); - } - else - { - return cpustate->RAM[BYTE_XOR_BE(addr - 0xff00)]; - } - } - - static void writebyte (tms99xx_state *cpustate, int addr, int data) - { - if ((addr < 0xf000) || (cpustate->is_mp9537)) - { - cpustate->icount -= cpustate->memory_wait_states_byte; - cpustate->program->write_byte(addr, data); - } - else if (addr < 0xf0fc) - { - cpustate->RAM[BYTE_XOR_BE(addr - 0xf000)] = data; - } - else if (addr < 0xfffa) - { - cpustate->icount -= cpustate->memory_wait_states_byte; - cpustate->program->write_byte(addr, data); - } - else if (addr < 0xfffc) - { - /* write decrementer */ - /* Note that a byte write to tms9995 timer messes everything up. */ - cpustate->decrementer_interval = (data << 8) | data; - reset_decrementer(cpustate); - } - else - { - cpustate->RAM[BYTE_XOR_BE(addr - 0xff00)] = data; - } - } - -#else - - #error "memory access not implemented" - -#endif - -#if !HAS_MAPPING - #define readwordX(cs, addr, map_file) readword(cs, addr) - #define writewordX(cs, addr, data, map_file) writeword(cs, (addr), (data)) - #define readbyteX(cs, addr, map_file) readbyte(cs, addr) - #define writebyteX(cs, addr, data, map_file) writebyte(cs, (addr), (data)) -#endif - -#define READREG(reg) readword(cpustate, (cpustate->WP+(reg)) & 0xffff) -#define WRITEREG(reg, data) writeword(cpustate, (cpustate->WP+(reg)) & 0xffff, (data)) - -static inline uint16_t READREG_DEBUG(tms99xx_state *cpustate, int reg) -{ - int temp = cpustate->icount; - uint16_t result = READREG(reg); - cpustate->icount = temp; - return result; -} - -static inline void WRITEREG_DEBUG(tms99xx_state *cpustate, int reg, uint16_t data) -{ - int temp = cpustate->icount; - WRITEREG(reg, data); - cpustate->icount = temp; -} - -#if (TMS99XX_MODEL == TI990_10_ID) - READ8_HANDLER(ti990_10_mapper_cru_r) - { - tms99xx_state *cpustate = get_safe_token(&space.device()); - int reply = 0; - - switch(cpustate->mapper_cru_read_register) - { - case 0xb000: - reply = cpustate->map_files[cpustate->cur_map].B[0]; - break; - case 0xb001: - reply = cpustate->map_files[cpustate->cur_map].B[1]; - break; - case 0xb010: - reply = cpustate->map_files[cpustate->cur_map].B[2]; - break; - case 0xb011: - reply = cpustate->map_files[cpustate->cur_map].L[0]; - break; - case 0xb100: - reply = cpustate->map_files[cpustate->cur_map].L[1]; - break; - case 0xb101: - reply = cpustate->map_files[cpustate->cur_map].L[2]; - break; - case 0xb110: - reply = cpustate->mapper_address_latch; - break; - case 0xb111: - reply = cpustate->mapper_address_latch >> 16; - break; - } - - if (offset) - return (reply >> 8) & 0xff; - else - return reply & 0xff; - } - - WRITE8_HANDLER(ti990_10_mapper_cru_w) - { - tms99xx_state *cpustate = get_safe_token(&space.device()); - switch (offset) - { - case 0: - case 1: - case 2: - /* read register select */ - if (data) - cpustate->mapper_cru_read_register |= (1 << offset); - else - cpustate->mapper_cru_read_register &= ~ (1 << offset); - break; - case 3: - /* enable mapping */ - cpustate->mapping_on = data; - break; - case 4: - /* reset flags */ - cpustate->reset_maperr = data; - if (data) - { - cpustate->error_interrupt_register &= ~ EIR_MAPERR; - cpustate->diaglat = 0; - } - break; - case 5: - case 6: - case 7: - /* latch control */ - cpustate->latch_control[7-offset] = data; - break; - } - } - - static inline void handle_error_interrupt(tms99xx_state *cpustate) - { - if (cpustate->error_interrupt_callback) - (*cpustate->error_interrupt_callback)(cpustate->device, cpustate->error_interrupt_register ? 1 : 0); - } - - READ8_HANDLER(ti990_10_eir_cru_r) - { - tms99xx_state *cpustate = get_safe_token(&space.device()); - return (offset == 1) ? (cpustate->error_interrupt_register & 0xff) : 0; - } - - WRITE8_HANDLER(ti990_10_eir_cru_w) - { - tms99xx_state *cpustate = get_safe_token(&space.device()); - if (offset < 4) /* does not work for EIR_MAPERR */ - { - cpustate->error_interrupt_register &= ~ (1 << offset); - - handle_error_interrupt(cpustate); - } - } - - -#endif - -/* Interrupt mask */ -#define IMASK (cpustate->STATUS & ST_IM) - -/* - CYCLES macro : you provide timings for tms9900 and tms9995, and the macro chooses for you. - - BTW, I have no idea what the timings are for tms9989 and tms99xxx... -*/ -#if TMS99XX_MODEL == TI990_10_ID - /* Use TI990/10 timings*/ - #define CYCLES(a,b,c) cpustate->icount -= a -#elif TMS99XX_MODEL <= TMS9985_ID - /* Use TMS9900/TMS9980 timings*/ - #define CYCLES(a,b,c) cpustate->icount -= b -#else - /* Use TMS9995 timings*/ - #define CYCLES(a,b,c) cpustate->icount -= c*4 -#endif - -#if (TMS99XX_MODEL == TMS9995_ID) - -static void set_flag0(tms99xx_state *cpustate, int val); -static void set_flag1(tms99xx_state *cpustate, int val); - -#endif - -/************************************************************************ - * Status register functions - ************************************************************************/ - -/* - remember that the OP ST bit is maintained in cpustate->lastparity -*/ - -/* - setstat sets the ST_OP bit according to cpustate->lastparity - - It must be called before reading the ST register. -*/ - -static void setstat(tms99xx_state *cpustate) -{ - int i; - uint8_t a; - - cpustate->STATUS &= ~ ST_OP; - - /* We set the parity bit. */ - a = cpustate->lastparity; - - for (i=0; i<8; i++) /* 8 bits to test */ - { - if (a & 1) /* If current bit is set */ - cpustate->STATUS ^= ST_OP; /* we toggle the ST_OP bit */ - - a >>= 1; /* Next bit. */ - } -} - -/* - getstat sets emulator's cpustate->lastparity variable according to 9900's STATUS bits. - It must be called on interrupt return, or when, for some reason, - the emulated program sets the STATUS register directly. -*/ -static void getstat(tms99xx_state *cpustate) -{ -#if (USE_ST_MASK) - cpustate->STATUS &= ST_MASK; /* unused bits are forced to 0 */ -#endif - - if (cpustate->STATUS & ST_OP) - cpustate->lastparity = 1; - else - cpustate->lastparity = 0; - -#if HAS_MAPPING - cpustate->cur_map = (cpustate->STATUS & ST_MF) ? 1 : 0; -#endif -} - -/* - A few words about the following functions. - - A big portability issue is the behavior of the ">>" instruction with the sign bit, which has - not been normalised. Every compiler does whatever it thinks smartest. - My code assumed that when shifting right signed numbers, the operand is left-filled with a - copy of sign bit, and that when shifting unsigned variables, it is left-filled with 0s. - This is probably the most logical behaviour, and it is the behavior of CW PRO3 - most time - (the exception is that ">>=" instructions always copy the sign bit (!)). But some compilers - are bound to disagree. - - So, I had to create special functions with predefined tables included, so that this code work - on every compiler. BUT this is a real slow-down. - So, you might have to include a few lines in assembly to make this work better. - Sorry about this, this problem is really unpleasant and absurd, but it is not my fault. -*/ - - -static const uint16_t right_shift_mask_table[17] = -{ - 0xFFFF, - 0x7FFF, - 0x3FFF, - 0x1FFF, - 0x0FFF, - 0x07FF, - 0x03FF, - 0x01FF, - 0x00FF, - 0x007F, - 0x003F, - 0x001F, - 0x000F, - 0x0007, - 0x0003, - 0x0001, - 0x0000 -}; - -static const uint16_t inverted_right_shift_mask_table[17] = -{ - 0x0000, - 0x8000, - 0xC000, - 0xE000, - 0xF000, - 0xF800, - 0xFC00, - 0xFE00, - 0xFF00, - 0xFF80, - 0xFFC0, - 0xFFE0, - 0xFFF0, - 0xFFF8, - 0xFFFC, - 0xFFFE, - 0xFFFF -}; - -static inline uint16_t logical_right_shift(uint16_t val, int c) -{ - return((val>>c) & right_shift_mask_table[c]); -} - -static inline int16_t arithmetic_right_shift(int16_t val, int c) -{ - if (val < 0) - return((val>>c) | inverted_right_shift_mask_table[c]); - else - return((val>>c) & right_shift_mask_table[c]); -} - - - - - -/* - Set lae -*/ -static inline void setst_lae(tms99xx_state *cpustate, int16_t val) -{ - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ); - - if (val > 0) - cpustate->STATUS |= (ST_LGT | ST_AGT); - else if (val < 0) - cpustate->STATUS |= ST_LGT; - else - cpustate->STATUS |= ST_EQ; -} - - -/* - Set laep (BYTE) -*/ -static inline void setst_byte_laep(tms99xx_state *cpustate, int8_t val) -{ - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ); - - if (val > 0) - cpustate->STATUS |= (ST_LGT | ST_AGT); - else if (val < 0) - cpustate->STATUS |= ST_LGT; - else - cpustate->STATUS |= ST_EQ; - - cpustate->lastparity = val; -} - -/* - For COC, CZC, and TB -*/ -static inline void setst_e(tms99xx_state *cpustate, uint16_t val, uint16_t to) -{ - if (val == to) - cpustate->STATUS |= ST_EQ; - else - cpustate->STATUS &= ~ ST_EQ; -} - -/* - For CI, C, CB -*/ -static inline void setst_c_lae(tms99xx_state *cpustate, uint16_t to, uint16_t val) -{ - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ); - - if (val == to) - cpustate->STATUS |= ST_EQ; - else - { - if ( ((int16_t) val) > ((int16_t) to) ) - cpustate->STATUS |= ST_AGT; - if ( ((uint16_t) val) > ((uint16_t) to) ) - cpustate->STATUS |= ST_LGT; - } -} - -/* - Set laeco for add -*/ -static inline int16_t setst_add_laeco(tms99xx_state *cpustate, int a, int b) -{ - uint32_t res; - int16_t res2; - - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV); - - res = (a & 0xffff) + (b & 0xffff); - - if (res & 0x10000) - cpustate->STATUS |= ST_C; - - if ((res ^ b) & (res ^ a) & 0x8000) - cpustate->STATUS |= ST_OV; - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - if (((a & b) | ((a | b) & ~ res)) & 0x0800) - cpustate->STATUS |= ST_DC; -#endif - - res2 = (int16_t) res; - - if (res2 > 0) - cpustate->STATUS |= ST_LGT | ST_AGT; - else if (res2 < 0) - cpustate->STATUS |= ST_LGT; - else - cpustate->STATUS |= ST_EQ; - - return res2; -} - - -/* - Set laeco for subtract -*/ -static inline int16_t setst_sub_laeco(tms99xx_state *cpustate, int a, int b) -{ - uint32_t res; - int16_t res2; - - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV); - - res = (a & 0xffff) - (b & 0xffff); - - if (! (res & 0x10000)) - cpustate->STATUS |= ST_C; - - if ((a ^ b) & (a ^ res) & 0x8000) - cpustate->STATUS |= ST_OV; - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - if (((a & ~ b) | ((a | ~ b) & ~ res)) & 0x0800) - cpustate->STATUS |= ST_DC; -#endif - - res2 = (int16_t) res; - - if (res2 > 0) - cpustate->STATUS |= ST_LGT | ST_AGT; - else if (res2 < 0) - cpustate->STATUS |= ST_LGT; - else - cpustate->STATUS |= ST_EQ; - - return res2; -} - - -/* - Set laecop for add (BYTE) -*/ -static inline int8_t setst_addbyte_laecop(tms99xx_state *cpustate, int a, int b) -{ - unsigned int res; - int8_t res2; - - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV | ST_OP); - - res = (a & 0xff) + (b & 0xff); - - if (res & 0x100) - cpustate->STATUS |= ST_C; - - if ((res ^ b) & (res ^ a) & 0x80) - cpustate->STATUS |= ST_OV; - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - if (((a & b) | ((a | b) & ~ res)) & 0x08) - cpustate->STATUS |= ST_DC; -#endif - - res2 = (int8_t) res; - - if (res2 > 0) - cpustate->STATUS |= ST_LGT | ST_AGT; - else if (res2 < 0) - cpustate->STATUS |= ST_LGT; - else - cpustate->STATUS |= ST_EQ; - - cpustate->lastparity = res2; - - return res2; -} - - -/* - Set laecop for subtract (BYTE) -*/ -static inline int8_t setst_subbyte_laecop(tms99xx_state *cpustate, int a, int b) -{ - unsigned int res; - int8_t res2; - - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV | ST_OP); - - res = (a & 0xff) - (b & 0xff); - - if (! (res & 0x100)) - cpustate->STATUS |= ST_C; - - if ((a ^ b) & (a ^ res) & 0x80) - cpustate->STATUS |= ST_OV; - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - if (((a & ~ b) | ((a | ~ b) & ~ res)) & 0x08) - cpustate->STATUS |= ST_DC; -#endif - - res2 = (int8_t) res; - - if (res2 > 0) - cpustate->STATUS |= ST_LGT | ST_AGT; - else if (res2 < 0) - cpustate->STATUS |= ST_LGT; - else - cpustate->STATUS |= ST_EQ; - - cpustate->lastparity = res2; - - return res2; -} - - - -/* - For NEG -*/ -static inline void setst_laeo(tms99xx_state *cpustate, int16_t val) -{ - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_OV); - - if (val > 0) - cpustate->STATUS |= ST_LGT | ST_AGT; - else if (val < 0) - { - cpustate->STATUS |= ST_LGT; - if (((uint16_t) val) == 0x8000) - cpustate->STATUS |= ST_OV; - } - else - cpustate->STATUS |= ST_EQ; -} - - - -/* - Meat of SRA -*/ -static inline uint16_t setst_sra_laec(tms99xx_state *cpustate, int16_t a, uint16_t c) -{ - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C); - - if (c != 0) - { - a = arithmetic_right_shift(a, c-1); - if (a & 1) // The carry bit equals the last bit that is shifted out - cpustate->STATUS |= ST_C; - a = arithmetic_right_shift(a, 1); - } - - if (a > 0) - cpustate->STATUS |= ST_LGT | ST_AGT; - else if (a < 0) - cpustate->STATUS |= ST_LGT; - else - cpustate->STATUS |= ST_EQ; - - return a; -} - - -/* - Meat of SRL. Same algorithm as SRA, except that we fills in with 0s. -*/ -static inline uint16_t setst_srl_laec(tms99xx_state *cpustate, uint16_t a,uint16_t c) -{ - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C); - - if (c != 0) - { - a = logical_right_shift(a, c-1); - if (a & 1) - cpustate->STATUS |= ST_C; - a = logical_right_shift(a, 1); - } - - if (((int16_t) a) > 0) - cpustate->STATUS |= ST_LGT | ST_AGT; - else if (((int16_t) a) < 0) - cpustate->STATUS |= ST_LGT; - else - cpustate->STATUS |= ST_EQ; - - return a; -} - - -// -// Meat of SRC -// -static inline uint16_t setst_src_laec(tms99xx_state *cpustate, uint16_t a,uint16_t c) -{ - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C); - - if (c != 0) - { - a = logical_right_shift(a, c) | (a << (16-c)); - if (a & 0x8000) // The carry bit equals the last bit that is shifted out - cpustate->STATUS |= ST_C; - } - - if (((int16_t) a) > 0) - cpustate->STATUS |= ST_LGT | ST_AGT; - else if (((int16_t) a) < 0) - cpustate->STATUS |= ST_LGT; - else - cpustate->STATUS |= ST_EQ; - - return a; -} - - -// -// Meat of SLA -// -static inline uint16_t setst_sla_laeco(tms99xx_state *cpustate, uint16_t a, uint16_t c) -{ - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV); - - if (c != 0) - { - { - register uint16_t mask; - register uint16_t ousted_bits; - - mask = 0xFFFF << (16-c-1); - ousted_bits = a & mask; - - if (ousted_bits) // If ousted_bits is neither all 0s - if (ousted_bits ^ mask) // nor all 1s, - cpustate->STATUS |= ST_OV; // we set overflow - } - - a <<= c-1; - if (a & 0x8000) // The carry bit equals the last bit that is shifted out - cpustate->STATUS |= ST_C; - - a <<= 1; - } - - if (((int16_t) a) > 0) - cpustate->STATUS |= ST_LGT | ST_AGT; - else if (((int16_t) a) < 0) - cpustate->STATUS |= ST_LGT; - else - cpustate->STATUS |= ST_EQ; - - return a; -} - -/**************************************************************************/ - -static void register_for_save_state(device_t *device) -{ - tms99xx_state *cpustate = get_safe_token(device); - device->save_item(NAME(cpustate->WP)); - device->save_item(NAME(cpustate->PC)); - device->save_item(NAME(cpustate->STATUS)); - device->save_item(NAME(cpustate->interrupt_pending)); - -#if ! ((TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)) - device->save_item(NAME(cpustate->load_state)); -#endif - -#if (TMS99XX_MODEL == TI990_10_ID) || (TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9980_ID) - device->save_item(NAME(cpustate->irq_level)); - device->save_item(NAME(cpustate->irq_state)); -#elif (TMS99XX_MODEL == TMS9995_ID) - device->save_item(NAME(cpustate->irq_level)); - device->save_item(NAME(cpustate->int_state)); - device->save_item(NAME(cpustate->int_latch)); -#endif - - device->save_item(NAME(cpustate->IDLE)); - -#if HAS_MAPPING - device->save_item(NAME(cpustate->mapping_on)); - device->save_item(NAME(cpustate->map_files[0].L)); - device->save_item(NAME(cpustate->map_files[0].B)); - device->save_item(NAME(cpustate->map_files[0].limit)); - device->save_item(NAME(cpustate->map_files[0].bias)); - device->save_item(NAME(cpustate->map_files[1].L)); - device->save_item(NAME(cpustate->map_files[1].B)); - device->save_item(NAME(cpustate->map_files[1].limit)); - device->save_item(NAME(cpustate->map_files[1].bias)); - device->save_item(NAME(cpustate->map_files[2].L)); - device->save_item(NAME(cpustate->map_files[2].B)); - device->save_item(NAME(cpustate->map_files[2].limit)); - device->save_item(NAME(cpustate->map_files[2].bias)); - device->save_item(NAME(cpustate->cur_map)); - device->save_item(NAME(cpustate->cur_src_map)); - device->save_item(NAME(cpustate->cur_dst_map)); - -#if (TMS99XX_MODEL == TI990_10_ID) - device->save_item(NAME(cpustate->reset_maperr)); - device->save_item(NAME(cpustate->mapper_address_latch)); - device->save_item(NAME(cpustate->mapper_cru_read_register)); - device->save_item(NAME(cpustate->diaglat)); - device->save_item(NAME(cpustate->latch_control)); -#endif -#endif - -#if (TMS99XX_MODEL == TI990_10_ID) - device->save_item(NAME(cpustate->error_interrupt_register)); -#endif - -#if (TMS99XX_MODEL == TMS9985_ID) || (TMS99XX_MODEL == TMS9995_ID) - device->save_item(NAME(cpustate->RAM)); -#endif - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) || (TMS99XX_MODEL == TMS9995_ID) - device->save_item(NAME(cpustate->decrementer_enabled)); - device->save_item(NAME(cpustate->decrementer_interval)); - device->save_item(NAME(cpustate->decrementer_count)); -#endif - -#if (TMS99XX_MODEL == TMS9995_ID) - device->save_item(NAME(cpustate->flag)); - device->save_item(NAME(cpustate->MID_flag)); - device->save_item(NAME(cpustate->memory_wait_states_byte)); - device->save_item(NAME(cpustate->memory_wait_states_word)); - device->save_item(NAME(cpustate->is_mp9537)); -#endif - - device->save_item(NAME(cpustate->disable_interrupt_recognition)); -} - - -static CPU_INIT( tms99xx ) -{ - const TMS99XX_RESET_PARAM *param = (const TMS99XX_RESET_PARAM *) device->static_config(); - tms99xx_state *cpustate = get_safe_token(device); - - register_for_save_state(device); - - cpustate->irq_level = 16; - cpustate->irq_callback = irqcallback; - cpustate->device = device; - cpustate->program = &device->space(AS_PROGRAM); - cpustate->io = &device->space(AS_IO); - -#if (TMS99XX_MODEL == TMS9995_ID) - cpustate->timer = device->machine().scheduler().timer_alloc(FUNC(decrementer_callback), cpustate); -#endif - - cpustate->idle_callback = param ? param->idle_callback : nullptr; - #if (TMS99XX_MODEL == TI990_10_ID) - cpustate->rset_callback = param ? param->rset_callback : nullptr; - cpustate->lrex_callback = param ? param->lrex_callback : nullptr; - cpustate->ckon_ckof_callback = param ? param->ckon_ckof_callback : nullptr; - - cpustate->error_interrupt_callback = param ? param->error_interrupt_callback : nullptr; - #endif - -#if (TMS99XX_MODEL == TMS9995_ID) - /* we can ask at reset time that the CPU always generates one wait state automatically */ - if (param == nullptr) - { /* if no param, the default is currently "wait state added" */ - cpustate->memory_wait_states_byte = 4; - cpustate->memory_wait_states_word = 12; - cpustate->is_mp9537 = 0; - } - else - { - cpustate->memory_wait_states_byte = (param->auto_wait_state) ? 4 : 0; - cpustate->memory_wait_states_word = (param->auto_wait_state) ? 12 : 4; - cpustate->is_mp9537 = param->is_mp9537; - } -#endif - -} - -/* - TMS9900 hard reset -*/ -static CPU_RESET( tms99xx ) -{ - tms99xx_state *cpustate = get_safe_token(device); - - cpustate->STATUS = 0; /* TMS9980 and TMS9995 Data Books say so */ - getstat(cpustate); - - #if HAS_MAPPING - cpustate->mapping_on = 0; - { - int i,j; - - for (i=0; i<3; i++) - for (j=0; j<3; j++) - { - cpustate->map_files[i].L[j] = 0; - cpustate->map_files[i].limit[j] = 0xffff; - cpustate->map_files[i].B[j] = 0; - cpustate->map_files[i].bias[j] = 0; - } - } - cpustate->cur_map = 0; /* equivalent to ST_MF status bit */ - cpustate->cur_src_map = 0; /* set to 2 by LDS */ - cpustate->cur_dst_map = 0; /* set to 2 by LDD */ - - cpustate->reset_maperr = 0; - #endif - - if (cpustate->IDLE) - { - cpustate->IDLE = 0; /* clear IDLE condition */ - if (cpustate->idle_callback) - (*cpustate->idle_callback)(device, 0); - } - -#if (TMS99XX_MODEL == TMS9995_ID) - cpustate->MID_flag = 0; - - /* Clear flag bits 0 & 1 */ - set_flag0(cpustate, 0); - set_flag1(cpustate, 0); - - /* Clear internal interrupt latches */ - cpustate->int_latch = 0; - cpustate->flag &= 0xFFE3; -#endif - - /* The ST register and interrupt latches changed, didn't they ? */ - field_interrupt(cpustate); - - contextswitchX(cpustate, 0x0000); - - CYCLES(6, 26, 14); -} - -static CPU_EXIT( tms99xx ) -{ - /* nothing to do ? */ -} - -/* fetch : read one word at * PC, and increment PC. */ -static inline uint16_t fetch(tms99xx_state *cpustate) -{ - uint16_t value = readword(cpustate, cpustate->PC); - cpustate->PC += 2; - return value; -} - - -static CPU_EXECUTE( tms99xx ) -{ - tms99xx_state *cpustate = get_safe_token(device); - - cpustate->lds_flag = 0; - cpustate->ldd_flag = 0; - - do - { - /* all TMS9900 chips I know do not honor interrupts after XOP, BLWP or MID (after any - interrupt-like instruction, actually), and they do not either after LDS and LDD - (There are good reasons for this). */ - if ((cpustate->interrupt_pending) && (! cpustate->disable_interrupt_recognition)) - { - int level; - - level = cpustate->irq_level; - - - if (cpustate->load_state) - { /* LOAD has the highest priority */ - - contextswitchX(cpustate, 0xFFFC); /* load vector, save PC, WP and ST */ - - cpustate->STATUS &= ~ST_IM; /* clear interrupt mask */ - - /* clear IDLE status if necessary */ - if (cpustate->IDLE) - { - cpustate->IDLE = 0; /* clear IDLE condition */ - if (cpustate->idle_callback) - (*cpustate->idle_callback)(device, 0); - } - - CYCLES(6/*to be confirmed*/, 22, 14); - } - else if (level <= IMASK) - { /* a maskable interrupt is honored only if its level isn't greater than IMASK */ - - contextswitchX(cpustate, level*4); /* load vector, save PC, WP and ST */ - - /* change interrupt mask */ - if (level) - { - cpustate->STATUS = (cpustate->STATUS & ~ST_IM) | (level -1); /* decrement mask */ - cpustate->interrupt_pending = 0; /* as a consequence, the interrupt request will be subsequently ignored */ - } - else - cpustate->STATUS &= ~ST_IM; /* clear mask (is this correct???) */ - -#if (TMS99XX_MODEL == TMS9995_ID) - cpustate->STATUS &= 0xFE00; -#endif - - /* clear IDLE status if necessary */ - if (cpustate->IDLE) - { - cpustate->IDLE = 0; /* clear IDLE condition */ - if (cpustate->idle_callback) - (*cpustate->idle_callback)(device, 0); - } - -#if (TMS99XX_MODEL == TMS9995_ID) - /* Clear bit in latch */ - /* I think tms9989 does this, too */ - if (level != 2) - { /* Only do this on level 1, 3, 4 interrupts */ - int mask = 1 << level; - int flag_mask = (level == 1) ? 4 : mask; - - cpustate->int_latch &= ~ mask; - cpustate->flag &= ~ flag_mask; - - /* unlike tms9900, we can call the callback */ - if (level == 1) - (* cpustate->irq_callback)(cpustate->device, 0); - else if (level == 4) - (* cpustate->irq_callback)(cpustate->device, 1); - } -#endif - - CYCLES(6, 22, 14); - } - else - { - logerror("tms9900l.c : the interrupt_pending flag was set incorrectly\n"); - cpustate->interrupt_pending = 0; - } - } - - debugger_instruction_hook(device, cpustate->PC); - - if (cpustate->IDLE) - { /* IDLE instruction has halted execution */ - #if EXTERNAL_INSTRUCTION_DECODING - external_instruction_notify(cpustate, 2); - CYCLES(Moof!, 2, 2); /* 2 cycles per CRU write */ - #else - cpustate->icount = 0; /* much simpler... */ - #endif - } - else - { /* we execute an instruction */ - cpustate->disable_interrupt_recognition = 0; /* default value */ - cpustate->IR = fetch(cpustate); - execute(cpustate, cpustate->IR); - #if HAS_MAPPING - if (cpustate->lds_flag) - { - cpustate->lds_flag = 0; - cpustate->cur_src_map = 2 /*(cpustate->cur_src_map != 2) ? 2 : cpustate->cur_map*/; - } - else - cpustate->cur_src_map = cpustate->cur_map; - if (cpustate->ldd_flag) - { - cpustate->ldd_flag = 0; - cpustate->cur_dst_map = 2 /*(cpustate->cur_src_map != 2) ? 2 : cpustate->cur_map*/; - } - else - cpustate->cur_dst_map = cpustate->cur_map; - #if (TMS99XX_MODEL == TI990_10_ID) - cpustate->write_inhibit = 0; - #endif - #endif - - #if (HAS_OVERFLOW_INTERRUPT) - #if (TMS99XX_MODEL == TMS9995_ID) - /* Note that TI had some problem implementing this... I don't know if this feature works on - a real-world TMS9995. */ - if ((cpustate->STATUS & ST_OVIE) && (cpustate->STATUS & ST_OV) && (cpustate->irq_level > 2)) - cpustate->irq_level = 2; /* interrupt request */ - #else - #warning "todo..." - #endif - #endif - } - - } while (cpustate->icount > 0); -} - -#if (TMS99XX_MODEL == TI990_10_ID) - -static void tms99xx_set_irq_line(tms99xx_state *cpustate, int irqline, int state) -{ - if (irqline == INPUT_LINE_NMI) - { - cpustate->load_state = state; /* save new state */ - - field_interrupt(cpustate); /* interrupt status changed */ - } - else - { - /*if (cpustate->irq_state == state) - return;*/ - - cpustate->irq_state = state; - - if (state == CLEAR_LINE) - cpustate->irq_level = 16; - /* trick : 16 will always be bigger than the IM (0-15), so there will never be interrupts */ - else - cpustate->irq_level = (* cpustate->irq_callback)(cpustate->device, 0); - - field_interrupt(cpustate); /* interrupt state is likely to have changed */ - } -} - -#elif (TMS99XX_MODEL == TMS9900_ID) - -/* -void tms99xx_set_irq_line(cpustate, INPUT_LINE_NMI, int state) : change the state of the LOAD* line - - state == 0 -> LOAD* goes high (inactive) - state != 0 -> LOAD* goes low (active) - - While LOAD* is low, we keep triggering LOAD interrupts... - - A problem : some peripherals lower the LOAD* line for a fixed time interval (causing the 1st - instruction of the LOAD interrupt routine to be repeated while the line is low), and will be - perfectly happy with the current scheme, but others might be more clever and wait for the IAQ - (Instruction acquisition) line to go high, and this needs a callback function to emulate. -*/ - -/* -void tms99xx_set_irq_line(cpustate, int irqline, int state) : sets the state of the interrupt line. - - irqline is ignored, and should always be 0. - - state == 0 -> INTREQ* goes high (inactive) - state != 0 -> INTREQ* goes low (active) -*/ -/* - R Nabet 991020, revised 991218 : - In short : interrupt code should call "cpu_set_irq_line(0, 0, ASSERT_LINE);" to set an - interrupt request (level-triggered interrupts). Also, there MUST be a call to - "cpu_set_irq_line(0, 0, CLEAR_LINE);" in the machine code, when the interrupt line is released by - the hardware (generally in response to an action performed by the interrupt routines). - On tms9995 (9989 ?), you can use PULSE_LINE, too, since the processor latches the line... - - **Note** : HOLD_LINE *NEVER* makes sense on the TMS9900 (or 9980, 9995...). The reason is the - TMS9900 does NOT tell the world it acknoledges an interrupt, so no matter how much hardware you - use, you cannot know when the CPU takes the interrupt, hence you cannot release the line when - the CPU takes the interrupt. Generally, the interrupt condition is cleared by the interrupt - routine (with some CRU or memory access). - - Note that cpu_generate_interrupt uses HOLD_LINE, so your driver interrupt code - should always use the new style, i.e. return "ignore_interrupt(cpustate)" and call - "cpu_set_irq_line(0, 0, ASSERT_LINE);" explicitely. - - Last, many TMS9900-based hardware use a TMS9901 interrupt-handling chip. If anybody wants - to emulate some hardware which uses it, note that I am writing some emulation in the TI99/4(A) - driver in MESS, so you should ask me. -*/ -/* - * HJB 990430: changed to use irq_callback(cpustate) to retrieve the vector - * instead of using 16 irqlines. - * - * R Nabet 990830 : My mistake, I rewrote all these once again ; I think it is now correct. - * A driver using the TMS9900 should do : - * cpu_0_irq_line_vector_w(0, level); - * cpu_set_irq_line(0,0,ASSERT_LINE); - * - * R Nabet 991108 : revised once again, with advice from Juergen Buchmueller, after a discussion - * with Nicola... - * We use the callback to retreive the interrupt level as soon as INTREQ* is asserted. - * As a consequence, I do not support HOLD_LINE normally... However, we do not really have to - * support HOLD_LINE, since no real world TMS9900-based system can support this. - * FYI, there are two alternatives to retreiving the interrupt level with the callback : - * a) using 16 pseudo-IRQ lines. Mostly OK, though it would require a few core changes. - * However, this could cause some problems if someone tried to set two lines simulteanously... - * And TMS9900 did NOT have 16 lines ! This is why Juergen and I did not retain this solution. - * b) modifying the interrupt system in order to provide an extra int to every xxx_set_irq_line - * function. I think this solution would be fine, but it would require quite a number of - * changes in the MAME core. (And I did not feel the courage to check out 4000 drivers and 25 - * cpu cores ;-) .) - * - * Note that this does not apply to tms9995. -*/ -static void tms99xx_set_irq_line(tms99xx_state *cpustate, int irqline, int state) -{ - if (irqline == INPUT_LINE_NMI) - { - cpustate->load_state = state; /* save new state */ - - field_interrupt(cpustate); /* interrupt status changed */ - } - else - { - /*if (cpustate->irq_state == state) - return;*/ - - cpustate->irq_state = state; - - if (state == CLEAR_LINE) - cpustate->irq_level = 16; - /* trick : 16 will always be bigger than the IM (0-15), so there will never be interrupts */ - else - cpustate->irq_level = (* cpustate->irq_callback)(cpustate->device, 0); - - field_interrupt(cpustate); /* interrupt state is likely to have changed */ - } -} - -#elif (TMS99XX_MODEL == TMS9980_ID) -/* - interrupt system similar to tms9900, but only 3 interrupt pins (IC0-IC2) -*/ - -static void tms99xx_set_irq_line(tms99xx_state *cpustate, int irqline, int state) -{ - if (state == CLEAR_LINE) - { - cpustate->load_state = 0; - cpustate->irq_state = 0; - cpustate->irq_level = 16; - /* trick : 16 will always be bigger than the IM (0-15), so there will never be interrupts */ - } - else - { - int level; - - if (irqline == INPUT_LINE_NMI) - level = 2; /* translate MAME's convention to CPU's representation */ - else - level = (* cpustate->irq_callback)(cpustate->device, 0); - - switch (level) - { - case 0: - case 1: - cpustate->load_state = 0; - cpustate->irq_state = 0; - cpustate->irq_level = 16; - CPU_RESET_NAME(tms99xx)(cpustate->device); - break; - case 2: - cpustate->load_state = 1; - cpustate->irq_state = 0; - cpustate->irq_level = 16; - break; - case 7: - cpustate->load_state = 0; - cpustate->irq_state = 0; - cpustate->irq_level = 16; - break; - default: /* external levels 1, 2, 3, 4 */ - cpustate->load_state = 0; - cpustate->irq_state = 1; - cpustate->irq_level = level - 2; - break; - } - } - - field_interrupt(cpustate); /* interrupt state is likely to have changed */ -} - -#elif (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) -/* - 2 interrupt pins (int1 and int2) -*/ - -static void tms99xx_set_irq_line(tms99xx_state *cpustate, int irqline, int state) -{ - int mask; - - if (irqline == 0) - /* INT1 */ - mask = 1; - else if (irqline == 1) - /* INT2 */ - mask = 4; - else - /* What on earth??? */ - return; - - if (state) - cpustate->irq_state |= mask; - else - cpustate->irq_state &= ~mask; - - field_interrupt(cpustate); /* interrupt state is likely to have changed */ -} - -#elif (TMS99XX_MODEL == TMS9995_ID) -/* - this call-back is called by MESS timer system when the timer reaches 0. -*/ -static TIMER_CALLBACK( decrementer_callback ) -{ - tms99xx_state *cpustate = (tms99xx_state *)ptr; - - /* request decrementer interrupt */ - cpustate->int_latch |= 0x8; - cpustate->flag |= 0x8; - - field_interrupt(cpustate); -} - - -/* - reset and load the timer/decrementer - - Note that I don't know whether toggling flag0/flag1 causes the decrementer to be reloaded or not -*/ -static void reset_decrementer(tms99xx_state *cpustate) -{ - cpustate->timer->adjust(attotime::never); - - /* reload count */ - cpustate->decrementer_count = cpustate->decrementer_interval; - - /* decrementer / timer enabled ? */ - cpustate->decrementer_enabled = ((cpustate->flag & 2) && (cpustate->decrementer_interval)); - - if (cpustate->decrementer_enabled && ! (cpustate->flag & 1)) - { /* timer */ - attotime period = cpustate->device->cycles_to_attotime(cpustate->decrementer_interval * 16L); - cpustate->timer->adjust(period, 0, period); - } -} - -/* - You have two interrupt line : one triggers level-1 interrupts, the other triggers level-4 - interrupts (or decrements the decrementer register). - - According to the hardware, you may use PULSE_LINE (edge-triggered interrupts), or ASSERT_LINE - (level-triggered interrupts). Edge-triggered interrupts are way simpler, but if multiple devices - share the same line, they must use level-triggered interrupts. -*/ -static void tms99xx_set_irq_line(tms99xx_state *cpustate, int irqline, int state) -{ - if (irqline == INPUT_LINE_NMI) - { - cpustate->load_state = state; /* save new state */ - - field_interrupt(cpustate); /* interrupt status changed */ - } - else - { - int mask = (irqline == 0) ? 0x2 : 0x10; - int flag_mask = (irqline == 0) ? 0x4 : 0x10; - - if (((cpustate->int_state & mask) != 0) ^ (state != 0)) - { /* only if state changes */ - if (state) - { - cpustate->int_state |= mask; - - if ((irqline == 1) && (cpustate->flag & 1)) - { /* event counter mode : INT4* triggers no interrupt... */ - if (cpustate->decrementer_enabled) - { /* decrement, then interrupt if reach 0 */ - if ((-- cpustate->decrementer_count) == 0) - { - decrementer_callback(cpustate->device->machine(), cpustate, 0); - cpustate->decrementer_count = cpustate->decrementer_interval; /* reload */ - } - } - } - else - { /* plain interrupt mode */ - cpustate->int_latch |= mask; - cpustate->flag |= flag_mask; - } - } - else - { - cpustate->int_state &= ~ mask; - } - - field_interrupt(cpustate); /* interrupt status changed */ - } - } -} - -#else - -#error "interrupt system not implemented" - -#endif - -/* - * field_interrupt - * - * Determines whether if an interrupt is pending, and sets the relevant flag. - * - * Called when an interrupt pin (LOAD*, INTREQ*, IC0-IC3) is changed, and when the interrupt mask - * is modified. - * - * By using this flag, we save some compares in the execution loop. Subtle, isn't it ;-) ? - * - * R Nabet. - */ -#if (TMS99XX_MODEL == TI990_10_ID) || (TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9980_ID) - -static void field_interrupt(tms99xx_state *cpustate) -{ - cpustate->interrupt_pending = ((cpustate->irq_level <= IMASK) || (cpustate->load_state)); -} - -#elif (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - -static void field_interrupt(tms99xx_state *cpustate) -{ - if (cpustate->irq_state & 1) - cpustate->irq_level = 1; - else if (cpustate->irq_state & 2) - cpustate->irq_level = 2; - else if (cpustate->irq_state & 4) - cpustate->irq_level = 3; - else - cpustate->irq_level = 4; - /* trick : 4 will always be bigger than the IM (0-3), so there will never be interrupts */ - - cpustate->interrupt_pending = ((cpustate->irq_level <= IMASK) || (cpustate->load_state)); -} - -#elif (TMS99XX_MODEL == TMS9995_ID) - -static void field_interrupt(tms99xx_state *cpustate) -{ - if (cpustate->load_state) - { - cpustate->interrupt_pending = 1; - } - else - { - int current_int; - int level; - - if (cpustate->flag & 1) - /* event counter mode : ignore int4* line... */ - current_int = (cpustate->int_state & ~0x10) | cpustate->int_latch; - else - /* normal behavior */ - current_int = cpustate->int_state | cpustate->int_latch; - - if (current_int) - /* find first bit to 1 */ - /* possible values : 1, 3, 4 */ - for (level=0; ! (current_int & 1); current_int >>= 1, level++) - ; - else - level=16; - - cpustate->irq_level = level; - - cpustate->interrupt_pending = (level <= IMASK); - } -} - -#else - -#error "field_interrupt(cpustate) not written" - -#endif - -static CPU_DISASSEMBLE( tms99xx ) -{ - extern unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const uint8_t *oprom, const uint8_t *opram); - return Dasm9900(buffer, pc, TMS99XX_MODEL, oprom, opram); -} - - -/*****************************************************************************/ -/* - CRU support code - - The CRU bus is a 1-bit-wide I/O bus. The CPU can read or write bits at random address. - Special instructions are dedicated to reading and writing one or several consecutive bits. - - - - Note that TMS99000 additionally supports parallel CRU operations, although I don't know how - this feature is implemented. -*/ - -enum -{ -#if (TMS99XX_MODEL == TI990_10_ID) - /* 3 MSBs do exist, although they are not connected (don't ask...) */ - CRUAddrBit = 15 -#elif (TMS99XX_MODEL == TMS9900_ID) - /* 3 MSBs are always 0 to support external instructions */ - CRUAddrBit = 12 -#elif (TMS99XX_MODEL == TMS9980_ID) - /* 2 bits unused, and 2 MSBs are always 0 to support external instructions */ - CRUAddrBit = 11 -#elif (TMS99XX_MODEL == TMS9940_ID) - /* 9 internal address lines (8 external) */ - CRUAddrBit = 9 -#elif (TMS99XX_MODEL == TMS9995_ID) - /* no such problem here : data bus lines D0-D2 provide the external instruction code */ - CRUAddrBit = 15 -#else - #warning "I don't know how your processor handles CRU." - CRUAddrBit = 15 -#endif -}; - -enum -{ - rCRUAddrMask = (1 << (CRUAddrBit - 3)) - 1, - wCRUAddrMask = (1 << CRUAddrBit) - 1 -}; - - -#if (TMS99XX_MODEL == TMS9995_ID) - -/* set decrementer mode flag */ -static void set_flag0(tms99xx_state *cpustate, int val) -{ - if (val) - cpustate->flag |= 1; - else - cpustate->flag &= ~ 1; - - reset_decrementer(cpustate); -} - -/* set decrementer enable flag */ -static void set_flag1(tms99xx_state *cpustate, int val) -{ - if (val) - cpustate->flag |= 2; - else - cpustate->flag &= ~ 2; - - reset_decrementer(cpustate); -} - -#endif - -enum cru_error_code -{ - CRU_OK = 0, - CRU_PRIVILEGE_VIOLATION = -1 -}; - -#define WRITEPORT(cs, port, data) (cs)->io->write_byte(port, data) - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) -/* on tms9940, we have to handle internal CRU ports */ -static void write_single_CRU(tms99xx_state *cpustate, int port, int data) -{ - int mask; - - if (! (port & 0x100)) - { - /*if (cpustate->config & CB0)*/ - /* External CRU */ - WRITEPORT(cpustate, port, (data & 0x01)); - } - else - { - /* internal CRU */ - switch ((port >> 4) & 0xf) - { - case 0x8: - if (port == 0x181) - { - /* clear decrementer interrupt */ - cpustate->irq_state &= ~2; - } - if (port >= 0x183) && (port <= 0x186) - { - /* write configuration register */ - mask = 1 << (port - 0x183); - /* ... */ - } - break; - - case 0x9: - if (port <= 0x19D) - { - /* write decrementer latch */ - mask = 1 << (port - 0x190); - /* ... */ - } - else if (port == 0x19E) - { - /* set decrementer as timer (1) or event counter (0) */ - /* ... */ - } - break; - - case 0xA: - /* multiprocessor system interface */ - mask = 1 << (port - 0x1A0); - /* ... */ - break; - - case 0xB: - /* flags */ - mask = 1 << (port - 0x1B0); - /* ... */ - break; - - case 0xC: - case 0xD: - /* direction for P0-P31 */ - mask = 1 << (port - 0x1C0); - /* ... */ - break; - - case 0xE: - case 0xF: - /* data for P0-P31 */ - mask = 1 << (port - 0x1E0); - /* ... */ - break; - } - } -} -#elif (TMS99XX_MODEL == TMS9995_ID) -/* on tms9995, we have to handle internal CRU ports */ -static void write_single_CRU(tms99xx_state *cpustate, int port, int data) -{ - /* Internal CRU */ - switch (port) - { - case 0xF70: - set_flag0(cpustate, data & 0x01); - break; - case 0xF71: - set_flag1(cpustate, data & 0x01); - break; - case 0xF72: - case 0xF73: - case 0xF74: - break; /* ignored */ - case 0xF75: - case 0xF76: - case 0xF77: - case 0xF78: - case 0xF79: - case 0xF7A: - case 0xF7B: - case 0xF7C: - case 0xF7D: - case 0xF7E: - case 0xF7F: - { /* user defined flags */ - int mask = 1 << (port - 0xF70); - if (data & 0x01) - cpustate->flag |= mask; - else - cpustate->flag &= ~ mask; - } - break; - - case 0x0FED: - /* MID flag */ - cpustate->MID_flag = data & 0x01; - break; - } - /* External CRU */ - /* Even though all the registers above are implemented internally, accesses - are passed to the external bus, too, and an external device might respond - to a write to these CRU address as well (particularly a write to the user - flag registers). */ - WRITEPORT(cpustate, port, (data & 0x01)); -} -#else -#define write_single_CRU(cs, port, data) WRITEPORT(cs, port, data) -#endif - -/* - performs a normal write to CRU bus (used by SBZ, SBO, LDCR : address range 0 -> 0xFFF) -*/ -static cru_error_code writeCRU(tms99xx_state *cpustate, int CRUAddr, int Number, uint16_t Value) -{ - int count; - - /*logerror("PC %4.4x Write CRU %x for %x =%x\n",cpustate->PC,CRUAddr,Number,Value);*/ - - CRUAddr &= wCRUAddrMask; - - /* Write Number bits from CRUAddr */ - - for(count=0; count<Number; count++) - { - #if HAS_PRIVILEGE - if ((cpustate->STATUS & ST_PR) && (CRUAddr >= 0xE00)) - return CRU_PRIVILEGE_VIOLATION; - #endif - - write_single_CRU(cpustate, CRUAddr, (Value & 0x01)); - Value >>= 1; - CRUAddr = (CRUAddr + 1) & wCRUAddrMask; - } - - return CRU_OK; -} - -#if EXTERNAL_INSTRUCTION_DECODING -/* - Some opcodes perform a dummy write to a special CRU address, so that an external function may be - triggered. - - Only the first 3 MSBs of the address matter : other address bits and the written value itself - are undefined. - - How should we support this ? With callback functions ? Actually, as long as we do not support - hardware which makes use of this feature, it does not really matter :-) . -*/ -static void external_instruction_notify(tms99xx_state *cpustate, int ext_op_ID) -{ -#if 1 - /* I guess we can support this like normal CRU operations */ -#if (TMS99XX_MODEL == TMS9900_ID) - WRITEPORT(cpustate, ext_op_ID << 12, 0); /* or is it 1 ??? */ -#elif (TMS99XX_MODEL == TMS9980_ID) - WRITEPORT(cpustate, (ext_op_ID & 3) << 11, (ext_op_ID & 4) ? 1 : 0); -#elif (TMS99XX_MODEL == TMS9995_ID) - WRITEPORT(cpustate, ext_op_ID << 15, 0); /* or is it 1 ??? */ -#else - #warning "I don't know how your processor handles external opcodes (maybe you don't need them, though)." -#endif - -#else - switch (ext_op_ID) - { - case 2: /* IDLE */ - - break; - case 3: /* RSET */ - - break; - case 5: /* CKON */ - - break; - case 6: /* CKOF */ - - break; - case 7: /* LREX */ - - break; - case 0: - /* normal CRU write !!! */ - logerror("PC %4.4x : external_instruction_notify : wrong ext_op_ID",cpustate->PC); - break; - default: - /* unknown address */ - logerror("PC %4.4x : external_instruction_notify : unknown ext_op_ID",cpustate->PC); - break; - } -#endif -} -#endif - -/* - performs a normal read to CRU bus (used by TB, STCR : address range 0->0xFFF) - - Note that on some hardware, e.g. TI99/4(a), all normal memory operations cause unwanted CRU - read at the same address. This seems to be impossible to emulate efficiently, so, if you need - to emulate this, you're in trouble. -*/ -#define READPORT(cs, port) (cs)->io->read_byte(port) - - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) -/* on tms9940, we have to handle internal CRU ports */ -static int read_single_CRU(tms99xx_state *cpustate, int port) -{ - int reply; - int shift; - - if (! (port & 0x20)) - { - /*if (cpustate->config & CB0)*/ - /* External CRU */ - reply = READPORT(cpustate, port, (data & 0x01)); - } - else - { - /* internal CRU */ - switch (port) - { - case 0x10: - /* read interrupt state */ - reply = cpustate->irq_state; - break; - - case 0x12: - /* read decrementer LSB */ - /* ... */ - break; - case 0x13: - /* read decrementer MSB */ - /* ... */ - break; - - case 0x14: - /* read multiprocessor system interface LSB */ - /* ... */ - break; - case 0x15: - /* read multiprocessor system interface MSB */ - /* ... */ - break; - - case 0x16: - /* read flags LSB */ - /* ... */ - break; - case 0x17: - /* read flags MSB */ - /* ... */ - break; - - case 0x18: - case 0x19: - case 0x1A: - case 0x1B: - /* direction for P0-P31 */ - shift = (port - 0x18) << 3; - /* ... */ - break; - - case 0x1C: - case 0x1D: - case 0x1E: - case 0x1F: - /* data for P0-P31 */ - shift = (port - 0x1C) << 3; - /* ... */ - break; - - default: - reply = 0; - break; - } - } - - return reply; -} -#elif (TMS99XX_MODEL == TMS9995_ID) -/* on tms9995, we have to handle internal CRU ports */ -static int read_single_CRU(tms99xx_state *cpustate, int port) -{ - switch (port) - { - case 0x1EE: - /* flag, bits 0-7 */ - return cpustate->flag & 0xFF; - case 0x1EF: - /* flag, bits 8-15 */ - return (cpustate->flag >> 8) & 0xFF; - case 0x1FD: - /* MID flag, and external devices */ - if (cpustate->MID_flag) - return READPORT(cpustate, port) | 0x10; - else - return READPORT(cpustate, port) & ~ 0x10; - default: - /* external devices */ - return READPORT(cpustate, port); - } -} -#else -#define read_single_CRU(cs, port) READPORT(cs, port) -#endif - -static int readCRU(tms99xx_state *cpustate, int CRUAddr, int Number) -{ - static const int BitMask[] = - { - 0, /* filler - saves a subtract to find mask */ - 0x0001,0x0003,0x0007,0x000F,0x001F,0x003F,0x007F,0x00FF, - 0x01FF,0x03FF,0x07FF,0x0FFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF - }; - - int Offset,Location,Value; - - /*logerror("Read CRU %x for %x\n",CRUAddr,Number);*/ - - Location = (CRUAddr >> 3) & rCRUAddrMask; - Offset = CRUAddr & 07; - - /* Read 8 bits */ - #if HAS_PRIVILEGE - if ((cpustate->STATUS & ST_PR) && (Location >= (0xE00 >> 3))) - return CRU_PRIVILEGE_VIOLATION; - #endif - Value = read_single_CRU(cpustate, Location); - - if ((Offset+Number) > 8) - { - /* Read next 8 bits */ - Location = (Location + 1) & rCRUAddrMask; - #if HAS_PRIVILEGE - if ((cpustate->STATUS & ST_PR) && (Location >= (0xE00 >> 3))) - return CRU_PRIVILEGE_VIOLATION; - #endif - Value |= read_single_CRU(cpustate, Location) << 8; - - if ((Offset+Number) > 16) - { - /* Read next 8 bits */ - Location = (Location + 1) & rCRUAddrMask; - #if HAS_PRIVILEGE - if ((cpustate->STATUS & ST_PR) && (Location >= (0xE00 >> 3))) - return CRU_PRIVILEGE_VIOLATION; - #endif - Value |= read_single_CRU(cpustate, Location) << 16; - } - } - - /* Allow for Offset */ - Value >>= Offset; - - /* Mask out what we want */ - Value &= BitMask[Number]; - - /* And update */ - return Value; -} - -/*****************************************************************************/ - -#if HAS_MAPPING -/* load a map file from memory */ -static void load_map_file(tms99xx_state *cpustate, uint16_t src_addr, int src_map_file, int dst_file) -{ - int i; - - - /* load mapped address into the memory address register */ - if ((src_map_file == 0) && (src_addr >= 0xf800)) - { /* intercept TPCS and CPU ROM */ - if (src_addr < 0xfc00) - /* TPCS */ - cpustate->mapper_address_latch = 0x1f0000+src_addr; - else - /* CPU ROM */ - cpustate->mapper_address_latch = 0x1f0000+src_addr; /* hack... */ - } - else if (! cpustate->mapping_on) - { - cpustate->mapper_address_latch = src_addr; - } - else - { - int map_index; - - if (src_addr <= cpustate->map_files[src_map_file].limit[0]) - map_index = 0; - else if (src_addr <= cpustate->map_files[src_map_file].limit[1]) - map_index = 1; - else if (src_addr <= cpustate->map_files[src_map_file].limit[2]) - map_index = 2; - else - { - if ((! cpustate->reset_maperr) && ! (cpustate->error_interrupt_register & EIR_MAPERR)) - { - cpustate->error_interrupt_register |= EIR_MAPERR; - cpustate->write_inhibit = 1; - } - cpustate->mapper_address_latch = src_addr; - map_index = -1; - } - if (map_index != -1) - cpustate->mapper_address_latch = cpustate->map_files[src_map_file].bias[map_index]+src_addr; - } - - - for (i=0; i<3; i++) - { - cpustate->map_files[dst_file].L[i] = cpustate->program->read_word(cpustate->mapper_address_latch) & 0xffe0; - cpustate->map_files[dst_file].limit[i] = (cpustate->map_files[dst_file].L[i] ^ 0xffe0) | 0x001f; - cpustate->mapper_address_latch = (cpustate->mapper_address_latch+2) & 0x1fffff; - cpustate->map_files[dst_file].B[i] = cpustate->program->read_word(cpustate->mapper_address_latch); - cpustate->map_files[dst_file].bias[i] = ((unsigned int) cpustate->map_files[dst_file].B[i]) << 5; - cpustate->mapper_address_latch = (cpustate->mapper_address_latch+2) & 0x1fffff; - } -} -#endif - -/* contextswitch : performs a BLWP, i.e. load PC, WP, and save old PC, old WP and ST... */ -static void contextswitch(tms99xx_state *cpustate, uint16_t addr) -{ - uint16_t oldWP, oldpc; - - /* save old state */ - oldWP = cpustate->WP; - oldpc = cpustate->PC; - - /* load vector */ - cpustate->WP = readword(cpustate, addr) & ~1; - cpustate->PC = readword(cpustate, addr+2) & ~1; - - /* write old state to regs */ - WRITEREG(R13, oldWP); - WRITEREG(R14, oldpc); - setstat(cpustate); - WRITEREG(R15, cpustate->STATUS); -} - -#if HAS_MAPPING || HAS_PRIVILEGE - -/* privileged context switch, that occurs after a reset, interrupt or XOP: -we enter privileged mode and select map file 0 before doing the context switch */ -/* For CPU that have no privilege support, contextswitchX would behave -identically to contextswitch, so we can call contextswitch in all cases. */ -static void contextswitchX(tms99xx_state *cpustate, uint16_t addr) -{ - uint16_t oldWP, oldpc, oldST; - - /* save old state */ - oldWP = cpustate->WP; - oldpc = cpustate->PC; - setstat(cpustate); - oldST = cpustate->STATUS; - - /* enter privileged mode and select map file 0 */ - #if HAS_PRIVILEGE - cpustate->STATUS &= ~ ST_PR; - #endif - #if HAS_MAPPING - cpustate->STATUS &= ~ ST_MF; - #endif - getstat(cpustate); - - /* load vector */ - cpustate->WP = readword(cpustate, addr) & ~1; - cpustate->PC = readword(cpustate, addr+2) & ~1; - - /* write old state to regs */ - WRITEREG(R13, oldWP); - WRITEREG(R14, oldpc); - WRITEREG(R15, oldST); -} - -#endif - -/* - * decipheraddr : compute and return the effective address in word instructions. - * - * NOTA : the LSBit is always ignored in word addresses, - * but we do not set it to 0 because of XOP... - */ -static uint16_t decipheraddr(tms99xx_state *cpustate, uint16_t opcode) -{ - register uint16_t ts = opcode & 0x30; - register uint16_t reg = opcode & 0xF; - - reg += reg; - - if (ts == 0) - /* Rx */ - return(reg + cpustate->WP); - else if (ts == 0x10) - { /* *Rx */ - CYCLES(0, 4, 1); - return(readword(cpustate, reg + cpustate->WP)); - } - else if (ts == 0x20) - { - register uint16_t imm; - - imm = fetch(cpustate); - - if (reg) - { /* @>xxxx(Rx) */ - CYCLES(1, 8, 3); - return(readword(cpustate, reg + cpustate->WP) + imm); - } - else - { /* @>xxxx */ - CYCLES(3, 8, 1); - return(imm); - } - } - else /*if (ts == 0x30)*/ - { /* *Rx+ */ - register uint16_t response; - - reg += cpustate->WP; /* reg now contains effective address */ - - CYCLES(1, 8, 3); - - response = readword(cpustate, reg); - writeword(cpustate, reg, response+2); /* we increment register content */ - return(response); - } -} - -/* decipheraddrbyte : compute and return the effective address in byte instructions. */ -static uint16_t decipheraddrbyte(tms99xx_state *cpustate, uint16_t opcode) -{ - register uint16_t ts = opcode & 0x30; - register uint16_t reg = opcode & 0xF; - - reg += reg; - - if (ts == 0) - /* Rx */ - return(reg + cpustate->WP); - else if (ts == 0x10) - { /* *Rx */ - CYCLES(0, 4, 1); - return(readword(cpustate, reg + cpustate->WP)); - } - else if (ts == 0x20) - { - register uint16_t imm; - - imm = fetch(cpustate); - - if (reg) - { /* @>xxxx(Rx) */ - CYCLES(1, 8, 3); - return(readword(cpustate, reg + cpustate->WP) + imm); - } - else - { /* @>xxxx */ - CYCLES(3, 8, 1); - return(imm); - } - } - else /*if (ts == 0x30)*/ - { /* *Rx+ */ - register uint16_t response; - - reg += cpustate->WP; /* reg now contains effective address */ - - CYCLES(1, 6, 3); - - response = readword(cpustate, reg); - writeword(cpustate, reg, response+1); /* we increment register content */ - return(response); - } -} - - -/*************************************************************************/ - -#if (TMS99XX_MODEL == TI990_10_ID) - /* TI990/10 generates an error interrupt */ - /* timings are unknown */ - #define HANDLE_ILLEGAL \ - { \ - cpustate->error_interrupt_register |= EIR_ILLOP; \ - if (cpustate->error_interrupt_callback) \ - (*cpustate->error_interrupt_callback)(cpustate->device, 1); \ - } -#elif TMS99XX_MODEL <= TMS9989_ID - /* TMS9900/TMS9980 merely ignore the instruction */ - #define HANDLE_ILLEGAL cpustate->icount -= 6 -#elif TMS99XX_MODEL == TMS9995_ID - /* TMS9995 generates a MID interrupt */ - #define HANDLE_ILLEGAL \ - { \ - cpustate->MID_flag = 1; \ - contextswitchX(cpustate, 0x0008); \ - cpustate->STATUS = (cpustate->STATUS & 0xFE00) | 0x1; \ - cpustate->disable_interrupt_recognition = 1; \ - } -#else -#define HANDLE_ILLEGAL -#warning "don't know" -#endif - -#if HAS_PRIVILEGE - #if (TMS99XX_MODEL == TI990_10_ID) - /* TI990/10 generates an error interrupt */ - /* timings are unknown */ - #define HANDLE_PRIVILEGE_VIOLATION \ - { \ - cpustate->error_interrupt_register |= EIR_PRIVOP; \ - if (cpustate->error_interrupt_callback) \ - (*cpustate->error_interrupt_callback)(cpustate->device, 1); \ - } - #else - #define HANDLE_PRIVILEGE_VIOLATION - #warning "don't know" - #endif -#endif - -/*========================================================================== - Illegal instructions >0000->01FF (not for 9989 and later) - >0C00->0FFF (not for 990/12 and 99110) -============================================================================*/ - -static void illegal(tms99xx_state *cpustate, uint16_t opcode) -{ - HANDLE_ILLEGAL; -} - - -#if 0 /* ti990/12 only */ -/*========================================================================== - Additionnal instructions, >0000->002F - Additionnal single-register instruction, >0030->003F - --------------------------------------------------------------------------- - - 0 1 2 3-4 5 6 7+8 9 A B-C D E F - --------------------------------- - | o p c o d e | - | o p c o d e | reg # | - --------------------------------- - -============================================================================*/ -static void h0000(tms99xx_state *cpustate, uint16_t opcode) -{ - if (opcode >= 0x30) - { /* STPC STore Program Counter */ - - } - else - { - switch (opcode /*& 0x3F*/) - { - case 0x1C: /* SRAM */ - /* SRAM -- Shift Right Arithmetic Multiple precision */ - case 0x1D: /* SLAM */ - /* SLAM -- Shift Left Arithmetic Multiple precision */ - case 0x1E: - /* RTO --- Right Test for Ones */ - case 0x1F: - /* LTO --- Left Test for Ones */ - case 0x20: - /* CNTO -- CouNT Ones */ - case 0x21: - /* SLSL -- Search LiSt Logical address */ - case 0x22: - /* SLSP -- Search LiSt Physical address */ - case 0x23: - /* BDC --- Binary to Decimal ascii Conversion */ - case 0x24: - /* DBC --- Decimal to Binary ascii Conversion */ - case 0x25: - /* SWPM -- SWaP Multiple precision */ - case 0x26: - /* XORM -- eXclusive OR Multiple precision */ - case 0x27: - /* ORM --- OR Multiple precision */ - case 0x28: - /* ANDM -- AND Multiple precision */ - case 0x29: /* SM */ - /* SM ---- Subtract Multiple precision integer */ - case 0x2A: /* AM */ - /* AM ---- Add Multiple precision integer */ - case 0x2B: - /* MOVA -- MOVe Address */ - case 0x2D: - /* EMD --- Execute Micro-Diagnostics */ - case 0x2E: - /* EINT -- Enable INTerrupts */ - case 0x2F: - /* DINT -- Disable INTerrupts */ - - break; - - default: - HANDLE_ILLEGAL; - break; - } - } -} -#endif - - -#if HAS_9995_OPCODES -/*========================================================================== - Additionnal single-register instructions, >0040->00FF - --------------------------------------------------------------------------- - - 0 1 2 3-4 5 6 7+8 9 A B-C D E F - --------------------------------- - | o p c o d e | reg # | - --------------------------------- - -tms9989 and later : LST, LWP -============================================================================*/ -static void h0040(tms99xx_state *cpustate, uint16_t opcode) -{ - register uint16_t addr; - - addr = opcode & 0xF; - addr = ((addr + addr) + cpustate->WP) & ~1; - - switch ((opcode & 0xF0) >> 4) - { - case 8: /* LST */ - /* LST --- Load STatus register */ - /* ST = *Reg */ - #if HAS_PRIVILEGE - if (cpustate->STATUS & ST_PR) - cpustate->STATUS = (cpustate->STATUS & 0x01DF) | (readword(cpustate, addr) & 0xFE20); - else - cpustate->STATUS = readword(cpustate, addr); - #else - cpustate->STATUS = readword(cpustate, addr); - #endif - getstat(cpustate); /* set last_parity */ - break; - - case 9: /* LWP */ - /* LWP --- Load Workspace Pointer */ - /* WP = *Reg */ - cpustate->WP = readword(cpustate, addr) & ~1; - break; - -#if 0 /* 990/12 opcodes */ - case 4: - /* CS ---- Compare Strings */ - case 5: - /* SEQB -- Search string for EQual Byte */ - case 6: - /* MOVS -- MOVe String */ - case 7: - /* LIM --- Load Interrupt Mask */ - - case 10: - /* LCS --- Load writable Control Store */ - - case 11: /* BLSK */ - /* BLSK -- Branch immediate and push Link to StacK */ - - case 12: - /* MVSR -- MoVe String Reverse */ - case 13: - /* MVSK -- MoVe string from StacK */ - case 14: - /* POPS -- POP String from stack */ - case 15: - /* PSHS -- PuSH String to stack */ - - break; -#endif - - default: - HANDLE_ILLEGAL; - break; - } -} - - -/*========================================================================== - Additionnal single-operand instructions, >0100->01FF - --------------------------------------------------------------------------- - - 0 1 2 3-4 5 6 7+8 9 A B-C D E F - --------------------------------- - | o p c o d e |TS | S | - --------------------------------- - -tms9989 and later : DIVS, MPYS -tms99xxx : BIND -============================================================================*/ -static void h0100(tms99xx_state *cpustate, uint16_t opcode) -{ - register uint16_t src; -#if HAS_MAPPING - int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map; -#endif - - src = decipheraddr(cpustate, opcode) & ~1; - - switch ((opcode & 0xC0) >> 6) - { -#if HAS_BIND_OPCODE - case 1: /* BIND */ - /* BIND -- Branch INDirect */ - cpustate->PC = readwordX(cpustate, src, src_map) & ~1; - CYCLES(Mooof!, Mooof!, 4 /*don't know*/); - break; -#endif - - case 2: /* DIVS */ - /* DIVS -- DIVide Signed */ - /* R0 = (R0:R1)/S R1 = (R0:R1)%S */ - { - int16_t d = readwordX(cpustate, src, src_map); - int32_t divq = (READREG(R0) << 16) | READREG(R1); - int32_t q = divq/d; - - if ((q < -32768L) || (q > 32767L)) - { - cpustate->STATUS |= ST_OV; - CYCLES(Mooof!, Mooof!, 10); - } - else - { - cpustate->STATUS &= ~ST_OV; - setst_lae(cpustate, q); - WRITEREG(R0, q); - WRITEREG(R1, divq%d); - /* tms9995 : 33 is the worst case */ - CYCLES(Mooof!, Mooof!, 33); - } - } - break; - - case 3: /* MPYS */ - /* MPYS -- MultiPlY Signed */ - /* Results: R0:R1 = R0*S */ - { - int32_t prod = ((int32_t) (int16_t) readwordX(cpustate, src, src_map)); - prod = prod*((int32_t) (int16_t) READREG(R0)); - - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ); - if (prod > 0) - cpustate->STATUS |= (ST_LGT | ST_AGT); - else if (prod < 0) - cpustate->STATUS |= ST_LGT; - else - cpustate->STATUS |= ST_EQ; - - WRITEREG(R0, prod >> 16); - WRITEREG(R1, prod); - } - CYCLES(Mooof!, Mooof!, 25); - break; - -#if 0 /* Origin unknown */ - case 0: /* EVAD */ - /* EVAD -- EValuate ADdress instruction */ - - break; -#endif - - default: - HANDLE_ILLEGAL; - break; - } -} -#endif - - -/*========================================================================== - Immediate, Control instructions, >0200->03FF - --------------------------------------------------------------------------- - - 0 1 2 3-4 5 6 7+8 9 A B-C D E F - --------------------------------- - | o p c o d e |0| reg # | - --------------------------------- - - LI, AI, ANDI, ORI, CI, STWP, STST, LIMI, LWPI, IDLE, RSET, RTWP, CKON, CKOF, LREX -systems with memory mapper: LMF -============================================================================*/ -static void h0200(tms99xx_state *cpustate, uint16_t opcode) -{ - register uint16_t addr; - register uint16_t value; /* used for anything */ - - addr = opcode & 0xF; - addr = ((addr + addr) + cpustate->WP) & ~1; - - #if HAS_MAPPING - if ((opcode >= 0x0320) && (opcode < 0x0340)) - { /* LMF */ - /* LMF --- Load memory Map File */ - /* Used by the memory mapper on ti990/10 with mapping option, ti990/12, and the TIM99610 - mapper chip to be associated with tms99000. - Syntax: "LMF Rn,m" loads map file m (0 or 1) with six words of memory, starting at address - specified in workspace register Rn (0 through 15). */ - #if HAS_PRIVILEGE - if (cpustate->STATUS & ST_PR) - { - HANDLE_PRIVILEGE_VIOLATION - return; - } - #endif - - /* read address pointer */ - addr = readword(cpustate, addr); - - load_map_file(cpustate, addr, cpustate->cur_map, (opcode & 0x10) ? 1 : 0); - - CYCLES(3, Mooof!, Mooof!); - return; - } - #endif - - #if BETTER_0200_DECODING - /* better instruction decoding on ti990/10 */ - if (opcode & 0x10) - { - HANDLE_ILLEGAL; - return; - } - #elif COMPLETE_0200_DECODING - /* full instruction decoding on tms9995 */ - if (((opcode < 0x2E0) && (opcode & 0x10)) || ((opcode >= 0x2E0) && (opcode & 0x1F))) - { -#if 0 - /* tms99110 opcode (not supported by 990/12) */ - if (opcode == 0x0301) - { /* CR ---- Compare Reals */ - } - else - /* tms99105+tms99110 opcode (not supported by 990/12) */ - if (opcode == 0x0302) - { /* MM ---- Multiply Multiple */ - } - else -#endif - #if 0 /* ti990/12 only */ - if (opcode >= 0x03F0) - { /* EP ---- Extended Precision */ - } - else - #endif - HANDLE_ILLEGAL; - return; - } - #endif - - switch ((opcode & 0x1e0) >> 5) - { - case 0: /* LI */ - /* LI ---- Load Immediate */ - /* *Reg = *PC+ */ - value = fetch(cpustate); - writeword(cpustate, addr, value); - setst_lae(cpustate, value); - CYCLES(3, 12, 3); - break; - - case 1: /* AI */ - /* AI ---- Add Immediate */ - /* *Reg += *PC+ */ - value = fetch(cpustate); - value = setst_add_laeco(cpustate, readword(cpustate, addr), value); - writeword(cpustate, addr, value); - CYCLES(4, 14, 4); - break; - - case 2: /* ANDI */ - /* ANDI -- AND Immediate */ - /* *Reg &= *PC+ */ - value = fetch(cpustate); - value = readword(cpustate, addr) & value; - writeword(cpustate, addr, value); - setst_lae(cpustate, value); - CYCLES(4, 14, 4); - break; - - case 3: /* ORI */ - /* ORI --- OR Immediate */ - /* *Reg |= *PC+ */ - value = fetch(cpustate); - value = readword(cpustate, addr) | value; - writeword(cpustate, addr, value); - setst_lae(cpustate, value); - CYCLES(4, 14, 4); - break; - - case 4: /* CI */ - /* CI ---- Compare Immediate */ - /* status = (*Reg-*PC+) */ - value = fetch(cpustate); - setst_c_lae(cpustate, value, readword(cpustate, addr)); - CYCLES(6, 14, 4); - break; - - case 5: /* STWP */ - /* STWP -- STore Workspace Pointer */ - /* *Reg = WP */ - writeword(cpustate, addr, cpustate->WP); - CYCLES(2, 8, 3); - break; - - case 6: /* STST */ - /* STST -- STore STatus register */ - /* *Reg = ST */ - setstat(cpustate); - writeword(cpustate, addr, cpustate->STATUS); - CYCLES(2, 8, 3); - break; - - case 7: /* LWPI */ - /* LWPI -- Load Workspace Pointer Immediate */ - /* WP = *PC+ */ - cpustate->WP = fetch(cpustate) & ~1; - CYCLES(3, 10, 4); - break; - - case 8: /* LIMI */ - /* LIMI -- Load Interrupt Mask Immediate */ - /* ST&15 |= (*PC+)&15 */ - #if HAS_PRIVILEGE - if (cpustate->STATUS & ST_PR) - { - HANDLE_PRIVILEGE_VIOLATION - break; - } - #endif - - value = fetch(cpustate); - cpustate->STATUS = (cpustate->STATUS & ~ST_IM) | (value & ST_IM); - field_interrupt(cpustate); /*IM has been modified.*/ - CYCLES(3, 16, 5); - break; - - case 9: /* LMF is implemented elsewhere - when it is implemented */ - HANDLE_ILLEGAL; - break; - - case 10: /* IDLE */ - /* IDLE -- IDLE until a reset, interrupt, load */ - /* The TMS99000 locks until an interrupt happen (like with 68k STOP instruction), - and continuously performs a special CRU write (code 2). */ - #if HAS_PRIVILEGE - if (cpustate->STATUS & ST_PR) - { - HANDLE_PRIVILEGE_VIOLATION - break; - } - #endif - cpustate->IDLE = 1; - #if EXTERNAL_INSTRUCTION_DECODING - external_instruction_notify(cpustate, 2); - #endif - if (cpustate->idle_callback) - (*cpustate->idle_callback)(cpustate->device, 1); - CYCLES(4, 12, 7); - /* we take care of further external_instruction_notify(cpustate, 2); in execute(cpustate) */ - break; - - case 12: /* RTWP */ - /* RTWP -- Return with Workspace Pointer */ - /* WP = R13, PC = R14, ST = R15 */ - addr = (cpustate->WP + R13) & ~1; - cpustate->WP = readword(cpustate, addr) & ~1; - addr += 2; - cpustate->PC = readword(cpustate, addr) & ~1; - addr += 2; - #if HAS_PRIVILEGE - if (cpustate->STATUS & ST_PR) - cpustate->STATUS = (cpustate->STATUS & 0x01DF) | (readword(cpustate, addr) & 0xFE20); - else - cpustate->STATUS = readword(cpustate, addr); - #else - cpustate->STATUS = readword(cpustate, addr); - #endif - getstat(cpustate); /* set last_parity */ - - field_interrupt(cpustate); /*IM has been modified.*/ - CYCLES(3, 14, 6); - break; - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - - case 11: /* RSET */ - case 13: /* CKON */ - case 14: /* CKOF */ - case 15: /* LREX */ - HANDLE_ILLEGAL; /* These instruction "have been deleted" on the TMS9940 */ - break; - -#else - - case 11: /* RSET */ - /* RSET -- ReSET */ - /* Reset the Interrupt Mask, and perform a special CRU write (code 3). */ - /* The CRU write is supposed to reset external devices. */ - #if HAS_PRIVILEGE - if (cpustate->STATUS & ST_PR) - { - HANDLE_PRIVILEGE_VIOLATION - break; - } - #endif - - cpustate->STATUS &= 0xFFF0; /*clear IM.*/ - field_interrupt(cpustate); /*IM has been modified.*/ - - #if (TMS99XX_MODEL == TMS9995_ID) - /*cpustate->MID_flag = 0;*/ /* not sure about this */ - #endif - #if (TMS99XX_MODEL == TI990_10_ID) - cpustate->error_interrupt_register = 0; - cpustate->mapping_on = 0; - - cpustate->reset_maperr = 0; - cpustate->mapper_cru_read_register = 0; - cpustate->latch_control[0] = cpustate->latch_control[1] = cpustate->latch_control[2] = 0; - - cpustate->diaglat = 0; - #endif - - #if EXTERNAL_INSTRUCTION_DECODING - external_instruction_notify(cpustate, 3); - #endif - - #if EXTERNAL_INSTRUCTION_CALLBACK - if (cpustate->rset_callback) - (*cpustate->rset_callback)(cpustate->device); - #endif - - CYCLES(5, 12, 7); - break; - -#if EXTERNAL_INSTRUCTION_DECODING - - case 13: /* CKON */ - case 14: /* CKOF */ - case 15: /* LREX */ - /* CKON -- ClocK ON */ - /* Perform a special CRU write (code 5). */ - /* An external circuitery could, for instance, enable the line clock interrupt (100Hz or 120Hz, depending on the electrical alimentation frequency). */ - /* CKOF -- ClocK OFf */ - /* Perform a special CRU write (code 6). */ - /* An external circuitery could, for instance, disable the line clock interrupt. */ - /* LREX -- Load or REstart eXecution */ - /* Perform a special CRU write (code 7). */ - /* An external circuitery could, for instance, activate the LOAD* line, - causing a non-maskable LOAD interrupt (vector -1). */ - #if HAS_PRIVILEGE - if (cpustate->STATUS & ST_PR) - { - HANDLE_PRIVILEGE_VIOLATION - break; - } - #endif - - external_instruction_notify(cpustate, (opcode & 0x00e0) >> 5); - - #if EXTERNAL_INSTRUCTION_CALLBACK - #warning "todo..." - #endif - - CYCLES(Mooof!, 12, 7); - break; - -#elif EXTERNAL_INSTRUCTION_CALLBACK - - case 13: /* CKON */ - case 14: /* CKOF */ - /* CKON -- ClocK ON */ - /* Enable the line clock interrupt (100Hz or 120Hz, depending on the electrical alimentation frequency). */ - /* CKOF -- ClocK OFf */ - /* Disable the line clock interrupt. */ - /* We use a callback because the line clock is implemented in machine - code, not in the CPU core. */ - #if HAS_PRIVILEGE - if (cpustate->STATUS & ST_PR) - { - HANDLE_PRIVILEGE_VIOLATION - break; - } - #endif - - if (cpustate->ckon_ckof_callback) - (*cpustate->ckon_ckof_callback)(cpustate->device, (opcode & 0x0020) ? 1 : 0); - - - CYCLES(5, Mooof!, Mooof!); - break; - - case 15: /* LREX */ - /* LREX -- Load or REstart eXecution */ - /* Trigger a LOAD interrupt (vector -1). (We use a callback, and I - have forgotten the reason why.) */ - #if HAS_PRIVILEGE - if (cpustate->STATUS & ST_PR) - { - HANDLE_PRIVILEGE_VIOLATION - break; - } - #endif - - if (cpustate->lrex_callback) - (*cpustate->lrex_callback)(cpustate->device); - - CYCLES(6, Mooof!, Mooof!); - break; - -#else - - #warning "Should not happen..." - -#endif - -#endif - } -} - - -/*========================================================================== - Single-operand instructions, >0400->07FF - --------------------------------------------------------------------------- - - 0 1 2 3-4 5 6 7+8 9 A B-C D E F - --------------------------------- - | o p c o d e |TS | S | - --------------------------------- - - BLWP, B, X, CLR, NEG, INV, INC, INCT, DEC, DECT, BL, SWPB, SETO, ABS -systems with memory mapper: LDD, LDS -============================================================================*/ -static void h0400(tms99xx_state *cpustate, uint16_t opcode) -{ - register uint16_t addr = decipheraddr(cpustate, opcode) & ~1; - register uint16_t value; /* used for anything */ -#if HAS_MAPPING - int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map; -#endif - - switch ((opcode & 0x3C0) >> 6) - { - case 0: /* BLWP */ - /* BLWP -- Branch and Link with Workspace Pointer */ - /* Result: WP = *S+, PC = *S */ - /* New R13=old WP, New R14=Old PC, New R15=Old ST */ - contextswitch(cpustate, addr); - CYCLES(3, 26, 11); - cpustate->disable_interrupt_recognition = 1; - break; - case 1: /* B */ - /* B ----- Branch */ - /* PC = S */ -#if ((TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9980_ID)) - (void) readwordX(cpustate, addr, src_map); -#endif - cpustate->PC = addr; - CYCLES(2, 8, 3); - break; - case 2: /* X */ - /* X ----- eXecute */ - /* Executes instruction *S */ - execute(cpustate, readwordX(cpustate, addr, src_map)); - /* On tms9900, the X instruction actually takes 8 cycles, but we gain 2 cycles on the next - instruction, as we don't need to fetch it. */ - CYCLES(1, 6, 2); - break; - case 3: /* CLR */ - /* CLR --- CLeaR */ - /* *S = 0 */ -#if ((TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9980_ID)) - (void) readwordX(cpustate, addr, src_map); -#endif - writewordX(cpustate, addr, 0, src_map); - CYCLES(2, 10, 3); - break; - case 4: /* NEG */ - /* NEG --- NEGate */ - /* *S = -*S */ - value = - (int16_t) readwordX(cpustate, addr, src_map); - if (value) - cpustate->STATUS &= ~ ST_C; - else - cpustate->STATUS |= ST_C; - - #if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - if (value & 0x0FFF) - cpustate->STATUS &= ~ ST_DC; - else - cpustate->STATUS |= ST_DC; - #endif - - setst_laeo(cpustate, value); - writewordX(cpustate, addr, value, src_map); - CYCLES(3, 12, 3); - break; - case 5: /* INV */ - /* INV --- INVert */ - /* *S = ~*S */ - value = ~ readwordX(cpustate, addr, src_map); - writewordX(cpustate, addr, value, src_map); - setst_lae(cpustate, value); - CYCLES(2, 10, 3); - break; - case 6: /* INC */ - /* INC --- INCrement */ - /* (*S)++ */ - value = setst_add_laeco(cpustate, readwordX(cpustate, addr, src_map), 1); - writewordX(cpustate, addr, value, src_map); - CYCLES(2, 10, 3); - break; - case 7: /* INCT */ - /* INCT -- INCrement by Two */ - /* (*S) +=2 */ - value = setst_add_laeco(cpustate, readwordX(cpustate, addr, src_map), 2); - writewordX(cpustate, addr, value, src_map); - CYCLES(2, 10, 3); - break; - case 8: /* DEC */ - /* DEC --- DECrement */ - /* (*S)-- */ - value = setst_sub_laeco(cpustate, readwordX(cpustate, addr, src_map), 1); - writewordX(cpustate, addr, value, src_map); - CYCLES(2, 10, 3); - break; - case 9: /* DECT */ - /* DECT -- DECrement by Two */ - /* (*S) -= 2 */ - value = setst_sub_laeco(cpustate, readwordX(cpustate, addr, src_map), 2); - writewordX(cpustate, addr, value, src_map); - CYCLES(2, 10, 3); - break; - case 10: /* BL */ - /* BL ---- Branch and Link */ - /* IP=S, R11=old IP */ -#if ((TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9980_ID)) - (void) readwordX(cpustate, addr, src_map); -#endif - WRITEREG(R11, cpustate->PC); - cpustate->PC = addr; - CYCLES(3, 12, 5); - break; - case 11: /* SWPB */ - /* SWPB -- SWaP Bytes */ - /* *S = swab(*S) */ - value = readwordX(cpustate, addr, src_map); - value = logical_right_shift(value, 8) | (value << 8); - writewordX(cpustate, addr, value, src_map); - CYCLES(2, 10, 13); - break; - case 12: /* SETO */ - /* SETO -- SET to Ones */ - /* *S = #$FFFF */ -#if ((TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9980_ID)) - (void) readwordX(cpustate, addr, src_map); -#endif - writewordX(cpustate, addr, 0xFFFF, src_map); - CYCLES(2, 10, 3); - break; - case 13: /* ABS */ - /* ABS --- ABSolute value */ - /* *S = |*S| */ - /* clearing ST_C seems to be necessary, although ABS will never set it. */ -#if (TMS99XX_MODEL <= TMS9985_ID) - - /* ti990/10 and tms9900/tms9980 only write the result if it has changed */ - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV); - - #if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - /* I guess ST_DC is cleared here, too*/ - cpustate->STATUS &= ~ ST_DC; - #endif - - value = readwordX(cpustate, addr, src_map); - - CYCLES(5, 12, Mooof!); - - if (((int16_t) value) > 0) - cpustate->STATUS |= ST_LGT | ST_AGT; - else if (((int16_t) value) < 0) - { - cpustate->STATUS |= ST_LGT; - if (value == 0x8000) - cpustate->STATUS |= ST_OV; - - #if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - if (! (value & 0x0FFF)) - cpustate->STATUS |= ST_DC; - #endif - - writewordX(cpustate, addr, - ((int16_t) value), src_map); - CYCLES(0, 2, Mooof!); - } - else - cpustate->STATUS |= ST_EQ; - - break; - -#else - - /* tms9995 always write the result */ - cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV); - value = readwordX(cpustate, addr, src_map); - - CYCLES(Mooof!, Mooof!, 3); - if (((int16_t) value) > 0) - cpustate->STATUS |= ST_LGT | ST_AGT; - else if (((int16_t) value) < 0) - { - cpustate->STATUS |= ST_LGT; - if (value == 0x8000) - cpustate->STATUS |= ST_OV; - value = - ((int16_t) value); - } - else - cpustate->STATUS |= ST_EQ; - - writewordX(cpustate, addr, value, src_map); - - break; - -#endif - - -#if HAS_MAPPING - /* Used by the memory mapper on ti990/10 with mapping option, ti990/12, and the TIM99610 - mapper chip to be associated with tms99000. */ - /* These opcode allow access to another page without the need of switching a page someplace. */ - /* Note that, if I read the 990/10 schematics correctly, two consecutive LDS or LDD would - cause some trouble. */ - case 14: /* LDS */ - /* LDS --- Long Distance Source */ - - #if HAS_PRIVILEGE - if (cpustate->STATUS & ST_PR) - { - HANDLE_PRIVILEGE_VIOLATION - break; - } - #endif - - load_map_file(cpustate, addr, src_map, 2); - cpustate->lds_flag = 1; - cpustate->disable_interrupt_recognition = 1; - break; - case 15: /* LDD */ - /* LDD --- Long Distance Destination */ - #if HAS_PRIVILEGE - if (cpustate->STATUS & ST_PR) - { - HANDLE_PRIVILEGE_VIOLATION - break; - } - #endif - - load_map_file(cpustate, addr, src_map, 2); - cpustate->ldd_flag = 1; - cpustate->disable_interrupt_recognition = 1; - break; - -#else - - default: - /* illegal instructions */ - HANDLE_ILLEGAL; - break; - -#endif - } -} - - -/*========================================================================== - Shift instructions, >0800->0BFF - -------------------------------------------------------------------------- - - 0 1 2 3-4 5 6 7+8 9 A B-C D E F - --------------------------------- - | o p c o d e | C | W | - --------------------------------- - - SRA, SRL, SLA, SRC -============================================================================*/ -static void h0800(tms99xx_state *cpustate, uint16_t opcode) -{ - register uint16_t addr; - register uint16_t cnt = (opcode & 0xF0) >> 4; - register uint16_t value; - - addr = (opcode & 0xF); - addr = ((addr+addr) + cpustate->WP) & ~1; - - CYCLES(3, 12, 5); - - if (cnt == 0) - { - CYCLES(2, 8, 2); - - cnt = READREG(R0) & 0xF; - - if (cnt == 0) - cnt = 16; - } - - CYCLES(cnt, cnt+cnt, cnt); - - switch ((opcode & 0x300) >> 8) - { - case 0: /* SRA */ - /* SRA --- Shift Right Arithmetic */ - /* *W >>= C (*W is filled on the left with a copy of the sign bit) */ - value = setst_sra_laec(cpustate, readword(cpustate, addr), cnt); - writeword(cpustate, addr, value); - break; - case 1: /* SRL */ - /* SRL --- Shift Right Logical */ - /* *W >>= C (*W is filled on the left with 0) */ - value = setst_srl_laec(cpustate, readword(cpustate, addr), cnt); - writeword(cpustate, addr, value); - break; - case 2: /* SLA */ - /* SLA --- Shift Left Arithmetic */ - /* *W <<= C */ - value = setst_sla_laeco(cpustate, readword(cpustate, addr), cnt); - writeword(cpustate, addr, value); - break; - case 3: /* SRC */ - /* SRC --- Shift Right Circular */ - /* *W = rightcircularshift(*W, C) */ - value = setst_src_laec(cpustate, readword(cpustate, addr), cnt); - writeword(cpustate, addr, value); - break; - } -} - - -#if 0 /* 990/12 opcodes */ -/*========================================================================== - Additionnal instructions, >0C00->0C0F - Additionnal single-register instructions, >0C10->0C3F - --------------------------------------------------------------------------- - - 0 1 2 3-4 5 6 7+8 9 A B-C D E F - --------------------------------- - | o p c o d e | - | o p c o d e | reg # | - --------------------------------- - -============================================================================*/ -static void h0c00(tms99xx_state *cpustate, uint16_t opcode) -{ - if (opcode & 0x30) - { - switch ((opcode & 0x30) >> 4) - { - case 1: - /* INSF -- INSert Field */ - break; - case 2: - /* XV ---- eXtract Value */ - break; - case 3: - /* XF ---- eXtract Field */ - break; - } - } - else - { - switch (opcode & 0x0F) - { - /* floating point instructions */ - case 0: - /* CRI --- Convert Real to Integer */ - break; - case 2: - /* NEGR -- NEGate Real */ - break; - case 4: - /* CRE --- Convert Real to Extended integer */ - break; - case 6: - /* CER --- Convert Extended integer to Real */ - break; - - case 1: - /* CDI --- Convert Double precision real to Integer */ - break; - case 3: - /* NEGD -- NEGate Double precision real */ - break; - case 5: - /* CDE --- Convert Double precision real to Extended integer */ - break; - case 7: - /* CED --- Convert Extended integer to Double precision real */ - break; - - case 8: - /* NRM --- NoRMalize */ - break; - - case 9: - /* TMB --- Test Memory Bit */ - break; - case 10: - /* TCMB -- Test and Clear Memory Bit */ - break; - case 11: - /* TSMB -- Test and Set Memory Bit */ - break; - - case 12: - /* SRJ --- Subtract from Register and Jump */ - case 13: - /* ARJ --- Add to Register and Jump */ - - case 14: - case 15: - /* XIT --- eXIT from floating point interpreter */ - /* Generated by some compilers, but equivalent to NOP on TI990/12. May have been used - by some software floating-point emulators. */ - break; - - default: - HANDLE_ILLEGAL; - break; - } - } -} - - -/*========================================================================== - Additionnal single-operand instructions, >0C40->0DFF - >0E40->0FFF - --------------------------------------------------------------------------- - - 0 1 2 3-4 5 6 7+8 9 A B-C D E F - --------------------------------- - | o p c o d e |TS | S | - --------------------------------- - -============================================================================*/ -static void h0c40(tms99xx_state *cpustate, uint16_t opcode) -{ - register uint16_t src; - -#if HAS_MAPPING - int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map; -#endif - - src = decipheraddr(cpustate, opcode) & ~1; - - switch ((opcode & 0x03C0) >> 6) - { - case 1: - /* AR ---- Add Real */ - break; - case 2: - /* CIR --- Convert Integer to Real */ - break; - case 3: - /* SR ---- Subtract Real */ - break; - case 4: - /* MR ---- Multiply Real */ - break; - case 5: - /* DR ---- Divide Real */ - break; - case 6: - /* LR ---- Load Real */ - break; - case 7: - /* STR --- STore Real */ - break; - case 9: - /* AD ---- Add Double */ - break; - case 10: - /* CID --- Convert Integer to Double */ - break; - case 11: - /* SD ---- Subtract Double */ - break; - case 12: - /* MD ---- Multiply Double */ - break; - case 13: - /* DD ---- Divide Double */ - break; - case 14: - /* LD ---- Load Double */ - break; - case 15: - /* SD ---- Store Double */ - break; - default: - HANDLE_ILLEGAL; - break; - } -} - -/*========================================================================== - Additionnal single-register instructions, >0E00->0E3F - --------------------------------------------------------------------------- - - 0 1 2 3-4 5 6 7+8 9 A B-C D E F - --------------------------------- - | o p c o d e | reg # | - --------------------------------- - -============================================================================*/ -static void h0e00(tms99xx_state *cpustate, uint16_t opcode) -{ - switch ((opcode & 0x30) >> 4) - { - case 1: - /* IOF --- Invert Order of Field */ - break; - case 1: - /* SNEB -- Search string for Not Equal Byte */ - break; - case 2: - /* CRC --- Cyclic Redundancy Code calculation */ - break; - case 3: - /* TS ---- Translate String */ - break; - } -} -#endif - - -/*========================================================================== - Jump, CRU bit instructions, >1000->1FFF - --------------------------------------------------------------------------- - - 0 1 2 3-4 5 6 7+8 9 A B-C D E F - --------------------------------- - | o p c o d e | signed offset | - --------------------------------- - - JMP, JLT, JLE, JEQ, JHE, JGT, JNE, JNC, JOC, JNO, JL, JH, JOP - SBO, SBZ, TB -============================================================================*/ -static void h1000(tms99xx_state *cpustate, uint16_t opcode) -{ - /* we convert 8 bit signed word offset to a 16 bit effective word offset. */ - register int16_t offset = ((int8_t) opcode); - - - switch ((opcode & 0xF00) >> 8) - { - case 0: /* JMP */ - /* JMP --- unconditional JuMP */ - /* PC += offset */ - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - break; - case 1: /* JLT */ - /* JLT --- Jump if Less Than (arithmetic) */ - /* if (A==0 && EQ==0), PC += offset */ - if (! (cpustate->STATUS & (ST_AGT | ST_EQ))) - { - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - } - else - CYCLES(2, 8, 3); - break; - case 2: /* JLE */ - /* JLE --- Jump if Lower or Equal (logical) */ - /* if (L==0 || EQ==1), PC += offset */ - if ((! (cpustate->STATUS & ST_LGT)) || (cpustate->STATUS & ST_EQ)) - { - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - } - else - CYCLES(2, 8, 3); - break; - case 3: /* JEQ */ - /* JEQ --- Jump if EQual */ - /* if (EQ==1), PC += offset */ - if (cpustate->STATUS & ST_EQ) - { - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - } - else - CYCLES(2, 8, 3); - break; - case 4: /* JHE */ - /* JHE --- Jump if Higher or Equal (logical) */ - /* if (L==1 || EQ==1), PC += offset */ - if (cpustate->STATUS & (ST_LGT | ST_EQ)) - { - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - } - else - CYCLES(2, 8, 3); - break; - case 5: /* JGT */ - /* JGT --- Jump if Greater Than (arithmetic) */ - /* if (A==1), PC += offset */ - if (cpustate->STATUS & ST_AGT) - { - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - } - else - CYCLES(2, 8, 3); - break; - case 6: /* JNE */ - /* JNE --- Jump if Not Equal */ - /* if (EQ==0), PC += offset */ - if (! (cpustate->STATUS & ST_EQ)) - { - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - } - else - CYCLES(2, 8, 3); - break; - case 7: /* JNC */ - /* JNC --- Jump if No Carry */ - /* if (C==0), PC += offset */ - if (! (cpustate->STATUS & ST_C)) - { - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - } - else - CYCLES(2, 8, 3); - break; - case 8: /* JOC */ - /* JOC --- Jump On Carry */ - /* if (C==1), PC += offset */ - if (cpustate->STATUS & ST_C) - { - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - } - else - CYCLES(2, 8, 3); - break; - case 9: /* JNO */ - /* JNO --- Jump if No Overflow */ - /* if (OV==0), PC += offset */ - if (! (cpustate->STATUS & ST_OV)) - { - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - } - else - CYCLES(2, 8, 3); - break; - case 10: /* JL */ - /* JL ---- Jump if Lower (logical) */ - /* if (L==0 && EQ==0), PC += offset */ - if (! (cpustate->STATUS & (ST_LGT | ST_EQ))) - { - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - } - else - CYCLES(2, 8, 3); - break; - case 11: /* JH */ - /* JH ---- Jump if Higher (logical) */ - /* if (L==1 && EQ==0), PC += offset */ - if ((cpustate->STATUS & ST_LGT) && ! (cpustate->STATUS & ST_EQ)) - { - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - } - else - CYCLES(2, 8, 3); - break; - case 12: /* JOP */ - /* JOP --- Jump On (odd) Parity */ - /* if (P==1), PC += offset */ - { - /* Let's set ST_OP. */ - int i; - uint8_t a; - a = cpustate->lastparity; - i = 0; - - while (a != 0) - { - if (a & 1) /* If current bit is set, */ - i++; /* increment bit count. */ - a >>= 1U; /* Next bit. */ - } - - /* Set ST_OP bit. */ - /*if (i & 1) - cpustate->STATUS |= ST_OP; - else - cpustate->STATUS &= ~ ST_OP;*/ - - /* Jump accordingly. */ - if (i & 1) /*(cpustate->STATUS & ST_OP)*/ - { - cpustate->PC += (offset + offset); - CYCLES(3, 10, 3); - } - else - CYCLES(2, 8, 3); - } - - break; - case 13: /* SBO */ - /* SBO --- Set Bit to One */ - /* CRU Bit = 1 */ - #if HAS_PRIVILEGE - if (writeCRU(cpustate, (READREG(R12) >> 1) + offset, 1, 1) == CRU_PRIVILEGE_VIOLATION) - HANDLE_PRIVILEGE_VIOLATION - #else - writeCRU(cpustate, (READREG(R12) >> 1) + offset, 1, 1); - #endif - - CYCLES(4, 12, 8); - break; - - case 14: /* SBZ */ - /* SBZ --- Set Bit to Zero */ - /* CRU Bit = 0 */ - #if HAS_PRIVILEGE - if (writeCRU(cpustate, (READREG(R12) >> 1) + offset, 1, 0) == CRU_PRIVILEGE_VIOLATION) - HANDLE_PRIVILEGE_VIOLATION - #else - writeCRU(cpustate, (READREG(R12) >> 1) + offset, 1, 0); - #endif - - CYCLES(4, 12, 8); - break; - - case 15: /* TB */ - /* TB ---- Test Bit */ - /* EQ = (CRU Bit == 1) */ - #if HAS_PRIVILEGE - { - int value; - - value = readCRU(cpustate, (READREG(R12)>> 1) + offset, 1); - if (value == CRU_PRIVILEGE_VIOLATION) - HANDLE_PRIVILEGE_VIOLATION - else - setst_e(cpustate, value & 1, 1); - } - #else - setst_e(cpustate, readCRU(cpustate, (READREG(R12)>> 1) + offset, 1) & 1, 1); - #endif - CYCLES(5, 12, 8); - break; - } -} - - -/*========================================================================== - General and One-Register instructions >2000->3FFF - --------------------------------------------------------------------------- - - 0 1 2 3-4 5 6 7+8 9 A B-C D E F - --------------------------------- - | opcode | D |TS | S | - --------------------------------- - - COC, CZC, XOR, LDCR, STCR, XOP, MPY, DIV -tms9940 : DCA, DCS, LIIM -==========================================================================*/ - -/* xop, ldcr and stcr are handled elsewhere */ -static void h2000(tms99xx_state *cpustate, uint16_t opcode) -{ - register uint16_t dest = (opcode & 0x3C0) >> 6; - register uint16_t src; - register uint16_t value; - -#if HAS_MAPPING - int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map; -#endif - - src = decipheraddr(cpustate, opcode) & ~1; - dest = ((dest+dest) + cpustate->WP) & ~1; - - switch ((opcode & 0x1C00) >> 10) - { - case 0: /* COC */ - /* COC --- Compare Ones Corresponding */ - /* status E bit = (S&D == S) */ - value = readwordX(cpustate, src, src_map); - setst_e(cpustate, value & readword(cpustate, dest), value); - CYCLES(5, 14, 4); - break; - case 1: /* CZC */ - /* CZC --- Compare Zeroes Corresponding */ - /* status E bit = (S&~D == S) */ - value = readwordX(cpustate, src, src_map); - setst_e(cpustate, value & (~ readword(cpustate, dest)), value); - CYCLES(5, 14, 4); - break; - case 2: /* XOR */ - /* XOR --- eXclusive OR */ - /* D ^= S */ - value = readwordX(cpustate, src, src_map); - value ^= readword(cpustate, dest); - setst_lae(cpustate, value); - writeword(cpustate, dest,value); - CYCLES(3, 14, 4); - break; - /*case 3:*/ /* XOP is implemented elsewhere */ - /*case 4:*/ /* LDCR is implemented elsewhere */ - /*case 5:*/ /* STCR is implemented elsewhere */ - case 6: /* MPY */ - /* MPY --- MultiPlY (unsigned) */ - /* Results: D:D+1 = D*S */ - /* Note that early TMS9995 reportedly performs an extra dummy read in PC space */ - { - unsigned long prod = ((unsigned long) readwordX(cpustate, src, src_map)); - prod = prod * ((unsigned long) readword(cpustate, dest)); - writeword(cpustate, dest, prod >> 16); - writeword(cpustate, (dest+2)&0xffff, prod); - } - /* ti990/10 : from 19 to 35, possibly 19 + (number of bits to 1 in one operand) */ - CYCLES(35, 52, 23); - break; - case 7: /* DIV */ - /* DIV --- DIVide (unsigned) */ - /* D = D/S D+1 = D%S */ - { - uint16_t d = readwordX(cpustate, src, src_map); - uint16_t hi = readword(cpustate, dest); - unsigned long divq = (((unsigned long) hi) << 16) | readword(cpustate, (dest+2)&0xffff); - - if (d <= hi) - { - cpustate->STATUS |= ST_OV; - CYCLES(4, 16, 6); - } - else - { - cpustate->STATUS &= ~ST_OV; - writeword(cpustate, dest, divq/d); - writeword(cpustate, (dest+2)&0xffff, divq%d); - /* tms9900 : from 92 to 124, possibly 92 + 2*(number of bits to 1 (or 0?) in quotient) */ - /* tms9995 : 28 is the worst case */ - /* ti990/10 : from 41 to 58, possibly 41 + (number of bits to 1 (or 0?) in quotient) */ - CYCLES(41, 92, 28); - } - } - break; - } -} - -static void xop(tms99xx_state *cpustate, uint16_t opcode) -{ /* XOP */ - /* XOP --- eXtended OPeration */ - /* WP = *(40h+D), PC = *(42h+D) */ - /* New R13=old WP, New R14=Old IP, New R15=Old ST */ - /* New R11=S */ - /* Xop bit set */ - - register uint16_t immediate = (opcode & 0x3C0) >> 6; - register uint16_t operand; - - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - switch (immediate) - { - case 0: /* DCA */ - /* DCA --- Decimal Correct Addition */ - operand = decipheraddrbyte(cpustate, opcode); - { - int value = readbyte(cpustate, operand); - int X = (value >> 4) & 0xf; - int Y = value & 0xf; - - if (Y >= 10) - { - Y -= 10; - cpustate->STATUS |= ST_DC; - X++; - } - else if (cpustate->STATUS & ST_DC) - { - Y += 6; - } - - if (X >= 10) - { - X -= 10; - cpustate->STATUS |= ST_C; - } - else if (cpustate->STATUS & ST_C) - { - X += 6; - } - - writebyte(cpustate, operand, (X << 4) | Y); - } - break; - case 1: /* DCS */ - /* DCS --- Decimal Correct Substraction */ - operand = decipheraddrbyte(cpustate, opcode); - { - int value = readbyte(cpustate, operand); - - if (! (cpustate->STATUS & ST_DC)) - { - value += 10; - } - - if (! (cpustate->STATUS & ST_C)) - { - value += 10 << 4; - } - - cpustate->STATUS ^= ST_DC; - - writebyte(cpustate, operand, value); - } - break; - case 2: /* LIIM */ - case 3: /* LIIM */ - /* LIIM - Load Immediate Interrupt Mask */ - /* Does the same job as LIMI, with a different opcode format. */ - /* Note that, unlike TMS9900, the interrupt mask is only 2-bit long. */ - (void)decipheraddr(cpustate, opcode); /* dummy decode (personnal guess) */ - - cpustate->STATUS = (cpustate->STATUS & ~ST_IM) | (opcode & ST_IM); - break; - default: /* normal XOP */ -#endif - - /* TODO : emulate 990/10 hardware XOP */ - operand = decipheraddr(cpustate, opcode); - - #if ((TMS99XX_MODEL <= TMS9989_ID) && (TMS99XX_MODEL != TI990_10_ID)) - (void)readword(cpustate, operand & ~1); /*dummy read (personnal guess)*/ - #endif - - contextswitchX(cpustate, 0x40 + (immediate << 2)); - - #if ! ((TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)) - /* The bit is not set on tms9940 */ - cpustate->STATUS |= ST_X; - #endif - - WRITEREG(R11, operand); - CYCLES(7, 36, 15); - cpustate->disable_interrupt_recognition = 1; - -#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) - break; - } -#endif -} - -/* LDCR and STCR */ -static void ldcr_stcr(tms99xx_state *cpustate, uint16_t opcode) -{ - register uint16_t cnt = (opcode & 0x3C0) >> 6; - register uint16_t addr; - int value; - -#if HAS_MAPPING - int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map; -#endif - - if (cnt == 0) - cnt = 16; - - if (cnt <= 8) - addr = decipheraddrbyte(cpustate, opcode); - else - addr = decipheraddr(cpustate, opcode) & ~1; - - if (opcode < 0x3400) - { /* LDCR */ - /* LDCR -- LoaD into CRu */ - /* CRU R12--CRU R12+D-1 set to S */ - if (cnt <= 8) - { -#if (TMS99XX_MODEL != TMS9995_ID) - value = readbyteX(cpustate, addr, src_map); -#else - /* just for once, tms9995 behaves like earlier 8-bit tms99xx chips */ - /* this must be because instruction decoding is too complex */ - value = readwordX(cpustate, addr & ~1, src_map); - if (addr & 1) - value &= 0xFF; - else - value = (value >> 8) & 0xFF; -#endif - - (void)READREG(cnt+cnt); /*dummy read (reasonnable guess for TMS9995 & TMS9900, ti990/10)*/ - - setst_byte_laep(cpustate, value); - } - else - { - value = readwordX(cpustate, addr, src_map); - - (void)READREG(cnt+cnt); /*dummy read (reasonnable guess for TMS9995 & TMS9900, ti990/10)*/ - - setst_lae(cpustate, value); - } - - #if HAS_PRIVILEGE - if (writeCRU(cpustate, (READREG(R12) >> 1), cnt, value) == CRU_PRIVILEGE_VIOLATION) - HANDLE_PRIVILEGE_VIOLATION - #else - writeCRU(cpustate, (READREG(R12) >> 1), cnt, value); - #endif - - CYCLES(4+cnt, 20 + cnt+cnt, 9 + cnt+cnt); - } - else - { /* STCR */ - /* STCR -- STore from CRu */ - /* S = CRU R12--CRU R12+D-1 */ - if (cnt <= 8) - { -#if (TMS99XX_MODEL != TMS9995_ID) - - (void)READREG(cnt+cnt); /*dummy read (reasonable guess for TMS9995 & TMS9900, ti990/10)*/ - // MZ: Read before write - int value2 = readwordX(cpustate, addr & ~1, src_map); - - #if HAS_PRIVILEGE - value = readCRU(cpustate, (READREG(R12) >> 1), cnt); - - if (value == CRU_PRIVILEGE_VIOLATION) - HANDLE_PRIVILEGE_VIOLATION - else - { - setst_byte_laep(cpustate, value); - writewordX(cpustate, addr, ((value << 8) & 0xff00) | (value2 & 0x00ff), src_map); - } - #else - value = readCRU(cpustate, (READREG(R12) >> 1), cnt); - setst_byte_laep(cpustate, value); - - writewordX(cpustate, addr, ((value << 8) & 0xff00) | (value2 & 0x00ff), src_map); - #endif - CYCLES(18+cnt, (cnt != 8) ? 42 : 44, 19 + cnt); -#else - /* just for once, tms9995 behaves like earlier 8-bit tms99xx chips */ - /* this must be because instruction decoding is too complex */ - int value2 = readwordX(cpustate, addr & ~1, src_map); - - (void)READREG(cnt+cnt); /*dummy read (reasonable guess for TMS9995 & TMS9900, ti990/10)*/ - - value = readCRU(cpustate, (READREG(R12) >> 1), cnt); - setst_byte_laep(cpustate, value); - - if (addr & 1) - writewordX(cpustate, addr & ~1, (value & 0x00FF) | (value2 & 0xFF00), src_map); - else - writewordX(cpustate, addr & ~1, (value2 & 0x00FF) | ((value << 8) & 0xFF00), src_map); - - CYCLES(Mooof!, Mooof!, 19 + cnt); -#endif - } - else - { - (void)readwordX(cpustate, addr, src_map); /*dummy read*/ - - (void)READREG(cnt+cnt); /*dummy read (reasonnable guess for TMS9995 & TMS9900, ti990/10)*/ - - #if HAS_PRIVILEGE - value = readCRU(cpustate, (READREG(R12) >> 1), cnt); - if (value == CRU_PRIVILEGE_VIOLATION) - HANDLE_PRIVILEGE_VIOLATION - else - { - setst_lae(cpustate, value); - writewordX(cpustate, addr, value, src_map); - } - #else - value = readCRU(cpustate, (READREG(R12) >> 1), cnt); - setst_lae(cpustate, value); - writewordX(cpustate, addr, value, src_map); - #endif - CYCLES(24+cnt, (cnt != 16) ? 58 : 60, 27 + cnt); - } - } -} - - -/*========================================================================== - Two-Operand instructions >4000->FFFF - --------------------------------------------------------------------------- - - 0 1 2 3-4 5 6 7+8 9 A B-C D E F - ---------------------------------- - |opcode|B|TD | D |TS | S | - ---------------------------------- - - SZC, SZCB, S, SB, C, CB, A, AB, MOV, MOVB, SOC, SOCB -============================================================================*/ - -/* word instructions */ -static void h4000w(tms99xx_state *cpustate, uint16_t opcode) -{ - register uint16_t src; - register uint16_t dest; - register uint16_t value; - -#if HAS_MAPPING - int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map; - int dst_map = (opcode & 0x0c00) ? cpustate->cur_dst_map : cpustate->cur_map; -#endif - - src = decipheraddr(cpustate, opcode) & ~1; - dest = decipheraddr(cpustate, opcode >> 6) & ~1; - - value = readwordX(cpustate, src, src_map); - - switch ((opcode >> 13) & 0x0007) /* ((opcode & 0xE000) >> 13) */ - { - case 2: /* SZC */ - /* SZC --- Set Zeros Corresponding */ - /* D &= ~S */ - value = readwordX(cpustate, dest, dst_map) & (~ value); - setst_lae(cpustate, value); - writewordX(cpustate, dest, value, dst_map); - CYCLES(2, 14, 4); - break; - case 3: /* S */ - /* S ----- Subtract */ - /* D -= S */ - value = setst_sub_laeco(cpustate, readwordX(cpustate, dest, dst_map), value); - writewordX(cpustate, dest, value, dst_map); - CYCLES(2, 14, 4); - break; - case 4: /* C */ - /* C ----- Compare */ - /* ST = (D - S) */ - setst_c_lae(cpustate, readwordX(cpustate, dest, dst_map), value); - CYCLES(5, 14, 4); - break; - case 5: /* A */ - /* A ----- Add */ - /* D += S */ - value = setst_add_laeco(cpustate, readwordX(cpustate, dest, dst_map), value); - writewordX(cpustate, dest, value, dst_map); - CYCLES(2, 14, 4); - break; - case 6: /* MOV */ - /* MOV --- MOVe */ - /* D = S */ - setst_lae(cpustate, value); - #if ((TMS99XX_MODEL >= TMS9900_ID) && (TMS99XX_MODEL <= TMS9985_ID)) - /* MOV performs a dummy read with tms9900/9980 (but neither ti990/10 nor tms9995) */ - (void)readwordX(cpustate, dest, dst_map); - #endif - writewordX(cpustate, dest, value, dst_map); - CYCLES(1, 14, 3); - break; - case 7: /* SOC */ - /* SOC --- Set Ones Corresponding */ - /* D |= S */ - value = value | readwordX(cpustate, dest, dst_map); - setst_lae(cpustate, value); - writewordX(cpustate, dest, value, dst_map); - CYCLES(2, 14, 4); - break; - } -} - -/* byte instruction */ -static void h4000b(tms99xx_state *cpustate, uint16_t opcode) -{ - register uint16_t src; - register uint16_t dest; - register uint16_t value; - -#if HAS_MAPPING - int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map; - int dst_map = (opcode & 0x0c00) ? cpustate->cur_dst_map : cpustate->cur_map; -#endif - - src = decipheraddrbyte(cpustate, opcode); - dest = decipheraddrbyte(cpustate, opcode >> 6); - - value = readbyteX(cpustate, src, src_map); - - switch ((opcode >> 13) & 0x0007) /* ((opcode & 0xE000) >> 13) */ - { - case 2: /* SZCB */ - /* SZCB -- Set Zeros Corresponding, Byte */ - /* D &= ~S */ - value = readbyteX(cpustate, dest, dst_map) & (~ value); - setst_byte_laep(cpustate, value); - writebyteX(cpustate, dest, value, dst_map); - CYCLES(3, 14, 4); - break; - case 3: /* SB */ - /* SB ---- Subtract, Byte */ - /* D -= S */ - value = setst_subbyte_laecop(cpustate, readbyteX(cpustate, dest, dst_map), value); - writebyteX(cpustate, dest, value, dst_map); - CYCLES(3, 14, 4); - break; - case 4: /* CB */ - /* CB ---- Compare Bytes */ - /* ST = (D - S) */ - setst_c_lae(cpustate, readbyteX(cpustate, dest, dst_map)<<8, value<<8); - cpustate->lastparity = value; - CYCLES(5, 14, 4); - break; - case 5: /* AB */ - /* AB ---- Add, Byte */ - /* D += S */ - value = setst_addbyte_laecop(cpustate, readbyteX(cpustate, dest, dst_map), value); - writebyteX(cpustate, dest, value, dst_map); - CYCLES(3, 14, 4); - break; - case 6: /* MOVB */ - /* MOVB -- MOVe Bytes */ - /* D = S */ - setst_byte_laep(cpustate, value); - #if (TMS99XX_MODEL <= TMS9985_ID) - /* On ti990/10 and tms9900, MOVB needs to read destination, because it cannot actually - read one single byte. It reads a word, replaces the relevant byte, then write - the result. A tms9980 should not need to do so, but still does, because it is just - a tms9900 with a 16 to 8 bit multiplexer (instead of a new chip design, like tms9995). */ - (void)readbyteX(cpustate, dest, dst_map); - #endif - writebyteX(cpustate, dest, value, dst_map); - CYCLES(3, 14, 3); - break; - case 7: /* SOCB */ - /* SOCB -- Set Ones Corresponding, Byte */ - /* D |= S */ - value = value | readbyteX(cpustate, dest, dst_map); - setst_byte_laep(cpustate, value); - writebyteX(cpustate, dest, value, dst_map); - CYCLES(3, 14, 4); - break; - } -} - - -static inline void execute(tms99xx_state *cpustate, uint16_t opcode) -{ -#if (! HAS_9995_OPCODES) - - /* tms9900-like instruction set*/ - - static void (*const jumptable_short[128])(tms99xx_state *,uint16_t) = - { - &illegal,&h0200,&h0400,&h0400,&h0800,&h0800,&illegal,&illegal, - &h1000,&h1000,&h1000,&h1000,&h1000,&h1000,&h1000,&h1000, - &h2000,&h2000,&h2000,&h2000,&h2000,&h2000,&xop,&xop, - &ldcr_stcr,&ldcr_stcr,&ldcr_stcr,&ldcr_stcr,&h2000,&h2000,&h2000,&h2000, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b - }; - - (* jumptable_short[opcode >> 9])(cpustate, opcode); - -#else - - /* tms9989 and tms9995 include 4 extra instructions, and one additionnal instruction type */ - /* tms99000 includes yet another additional instruction */ - - static void (*const jumptable_long[256])(tms99xx_state *,uint16_t) = - { - &h0040,&h0100,&h0200,&h0200,&h0400,&h0400,&h0400,&h0400, - &h0800,&h0800,&h0800,&h0800,&illegal,&illegal,&illegal,&illegal, - &h1000,&h1000,&h1000,&h1000,&h1000,&h1000,&h1000,&h1000, - &h1000,&h1000,&h1000,&h1000,&h1000,&h1000,&h1000,&h1000, - &h2000,&h2000,&h2000,&h2000,&h2000,&h2000,&h2000,&h2000, - &h2000,&h2000,&h2000,&h2000,&xop,&xop,&xop,&xop, - &ldcr_stcr,&ldcr_stcr,&ldcr_stcr,&ldcr_stcr,&ldcr_stcr,&ldcr_stcr,&ldcr_stcr,&ldcr_stcr, - &h2000,&h2000,&h2000,&h2000,&h2000,&h2000,&h2000,&h2000, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w,&h4000w, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b, - &h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b,&h4000b - }; - - (* jumptable_long[opcode >> 8])(cpustate, opcode); - -#endif -} - -/************************************************************************** - * Generic set_info - **************************************************************************/ - -static CPU_SET_INFO( tms99xx ) -{ - tms99xx_state *cpustate = get_safe_token(device); - switch (state) - { - /* --- the following bits of info are set as 64-bit signed integers --- */ - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: tms99xx_set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break; - case CPUINFO_INT_INPUT_STATE + 0: tms99xx_set_irq_line(cpustate, 0, info->i); break; - case CPUINFO_INT_INPUT_STATE + 1: tms99xx_set_irq_line(cpustate, 1, info->i); break; - case CPUINFO_INT_INPUT_STATE + 2: tms99xx_set_irq_line(cpustate, 2, info->i); break; - -#if (TMS99XX_MODEL == TI990_10_ID) - case CPUINFO_INT_PC: - { - const unsigned top = (cpustate->cur_map == 0) ? 0xf800 : 0x10000; - - if ((cpustate->cur_map == 0) && (info->i >= 0x1ff800)) - /* intercept TPCS and CPU ROM */ - cpustate->PC = info->i - 0x1f0000; - else if (! cpustate->mapping_on) - cpustate->PC = (info->i < top) ? info->i : 0; - else - { - if ((info->i >= cpustate->map_files[cpustate->cur_map].bias[0]) - && (info->i <= (cpustate->map_files[cpustate->cur_map].bias[0]+cpustate->map_files[cpustate->cur_map].limit[0]))) - cpustate->PC = info->i - cpustate->map_files[cpustate->cur_map].bias[0]; - else if ((info->i > (cpustate->map_files[cpustate->cur_map].bias[1]+cpustate->map_files[cpustate->cur_map].limit[0])) - && (info->i <= (cpustate->map_files[cpustate->cur_map].bias[1]+cpustate->map_files[cpustate->cur_map].limit[1]))) - cpustate->PC = info->i - cpustate->map_files[cpustate->cur_map].bias[1]; - else if ((info->i > (cpustate->map_files[cpustate->cur_map].bias[2]+cpustate->map_files[cpustate->cur_map].limit[0])) - && (info->i > (cpustate->map_files[cpustate->cur_map].bias[2]+cpustate->map_files[cpustate->cur_map].limit[1])) - && (info->i <= (cpustate->map_files[cpustate->cur_map].bias[2]+cpustate->map_files[cpustate->cur_map].limit[2]))) - cpustate->PC = info->i - cpustate->map_files[cpustate->cur_map].bias[2]; - else - { - /*if ((info->i < top) - && (info->i > cpustate->map_files[cpustate->cur_map].limit[0]) - && (info->i > cpustate->map_files[cpustate->cur_map].limit[1]) - && (info->i > cpustate->map_files[cpustate->cur_map].limit[2])) - cpustate->PC = info->i; - else*/ - cpustate->PC = 0; - } - /*if (info->i >= top) - cpustate->PC = 0;*/ - } - cpustate->PC &= 0xfffe; - } - break; -#else - case CPUINFO_INT_PC: -#endif - case CPUINFO_INT_REGISTER + TMS9900_PC: cpustate->PC = info->i & 0xfffe; break; - case CPUINFO_INT_REGISTER + TMS9900_IR: cpustate->IR = info->i; break; - case CPUINFO_INT_SP: - case CPUINFO_INT_REGISTER + TMS9900_WP: cpustate->WP = info->i & 0xfffe; break; - case CPUINFO_INT_REGISTER + TMS9900_STATUS: cpustate->STATUS = info->i; getstat(cpustate); break; - case CPUINFO_INT_REGISTER + TMS9900_R0: WRITEREG_DEBUG(cpustate, R0, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R1: WRITEREG_DEBUG(cpustate, R1, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R2: WRITEREG_DEBUG(cpustate, R2, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R3: WRITEREG_DEBUG(cpustate, R3, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R4: WRITEREG_DEBUG(cpustate, R4, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R5: WRITEREG_DEBUG(cpustate, R5, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R6: WRITEREG_DEBUG(cpustate, R6, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R7: WRITEREG_DEBUG(cpustate, R7, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R8: WRITEREG_DEBUG(cpustate, R8, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R9: WRITEREG_DEBUG(cpustate, R9, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R10: WRITEREG_DEBUG(cpustate, R10, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R11: WRITEREG_DEBUG(cpustate, R11, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R12: WRITEREG_DEBUG(cpustate, R12, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R13: WRITEREG_DEBUG(cpustate, R13, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R14: WRITEREG_DEBUG(cpustate, R14, info->i); break; - case CPUINFO_INT_REGISTER + TMS9900_R15: WRITEREG_DEBUG(cpustate, R15, info->i); break; - } -} - - - -/************************************************************************** - * Generic get_info - **************************************************************************/ - -void TMS99XX_GET_INFO(legacy_cpu_device *device, uint32_t state, cpuinfo *info) -{ - tms99xx_state *cpustate = (device != nullptr && device->token() != nullptr) ? get_safe_token(device) : nullptr; - switch (state) - { - /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms99xx_state); break; - case CPUINFO_INT_INPUT_LINES: info->i = 3; break; - case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; - case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break; - case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break; - case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break; - case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break; - case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6;/*8 with 990/12, 99105, 99110*/break; - case CPUINFO_INT_MIN_CYCLES: info->i = 1; break; - case CPUINFO_INT_MAX_CYCLES: info->i = 10;/*TODO: compute this value*/break; - -#if (USE_16_BIT_ACCESSORS) - case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break; -#else - case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break; -#endif - case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: -#if (TMS99XX_MODEL == TI990_10_ID) - /* this CPU has a mapper to expand the address space */ - info->i = 21; -#elif (TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) || (TMS99XX_MODEL == TMS9995_ID) - /* basic 16-bit address bus */ - info->i = 16; -#elif (TMS99XX_MODEL == TMS9980_ID) - /* 2 address MSBits are unconnected */ - info->i = 14; -#else - #warning "Please check how many address bits your CPU has." - info->i = 16; -#endif - break; - case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break; - case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break; - case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: -#if (TMS99XX_MODEL == TI990_10_ID) - /* 3 MSBs do exist, although they are not connected (don't ask...) */ - info->i = 15; -#elif (TMS99XX_MODEL == TMS9900_ID) - /* 3 MSBs are external instruction code */ - info->i = 12; -#elif (TMS99XX_MODEL == TMS9980_ID) - /* 2 bits unused, and 2 MSBs are external instruction code */ - info->i = 13; -#elif (TMS99XX_MODEL == TMS9940_ID) - /* 9 internal address lines (8 external) */ - info->i = 9; -#elif (TMS99XX_MODEL == TMS9995_ID) - /* 15-bit address and data bus lines D0-D2 provide the external instruction code */ - info->i = 15+3; -#else - #warning "I don't know how your processor handles CRU." - info->i = 15; -#endif - break; - case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break; - -/* not implemented */ -/* case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = get_irq_line(INPUT_LINE_NMI); break; - case CPUINFO_INT_INPUT_STATE + 0: info->i = get_irq_line(0); break; - case CPUINFO_INT_INPUT_STATE + 1: info->i = get_irq_line(1); break; - case CPUINFO_INT_INPUT_STATE + 2: info->i = get_irq_line(2); break;*/ - - case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break; - -#if (TMS99XX_MODEL == TI990_10_ID) - case CPUINFO_INT_PC: - if ((cpustate->cur_map == 0) && (cpustate->PC >= 0xf800)) - /* intercept TPCS and CPU ROM */ - info->i = 0x1f0000+cpustate->PC; - else if (! cpustate->mapping_on) - info->i = cpustate->PC; - else - { - int map_index; - - if (cpustate->PC <= cpustate->map_files[cpustate->cur_map].limit[0]) - map_index = 0; - else if (cpustate->PC <= cpustate->map_files[cpustate->cur_map].limit[1]) - map_index = 1; - else if (cpustate->PC <= cpustate->map_files[cpustate->cur_map].limit[2]) - map_index = 2; - else - { - info->i = cpustate->PC; - break; - } - - info->i = cpustate->map_files[cpustate->cur_map].bias[map_index]+cpustate->PC; - } - break; -#else - case CPUINFO_INT_PC: -#endif - case CPUINFO_INT_REGISTER + TMS9900_PC: info->i = cpustate->PC; break; - case CPUINFO_INT_REGISTER + TMS9900_IR: info->i = cpustate->IR; break; - case CPUINFO_INT_SP: - case CPUINFO_INT_REGISTER + TMS9900_WP: info->i = cpustate->WP; break; - case CPUINFO_INT_REGISTER + TMS9900_STATUS: setstat(cpustate); info->i = cpustate->STATUS; break; - case CPUINFO_INT_REGISTER + TMS9900_R0: info->i = READREG_DEBUG(cpustate, R0); break; - case CPUINFO_INT_REGISTER + TMS9900_R1: info->i = READREG_DEBUG(cpustate, R1); break; - case CPUINFO_INT_REGISTER + TMS9900_R2: info->i = READREG_DEBUG(cpustate, R2); break; - case CPUINFO_INT_REGISTER + TMS9900_R3: info->i = READREG_DEBUG(cpustate, R3); break; - case CPUINFO_INT_REGISTER + TMS9900_R4: info->i = READREG_DEBUG(cpustate, R4); break; - case CPUINFO_INT_REGISTER + TMS9900_R5: info->i = READREG_DEBUG(cpustate, R5); break; - case CPUINFO_INT_REGISTER + TMS9900_R6: info->i = READREG_DEBUG(cpustate, R6); break; - case CPUINFO_INT_REGISTER + TMS9900_R7: info->i = READREG_DEBUG(cpustate, R7); break; - case CPUINFO_INT_REGISTER + TMS9900_R8: info->i = READREG_DEBUG(cpustate, R8); break; - case CPUINFO_INT_REGISTER + TMS9900_R9: info->i = READREG_DEBUG(cpustate, R9); break; - case CPUINFO_INT_REGISTER + TMS9900_R10: info->i = READREG_DEBUG(cpustate, R10); break; - case CPUINFO_INT_REGISTER + TMS9900_R11: info->i = READREG_DEBUG(cpustate, R11); break; - case CPUINFO_INT_REGISTER + TMS9900_R12: info->i = READREG_DEBUG(cpustate, R12); break; - case CPUINFO_INT_REGISTER + TMS9900_R13: info->i = READREG_DEBUG(cpustate, R13); break; - case CPUINFO_INT_REGISTER + TMS9900_R14: info->i = READREG_DEBUG(cpustate, R14); break; - case CPUINFO_INT_REGISTER + TMS9900_R15: info->i = READREG_DEBUG(cpustate, R15); break; - - /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms99xx); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms99xx); break; - case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms99xx); break; - case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms99xx); break; - case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms99xx); break; - case CPUINFO_FCT_BURN: info->burn = nullptr; break; - case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms99xx); break; - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; - - /* --- the following bits of info are returned as NULL-terminated strings --- */ - case CPUINFO_STR_NAME: strcpy(info->s, TMS99XX_device_get_name); break; - case CPUINFO_STR_SHORTNAME: strcpy(info->s, TMS99XX_device_get_shortname); break; - - case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments 9900L"); break; - case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break; - case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; - case CPUINFO_STR_CREDITS: strcpy(info->s, "C TMS9900 emulator by Edward Swartz, initially converted for Mame by M.Coates, updated by R. Nabet"); break; - - case CPUINFO_STR_FLAGS: - sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c", - cpustate->WP & 0x8000 ? 'L':'.', - cpustate->WP & 0x4000 ? 'A':'.', - cpustate->WP & 0x2000 ? 'E':'.', - cpustate->WP & 0x1000 ? 'C':'.', - cpustate->WP & 0x0800 ? 'V':'.', - cpustate->WP & 0x0400 ? 'P':'.', - cpustate->WP & 0x0200 ? 'X':'.', - cpustate->WP & 0x0100 ? '?':'.', - cpustate->WP & 0x0080 ? '?':'.', - cpustate->WP & 0x0040 ? '?':'.', - cpustate->WP & 0x0020 ? '?':'.', - cpustate->WP & 0x0010 ? '?':'.', - cpustate->WP & 0x0008 ? 'I':'.', - cpustate->WP & 0x0004 ? 'I':'.', - cpustate->WP & 0x0002 ? 'I':'.', - cpustate->WP & 0x0001 ? 'I':'.'); - break; - - case CPUINFO_STR_REGISTER + TMS9900_PC: sprintf(info->s, "PC :%04X", cpustate->PC); break; - case CPUINFO_STR_REGISTER + TMS9900_IR: sprintf(info->s, "IR :%04X", cpustate->IR); break; - case CPUINFO_STR_REGISTER + TMS9900_WP: sprintf(info->s, "WP :%04X", cpustate->WP); break; - case CPUINFO_STR_REGISTER + TMS9900_STATUS: sprintf(info->s, "ST :%04X", cpustate->STATUS); break; - - case CPUINFO_STR_REGISTER + TMS9900_R0: sprintf(info->s, "R0 :%04X", READREG_DEBUG(cpustate, R0)); break; - case CPUINFO_STR_REGISTER + TMS9900_R1: sprintf(info->s, "R1 :%04X", READREG_DEBUG(cpustate, R1)); break; - case CPUINFO_STR_REGISTER + TMS9900_R2: sprintf(info->s, "R2 :%04X", READREG_DEBUG(cpustate, R2)); break; - case CPUINFO_STR_REGISTER + TMS9900_R3: sprintf(info->s, "R3 :%04X", READREG_DEBUG(cpustate, R3)); break; - case CPUINFO_STR_REGISTER + TMS9900_R4: sprintf(info->s, "R4 :%04X", READREG_DEBUG(cpustate, R4)); break; - case CPUINFO_STR_REGISTER + TMS9900_R5: sprintf(info->s, "R5 :%04X", READREG_DEBUG(cpustate, R5)); break; - case CPUINFO_STR_REGISTER + TMS9900_R6: sprintf(info->s, "R6 :%04X", READREG_DEBUG(cpustate, R6)); break; - case CPUINFO_STR_REGISTER + TMS9900_R7: sprintf(info->s, "R7 :%04X", READREG_DEBUG(cpustate, R7)); break; - case CPUINFO_STR_REGISTER + TMS9900_R8: sprintf(info->s, "R8 :%04X", READREG_DEBUG(cpustate, R8)); break; - case CPUINFO_STR_REGISTER + TMS9900_R9: sprintf(info->s, "R9 :%04X", READREG_DEBUG(cpustate, R9)); break; - case CPUINFO_STR_REGISTER + TMS9900_R10: sprintf(info->s, "R10:%04X", READREG_DEBUG(cpustate, R10)); break; - case CPUINFO_STR_REGISTER + TMS9900_R11: sprintf(info->s, "R11:%04X", READREG_DEBUG(cpustate, R11)); break; - case CPUINFO_STR_REGISTER + TMS9900_R12: sprintf(info->s, "R12:%04X", READREG_DEBUG(cpustate, R12)); break; - case CPUINFO_STR_REGISTER + TMS9900_R13: sprintf(info->s, "R13:%04X", READREG_DEBUG(cpustate, R13)); break; - case CPUINFO_STR_REGISTER + TMS9900_R14: sprintf(info->s, "R14:%04X", READREG_DEBUG(cpustate, R14)); break; - case CPUINFO_STR_REGISTER + TMS9900_R15: sprintf(info->s, "R15:%04X", READREG_DEBUG(cpustate, R15)); break; - } -} diff --git a/src/devices/cpu/tms9900/tms9900.cpp b/src/devices/cpu/tms9900/tms9900.cpp index a189d2e0a94..9bac8fdf937 100644 --- a/src/devices/cpu/tms9900/tms9900.cpp +++ b/src/devices/cpu/tms9900/tms9900.cpp @@ -101,6 +101,10 @@ - State save - HOLD state should be tested; I don't have test cases yet + + Previous implementation with valuable info inside: + https://github.com/mamedev/mame/blob/677ec78eb50decdc40fad3d30daa3560feaff3cc/src/devices/cpu/tms9900/99xxcore.h + Michael Zapf, June 2012 */ diff --git a/src/devices/machine/68230pit.cpp b/src/devices/machine/68230pit.cpp index 14add04b023..dc8ff6c5629 100644 --- a/src/devices/machine/68230pit.cpp +++ b/src/devices/machine/68230pit.cpp @@ -27,12 +27,12 @@ #define VERBOSE 0 -#define LOGPRINT(x) do { if (VERBOSE) logerror x; } while (0) -#define LOG(x) -#define LOGR(x) -#define LOGINT(x) LOGPRINT(x) -#define LOGSETUP(x) LOGPRINT(x) -#if VERBOSE == 2 +#define LOGPRINT(x) { do { if (VERBOSE) logerror x; } while (0); } +#define LOG(x) {} LOGPRINT(x) +#define LOGR(x) {} LOGPRINT(x) +#define LOGINT(x) {} LOGPRINT(x) +#define LOGSETUP(x) {} LOGPRINT(x) +#if VERBOSE > 1 #define logerror printf #endif @@ -207,7 +207,7 @@ void pit68230_device::device_timer (emu_timer &timer, device_timer_id id, int32_ } break; default: - LOG(("Unhandled Timer ID %d\n", id)); + LOGINT(("Unhandled Timer ID %d\n", id)); break; } } @@ -235,18 +235,29 @@ static int32_t ow_ofs = 0; void pit68230_device::wr_pitreg_pgcr(uint8_t data) { LOG(("%s(%02x) \"%s\": %s - %02x\n", FUNCNAME, data, tag(), FUNCNAME, data)); + LOGSETUP(("PGCR - Mode %d,", (data >> 6) & 3 )); + LOGSETUP((" H34:%s, H12:%s,", (data & 0x20) ? "enabled" : "disabled", (data & 0x10) ? "enabled" : "disabled" )); + LOGSETUP((" Sense assert H4:%s, H3:%s, H2:%s, H1:%s\n", + data & 0x04 ? "Hi" : "Lo", data & 0x03 ? "Hi" : "Lo", + data & 0x02 ? "Hi" : "Lo", data & 0x01 ? "Hi" : "Lo")); m_pgcr = data; } void pit68230_device::wr_pitreg_psrr(uint8_t data) { LOG(("%s(%02x) \"%s\": %s - %02x\n", FUNCNAME, data, tag(), FUNCNAME, data)); + LOGSETUP(("PSSR - %s pin activated,", data & 0x40 ? "DMA" : "PC4")); + LOGSETUP((" %s pin support %s interrupts,", data & 0x80 ? "PIRQ" : "PC5", + data & 0x08 ? "no" : (data & 0x10 ? "vectored" : "autovectored" ) )); + LOGSETUP((" H prio mode:%d\n", data & 0x03 )); + m_psrr = data; } void pit68230_device::wr_pitreg_paddr(uint8_t data) { LOG(("%s(%02x) \"%s\": %s - %02x\n", FUNCNAME, data, tag(), FUNCNAME, data)); + LOGSETUP(("PADDR")); m_paddr = data; } @@ -508,11 +519,14 @@ WRITE8_MEMBER (pit68230_device::write) #if VERBOSE > 2 if (offset != ow_ofs || data != ow_data || ow_cnt >= 1000) { - logerror ("\npit68230_device::write: previous identical operation performed %02x times\n", ow_cnt); + if (ow_cnt > 1) + { + logerror ("\npit68230_device::write: previous identical operation performed %02x times\n", ow_cnt); + logerror ("pit68230_device::write: offset=%02x data=%02x %lld\n", offset, data, machine ().firstcpu->total_cycles ()); + } ow_cnt = 0; ow_data = data; ow_ofs = offset; - logerror ("pit68230_device::write: offset=%02x data=%02x %lld\n", ow_ofs, ow_data, machine ().firstcpu->total_cycles ()); } else ow_cnt++; @@ -535,7 +549,7 @@ uint8_t pit68230_device::rr_pitreg_pgcr() uint8_t pit68230_device::rr_pitreg_psrr() { LOGR(("%s %s <- %02x\n",tag(), FUNCNAME, m_psrr)); - return m_psrr; + return m_psrr & 0x7f; // mask out unused bits } uint8_t pit68230_device::rr_pitreg_paddr() @@ -731,14 +745,20 @@ READ8_MEMBER (pit68230_device::read){ #if VERBOSE > 2 if (offset != or_ofs || data != or_data || or_cnt >= 1000) { - logerror ("\npit68230_device::read: previous identical operation performed %02x times\n", or_cnt); + LOGSETUP((" * %s Reg %02x -> %02x \n", tag(), offset, data)); + if (or_cnt > 1) + { + logerror ("\npit68230_device::read: previous identical operation performed %02x times\n", or_cnt); + logerror (" - pit68230_device::read: offset=%02x data=%02x %lld\n", offset, data, machine ().firstcpu->total_cycles ()); + } or_cnt = 0; or_data = data; or_ofs = offset; - logerror ("pit68230_device::read: offset=%02x data=%02x %lld\n", or_ofs, or_data, machine ().firstcpu->total_cycles ()); } else + { or_cnt++; + } #endif return data; diff --git a/src/devices/machine/ataflash.cpp b/src/devices/machine/ataflash.cpp index 7ff624a5421..21c5289138d 100644 --- a/src/devices/machine/ataflash.cpp +++ b/src/devices/machine/ataflash.cpp @@ -2,23 +2,16 @@ // copyright-holders:smf #include "ataflash.h" -#define IDE_COMMAND_TAITO_GNET_UNLOCK_1 0xfe -#define IDE_COMMAND_TAITO_GNET_UNLOCK_2 0xfc -#define IDE_COMMAND_TAITO_GNET_UNLOCK_3 0x0f - const device_type ATA_FLASH_PCCARD = &device_creator<ata_flash_pccard_device>; ata_flash_pccard_device::ata_flash_pccard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - ide_hdd_device(mconfig, ATA_FLASH_PCCARD, "ATA Flash PCCARD", tag, owner, clock, "ataflash", __FILE__), m_gnetreadlock(0), m_locked(0) + ide_hdd_device(mconfig, ATA_FLASH_PCCARD, "ATA Flash PCCARD", tag, owner, clock, "ataflash", __FILE__) { } -void ata_flash_pccard_device::device_start() +ata_flash_pccard_device::ata_flash_pccard_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) + : ide_hdd_device(mconfig, type, name, tag, owner, clock, shortname, source) { - ide_hdd_device::device_start(); - - save_item(NAME(m_locked)); - save_item(NAME(m_gnetreadlock)); } void ata_flash_pccard_device::device_reset() @@ -26,19 +19,16 @@ void ata_flash_pccard_device::device_reset() ide_hdd_device::device_reset(); uint32_t metalength; - memset(m_key, 0, sizeof(m_key)); memset(m_cis, 0xff, 512); if (m_handle != nullptr) { m_handle->read_metadata(PCMCIA_CIS_METADATA_TAG, 0, m_cis, 512, metalength); - - if (m_handle->read_metadata(HARD_DISK_KEY_METADATA_TAG, 0, m_key, 5, metalength) == CHDERR_NONE) - { - m_locked = 0x1ff; - m_gnetreadlock = 1; - } } + + m_configuration_option = 0; + m_configuration_and_status = 0; + m_pin_replacement = 0x002e; } READ16_MEMBER( ata_flash_pccard_device::read_memory ) @@ -73,37 +63,109 @@ WRITE16_MEMBER( ata_flash_pccard_device::write_memory ) READ16_MEMBER( ata_flash_pccard_device::read_reg ) { - if(offset < 0x100) - return m_cis[offset]; - - switch(offset) + switch (offset) { case 0x100: - return 0x0041; + return m_configuration_option; case 0x101: - return 0x0080; + return m_configuration_and_status; case 0x102: - return 0x002e; + return m_pin_replacement; + + default: + if (offset < 0x100) + return m_cis[offset]; + } + + return pccard_interface::read_reg(space, offset, mem_mask); +} + +WRITE16_MEMBER( ata_flash_pccard_device::write_reg ) +{ + /// TODO: get offsets from CIS + switch (offset) + { + case 0x07: + // TODO: figure out what this is + /// taito type 1: 0x0e, 0x0a (after unlock) + /// taito type 2: 0xdf, 0xdf (before unlock) + /// taito compact 0x0c, 0x0c, 0x0c, 0x0c (before unlock) + // logerror("unknown reg 0x07 %02x\n", data); + break; + + case 0x100: + m_configuration_option = data; + break; + + case 0x101: + // TODO: irq ack + m_configuration_and_status = data; + break; + + default: + pccard_interface::write_reg(space, offset, data, mem_mask); + break; + } +} + +attotime ata_flash_pccard_device::seek_time() +{ + return attotime::zero; +} + + +const device_type TAITO_PCCARD1 = &device_creator<taito_pccard1_device>; + +taito_pccard1_device::taito_pccard1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + ata_flash_pccard_device(mconfig, TAITO_PCCARD1, "Taito PC-CARD (Type 1)", tag, owner, clock, "taito_pccard1", __FILE__), + m_locked(0) +{ +} +void taito_pccard1_device::device_start() +{ + ata_flash_pccard_device::device_start(); + + save_item(NAME(m_locked)); +} + +void taito_pccard1_device::device_reset() +{ + ata_flash_pccard_device::device_reset(); + + uint32_t metalength; + memset(m_key, 0, sizeof(m_key)); + + if (m_handle != nullptr && m_handle->read_metadata(HARD_DISK_KEY_METADATA_TAG, 0, m_key, 5, metalength) == CHDERR_NONE) + { + m_locked = 0x1ff; + } +} + +READ16_MEMBER(taito_pccard1_device::read_reg) +{ + switch (offset) + { case 0x201: - return m_gnetreadlock; + return m_locked != 0; default: - return 0; + return ata_flash_pccard_device::read_reg(space, offset, mem_mask); } } -WRITE16_MEMBER( ata_flash_pccard_device::write_reg ) +WRITE16_MEMBER(taito_pccard1_device::write_reg) { - if(offset >= 0x280 && offset <= 0x288 && m_handle != nullptr) + if (offset >= 0x280 && offset <= 0x288) { uint8_t v = data; int pos = offset - 0x280; uint8_t k = pos < sizeof(m_key) ? m_key[pos] : 0; - if(v == k) + // TODO: find out if unlocking the key then using an incorrect key will re-lock the card. + if (v == k) { m_locked &= ~(1 << pos); } @@ -112,19 +174,68 @@ WRITE16_MEMBER( ata_flash_pccard_device::write_reg ) m_locked |= 1 << pos; } - if (!m_locked) + // logerror("unlock %d %02x %04x\n", pos, data, m_locked); + } + else + { + ata_flash_pccard_device::write_reg(space, offset, data, mem_mask); + } +} + +void taito_pccard1_device::process_command() +{ + m_buffer_size = IDE_DISK_SECTOR_SIZE; + + switch (m_command) + { + default: + if (m_locked != 0) { - m_gnetreadlock = 0; + m_status |= IDE_STATUS_ERR; + m_error = IDE_ERROR_NONE; + m_status &= ~IDE_STATUS_DRDY; + return; } + break; } + + ata_flash_pccard_device::process_command(); +} + +bool taito_pccard1_device::is_ready() +{ + return m_locked == 0; +} + +const device_type TAITO_PCCARD2 = &device_creator<taito_pccard2_device>; + +taito_pccard2_device::taito_pccard2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + ata_flash_pccard_device(mconfig, TAITO_PCCARD1, "Taito PC-CARD (Type 2)", tag, owner, clock, "taito_pccard2", __FILE__), + m_locked(false) +{ +} + +void taito_pccard2_device::device_start() +{ + ata_flash_pccard_device::device_start(); + + save_item(NAME(m_locked)); } -bool ata_flash_pccard_device::is_ready() +void taito_pccard2_device::device_reset() { - return !m_gnetreadlock; + ata_flash_pccard_device::device_reset(); + + uint32_t metalength; + memset(m_key, 0, sizeof(m_key)); + + if (m_handle != nullptr && m_handle->read_metadata(HARD_DISK_KEY_METADATA_TAG, 0, m_key, 5, metalength) == CHDERR_NONE) + { + m_locked = true; + } } -void ata_flash_pccard_device::process_command() +void taito_pccard2_device::process_command() { m_buffer_size = IDE_DISK_SECTOR_SIZE; @@ -137,7 +248,7 @@ void ata_flash_pccard_device::process_command() m_status |= IDE_STATUS_DRDY; set_irq(ASSERT_LINE); - break; + return; case IDE_COMMAND_TAITO_GNET_UNLOCK_2: //LOGPRINT(("IDE GNET Unlock 2\n")); @@ -146,64 +257,121 @@ void ata_flash_pccard_device::process_command() m_status |= IDE_STATUS_DRQ; set_irq(ASSERT_LINE); - break; - - case IDE_COMMAND_TAITO_GNET_UNLOCK_3: - //LOGPRINT(("IDE GNET Unlock 3\n")); - - /* key check */ - if (m_feature == m_key[0] && m_sector_count == m_key[1] && m_sector_number == m_key[2] && m_cylinder_low == m_key[3] && m_cylinder_high == m_key[4]) - { - m_gnetreadlock = 0; - } - else - { - m_status &= ~IDE_STATUS_DRDY; - } - - set_irq(ASSERT_LINE); - break; + return; default: - if (m_gnetreadlock) + if (m_locked) { m_status |= IDE_STATUS_ERR; m_error = IDE_ERROR_NONE; m_status &= ~IDE_STATUS_DRDY; - break; + return; } - - ide_hdd_device::process_command(); break; } + + ata_flash_pccard_device::process_command(); } -void ata_flash_pccard_device::process_buffer() +void taito_pccard2_device::process_buffer() { if (m_command == IDE_COMMAND_TAITO_GNET_UNLOCK_2) { int i, bad = 0; - for (i=0; !bad && i<512; i++) - bad = ((i < 2 || i >= 7) && m_buffer[i]) || ((i >= 2 && i < 7) && m_buffer[i] != m_key[i-2]); + for (i = 0; !bad && i<512; i++) + bad = ((i < 2 || i >= 7) && m_buffer[i]) || ((i >= 2 && i < 7) && m_buffer[i] != m_key[i - 2]); if (bad) { + // TODO: find out if unlocking the key then using an incorrect key will re-lock the card. m_status |= IDE_STATUS_ERR; m_error = IDE_ERROR_NONE; } else { - m_gnetreadlock= 0; + m_locked = false; } + + // logerror("unlock %02x %02x %02x %02x %02x %d\n", m_buffer[2], m_buffer[3], m_buffer[4], m_buffer[5], m_buffer[6], m_locked); } else { - ide_hdd_device::process_buffer(); + ata_flash_pccard_device::process_buffer(); } } -attotime ata_flash_pccard_device::seek_time() +bool taito_pccard2_device::is_ready() { - return attotime::zero; + return !m_locked; +} + +const device_type TAITO_COMPACT_FLASH = &device_creator<taito_compact_flash_device>; + +taito_compact_flash_device::taito_compact_flash_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + ata_flash_pccard_device(mconfig, TAITO_COMPACT_FLASH, "Taito Compact Flash", tag, owner, clock, "taito_cf", __FILE__), + m_locked(false) +{ +} + +void taito_compact_flash_device::device_start() +{ + ata_flash_pccard_device::device_start(); + + save_item(NAME(m_locked)); +} + +void taito_compact_flash_device::device_reset() +{ + ata_flash_pccard_device::device_reset(); + + uint32_t metalength; + memset(m_key, 0, sizeof(m_key)); + + if (m_handle != nullptr && m_handle->read_metadata(HARD_DISK_KEY_METADATA_TAG, 0, m_key, 5, metalength) == CHDERR_NONE) + { + m_locked = true; + } +} + +void taito_compact_flash_device::process_command() +{ + m_buffer_size = IDE_DISK_SECTOR_SIZE; + + switch (m_command) + { + case IDE_COMMAND_TAITO_COMPACT_FLASH_UNLOCK: + /* key check */ + if (m_feature != m_key[0] || m_sector_count != m_key[1] || m_sector_number != m_key[2] || m_cylinder_low != m_key[3] || m_cylinder_high != m_key[4]) + { + // TODO: find out if unlocking the key then using an incorrect key will lock the re-card. + m_status &= ~IDE_STATUS_DRDY; // TODO: check if this is used as a flag to the unlock code, would it already be set this early? + } + else + { + m_locked = false; + } + + // logerror("unlock %02x %02x %02x %02x %02x %d\n", m_feature, m_sector_count, m_sector_number, m_cylinder_low, m_cylinder_high, m_locked); + + set_irq(ASSERT_LINE); + return; + + default: + if (m_locked) + { + m_status |= IDE_STATUS_ERR; + m_error = IDE_ERROR_NONE; + m_status &= ~IDE_STATUS_DRDY; + return; + } + break; + } + + ata_flash_pccard_device::process_command(); +} + +bool taito_compact_flash_device::is_ready() +{ + return !m_locked; } diff --git a/src/devices/machine/ataflash.h b/src/devices/machine/ataflash.h index d54d09d552b..55e46ff1c1c 100644 --- a/src/devices/machine/ataflash.h +++ b/src/devices/machine/ataflash.h @@ -15,6 +15,7 @@ class ata_flash_pccard_device : public ide_hdd_device, { public: ata_flash_pccard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + ata_flash_pccard_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); virtual DECLARE_READ16_MEMBER(read_memory) override; virtual DECLARE_WRITE16_MEMBER(write_memory) override; @@ -23,19 +24,78 @@ public: protected: // device-level overrides - virtual void device_start() override; virtual void device_reset() override; virtual attotime seek_time() override; + +private: + uint8_t m_cis[512]; + uint8_t m_configuration_option; + uint8_t m_configuration_and_status; + uint8_t m_pin_replacement; +}; + +extern const device_type TAITO_PCCARD1; + +class taito_pccard1_device : public ata_flash_pccard_device +{ +public: + taito_pccard1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual DECLARE_READ16_MEMBER(read_reg) override; + virtual DECLARE_WRITE16_MEMBER(write_reg) override; + +protected: + virtual void device_start() override; + virtual void device_reset() override; + virtual void process_command() override; + virtual bool is_ready() override; + +private: + uint8_t m_key[5]; + uint16_t m_locked; +}; + +extern const device_type TAITO_PCCARD2; + +class taito_pccard2_device : public ata_flash_pccard_device +{ +public: + taito_pccard2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override; + virtual void device_reset() override; virtual void process_command() override; virtual void process_buffer() override; virtual bool is_ready() override; + static const int IDE_COMMAND_TAITO_GNET_UNLOCK_1 = 0xfe; + static const int IDE_COMMAND_TAITO_GNET_UNLOCK_2 = 0xfc; + +private: + uint8_t m_key[5]; + bool m_locked; +}; + +extern const device_type TAITO_COMPACT_FLASH; + +class taito_compact_flash_device : public ata_flash_pccard_device +{ +public: + taito_compact_flash_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override; + virtual void device_reset() override; + virtual void process_command() override; + virtual bool is_ready() override; + + static const int IDE_COMMAND_TAITO_COMPACT_FLASH_UNLOCK = 0x0f; + private: - uint8_t m_cis[512]; uint8_t m_key[5]; - uint8_t m_gnetreadlock; - int m_locked; + bool m_locked; }; #endif diff --git a/src/devices/machine/fga002.cpp b/src/devices/machine/fga002.cpp index b97dfbe7dfc..8a985519e75 100644 --- a/src/devices/machine/fga002.cpp +++ b/src/devices/machine/fga002.cpp @@ -33,14 +33,15 @@ */ #define VERBOSE 0 -#define LOGPRINT(x) do { if (VERBOSE) logerror x; } while (0) -#define LOG(x) -#define LOGR(x) -#define LOGSETUP(x) -#define LOGINT(x) LOGPRINT(x) -#define LOGVEC(x) -#define LOGLVL(x) -#define LOGIACK(x) LOGPRINT(x) +#define LOGPRINT(x) { do { if (VERBOSE) logerror x; } while (0); } +#define LOG(x) {} LOGPRINT(x) +#define LOGR(x) {} LOGPRINT(x) +#define LOGSETUP(x) {} LOGPRINT(x) +#define LOGINT(x) {} LOGPRINT(x) +#define LOGVEC(x) {} LOGPRINT(x) +#define LOGLVL(x) {} LOGPRINT(x) +#define LOGIACK(x) {} LOGPRINT(x) + #if VERBOSE == 2 #define logerror printf #endif diff --git a/src/devices/machine/fga002.h b/src/devices/machine/fga002.h index 8722c96761e..b76908c765b 100644 --- a/src/devices/machine/fga002.h +++ b/src/devices/machine/fga002.h @@ -6,10 +6,6 @@ #include "emu.h" #include "cpu/m68000/m68000.h" // The FGA002 is designed for the 68K interrupt PL0-PL2 signalling, however used on Sparc and x86 boards too -#ifndef VERBOSE -#define LOG(x) -#endif - #define MCFG_FGA002_ADD(_tag, _clock) MCFG_DEVICE_ADD(_tag, FGA002, _clock) // LOCAL IRQ callbacks diff --git a/src/devices/machine/gt64xxx.cpp b/src/devices/machine/gt64xxx.cpp index 763f27be1e2..8f692abd3a1 100644 --- a/src/devices/machine/gt64xxx.cpp +++ b/src/devices/machine/gt64xxx.cpp @@ -183,7 +183,7 @@ void gt64xxx_device::map_cpu_space() // CS[0:3] //m_cpu_space->install_device_delegate(0x16000000, 0x17ffffff, machine().root_device(), m_cs_map[3].map); - typedef void (gt64xxx_device::*tramp_t)(::address_map &, device_t &); + typedef void (gt64xxx_device::*tramp_t)(::address_map &); static const tramp_t trampolines[4] = { >64xxx_device::map_trampoline<0>, >64xxx_device::map_trampoline<1>, diff --git a/src/devices/machine/gt64xxx.h b/src/devices/machine/gt64xxx.h index 15720d36897..ec537cf3ebe 100644 --- a/src/devices/machine/gt64xxx.h +++ b/src/devices/machine/gt64xxx.h @@ -292,10 +292,10 @@ private: // Chip Select galileo_device_map m_cs_map[4]; - template<int id> void map_trampoline(::address_map &map, device_t &device) { - m_cs_map[id].map(map, *m_cs_map[id].device); + template<int id> void map_trampoline(::address_map &map) { + m_cs_map[id].map(map); } - template <typename T> void install_cs_map(offs_t addrstart, offs_t addrend, void (T::*map)(::address_map &map, device_t &device), const char *name) { + template <typename T> void install_cs_map(offs_t addrstart, offs_t addrend, void (T::*map)(::address_map &map), const char *name) { //address_map_delegate delegate(map, name, static_cast<T *>(this)); address_map_delegate delegate(map, name, static_cast<T *>(this)); m_cpu_space->install_device_delegate(addrstart, addrend, *this, delegate); diff --git a/src/devices/machine/i6300esb.cpp b/src/devices/machine/i6300esb.cpp index 012ed9d6598..c79fb3c03f2 100644 --- a/src/devices/machine/i6300esb.cpp +++ b/src/devices/machine/i6300esb.cpp @@ -74,9 +74,11 @@ DEVICE_ADDRESS_MAP_START(config_map, 32, i6300esb_lpc_device) ADDRESS_MAP_END DEVICE_ADDRESS_MAP_START(internal_io_map, 32, i6300esb_lpc_device) + ; if(lpc_en & 0x2000) { AM_RANGE(0x004c, 0x004f) AM_READWRITE8(siu_config_port_r, siu_config_port_w, 0x00ff0000) AM_RANGE(0x004c, 0x004f) AM_READWRITE8(siu_data_port_r, siu_data_port_w, 0xff000000) + ; } AM_RANGE(0x0060, 0x0063) AM_READWRITE8( nmi_sc_r, nmi_sc_w, 0x0000ff00) diff --git a/src/devices/machine/i8155.cpp b/src/devices/machine/i8155.cpp index 7e0d80aaf03..74989e51f81 100644 --- a/src/devices/machine/i8155.cpp +++ b/src/devices/machine/i8155.cpp @@ -117,7 +117,7 @@ inline void i8155_device::timer_output() { m_out_to_cb(m_to); - if (LOG) logerror("8155 '%s' Timer Output: %u\n", tag(), m_to); + if (LOG) logerror("8155 Timer Output: %u\n", m_to); } inline void i8155_device::pulse_timer_output() @@ -170,7 +170,7 @@ inline uint8_t i8155_device::read_port(int port) default: // strobed mode not implemented yet - logerror("8155 '%s' Unsupported Port C mode!\n", tag()); + logerror("8155 Unsupported Port C mode!\n"); break; } @@ -292,7 +292,7 @@ void i8155_device::device_timer(emu_timer &timer, device_timer_id id, int param, if (m_counter == 0) { - if (LOG) logerror("8155 '%s' Timer Count Reached\n", tag()); + if (LOG) logerror("8155 Timer Count Reached\n"); switch (m_command & COMMAND_TM_MASK) { @@ -300,7 +300,7 @@ void i8155_device::device_timer(emu_timer &timer, device_timer_id id, int param, // stop timer m_timer->enable(0); - if (LOG) logerror("8155 '%s' Timer Stopped\n", tag()); + if (LOG) logerror("8155 Timer Stopped\n"); break; } @@ -399,28 +399,28 @@ void i8155_device::register_w(int offset, uint8_t data) case REGISTER_COMMAND: m_command = data; - if (LOG) logerror("8155 '%s' Port A Mode: %s\n", tag(), (data & COMMAND_PA) ? "output" : "input"); - if (LOG) logerror("8155 '%s' Port B Mode: %s\n", tag(), (data & COMMAND_PB) ? "output" : "input"); + if (LOG) logerror("8155 Port A Mode: %s\n", (data & COMMAND_PA) ? "output" : "input"); + if (LOG) logerror("8155 Port B Mode: %s\n", (data & COMMAND_PB) ? "output" : "input"); - if (LOG) logerror("8155 '%s' Port A Interrupt: %s\n", tag(), (data & COMMAND_IEA) ? "enabled" : "disabled"); - if (LOG) logerror("8155 '%s' Port B Interrupt: %s\n", tag(), (data & COMMAND_IEB) ? "enabled" : "disabled"); + if (LOG) logerror("8155 Port A Interrupt: %s\n", (data & COMMAND_IEA) ? "enabled" : "disabled"); + if (LOG) logerror("8155 Port B Interrupt: %s\n", (data & COMMAND_IEB) ? "enabled" : "disabled"); switch (data & COMMAND_PC_MASK) { case COMMAND_PC_ALT_1: - if (LOG) logerror("8155 '%s' Port C Mode: Alt 1\n", tag()); + if (LOG) logerror("8155 Port C Mode: Alt 1\n"); break; case COMMAND_PC_ALT_2: - if (LOG) logerror("8155 '%s' Port C Mode: Alt 2\n", tag()); + if (LOG) logerror("8155 Port C Mode: Alt 2\n"); break; case COMMAND_PC_ALT_3: - if (LOG) logerror("8155 '%s' Port C Mode: Alt 3\n", tag()); + if (LOG) logerror("8155 Port C Mode: Alt 3\n"); break; case COMMAND_PC_ALT_4: - if (LOG) logerror("8155 '%s' Port C Mode: Alt 4\n", tag()); + if (LOG) logerror("8155 Port C Mode: Alt 4\n"); break; } @@ -432,7 +432,7 @@ void i8155_device::register_w(int offset, uint8_t data) case COMMAND_TM_STOP: // NOP if timer has not started, stop counting if the timer is running - if (LOG) logerror("8155 '%s' Timer Command: Stop\n", tag()); + if (LOG) logerror("8155 Timer Command: Stop\n"); m_to = 1; timer_output(); m_timer->enable(0); @@ -440,11 +440,11 @@ void i8155_device::register_w(int offset, uint8_t data) case COMMAND_TM_STOP_AFTER_TC: // stop immediately after present TC is reached (NOP if timer has not started) - if (LOG) logerror("8155 '%s' Timer Command: Stop after TC\n", tag()); + if (LOG) logerror("8155 Timer Command: Stop after TC\n"); break; case COMMAND_TM_START: - if (LOG) logerror("8155 '%s' Timer Command: Start\n", tag()); + if (LOG) logerror("8155 Timer Command: Start\n"); if (m_timer->enabled()) { @@ -474,33 +474,33 @@ void i8155_device::register_w(int offset, uint8_t data) case REGISTER_TIMER_LOW: m_count_length = (m_count_length & 0xff00) | data; - if (LOG) logerror("8155 '%s' Count Length Low: %04x\n", tag(), m_count_length); + if (LOG) logerror("8155 Count Length Low: %04x\n", m_count_length); break; case REGISTER_TIMER_HIGH: m_count_length = (data << 8) | (m_count_length & 0xff); - if (LOG) logerror("8155 '%s' Count Length High: %04x\n", tag(), m_count_length); + if (LOG) logerror("8155 Count Length High: %04x\n", m_count_length); switch (data & TIMER_MODE_MASK) { case TIMER_MODE_LOW: // puts out LOW during second half of count - if (LOG) logerror("8155 '%s' Timer Mode: LOW\n", tag()); + if (LOG) logerror("8155 Timer Mode: LOW\n"); break; case TIMER_MODE_SQUARE_WAVE: // square wave, i.e. the period of the square wave equals the count length programmed with automatic reload at terminal count - if (LOG) logerror("8155 '%s' Timer Mode: Square wave\n", tag()); + if (LOG) logerror("8155 Timer Mode: Square wave\n"); break; case TIMER_MODE_SINGLE_PULSE: // single pulse upon TC being reached - if (LOG) logerror("8155 '%s' Timer Mode: Single pulse\n", tag()); + if (LOG) logerror("8155 Timer Mode: Single pulse\n"); break; case TIMER_MODE_AUTOMATIC_RELOAD: // automatic reload, i.e. single pulse every time TC is reached - if (LOG) logerror("8155 '%s' Timer Mode: Automatic reload\n", tag()); + if (LOG) logerror("8155 Timer Mode: Automatic reload\n"); break; } break; diff --git a/src/devices/machine/i8279.cpp b/src/devices/machine/i8279.cpp index 389397f8677..a1d083cf623 100644 --- a/src/devices/machine/i8279.cpp +++ b/src/devices/machine/i8279.cpp @@ -358,6 +358,13 @@ void i8279_device::timer_mainloop() } +READ8_MEMBER(i8279_device::read) +{ + // A0 = control/data select + return (offset & 1) ? status_r(space, 0) : data_r(space, 0); +} + + READ8_MEMBER( i8279_device::status_r ) { return m_status; @@ -432,6 +439,16 @@ READ8_MEMBER( i8279_device::data_r ) } +WRITE8_MEMBER(i8279_device::write) +{ + // A0 = control/data select + if (offset & 1) + cmd_w(space, 0, data); + else + data_w(space, 0, data); +} + + WRITE8_MEMBER( i8279_device::cmd_w ) {//printf("Command: %X=%X ",data>>5,data&31); uint8_t cmd = data >> 5; diff --git a/src/devices/machine/i8279.h b/src/devices/machine/i8279.h index 615e8dfdba2..8fcb73286db 100644 --- a/src/devices/machine/i8279.h +++ b/src/devices/machine/i8279.h @@ -15,17 +15,17 @@ RL6 7 | | 34 SL2 RL7 8 | | 33 SL1 RESET 9 | | 32 SL0 - /RD 10 | 8279 | 31 B0 - /WR 11 | | 30 B1 - DB0 12 | | 29 B2 - DB1 13 | | 28 B3 - DB2 14 | | 27 A0 - DB3 15 | | 26 A1 - DB4 16 | | 25 A2 - DB5 17 | | 24 A3 + /RD 10 | 8279 | 31 OUT B0 + /WR 11 | | 30 OUT B1 + DB0 12 | | 29 OUT B2 + DB1 13 | | 28 OUT B3 + DB2 14 | | 27 OUT A0 + DB3 15 | | 26 OUT A1 + DB4 16 | | 25 OUT A2 + DB5 17 | | 24 OUT A3 DB6 18 | | 23 /BD DB7 19 | | 22 /CS - Vss 20 |_____________| 21 CTRL/DATA + Vss 20 |_____________| 21 A0 (CTRL/DATA) ***************************************************************************/ @@ -85,8 +85,10 @@ public: template<class _Object> static devcb_base &set_in_ctrl_callback(device_t &device, _Object object) { return downcast<i8279_device &>(device).m_in_ctrl_cb.set_callback(object); } // read & write handlers + DECLARE_READ8_MEMBER(read); DECLARE_READ8_MEMBER(status_r); DECLARE_READ8_MEMBER(data_r); + DECLARE_WRITE8_MEMBER(write); DECLARE_WRITE8_MEMBER(cmd_w); DECLARE_WRITE8_MEMBER(data_w); void timer_mainloop(); @@ -110,7 +112,7 @@ private: devcb_write_line m_out_irq_cb; // IRQ devcb_write8 m_out_sl_cb; // Scanlines SL0-3 - devcb_write8 m_out_disp_cb; // B0-3,A0-3 + devcb_write8 m_out_disp_cb; // Display outputs B0-3, A0-3 devcb_write_line m_out_bd_cb; // BD devcb_read8 m_in_rl_cb; // kbd readlines RL0-7 devcb_read_line m_in_shift_cb; // Shift key diff --git a/src/devices/machine/mb3773.cpp b/src/devices/machine/mb3773.cpp index 1819825fadd..72a4dda7845 100644 --- a/src/devices/machine/mb3773.cpp +++ b/src/devices/machine/mb3773.cpp @@ -16,6 +16,8 @@ #include "mb3773.h" +#define WATCHDOG_DEBUG ( 0 ) + //************************************************************************** // LIVE DEVICE //************************************************************************** @@ -57,7 +59,11 @@ void mb3773_device::device_reset() void mb3773_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) { +#if WATCHDOG_DEBUG + machine().debug_break(); +#else machine().schedule_soft_reset(); +#endif } void mb3773_device::reset_timer() diff --git a/src/devices/machine/pccard.cpp b/src/devices/machine/pccard.cpp index a937fe64739..6350e194590 100644 --- a/src/devices/machine/pccard.cpp +++ b/src/devices/machine/pccard.cpp @@ -4,20 +4,24 @@ READ16_MEMBER( pccard_interface::read_memory ) { + //printf("unhandled memory read %08x %04x\n", offset, mem_mask); return 0xffff; } WRITE16_MEMBER( pccard_interface::write_memory ) { + //printf("unhandled memory write %08x %04x %04x\n", offset, data, mem_mask); } READ16_MEMBER( pccard_interface::read_reg ) { + //printf("unhandled register read %08x %04x\n", offset, mem_mask); return 0xffff; } WRITE16_MEMBER( pccard_interface::write_reg ) { + //printf("unhandled register write %08x %04x %04x\n", offset, data, mem_mask); } const device_type PCCARD_SLOT = &device_creator<pccard_slot_device>; diff --git a/src/devices/machine/pci.h b/src/devices/machine/pci.h index 245ca503009..6b94f4abd82 100644 --- a/src/devices/machine/pci.h +++ b/src/devices/machine/pci.h @@ -124,7 +124,7 @@ protected: void skip_map_regs(int count); void add_map(uint64_t size, int flags, address_map_delegate &map); - template <typename T> void add_map(uint64_t size, int flags, void (T::*map)(address_map &map, device_t &device), const char *name) { + template <typename T> void add_map(uint64_t size, int flags, void (T::*map)(address_map &map), const char *name) { address_map_delegate delegate(map, name, static_cast<T *>(this)); add_map(size, flags, delegate); } diff --git a/src/devices/machine/pci9050.cpp b/src/devices/machine/pci9050.cpp index a7ccb5eff62..8f5e36b3550 100644 --- a/src/devices/machine/pci9050.cpp +++ b/src/devices/machine/pci9050.cpp @@ -59,7 +59,7 @@ void pci9050_device::set_map(int id, address_map_constructor map, const char *na void pci9050_device::device_start() { - typedef void (pci9050_device::*tramp_t)(address_map &, device_t &); + typedef void (pci9050_device::*tramp_t)(address_map &); static const tramp_t trampolines[4] = { &pci9050_device::map_trampoline<0>, &pci9050_device::map_trampoline<1>, diff --git a/src/devices/machine/pci9050.h b/src/devices/machine/pci9050.h index 64778d02bfa..f8ba2880d58 100644 --- a/src/devices/machine/pci9050.h +++ b/src/devices/machine/pci9050.h @@ -75,8 +75,8 @@ private: void remap_local(int id); void remap_rom(); - template<int id> void map_trampoline(address_map &map, device_t &device) { - m_maps[id](map, *m_devices[id]); + template<int id> void map_trampoline(address_map &map) { + m_maps[id](map); } devcb_read32 m_user_input_handler; diff --git a/src/devices/machine/pic8259.cpp b/src/devices/machine/pic8259.cpp index b5120e886cf..ec2dbb67165 100644 --- a/src/devices/machine/pic8259.cpp +++ b/src/devices/machine/pic8259.cpp @@ -369,9 +369,9 @@ WRITE8_MEMBER( pic8259_device::write ) void pic8259_device::device_start() { // resolve callbacks - m_out_int_func.resolve(); - m_sp_en_func.resolve(); - m_read_slave_ack_func.resolve(); + m_out_int_func.resolve_safe(); + m_sp_en_func.resolve_safe(1); + m_read_slave_ack_func.resolve_safe(0); // Register save state items save_item(NAME(m_state)); diff --git a/src/devices/machine/pit8253.cpp b/src/devices/machine/pit8253.cpp index 3c7ee7922f7..1cfb5d45c3e 100644 --- a/src/devices/machine/pit8253.cpp +++ b/src/devices/machine/pit8253.cpp @@ -288,6 +288,7 @@ void pit8253_device::set_output(pit8253_timer *timer, int output) if (output != timer->output) { timer->output = output; + LOG2(("set_output(): timer %d, %s\n", timer->index, output ? "low to high" : "high to low")); switch (timer->index) { @@ -1007,6 +1008,11 @@ WRITE8_MEMBER( pit8253_device::write ) load_count(timer, data << 8); simulate2(timer, 0); + + if (CTRL_MODE(timer->control) == 0) + { + set_output(timer, 0); + } break; case 3: diff --git a/src/devices/machine/ram.cpp b/src/devices/machine/ram.cpp index f651e10c8bc..6f401178658 100644 --- a/src/devices/machine/ram.cpp +++ b/src/devices/machine/ram.cpp @@ -129,7 +129,7 @@ void ram_device::device_validity_check(validity_checker &valid) const p += 1; } - osd_free(s); + free(s); } } else { diff --git a/src/devices/machine/scnxx562.cpp b/src/devices/machine/scnxx562.cpp index becc64aa893..de4ae89663c 100644 --- a/src/devices/machine/scnxx562.cpp +++ b/src/devices/machine/scnxx562.cpp @@ -87,13 +87,13 @@ DONE (x) (p=partly) NMOS CMOS #define VERBOSE 0 -#define LOGPRINT(x) do { if (VERBOSE) logerror x; } while (0) -#define LOG(x) do {} while (0) -#define LOGR(x) -#define LOGTX(x) -#define LOGRX(x) -#define LOGSETUP(x) -#define LOGINT(x) LOGPRINT(x) +#define LOGPRINT(x) { do { if (VERBOSE) logerror x; } while (0); } +#define LOG(x) {} +#define LOGR(x) {} +#define LOGTX(x) {} +#define LOGRX(x) {} +#define LOGSETUP(x) {} LOGPRINT(x) +#define LOGINT(x) {} #if VERBOSE > 1 #define logerror printf @@ -824,11 +824,11 @@ void duscc_channel::device_timer(emu_timer &timer, device_timer_id id, int param m_uart->m_out_trxcb_cb(m_trxc); break; default: - LOGR(("Unhandled Timer ID %d\n", id)); + LOGR(("Unhandled Timer ID passed to device_serial_interface%d\n", id)); + device_serial_interface::device_timer(timer, id, param, ptr); break; } // LOG(("%s %d\n", FUNCNAME, id)); - device_serial_interface::device_timer(timer, id, param, ptr); } /* The DUSCC 16 bit Timer @@ -894,14 +894,12 @@ uint8_t duscc_channel::do_dusccreg_ctprh_r() uint8_t ret = ((m_ctpr >> 8) & 0xff ); LOG(("%s(%02x)\n", FUNCNAME, ret)); - // return m_ctprh; return ret; } void duscc_channel::do_dusccreg_ctprh_w(uint8_t data) { - LOG(("%s(%02x) - not supported yet\n", FUNCNAME, data)); - // m_ctprh = data; + LOG(("%s(%02x)\n", FUNCNAME, data)); m_ctpr &= ~0x0000ff00; m_ctpr |= ((data << 8) & 0x0000ff00); return; @@ -916,14 +914,12 @@ uint8_t duscc_channel::do_dusccreg_ctprl_r() { uint8_t ret = (m_ctpr & 0xff); LOG(("%s(%02x)\n", FUNCNAME, ret)); - // return m_ctprl; return ret; } void duscc_channel::do_dusccreg_ctprl_w(uint8_t data) { - LOG(("%s(%02x) - not supported yet\n", FUNCNAME, data)); - // m_ctprl = data; + LOG(("%s(%02x)\n", FUNCNAME, data)); m_ctpr &= ~0x000000ff; m_ctpr |= (data & 0x000000ff); return; @@ -939,7 +935,6 @@ uint8_t duscc_channel::do_dusccreg_cth_r() { uint8_t ret = ((m_ct >> 8) & 0xff ); LOG(("%s(%02x)\n", FUNCNAME, ret)); - return ret; } @@ -953,7 +948,6 @@ uint8_t duscc_channel::do_dusccreg_ctl_r() { uint8_t ret = (m_ct & 0xff); LOG(("%s(%02x)\n", FUNCNAME, ret)); - // return m_ctl; return ret; } @@ -1872,9 +1866,13 @@ void duscc_channel::do_dusccreg_omr_w(uint8_t data) m_omr = data; LOG(("- Tx Residual Character Length is ")); if ((m_omr & REG_OMR_TXRCL_MASK) == REG_OMR_TXRCL_8BIT) + { LOG(("determined by TPR[1:0], the Transmitter Parameter Register\n")); + } else + { LOG(("%u bits\n", (((m_omr & REG_OMR_TXRCL_MASK) >> 5) & 0x07) + 1)); + } LOG(("- TxRDY activated by %s\n", m_omr & REG_OMR_TXRDY_ACTIVATED ? "FIFO empty" : "FIFO not full")); LOG(("- RxRDY activated by %s\n", m_omr & REG_OMR_RXRDY_ACTIVATED ? "FIFO full" : "FIFO not empty")); LOG(("- GP02, if configured as output, is: %u\n", m_omr & REG_OMR_GP02 ? 0 : 1)); @@ -2279,7 +2277,7 @@ void duscc_channel::write(uint8_t data, offs_t &offset) { int reg = (offset | m_a7) & ~0x20; // Add extended rgisters and remove the channel B bit from offset - LOGSETUP((" * %c Reg %02x <- %02x \n", 'A' + m_index, reg, data)); + LOGSETUP((" * %s%c Reg %02x <- %02x \n", m_owner->tag(), 'A' + m_index, reg, data)); LOG(("\"%s\" %s: %c : Register write '%02x' -> [%02x]", m_owner->tag(), FUNCNAME, 'A' + m_index, data, reg )); switch (reg) { diff --git a/src/devices/video/pc_vga.h b/src/devices/video/pc_vga.h index bdd2f66532d..f4444774ab5 100644 --- a/src/devices/video/pc_vga.h +++ b/src/devices/video/pc_vga.h @@ -69,7 +69,7 @@ protected: virtual uint8_t pc_vga_choosevideomode(); void recompute_params_clock(int divisor, int xtal); uint8_t crtc_reg_read(uint8_t index); - void recompute_params(); + virtual void recompute_params(); void crtc_reg_write(uint8_t index, uint8_t data); void seq_reg_write(uint8_t index, uint8_t data); uint8_t vga_vblank(); diff --git a/src/devices/video/stvvdp2.cpp b/src/devices/video/stvvdp2.cpp index ace04646691..617252c0ee4 100644 --- a/src/devices/video/stvvdp2.cpp +++ b/src/devices/video/stvvdp2.cpp @@ -2145,6 +2145,34 @@ void saturn_state::stv_vdp2_fill_rotation_parameter_table( uint8_t rot_parameter stv_current_rotation_parameter_table.dkast= (m_vdp2_vram[address/4 + 22] & 0x03ffffc0) | ((m_vdp2_vram[address/4 + 22] & 0x02000000) ? 0xfc000000 : 0x00000000 ); stv_current_rotation_parameter_table.dkax = (m_vdp2_vram[address/4 + 23] & 0x03ffffc0) | ((m_vdp2_vram[address/4 + 23] & 0x02000000) ? 0xfc000000 : 0x00000000 ); + // check rotation parameter read control, override if specific bits are disabled + // (Batman Forever The Riddler stage relies on this) + switch(rot_parameter) + { + case 1: + if(!STV_VDP2_RAXSTRE) + stv_current_rotation_parameter_table.xst = 0; + + if(!STV_VDP2_RAYSTRE) + stv_current_rotation_parameter_table.yst = 0; + + if(!STV_VDP2_RAKASTRE) + stv_current_rotation_parameter_table.dkax = 0; + + break; + case 2: + if(!STV_VDP2_RBXSTRE) + stv_current_rotation_parameter_table.xst = 0; + + if(!STV_VDP2_RBYSTRE) + stv_current_rotation_parameter_table.yst = 0; + + if(!STV_VDP2_RBKASTRE) + stv_current_rotation_parameter_table.dkax = 0; + + break; + } + #define RP stv_current_rotation_parameter_table if(LOG_ROZ == 1) logerror( "Rotation parameter table (%d)\n", rot_parameter ); @@ -4660,6 +4688,7 @@ void saturn_state::stv_vdp2_copy_roz_bitmap(bitmap_rgb32 &bitmap, line = &bitmap.pix32(vcnt); + // TODO: nuke this spaghetti code if ( !use_coeff_table || RP.dkax == 0 ) { if ( use_coeff_table ) @@ -4777,7 +4806,7 @@ void saturn_state::stv_vdp2_copy_roz_bitmap(bitmap_rgb32 &bitmap, } } else - { + { for (hcnt = cliprect.min_x; hcnt <= cliprect.max_x; hcnt++ ) { switch( coeff_table_size ) diff --git a/src/emu/addrmap.cpp b/src/emu/addrmap.cpp index 4cba3760c27..9996f803e7e 100644 --- a/src/emu/addrmap.cpp +++ b/src/emu/addrmap.cpp @@ -65,11 +65,12 @@ address_map_entry::address_map_entry(device_t &device, address_map &map, offs_t // set_mask - set the mask value //------------------------------------------------- -void address_map_entry::set_mask(offs_t _mask) +address_map_entry &address_map_entry::mask(offs_t _mask) { m_addrmask = _mask; if (m_map.m_globalmask != 0) m_addrmask &= m_map.m_globalmask; + return *this; } @@ -78,7 +79,7 @@ void address_map_entry::set_mask(offs_t _mask) // retrieve a submap from a device //------------------------------------------------- -void address_map_entry::set_submap(const char *tag, address_map_delegate func, int bits, uint64_t mask) +address_map_entry &address_map_entry::set_submap(const char *tag, address_map_delegate func, int bits, uint64_t mask) { if(!bits) bits = m_map.m_databits; @@ -93,15 +94,16 @@ void address_map_entry::set_submap(const char *tag, address_map_delegate func, i m_write.m_mask = mask; m_submap_delegate = func; m_submap_bits = bits; + return *this; } //------------------------------------------------- -// internal_set_handler - handler setters for +// set_handler - handler setters for // 8-bit read/write handlers //------------------------------------------------- -void address_map_entry::internal_set_handler(read8_delegate func, uint64_t unitmask) +address_map_entry &address_map_entry::set_handler(read8_delegate func, uint64_t unitmask) { assert(!func.isnull()); assert(unitmask_is_appropriate(8, unitmask, func.name())); @@ -110,10 +112,11 @@ void address_map_entry::internal_set_handler(read8_delegate func, uint64_t unitm m_read.m_mask = unitmask; m_read.m_name = func.name(); m_rproto8 = func; + return *this; } -void address_map_entry::internal_set_handler(write8_delegate func, uint64_t unitmask) +address_map_entry &address_map_entry::set_handler(write8_delegate func, uint64_t unitmask) { assert(!func.isnull()); assert(unitmask_is_appropriate(8, unitmask, func.name())); @@ -122,22 +125,24 @@ void address_map_entry::internal_set_handler(write8_delegate func, uint64_t unit m_write.m_mask = unitmask; m_write.m_name = func.name(); m_wproto8 = func; + return *this; } -void address_map_entry::internal_set_handler(read8_delegate rfunc, write8_delegate wfunc, uint64_t unitmask) +address_map_entry &address_map_entry::set_handler(read8_delegate rfunc, write8_delegate wfunc, uint64_t unitmask) { - internal_set_handler(rfunc, unitmask); - internal_set_handler(wfunc, unitmask); + set_handler(rfunc, unitmask); + set_handler(wfunc, unitmask); + return *this; } //------------------------------------------------- -// internal_set_handler - handler setters for +// set_handler - handler setters for // 16-bit read/write handlers //------------------------------------------------- -void address_map_entry::internal_set_handler(read16_delegate func, uint64_t unitmask) +address_map_entry &address_map_entry::set_handler(read16_delegate func, uint64_t unitmask) { assert(!func.isnull()); assert(unitmask_is_appropriate(16, unitmask, func.name())); @@ -146,10 +151,11 @@ void address_map_entry::internal_set_handler(read16_delegate func, uint64_t unit m_read.m_mask = unitmask; m_read.m_name = func.name(); m_rproto16 = func; + return *this; } -void address_map_entry::internal_set_handler(write16_delegate func, uint64_t unitmask) +address_map_entry &address_map_entry::set_handler(write16_delegate func, uint64_t unitmask) { assert(!func.isnull()); assert(unitmask_is_appropriate(16, unitmask, func.name())); @@ -158,22 +164,24 @@ void address_map_entry::internal_set_handler(write16_delegate func, uint64_t uni m_write.m_mask = unitmask; m_write.m_name = func.name(); m_wproto16 = func; + return *this; } -void address_map_entry::internal_set_handler(read16_delegate rfunc, write16_delegate wfunc, uint64_t unitmask) +address_map_entry &address_map_entry::set_handler(read16_delegate rfunc, write16_delegate wfunc, uint64_t unitmask) { - internal_set_handler(rfunc, unitmask); - internal_set_handler(wfunc, unitmask); + set_handler(rfunc, unitmask); + set_handler(wfunc, unitmask); + return *this; } //------------------------------------------------- -// internal_set_handler - handler setters for +// set_handler - handler setters for // 32-bit read/write handlers //------------------------------------------------- -void address_map_entry::internal_set_handler(read32_delegate func, uint64_t unitmask) +address_map_entry &address_map_entry::set_handler(read32_delegate func, uint64_t unitmask) { assert(!func.isnull()); assert(unitmask_is_appropriate(32, unitmask, func.name())); @@ -182,10 +190,11 @@ void address_map_entry::internal_set_handler(read32_delegate func, uint64_t unit m_read.m_mask = unitmask; m_read.m_name = func.name(); m_rproto32 = func; + return *this; } -void address_map_entry::internal_set_handler(write32_delegate func, uint64_t unitmask) +address_map_entry &address_map_entry::set_handler(write32_delegate func, uint64_t unitmask) { assert(!func.isnull()); assert(unitmask_is_appropriate(32, unitmask, func.name())); @@ -194,22 +203,24 @@ void address_map_entry::internal_set_handler(write32_delegate func, uint64_t uni m_write.m_mask = unitmask; m_write.m_name = func.name(); m_wproto32 = func; + return *this; } -void address_map_entry::internal_set_handler(read32_delegate rfunc, write32_delegate wfunc, uint64_t unitmask) +address_map_entry &address_map_entry::set_handler(read32_delegate rfunc, write32_delegate wfunc, uint64_t unitmask) { - internal_set_handler(rfunc, unitmask); - internal_set_handler(wfunc, unitmask); + set_handler(rfunc, unitmask); + set_handler(wfunc, unitmask); + return *this; } //------------------------------------------------- -// internal_set_handler - handler setters for +// set_handler - handler setters for // 64-bit read/write handlers //------------------------------------------------- -void address_map_entry::internal_set_handler(read64_delegate func, uint64_t unitmask) +address_map_entry &address_map_entry::set_handler(read64_delegate func, uint64_t unitmask) { assert(!func.isnull()); assert(unitmask_is_appropriate(64, unitmask, func.name())); @@ -218,10 +229,11 @@ void address_map_entry::internal_set_handler(read64_delegate func, uint64_t unit m_read.m_mask = 0; m_read.m_name = func.name(); m_rproto64 = func; + return *this; } -void address_map_entry::internal_set_handler(write64_delegate func, uint64_t unitmask) +address_map_entry &address_map_entry::set_handler(write64_delegate func, uint64_t unitmask) { assert(!func.isnull()); assert(unitmask_is_appropriate(64, unitmask, func.name())); @@ -230,13 +242,15 @@ void address_map_entry::internal_set_handler(write64_delegate func, uint64_t uni m_write.m_mask = 0; m_write.m_name = func.name(); m_wproto64 = func; + return *this; } -void address_map_entry::internal_set_handler(read64_delegate rfunc, write64_delegate wfunc, uint64_t unitmask) +address_map_entry &address_map_entry::set_handler(read64_delegate rfunc, write64_delegate wfunc, uint64_t unitmask) { - internal_set_handler(rfunc, unitmask); - internal_set_handler(wfunc, unitmask); + set_handler(rfunc, unitmask); + set_handler(wfunc, unitmask); + return *this; } @@ -244,7 +258,7 @@ void address_map_entry::internal_set_handler(read64_delegate rfunc, write64_dele // set_handler - handler setter for setoffset //------------------------------------------------- -void address_map_entry::set_handler(setoffset_delegate func) +address_map_entry &address_map_entry::set_handler(setoffset_delegate func) { assert(!func.isnull()); m_setoffsethd.m_type = AMH_DEVICE_DELEGATE; @@ -252,6 +266,7 @@ void address_map_entry::set_handler(setoffset_delegate func) m_setoffsethd.m_mask = 0; m_setoffsethd.m_name = func.name(); m_soproto = func; + return *this; } //------------------------------------------------- @@ -286,52 +301,6 @@ bool address_map_entry::unitmask_is_appropriate(uint8_t width, uint64_t unitmask } - -//************************************************************************** -// WIDTH-SPECIFIC ADDRESS MAP ENTRY CONSTRUCTORS -//************************************************************************** - -//------------------------------------------------- -// address_map_entry8 - constructor -//------------------------------------------------- - -address_map_entry8::address_map_entry8(device_t &device, address_map &map, offs_t start, offs_t end) - : address_map_entry(device, map, start, end) -{ -} - - -//------------------------------------------------- -// address_map_entry16 - constructor -//------------------------------------------------- - -address_map_entry16::address_map_entry16(device_t &device, address_map &map, offs_t start, offs_t end) - : address_map_entry(device, map, start, end) -{ -} - - -//------------------------------------------------- -// address_map_entry32 - constructor -//------------------------------------------------- - -address_map_entry32::address_map_entry32(device_t &device, address_map &map, offs_t start, offs_t end) - : address_map_entry(device, map, start, end) -{ -} - - -//------------------------------------------------- -// address_map_entry64 - constructor -//------------------------------------------------- - -address_map_entry64::address_map_entry64(device_t &device, address_map &map, offs_t start, offs_t end) - : address_map_entry(device, map, start, end) -{ -} - - - //************************************************************************** // ADDRESS MAP //************************************************************************** @@ -342,36 +311,41 @@ address_map_entry64::address_map_entry64(device_t &device, address_map &map, off address_map::address_map(device_t &device, address_spacenum spacenum) : m_spacenum(spacenum), + m_device(&device), m_databits(0xff), m_unmapval(0), m_globalmask(0) { // get our memory interface const device_memory_interface *memintf; - if (!device.interface(memintf)) - throw emu_fatalerror("No memory interface defined for device '%s'\n", device.tag()); + if (!m_device->interface(memintf)) + throw emu_fatalerror("No memory interface defined for device '%s'\n", m_device->tag()); // and then the configuration for the current address space const address_space_config *spaceconfig = memintf->space_config(spacenum); if (spaceconfig == nullptr) - throw emu_fatalerror("No memory address space configuration found for device '%s', space %d\n", device.tag(), spacenum); + throw emu_fatalerror("No memory address space configuration found for device '%s', space %d\n", m_device->tag(), spacenum); // construct the internal device map (first so it takes priority) if (spaceconfig->m_internal_map != nullptr) - (*spaceconfig->m_internal_map)(*this, device); + (*spaceconfig->m_internal_map)(*this); if (!spaceconfig->m_internal_map_delegate.isnull()) - spaceconfig->m_internal_map_delegate(*this, device); + spaceconfig->m_internal_map_delegate(*this); // append the map provided by the owner if (memintf->address_map(spacenum) != nullptr) - (*memintf->address_map(spacenum))(*this, *device.owner()); + { + m_device = device.owner(); + (*memintf->address_map(spacenum))(*this); + m_device = &device; + } else { // if the owner didn't provide a map, use the default device map if (spaceconfig->m_default_map != nullptr) - (*spaceconfig->m_default_map)(*this, device); + (*spaceconfig->m_default_map)(*this); if (!spaceconfig->m_default_map_delegate.isnull()) - spaceconfig->m_default_map_delegate(*this, device); + spaceconfig->m_default_map_delegate(*this); } } @@ -383,13 +357,14 @@ address_map::address_map(device_t &device, address_spacenum spacenum) address_map::address_map(device_t &device, address_map_entry *entry) : m_spacenum(AS_PROGRAM), + m_device(&device), m_databits(0xff), m_unmapval(0), m_globalmask(0) { // Retrieve the submap - entry->m_submap_delegate.late_bind(device); - entry->m_submap_delegate(*this, device); + entry->m_submap_delegate.late_bind(*m_device); + entry->m_submap_delegate(*this); } @@ -400,28 +375,12 @@ address_map::address_map(device_t &device, address_map_entry *entry) address_map::address_map(const address_space &space, offs_t start, offs_t end, int bits, uint64_t unitmask, device_t &device, address_map_delegate submap_delegate) : m_spacenum(space.spacenum()), + m_device(&device), m_databits(space.data_width()), m_unmapval(space.unmap()), m_globalmask(space.bytemask()) { - address_map_entry *e; - switch(m_databits) { - case 8: - e = add(device, start, end, (address_map_entry8 *)nullptr); - break; - case 16: - e = add(device, start, end, (address_map_entry16 *)nullptr); - break; - case 32: - e = add(device, start, end, (address_map_entry32 *)nullptr); - break; - case 64: - e = add(device, start, end, (address_map_entry64 *)nullptr); - break; - default: - throw emu_fatalerror("Trying to dynamically map a device on a space with a corrupt databits width"); - } - e->set_submap(DEVICE_SELF, submap_delegate, bits, unitmask); + range(start, end).set_submap(DEVICE_SELF, submap_delegate, bits, unitmask); } @@ -455,7 +414,7 @@ void address_map::configure(address_spacenum spacenum, uint8_t databits) // list //------------------------------------------------- -void address_map::set_global_mask(offs_t mask) +void address_map::global_mask(offs_t mask) { // if (m_entrylist != nullptr) // throw emu_fatalerror("AM_GLOBALMASK must be specified before any entries"); @@ -465,38 +424,14 @@ void address_map::set_global_mask(offs_t mask) //------------------------------------------------- -// add - add a new entry of the appropriate type +// add - add a new entry //------------------------------------------------- -address_map_entry8 *address_map::add(device_t &device, offs_t start, offs_t end, address_map_entry8 *ptr) -{ - ptr = global_alloc(address_map_entry8(device, *this, start, end)); - m_entrylist.append(*ptr); - return ptr; -} - - -address_map_entry16 *address_map::add(device_t &device, offs_t start, offs_t end, address_map_entry16 *ptr) -{ - ptr = global_alloc(address_map_entry16(device, *this, start, end)); - m_entrylist.append(*ptr); - return ptr; -} - - -address_map_entry32 *address_map::add(device_t &device, offs_t start, offs_t end, address_map_entry32 *ptr) -{ - ptr = global_alloc(address_map_entry32(device, *this, start, end)); - m_entrylist.append(*ptr); - return ptr; -} - - -address_map_entry64 *address_map::add(device_t &device, offs_t start, offs_t end, address_map_entry64 *ptr) +address_map_entry &address_map::range(offs_t start, offs_t end) { - ptr = global_alloc(address_map_entry64(device, *this, start, end)); + address_map_entry *ptr = global_alloc(address_map_entry(*m_device, *this, start, end)); m_entrylist.append(*ptr); - return ptr; + return *ptr; } @@ -504,7 +439,7 @@ address_map_entry64 *address_map::add(device_t &device, offs_t start, offs_t end // uplift_submaps - propagate in the device submaps //------------------------------------------------- -void address_map::uplift_submaps(running_machine &machine, device_t &device, device_t &owner, endianness_t endian) +void address_map::uplift_submaps(running_machine &machine, device_t &owner, endianness_t endian) { address_map_entry *prev = nullptr; address_map_entry *entry = m_entrylist.first(); @@ -515,13 +450,13 @@ void address_map::uplift_submaps(running_machine &machine, device_t &device, dev std::string tag = owner.subtag(entry->m_read.m_tag); device_t *mapdevice = machine.device(tag.c_str()); if (mapdevice == nullptr) { - throw emu_fatalerror("Attempted to submap a non-existent device '%s' in space %d of device '%s'\n", tag.c_str(), m_spacenum, device.basetag()); + throw emu_fatalerror("Attempted to submap a non-existent device '%s' in space %d of device '%s'\n", tag.c_str(), m_spacenum, m_device->basetag()); } // Grab the submap address_map submap(*mapdevice, entry); // Recursively uplift it if needed - submap.uplift_submaps(machine, device, *mapdevice, endian); + submap.uplift_submaps(machine, *mapdevice, endian); // Compute the unit repartition characteristics int entry_bits = entry->m_submap_bits; @@ -645,10 +580,10 @@ void address_map::uplift_submaps(running_machine &machine, device_t &device, dev // one of the device's address maps //------------------------------------------------- -void address_map::map_validity_check(validity_checker &valid, const device_t &device, address_spacenum spacenum) const +void address_map::map_validity_check(validity_checker &valid, address_spacenum spacenum) const { // it's safe to assume here that the device has a memory interface and a config for this space - const address_space_config &spaceconfig = *device.memory().space_config(spacenum); + const address_space_config &spaceconfig = *m_device->memory().space_config(spacenum); int datawidth = spaceconfig.m_databus_width; int alignunit = datawidth / 8; @@ -721,7 +656,7 @@ void address_map::map_validity_check(validity_checker &valid, const device_t &de // if this is a program space, auto-assign implicit ROM entries if (entry.m_read.m_type == AMH_ROM && entry.m_region == nullptr) { - entry.m_region = device.tag(); + entry.m_region = m_device->tag(); entry.m_rgnoffs = entry.m_addrstart; } @@ -733,7 +668,7 @@ void address_map::map_validity_check(validity_checker &valid, const device_t &de std::string entry_region = entry.m_devbase.subtag(entry.m_region); // look for the region - for (device_t &dev : device_iterator(device.mconfig().root_device())) + for (device_t &dev : device_iterator(m_device->mconfig().root_device())) for (const rom_entry *romp = rom_first_region(dev); romp != nullptr && !found; romp = rom_next_region(romp)) { if (rom_region_name(dev, romp) == entry_region) diff --git a/src/emu/addrmap.h b/src/emu/addrmap.h index e440d0cd8b5..4dde0005a13 100644 --- a/src/emu/addrmap.h +++ b/src/emu/addrmap.h @@ -80,31 +80,47 @@ public: address_map_entry *next() const { return m_next; } // simple inline setters - void set_mirror(offs_t _mirror) { m_addrmirror = _mirror; } - void set_select(offs_t _select) { m_addrselect = _select; } - void set_read_type(map_handler_type _type) { m_read.m_type = _type; } - void set_write_type(map_handler_type _type) { m_write.m_type = _type; } - void set_region(const char *tag, offs_t offset) { m_region = tag; m_rgnoffs = offset; } - void set_share(const char *tag) { m_share = tag; } + address_map_entry &mirror(offs_t _mirror) { m_addrmirror = _mirror; return *this; } + address_map_entry &select(offs_t _select) { m_addrselect = _select; return *this; } + address_map_entry ®ion(const char *tag, offs_t offset) { m_region = tag; m_rgnoffs = offset; return *this; } + address_map_entry &share(const char *tag) { m_share = tag; return *this; } + + address_map_entry &rom() { m_read.m_type = AMH_ROM; return *this; } + address_map_entry &ram() { m_read.m_type = AMH_RAM; m_write.m_type = AMH_RAM; return *this; } + address_map_entry &readonly() { m_read.m_type = AMH_RAM; return *this; } + address_map_entry &writeonly() { m_write.m_type = AMH_RAM; return *this; } + address_map_entry &unmap() { m_read.m_type = AMH_UNMAP; m_write.m_type = AMH_UNMAP; return *this; } + address_map_entry &readunmap() { m_read.m_type = AMH_UNMAP; return *this; } + address_map_entry &writeunmap() { m_write.m_type = AMH_UNMAP; return *this; } + address_map_entry &nop() { m_read.m_type = AMH_NOP; m_write.m_type = AMH_NOP; return *this; } + address_map_entry &readnop() { m_read.m_type = AMH_NOP; return *this; } + address_map_entry &writenop() { m_write.m_type = AMH_NOP; return *this; } // mask setting - void set_mask(offs_t _mask); + address_map_entry &mask(offs_t _mask); // I/O port configuration - void set_read_port(const char *tag) { m_read.m_type = AMH_PORT; m_read.m_tag = tag; } - void set_write_port(const char *tag) { m_write.m_type = AMH_PORT; m_write.m_tag = tag; } - void set_readwrite_port(const char *tag) { set_read_port(tag); set_write_port(tag); } + address_map_entry &read_port(const char *tag) { m_read.m_type = AMH_PORT; m_read.m_tag = tag; return *this; } + address_map_entry &write_port(const char *tag) { m_write.m_type = AMH_PORT; m_write.m_tag = tag; return *this; } + address_map_entry &readwrite_port(const char *tag) { read_port(tag); write_port(tag); return *this; } // memory bank configuration - void set_read_bank(const char *tag) { m_read.m_type = AMH_BANK; m_read.m_tag = tag; } - void set_write_bank(const char *tag) { m_write.m_type = AMH_BANK; m_write.m_tag = tag; } - void set_readwrite_bank(const char *tag) { set_read_bank(tag); set_write_bank(tag); } + address_map_entry &read_bank(const char *tag) { m_read.m_type = AMH_BANK; m_read.m_tag = tag; return *this; } + address_map_entry &write_bank(const char *tag) { m_write.m_type = AMH_BANK; m_write.m_tag = tag; return *this; } + address_map_entry &readwrite_bank(const char *tag) { read_bank(tag); write_bank(tag); return *this; } + + address_map_entry &rombank(const char *tag) { return read_bank(tag); } + address_map_entry &rambank(const char *tag) { return readwrite_bank(tag); } // set offset handler (only one version, since there is no data width to consider) - void set_handler(setoffset_delegate func); + address_map_entry &set_handler(setoffset_delegate func); + + // type setters + address_map_entry &set_read_type(map_handler_type _type) { m_read.m_type = _type; return *this; } + address_map_entry &set_write_type(map_handler_type _type) { m_write.m_type = _type; return *this; } // submap referencing - void set_submap(const char *tag, address_map_delegate func, int bits, uint64_t mask); + address_map_entry &set_submap(const char *tag, address_map_delegate func, int bits, uint64_t mask); // public state address_map_entry * m_next; // pointer to the next entry @@ -145,123 +161,31 @@ public: offs_t m_bytemirror; // byte-adjusted mirror bits offs_t m_bytemask; // byte-adjusted mask bits -protected: - // internal handler setters for 8-bit functions - void internal_set_handler(read8_delegate func, uint64_t mask); - void internal_set_handler(write8_delegate func, uint64_t mask); - void internal_set_handler(read8_delegate rfunc, write8_delegate wfunc, uint64_t mask); + // handler setters for 8-bit functions + address_map_entry &set_handler(read8_delegate func, uint64_t mask = 0); + address_map_entry &set_handler(write8_delegate func, uint64_t mask = 0); + address_map_entry &set_handler(read8_delegate rfunc, write8_delegate wfunc, uint64_t mask = 0); - // internal handler setters for 16-bit functions - void internal_set_handler(read16_delegate func, uint64_t mask); - void internal_set_handler(write16_delegate func, uint64_t mask); - void internal_set_handler(read16_delegate rfunc, write16_delegate wfunc, uint64_t mask); + // handler setters for 16-bit functions + address_map_entry &set_handler(read16_delegate func, uint64_t mask = 0); + address_map_entry &set_handler(write16_delegate func, uint64_t mask = 0); + address_map_entry &set_handler(read16_delegate rfunc, write16_delegate wfunc, uint64_t mask = 0); - // internal handler setters for 32-bit functions - void internal_set_handler(read32_delegate func, uint64_t mask); - void internal_set_handler(write32_delegate func, uint64_t mask); - void internal_set_handler(read32_delegate rfunc, write32_delegate wfunc, uint64_t mask); + // handler setters for 32-bit functions + address_map_entry &set_handler(read32_delegate func, uint64_t mask = 0); + address_map_entry &set_handler(write32_delegate func, uint64_t mask = 0); + address_map_entry &set_handler(read32_delegate rfunc, write32_delegate wfunc, uint64_t mask = 0); - // internal handler setters for 64-bit functions - void internal_set_handler(read64_delegate func, uint64_t mask); - void internal_set_handler(write64_delegate func, uint64_t mask); - void internal_set_handler(read64_delegate rfunc, write64_delegate wfunc, uint64_t mask); + // handler setters for 64-bit functions + address_map_entry &set_handler(read64_delegate func, uint64_t mask = 0); + address_map_entry &set_handler(write64_delegate func, uint64_t mask = 0); + address_map_entry &set_handler(read64_delegate rfunc, write64_delegate wfunc, uint64_t mask = 0); private: // helper functions bool unitmask_is_appropriate(uint8_t width, uint64_t unitmask, const char *string); }; - -// ======================> address_map_entry8 - -// 8-bit address map version of address_map_entry which only permits valid 8-bit handlers -class address_map_entry8 : public address_map_entry -{ -public: - address_map_entry8(device_t &device, address_map &map, offs_t start, offs_t end); - - // native-size handlers - void set_handler(read8_delegate func) { internal_set_handler(func, 0); } - void set_handler(write8_delegate func) { internal_set_handler(func, 0); } - void set_handler(read8_delegate rfunc, write8_delegate wfunc) { internal_set_handler(rfunc, wfunc, 0); } -}; - - -// ======================> address_map_entry16 - -// 16-bit address map version of address_map_entry which only permits valid 16-bit handlers -class address_map_entry16 : public address_map_entry -{ -public: - address_map_entry16(device_t &device, address_map &map, offs_t start, offs_t end); - - // native-size handlers - void set_handler(read16_delegate func) { internal_set_handler(func, 0); } - void set_handler(write16_delegate func) { internal_set_handler(func, 0); } - void set_handler(read16_delegate rfunc, write16_delegate wfunc) { internal_set_handler(rfunc, wfunc, 0); } - - // 8-bit handlers - void set_handler(read8_delegate func, uint16_t mask) { internal_set_handler(func, mask); } - void set_handler(write8_delegate func, uint16_t mask) { internal_set_handler(func, mask); } - void set_handler(read8_delegate rfunc, write8_delegate wfunc, uint16_t mask) { internal_set_handler(rfunc, wfunc, mask); } -}; - - -// ======================> address_map_entry32 - -// 32-bit address map version of address_map_entry which only permits valid 32-bit handlers -class address_map_entry32 : public address_map_entry -{ -public: - address_map_entry32(device_t &device, address_map &map, offs_t start, offs_t end); - - // native-size handlers - void set_handler(read32_delegate func) { internal_set_handler(func, 0); } - void set_handler(write32_delegate func) { internal_set_handler(func, 0); } - void set_handler(read32_delegate rfunc, write32_delegate wfunc) { internal_set_handler(rfunc, wfunc, 0); } - - // 16-bit handlers - void set_handler(read16_delegate func, uint32_t mask) { internal_set_handler(func, mask); } - void set_handler(write16_delegate func, uint32_t mask) { internal_set_handler(func, mask); } - void set_handler(read16_delegate rfunc, write16_delegate wfunc, uint32_t mask) { internal_set_handler(rfunc, wfunc, mask); } - - // 8-bit handlers - void set_handler(read8_delegate func, uint32_t mask) { internal_set_handler(func, mask); } - void set_handler(write8_delegate func, uint32_t mask) { internal_set_handler(func, mask); } - void set_handler(read8_delegate rfunc, write8_delegate wfunc, uint32_t mask) { internal_set_handler(rfunc, wfunc, mask); } -}; - - -// ======================> address_map_entry64 - -// 64-bit address map version of address_map_entry which only permits valid 64-bit handlers -class address_map_entry64 : public address_map_entry -{ -public: - address_map_entry64(device_t &device, address_map &map, offs_t start, offs_t end); - - // native-size handlers - void set_handler(read64_delegate func) { internal_set_handler(func, 0); } - void set_handler(write64_delegate func) { internal_set_handler(func, 0); } - void set_handler(read64_delegate rfunc, write64_delegate wfunc) { internal_set_handler(rfunc, wfunc, 0); } - - // 32-bit handlers - void set_handler(read32_delegate func, uint64_t mask) { internal_set_handler(func, mask); } - void set_handler(write32_delegate func, uint64_t mask) { internal_set_handler(func, mask); } - void set_handler(read32_delegate rfunc, write32_delegate wfunc, uint64_t mask) { internal_set_handler(rfunc, wfunc, mask); } - - // 16-bit handlers - void set_handler(read16_delegate func, uint64_t mask) { internal_set_handler(func, mask); } - void set_handler(write16_delegate func, uint64_t mask) { internal_set_handler(func, mask); } - void set_handler(read16_delegate rfunc, write16_delegate wfunc, uint64_t mask) { internal_set_handler(rfunc, wfunc, mask); } - - // 8-bit handlers - void set_handler(read8_delegate func, uint64_t mask) { internal_set_handler(func, mask); } - void set_handler(write8_delegate func, uint64_t mask) { internal_set_handler(func, mask); } - void set_handler(read8_delegate rfunc, write8_delegate wfunc, uint64_t mask) { internal_set_handler(rfunc, wfunc, mask); } -}; - - // ======================> address_map // address_map holds global map parameters plus the head of the list of entries @@ -278,24 +202,24 @@ public: void configure(address_spacenum _spacenum, uint8_t _databits); // setters - void set_global_mask(offs_t mask); - void set_unmap_value(uint8_t value) { m_unmapval = value; } + void global_mask(offs_t mask); + void unmap_value_low() { m_unmapval = 0; } + void unmap_value_high() { m_unmapval = ~0; } + void unmap_value(uint8_t value) { m_unmapval = value; } // add a new entry of the given type - address_map_entry8 *add(device_t &device, offs_t start, offs_t end, address_map_entry8 *ptr); - address_map_entry16 *add(device_t &device, offs_t start, offs_t end, address_map_entry16 *ptr); - address_map_entry32 *add(device_t &device, offs_t start, offs_t end, address_map_entry32 *ptr); - address_map_entry64 *add(device_t &device, offs_t start, offs_t end, address_map_entry64 *ptr); + address_map_entry &range(offs_t start, offs_t end); // public data address_spacenum m_spacenum; // space number of the map + device_t * m_device; // associated device uint8_t m_databits; // data bits represented by the map uint8_t m_unmapval; // unmapped memory value offs_t m_globalmask; // global mask simple_list<address_map_entry> m_entrylist; // list of entries - void uplift_submaps(running_machine &machine, device_t &device, device_t &owner, endianness_t endian); - void map_validity_check(validity_checker &valid, const device_t &device, address_spacenum spacenum) const; + void uplift_submaps(running_machine &machine, device_t &owner, endianness_t endian); + void map_validity_check(validity_checker &valid, address_spacenum spacenum) const; }; @@ -310,191 +234,184 @@ public: #define ADDRESS_MAP_NAME(_name) construct_address_map_##_name #define ADDRESS_MAP_START(_name, _space, _bits, _class) \ -void ADDRESS_MAP_NAME(_name)(address_map &map, device_t &device) \ +void ADDRESS_MAP_NAME(_name)(address_map &map) \ { \ typedef read##_bits##_delegate read_delegate ATTR_UNUSED; \ typedef write##_bits##_delegate write_delegate ATTR_UNUSED; \ - address_map_entry##_bits *curentry = nullptr; \ - (void)curentry; \ map.configure(_space, _bits); \ - typedef _class drivdata_class ATTR_UNUSED; + typedef _class drivdata_class ATTR_UNUSED #define DEVICE_ADDRESS_MAP_START(_name, _bits, _class) \ -void _class :: _name(::address_map &map, device_t &device) \ +void _class :: _name(::address_map &map) \ { \ typedef read##_bits##_delegate read_delegate ATTR_UNUSED; \ typedef write##_bits##_delegate write_delegate ATTR_UNUSED; \ - address_map_entry##_bits *curentry = nullptr; \ - (void)curentry; \ map.configure(AS_PROGRAM, _bits); \ - typedef _class drivdata_class ATTR_UNUSED; + typedef _class drivdata_class ATTR_UNUSED #define ADDRESS_MAP_END \ -} +;} // use this to declare external references to an address map #define ADDRESS_MAP_EXTERN(_name, _bits) \ - extern void ADDRESS_MAP_NAME(_name)(address_map &map, device_t &device) + extern void ADDRESS_MAP_NAME(_name)(address_map &map) // use this to declare an address map as a member of a modern device class // need to qualify with :: to avoid a collision with descendants of device_memory_interface #define DECLARE_ADDRESS_MAP(_name, _bits) \ - void _name(::address_map &map, device_t &device) + void _name(::address_map &map) // global controls #define ADDRESS_MAP_GLOBAL_MASK(_mask) \ - map.set_global_mask(_mask); + ;map.global_mask(_mask) #define ADDRESS_MAP_UNMAP_LOW \ - map.set_unmap_value(0); + ;map.unmap_value_low() #define ADDRESS_MAP_UNMAP_HIGH \ - map.set_unmap_value(~0); + ;map.unmap_value_high() // importing data from other address maps #define AM_IMPORT_FROM(_name) \ - ADDRESS_MAP_NAME(_name)(map, device); + ;ADDRESS_MAP_NAME(_name)(map) // importing data from inherited address maps #define AM_INHERIT_FROM(_name) \ - _name(map, device); + ;_name(map) // address ranges #define AM_RANGE(_start, _end) \ - curentry = map.add(device, _start, _end, curentry); + ;map.range(_start, _end) #define AM_MASK(_mask) \ - curentry->set_mask(_mask); + .mask(_mask) #define AM_MIRROR(_mirror) \ - curentry->set_mirror(_mirror); + .mirror(_mirror) #define AM_SELECT(_select) \ - curentry->set_select(_select); + .select(_select) // driver data reads #define AM_READ(_handler) \ - curentry->set_handler(read_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr)); + .set_handler(read_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr)) #define AM_READ8(_handler, _unitmask) \ - curentry->set_handler(read8_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask); + .set_handler(read8_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask) #define AM_READ16(_handler, _unitmask) \ - curentry->set_handler(read16_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask); + .set_handler(read16_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask) #define AM_READ32(_handler, _unitmask) \ - curentry->set_handler(read32_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask); + .set_handler(read32_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask) // driver data writes #define AM_WRITE(_handler) \ - curentry->set_handler(write_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr)); + .set_handler(write_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr)) #define AM_WRITE8(_handler, _unitmask) \ - curentry->set_handler(write8_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask); + .set_handler(write8_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask) #define AM_WRITE16(_handler, _unitmask) \ - curentry->set_handler(write16_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask); + .set_handler(write16_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask) #define AM_WRITE32(_handler, _unitmask) \ - curentry->set_handler(write32_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask); + .set_handler(write32_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask) // driver data reads/writes #define AM_READWRITE(_rhandler, _whandler) \ - curentry->set_handler(read_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)nullptr), write_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)nullptr)); + .set_handler(read_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)nullptr), write_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)nullptr)) #define AM_READWRITE8(_rhandler, _whandler, _unitmask) \ - curentry->set_handler(read8_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)nullptr), write8_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask); + .set_handler(read8_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)nullptr), write8_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask) #define AM_READWRITE16(_rhandler, _whandler, _unitmask) \ - curentry->set_handler(read16_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)nullptr), write16_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask); + .set_handler(read16_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)nullptr), write16_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask) #define AM_READWRITE32(_rhandler, _whandler, _unitmask) \ - curentry->set_handler(read32_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)nullptr), write32_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask); + .set_handler(read32_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)nullptr), write32_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)nullptr), _unitmask) // driver set offset. Upcast to base class because there are no data width variants, // and the compiler complains if we don't do it explicitly #define AM_SETOFFSET(_handler) \ - ((address_map_entry*)curentry)->set_handler(setoffset_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr)); + .set_handler(setoffset_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)nullptr)) // device reads #define AM_DEVREAD(_tag, _class, _handler) \ - curentry->set_handler(read_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr)); + .set_handler(read_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr)) #define AM_DEVREAD8(_tag, _class, _handler, _unitmask) \ - curentry->set_handler(read8_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr), _unitmask); + .set_handler(read8_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr), _unitmask) #define AM_DEVREAD16(_tag, _class, _handler, _unitmask) \ - curentry->set_handler(read16_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr), _unitmask); + .set_handler(read16_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr), _unitmask) #define AM_DEVREAD32(_tag, _class, _handler, _unitmask) \ - curentry->set_handler(read32_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr), _unitmask); + .set_handler(read32_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr), _unitmask) // device writes #define AM_DEVWRITE(_tag, _class, _handler) \ - curentry->set_handler(write_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr)); + .set_handler(write_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr)) #define AM_DEVWRITE8(_tag, _class, _handler, _unitmask) \ - curentry->set_handler(write8_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr), _unitmask); + .set_handler(write8_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr), _unitmask) #define AM_DEVWRITE16(_tag, _class, _handler, _unitmask) \ - curentry->set_handler(write16_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr), _unitmask); + .set_handler(write16_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr), _unitmask) #define AM_DEVWRITE32(_tag, _class, _handler, _unitmask) \ - curentry->set_handler(write32_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr), _unitmask); + .set_handler(write32_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr), _unitmask) // device reads/writes #define AM_DEVREADWRITE(_tag, _class, _rhandler, _whandler) \ - curentry->set_handler(read_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)nullptr), write_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)nullptr)); + .set_handler(read_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)nullptr), write_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)nullptr)) #define AM_DEVREADWRITE8(_tag, _class, _rhandler, _whandler, _unitmask) \ - curentry->set_handler(read8_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)nullptr), write8_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)nullptr), _unitmask); + .set_handler(read8_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)nullptr), write8_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)nullptr), _unitmask) #define AM_DEVREADWRITE16(_tag, _class, _rhandler, _whandler, _unitmask) \ - curentry->set_handler(read16_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)nullptr), write16_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)nullptr), _unitmask); + .set_handler(read16_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)nullptr), write16_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)nullptr), _unitmask) #define AM_DEVREADWRITE32(_tag, _class, _rhandler, _whandler, _unitmask) \ - curentry->set_handler(read32_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)nullptr), write32_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)nullptr), _unitmask); + .set_handler(read32_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)nullptr), write32_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)nullptr), _unitmask) // device set offset #define AM_DEVSETOFFSET(_tag, _class, _handler) \ - ((address_map_entry*)curentry)->set_handler(setoffset_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr)); + .set_handler(setoffset_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)nullptr)) // device mapping #define AM_DEVICE(_tag, _class, _handler) \ - curentry->set_submap(_tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)nullptr), 0, 0); + .set_submap(_tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)nullptr), 0, 0) #define AM_DEVICE8(_tag, _class, _handler, _unitmask) \ - curentry->set_submap(_tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)nullptr), 8, _unitmask); + .set_submap(_tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)nullptr), 8, _unitmask) #define AM_DEVICE16(_tag, _class, _handler, _unitmask) \ - curentry->set_submap(_tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)nullptr), 16, _unitmask); + .set_submap(_tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)nullptr), 16, _unitmask) #define AM_DEVICE32(_tag, _class, _handler, _unitmask) \ - curentry->set_submap(_tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)nullptr), 32, _unitmask); + .set_submap(_tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)nullptr), 32, _unitmask) // special-case accesses #define AM_ROM \ - curentry->set_read_type(AMH_ROM); + .rom() #define AM_RAM \ - curentry->set_read_type(AMH_RAM); \ - curentry->set_write_type(AMH_RAM); + .ram() #define AM_READONLY \ - curentry->set_read_type(AMH_RAM); + .readonly() #define AM_WRITEONLY \ - curentry->set_write_type(AMH_RAM); + .writeonly() #define AM_UNMAP \ - curentry->set_read_type(AMH_UNMAP); \ - curentry->set_write_type(AMH_UNMAP); + .unmap() #define AM_READUNMAP \ - curentry->set_read_type(AMH_UNMAP); + .readunmap() #define AM_WRITEUNMAP \ - curentry->set_write_type(AMH_UNMAP); + .writeunmap() #define AM_NOP \ - curentry->set_read_type(AMH_NOP); \ - curentry->set_write_type(AMH_NOP); + .nop() #define AM_READNOP \ - curentry->set_read_type(AMH_NOP); + .readnop() #define AM_WRITENOP \ - curentry->set_write_type(AMH_NOP); + .writenop() // port accesses #define AM_READ_PORT(_tag) \ - curentry->set_read_port(_tag); + .read_port(_tag) #define AM_WRITE_PORT(_tag) \ - curentry->set_write_port(_tag); + .write_port(_tag) #define AM_READWRITE_PORT(_tag) \ - curentry->set_readwrite_port(_tag); + .readwrite_port(_tag) // bank accesses #define AM_READ_BANK(_tag) \ - curentry->set_read_bank(_tag); + .read_bank(_tag) #define AM_WRITE_BANK(_tag) \ - curentry->set_write_bank(_tag); + .write_bank(_tag) #define AM_READWRITE_BANK(_tag) \ - curentry->set_readwrite_bank(_tag); + .readwrite_bank(_tag) // attributes for accesses #define AM_REGION(_tag, _offs) \ - curentry->set_region(_tag, _offs); + .region(_tag, _offs) #define AM_SHARE(_tag) \ - curentry->set_share(_tag); + .share(_tag) // common shortcuts -#define AM_ROMBANK(_bank) AM_READ_BANK(_bank) -#define AM_RAMBANK(_bank) AM_READWRITE_BANK(_bank) +#define AM_ROMBANK(_bank) .rombank(_bank) +#define AM_RAMBANK(_bank) .rambank(_bank) #define AM_RAM_READ(_read) AM_READ(_read) AM_WRITEONLY #define AM_RAM_WRITE(_write) AM_READONLY AM_WRITE(_write) #define AM_RAM_DEVREAD(_tag, _class, _read) AM_DEVREAD(_tag, _class, _read) AM_WRITEONLY diff --git a/src/emu/devcb.cpp b/src/emu/devcb.cpp index d3b89700fe4..2b392ddcb93 100644 --- a/src/emu/devcb.cpp +++ b/src/emu/devcb.cpp @@ -144,7 +144,7 @@ void devcb_read_base::resolve() if (m_space_tag != nullptr) resolve_space(); else - m_space = &downcast<driver_device &>(m_device.machine().root_device()).generic_space(); + m_space = &m_device.machine().dummy_space(); // then handle the various types const char *name = "unknown"; @@ -372,7 +372,7 @@ void devcb_write_base::resolve() if (m_space_tag != nullptr) resolve_space(); else - m_space = &downcast<driver_device &>(m_device.machine().root_device()).generic_space(); + m_space = &m_device.machine().dummy_space(); // then handle the various types const char *name = "unknown"; diff --git a/src/emu/dimemory.cpp b/src/emu/dimemory.cpp index 6071f5c2405..9d038af72d9 100644 --- a/src/emu/dimemory.cpp +++ b/src/emu/dimemory.cpp @@ -243,7 +243,7 @@ void device_memory_interface::interface_validity_check(validity_checker &valid) ::address_map addrmap(const_cast<device_t &>(device()), spacenum); // let the map check itself - addrmap.map_validity_check(valid, device(), spacenum); + addrmap.map_validity_check(valid, spacenum); } } } diff --git a/src/emu/emumem.cpp b/src/emu/emumem.cpp index 27dc67a9385..0deab9d74a4 100644 --- a/src/emu/emumem.cpp +++ b/src/emu/emumem.cpp @@ -2011,7 +2011,7 @@ void address_space::prepare_map() m_map = std::make_unique<address_map>(m_device, m_spacenum); // merge in the submaps - m_map->uplift_submaps(machine(), m_device, m_device.owner() ? *m_device.owner() : m_device, endianness()); + m_map->uplift_submaps(machine(), m_device.owner() ? *m_device.owner() : m_device, endianness()); // extract global parameters specified by the map m_unmap = (m_map->m_unmapval == 0) ? 0 : ~0; @@ -2434,8 +2434,8 @@ void address_space::unmap_generic(offs_t addrstart, offs_t addrend, offs_t addrm void address_space::install_device_delegate(offs_t addrstart, offs_t addrend, device_t &device, address_map_delegate &delegate, int bits, uint64_t unitmask) { check_address("install_device_delegate", addrstart, addrend); - address_map map(*this, addrstart, addrend, bits, unitmask, device, delegate); - map.uplift_submaps(machine(), m_device, device, endianness()); + address_map map(*this, addrstart, addrend, bits, unitmask, m_device, delegate); + map.uplift_submaps(machine(), device, endianness()); populate_from_map(&map); } diff --git a/src/emu/emumem.h b/src/emu/emumem.h index 80f8e050660..ccdc6c28335 100644 --- a/src/emu/emumem.h +++ b/src/emu/emumem.h @@ -80,10 +80,10 @@ class address_table_setoffset; typedef uint32_t offs_t; // address map constructors are functions that build up an address_map -typedef void (*address_map_constructor)(address_map &map, device_t &devconfig); +typedef void (*address_map_constructor)(address_map &map); // submap retriever delegate -typedef named_delegate<void (address_map &, device_t &)> address_map_delegate; +typedef named_delegate<void (address_map &)> address_map_delegate; // struct with function pointers for accessors; use is generally discouraged unless necessary struct data_accessors @@ -384,7 +384,7 @@ public: void install_ram(offs_t addrstart, offs_t addrend, offs_t addrmirror, void *baseptr = nullptr) { install_ram_generic(addrstart, addrend, addrmirror, ROW_READWRITE, baseptr); } // install device memory maps - template <typename T> void install_device(offs_t addrstart, offs_t addrend, T &device, void (T::*map)(address_map &map, device_t &device), int bits = 0, uint64_t unitmask = 0) { + template <typename T> void install_device(offs_t addrstart, offs_t addrend, T &device, void (T::*map)(address_map &map), int bits = 0, uint64_t unitmask = 0) { address_map_delegate delegate(map, "dynamic_device_install", &device); install_device_delegate(addrstart, addrend, device, delegate, bits, unitmask); } diff --git a/src/emu/emuopts.cpp b/src/emu/emuopts.cpp index d9cde626d01..0e5305f33d1 100644 --- a/src/emu/emuopts.cpp +++ b/src/emu/emuopts.cpp @@ -28,6 +28,7 @@ const options_entry emu_options::s_option_entries[] = // search path options { nullptr, nullptr, OPTION_HEADER, "CORE SEARCH PATH OPTIONS" }, + { OPTION_HOMEPATH, ".", OPTION_STRING, "path to home directory (read/write) location" }, { OPTION_MEDIAPATH ";rp;biospath;bp", "roms", OPTION_STRING, "path to ROMsets and hard disk images" }, { OPTION_HASHPATH ";hash_directory;hash", "hash", OPTION_STRING, "path to hash files" }, { OPTION_SAMPLEPATH ";sp", "samples", OPTION_STRING, "path to samplesets" }, diff --git a/src/emu/emuopts.h b/src/emu/emuopts.h index ec0ee216bbe..d8983101a3a 100644 --- a/src/emu/emuopts.h +++ b/src/emu/emuopts.h @@ -25,6 +25,7 @@ #define OPTION_WRITECONFIG "writeconfig" // core search path options +#define OPTION_HOMEPATH "homepath" #define OPTION_MEDIAPATH "rompath" #define OPTION_HASHPATH "hashpath" #define OPTION_SAMPLEPATH "samplepath" @@ -214,6 +215,7 @@ public: bool write_config() const { return bool_value(OPTION_WRITECONFIG); } // core search path options + const char *home_path() const { return value(OPTION_HOMEPATH); } const char *media_path() const { return value(OPTION_MEDIAPATH); } const char *hash_path() const { return value(OPTION_HASHPATH); } const char *sample_path() const { return value(OPTION_SAMPLEPATH); } diff --git a/src/emu/rendlay.cpp b/src/emu/rendlay.cpp index 0663ff44579..d50dc7569e2 100644 --- a/src/emu/rendlay.cpp +++ b/src/emu/rendlay.cpp @@ -440,15 +440,14 @@ layout_element::layout_element(running_machine &machine, xml_data_node &elemnode // parse components in order bool first = true; render_bounds bounds; - for (auto compnode = elemnode.child; compnode; compnode = compnode->next) + for (xml_data_node *compnode = elemnode.child; compnode; compnode = compnode->next) { - std::map<std::string, make_component_func>::iterator const make_func(s_make_component.find(compnode->name)); + make_component_map::const_iterator const make_func(s_make_component.find(compnode->name)); if (make_func == s_make_component.end()) throw emu_fatalerror("Unknown element component: %s", compnode->name); // insert the new component into the list - m_complist.emplace_back(make_func->second(machine, *compnode, dirname)); - auto const &newcomp(*m_complist.back()); + component const &newcomp(**m_complist.emplace(m_complist.end(), make_func->second(machine, *compnode, dirname))); // accumulate bounds if (first) @@ -470,7 +469,7 @@ layout_element::layout_element(running_machine &machine, xml_data_node &elemnode float yscale = 1.0f / (bounds.y1 - bounds.y0); // normalize all the component bounds - for (auto &curcomp : m_complist) + for (component::ptr const &curcomp : m_complist) curcomp->normalize_bounds(xoffs, yoffs, xscale, yscale); } diff --git a/src/frontend/mame/luaengine.cpp b/src/frontend/mame/luaengine.cpp index d6ef79ead22..31b2590a642 100644 --- a/src/frontend/mame/luaengine.cpp +++ b/src/frontend/mame/luaengine.cpp @@ -1550,7 +1550,7 @@ void lua_engine::initialize() sol().new_usertype<mame_ui_manager>("ui", "new", sol::no_constructor, "is_menu_active", &mame_ui_manager::is_menu_active, - "options", [](mame_ui_manager &m) { return static_cast<core_options &>(m.options()); }, + "options", [](mame_ui_manager &m) { return static_cast<core_options *>(&m.options()); }, "show_fps", sol::property(&mame_ui_manager::show_fps, &mame_ui_manager::set_show_fps), "show_profiler", sol::property(&mame_ui_manager::show_profiler, &mame_ui_manager::set_show_profiler), "single_step", sol::property(&mame_ui_manager::single_step, &mame_ui_manager::set_single_step), diff --git a/src/frontend/mame/media_ident.cpp b/src/frontend/mame/media_ident.cpp index 5e975be8d4b..1360a88c66c 100644 --- a/src/frontend/mame/media_ident.cpp +++ b/src/frontend/mame/media_ident.cpp @@ -157,7 +157,7 @@ void media_identifier::identify_file(const char *name) if (filerr == osd_file::error::NONE && length > 0) { identify_data(name, reinterpret_cast<uint8_t *>(data), length); - osd_free(data); + free(data); } } } diff --git a/src/frontend/mame/ui/ui.cpp b/src/frontend/mame/ui/ui.cpp index 315da7763a5..d7bf97a6562 100644 --- a/src/frontend/mame/ui/ui.cpp +++ b/src/frontend/mame/ui/ui.cpp @@ -900,7 +900,7 @@ bool mame_ui_manager::can_paste() // free the string if allocated if (text != nullptr) - osd_free(text); + free(text); // did we have text? return text != nullptr; @@ -923,7 +923,7 @@ void mame_ui_manager::paste() machine().ioport().natkeyboard().post_utf8(text); // free the string - osd_free(text); + free(text); } } diff --git a/src/lib/util/corefile.cpp b/src/lib/util/corefile.cpp index 76b788174ab..264d80f4113 100644 --- a/src/lib/util/corefile.cpp +++ b/src/lib/util/corefile.cpp @@ -1207,7 +1207,7 @@ osd_file::error core_file::load(std::string const &filename, void **data, std::u return osd_file::error::OUT_OF_MEMORY; // allocate memory - *data = osd_malloc(size); + *data = malloc(size); length = std::uint32_t(size); // read the data diff --git a/src/lib/util/corestr.cpp b/src/lib/util/corestr.cpp index ed9c8e77b0a..4431f6d08ac 100644 --- a/src/lib/util/corestr.cpp +++ b/src/lib/util/corestr.cpp @@ -109,7 +109,7 @@ int core_strwildcmp(const char *sp1, const char *sp2) /*------------------------------------------------- - core_strdup - string duplication via osd_malloc + core_strdup - string duplication via malloc -------------------------------------------------*/ char *core_strdup(const char *str) @@ -117,7 +117,7 @@ char *core_strdup(const char *str) char *cpy = nullptr; if (str != nullptr) { - cpy = (char *)osd_malloc_array(strlen(str) + 1); + cpy = (char *)malloc(strlen(str) + 1); if (cpy != nullptr) strcpy(cpy, str); } diff --git a/src/lib/util/corestr.h b/src/lib/util/corestr.h index 29f98d06dc6..1e12c0d0e24 100644 --- a/src/lib/util/corestr.h +++ b/src/lib/util/corestr.h @@ -49,7 +49,7 @@ int core_strnicmp(const char *s1, const char *s2, size_t n); #define strncasecmp MUST_USE_CORE_STRNICMP_INSTEAD -/* since strdup is not part of the standard, we use this instead - free with osd_free() */ +/* since strdup is not part of the standard, we use this instead - free with free() */ char *core_strdup(const char *str); /* this macro prevents people from using strdup directly */ diff --git a/src/mame/audio/cinemat.cpp b/src/mame/audio/cinemat.cpp index af318008c80..9228af9571c 100644 --- a/src/mame/audio/cinemat.cpp +++ b/src/mame/audio/cinemat.cpp @@ -1280,7 +1280,7 @@ SOUND_RESET_MEMBER( cinemat_state, demon ) } -static ADDRESS_MAP_START( demon_sound_map, AS_PROGRAM, 8, driver_device ) +static ADDRESS_MAP_START( demon_sound_map, AS_PROGRAM, 8, cinemat_state ) AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x3000, 0x33ff) AM_RAM AM_RANGE(0x4000, 0x4001) AM_DEVREAD("ay1", ay8910_device, data_r) @@ -1293,7 +1293,7 @@ static ADDRESS_MAP_START( demon_sound_map, AS_PROGRAM, 8, driver_device ) ADDRESS_MAP_END -static ADDRESS_MAP_START( demon_sound_ports, AS_IO, 8, driver_device ) +static ADDRESS_MAP_START( demon_sound_ports, AS_IO, 8, cinemat_state ) ADDRESS_MAP_GLOBAL_MASK(0xff) AM_RANGE(0x00, 0x03) AM_DEVWRITE("ctc", z80ctc_device, write) AM_RANGE(0x1c, 0x1f) AM_DEVWRITE("ctc", z80ctc_device, write) diff --git a/src/mame/audio/exidy.cpp b/src/mame/audio/exidy.cpp index aa677ecd06c..8a726672e89 100644 --- a/src/mame/audio/exidy.cpp +++ b/src/mame/audio/exidy.cpp @@ -742,7 +742,7 @@ void venture_sound_device::sound_stream_update(sound_stream &stream, stream_samp -static ADDRESS_MAP_START( venture_audio_map, AS_PROGRAM, 8, driver_device ) +static ADDRESS_MAP_START( venture_audio_map, AS_PROGRAM, 8, venture_sound_device ) ADDRESS_MAP_GLOBAL_MASK(0x7fff) AM_RANGE(0x0000, 0x007f) AM_MIRROR(0x0780) AM_RAM AM_RANGE(0x0800, 0x087f) AM_MIRROR(0x0780) AM_DEVREADWRITE("riot", riot6532_device, read, write) @@ -822,13 +822,13 @@ READ8_MEMBER( venture_sound_device::mtrap_voiceio_r ) } -static ADDRESS_MAP_START( cvsd_map, AS_PROGRAM, 8, driver_device ) +static ADDRESS_MAP_START( cvsd_map, AS_PROGRAM, 8, venture_sound_device ) ADDRESS_MAP_GLOBAL_MASK(0x3fff) AM_RANGE(0x0000, 0x3fff) AM_ROM ADDRESS_MAP_END -static ADDRESS_MAP_START( cvsd_iomap, AS_IO, 8, driver_device ) +static ADDRESS_MAP_START( cvsd_iomap, AS_IO, 8, venture_sound_device ) ADDRESS_MAP_GLOBAL_MASK(0xff) AM_RANGE(0x00, 0xff) AM_DEVREADWRITE("custom", venture_sound_device, mtrap_voiceio_r, mtrap_voiceio_w) ADDRESS_MAP_END @@ -1006,7 +1006,7 @@ void victory_sound_device::sound_stream_update(sound_stream &stream, stream_samp -static ADDRESS_MAP_START( victory_audio_map, AS_PROGRAM, 8, driver_device ) +static ADDRESS_MAP_START( victory_audio_map, AS_PROGRAM, 8, venture_sound_device ) AM_RANGE(0x0000, 0x00ff) AM_MIRROR(0x0f00) AM_RAM AM_RANGE(0x1000, 0x107f) AM_MIRROR(0x0f80) AM_DEVREADWRITE("riot", riot6532_device, read, write) AM_RANGE(0x2000, 0x2003) AM_MIRROR(0x0ffc) AM_DEVREADWRITE("pia1", pia6821_device, read, write) diff --git a/src/mame/audio/exidy440.cpp b/src/mame/audio/exidy440.cpp index 04e9eadaeb5..23fd2ed37a6 100644 --- a/src/mame/audio/exidy440.cpp +++ b/src/mame/audio/exidy440.cpp @@ -859,7 +859,7 @@ void exidy440_sound_device::sound_stream_update(sound_stream &stream, stream_sam * *************************************/ -static ADDRESS_MAP_START( exidy440_audio_map, AS_PROGRAM, 8, driver_device ) +static ADDRESS_MAP_START( exidy440_audio_map, AS_PROGRAM, 8, exidy440_sound_device ) AM_RANGE(0x0000, 0x7fff) AM_NOP AM_RANGE(0x8000, 0x801f) AM_MIRROR(0x03e0) AM_DEVREADWRITE("custom", exidy440_sound_device, m6844_r, m6844_w) AM_RANGE(0x8400, 0x840f) AM_MIRROR(0x03f0) AM_DEVREADWRITE("custom", exidy440_sound_device, sound_volume_r, sound_volume_w) diff --git a/src/mame/audio/hyprolyb.cpp b/src/mame/audio/hyprolyb.cpp index 5cbde2908fc..a46d68124dc 100644 --- a/src/mame/audio/hyprolyb.cpp +++ b/src/mame/audio/hyprolyb.cpp @@ -76,7 +76,7 @@ READ8_MEMBER( hyprolyb_adpcm_device::data_r ) return m_soundlatch2->read(*m_space, offset); } -static ADDRESS_MAP_START( hyprolyb_adpcm_map, AS_PROGRAM, 8, driver_device ) +static ADDRESS_MAP_START( hyprolyb_adpcm_map, AS_PROGRAM, 8, hyprolyb_adpcm_device ) AM_RANGE(0x0000, 0x007f) AM_RAM AM_RANGE(0x1000, 0x1000) AM_DEVREAD("hyprolyb_adpcm", hyprolyb_adpcm_device, data_r) AM_RANGE(0x1001, 0x1001) AM_DEVREAD("hyprolyb_adpcm", hyprolyb_adpcm_device, ready_r) diff --git a/src/mame/audio/leland.cpp b/src/mame/audio/leland.cpp index cb0a8a9766f..5c2cca8c616 100644 --- a/src/mame/audio/leland.cpp +++ b/src/mame/audio/leland.cpp @@ -861,20 +861,20 @@ WRITE8_MEMBER( leland_80186_sound_device::ataxx_80186_control_w ) * *************************************/ -ADDRESS_MAP_START( leland_80186_map_program, AS_PROGRAM, 16, driver_device ) +ADDRESS_MAP_START( leland_80186_map_program, AS_PROGRAM, 16, leland_80186_sound_device ) AM_RANGE(0x00000, 0x03fff) AM_MIRROR(0x1c000) AM_RAM AM_RANGE(0x20000, 0xfffff) AM_ROM ADDRESS_MAP_END -ADDRESS_MAP_START( ataxx_80186_map_io, AS_IO, 16, driver_device ) +ADDRESS_MAP_START( ataxx_80186_map_io, AS_IO, 16, leland_80186_sound_device ) ADDRESS_MAP_END -ADDRESS_MAP_START( redline_80186_map_io, AS_IO, 16, driver_device ) +ADDRESS_MAP_START( redline_80186_map_io, AS_IO, 16, leland_80186_sound_device ) AM_RANGE(0x0000, 0xffff) AM_DEVWRITE("custom", redline_80186_sound_device, redline_dac_w) ADDRESS_MAP_END -ADDRESS_MAP_START( leland_80186_map_io, AS_IO, 16, driver_device ) +ADDRESS_MAP_START( leland_80186_map_io, AS_IO, 16, leland_80186_sound_device ) AM_RANGE(0x0000, 0xffff) AM_DEVWRITE("custom", leland_80186_sound_device, dac_w) ADDRESS_MAP_END diff --git a/src/mame/audio/qix.cpp b/src/mame/audio/qix.cpp index 70f9371d4ea..ed19887efef 100644 --- a/src/mame/audio/qix.cpp +++ b/src/mame/audio/qix.cpp @@ -153,7 +153,7 @@ WRITE_LINE_MEMBER(qix_state::qix_pia_sint) * *************************************/ -static ADDRESS_MAP_START( audio_map, AS_PROGRAM, 8, driver_device ) +static ADDRESS_MAP_START( audio_map, AS_PROGRAM, 8, qix_state ) AM_RANGE(0x0000, 0x007f) AM_RAM AM_RANGE(0x2000, 0x2003) AM_MIRROR(0x5ffc) AM_DEVREADWRITE("sndpia2", pia6821_device, read, write) AM_RANGE(0x4000, 0x4003) AM_MIRROR(0x3ffc) AM_DEVREADWRITE("sndpia1", pia6821_device, read, write) diff --git a/src/mame/audio/segasnd.cpp b/src/mame/audio/segasnd.cpp index bf8b790babf..e93dfec091e 100644 --- a/src/mame/audio/segasnd.cpp +++ b/src/mame/audio/segasnd.cpp @@ -196,12 +196,12 @@ void speech_sound_device::sound_stream_update(sound_stream &stream, stream_sampl * *************************************/ -static ADDRESS_MAP_START( speech_map, AS_PROGRAM, 8, driver_device ) +static ADDRESS_MAP_START( speech_map, AS_PROGRAM, 8, speech_sound_device ) AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x0800) AM_ROM ADDRESS_MAP_END -static ADDRESS_MAP_START( speech_portmap, AS_IO, 8, driver_device ) +static ADDRESS_MAP_START( speech_portmap, AS_IO, 8, speech_sound_device ) AM_RANGE(0x00, 0xff) AM_DEVREAD("segaspeech", speech_sound_device, rom_r) AM_RANGE(0x00, 0xff) AM_DEVWRITE("speech", sp0250_device, write) AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVREADWRITE("segaspeech", speech_sound_device, p1_r, p1_w) diff --git a/src/mame/audio/seibu.cpp b/src/mame/audio/seibu.cpp index 971db1ea8a7..93bd765d25a 100644 --- a/src/mame/audio/seibu.cpp +++ b/src/mame/audio/seibu.cpp @@ -358,12 +358,12 @@ WRITE16_MEMBER( seibu_sound_device::main_mustb_w ) /***************************************************************************/ -ADDRESS_MAP_START( seibu_sound_decrypted_opcodes_map, AS_DECRYPTED_OPCODES, 8, driver_device ) +ADDRESS_MAP_START( seibu_sound_decrypted_opcodes_map, AS_DECRYPTED_OPCODES, 8, seibu_sound_device ) AM_RANGE(0x0000, 0x1fff) AM_ROMBANK("seibu_bank0d") AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1d") ADDRESS_MAP_END -ADDRESS_MAP_START( seibu_sound_map, AS_PROGRAM, 8, driver_device ) +ADDRESS_MAP_START( seibu_sound_map, AS_PROGRAM, 8, seibu_sound_device ) AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x2000, 0x27ff) AM_RAM AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w) @@ -381,7 +381,7 @@ ADDRESS_MAP_START( seibu_sound_map, AS_PROGRAM, 8, driver_device ) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1") ADDRESS_MAP_END -ADDRESS_MAP_START( seibu2_airraid_sound_map, AS_PROGRAM, 8, driver_device ) +ADDRESS_MAP_START( seibu2_airraid_sound_map, AS_PROGRAM, 8, seibu_sound_device ) AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x2000, 0x27ff) AM_RAM AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w) @@ -399,7 +399,7 @@ ADDRESS_MAP_START( seibu2_airraid_sound_map, AS_PROGRAM, 8, driver_device ) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1") ADDRESS_MAP_END -ADDRESS_MAP_START( seibu2_sound_map, AS_PROGRAM, 8, driver_device ) +ADDRESS_MAP_START( seibu2_sound_map, AS_PROGRAM, 8, seibu_sound_device ) AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x2000, 0x27ff) AM_RAM AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w) @@ -417,7 +417,7 @@ ADDRESS_MAP_START( seibu2_sound_map, AS_PROGRAM, 8, driver_device ) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1") ADDRESS_MAP_END -ADDRESS_MAP_START( seibu2_raiden2_sound_map, AS_PROGRAM, 8, driver_device ) +ADDRESS_MAP_START( seibu2_raiden2_sound_map, AS_PROGRAM, 8, seibu_sound_device ) AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x2000, 0x27ff) AM_RAM AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w) @@ -438,7 +438,7 @@ ADDRESS_MAP_START( seibu2_raiden2_sound_map, AS_PROGRAM, 8, driver_device ) AM_RANGE(0x401a, 0x401a) AM_NOP ADDRESS_MAP_END -ADDRESS_MAP_START( seibu_newzeroteam_sound_map, AS_PROGRAM, 8, driver_device ) +ADDRESS_MAP_START( seibu_newzeroteam_sound_map, AS_PROGRAM, 8, seibu_sound_device ) AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x2000, 0x27ff) AM_RAM AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w) @@ -456,7 +456,7 @@ ADDRESS_MAP_START( seibu_newzeroteam_sound_map, AS_PROGRAM, 8, driver_device ) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1") ADDRESS_MAP_END -ADDRESS_MAP_START( seibu3_sound_map, AS_PROGRAM, 8, driver_device ) +ADDRESS_MAP_START( seibu3_sound_map, AS_PROGRAM, 8, seibu_sound_device ) AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x2000, 0x27ff) AM_RAM AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w) @@ -474,7 +474,7 @@ ADDRESS_MAP_START( seibu3_sound_map, AS_PROGRAM, 8, driver_device ) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("seibu_bank1") ADDRESS_MAP_END -ADDRESS_MAP_START( seibu3_adpcm_sound_map, AS_PROGRAM, 8, driver_device ) +ADDRESS_MAP_START( seibu3_adpcm_sound_map, AS_PROGRAM, 8, seibu_sound_device ) AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x2000, 0x27ff) AM_RAM AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("seibu_sound", seibu_sound_device, pending_w) diff --git a/src/mame/audio/taito_zm.cpp b/src/mame/audio/taito_zm.cpp index 4f4d8f4f0c3..efac1676b27 100644 --- a/src/mame/audio/taito_zm.cpp +++ b/src/mame/audio/taito_zm.cpp @@ -106,7 +106,7 @@ WRITE8_MEMBER(taito_zoom_device::tms_ctrl_w) } -ADDRESS_MAP_START( taitozoom_mn_map, AS_PROGRAM, 16, driver_device ) +ADDRESS_MAP_START( taitozoom_mn_map, AS_PROGRAM, 16, taito_zoom_device ) AM_RANGE(0x080000, 0x0fffff) AM_ROM AM_REGION("mn10200", 0) AM_RANGE(0x400000, 0x41ffff) AM_RAM AM_RANGE(0x800000, 0x8007ff) AM_DEVREADWRITE("zsg2", zsg2_device, read, write) diff --git a/src/mame/audio/timeplt.cpp b/src/mame/audio/timeplt.cpp index 0fab5956c3c..64e2d0d25a5 100644 --- a/src/mame/audio/timeplt.cpp +++ b/src/mame/audio/timeplt.cpp @@ -149,7 +149,7 @@ WRITE8_MEMBER( timeplt_audio_device::sh_irqtrigger_w ) * *************************************/ -static ADDRESS_MAP_START( timeplt_sound_map, AS_PROGRAM, 8, driver_device ) +static ADDRESS_MAP_START( timeplt_sound_map, AS_PROGRAM, 8, timeplt_audio_device ) AM_RANGE(0x0000, 0x2fff) AM_ROM AM_RANGE(0x3000, 0x33ff) AM_MIRROR(0x0c00) AM_RAM AM_RANGE(0x4000, 0x4000) AM_MIRROR(0x0fff) AM_DEVREADWRITE("ay1", ay8910_device, data_r, data_w) @@ -160,7 +160,7 @@ static ADDRESS_MAP_START( timeplt_sound_map, AS_PROGRAM, 8, driver_device ) ADDRESS_MAP_END -static ADDRESS_MAP_START( locomotn_sound_map, AS_PROGRAM, 8, driver_device ) +static ADDRESS_MAP_START( locomotn_sound_map, AS_PROGRAM, 8, timeplt_audio_device ) AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x2000, 0x23ff) AM_MIRROR(0x0c00) AM_RAM AM_RANGE(0x3000, 0x3fff) AM_DEVWRITE("timeplt_audio", timeplt_audio_device, filter_w) diff --git a/src/mame/drivers/1945kiii.cpp b/src/mame/drivers/1945kiii.cpp index df8eb1b4eef..ad061060db0 100644 --- a/src/mame/drivers/1945kiii.cpp +++ b/src/mame/drivers/1945kiii.cpp @@ -424,6 +424,35 @@ ROM_START( 1945kiii ) ROM_LOAD( "m16m-3.u61", 0x00000, 0x200000, CRC(32fc80dd) SHA1(bee32493a250e9f21997114bba26b9535b1b636c) ) ROM_END +ROM_START( 1945kiiin ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ + ROM_LOAD16_BYTE( "U34", 0x00001, 0x80000, CRC(d0cf4f03) SHA1(3455927221afae5103c02b12c1b855f416c47e91) ) /* 27C040 ROM had no label */ + ROM_LOAD16_BYTE( "U35", 0x00000, 0x80000, CRC(056c64ed) SHA1(b0eddad9c950676b94316d3aeb32f3ed4b9ade0f) ) /* 27C040 ROM had no label */ + + ROM_REGION( 0x080000, "oki2", 0 ) /* Samples */ + ROM_LOAD( "snd-2.su4", 0x00000, 0x80000, CRC(47e3952e) SHA1(d56524621a3f11981e4434e02f5fdb7e89fff0b4) ) /* ROM had no label, but same data as SND-2.SU4 */ + + ROM_REGION( 0x080000, "oki1", 0 ) /* Samples */ + ROM_LOAD( "snd-1.su7", 0x00000, 0x80000, CRC(bbb7f0ff) SHA1(458cf3a0c2d42110bc2427db675226c6b8d30999) ) /* ROM had no label, but same data as SND-1.SU7 */ + + ROM_REGION( 0x400000, "gfx1", 0 ) // sprites + ROM_LOAD32_BYTE( "U5", 0x000000, 0x080000, CRC(f328f85e) SHA1(fe1e1b86a77a9b6da0f69b20da64e69b874d8ef9) ) /* These 4 27C040 ROMs had no label */ + ROM_LOAD32_BYTE( "U6", 0x000001, 0x080000, CRC(cfdabf1b) SHA1(9822def10e5213d1b5c86034637481b5349bfb70) ) + ROM_LOAD32_BYTE( "U7", 0x000002, 0x080000, CRC(59a6a944) SHA1(20a109edddd8ab9530b94b3b2d2f8a85af2c08f8) ) + ROM_LOAD32_BYTE( "U8", 0x000003, 0x080000, CRC(59995aaf) SHA1(29c2c638b0dd2bf1e79707ea6f5b38b37f45b822) ) + + ROM_LOAD32_BYTE( "U58", 0x200000, 0x080000, CRC(6acf2ce4) SHA1(4b18678a9e03beb24494270d19c57bca32a72592) ) /* These 4 27C040 ROMs had no label */ + ROM_LOAD32_BYTE( "U59", 0x200001, 0x080000, CRC(ca6ff210) SHA1(d7e476bb41c193654495f5ed6ba39980cb3660bc) ) + ROM_LOAD32_BYTE( "U60", 0x200002, 0x080000, CRC(91eb038a) SHA1(b24082ba1675e87881a321ba87e079a1a027dfa4) ) + ROM_LOAD32_BYTE( "U61", 0x200003, 0x080000, CRC(1b358c6d) SHA1(1abe6422b420fd064a32ed9ca9a28c85996d4e57) ) + + ROM_REGION( 0x200000, "gfx2", 0 ) + ROM_LOAD32_BYTE( "5.U102", 0x000000, 0x80000, CRC(91b70a6b) SHA1(e53f62212d6e3ab5f892944b1933385a85e0ba8a) ) /* These 4 ROMs had no label */ + ROM_LOAD32_BYTE( "6.U103", 0x000001, 0x80000, CRC(7b5bfb85) SHA1(ef59d64513c7f7e6ee3dcc9bb7bb0e14a71ca957) ) /* Same data as M16M-3.U61, just split up */ + ROM_LOAD32_BYTE( "7.U104", 0x000002, 0x80000, CRC(cdafcedf) SHA1(82becd002a16185220131085db6576eb763429c8) ) + ROM_LOAD32_BYTE( "8.U105", 0x000003, 0x80000, CRC(2c3895d5) SHA1(ab5837d996c1bb70071db02f07412c182d7547f8) ) +ROM_END + ROM_START( 1945kiiio ) ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "3.U34", 0x00001, 0x80000, CRC(5515baa0) SHA1(6fd4c9b7cc27035d6baaafa73f5f5930bfde62a4) ) @@ -435,7 +464,7 @@ ROM_START( 1945kiiio ) ROM_REGION( 0x080000, "oki1", 0 ) /* Samples */ ROM_LOAD( "S13.SU4", 0x00000, 0x80000, CRC(d45aec3b) SHA1(fc182a10e19687eb2f2f4a1d2ad976814185f0fc)) - ROM_REGION( 0x400000, "gfx1", 0 ) + ROM_REGION( 0x400000, "gfx1", 0 ) // sprites ROM_LOAD32_BYTE( "9.U5", 0x000000, 0x080000, CRC(be0f432e) SHA1(7d63f97a8cb38c5351f2cd2f720de16a0c4ab1d7) ) ROM_LOAD32_BYTE( "10.U6", 0x000001, 0x080000, CRC(cf9127b2) SHA1(e02f436662f47d8bb5a9d726889c6e86cf64bdcf) ) ROM_LOAD32_BYTE( "11.U7", 0x000002, 0x080000, CRC(644ee8cc) SHA1(1742e31ba48a93c005cce0dc575d9b5d739d1dce) ) @@ -446,8 +475,8 @@ ROM_START( 1945kiiio ) ROM_LOAD32_BYTE( "15.U60", 0x200002, 0x080000, CRC(86ab6c7c) SHA1(59acaee6ba78a22f1423832a116ad41e19522aa1) ) ROM_LOAD32_BYTE( "16.U61", 0x200003, 0x080000, CRC(ff419080) SHA1(542819bdd60976bddfa96570321ba3f7fb6fbf23) ) - ROM_REGION( 0x200000, "gfx2", 0 ) - ROM_LOAD32_BYTE( "5.U102", 0x000000, 0x80000, CRC(91b70a6b) SHA1(e53f62212d6e3ab5f892944b1933385a85e0ba8a) ) + ROM_REGION( 0x200000, "gfx2", 0 ) // bg tiles + ROM_LOAD32_BYTE( "5.U102", 0x000000, 0x80000, CRC(91b70a6b) SHA1(e53f62212d6e3ab5f892944b1933385a85e0ba8a) ) /* Same data as M16M-3.U61, just split up */ ROM_LOAD32_BYTE( "6.U103", 0x000001, 0x80000, CRC(7b5bfb85) SHA1(ef59d64513c7f7e6ee3dcc9bb7bb0e14a71ca957) ) ROM_LOAD32_BYTE( "7.U104", 0x000002, 0x80000, CRC(cdafcedf) SHA1(82becd002a16185220131085db6576eb763429c8) ) ROM_LOAD32_BYTE( "8.U105", 0x000003, 0x80000, CRC(2c3895d5) SHA1(ab5837d996c1bb70071db02f07412c182d7547f8) ) @@ -464,7 +493,7 @@ ROM_START( flagrall ) ROM_LOAD( "13_su4.bin", 0x00000, 0x80000, CRC(7b0630b3) SHA1(c615e6630ffd12c122762751c25c249393bf7abd) ) ROM_LOAD( "14_su6.bin", 0x80000, 0x40000, CRC(593b038f) SHA1(b00dcf321fe541ee52c34b79e69c44f3d7a9cd7c) ) - ROM_REGION( 0x300000, "gfx1", 0 ) + ROM_REGION( 0x300000, "gfx1", 0 ) // sprites ROM_LOAD32_BYTE( "1_u5.bin", 0x000000, 0x080000, CRC(9377704b) SHA1(ac516a8ba6d1a70086469504c2a46d47a1f4560b) ) ROM_LOAD32_BYTE( "5_u6.bin", 0x000001, 0x080000, CRC(1ac0bd0c) SHA1(ab71bb84e61f5c7168601695f332a8d4a30d9948) ) ROM_LOAD32_BYTE( "2_u7.bin", 0x000002, 0x080000, CRC(5f6db2b3) SHA1(84caa019d3b75be30a14d19ccc2f28e5e94028bd) ) @@ -475,13 +504,15 @@ ROM_START( flagrall ) ROM_LOAD32_BYTE( "7_u60.bin", 0x200002, 0x040000, CRC(f187a7bf) SHA1(f4ce9ac9fe376250fe426de6ee404fc7841ef08a) ) ROM_LOAD32_BYTE( "8_u61.bin", 0x200003, 0x040000, CRC(b73fa441) SHA1(a5a3533563070c870276ead5e2f9cb9aaba303cc)) - ROM_REGION( 0x100000, "gfx2", 0 ) + ROM_REGION( 0x100000, "gfx2", 0 ) // bg tiles ROM_LOAD( "10_u102.bin", 0x00000, 0x80000, CRC(b1fd3279) SHA1(4a75581e13d43bef441ce81eae518c2f6bc1d5f8) ) ROM_LOAD( "9_u103.bin", 0x80000, 0x80000, CRC(01e6d654) SHA1(821d61a5b16f5cb76e2a805c8504db1ef38c3a48) ) ROM_END -GAME( 2000, 1945kiii, 0, k3, k3, driver_device, 0, ROT270, "Oriental Soft", "1945k III (newer, OPCX2 PCB)", MACHINE_SUPPORTS_SAVE ) -GAME( 1999, 1945kiiio,1945kiii, k3, k3, driver_device, 0, ROT270, "Oriental Soft", "1945k III (older, OPCX1 PCB)", MACHINE_SUPPORTS_SAVE ) +GAME( 2000, 1945kiii, 0, k3, k3, driver_device, 0, ROT270, "Oriental Soft", "1945k III (newer, OPCX2 PCB)", MACHINE_SUPPORTS_SAVE ) +GAME( 2000, 1945kiiin, 1945kiii, k3, k3, driver_device, 0, ROT270, "Oriental Soft", "1945k III (newer, OPCX1 PCB)", MACHINE_SUPPORTS_SAVE ) +GAME( 1999, 1945kiiio, 1945kiii, k3, k3, driver_device, 0, ROT270, "Oriental Soft", "1945k III (older, OPCX1 PCB)", MACHINE_SUPPORTS_SAVE ) + +GAME( 1996, flagrall, 0, flagrall, flagrall, driver_device, 0, ROT0, "Promat?", "'96 Flag Rally", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, flagrall, 0, flagrall, flagrall, driver_device, 0, ROT0, "Promat?", "'96 Flag Rally", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/amusco.cpp b/src/mame/drivers/amusco.cpp index 081b80008f8..1093de611d1 100644 --- a/src/mame/drivers/amusco.cpp +++ b/src/mame/drivers/amusco.cpp @@ -42,8 +42,8 @@ The program code reads from and writes to what must be a line printer and a RTC (probably a MSM5832), though neither is present on the main board. The I/O write patterns also suggest that each or both of these devices are accessed through an - unknown interface chip or gate array (not i8255-compatible). The printer appears to - use non-Epson control codes: ETB, DLE, DC4, DC2, SO, EM, DC1 and STX. + Intel 8155 or compatible interface chip. The printer appears to use non-Epson + control codes: ETB, DLE, DC4, DC2, SO, EM, DC1 and STX. ***************************************************************************************** @@ -66,7 +66,7 @@ - Make the 6845 transparent videoram addressing actually transparent. (IRQ1 changes the 6845 address twice but neither reads nor writes data?) - Add NVRAM in a way that won't trigger POST error message (needs NMI on shutdown?) - - Identify outputs from first PPI (these include button lamps?) + - Identify remaining outputs from first PPI (button lamps and coin counter are identified and implemented) *******************************************************************************/ @@ -77,15 +77,19 @@ #define CPU_CLOCK MASTER_CLOCK / 4 /* guess */ #define CRTC_CLOCK SECOND_CLOCK / 8 /* guess */ #define SND_CLOCK SECOND_CLOCK / 8 /* guess */ +#define PIT_CLOCK0 SECOND_CLOCK / 8 /* guess */ +#define PIT_CLOCK1 SECOND_CLOCK / 8 /* guess */ #include "emu.h" #include "cpu/i86/i86.h" #include "video/mc6845.h" +#include "machine/i8155.h" #include "machine/i8255.h" #include "sound/sn76496.h" #include "machine/pic8259.h" #include "machine/pit8253.h" #include "machine/msm5832.h" +#include "amusco.lh" class amusco_state : public driver_device @@ -109,17 +113,16 @@ public: virtual void machine_start() override; DECLARE_READ8_MEMBER(hack_coin1_r); DECLARE_READ8_MEMBER(hack_coin2_r); - DECLARE_READ8_MEMBER(hack_908_r); DECLARE_READ8_MEMBER(mc6845_r); DECLARE_WRITE8_MEMBER(mc6845_w); DECLARE_WRITE8_MEMBER(output_a_w); DECLARE_WRITE8_MEMBER(output_b_w); DECLARE_WRITE8_MEMBER(output_c_w); DECLARE_WRITE8_MEMBER(vram_w); - DECLARE_READ8_MEMBER(lpt_r); - DECLARE_WRITE8_MEMBER(lpt_w); - DECLARE_READ8_MEMBER(rtc_r); - DECLARE_WRITE8_MEMBER(rtc_w); + DECLARE_READ8_MEMBER(lpt_status_r); + DECLARE_WRITE8_MEMBER(lpt_data_w); + DECLARE_WRITE8_MEMBER(rtc_control_w); + DECLARE_WRITE8_MEMBER(rtc_data_w); MC6845_ON_UPDATE_ADDR_CHANGED(crtc_addr); MC6845_UPDATE_ROW(update_row); @@ -189,12 +192,6 @@ READ8_MEMBER(amusco_state::hack_coin2_r) return BIT(ioport("IN2")->read(), 2) ? 1 : 0; } -READ8_MEMBER(amusco_state::hack_908_r) -{ - // IRQ4 and other routines wait for bits of this to be set by IRQ2 - return 0xff; -} - /************************* * Memory Map Information * *************************/ @@ -202,7 +199,6 @@ READ8_MEMBER(amusco_state::hack_908_r) static ADDRESS_MAP_START( amusco_mem_map, AS_PROGRAM, 8, amusco_state ) AM_RANGE(0x006a6, 0x006a6) AM_READ(hack_coin1_r) AM_RANGE(0x006a8, 0x006a8) AM_READ(hack_coin2_r) - AM_RANGE(0x00908, 0x00908) AM_READ(hack_908_r) AM_RANGE(0x00000, 0x0ffff) AM_RAM AM_RANGE(0xec000, 0xecfff) AM_RAM AM_SHARE("videoram") // placeholder AM_RANGE(0xf8000, 0xfffff) AM_ROM @@ -235,17 +231,50 @@ WRITE8_MEMBER( amusco_state::mc6845_w) WRITE8_MEMBER(amusco_state::output_a_w) { - //logerror("Writing %02Xh to PPI output A\n", data); +/* Lamps from port A + + 7654 3210 + ---- ---x Bet lamp. + ---- --x- Hold/Discard 5 lamp. + ---- -x-- Hold/Discard 3 lamp. + ---- x--- Hold/Discard 1 lamp. + ---x ---- Hold/Discard 2 lamp. + --x- ---- Hold/Discard 4 lamp. + xx-- ---- Unknown. + +*/ + output().set_lamp_value(0, (data) & 1); // Lamp 0 (Bet) + output().set_lamp_value(1, (data >> 1) & 1); // Lamp 1 (Hold/Disc 5) + output().set_lamp_value(2, (data >> 2) & 1); // Lamp 2 (Hold/Disc 3) + output().set_lamp_value(3, (data >> 3) & 1); // Lamp 3 (Hold/Disc 1) + output().set_lamp_value(4, (data >> 4) & 1); // Lamp 4 (Hold/Disc 2) + output().set_lamp_value(5, (data >> 5) & 1); // Lamp 5 (Hold/Disc 4) + +// logerror("Writing %02Xh to PPI output A\n", data); } WRITE8_MEMBER(amusco_state::output_b_w) { - //logerror("Writing %02Xh to PPI output B\n", data); +/* Lamps and counters from port B + + 7654 3210 + ---- --x- Unknown lamp (lits when all holds/disc are ON. Could be a Cancel lamp in an inverted Hold system). + ---- -x-- Start/Draw lamp. + ---x ---- Coin counter. + xxx- x--x Unknown. + +*/ + output().set_lamp_value(6, (data >> 2) & 1); // Lamp 6 (Start/Draw) + output().set_lamp_value(7, (data >> 1) & 1); // Lamp 7 (Unknown) + + machine().bookkeeping().coin_counter_w(0, ~data & 0x10); // Coin counter + +// logerror("Writing %02Xh to PPI output B\n", data); } WRITE8_MEMBER(amusco_state::output_c_w) { - //logerror("Writing %02Xh to PPI output C\n", data); +// logerror("Writing %02Xh to PPI output C\n", data); } WRITE8_MEMBER(amusco_state::vram_w) @@ -255,63 +284,37 @@ WRITE8_MEMBER(amusco_state::vram_w) // printf("%04x %04x\n",m_video_update_address,data); } -READ8_MEMBER(amusco_state::lpt_r) +READ8_MEMBER(amusco_state::lpt_status_r) { - switch (offset) - { - case 2: - // Bit 0 = busy - // Bit 1 = paper jam (inverted) - // Bit 3 = out of paper - // Bit 4 = low paper - return 2; - - default: - logerror("Reading from printer port 28%dh\n", offset); - return 0; - } + // Bit 0 = busy + // Bit 1 = paper jam (active low) + // Bit 3 = out of paper + // Bit 4 = low paper + return 2; } -WRITE8_MEMBER(amusco_state::lpt_w) +WRITE8_MEMBER(amusco_state::lpt_data_w) { - logerror("Writing %02Xh to printer port 28%dh\n", data, offset); + logerror("Writing %02Xh to printer\n", data); } -READ8_MEMBER(amusco_state::rtc_r) +WRITE8_MEMBER(amusco_state::rtc_control_w) { - switch (offset) - { - case 3: - return m_rtc->data_r(space, 0); - - default: - logerror("Reading from RTC port 38%dh\n", offset); - return 0; - } + m_rtc->address_w(data & 0x0f); + m_rtc->cs_w(BIT(data, 6)); + m_rtc->hold_w(BIT(data, 6)); + m_rtc->write_w(BIT(data, 5)); + m_rtc->read_w(BIT(data, 4)); + + // TO DO: MSM5832 WR emulation is inaccurate + if (BIT(data, 5)) + m_rtc->data_w(space, 0, m_rtc_data); } -WRITE8_MEMBER(amusco_state::rtc_w) +WRITE8_MEMBER(amusco_state::rtc_data_w) { - switch (offset) - { - case 1: - m_rtc->address_w(data & 0x0f); - m_rtc->cs_w(BIT(data, 6)); - m_rtc->hold_w(BIT(data, 6)); - m_rtc->write_w(BIT(data, 5)); - if (BIT(data, 5)) - m_rtc->data_w(space, 0, m_rtc_data); - m_rtc->read_w(BIT(data, 4)); - break; - - case 3: - m_rtc_data = data; - break; - - default: - logerror("Writing %02Xh to RTC port 38%dh\n", data, offset); - break; - } + // TO DO: MSM5832 should be able to latch this value itself + m_rtc_data = data; } static ADDRESS_MAP_START( amusco_io_map, AS_IO, 8, amusco_state ) @@ -322,8 +325,8 @@ static ADDRESS_MAP_START( amusco_io_map, AS_IO, 8, amusco_state ) AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE("ppi_inputs", i8255_device, read, write) AM_RANGE(0x0060, 0x0060) AM_DEVWRITE("sn", sn76489a_device, write) AM_RANGE(0x0070, 0x0071) AM_WRITE(vram_w) - AM_RANGE(0x0280, 0x0283) AM_READWRITE(lpt_r, lpt_w) - AM_RANGE(0x0380, 0x0383) AM_READWRITE(rtc_r, rtc_w) + AM_RANGE(0x0280, 0x0283) AM_DEVREADWRITE("lpt_interface", i8155_device, io_r, io_w) + AM_RANGE(0x0380, 0x0383) AM_DEVREADWRITE("rtc_interface", i8155_device, io_r, io_w) ADDRESS_MAP_END /* I/O byte R/W @@ -363,7 +366,7 @@ static INPUT_PORTS_START( amusco ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) // move down in service mode PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) // move up in service mode - PORT_START("IN2") + PORT_START("IN2") // TO DO: enabling IRQ4 produces COIN ERROR message PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 ) //PORT_WRITE_LINE_DEVICE_MEMBER("pic8259", pic8259_device, ir4_w) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN2 ) //PORT_WRITE_LINE_DEVICE_MEMBER("pic8259", pic8259_device, ir4_w) PORT_BIT( 0xf9, IP_ACTIVE_HIGH, IPT_UNUSED ) @@ -426,10 +429,10 @@ static MACHINE_CONFIG_START( amusco, amusco_state ) MCFG_PIC8259_ADD("pic8259", INPUTLINE("maincpu", 0), VCC, NOOP) MCFG_DEVICE_ADD("pit8253", PIT8253, 0) - //MCFG_PIT8253_CLK0(nnn) - //MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w)) - //MCFG_PIT8253_CLK1(nnn) - //MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir2_w)) + MCFG_PIT8253_CLK0(PIT_CLOCK0) + MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w)) + MCFG_PIT8253_CLK1(PIT_CLOCK1) + MCFG_PIT8253_OUT1_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir2_w)) MCFG_DEVICE_ADD("ppi_outputs", I8255, 0) MCFG_I8255_OUT_PORTA_CB(WRITE8(amusco_state, output_a_w)) @@ -441,8 +444,18 @@ static MACHINE_CONFIG_START( amusco, amusco_state ) MCFG_I8255_IN_PORTB_CB(IOPORT("IN1")) MCFG_I8255_IN_PORTC_CB(IOPORT("IN2")) + MCFG_DEVICE_ADD("lpt_interface", I8155, 0) + MCFG_I8155_OUT_PORTA_CB(WRITE8(amusco_state, lpt_data_w)) + MCFG_I8155_IN_PORTB_CB(READ8(amusco_state, lpt_status_r)) + // Port C uses ALT 3 mode, which MAME does not currently emulate + MCFG_MSM5832_ADD("rtc", XTAL_32_768kHz) + MCFG_DEVICE_ADD("rtc_interface", I8155, 0) + MCFG_I8155_OUT_PORTA_CB(WRITE8(amusco_state, rtc_control_w)) + MCFG_I8155_IN_PORTC_CB(DEVREAD8("rtc", msm5832_device, data_r)) + MCFG_I8155_OUT_PORTC_CB(WRITE8(amusco_state, rtc_data_w)) + /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) @@ -460,7 +473,6 @@ static MACHINE_CONFIG_START( amusco, amusco_state ) MCFG_MC6845_CHAR_WIDTH(8) MCFG_MC6845_ADDR_CHANGED_CB(amusco_state, crtc_addr) MCFG_MC6845_OUT_DE_CB(DEVWRITELINE("pic8259", pic8259_device, ir1_w)) // IRQ1 sets 0x918 bit 3 - MCFG_MC6845_OUT_VSYNC_CB(DEVWRITELINE("pic8259", pic8259_device, ir0_w)) // IRQ0 sets 0x665 to 0xff MCFG_MC6845_UPDATE_ROW_CB(amusco_state, update_row) /* sound hardware */ @@ -493,10 +505,30 @@ ROM_START( amusco ) ROM_LOAD( "pal16l8a.u50", 0x0600, 0x0104, CRC(f5d80001) SHA1(ba0e55ebb45eceec256d432aee6d4123365a0af2) ) ROM_END +/* + Draw 88 Poker (V2.0) ?? + + U35 - TMS 27C128 + U36 - TMS 27C128 + U37 - TMS 27C128 + U42 - TMS 27C256 + +*/ +ROM_START( draw88pkr ) + ROM_REGION( 0x100000, "maincpu", 0 ) + ROM_LOAD( "u42.bin", 0xf8000, 0x08000, CRC(e98a7cfd) SHA1(8dc581c3e0cfd78bd33fbbbafd40307cf66f154d) ) + + ROM_REGION( 0xc000, "gfx1", 0 ) + ROM_LOAD( "u35.bin", 0x0000, 0x4000, CRC(f608019a) SHA1(f0c5e10a03f39976d9bc6e8bc9f78e30ffefa03e) ) + ROM_LOAD( "u36.bin", 0x4000, 0x4000, CRC(57d42a97) SHA1(b53b6419a48ecd111faf87fd6e480d82861fe512) ) + ROM_LOAD( "u37.bin", 0x8000, 0x4000, CRC(6e23b9f2) SHA1(6916828d84d1ecb44dc454e6786f97801a8550c7) ) +ROM_END + /************************* * Game Drivers * *************************/ -/* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS */ -GAME( 1987, amusco, 0, amusco, amusco, driver_device, 0, ROT0, "Amusco", "American Music Poker (V1.4)", MACHINE_IMPERFECT_COLORS | MACHINE_NODEVICE_PRINTER ) // runs much too fast; palette totally wrong +/* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS LAYOUT */ +GAMEL( 1987, amusco, 0, amusco, amusco, driver_device, 0, ROT0, "Amusco", "American Music Poker (V1.4)", MACHINE_IMPERFECT_COLORS | MACHINE_NODEVICE_PRINTER, layout_amusco ) // palette totally wrong +GAME( 1988, draw88pkr, 0, amusco, amusco, driver_device, 0, ROT0, "BTE, Inc.", "Draw 88 Poker (V2.0)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_COLORS | MACHINE_NODEVICE_PRINTER ) diff --git a/src/mame/drivers/anzterm.cpp b/src/mame/drivers/anzterm.cpp index 92de845c40f..f65a2d4e7f9 100644 --- a/src/mame/drivers/anzterm.cpp +++ b/src/mame/drivers/anzterm.cpp @@ -398,7 +398,7 @@ GFXDECODE_START( anzterm ) GFXDECODE_END -ADDRESS_MAP_START( anzterm, AS_PROGRAM, 8, driver_device ) +ADDRESS_MAP_START( anzterm, AS_PROGRAM, 8, anzterm_state ) // There are two battery-backed 2kB SRAM chips with a 4kb SRAM chip for parity // There are two 64kB DRAM banks (with parity) // There's also a whole lot of ROM diff --git a/src/mame/drivers/aristmk5.cpp b/src/mame/drivers/aristmk5.cpp index 603f3e9f4a6..2422f04b151 100644 --- a/src/mame/drivers/aristmk5.cpp +++ b/src/mame/drivers/aristmk5.cpp @@ -173,24 +173,33 @@ #include "includes/archimds.h" #include "cpu/arm/arm.h" #include "machine/watchdog.h" +#include "machine/eepromser.h" +#include "machine/ins8250.h" #include "sound/volt_reg.h" class aristmk5_state : public archimedes_state { public: aristmk5_state(const machine_config &mconfig, device_type type, const char *tag) - : archimedes_state(mconfig, type, tag) { } + : archimedes_state(mconfig, type, tag) + , m_eeprom(*this, "eeprom%d", 0) + { } emu_timer *m_mk5_2KHz_timer; emu_timer *m_mk5_VSYNC_timer; uint8_t m_ext_latch; uint8_t m_flyback; + required_device_array<eeprom_serial_93cxx_device, 2> m_eeprom; + DECLARE_WRITE32_MEMBER(Ns5w48); DECLARE_READ32_MEMBER(Ns5x58); DECLARE_READ32_MEMBER(mk5_ioc_r); DECLARE_WRITE32_MEMBER(mk5_ioc_w); DECLARE_READ32_MEMBER(Ns5r50); DECLARE_WRITE32_MEMBER(sram_banksel_w); + DECLARE_WRITE32_MEMBER(eeprom_w); + DECLARE_READ32_MEMBER(eeprom_r); + DECLARE_DRIVER_INIT(aristmk5); virtual void machine_start() override; virtual void machine_reset() override; @@ -347,6 +356,28 @@ READ32_MEMBER(aristmk5_state::Ns5r50) return 0xf5; // checked inside the CPU check, unknown meaning } +READ32_MEMBER(aristmk5_state::eeprom_r) +{ + uint8_t data = 0x00; + if (m_eeprom[0]->do_read() && m_eeprom[1]->do_read()) + data |= 0x04; + + return data; +} + +WRITE32_MEMBER(aristmk5_state::eeprom_w) +{ + if (ACCESSING_BITS_0_7) + { + m_eeprom[0]->cs_write(BIT(data, 5)); + m_eeprom[1]->cs_write(BIT(data, 6)); + m_eeprom[0]->di_write(BIT(data, 3)); + m_eeprom[1]->di_write(BIT(data, 3)); + m_eeprom[0]->clk_write(BIT(data, 4)); + m_eeprom[1]->clk_write(BIT(data, 4)); + } +} + WRITE32_MEMBER(aristmk5_state::sram_banksel_w) { /* @@ -413,8 +444,23 @@ static ADDRESS_MAP_START( aristmk5_map, AS_PROGRAM, 32, aristmk5_state ) /* MK-5 overrides */ AM_RANGE(0x03010420, 0x03010423) AM_WRITE(sram_banksel_w) // SRAM bank select write - -// AM_RANGE(0x0301049c, 0x0301051f) AM_DEVREADWRITE_LEGACY("eeprom", eeprom_r, eeprom_w) // eeprom ??? + AM_RANGE(0x03010450, 0x03010453) AM_WRITE(eeprom_w) + AM_RANGE(0x03010800, 0x03010803) AM_READ(eeprom_r) + + AM_RANGE(0x03010580, 0x03010583) AM_READ_PORT("P3") + AM_RANGE(0x03012000, 0x03012003) AM_READ_PORT("P1") + AM_RANGE(0x03012010, 0x03012013) AM_READ_PORT("P2") + AM_RANGE(0x03012200, 0x03012203) AM_READ_PORT("DSW1") + AM_RANGE(0x03012210, 0x03012213) AM_READ_PORT("DSW2") + + AM_RANGE(0x03010480, 0x0301049f) AM_DEVREADWRITE8("uart_0a", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03010500, 0x0301051f) AM_DEVREADWRITE8("uart_0b", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03010600, 0x0301061f) AM_DEVREADWRITE8("uart_1a", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03010680, 0x0301069f) AM_DEVREADWRITE8("uart_1b", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03012100, 0x0301211f) AM_DEVREADWRITE8("uart_2a", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03012140, 0x0301215f) AM_DEVREADWRITE8("uart_2b", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03012300, 0x0301231f) AM_DEVREADWRITE8("uart_3a", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03012340, 0x0301235f) AM_DEVREADWRITE8("uart_3b", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) AM_RANGE(0x03010810, 0x03010813) AM_DEVREADWRITE("watchdog", watchdog_timer_device, reset32_r, reset32_w) //MK-5 specific, watchdog // System Startup Code Enabled protection appears to be located at 0x3010400 - 0x30104ff @@ -439,8 +485,23 @@ static ADDRESS_MAP_START( aristmk5_drame_map, AS_PROGRAM, 32, aristmk5_state ) /* MK-5 overrides */ AM_RANGE(0x03010420, 0x03010423) AM_WRITE(sram_banksel_w) // SRAM bank select write - -// AM_RANGE(0x0301049c, 0x0301051f) AM_DEVREADWRITE_LEGACY("eeprom", eeprom_r, eeprom_w) // eeprom ??? + AM_RANGE(0x03010450, 0x03010453) AM_WRITE(eeprom_w) + AM_RANGE(0x03010800, 0x03010803) AM_READ(eeprom_r) + + AM_RANGE(0x03010580, 0x03010583) AM_READ_PORT("P3") + AM_RANGE(0x03012000, 0x03012003) AM_READ_PORT("P1") + AM_RANGE(0x03012010, 0x03012013) AM_READ_PORT("P2") + AM_RANGE(0x03012200, 0x03012203) AM_READ_PORT("DSW1") + AM_RANGE(0x03012210, 0x03012213) AM_READ_PORT("DSW2") + + AM_RANGE(0x03010480, 0x0301049f) AM_DEVREADWRITE8("uart_0a", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03010500, 0x0301051f) AM_DEVREADWRITE8("uart_0b", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03010600, 0x0301061f) AM_DEVREADWRITE8("uart_1a", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03010680, 0x0301069f) AM_DEVREADWRITE8("uart_1b", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03012100, 0x0301211f) AM_DEVREADWRITE8("uart_2a", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03012140, 0x0301215f) AM_DEVREADWRITE8("uart_2b", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03012300, 0x0301231f) AM_DEVREADWRITE8("uart_3a", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) + AM_RANGE(0x03012340, 0x0301235f) AM_DEVREADWRITE8("uart_3b", ins8250_uart_device, ins8250_r, ins8250_w, 0x000000ff) AM_RANGE(0x03010810, 0x03010813) AM_DEVREADWRITE("watchdog", watchdog_timer_device, reset32_r, reset32_w) //MK-5 specific, watchdog // System Startup Code Enabled protection appears to be located at 0x3010400 - 0x30104ff @@ -468,6 +529,56 @@ static INPUT_PORTS_START( aristmk5 ) PORT_CONFSETTING( 0x01, "Set Chip v4.4 Mode" ) PORT_CONFSETTING( 0x02, "Clear Chip Mode" ) PORT_CONFSETTING( 0x03, "Game Mode" ) + + PORT_START("DSW1") + PORT_DIPUNKNOWN_DIPLOC(0x01, 0x01, "DSW1:1") + PORT_DIPUNKNOWN_DIPLOC(0x02, 0x02, "DSW1:2") + PORT_DIPUNKNOWN_DIPLOC(0x04, 0x04, "DSW1:3") + PORT_DIPUNKNOWN_DIPLOC(0x08, 0x08, "DSW1:4") + PORT_DIPUNKNOWN_DIPLOC(0x10, 0x10, "DSW1:5") + PORT_DIPUNKNOWN_DIPLOC(0x20, 0x20, "DSW1:6") + PORT_DIPUNKNOWN_DIPLOC(0x40, 0x40, "DSW1:7") + PORT_DIPUNKNOWN_DIPLOC(0x80, 0x80, "DSW1:8") + + PORT_START("DSW2") + PORT_DIPUNKNOWN_DIPLOC(0x01, 0x01, "DSW2:1") + PORT_DIPUNKNOWN_DIPLOC(0x02, 0x02, "DSW2:2") + PORT_DIPUNKNOWN_DIPLOC(0x04, 0x04, "DSW2:3") + PORT_DIPUNKNOWN_DIPLOC(0x08, 0x08, "DSW2:4") + PORT_DIPUNKNOWN_DIPLOC(0x10, 0x10, "DSW2:5") + PORT_DIPUNKNOWN_DIPLOC(0x20, 0x20, "DSW2:6") + PORT_DIPUNKNOWN_DIPLOC(0x40, 0x40, "DSW2:7") + PORT_DIPUNKNOWN_DIPLOC(0x80, 0x80, "DSW2:8") + + PORT_START("P1") + PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Q) + PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_W) + PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_E) + PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_R) + PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_T) + PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Y) + PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_U) + PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_I) + + PORT_START("P2") + PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_A) + PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_S) + PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_D) + PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_F) + PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_G) + PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_H) + PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_J) + PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_K) + + PORT_START("P3") + PORT_BIT(0x00000001, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Z) + PORT_BIT(0x00000002, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_X) + PORT_BIT(0x00000004, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_C) + PORT_BIT(0x00000008, IP_ACTIVE_HIGH, IPT_SERVICE) + PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_V) + PORT_BIT(0x00000020, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_B) // Bill acceptor door + PORT_BIT(0x00000040, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_N) // Main door + PORT_BIT(0x00000080, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_M) // Cashbox door INPUT_PORTS_END DRIVER_INIT_MEMBER(aristmk5_state,aristmk5) @@ -545,6 +656,33 @@ static MACHINE_CONFIG_START( aristmk5, aristmk5_state ) MCFG_PALETTE_ADD("palette", 0x200) + MCFG_EEPROM_SERIAL_93C56_ADD("eeprom0") + MCFG_EEPROM_SERIAL_93C56_ADD("eeprom1") + + // TL16C452FN U71 + MCFG_DEVICE_ADD("uart_0a", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + MCFG_DEVICE_ADD("uart_0b", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + + // TL16C452FN U72 + MCFG_DEVICE_ADD("uart_1a", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + MCFG_DEVICE_ADD("uart_1b", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + + // COMM port 4 - 5 + MCFG_DEVICE_ADD("uart_2a", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + MCFG_DEVICE_ADD("uart_2b", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + + // COMM port 6 - 7 + MCFG_DEVICE_ADD("uart_3a", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + MCFG_DEVICE_ADD("uart_3b", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + MCFG_SPEAKER_STANDARD_MONO("speaker") MCFG_SOUND_ADD("dac0", DAC_16BIT_R2R_TWOS_COMPLEMENT, 0) MCFG_SOUND_ROUTE(0, "speaker", 0.1) // unknown DAC MCFG_SOUND_ADD("dac1", DAC_16BIT_R2R_TWOS_COMPLEMENT, 0) MCFG_SOUND_ROUTE(0, "speaker", 0.1) // unknown DAC @@ -587,6 +725,33 @@ static MACHINE_CONFIG_START( aristmk5_usa, aristmk5_state ) MCFG_PALETTE_ADD("palette", 0x200) + MCFG_EEPROM_SERIAL_93C56_ADD("eeprom0") + MCFG_EEPROM_SERIAL_93C56_ADD("eeprom1") + + // TL16C452FN U71 + MCFG_DEVICE_ADD("uart_0a", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + MCFG_DEVICE_ADD("uart_0b", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + + // TL16C452FN U72 + MCFG_DEVICE_ADD("uart_1a", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + MCFG_DEVICE_ADD("uart_1b", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + + // COMM port 4 - 5 + MCFG_DEVICE_ADD("uart_2a", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + MCFG_DEVICE_ADD("uart_2b", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + + // COMM port 6 - 7 + MCFG_DEVICE_ADD("uart_3a", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + MCFG_DEVICE_ADD("uart_3b", NS16450, MASTER_CLOCK / 9) +// MCFG_INS8250_OUT_INT_CB(WRITELINE(aristmk5_state, uart_irq_callback)) + MCFG_SPEAKER_STANDARD_MONO("speaker") MCFG_SOUND_ADD("dac0", DAC_16BIT_R2R_TWOS_COMPLEMENT, 0) MCFG_SOUND_ROUTE(0, "speaker", 0.1) // unknown DAC MCFG_SOUND_ADD("dac1", DAC_16BIT_R2R_TWOS_COMPLEMENT, 0) MCFG_SOUND_ROUTE(0, "speaker", 0.1) // unknown DAC @@ -624,7 +789,9 @@ MACHINE_CONFIG_END ROM_REGION( 0x600, "gals", 0 ) \ ROM_LOAD( "a562837.u36", 0x000000, 0x000157, CRC(1f269234) SHA1(29940dd50fb55c632935f62ff44ca724379c7a43) ) \ ROM_LOAD( "a562838.u65", 0x000200, 0x000157, CRC(f2f3c40a) SHA1(b795dfa5cc4e8127c3f3a0906664910d1325ec92) ) \ - ROM_LOAD( "a562840.u22", 0x000400, 0x000157, CRC(941d4cdb) SHA1(1ca091fba69e92f262dbb3d40f515703c8981793) ) + ROM_LOAD( "a562840.u22", 0x000400, 0x000157, CRC(941d4cdb) SHA1(1ca091fba69e92f262dbb3d40f515703c8981793) ) \ + ROM_REGION16_BE( 0x100, "eeprom0", ROMREGION_ERASEFF ) \ + ROM_REGION16_BE( 0x100, "eeprom1", ROMREGION_ERASEFF ) \ ROM_START( aristmk5 ) ARISTOCRAT_MK5_BIOS diff --git a/src/mame/drivers/artmagic.cpp b/src/mame/drivers/artmagic.cpp index 48e3bb96aa3..0a19087b19a 100644 --- a/src/mame/drivers/artmagic.cpp +++ b/src/mame/drivers/artmagic.cpp @@ -971,7 +971,7 @@ u1601.bin 32M Mask 8642h / Gfx ROM_START( stonebal ) ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */ - ROM_LOAD16_BYTE( "u102", 0x00000, 0x40000, CRC(712feda1) SHA1(c5b385f425786566fa274fe166a7116615a8ce86) ) + ROM_LOAD16_BYTE( "u102", 0x00000, 0x40000, CRC(712feda1) SHA1(c5b385f425786566fa274fe166a7116615a8ce86) ) /* 4 Players kit, v1-20 13/12/1994 */ ROM_LOAD16_BYTE( "u101", 0x00001, 0x40000, CRC(4f1656a9) SHA1(720717ae4166b3ec50bb572197a8c6c96b284648) ) ROM_REGION16_LE( 0x400000, "gfx1", 0 ) @@ -979,13 +979,13 @@ ROM_START( stonebal ) ROM_LOAD( "u1601.bin", 0x200000, 0x200000, CRC(dbe893f0) SHA1(71a8a022decc0ff7d4c65f7e6e0cbba9e0b5582c) ) ROM_REGION( 0x80000, "oki", 0 ) - ROM_LOAD( "u1801.bin", 0x00000, 0x80000, CRC(d98f7378) SHA1(700df7f29c039b96791c2704a67f01a722dc96dc) ) + ROM_LOAD( "sb_snd_9-9-94.u1801", 0x00000, 0x80000, CRC(d98f7378) SHA1(700df7f29c039b96791c2704a67f01a722dc96dc) ) /* labeled SB snd 9/9/94 */ ROM_END ROM_START( stonebal2 ) ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */ - ROM_LOAD16_BYTE( "u102.bin", 0x00000, 0x40000, CRC(b3c4f64f) SHA1(6327e9f3cd9deb871a6910cf1f006c8ee143e859) ) + ROM_LOAD16_BYTE( "u102.bin", 0x00000, 0x40000, CRC(b3c4f64f) SHA1(6327e9f3cd9deb871a6910cf1f006c8ee143e859) ) /* 2 Players kit, v1-20 7/11/1994 */ ROM_LOAD16_BYTE( "u101.bin", 0x00001, 0x40000, CRC(fe373f74) SHA1(bafac4bbd1aae4ccc4ae16205309483f1bbdd464) ) ROM_REGION16_LE( 0x400000, "gfx1", 0 ) @@ -993,7 +993,21 @@ ROM_START( stonebal2 ) ROM_LOAD( "u1601.bin", 0x200000, 0x200000, CRC(dbe893f0) SHA1(71a8a022decc0ff7d4c65f7e6e0cbba9e0b5582c) ) ROM_REGION( 0x80000, "oki", 0 ) - ROM_LOAD( "u1801.bin", 0x00000, 0x80000, CRC(d98f7378) SHA1(700df7f29c039b96791c2704a67f01a722dc96dc) ) + ROM_LOAD( "sb_snd_9-9-94.u1801", 0x00000, 0x80000, CRC(d98f7378) SHA1(700df7f29c039b96791c2704a67f01a722dc96dc) ) /* labeled SB snd 9/9/94 */ +ROM_END + + +ROM_START( stonebal2o ) + ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */ + ROM_LOAD16_BYTE( "sb_o_2p_24-10.u102", 0x00000, 0x40000, CRC(ab58c6b2) SHA1(6e29646d4b0802733d04e722909c03b87761c759) ) /* 2 Players kit, v1-20 21/10/1994 */ + ROM_LOAD16_BYTE( "sb_e_2p_24-10.u101", 0x00001, 0x40000, CRC(ea967835) SHA1(12655f0dc44981f4a49ed45f271d5eb24f2cc5c6) ) /* Yes the Odd / Even labels are backwards & chips dated 24/10 */ + + ROM_REGION16_LE( 0x400000, "gfx1", 0 ) + ROM_LOAD( "u1600.bin", 0x000000, 0x200000, CRC(d2ffe9ff) SHA1(1c5dcbd8208e45458da9db7621f6b8602bca0fae) ) + ROM_LOAD( "u1601.bin", 0x200000, 0x200000, CRC(dbe893f0) SHA1(71a8a022decc0ff7d4c65f7e6e0cbba9e0b5582c) ) + + ROM_REGION( 0x80000, "oki", 0 ) + ROM_LOAD( "sb_snd_9-9-94.u1801", 0x00000, 0x80000, CRC(d98f7378) SHA1(700df7f29c039b96791c2704a67f01a722dc96dc) ) /* labeled SB snd 9/9/94 */ ROM_END /* @@ -1177,9 +1191,10 @@ DRIVER_INIT_MEMBER(artmagic_state,shtstar) * *************************************/ -GAME( 1993, ultennis, 0, artmagic, ultennis, artmagic_state, ultennis, ROT0, "Art & Magic", "Ultimate Tennis", MACHINE_SUPPORTS_SAVE ) -GAME( 1993, ultennisj,ultennis, artmagic, ultennis, artmagic_state, ultennis, ROT0, "Art & Magic (Banpresto license)", "Ultimate Tennis (v 1.4, Japan)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, cheesech, 0, cheesech, cheesech, artmagic_state, cheesech, ROT0, "Art & Magic", "Cheese Chase", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, stonebal, 0, stonebal, stonebal, artmagic_state, stonebal, ROT0, "Art & Magic", "Stone Ball (4 Players)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, stonebal2,stonebal, stonebal, stoneba2, artmagic_state, stonebal, ROT0, "Art & Magic", "Stone Ball (2 Players)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, shtstar, 0, shtstar, shtstar, artmagic_state, shtstar, ROT0, "Nova", "Shooting Star", MACHINE_NOT_WORKING ) +GAME( 1993, ultennis, 0, artmagic, ultennis, artmagic_state, ultennis, ROT0, "Art & Magic", "Ultimate Tennis", MACHINE_SUPPORTS_SAVE ) +GAME( 1993, ultennisj, ultennis, artmagic, ultennis, artmagic_state, ultennis, ROT0, "Art & Magic (Banpresto license)", "Ultimate Tennis (v 1.4, Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, cheesech, 0, cheesech, cheesech, artmagic_state, cheesech, ROT0, "Art & Magic", "Cheese Chase", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, stonebal, 0, stonebal, stonebal, artmagic_state, stonebal, ROT0, "Art & Magic", "Stone Ball (4 Players, v1-20 13/12/1994)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, stonebal2, stonebal, stonebal, stoneba2, artmagic_state, stonebal, ROT0, "Art & Magic", "Stone Ball (2 Players, v1-20 7/11/1994)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, stonebal2o, stonebal, stonebal, stoneba2, artmagic_state, stonebal, ROT0, "Art & Magic", "Stone Ball (2 Players, v1-20 21/10/1994)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, shtstar, 0, shtstar, shtstar, artmagic_state, shtstar, ROT0, "Nova", "Shooting Star", MACHINE_NOT_WORKING ) diff --git a/src/mame/drivers/cedar_magnet.cpp b/src/mame/drivers/cedar_magnet.cpp index 09673861529..8f667be2e49 100644 --- a/src/mame/drivers/cedar_magnet.cpp +++ b/src/mame/drivers/cedar_magnet.cpp @@ -104,7 +104,127 @@ I suspect the additional memory was an afterthought. */ -#include "cedar_magnet.h" +#include "emu.h" +#include "cpu/z80/z80.h" +#include "cpu/z80/z80daisy.h" +#include "machine/z80pio.h" +#include "machine/bankdev.h" +#include "machine/z80ctc.h" +#include "sound/ay8910.h" + +#include "machine/cedar_magnet_sound.h" +#include "machine/cedar_magnet_plane.h" +#include "machine/cedar_magnet_sprite.h" +#include "machine/cedar_magnet_flop.h" + +#define LOG_IC49_PIO_PB 0 +#define LOG_IC48_PIO_PB 0 +#define LOG_IC48_PIO_PA 0 + +class cedar_magnet_state : public driver_device +{ +public: + cedar_magnet_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + m_bank0(*this, "bank0"), + m_sub_ram_bankdev(*this, "mb_sub_ram"), + m_sub_pal_bankdev(*this, "mb_sub_pal"), + m_ram0(*this, "ram0"), + m_pal_r(*this, "pal_r"), + m_pal_g(*this, "pal_g"), + m_pal_b(*this, "pal_b"), + + m_ic48_pio(*this, "z80pio_ic48"), + m_ic49_pio(*this, "z80pio_ic49"), + m_palette(*this, "palette"), + m_maincpu(*this, "maincpu"), + m_cedsound(*this, "cedtop"), + m_cedplane0(*this, "cedplane0"), + m_cedplane1(*this, "cedplane1"), + m_cedsprite(*this, "cedsprite") + { + m_ic48_pio_pa_val = 0xff; + m_ic48_pio_pb_val = 0xff; + m_ic49_pio_pb_val = 0xff; + m_prothack = nullptr; + } + + required_device<address_map_bank_device> m_bank0; + required_device<address_map_bank_device> m_sub_ram_bankdev; + required_device<address_map_bank_device> m_sub_pal_bankdev; + + required_shared_ptr<uint8_t> m_ram0; + required_shared_ptr<uint8_t> m_pal_r; + required_shared_ptr<uint8_t> m_pal_g; + required_shared_ptr<uint8_t> m_pal_b; + |