diff options
author | Aaron Giles <aaron@aarongiles.com> | 2021-07-14 09:00:20 -0700 |
---|---|---|
committer | Aaron Giles <aaron@aarongiles.com> | 2021-07-14 09:00:20 -0700 |
commit | 42cbd9c4375a60c93ba872c5e634482129afa259 (patch) | |
tree | c65f87f8aeb920d0aaaa8533ab99f67f2ec4d9dc | |
parent | d47a1a68924c99d6cdf55fcb61e0ca7d753c0be0 (diff) |
Cleanup, phase 1: Rename all pci_device methods and member variables to have a [m_]pci_ prefix.
57 files changed, 803 insertions, 828 deletions
diff --git a/src/devices/machine/gt64xxx.cpp b/src/devices/machine/gt64xxx.cpp index 15e20e56ebf..47633d38efc 100644 --- a/src/devices/machine/gt64xxx.cpp +++ b/src/devices/machine/gt64xxx.cpp @@ -150,9 +150,9 @@ DEFINE_DEVICE_TYPE(GT64010, gt64010_device, "gt64010", "Galileo GT-64010 System Controller") DEFINE_DEVICE_TYPE(GT64111, gt64111_device, "gt64111", "Galileo GT-64111 System Controller") -void gt64xxx_device::config_map(address_map &map) +void gt64xxx_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); } // cpu i/f map @@ -202,7 +202,7 @@ void gt64xxx_device::device_start() io_window_start = 0; io_window_end = 0xffffffff; io_offset = 0x00000000; - status = 0x0; + m_pci_status = 0x0; // DMA timer m_dma_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(gt64xxx_device::perform_dma), this)); @@ -257,7 +257,7 @@ void gt64xxx_device::device_start() void gt64xxx_device::device_post_load() { map_cpu_space(); - remap_cb(); + m_pci_remap_cb(); } void gt64xxx_device::device_reset() @@ -410,7 +410,7 @@ void gt64xxx_device::map_cpu_space() } } -void gt64xxx_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void gt64xxx_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { int ramIndex; @@ -454,9 +454,9 @@ void gt64xxx_device::map_extra(uint64_t memory_window_start, uint64_t memory_win LOGGALILEO("map_extra RAS3 start=%08X end=%08X size=%08X\n", winStart, winEnd, winSize); } -void gt64xxx_device::reset_all_mappings() +void gt64xxx_device::pci_reset_all_mappings() { - pci_device::reset_all_mappings(); + pci_device::pci_reset_all_mappings(); } // PCI Stalling @@ -706,7 +706,7 @@ void gt64xxx_device::cpu_if_w(address_space &space, offs_t offset, uint32_t data case GREG_PCI_MEM1_HI: case GREG_CS3_HI: map_cpu_space(); - remap_cb(); + m_pci_remap_cb(); LOGGALILEO("%s Galileo Memory Map data write to offset %03X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask); break; diff --git a/src/devices/machine/gt64xxx.h b/src/devices/machine/gt64xxx.h index 8f5bd7db079..68e06e3b128 100644 --- a/src/devices/machine/gt64xxx.h +++ b/src/devices/machine/gt64xxx.h @@ -20,15 +20,15 @@ DECLARE_DEVICE_TYPE(GT64111, gt64111_device) *************************************/ class gt64xxx_device : public pci_host_device { public: - virtual void reset_all_mappings() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_reset_all_mappings() override; + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; template <typename T> void set_cpu_tag(T &&tag) { m_cpu.set_tag(std::forward<T>(tag)); } void set_be(int be) { m_be = be; } void set_autoconfig(int autoconfig) { m_autoconfig = autoconfig; } void set_irq_num(int irq_num) { m_irq_num = irq_num; } - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; void set_simm_size(int index, int size) { m_simm_size[index] = size; }; void set_simm0_size(int size) { m_simm_size[0] = size; }; void set_simm1_size(int size) { m_simm_size[1] = size; }; @@ -156,7 +156,7 @@ public: gt64010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, int irq_num) : gt64010_device(mconfig, tag, owner, clock) { - set_ids_host(0x11ab0146, 0x03, 0x00000000); + pci_set_ids_host(0x11ab0146, 0x03, 0x00000000); set_cpu_tag(std::forward<T>(cpu_tag)); set_irq_num(irq_num); } @@ -174,7 +174,7 @@ public: gt64111_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, int irq_num) : gt64111_device(mconfig, tag, owner, clock) { - set_ids(0x414611ab, 0x10, 0x058000, 0x00000000); + pci_set_ids(0x414611ab, 0x10, 0x058000, 0x00000000); set_cpu_tag(std::forward<T>(cpu_tag)); set_irq_num(irq_num); } diff --git a/src/devices/machine/i6300esb.cpp b/src/devices/machine/i6300esb.cpp index 3e9d8089b40..780295e49fe 100644 --- a/src/devices/machine/i6300esb.cpp +++ b/src/devices/machine/i6300esb.cpp @@ -18,21 +18,21 @@ i6300esb_watchdog_device::i6300esb_watchdog_device(const machine_config &mconfig void i6300esb_watchdog_device::device_start() { pci_device::device_start(); - add_map(16, M_MEM, FUNC(i6300esb_watchdog_device::map)); + pci_add_map(16, M_MEM, FUNC(i6300esb_watchdog_device::map)); } void i6300esb_watchdog_device::device_reset() { pci_device::device_reset(); - command = 0x000f; - command_mask = 0x0140; - status = 0x0280; + m_pci_command = 0x000f; + m_pci_command_mask = 0x0140; + m_pci_status = 0x0280; } -void i6300esb_lpc_device::config_map(address_map &map) +void i6300esb_lpc_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); map(0x40, 0x43).rw(FUNC(i6300esb_lpc_device::pmbase_r), FUNC(i6300esb_lpc_device::pmbase_w)); map(0x44, 0x44).rw(FUNC(i6300esb_lpc_device::acpi_cntl_r), FUNC(i6300esb_lpc_device::acpi_cntl_w)); map(0x4e, 0x4f).rw(FUNC(i6300esb_lpc_device::bios_cntl_r), FUNC(i6300esb_lpc_device::bios_cntl_w)); @@ -96,7 +96,7 @@ i6300esb_lpc_device::i6300esb_lpc_device(const machine_config &mconfig, const ch , pit (*this, "pit") , m_region(*this, DEVICE_SELF) { - set_ids(0x808625a1, 0x02, 0x060100, 0x00000000); + pci_set_ids(0x808625a1, 0x02, 0x060100, 0x00000000); } void i6300esb_lpc_device::device_start() @@ -131,9 +131,9 @@ void i6300esb_lpc_device::device_reset() gen_sta = 0x00; } -void i6300esb_lpc_device::reset_all_mappings() +void i6300esb_lpc_device::pci_reset_all_mappings() { - pci_device::reset_all_mappings(); + pci_device::pci_reset_all_mappings(); pmbase = 0; acpi_cntl = 0; @@ -162,7 +162,7 @@ void i6300esb_lpc_device::pmbase_w(offs_t offset, uint32_t data, uint32_t mem_ma COMBINE_DATA(&pmbase); pmbase &= 0x0000ff80; logerror("%s: pmbase = %08x\n", tag(), pmbase); - remap_cb(); + m_pci_remap_cb(); } uint8_t i6300esb_lpc_device::acpi_cntl_r() @@ -174,7 +174,7 @@ void i6300esb_lpc_device::acpi_cntl_w(uint8_t data) { acpi_cntl = data; logerror("%s: acpi_cntl = %08x\n", tag(), acpi_cntl); - remap_cb(); + m_pci_remap_cb(); } uint16_t i6300esb_lpc_device::bios_cntl_r() @@ -186,7 +186,7 @@ void i6300esb_lpc_device::bios_cntl_w(offs_t offset, uint16_t data, uint16_t mem { COMBINE_DATA(&bios_cntl); logerror("%s: bios_cntl = %08x\n", tag(), bios_cntl); - remap_cb(); + m_pci_remap_cb(); } uint8_t i6300esb_lpc_device::tco_cntl_r() @@ -210,7 +210,7 @@ void i6300esb_lpc_device::gpio_base_w(offs_t offset, uint32_t data, uint32_t mem COMBINE_DATA(&gpio_base); gpio_base &= 0x0000ffc0; logerror("%s: gpio_base = %08x\n", tag(), gpio_base); - remap_cb(); + m_pci_remap_cb(); } uint8_t i6300esb_lpc_device::gpio_cntl_r() @@ -222,7 +222,7 @@ void i6300esb_lpc_device::gpio_cntl_w(uint8_t data) { gpio_cntl = data; logerror("%s: gpio_cntl = %02x\n", tag(), gpio_cntl); - remap_cb(); + m_pci_remap_cb(); } uint8_t i6300esb_lpc_device::pirq_rout_r(offs_t offset) @@ -431,7 +431,7 @@ void i6300esb_lpc_device::back_cntl_w(uint8_t data) { back_cntl = data; logerror("%s: back_cntl = %02x\n", tag(), back_cntl); - remap_cb(); + m_pci_remap_cb(); } uint8_t i6300esb_lpc_device::rtc_conf_r() @@ -443,7 +443,7 @@ void i6300esb_lpc_device::rtc_conf_w(uint8_t data) { rtc_conf = data; logerror("%s: rtc_conf = %02x\n", tag(), rtc_conf); - remap_cb(); + m_pci_remap_cb(); } uint8_t i6300esb_lpc_device::lpc_if_com_range_r() @@ -455,7 +455,7 @@ void i6300esb_lpc_device::lpc_if_com_range_w(uint8_t data) { lpc_if_com_range = data; logerror("%s: lpc_if_com_range = %02x\n", tag(), lpc_if_com_range); - remap_cb(); + m_pci_remap_cb(); } uint8_t i6300esb_lpc_device::lpc_if_fdd_lpt_range_r() @@ -467,7 +467,7 @@ void i6300esb_lpc_device::lpc_if_fdd_lpt_range_w(offs_t offset, uint8_t data, ui { COMBINE_DATA(&lpc_if_fdd_lpt_range); logerror("%s: lpc_if_fdd_lpt_range = %02x\n", tag(), lpc_if_fdd_lpt_range); - remap_cb(); + m_pci_remap_cb(); } uint8_t i6300esb_lpc_device::lpc_if_sound_range_r() @@ -479,7 +479,7 @@ void i6300esb_lpc_device::lpc_if_sound_range_w(offs_t offset, uint8_t data, uint { COMBINE_DATA(&lpc_if_sound_range); logerror("%s: lpc_if_sound_range = %02x\n", tag(), lpc_if_sound_range); - remap_cb(); + m_pci_remap_cb(); } uint8_t i6300esb_lpc_device::fwh_dec_en1_r() @@ -491,7 +491,7 @@ void i6300esb_lpc_device::fwh_dec_en1_w(uint8_t data) { fwh_dec_en1 = data | 0x80; logerror("%s: fwh_dec_en1 = %02x\n", tag(), fwh_dec_en1); - remap_cb(); + m_pci_remap_cb(); } uint16_t i6300esb_lpc_device::gen1_dec_r() @@ -503,7 +503,7 @@ void i6300esb_lpc_device::gen1_dec_w(offs_t offset, uint16_t data, uint16_t mem_ { COMBINE_DATA(&gen1_dec); logerror("%s: gen1_dec = %04x\n", tag(), gen1_dec); - remap_cb(); + m_pci_remap_cb(); } uint16_t i6300esb_lpc_device::lpc_en_r() @@ -515,7 +515,7 @@ void i6300esb_lpc_device::lpc_en_w(offs_t offset, uint16_t data, uint16_t mem_ma { COMBINE_DATA(&lpc_en); logerror("%s: lpc_en = %04x\n", tag(), lpc_en); - remap_cb(); + m_pci_remap_cb(); } uint32_t i6300esb_lpc_device::fwh_sel1_r() @@ -527,7 +527,7 @@ void i6300esb_lpc_device::fwh_sel1_w(offs_t offset, uint32_t data, uint32_t mem_ { COMBINE_DATA(&fwh_sel1); logerror("%s: fwh_sel1 = %08x\n", tag(), fwh_sel1); - remap_cb(); + m_pci_remap_cb(); } uint16_t i6300esb_lpc_device::gen2_dec_r() @@ -539,7 +539,7 @@ void i6300esb_lpc_device::gen2_dec_w(offs_t offset, uint16_t data, uint16_t mem_ { COMBINE_DATA(&gen2_dec); logerror("%s: gen2_dec = %04x\n", tag(), gen2_dec); - remap_cb(); + m_pci_remap_cb(); } uint16_t i6300esb_lpc_device::fwh_sel2_r() @@ -551,7 +551,7 @@ void i6300esb_lpc_device::fwh_sel2_w(offs_t offset, uint16_t data, uint16_t mem_ { COMBINE_DATA(&fwh_sel2); logerror("%s: fwh_sel2 = %04x\n", tag(), fwh_sel2); - remap_cb(); + m_pci_remap_cb(); } uint8_t i6300esb_lpc_device::fwh_dec_en2_r() @@ -563,7 +563,7 @@ void i6300esb_lpc_device::fwh_dec_en2_w(uint8_t data) { fwh_dec_en2 = data; logerror("%s: fwh_dec_en2 = %02x\n", tag(), fwh_dec_en2); - remap_cb(); + m_pci_remap_cb(); } uint16_t i6300esb_lpc_device::func_dis_r() @@ -673,7 +673,7 @@ void i6300esb_lpc_device::map_bios(address_space *memory_space, uint32_t start, memory_space->install_rom(start, end, m_region->base() + (start & mask)); } -void i6300esb_lpc_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void i6300esb_lpc_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { if(fwh_dec_en1 & 0x80) { diff --git a/src/devices/machine/i6300esb.h b/src/devices/machine/i6300esb.h index a126a5c1735..9177d0a286c 100644 --- a/src/devices/machine/i6300esb.h +++ b/src/devices/machine/i6300esb.h @@ -14,11 +14,11 @@ class i6300esb_lpc_device : public pci_device { public: i6300esb_lpc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual void reset_all_mappings() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_reset_all_mappings() override; + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; protected: virtual void device_start() override; @@ -141,7 +141,7 @@ public: i6300esb_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subdevice_id) : i6300esb_watchdog_device(mconfig, tag, owner, clock) { - set_ids(0x808625ab, 0x02, 0x088000, subdevice_id); + pci_set_ids(0x808625ab, 0x02, 0x088000, subdevice_id); } i6300esb_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/i82371sb.cpp b/src/devices/machine/i82371sb.cpp index 9140b0d4216..2a078ef479b 100644 --- a/src/devices/machine/i82371sb.cpp +++ b/src/devices/machine/i82371sb.cpp @@ -9,9 +9,9 @@ DEFINE_DEVICE_TYPE(I82371SB_ISA, i82371sb_isa_device, "i82371sb_isa", "Intel 82371 southbridge ISA bridge") -void i82371sb_isa_device::config_map(address_map &map) +void i82371sb_isa_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); map(0x4c, 0x4c).rw(FUNC(i82371sb_isa_device::iort_r), FUNC(i82371sb_isa_device::iort_w)); map(0x4e, 0x4f).rw(FUNC(i82371sb_isa_device::xbcs_r), FUNC(i82371sb_isa_device::xbcs_w)); map(0x60, 0x63).rw(FUNC(i82371sb_isa_device::pirqrc_r), FUNC(i82371sb_isa_device::pirqrc_w)); @@ -141,7 +141,7 @@ i82371sb_isa_device::i82371sb_isa_device(const machine_config &mconfig, const ch m_speaker(*this, "speaker"), m_at_spkrdata(0), m_pit_out2(0), m_dma_channel(0), m_cur_eop(false), m_dma_high_byte(0), m_eisa_irq_mode(0), m_at_speaker(0), m_refresh(false), m_channel_check(0), m_nmi_enabled(0) { - set_ids(0x80867000, 0x03, 0x060100, 0x00000000); + pci_set_ids(0x80867000, 0x03, 0x060100, 0x00000000); } void i82371sb_isa_device::device_start() @@ -184,9 +184,9 @@ void i82371sb_isa_device::device_reset() m_refresh = false; } -void i82371sb_isa_device::reset_all_mappings() +void i82371sb_isa_device::pci_reset_all_mappings() { - pci_device::reset_all_mappings(); + pci_device::pci_reset_all_mappings(); } void i82371sb_isa_device::boot_state_w(uint8_t data) @@ -390,11 +390,11 @@ void i82371sb_isa_device::cthtmr_w(uint8_t data) void i82371sb_isa_device::map_bios(address_space *memory_space, uint32_t start, uint32_t end) { - uint32_t mask = m_region->bytes() - 1; - memory_space->install_rom(start, end, m_region->base() + (start & mask)); + uint32_t mask = m_pci_region->bytes() - 1; + memory_space->install_rom(start, end, m_pci_region->base() + (start & mask)); } -void i82371sb_isa_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void i82371sb_isa_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { // assume that map_extra of the southbridge is called before the one of the northbridge @@ -895,9 +895,9 @@ void i82371sb_isa_device::update_smireq_line() DEFINE_DEVICE_TYPE(I82371SB_IDE, i82371sb_ide_device, "i82371sb_ide", "Intel 82371 southbridge IDE interface") -void i82371sb_ide_device::config_map(address_map &map) +void i82371sb_ide_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); map(0x04, 0x05).rw(FUNC(i82371sb_ide_device::command_r), FUNC(i82371sb_ide_device::command_w)); map(0x20, 0x23).rw(FUNC(i82371sb_ide_device::bmiba_r), FUNC(i82371sb_ide_device::bmiba_w)); map(0x40, 0x41).rw(FUNC(i82371sb_ide_device::idetim_primary_r), FUNC(i82371sb_ide_device::idetim_primary_w)); @@ -936,7 +936,7 @@ i82371sb_ide_device::i82371sb_ide_device(const machine_config &mconfig, const ch , m_ide1(*this, "ide1") , m_ide2(*this, "ide2") { - set_ids(0x80867010, 0, 0x010180, 0x00000000); + pci_set_ids(0x80867010, 0, 0x010180, 0x00000000); } void i82371sb_ide_device::device_start() @@ -949,11 +949,11 @@ void i82371sb_ide_device::device_reset() { } -void i82371sb_ide_device::reset_all_mappings() +void i82371sb_ide_device::pci_reset_all_mappings() { } -void i82371sb_ide_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void i82371sb_ide_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { io_space->install_device(0, 0x3ff, *this, &i82371sb_ide_device::internal_io_map); @@ -986,7 +986,7 @@ void i82371sb_ide_device::command_w(offs_t offset, uint16_t data, uint16_t mem_m mem_mask &= 5; COMBINE_DATA(&command); if (mem_mask & 1) - remap_cb(); + m_pci_remap_cb(); } uint32_t i82371sb_ide_device::bmiba_r() @@ -999,7 +999,7 @@ void i82371sb_ide_device::bmiba_w(offs_t offset, uint32_t data, uint32_t mem_mas mem_mask &= 0xfff0; COMBINE_DATA(&bmiba); if (command & 1) - remap_cb(); + m_pci_remap_cb(); } uint16_t i82371sb_ide_device::idetim_primary_r() diff --git a/src/devices/machine/i82371sb.h b/src/devices/machine/i82371sb.h index e6cddab4a3f..7b2fbd7502c 100644 --- a/src/devices/machine/i82371sb.h +++ b/src/devices/machine/i82371sb.h @@ -59,13 +59,13 @@ protected: // optional information overrides virtual void device_add_mconfig(machine_config &config) override; - virtual void reset_all_mappings() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_reset_all_mappings() override; + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; - virtual bool map_first() const override { return true; } + virtual bool pci_map_first() const override { return true; } - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: DECLARE_WRITE_LINE_MEMBER(at_pit8254_out0_changed); @@ -210,11 +210,11 @@ protected: // optional information overrides virtual void device_add_mconfig(machine_config &config) override; - virtual void reset_all_mappings() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_reset_all_mappings() override; + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; DECLARE_WRITE_LINE_MEMBER(primary_int); DECLARE_WRITE_LINE_MEMBER(secondary_int); diff --git a/src/devices/machine/i82439hx.cpp b/src/devices/machine/i82439hx.cpp index bffed0db0d8..b9853ac699e 100644 --- a/src/devices/machine/i82439hx.cpp +++ b/src/devices/machine/i82439hx.cpp @@ -5,9 +5,9 @@ DEFINE_DEVICE_TYPE(I82439HX, i82439hx_host_device, "i82439hx", "Intel 82439HX northbridge") -void i82439hx_host_device::config_map(address_map &map) +void i82439hx_host_device::pci_config_map(address_map &map) { - pci_host_device::config_map(map); + pci_host_device::pci_config_map(map); map(0x10, 0x4f).noprw(); map(0x50, 0x50).rw(FUNC(i82439hx_host_device::pcon_r), FUNC(i82439hx_host_device::pcon_w)); map(0x52, 0x52).rw(FUNC(i82439hx_host_device::cc_r), FUNC(i82439hx_host_device::cc_w)); @@ -47,16 +47,16 @@ void i82439hx_host_device::device_start() io_window_start = 0; io_window_end = 0xffff; io_offset = 0; - command = 0x0006; - command_mask = 0x0106; - status = 0x0200; + m_pci_command = 0x0006; + m_pci_command_mask = 0x0106; + m_pci_status = 0x0200; ram.resize(ram_size/4); } -void i82439hx_host_device::reset_all_mappings() +void i82439hx_host_device::pci_reset_all_mappings() { - pci_host_device::reset_all_mappings(); + pci_host_device::pci_reset_all_mappings(); } void i82439hx_host_device::device_reset() @@ -79,7 +79,7 @@ void i82439hx_host_device::device_reset() smiact_n = 1; } -void i82439hx_host_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void i82439hx_host_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { io_space->install_device(0, 0xffff, *static_cast<pci_host_device *>(this), &pci_host_device::io_configuration_access_map); @@ -163,7 +163,7 @@ void i82439hx_host_device::map_extra(uint64_t memory_window_start, uint64_t memo } -uint8_t i82439hx_host_device::header_type_r() +uint8_t i82439hx_host_device::pci_header_type_r() { return 0x00; // from datasheet } @@ -210,7 +210,7 @@ void i82439hx_host_device::dramc_w(uint8_t data) { dramc = data; logerror("dramc = %02x\n", dramc); - remap_cb(); + m_pci_remap_cb(); } uint8_t i82439hx_host_device::dramt_r() @@ -233,7 +233,7 @@ void i82439hx_host_device::pam_w(offs_t offset, uint8_t data) { pam[offset - 1] = data; logerror("pam[%d] = %02x\n", offset - 1, pam[offset - 1]); - remap_cb(); + m_pci_remap_cb(); } uint8_t i82439hx_host_device::drb_r(offs_t offset) @@ -278,7 +278,7 @@ void i82439hx_host_device::smram_w(uint8_t data) { smram = data; logerror("smram = %02x\n", smram); - remap_cb(); + m_pci_remap_cb(); } uint8_t i82439hx_host_device::errcmd_r() @@ -316,5 +316,5 @@ WRITE_LINE_MEMBER(i82439hx_host_device::smi_act_w) smiact_n = 1; else smiact_n = 0; - remap_cb(); + m_pci_remap_cb(); } diff --git a/src/devices/machine/i82439hx.h b/src/devices/machine/i82439hx.h index 73650cbac5d..b374176bdfc 100644 --- a/src/devices/machine/i82439hx.h +++ b/src/devices/machine/i82439hx.h @@ -15,7 +15,7 @@ public: i82439hx_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, int ram_size) : i82439hx_host_device(mconfig, tag, owner, clock) { - set_ids_host(0x80861250, 0x03, 0x00000000); + pci_set_ids_host(0x80861250, 0x03, 0x00000000); set_cpu_tag(std::forward<T>(cpu_tag)); set_ram_size(ram_size); } @@ -30,12 +30,12 @@ protected: virtual void device_start() override; virtual void device_reset() override; - virtual void reset_all_mappings() override; + virtual void pci_reset_all_mappings() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: int ram_size; @@ -47,7 +47,7 @@ private: uint8_t drt, drat, smram, errcmd, errsts, errsyn; int smiact_n; - virtual uint8_t header_type_r() override; + virtual uint8_t pci_header_type_r() override; uint8_t pcon_r(); void pcon_w(uint8_t data); uint8_t cc_r(); diff --git a/src/devices/machine/i82439tx.cpp b/src/devices/machine/i82439tx.cpp index f8c1c9a8bb3..2a9a35d3e9a 100644 --- a/src/devices/machine/i82439tx.cpp +++ b/src/devices/machine/i82439tx.cpp @@ -5,9 +5,9 @@ DEFINE_DEVICE_TYPE(I82439TX, i82439tx_host_device, "i82439tx", "Intel 82439TX northbridge") -void i82439tx_host_device::config_map(address_map &map) +void i82439tx_host_device::pci_config_map(address_map &map) { - pci_host_device::config_map(map); + pci_host_device::pci_config_map(map); map(0x50, 0x50).rw(FUNC(i82439tx_host_device::pcon_r), FUNC(i82439tx_host_device::pcon_w)); map(0x52, 0x52).rw(FUNC(i82439tx_host_device::cc_r), FUNC(i82439tx_host_device::cc_w)); map(0x56, 0x56).rw(FUNC(i82439tx_host_device::dramec_r), FUNC(i82439tx_host_device::dramec_w)); @@ -46,14 +46,14 @@ void i82439tx_host_device::device_start() io_window_start = 0; io_window_end = 0xffff; io_offset = 0; - status = 0x0010; + m_pci_status = 0x0010; ram.resize(ram_size/4); } -void i82439tx_host_device::reset_all_mappings() +void i82439tx_host_device::pci_reset_all_mappings() { - pci_host_device::reset_all_mappings(); + pci_host_device::pci_reset_all_mappings(); } void i82439tx_host_device::device_reset() @@ -75,7 +75,7 @@ void i82439tx_host_device::device_reset() errsyn = 0x00; } -void i82439tx_host_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void i82439tx_host_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { io_space->install_device(0, 0xffff, *static_cast<pci_host_device *>(this), &pci_host_device::io_configuration_access_map); @@ -191,7 +191,7 @@ void i82439tx_host_device::dramc_w(uint8_t data) { dramc = data; logerror("dramc = %02x\n", dramc); - remap_cb(); + m_pci_remap_cb(); } uint8_t i82439tx_host_device::dramt_r() @@ -214,7 +214,7 @@ void i82439tx_host_device::pam_w(offs_t offset, uint8_t data) { pam[offset - 1] = data; logerror("pam[%d] = %02x\n", offset - 1, pam[offset - 1]); - remap_cb(); + m_pci_remap_cb(); } uint8_t i82439tx_host_device::drb_r(offs_t offset) @@ -259,7 +259,7 @@ void i82439tx_host_device::smram_w(uint8_t data) { smram = data; logerror("smram = %02x\n", smram); - remap_cb(); + m_pci_remap_cb(); } uint8_t i82439tx_host_device::errcmd_r() diff --git a/src/devices/machine/i82439tx.h b/src/devices/machine/i82439tx.h index a2a9528b1dd..32b64d2336d 100644 --- a/src/devices/machine/i82439tx.h +++ b/src/devices/machine/i82439tx.h @@ -15,7 +15,7 @@ public: i82439tx_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, int ram_size) : i82439tx_host_device(mconfig, tag, owner, clock) { - set_ids_host(0x80867100, 0x03, 0x00000000); + pci_set_ids_host(0x80867100, 0x03, 0x00000000); set_cpu_tag(std::forward<T>(cpu_tag)); set_ram_size(ram_size); } @@ -28,12 +28,12 @@ protected: virtual void device_start() override; virtual void device_reset() override; - virtual void reset_all_mappings() override; + virtual void pci_reset_all_mappings() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: int ram_size; diff --git a/src/devices/machine/i82541.cpp b/src/devices/machine/i82541.cpp index b727ac6e295..c01246f4fff 100644 --- a/src/devices/machine/i82541.cpp +++ b/src/devices/machine/i82541.cpp @@ -25,9 +25,9 @@ i82541_device::i82541_device(const machine_config &mconfig, const char *tag, dev void i82541_device::device_start() { pci_device::device_start(); - add_map(128*1024, M_MEM, FUNC(i82541_device::registers_map)); - add_map(128*1024, M_MEM, FUNC(i82541_device::flash_map)); - add_map(32, M_IO, FUNC(i82541_device::registers_io_map)); + pci_add_map(128*1024, M_MEM, FUNC(i82541_device::registers_map)); + pci_add_map(128*1024, M_MEM, FUNC(i82541_device::flash_map)); + pci_add_map(32, M_IO, FUNC(i82541_device::registers_io_map)); } void i82541_device::device_reset() diff --git a/src/devices/machine/i82541.h b/src/devices/machine/i82541.h index 1614bf0b01c..1b742c680ac 100644 --- a/src/devices/machine/i82541.h +++ b/src/devices/machine/i82541.h @@ -12,7 +12,7 @@ public: i82541_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subdevice_id) : i82541_device(mconfig, tag, owner, clock) { - set_ids(0x8086107c, 0x05, 0x020000, subdevice_id); + pci_set_ids(0x8086107c, 0x05, 0x020000, subdevice_id); } i82541_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/i82875p.cpp b/src/devices/machine/i82875p.cpp index 37d95112359..7fe116f696c 100644 --- a/src/devices/machine/i82875p.cpp +++ b/src/devices/machine/i82875p.cpp @@ -11,9 +11,9 @@ void i82875p_host_device::agp_translation_map(address_map &map) { } -void i82875p_host_device::config_map(address_map &map) +void i82875p_host_device::pci_config_map(address_map &map) { - pci_host_device::config_map(map); + pci_host_device::pci_config_map(map); map(0x51, 0x51).rw(FUNC(i82875p_host_device::agpm_r), FUNC(i82875p_host_device::agpm_w)); map(0x52, 0x52).r(FUNC(i82875p_host_device::gc_r)); map(0x53, 0x53).r(FUNC(i82875p_host_device::csabcont_r)); @@ -54,7 +54,7 @@ void i82875p_host_device::set_ram_size(int _ram_size) ram_size = _ram_size; } -uint8_t i82875p_host_device::capptr_r() +uint8_t i82875p_host_device::pci_capptr_r() { return 0xe4; } @@ -71,12 +71,12 @@ void i82875p_host_device::device_start() io_window_start = 0; io_window_end = 0xffff; io_offset = 0; - status = 0x0010; + m_pci_status = 0x0010; ram.resize(ram_size/4); // Resizeable with the apsize register - add_map(256*1024*1024, M_MEM, FUNC(i82875p_host_device::agp_translation_map)); + pci_add_map(256*1024*1024, M_MEM, FUNC(i82875p_host_device::agp_translation_map)); } uint8_t i82875p_host_device::agpm_r() @@ -135,7 +135,7 @@ void i82875p_host_device::pam_w(offs_t offset, uint8_t data) { pam[offset] = data; logerror("%s: pam[%d] = %02x\n", tag(), offset, data); - remap_cb(); + m_pci_remap_cb(); } uint8_t i82875p_host_device::smram_r() @@ -148,7 +148,7 @@ void i82875p_host_device::smram_w(uint8_t data) if(!(smram & 0x10)) smram = (data & 0xfe) | 0x02; logerror("%s: smram = %02x\n", tag(), smram); - remap_cb(); + m_pci_remap_cb(); } uint8_t i82875p_host_device::esmramc_r() @@ -161,7 +161,7 @@ void i82875p_host_device::esmramc_w(uint8_t data) if(!(smram & 0x10)) esmramc = (data & 0x87) | 0x38; logerror("%s: esmramc = %02x\n", tag(), smram); - remap_cb(); + m_pci_remap_cb(); } uint32_t i82875p_host_device::acapid_r() @@ -242,7 +242,7 @@ void i82875p_host_device::toud_w(offs_t offset, uint16_t data, uint16_t mem_mask COMBINE_DATA(&toud); toud &= ~7; logerror("%s: toud = %08x\n", tag(), toud << 16); - remap_cb(); + m_pci_remap_cb(); } uint16_t i82875p_host_device::mchcfg_r() @@ -310,9 +310,9 @@ uint8_t i82875p_host_device::capreg2_r() return 0x00; } -void i82875p_host_device::reset_all_mappings() +void i82875p_host_device::pci_reset_all_mappings() { - pci_host_device::reset_all_mappings(); + pci_host_device::pci_reset_all_mappings(); toud = 0x0400; smram = 0x02; @@ -338,7 +338,7 @@ void i82875p_host_device::device_reset() skpd = 0x0000; } -void i82875p_host_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void i82875p_host_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { io_space->install_device(0, 0xffff, *static_cast<pci_host_device *>(this), &pci_host_device::io_configuration_access_map); @@ -426,7 +426,7 @@ void i82875p_host_device::map_extra(uint64_t memory_window_start, uint64_t memor i82875p_agp_device::i82875p_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : agp_bridge_device(mconfig, I82875P_AGP, tag, owner, clock) { - set_ids_bridge(0x80862579, 0x02); + pci_set_ids_bridge(0x80862579, 0x02); } void i82875p_agp_device::device_start() @@ -457,7 +457,7 @@ void i82875p_overflow_device::device_start() { pci_device::device_start(); - add_map(4*1024, M_MEM, FUNC(i82875p_overflow_device::overflow_map)); + pci_add_map(4*1024, M_MEM, FUNC(i82875p_overflow_device::overflow_map)); } void i82875p_overflow_device::device_reset() diff --git a/src/devices/machine/i82875p.h b/src/devices/machine/i82875p.h index ecd252b35ef..2dee5d43b9b 100644 --- a/src/devices/machine/i82875p.h +++ b/src/devices/machine/i82875p.h @@ -15,7 +15,7 @@ public: i82875p_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subdevice_id, T &&cpu_tag, int ram_size) : i82875p_host_device(mconfig, tag, owner, clock) { - set_ids_host(0x80862578, 0x02, subdevice_id); + pci_set_ids_host(0x80862578, 0x02, subdevice_id); set_cpu_tag(std::forward<T>(cpu_tag)); set_ram_size(ram_size); } @@ -25,18 +25,18 @@ public: template <typename T> void set_cpu_tag(T &&tag) { cpu.set_tag(std::forward<T>(tag)); } void set_ram_size(int ram_size); - virtual uint8_t capptr_r() override; + virtual uint8_t pci_capptr_r() override; protected: virtual void device_start() override; virtual void device_reset() override; - virtual void reset_all_mappings() override; + virtual void pci_reset_all_mappings() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: void agp_translation_map(address_map &map); @@ -109,7 +109,7 @@ public: i82875p_overflow_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subdevice_id) : i82875p_overflow_device(mconfig, tag, owner, clock) { - set_ids(0x8086257e, 0x02, 0x088000, subdevice_id); + pci_set_ids(0x8086257e, 0x02, 0x088000, subdevice_id); } i82875p_overflow_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/pci-apic.h b/src/devices/machine/pci-apic.h index ede3d80baf3..5df7f5a83b6 100644 --- a/src/devices/machine/pci-apic.h +++ b/src/devices/machine/pci-apic.h @@ -12,7 +12,7 @@ public: apic_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t main_id, uint32_t revision, uint32_t subdevice_id) : apic_device(mconfig, tag, owner, clock) { - set_ids(main_id, revision, 0x080010, subdevice_id); + pci_set_ids(main_id, revision, 0x080010, subdevice_id); } apic_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/pci-ide.cpp b/src/devices/machine/pci-ide.cpp index fed9182e312..e84d7947e1d 100644 --- a/src/devices/machine/pci-ide.cpp +++ b/src/devices/machine/pci-ide.cpp @@ -17,9 +17,9 @@ ide_pci_device::ide_pci_device(const machine_config &mconfig, const char *tag, d { } -void ide_pci_device::config_map(address_map &map) +void ide_pci_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); map(0x09, 0x09).w(FUNC(ide_pci_device::prog_if_w)); map(0x10, 0x1f).rw(FUNC(ide_pci_device::address_base_r), FUNC(ide_pci_device::address_base_w)); map(0x2c, 0x2f).w(FUNC(ide_pci_device::subsystem_id_w)); @@ -70,14 +70,14 @@ void ide_pci_device::device_start() pci_device::device_start(); // always keep this device memory ranges active - command |= 3; - command_mask &= ~3; + m_pci_command |= 3; + m_pci_command_mask &= ~3; - add_map(8, M_IO, FUNC(ide_pci_device::chan1_data_command_map)); - add_map(4, M_IO, FUNC(ide_pci_device::chan1_control_map)); - add_map(8, M_IO, FUNC(ide_pci_device::chan2_data_command_map)); - add_map(4, M_IO, FUNC(ide_pci_device::chan2_control_map)); - add_map(16, M_IO, FUNC(ide_pci_device::bus_master_map)); + pci_add_map(8, M_IO, FUNC(ide_pci_device::chan1_data_command_map)); + pci_add_map(4, M_IO, FUNC(ide_pci_device::chan1_control_map)); + pci_add_map(8, M_IO, FUNC(ide_pci_device::chan2_data_command_map)); + pci_add_map(4, M_IO, FUNC(ide_pci_device::chan2_control_map)); + pci_add_map(16, M_IO, FUNC(ide_pci_device::bus_master_map)); // Setup stored BARs pci_bar[0] = 0x1f0; @@ -88,8 +88,8 @@ void ide_pci_device::device_start() m_irq_handler.resolve_safe(); - intr_pin = 0x1; - intr_line = 0xe; + m_pci_intr_pin = 0x1; + m_pci_intr_line = 0xe; // Save states save_item(NAME(pci_bar)); @@ -100,16 +100,16 @@ void ide_pci_device::device_start() void ide_pci_device::device_reset() { pci_device::device_reset(); - bank_infos[0].adr = (m_legacy_top << 20) | 0x1f0; - bank_infos[1].adr = (m_legacy_top << 20) | 0x3f4; - bank_infos[2].adr = (m_legacy_top << 20) | 0x170; - bank_infos[3].adr = (m_legacy_top << 20) | 0x374; - bank_infos[4].adr = 0xf00; - pclass = 0x010100 | m_pif; - remap_cb(); + m_pci_bank_info[0].adr = (m_legacy_top << 20) | 0x1f0; + m_pci_bank_info[1].adr = (m_legacy_top << 20) | 0x3f4; + m_pci_bank_info[2].adr = (m_legacy_top << 20) | 0x170; + m_pci_bank_info[3].adr = (m_legacy_top << 20) | 0x374; + m_pci_bank_info[4].adr = 0xf00; + m_pci_pclass = 0x010100 | m_pif; + m_pci_remap_cb(); // PCI0646U allow BAR - if (main_id == 0x10950646) + if (m_pci_main_id == 0x10950646) m_config_data[0x10 / 4] |= 0x0C40; m_ide->reset(); m_ide2->reset(); @@ -151,7 +151,7 @@ WRITE_LINE_MEMBER(ide_pci_device::ide_interrupt) m_irq_handler(state); // PCI646U2 Offset 0x50 is interrupt status - if (main_id == 0x10950646) { + if (m_pci_main_id == 0x10950646) { if (state) m_config_data[0x10 / 4] |= 0x4; else @@ -163,34 +163,34 @@ WRITE_LINE_MEMBER(ide_pci_device::ide_interrupt) void ide_pci_device::prog_if_w(uint8_t data) { - uint32_t oldVal = pclass; - pclass = (pclass & ~(0xff)) | (data & 0xff); + uint32_t oldVal = m_pci_pclass; + m_pci_pclass = (m_pci_pclass & ~(0xff)) | (data & 0xff); // Check for switch to/from compatibility (legacy) mode from/to pci mode - if ((oldVal ^ pclass) & 0x5) { + if ((oldVal ^ m_pci_pclass) & 0x5) { // Map Primary IDE Channel - if (pclass & 0x1) { + if (m_pci_pclass & 0x1) { // PCI Mode - pci_device::address_base_w(0, pci_bar[0]); - pci_device::address_base_w(1, pci_bar[1]); + pci_device::pci_address_base_w(0, pci_bar[0]); + pci_device::pci_address_base_w(1, pci_bar[1]); } else { // Legacy Mode - pci_device::address_base_w(0, (m_legacy_top << 20) | 0x1f0); - pci_device::address_base_w(1, (m_legacy_top << 20) | 0x3f4); + pci_device::pci_address_base_w(0, (m_legacy_top << 20) | 0x1f0); + pci_device::pci_address_base_w(1, (m_legacy_top << 20) | 0x3f4); } // Map Primary IDE Channel - if (pclass & 0x4) { + if (m_pci_pclass & 0x4) { // PCI Mode - pci_device::address_base_w(2, pci_bar[2]); - pci_device::address_base_w(3, pci_bar[3]); + pci_device::pci_address_base_w(2, pci_bar[2]); + pci_device::pci_address_base_w(3, pci_bar[3]); } else { // Legacy Mode - pci_device::address_base_w(2, (m_legacy_top << 20) | 0x170); - pci_device::address_base_w(3, (m_legacy_top << 20) | 0x374); + pci_device::pci_address_base_w(2, (m_legacy_top << 20) | 0x170); + pci_device::pci_address_base_w(3, (m_legacy_top << 20) | 0x374); } } if (1) - logerror("%s:prog_if_w pclass = %06X\n", machine().describe_context(), pclass); + logerror("%s:prog_if_w pclass = %06X\n", machine().describe_context(), m_pci_pclass); } uint32_t ide_pci_device::pcictrl_r(offs_t offset) @@ -202,7 +202,7 @@ void ide_pci_device::pcictrl_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&m_config_data[offset]); // PCI646U2 Offset 0x50 is interrupt status - if (main_id == 0x10950646 && offset == (0x10 / 4) && (data & 0x4)) { + if (m_pci_main_id == 0x10950646 && offset == (0x10 / 4) && (data & 0x4)) { m_config_data[0x10 / 4] &= ~0x4; if (0) logerror("%s:ide_pci_device::pcictrl_w Clearing interrupt status\n", machine().describe_context()); @@ -211,13 +211,13 @@ void ide_pci_device::pcictrl_w(offs_t offset, uint32_t data, uint32_t mem_mask) uint32_t ide_pci_device::address_base_r(offs_t offset) { - if (bank_reg_infos[offset].bank == -1) + if (m_pci_bank_reg_info[offset].bank == -1) return 0; - int bid = bank_reg_infos[offset].bank; - if (bank_reg_infos[offset].hi) - return bank_infos[bid].adr >> 32; - int flags = bank_infos[bid].flags; - return (pci_bar[offset] & ~(bank_infos[bid].size - 1)) | (flags & M_IO ? 1 : 0) | (flags & M_64A ? 4 : 0) | (flags & M_PREF ? 8 : 0); + int bid = m_pci_bank_reg_info[offset].bank; + if (m_pci_bank_reg_info[offset].hi) + return m_pci_bank_info[bid].adr >> 32; + int flags = m_pci_bank_info[bid].flags; + return (pci_bar[offset] & ~(m_pci_bank_info[bid].size - 1)) | (flags & M_IO ? 1 : 0) | (flags & M_64A ? 4 : 0) | (flags & M_PREF ? 8 : 0); } @@ -228,16 +228,16 @@ void ide_pci_device::address_base_w(offs_t offset, uint32_t data) // Bits 0 (primary) and 2 (secondary) control if the mapping is legacy or BAR switch (offset) { case 0: case 1: - if (pclass & 0x1) - pci_device::address_base_w(offset, data); + if (m_pci_pclass & 0x1) + pci_device::pci_address_base_w(offset, data); break; case 2: case 3: - if (pclass & 0x4) - pci_device::address_base_w(offset, data); + if (m_pci_pclass & 0x4) + pci_device::pci_address_base_w(offset, data); break; default: // Only the first 4 bars are controlled by pif - pci_device::address_base_w(offset, data); + pci_device::pci_address_base_w(offset, data); } logerror("Mapping bar[%i] = %08x\n", offset, data); } @@ -246,5 +246,5 @@ void ide_pci_device::subsystem_id_w(uint32_t data) { // Config register 0x4f enables subsystem id writing for CMD646 if (m_config_data[0xc / 4] & 0x01000000) - subsystem_id = (data << 16) | (data >> 16); + m_pci_subsystem_id = (data << 16) | (data >> 16); } diff --git a/src/devices/machine/pci-ide.h b/src/devices/machine/pci-ide.h index 140db524f50..8cd932a0572 100644 --- a/src/devices/machine/pci-ide.h +++ b/src/devices/machine/pci-ide.h @@ -25,7 +25,7 @@ public: , const char *bmtag = ":pci:00.0", uint32_t bmspace = AS_DATA) : ide_pci_device(mconfig, tag, owner, clock) { - set_ids(main_id, revision, 0x01018a, subdevice_id); + pci_set_ids(main_id, revision, 0x01018a, subdevice_id); m_bus_master_tag = bmtag; m_bus_master_space = bmspace; } @@ -46,7 +46,7 @@ protected: // optional information overrides virtual void device_add_mconfig(machine_config &config) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: DECLARE_WRITE_LINE_MEMBER(ide_interrupt); diff --git a/src/devices/machine/pci-sata.cpp b/src/devices/machine/pci-sata.cpp index 1332fea71d5..58287723496 100644 --- a/src/devices/machine/pci-sata.cpp +++ b/src/devices/machine/pci-sata.cpp @@ -39,12 +39,12 @@ void sata_device::device_start() { pci_device::device_start(); - add_map(8, M_IO, FUNC(sata_device::primary_command_map)); - add_map(4, M_IO, FUNC(sata_device::primary_control_map)); - add_map(8, M_IO, FUNC(sata_device::secondary_command_map)); - add_map(4, M_IO, FUNC(sata_device::secondary_control_map)); - add_map(16, M_IO, FUNC(sata_device::bus_master_map)); - add_map(1024, M_MEM, FUNC(sata_device::ide_command_posting_map)); + pci_add_map(8, M_IO, FUNC(sata_device::primary_command_map)); + pci_add_map(4, M_IO, FUNC(sata_device::primary_control_map)); + pci_add_map(8, M_IO, FUNC(sata_device::secondary_command_map)); + pci_add_map(4, M_IO, FUNC(sata_device::secondary_control_map)); + pci_add_map(16, M_IO, FUNC(sata_device::bus_master_map)); + pci_add_map(1024, M_MEM, FUNC(sata_device::ide_command_posting_map)); } void sata_device::device_reset() diff --git a/src/devices/machine/pci-sata.h b/src/devices/machine/pci-sata.h index edf3545c1d7..beed64fda6c 100644 --- a/src/devices/machine/pci-sata.h +++ b/src/devices/machine/pci-sata.h @@ -12,7 +12,7 @@ public: sata_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t main_id, uint32_t revision, uint32_t subdevice_id) : sata_device(mconfig, tag, owner, clock) { - set_ids(main_id, revision, 0x01018a, subdevice_id); + pci_set_ids(main_id, revision, 0x01018a, subdevice_id); } sata_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/pci-smbus.cpp b/src/devices/machine/pci-smbus.cpp index 62a4f99cbb7..e067360b55f 100644 --- a/src/devices/machine/pci-smbus.cpp +++ b/src/devices/machine/pci-smbus.cpp @@ -36,8 +36,8 @@ smbus_device::smbus_device(const machine_config &mconfig, const char *tag, devic void smbus_device::device_start() { pci_device::device_start(); - skip_map_regs(4); - add_map(32, M_IO, FUNC(smbus_device::map)); + pci_skip_map_regs(4); + pci_add_map(32, M_IO, FUNC(smbus_device::map)); } void smbus_device::device_reset() diff --git a/src/devices/machine/pci-smbus.h b/src/devices/machine/pci-smbus.h index 9c7cd79aa74..74be165a988 100644 --- a/src/devices/machine/pci-smbus.h +++ b/src/devices/machine/pci-smbus.h @@ -10,7 +10,7 @@ public: smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t main_id, uint32_t revision, uint32_t subdevice_id) : smbus_device(mconfig, tag, owner, clock) { - set_ids(main_id, revision, 0x0c0500, subdevice_id); + pci_set_ids(main_id, revision, 0x0c0500, subdevice_id); } smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/pci-usb.cpp b/src/devices/machine/pci-usb.cpp index 0b45c1bd9ee..4a1857657b7 100644 --- a/src/devices/machine/pci-usb.cpp +++ b/src/devices/machine/pci-usb.cpp @@ -19,7 +19,7 @@ usb_ohci_device::usb_ohci_device(const machine_config &mconfig, const char *tag, void usb_ohci_device::device_start() { pci_device::device_start(); - add_map(4096, M_MEM, FUNC(usb_ohci_device::map)); + pci_add_map(4096, M_MEM, FUNC(usb_ohci_device::map)); } void usb_ohci_device::device_reset() @@ -39,7 +39,7 @@ usb_uhci_device::usb_uhci_device(const machine_config &mconfig, const char *tag, void usb_uhci_device::device_start() { pci_device::device_start(); - add_map(32, M_IO, FUNC(usb_uhci_device::map)); + pci_add_map(32, M_IO, FUNC(usb_uhci_device::map)); } void usb_uhci_device::device_reset() @@ -59,7 +59,7 @@ usb_ehci_device::usb_ehci_device(const machine_config &mconfig, const char *tag, void usb_ehci_device::device_start() { pci_device::device_start(); - add_map(1024, M_MEM, FUNC(usb_ehci_device::map)); + pci_add_map(1024, M_MEM, FUNC(usb_ehci_device::map)); } void usb_ehci_device::device_reset() diff --git a/src/devices/machine/pci-usb.h b/src/devices/machine/pci-usb.h index 388fa28b24d..ba9b57aced4 100644 --- a/src/devices/machine/pci-usb.h +++ b/src/devices/machine/pci-usb.h @@ -12,7 +12,7 @@ public: usb_ohci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t main_id, uint32_t revision, uint32_t subdevice_id) : usb_ohci_device(mconfig, tag, owner, clock) { - set_ids(main_id, revision, 0x0c0310, subdevice_id); + pci_set_ids(main_id, revision, 0x0c0310, subdevice_id); } usb_ohci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -29,7 +29,7 @@ public: usb_uhci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t main_id, uint32_t revision, uint32_t subdevice_id) : usb_uhci_device(mconfig, tag, owner, clock) { - set_ids(main_id, revision, 0x0c0300, subdevice_id); + pci_set_ids(main_id, revision, 0x0c0300, subdevice_id); } usb_uhci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -46,7 +46,7 @@ public: usb_ehci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t main_id, uint32_t revision, uint32_t subdevice_id) : usb_ehci_device(mconfig, tag, owner, clock) { - set_ids(main_id, revision, 0x0c0320, subdevice_id); + pci_set_ids(main_id, revision, 0x0c0320, subdevice_id); } usb_ehci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/pci.cpp b/src/devices/machine/pci.cpp index 2620f1fc642..948ddcf5e9b 100644 --- a/src/devices/machine/pci.cpp +++ b/src/devices/machine/pci.cpp @@ -7,40 +7,40 @@ DEFINE_DEVICE_TYPE(PCI_ROOT, pci_root_device, "pci_root", "PCI virtual roo DEFINE_DEVICE_TYPE(PCI_BRIDGE, pci_bridge_device, "pci_bridge", "PCI-PCI Bridge") -void pci_device::config_map(address_map &map) -{ - map(0x00, 0x01).r(FUNC(pci_device::vendor_r)); - map(0x02, 0x03).r(FUNC(pci_device::device_r)); - map(0x04, 0x05).rw(FUNC(pci_device::command_r), FUNC(pci_device::command_w)); - map(0x06, 0x07).r(FUNC(pci_device::status_r)); - map(0x08, 0x0b).r(FUNC(pci_device::class_rev_r)); - map(0x0c, 0x0c).r(FUNC(pci_device::cache_line_size_r)); - map(0x0d, 0x0d).r(FUNC(pci_device::latency_timer_r)); - map(0x0e, 0x0e).r(FUNC(pci_device::header_type_r)); - map(0x0f, 0x0f).r(FUNC(pci_device::bist_r)); +void pci_device::pci_config_map(address_map &map) +{ + map(0x00, 0x01).r(FUNC(pci_device::pci_vendor_r)); + map(0x02, 0x03).r(FUNC(pci_device::pci_device_r)); + map(0x04, 0x05).rw(FUNC(pci_device::pci_command_r), FUNC(pci_device::pci_command_w)); + map(0x06, 0x07).r(FUNC(pci_device::pci_status_r)); + map(0x08, 0x0b).r(FUNC(pci_device::pci_class_rev_r)); + map(0x0c, 0x0c).r(FUNC(pci_device::pci_cache_line_size_r)); + map(0x0d, 0x0d).r(FUNC(pci_device::pci_latency_timer_r)); + map(0x0e, 0x0e).r(FUNC(pci_device::pci_header_type_r)); + map(0x0f, 0x0f).r(FUNC(pci_device::pci_bist_r)); map(0x0c, 0x0f).nopw(); - map(0x10, 0x27).rw(FUNC(pci_device::address_base_r), FUNC(pci_device::address_base_w)); + map(0x10, 0x27).rw(FUNC(pci_device::pci_address_base_r), FUNC(pci_device::pci_address_base_w)); // Cardbus CIS pointer at 28 - map(0x2c, 0x2d).r(FUNC(pci_device::subvendor_r)); - map(0x2e, 0x2f).r(FUNC(pci_device::subsystem_r)); + map(0x2c, 0x2d).r(FUNC(pci_device::pci_subvendor_r)); + map(0x2e, 0x2f).r(FUNC(pci_device::pci_subsystem_r)); map(0x2c, 0x2f).nopw(); - map(0x30, 0x33).rw(FUNC(pci_device::expansion_base_r), FUNC(pci_device::expansion_base_w)); - map(0x34, 0x34).r(FUNC(pci_device::capptr_r)); - map(0x3c, 0x3c).rw(FUNC(pci_device::interrupt_line_r), FUNC(pci_device::interrupt_line_w)); - map(0x3d, 0x3d).rw(FUNC(pci_device::interrupt_pin_r), FUNC(pci_device::interrupt_pin_w)); -} - -void pci_bridge_device::config_map(address_map &map) -{ - map(0x00, 0x01).r(FUNC(pci_bridge_device::vendor_r)); - map(0x02, 0x03).r(FUNC(pci_bridge_device::device_r)); - map(0x04, 0x05).rw(FUNC(pci_bridge_device::command_r), FUNC(pci_bridge_device::command_w)); - map(0x06, 0x07).r(FUNC(pci_bridge_device::status_r)); - map(0x08, 0x0b).r(FUNC(pci_bridge_device::class_rev_r)); - map(0x0c, 0x0c).r(FUNC(pci_bridge_device::cache_line_size_r)); - map(0x0d, 0x0d).r(FUNC(pci_bridge_device::latency_timer_r)); - map(0x0e, 0x0e).r(FUNC(pci_bridge_device::header_type_r)); - map(0x0f, 0x0f).r(FUNC(pci_bridge_device::bist_r)); + map(0x30, 0x33).rw(FUNC(pci_device::pci_expansion_base_r), FUNC(pci_device::pci_expansion_base_w)); + map(0x34, 0x34).r(FUNC(pci_device::pci_capptr_r)); + map(0x3c, 0x3c).rw(FUNC(pci_device::pci_interrupt_line_r), FUNC(pci_device::pci_interrupt_line_w)); + map(0x3d, 0x3d).rw(FUNC(pci_device::pci_interrupt_pin_r), FUNC(pci_device::pci_interrupt_pin_w)); +} + +void pci_bridge_device::pci_config_map(address_map &map) +{ + map(0x00, 0x01).r(FUNC(pci_bridge_device::pci_vendor_r)); + map(0x02, 0x03).r(FUNC(pci_bridge_device::pci_device_r)); + map(0x04, 0x05).rw(FUNC(pci_bridge_device::pci_command_r), FUNC(pci_bridge_device::pci_command_w)); + map(0x06, 0x07).r(FUNC(pci_bridge_device::pci_status_r)); + map(0x08, 0x0b).r(FUNC(pci_bridge_device::pci_class_rev_r)); + map(0x0c, 0x0c).r(FUNC(pci_bridge_device::pci_cache_line_size_r)); + map(0x0d, 0x0d).r(FUNC(pci_bridge_device::pci_latency_timer_r)); + map(0x0e, 0x0e).r(FUNC(pci_bridge_device::pci_header_type_r)); + map(0x0f, 0x0f).r(FUNC(pci_bridge_device::pci_bist_r)); map(0x10, 0x17).rw(FUNC(pci_bridge_device::b_address_base_r), FUNC(pci_bridge_device::b_address_base_w)); map(0x18, 0x18).rw(FUNC(pci_bridge_device::primary_bus_r), FUNC(pci_bridge_device::primary_bus_w)); map(0x19, 0x19).rw(FUNC(pci_bridge_device::secondary_bus_r), FUNC(pci_bridge_device::secondary_bus_w)); @@ -57,256 +57,245 @@ void pci_bridge_device::config_map(address_map &map) map(0x2c, 0x2f).rw(FUNC(pci_bridge_device::prefetch_limitu_r), FUNC(pci_bridge_device::prefetch_limitu_w)); map(0x30, 0x31).rw(FUNC(pci_bridge_device::iobaseu_r), FUNC(pci_bridge_device::iobaseu_w)); map(0x32, 0x33).rw(FUNC(pci_bridge_device::iolimitu_r), FUNC(pci_bridge_device::iolimitu_w)); - map(0x34, 0x34).r(FUNC(pci_bridge_device::capptr_r)); - map(0x38, 0x3b).rw(FUNC(pci_bridge_device::expansion_base_r), FUNC(pci_bridge_device::expansion_base_w)); - map(0x3c, 0x3c).rw(FUNC(pci_bridge_device::interrupt_line_r), FUNC(pci_bridge_device::interrupt_line_w)); - map(0x3d, 0x3d).rw(FUNC(pci_bridge_device::interrupt_pin_r), FUNC(pci_bridge_device::interrupt_pin_w)); + map(0x34, 0x34).r(FUNC(pci_bridge_device::pci_capptr_r)); + map(0x38, 0x3b).rw(FUNC(pci_bridge_device::pci_expansion_base_r), FUNC(pci_bridge_device::pci_expansion_base_w)); + map(0x3c, 0x3c).rw(FUNC(pci_bridge_device::pci_interrupt_line_r), FUNC(pci_bridge_device::pci_interrupt_line_w)); + map(0x3d, 0x3d).rw(FUNC(pci_bridge_device::pci_interrupt_pin_r), FUNC(pci_bridge_device::pci_interrupt_pin_w)); map(0x3e, 0x3f).rw(FUNC(pci_bridge_device::bridge_control_r), FUNC(pci_bridge_device::bridge_control_w)); } pci_device::pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock) - , m_region(*this, DEVICE_SELF) -{ - main_id = 0xffffffff; - revision = 0x00; - pclass = 0xffffff; - subsystem_id = 0xffffffff; - expansion_rom = nullptr; - expansion_rom_size = 0; - expansion_rom_base = 0; - is_multifunction_device = false; - intr_pin = 0x0; - intr_line = 0xff; + , m_pci_region(*this, DEVICE_SELF) +{ + m_pci_main_id = 0xffffffff; + m_pci_revision = 0x00; + m_pci_pclass = 0xffffff; + m_pci_subsystem_id = 0xffffffff; + m_pci_expansion_rom = nullptr; + m_pci_expansion_rom_size = 0; + m_pci_expansion_rom_base = 0; + m_pci_is_multifunction_device = false; + m_pci_intr_pin = 0x0; + m_pci_intr_line = 0xff; for(int i=0; i<6; i++) { - bank_infos[i].adr = -1; - bank_infos[i].size = 0; - bank_infos[i].flags = 0; - bank_reg_infos[i].bank = -1; - bank_reg_infos[i].hi = 0; + m_pci_bank_info[i].adr = -1; + m_pci_bank_info[i].size = 0; + m_pci_bank_info[i].flags = 0; + m_pci_bank_reg_info[i].bank = -1; + m_pci_bank_reg_info[i].hi = 0; } } -void pci_device::set_ids(uint32_t _main_id, uint8_t _revision, uint32_t _pclass, uint32_t _subsystem_id) +void pci_device::pci_set_ids(uint32_t _main_id, uint8_t _revision, uint32_t _pclass, uint32_t _subsystem_id) { - main_id = _main_id; - revision = _revision; - pclass = _pclass; - subsystem_id = _subsystem_id; + m_pci_main_id = _main_id; + m_pci_revision = _revision; + m_pci_pclass = _pclass; + m_pci_subsystem_id = _subsystem_id; } void pci_device::device_start() { - command = 0x0080; - command_mask = 0x01bf; - status = 0x0000; + m_pci_command = 0x0080; + m_pci_command_mask = 0x01bf; + m_pci_status = 0x0000; - bank_count = 0; - bank_reg_count = 0; + m_pci_bank_count = 0; + m_pci_bank_reg_count = 0; - save_item(STRUCT_MEMBER(bank_infos, adr)); - save_item(NAME(command)); - save_item(NAME(command_mask)); - save_item(NAME(status)); - save_item(NAME(intr_line)); - save_item(NAME(intr_pin)); + save_item(STRUCT_MEMBER(m_pci_bank_info, adr)); + save_item(NAME(m_pci_command)); + save_item(NAME(m_pci_command_mask)); + save_item(NAME(m_pci_status)); + save_item(NAME(m_pci_intr_line)); + save_item(NAME(m_pci_intr_pin)); } void pci_device::device_reset() { } -uint32_t pci_device::unmapped_r(offs_t offset, uint32_t mem_mask, int bank) +template<int N> +uint32_t pci_device::pci_unmapped_r(offs_t offset, uint32_t mem_mask) { - logerror("%s: unmapped read from %08x & %08x (%s)\n", machine().describe_context(), offset*4, mem_mask, bank_infos[bank].map.name()); + logerror("%s: unmapped read from %08x & %08x (%s)\n", machine().describe_context(), offset*4, mem_mask, m_pci_bank_info[N].map.name()); return 0; } -void pci_device::unmapped_w(offs_t offset, uint32_t data, uint32_t mem_mask, int bank) +template<int N> +void pci_device::pci_unmapped_w(offs_t offset, uint32_t data, uint32_t mem_mask) { - logerror("%s: unmapped write to %08x = %08x & %08x (%s)\n", machine().describe_context(), offset*4, data, mem_mask, bank_infos[bank].map.name()); + logerror("%s: unmapped write to %08x = %08x & %08x (%s)\n", machine().describe_context(), offset*4, data, mem_mask, m_pci_bank_info[N].map.name()); } -uint32_t pci_device::unmapped0_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 0); } -void pci_device::unmapped0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 0); } -uint32_t pci_device::unmapped1_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 1); } -void pci_device::unmapped1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 1); } -uint32_t pci_device::unmapped2_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 2); } -void pci_device::unmapped2_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 2); } -uint32_t pci_device::unmapped3_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 3); } -void pci_device::unmapped3_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 3); } -uint32_t pci_device::unmapped4_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 4); } -void pci_device::unmapped4_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 4); } -uint32_t pci_device::unmapped5_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 5); } -void pci_device::unmapped5_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 5); } - -uint32_t pci_device::address_base_r(offs_t offset) +uint32_t pci_device::pci_address_base_r(offs_t offset) { - if(bank_reg_infos[offset].bank == -1) + if(m_pci_bank_reg_info[offset].bank == -1) return 0; - int bid = bank_reg_infos[offset].bank; - if(bank_reg_infos[offset].hi) - return bank_infos[bid].adr >> 32; - int flags = bank_infos[bid].flags; - return (bank_infos[bid].adr & ~(bank_infos[bid].size - 1)) | (flags & M_IO ? 1 : 0) | (flags & M_64A ? 4 : 0) | (flags & M_PREF ? 8 : 0); + int bid = m_pci_bank_reg_info[offset].bank; + if(m_pci_bank_reg_info[offset].hi) + return m_pci_bank_info[bid].adr >> 32; + int flags = m_pci_bank_info[bid].flags; + return (m_pci_bank_info[bid].adr & ~(m_pci_bank_info[bid].size - 1)) | (flags & M_IO ? 1 : 0) | (flags & M_64A ? 4 : 0) | (flags & M_PREF ? 8 : 0); } -void pci_device::address_base_w(offs_t offset, uint32_t data) +void pci_device::pci_address_base_w(offs_t offset, uint32_t data) { - if(bank_reg_infos[offset].bank == -1) { + if(m_pci_bank_reg_info[offset].bank == -1) { logerror("write to address base (%d, %08x) not linked to any bank\n", offset, data); return; } - int bid = bank_reg_infos[offset].bank; - if(bank_reg_infos[offset].hi) - bank_infos[bid].adr = (bank_infos[bid].adr & 0xffffffff) | (uint64_t(data) << 32); + int bid = m_pci_bank_reg_info[offset].bank; + if(m_pci_bank_reg_info[offset].hi) + m_pci_bank_info[bid].adr = (m_pci_bank_info[bid].adr & 0xffffffff) | (uint64_t(data) << 32); else { - bank_infos[bid].adr = (bank_infos[bid].adr & 0xffffffff00000000U) | data; + m_pci_bank_info[bid].adr = (m_pci_bank_info[bid].adr & 0xffffffff00000000U) | data; } - remap_cb(); + m_pci_remap_cb(); } -uint16_t pci_device::vendor_r() +uint16_t pci_device::pci_vendor_r() { - return main_id >> 16; + return m_pci_main_id >> 16; } -uint16_t pci_device::device_r() +uint16_t pci_device::pci_device_r() { - return main_id; + return m_pci_main_id; } -uint16_t pci_device::command_r() +uint16_t pci_device::pci_command_r() { - return command; + return m_pci_command; } -void pci_device::command_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void pci_device::pci_command_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - uint16_t old = command; + uint16_t old = m_pci_command; - mem_mask &= command_mask; - COMBINE_DATA(&command); - logerror("command = %04x\n", command); - if ((old ^ command) & 3) - remap_cb(); + mem_mask &= m_pci_command_mask; + COMBINE_DATA(&m_pci_command); + logerror("command = %04x\n", m_pci_command); + if ((old ^ m_pci_command) & 3) + m_pci_remap_cb(); } -uint16_t pci_device::status_r() +uint16_t pci_device::pci_status_r() { - return status; + return m_pci_status; } -uint32_t pci_device::class_rev_r() +uint32_t pci_device::pci_class_rev_r() { - return (pclass << 8) | revision; + return (m_pci_pclass << 8) | m_pci_revision; } -uint8_t pci_device::cache_line_size_r() +uint8_t pci_device::pci_cache_line_size_r() { return 0x00; } -uint8_t pci_device::latency_timer_r() +uint8_t pci_device::pci_latency_timer_r() { return 0x00; } -void pci_device::set_multifunction_device(bool enable) +void pci_device::pci_set_multifunction_device(bool enable) { - is_multifunction_device = enable; + m_pci_is_multifunction_device = enable; } -uint8_t pci_device::header_type_r() +uint8_t pci_device::pci_header_type_r() { - return is_multifunction_device ? 0x80 : 0x00; + return m_pci_is_multifunction_device ? 0x80 : 0x00; } -uint8_t pci_device::bist_r() +uint8_t pci_device::pci_bist_r() { return 0x00; } -uint16_t pci_device::subvendor_r() +uint16_t pci_device::pci_subvendor_r() { - return subsystem_id >> 16; + return m_pci_subsystem_id >> 16; } -uint16_t pci_device::subsystem_r() +uint16_t pci_device::pci_subsystem_r() { - return subsystem_id; + return m_pci_subsystem_id; } -uint32_t pci_device::expansion_base_r() +uint32_t pci_device::pci_expansion_base_r() { - return expansion_rom_base; + return m_pci_expansion_rom_base; } -void pci_device::expansion_base_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void pci_device::pci_expansion_base_w(offs_t offset, uint32_t data, uint32_t mem_mask) { - COMBINE_DATA(&expansion_rom_base); - if(!expansion_rom_size) - expansion_rom_base = 0; + COMBINE_DATA(&m_pci_expansion_rom_base); + if(!m_pci_expansion_rom_size) + m_pci_expansion_rom_base = 0; else { // Trick to get an address resolution at expansion_rom_size with minimal granularity of 0x800, plus bit 1 set to keep the on/off information - expansion_rom_base &= 0xfffff801 & (1-expansion_rom_size); + m_pci_expansion_rom_base &= 0xfffff801 & (1-m_pci_expansion_rom_size); } - remap_cb(); + m_pci_remap_cb(); } -uint8_t pci_device::capptr_r() +uint8_t pci_device::pci_capptr_r() { return 0x00; } -uint8_t pci_device::interrupt_line_r() +uint8_t pci_device::pci_interrupt_line_r() { - logerror("interrupt_line_r = %02x\n", intr_line); - return intr_line; + logerror("interrupt_line_r = %02x\n", m_pci_intr_line); + return m_pci_intr_line; } -void pci_device::interrupt_line_w(offs_t offset, uint8_t data, uint8_t mem_mask) +void pci_device::pci_interrupt_line_w(offs_t offset, uint8_t data, uint8_t mem_mask) { - COMBINE_DATA(&intr_line); + COMBINE_DATA(&m_pci_intr_line); logerror("interrupt_line_w %02x\n", data); } -uint8_t pci_device::interrupt_pin_r() +uint8_t pci_device::pci_interrupt_pin_r() { - logerror("interrupt_pin_r = %02x\n", intr_pin); - return intr_pin; + logerror("interrupt_pin_r = %02x\n", m_pci_intr_pin); + return m_pci_intr_pin; } -void pci_device::interrupt_pin_w(offs_t offset, uint8_t data, uint8_t mem_mask) +void pci_device::pci_interrupt_pin_w(offs_t offset, uint8_t data, uint8_t mem_mask) { - COMBINE_DATA(&intr_pin); + COMBINE_DATA(&m_pci_intr_pin); logerror("interrupt_pin_w = %02x\n", data); } -void pci_device::set_remap_cb(mapper_cb _remap_cb) +void pci_device::pci_set_remap_cb(pci_mapper_cb _remap_cb) { - remap_cb = _remap_cb; + m_pci_remap_cb = _remap_cb; } -void pci_device::reset_all_mappings() +void pci_device::pci_reset_all_mappings() { } -void pci_device::map_device(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void pci_device::pci_map_device(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { - for(int i=0; i<bank_count; i++) { - bank_info &bi = bank_infos[i]; + for(int i=0; i<m_pci_bank_count; i++) { + pci_bank_info &bi = m_pci_bank_info[i]; if(uint32_t(bi.adr) >= 0xfffffffc) continue; if (bi.flags & M_IO) { - if (~command & 1) + if (~m_pci_command & 1) continue; } else { - if (~command & 2) + if (~m_pci_command & 2) continue; } if(!bi.size || (bi.flags & M_DISABLED)) @@ -324,104 +313,104 @@ void pci_device::map_device(uint64_t memory_window_start, uint64_t memory_window } uint64_t end = start + bi.size-1; switch(i) { - case 0: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped0_r)), write32s_delegate(*this, FUNC(pci_device::unmapped0_w))); break; - case 1: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped1_r)), write32s_delegate(*this, FUNC(pci_device::unmapped1_w))); break; - case 2: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped2_r)), write32s_delegate(*this, FUNC(pci_device::unmapped2_w))); break; - case 3: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped3_r)), write32s_delegate(*this, FUNC(pci_device::unmapped3_w))); break; - case 4: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped4_r)), write32s_delegate(*this, FUNC(pci_device::unmapped4_w))); break; - case 5: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped5_r)), write32s_delegate(*this, FUNC(pci_device::unmapped5_w))); break; + case 0: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::pci_unmapped_r<0>)), write32s_delegate(*this, FUNC(pci_device::pci_unmapped_w<0>))); break; + case 1: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::pci_unmapped_r<1>)), write32s_delegate(*this, FUNC(pci_device::pci_unmapped_w<1>))); break; + case 2: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::pci_unmapped_r<2>)), write32s_delegate(*this, FUNC(pci_device::pci_unmapped_w<2>))); break; + case 3: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::pci_unmapped_r<3>)), write32s_delegate(*this, FUNC(pci_device::pci_unmapped_w<3>))); break; + case 4: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::pci_unmapped_r<4>)), write32s_delegate(*this, FUNC(pci_device::pci_unmapped_w<4>))); break; + case 5: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::pci_unmapped_r<5>)), write32s_delegate(*this, FUNC(pci_device::pci_unmapped_w<5>))); break; } space->install_device_delegate(start, end, *bi.device, bi.map); logerror("map %s at %0*x-%0*x\n", bi.map.name(), bi.flags & M_IO ? 4 : 8, uint32_t(start), bi.flags & M_IO ? 4 : 8, uint32_t(end)); } - map_extra(memory_window_start, memory_window_end, memory_offset, memory_space, + pci_map_extra(memory_window_start, memory_window_end, memory_offset, memory_space, io_window_start, io_window_end, io_offset, io_space); - if(expansion_rom_base & 1) { - logerror("map expansion rom at %08x-%08x\n", expansion_rom_base & ~1, (expansion_rom_base & ~1) + expansion_rom_size - 1); - uint32_t start = (expansion_rom_base & ~1) + memory_offset; - uint32_t end = start + expansion_rom_size - 1; + if(m_pci_expansion_rom_base & 1) { + logerror("map expansion rom at %08x-%08x\n", m_pci_expansion_rom_base & ~1, (m_pci_expansion_rom_base & ~1) + m_pci_expansion_rom_size - 1); + uint32_t start = (m_pci_expansion_rom_base & ~1) + memory_offset; + uint32_t end = start + m_pci_expansion_rom_size - 1; if(end > memory_window_end) end = memory_window_end; - memory_space->install_rom(start, end, (void *)expansion_rom); + memory_space->install_rom(start, end, (void *)m_pci_expansion_rom); } } -void pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void pci_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { } -void pci_device::map_config(uint8_t device, address_space *config_space) +void pci_device::pci_map_config(uint8_t device, address_space *config_space) { - config_space->install_device(device << 12, (device << 12) | 0xfff, *this, &pci_device::config_map); + config_space->install_device(device << 12, (device << 12) | 0xfff, *this, &pci_device::pci_config_map); } -void pci_device::skip_map_regs(int count) +void pci_device::pci_skip_map_regs(int count) { - bank_reg_count += count; - assert(bank_reg_count <= 6); + m_pci_bank_reg_count += count; + assert(m_pci_bank_reg_count <= 6); } -void pci_device::add_map(uint64_t size, int flags, const address_map_constructor &map, device_t *relative_to) +void pci_device::pci_add_map(uint64_t size, int flags, const address_map_constructor &map, device_t *relative_to) { - assert(bank_count < 6); + assert(m_pci_bank_count < 6); assert((size & 3) == 0); - int bid = bank_count++; - bank_infos[bid].map = map; - bank_infos[bid].device = relative_to ? relative_to : this; - bank_infos[bid].adr = 0; - bank_infos[bid].size = size; - bank_infos[bid].flags = flags; + int bid = m_pci_bank_count++; + m_pci_bank_info[bid].map = map; + m_pci_bank_info[bid].device = relative_to ? relative_to : this; + m_pci_bank_info[bid].adr = 0; + m_pci_bank_info[bid].size = size; + m_pci_bank_info[bid].flags = flags; if(flags & M_64A) { - assert(bank_reg_count < 5); - int breg = bank_reg_count; - bank_reg_infos[breg].bank = bid; - bank_reg_infos[breg].hi = 0; - bank_reg_infos[breg+1].bank = bid; - bank_reg_infos[breg+1].hi = 1; - bank_reg_count += 2; + assert(m_pci_bank_reg_count < 5); + int breg = m_pci_bank_reg_count; + m_pci_bank_reg_info[breg].bank = bid; + m_pci_bank_reg_info[breg].hi = 0; + m_pci_bank_reg_info[breg+1].bank = bid; + m_pci_bank_reg_info[breg+1].hi = 1; + m_pci_bank_reg_count += 2; } else { - assert(bank_reg_count < 6); - int breg = bank_reg_count++; - bank_reg_infos[breg].bank = bid; - bank_reg_infos[breg].hi = 0; + assert(m_pci_bank_reg_count < 6); + int breg = m_pci_bank_reg_count++; + m_pci_bank_reg_info[breg].bank = bid; + m_pci_bank_reg_info[breg].hi = 0; } - logerror("Device %s (%s) has 0x%x bytes of %s named %s\n", tag(), name(), size, flags & M_IO ? "io" : "memory", bank_infos[bid].map.name()); + logerror("Device %s (%s) has 0x%x bytes of %s named %s\n", tag(), name(), size, flags & M_IO ? "io" : "memory", m_pci_bank_info[bid].map.name()); } -void pci_device::add_rom(const uint8_t *rom, uint32_t size) +void pci_device::pci_add_rom(const uint8_t *rom, uint32_t size) { - expansion_rom = rom; - expansion_rom_size = size; + m_pci_expansion_rom = rom; + m_pci_expansion_rom_size = size; logerror("Device %s (%s) has 0x%x bytes of expansion rom\n", tag(), name(), size); } -void pci_device::add_rom_from_region() +void pci_device::pci_add_rom_from_region() { - add_rom(m_region->base(), m_region->bytes()); + pci_add_rom(m_pci_region->base(), m_pci_region->bytes()); } -void pci_device::set_map_address(int id, uint64_t adr) +void pci_device::pci_set_map_address(int id, uint64_t adr) { - bank_infos[id].adr = adr; - remap_cb(); + m_pci_bank_info[id].adr = adr; + m_pci_remap_cb(); } -void pci_device::set_map_size(int id, uint64_t size) +void pci_device::pci_set_map_size(int id, uint64_t size) { - bank_infos[id].size = size; - remap_cb(); + m_pci_bank_info[id].size = size; + m_pci_remap_cb(); } -void pci_device::set_map_flags(int id, int flags) +void pci_device::pci_set_map_flags(int id, int flags) { - bank_infos[id].flags = flags; - remap_cb(); + m_pci_bank_info[id].flags = flags; + m_pci_remap_cb(); } agp_device::agp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) @@ -453,7 +442,7 @@ pci_bridge_device::pci_bridge_device(const machine_config &mconfig, device_type { } -uint8_t pci_bridge_device::header_type_r() +uint8_t pci_bridge_device::pci_header_type_r() { return 0x01; } @@ -470,12 +459,12 @@ device_t *pci_bridge_device::bus_root() return this; } -void pci_bridge_device::set_remap_cb(mapper_cb _remap_cb) +void pci_bridge_device::pci_set_remap_cb(pci_mapper_cb _remap_cb) { - remap_cb = _remap_cb; + m_pci_remap_cb = _remap_cb; for(unsigned int i=0; i != all_devices.size(); i++) if(all_devices[i] != this) - all_devices[i]->set_remap_cb(_remap_cb); + all_devices[i]->pci_set_remap_cb(_remap_cb); } void pci_bridge_device::device_start() @@ -496,17 +485,17 @@ void pci_bridge_device::device_start() sub_devices[(id << 3) | fct] = downcast<pci_device *>(&d); } - mapper_cb cf_cb(&pci_bridge_device::regenerate_config_mapping, this); + pci_mapper_cb cf_cb(&pci_bridge_device::regenerate_config_mapping, this); for(int i=0; i<32*8; i++) if(sub_devices[i]) { if((i & 7) && sub_devices[i & ~7]) - sub_devices[i & ~7]->set_multifunction_device(true); + sub_devices[i & ~7]->pci_set_multifunction_device(true); all_devices.push_back(sub_devices[i]); if(sub_devices[i] != this) { - sub_devices[i]->remap_config_cb = cf_cb; - sub_devices[i]->set_remap_cb(remap_cb); + sub_devices[i]->m_pci_remap_config_cb = cf_cb; + sub_devices[i]->pci_set_remap_cb(m_pci_remap_cb); pci_bridge_device *bridge = dynamic_cast<pci_bridge_device *>(sub_devices[i]); if(bridge) all_bridges.push_back(bridge); @@ -525,13 +514,13 @@ void pci_bridge_device::device_reset() regenerate_config_mapping(); } -void pci_bridge_device::reset_all_mappings() +void pci_bridge_device::pci_reset_all_mappings() { - pci_device::reset_all_mappings(); + pci_device::pci_reset_all_mappings(); for(unsigned int i=0; i != all_devices.size(); i++) if(all_devices[i] != this) - all_devices[i]->reset_all_mappings(); + all_devices[i]->pci_reset_all_mappings(); prefetch_baseu = 0; prefetch_limitu = 0; @@ -545,23 +534,23 @@ void pci_bridge_device::reset_all_mappings() iolimit = 0; } -void pci_bridge_device::map_device(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void pci_bridge_device::pci_map_device(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { const int count = int(all_devices.size()) - 1; for(int i = count; i >= 0; i--) if (all_devices[i] != this) - if (all_devices[i]->map_first()) - all_devices[i]->map_device(memory_window_start, memory_window_end, memory_offset, memory_space, + if (all_devices[i]->pci_map_first()) + all_devices[i]->pci_map_device(memory_window_start, memory_window_end, memory_offset, memory_space, io_window_start, io_window_end, io_offset, io_space); for(int i = count; i>=0; i--) if(all_devices[i] != this) - if (!all_devices[i]->map_first()) - all_devices[i]->map_device(memory_window_start, memory_window_end, memory_offset, memory_space, + if (!all_devices[i]->pci_map_first()) + all_devices[i]->pci_map_device(memory_window_start, memory_window_end, memory_offset, memory_space, io_window_start, io_window_end, io_offset, io_space); - map_extra(memory_window_start, memory_window_end, memory_offset, memory_space, + pci_map_extra(memory_window_start, memory_window_end, memory_offset, memory_space, io_window_start, io_window_end, io_offset, io_space); } @@ -572,7 +561,7 @@ void pci_bridge_device::regenerate_config_mapping() config_space->unmap_readwrite(0x00000, 0xfffff); for(int i=0; i<32*8; i++) if(sub_devices[i]) - sub_devices[i]->map_config(i, config_space); + sub_devices[i]->pci_map_config(i, config_space); } uint32_t pci_bridge_device::do_config_read(uint8_t bus, uint8_t device, uint16_t reg, uint32_t mem_mask) @@ -854,14 +843,14 @@ device_t *pci_host_device::bus_root() void pci_host_device::device_start() { - remap_cb = mapper_cb(&pci_host_device::regenerate_mapping, this); + m_pci_remap_cb = pci_mapper_cb(&pci_host_device::regenerate_mapping, this); pci_bridge_device::device_start(); memory_window_start = memory_window_end = memory_offset = 0; io_window_start = io_window_end = io_offset = 0; - reset_all_mappings(); + pci_reset_all_mappings(); save_item(NAME(config_address)); @@ -870,7 +859,7 @@ void pci_host_device::device_start() void pci_host_device::device_reset() { pci_bridge_device::device_reset(); - reset_all_mappings(); + pci_reset_all_mappings(); regenerate_mapping(); config_address = 0; @@ -882,7 +871,7 @@ void pci_host_device::regenerate_mapping() memory_space->unmap_readwrite(memory_window_start, memory_window_end); io_space->unmap_readwrite(io_window_start, io_window_end); - map_device(memory_window_start, memory_window_end, memory_offset, memory_space, + pci_map_device(memory_window_start, memory_window_end, memory_offset, memory_space, io_window_start, io_window_end, io_offset, io_space); } diff --git a/src/devices/machine/pci.h b/src/devices/machine/pci.h index 0a0a570b451..89a20827e5b 100644 --- a/src/devices/machine/pci.h +++ b/src/devices/machine/pci.h @@ -8,73 +8,59 @@ class pci_device : public device_t { public: - typedef delegate<void ()> mapper_cb; + typedef delegate<void ()> pci_mapper_cb; - mapper_cb remap_cb, remap_config_cb; + pci_mapper_cb m_pci_remap_cb, m_pci_remap_config_cb; - void set_ids(uint32_t main_id, uint8_t revision, uint32_t pclass, uint32_t subsystem_id); - void set_ids_host(uint32_t main_id, uint32_t revision, uint64_t subsystem_id) { set_ids(main_id, revision, 0x060000, subsystem_id); } - void set_ids_bridge(uint32_t main_id, uint32_t revision) { set_ids(main_id, revision, 0x060400, 0x00000000); } - void set_ids_agp(uint64_t main_id, uint32_t revision, uint32_t subsystem_id) { set_ids(main_id, revision, 0x030000, subsystem_id); } - void set_multifunction_device(bool enable); + void pci_set_ids(uint32_t main_id, uint8_t revision, uint32_t pclass, uint32_t subsystem_id); + void pci_set_ids_host(uint32_t main_id, uint32_t revision, uint64_t subsystem_id) { pci_set_ids(main_id, revision, 0x060000, subsystem_id); } + void pci_set_ids_bridge(uint32_t main_id, uint32_t revision) { pci_set_ids(main_id, revision, 0x060400, 0x00000000); } + void pci_set_ids_agp(uint64_t main_id, uint32_t revision, uint32_t subsystem_id) { pci_set_ids(main_id, revision, 0x030000, subsystem_id); } + void pci_set_multifunction_device(bool enable); - virtual void set_remap_cb(mapper_cb _remap_cb); - virtual void reset_all_mappings(); - virtual void map_device(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_set_remap_cb(pci_mapper_cb _remap_cb); + virtual void pci_reset_all_mappings(); + virtual void pci_map_device(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space); - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space); // Specify if this device must be mapped before all the others on the pci bus - virtual bool map_first() const { return false; } - - void map_config(uint8_t device, address_space *config_space); - - virtual void config_map(address_map &map); - - uint32_t unmapped_r(offs_t offset, uint32_t mem_mask, int bank); - void unmapped_w(offs_t offset, uint32_t data, uint32_t mem_mask, int bank); - - uint32_t unmapped0_r(offs_t offset, uint32_t mem_mask = ~0); - void unmapped0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t unmapped1_r(offs_t offset, uint32_t mem_mask = ~0); - void unmapped1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t unmapped2_r(offs_t offset, uint32_t mem_mask = ~0); - void unmapped2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t unmapped3_r(offs_t offset, uint32_t mem_mask = ~0); - void unmapped3_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t unmapped4_r(offs_t offset, uint32_t mem_mask = ~0); - void unmapped4_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t unmapped5_r(offs_t offset, uint32_t mem_mask = ~0); - void unmapped5_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - - - uint16_t vendor_r(); - uint16_t device_r(); - uint16_t command_r(); - void command_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - uint16_t status_r(); - uint32_t class_rev_r(); - virtual uint8_t cache_line_size_r(); - virtual uint8_t latency_timer_r(); - virtual uint8_t header_type_r(); - virtual uint8_t bist_r(); - uint32_t address_base_r(offs_t offset); - void address_base_w(offs_t offset, uint32_t data); - uint16_t subvendor_r(); - uint16_t subsystem_r(); - uint32_t expansion_base_r(); - void expansion_base_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - virtual uint8_t capptr_r(); - uint8_t interrupt_line_r(); - void interrupt_line_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); - uint8_t interrupt_pin_r(); - void interrupt_pin_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); + virtual bool pci_map_first() const { return false; } + + void pci_map_config(uint8_t device, address_space *config_space); + + virtual void pci_config_map(address_map &map); + + template<int N> uint32_t pci_unmapped_r(offs_t offset, uint32_t mem_mask); + template<int N> void pci_unmapped_w(offs_t offset, uint32_t data, uint32_t mem_mask); + + uint16_t pci_vendor_r(); + uint16_t pci_device_r(); + uint16_t pci_command_r(); + void pci_command_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t pci_status_r(); + uint32_t pci_class_rev_r(); + virtual uint8_t pci_cache_line_size_r(); + virtual uint8_t pci_latency_timer_r(); + virtual uint8_t pci_header_type_r(); + virtual uint8_t pci_bist_r(); + uint32_t pci_address_base_r(offs_t offset); + void pci_address_base_w(offs_t offset, uint32_t data); + uint16_t pci_subvendor_r(); + uint16_t pci_subsystem_r(); + uint32_t pci_expansion_base_r(); + void pci_expansion_base_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + virtual uint8_t pci_capptr_r(); + uint8_t pci_interrupt_line_r(); + void pci_interrupt_line_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); + uint8_t pci_interrupt_pin_r(); + void pci_interrupt_pin_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); protected: pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - optional_memory_region m_region; + optional_memory_region m_pci_region; enum { M_MEM = 0, @@ -85,7 +71,7 @@ protected: M_DISABLED = 16 }; - struct bank_info { + struct pci_bank_info { address_map_constructor map; device_t *device; @@ -94,44 +80,44 @@ protected: int flags; }; - struct bank_reg_info { + struct pci_bank_reg_info { int bank, hi; }; - bank_info bank_infos[6]; - int bank_count, bank_reg_count; - bank_reg_info bank_reg_infos[6]; + pci_bank_info m_pci_bank_info[6]; + int m_pci_bank_count, m_pci_bank_reg_count; + pci_bank_reg_info m_pci_bank_reg_info[6]; - uint32_t main_id, subsystem_id; - uint32_t pclass; - uint8_t revision; - uint16_t command, command_mask, status; - const uint8_t *expansion_rom; - uint32_t expansion_rom_size; - uint32_t expansion_rom_base; - bool is_multifunction_device; - uint8_t intr_line, intr_pin; + uint32_t m_pci_main_id, m_pci_subsystem_id; + uint32_t m_pci_pclass; + uint8_t m_pci_revision; + uint16_t m_pci_command, m_pci_command_mask, m_pci_status; + const uint8_t *m_pci_expansion_rom; + uint32_t m_pci_expansion_rom_size; + uint32_t m_pci_expansion_rom_base; + bool m_pci_is_multifunction_device; + uint8_t m_pci_intr_line, m_pci_intr_pin; virtual void device_start() override; virtual void device_reset() override; - void skip_map_regs(int count); - void add_map(uint64_t size, int flags, const address_map_constructor &map, device_t *relative_to = nullptr); - template <typename T> void add_map(uint64_t size, int flags, void (T::*map)(address_map &map), const char *name) { + void pci_skip_map_regs(int count); + void pci_add_map(uint64_t size, int flags, const address_map_constructor &map, device_t *relative_to = nullptr); + template <typename T> void pci_add_map(uint64_t size, int flags, void (T::*map)(address_map &map), const char *name) { address_map_constructor delegate(map, name, static_cast<T *>(this)); - add_map(size, flags, delegate); + pci_add_map(size, flags, delegate); } - template <typename T> void add_map(uint64_t size, int flags, T &device, void (T::*map)(address_map &map), const char *name) { + template <typename T> void pci_add_map(uint64_t size, int flags, T &device, void (T::*map)(address_map &map), const char *name) { address_map_constructor delegate(map, name, &device); - add_map(size, flags, delegate, &device); + pci_add_map(size, flags, delegate, &device); } - void add_rom(const uint8_t *data, uint32_t size); - void add_rom_from_region(); + void pci_add_rom(const uint8_t *data, uint32_t size); + void pci_add_rom_from_region(); - void set_map_address(int id, uint64_t adr); - void set_map_size(int id, uint64_t size); - void set_map_flags(int id, int flags); + void pci_set_map_address(int id, uint64_t adr); + void pci_set_map_size(int id, uint64_t size); + void pci_set_map_flags(int id, int flags); }; class agp_device : public pci_device { @@ -147,18 +133,18 @@ public: pci_bridge_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t main_id, uint32_t revision) : pci_bridge_device(mconfig, tag, owner, clock) { - set_ids_bridge(main_id, revision); + pci_set_ids_bridge(main_id, revision); } pci_bridge_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual void set_remap_cb(mapper_cb _remap_cb) override; - virtual void map_device(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_set_remap_cb(pci_mapper_cb _remap_cb) override; + virtual void pci_map_device(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; - virtual void reset_all_mappings() override; + virtual void pci_reset_all_mappings() override; - virtual uint8_t header_type_r() override; + virtual uint8_t pci_header_type_r() override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; uint32_t b_address_base_r(offs_t offset); void b_address_base_w(offs_t offset, uint32_t data); diff --git a/src/devices/machine/pci9050.cpp b/src/devices/machine/pci9050.cpp index 9f5c63c621e..7052964155f 100644 --- a/src/devices/machine/pci9050.cpp +++ b/src/devices/machine/pci9050.cpp @@ -43,7 +43,7 @@ pci9050_device::pci9050_device(const machine_config &mconfig, const char *tag, d : pci_device(mconfig, PCI9050, tag, owner, clock) , m_user_input_handler(*this), m_user_output_handler(*this) { - set_ids(0x10b59050, 0x01, 0x06800000, 0x10b59050); + pci_set_ids(0x10b59050, 0x01, 0x06800000, 0x10b59050); for(int i=0; i<4; i++) { m_devices[i] = nullptr; m_names[i] = nullptr; @@ -60,14 +60,14 @@ void pci9050_device::device_start() { pci_device::device_start(); - add_map(0x80, M_MEM, FUNC(pci9050_device::map)); // map 0 is our config registers, mem space - add_map(0x80, M_IO, FUNC(pci9050_device::map)); // map 1 is our config registers, i/o space + pci_add_map(0x80, M_MEM, FUNC(pci9050_device::map)); // map 0 is our config registers, mem space + pci_add_map(0x80, M_IO, FUNC(pci9050_device::map)); // map 1 is our config registers, i/o space for(int i=0; i<4; i++) if(!m_maps[i].isnull()) - add_map(0, M_MEM | M_DISABLED, m_maps[i], m_devices[i]); + pci_add_map(0, M_MEM | M_DISABLED, m_maps[i], m_devices[i]); else - add_map(0, M_MEM | M_DISABLED, address_map_constructor(), nullptr); + pci_add_map(0, M_MEM | M_DISABLED, address_map_constructor(), nullptr); m_user_input_handler.resolve(); m_user_output_handler.resolve(); @@ -93,14 +93,14 @@ void pci9050_device::device_post_load() void pci9050_device::device_reset() { pci_device::device_reset(); - set_map_address(0, 0); - set_map_address(1, 0); + pci_set_map_address(0, 0); + pci_set_map_address(1, 0); for(int i=0; i<4; i++) { m_lasrr[i] = i ? 0 : 0x0ff00000; m_lasba[i] = 0; m_lasbrd[i] = 0x00800000; m_csbase[i] = 0; - set_map_flags(i+2, M_MEM | M_DISABLED); + pci_set_map_flags(i+2, M_MEM | M_DISABLED); } m_eromrr = 0x07ff8000; m_eromba = 0x00080000; @@ -116,20 +116,20 @@ void pci9050_device::remap_local(int id) logerror("local bus %d csbase=%08x lasrr=%08x\n", id, csbase, lasrr); if(!(csbase & 1)) { - set_map_flags(id+2, M_MEM | M_DISABLED); + pci_set_map_flags(id+2, M_MEM | M_DISABLED); return; } int lsize; for(lsize=1; lsize<28 && !(csbase & (1<<lsize)); lsize++) {}; if(lsize == 28) { - set_map_flags(id+2, M_MEM | M_DISABLED); + pci_set_map_flags(id+2, M_MEM | M_DISABLED); return; } int size = 2 << lsize; // Address map is directly connected to PCI address space so post-decode mapping is not needed. (Ted Green) if(0 & csbase & 0x0fffffff & ~(size-1)) { logerror("PCI9050 local bus %d size=%08x csbase=%08X disabled due to unimplemented post-decode remapping\n", id, size, csbase); - set_map_flags(id+2, M_MEM | M_DISABLED); + pci_set_map_flags(id+2, M_MEM | M_DISABLED); return; } @@ -145,8 +145,8 @@ void pci9050_device::remap_local(int id) // return; } - set_map_size(id+2, size); - set_map_flags(id+2, lasrr & 1 ? M_IO : lasrr & 8 ? M_MEM | M_PREF : M_MEM); + pci_set_map_size(id+2, size); + pci_set_map_flags(id+2, lasrr & 1 ? M_IO : lasrr & 8 ? M_MEM | M_PREF : M_MEM); } void pci9050_device::remap_rom() @@ -154,16 +154,16 @@ void pci9050_device::remap_rom() switch ((m_cntrl >> 12) & 0x3) { case 0: case 3: - set_map_flags(0, M_MEM); - set_map_flags(1, M_IO); + pci_set_map_flags(0, M_MEM); + pci_set_map_flags(1, M_IO); break; case 1: - set_map_flags(0, M_MEM); - set_map_flags(1, M_IO | M_DISABLED); + pci_set_map_flags(0, M_MEM); + pci_set_map_flags(1, M_IO | M_DISABLED); break; case 2: - set_map_flags(0, M_MEM | M_DISABLED); - set_map_flags(1, M_IO); + pci_set_map_flags(0, M_MEM | M_DISABLED); + pci_set_map_flags(1, M_IO); break; } } @@ -287,7 +287,7 @@ void pci9050_device::cntrl_w(uint32_t data) m_cntrl = data; remap_rom(); if ((oldData ^ m_cntrl) & 0x3000) - remap_cb(); + m_pci_remap_cb(); if (!m_user_output_handler.isnull()) { int userData = 0; for (int userIndex = 0; userIndex < 4; userIndex++) diff --git a/src/devices/machine/sis85c496.cpp b/src/devices/machine/sis85c496.cpp index 66bab2adbda..8999617a90c 100644 --- a/src/devices/machine/sis85c496.cpp +++ b/src/devices/machine/sis85c496.cpp @@ -19,9 +19,9 @@ DEFINE_DEVICE_TYPE(SIS85C496, sis85c496_host_device, "sis85c496", "SiS 85C496/497 chipset") -void sis85c496_host_device::config_map(address_map &map) +void sis85c496_host_device::pci_config_map(address_map &map) { - pci_host_device::config_map(map); + pci_host_device::pci_config_map(map); map(0x40, 0x40).rw(FUNC(sis85c496_host_device::dram_config_r), FUNC(sis85c496_host_device::dram_config_w)); map(0x44, 0x45).rw(FUNC(sis85c496_host_device::shadow_config_r), FUNC(sis85c496_host_device::shadow_config_w)); map(0x5a, 0x5a).rw(FUNC(sis85c496_host_device::smram_ctrl_r), FUNC(sis85c496_host_device::smram_ctrl_w)); @@ -157,7 +157,7 @@ void sis85c496_host_device::device_start() io_window_start = 0; io_window_end = 0xffff; io_offset = 0; - status = 0x0010; + m_pci_status = 0x0010; m_bios_config = 0x78; m_dram_config = 0; @@ -168,9 +168,9 @@ void sis85c496_host_device::device_start() ram.resize(ram_size/4); } -void sis85c496_host_device::reset_all_mappings() +void sis85c496_host_device::pci_reset_all_mappings() { - pci_host_device::reset_all_mappings(); + pci_host_device::pci_reset_all_mappings(); } void sis85c496_host_device::device_reset() @@ -193,8 +193,8 @@ void sis85c496_host_device::device_reset() void sis85c496_host_device::map_bios(address_space *memory_space, uint32_t start, uint32_t end) { - uint32_t mask = m_region->bytes() - 1; - memory_space->install_rom(start, end, m_region->base() + (start & mask)); + uint32_t mask = m_pci_region->bytes() - 1; + memory_space->install_rom(start, end, m_pci_region->base() + (start & mask)); } void sis85c496_host_device::map_shadowram(address_space *memory_space, offs_t addrstart, offs_t addrend, void *baseptr) @@ -209,7 +209,7 @@ void sis85c496_host_device::map_shadowram(address_space *memory_space, offs_t ad } } -void sis85c496_host_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void sis85c496_host_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { logerror("SiS496: mapping!\n"); diff --git a/src/devices/machine/sis85c496.h b/src/devices/machine/sis85c496.h index 05bd11d5d56..1a47a6ca5b8 100644 --- a/src/devices/machine/sis85c496.h +++ b/src/devices/machine/sis85c496.h @@ -45,12 +45,12 @@ protected: void map_bios(address_space *memory_space, uint32_t start, uint32_t end); void map_shadowram(address_space *memory_space, offs_t addrstart, offs_t addrend, void *baseptr); - virtual void reset_all_mappings() override; + virtual void pci_reset_all_mappings() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: required_device<cpu_device> m_maincpu; @@ -88,17 +88,17 @@ private: void internal_io_map(address_map &map); uint8_t dram_config_r() { return m_dram_config; } - void dram_config_w(uint8_t data) { m_dram_config = data; remap_cb(); } + void dram_config_w(uint8_t data) { m_dram_config = data; m_pci_remap_cb(); } uint8_t bios_config_r() { return m_bios_config; } - void bios_config_w(uint8_t data) { m_bios_config = data; remap_cb(); } + void bios_config_w(uint8_t data) { m_bios_config = data; m_pci_remap_cb(); } uint32_t mailbox_r() { return m_mailbox; } void mailbox_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { COMBINE_DATA(&m_mailbox); } uint8_t isa_decoder_r() { return m_isa_decoder; } - void isa_decoder_w(uint8_t data) { m_isa_decoder = data; remap_cb(); } + void isa_decoder_w(uint8_t data) { m_isa_decoder = data; m_pci_remap_cb(); } uint16_t shadow_config_r() { return m_shadctrl; } - void shadow_config_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { COMBINE_DATA(&m_shadctrl); logerror("SiS496: %04x to shadow control\n", m_shadctrl); remap_cb(); } + void shadow_config_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { COMBINE_DATA(&m_shadctrl); logerror("SiS496: %04x to shadow control\n", m_shadctrl); m_pci_remap_cb(); } uint8_t smram_ctrl_r() { return m_smramctrl; } - void smram_ctrl_w(uint8_t data) { m_smramctrl = data; remap_cb(); } + void smram_ctrl_w(uint8_t data) { m_smramctrl = data; m_pci_remap_cb(); } // southbridge uint8_t at_page8_r(offs_t offset); diff --git a/src/devices/machine/vrc4373.cpp b/src/devices/machine/vrc4373.cpp index d0dbb96e55a..c12d00d8ed4 100644 --- a/src/devices/machine/vrc4373.cpp +++ b/src/devices/machine/vrc4373.cpp @@ -70,9 +70,9 @@ DEFINE_DEVICE_TYPE(VRC4373, vrc4373_device, "vrc4373", "NEC VRC4373 System Controller") -void vrc4373_device::config_map(address_map &map) +void vrc4373_device::pci_config_map(address_map &map) { - pci_bridge_device::config_map(map); + pci_bridge_device::pci_config_map(map); map(0x40, 0x43).rw(FUNC(vrc4373_device::pcictrl_r), FUNC(vrc4373_device::pcictrl_w)); } @@ -101,7 +101,7 @@ vrc4373_device::vrc4373_device(const machine_config &mconfig, const char *tag, d , m_io_config("io_space", ENDIANNESS_LITTLE, 32, 32), m_pci1_laddr(0), m_pci2_laddr(0), m_pci_io_laddr(0), m_target1_laddr(0), m_target2_laddr(0) , m_romRegion(*this, "rom") { - set_ids_host(0x1033005B, 0x00, 0x00000000); + pci_set_ids_host(0x1033005B, 0x00, 0x00000000); } device_memory_interface::space_config_vector vrc4373_device::memory_space_config() const @@ -119,7 +119,7 @@ void vrc4373_device::device_start() m_cpu_space = &m_cpu->space(AS_PCI_CONFIG); memory_space = &space(AS_PCI_MEM); io_space = &space(AS_PCI_IO); - is_multifunction_device = false; + pci_set_multifunction_device(false); std::fill(std::begin(m_cpu_regs), std::end(m_cpu_regs), 0); @@ -129,7 +129,7 @@ void vrc4373_device::device_start() io_window_start = 0; io_window_end = 0xffffffff; io_offset = 0x00000000; - status = 0x0280; + m_pci_status = 0x0280; m_irq_cb.resolve(); @@ -145,7 +145,7 @@ void vrc4373_device::device_start() // Nile register mapppings m_cpu_space->install_device(0x0f000000, 0x0f0000ff, *static_cast<vrc4373_device *>(this), &vrc4373_device::cpu_map); // PCI Configuration also mapped at 0x0f000100 - m_cpu_space->install_device(0x0f000100, 0x0f0001ff, *static_cast<vrc4373_device *>(this), &vrc4373_device::config_map); + m_cpu_space->install_device(0x0f000100, 0x0f0001ff, *static_cast<vrc4373_device *>(this), &vrc4373_device::pci_config_map); // MIPS drc m_cpu->add_fastram(0x1fc00000, 0x1fcfffff, true, m_romRegion->base()); @@ -259,7 +259,7 @@ void vrc4373_device::map_cpu_space() } } -void vrc4373_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void vrc4373_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { uint32_t winStart, winEnd, winSize; @@ -284,9 +284,9 @@ void vrc4373_device::map_extra(uint64_t memory_window_start, uint64_t memory_win } } -void vrc4373_device::reset_all_mappings() +void vrc4373_device::pci_reset_all_mappings() { - pci_device::reset_all_mappings(); + pci_device::pci_reset_all_mappings(); } // PCI bus control @@ -472,11 +472,11 @@ void vrc4373_device::cpu_if_w(offs_t offset, uint32_t data, uint32_t mem_mask) break; case NREG_PCITW1: m_target1_laddr = 0x00000000 | ((data&0x7FF)<<21); - remap_cb(); + m_pci_remap_cb(); break; case NREG_PCITW2: m_target2_laddr = 0x00000000 | ((data&0x7FF)<<21); - remap_cb(); + m_pci_remap_cb(); break; case NREG_PCICAR: // Bits in reserved area are used for device selection of type 0 config transactions diff --git a/src/devices/machine/vrc4373.h b/src/devices/machine/vrc4373.h index 7d47d572940..c44ccf61fbb 100644 --- a/src/devices/machine/vrc4373.h +++ b/src/devices/machine/vrc4373.h @@ -21,8 +21,8 @@ public: vrc4373_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual void reset_all_mappings() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_reset_all_mappings() override; + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; virtual void device_post_load() override; @@ -31,7 +31,7 @@ public: void set_ram_size(int size) { m_ram_size = size; }; void set_simm0_size(int size) { m_simm0_size = size; }; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; uint32_t pcictrl_r(offs_t offset, uint32_t mem_mask = ~0); void pcictrl_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); diff --git a/src/devices/machine/vrc5074.cpp b/src/devices/machine/vrc5074.cpp index a2e1c0ea061..e1f85d65c02 100644 --- a/src/devices/machine/vrc5074.cpp +++ b/src/devices/machine/vrc5074.cpp @@ -120,9 +120,9 @@ DEFINE_DEVICE_TYPE(VRC5074, vrc5074_device, "vrc5074", "NEC VRC5074 System Controller") -void vrc5074_device::config_map(address_map &map) +void vrc5074_device::pci_config_map(address_map &map) { - pci_bridge_device::config_map(map); + pci_bridge_device::pci_config_map(map); map(0x00000018, 0x00000027).rw(FUNC(vrc5074_device::sdram_addr_r), FUNC(vrc5074_device::sdram_addr_w)); } @@ -166,7 +166,7 @@ vrc5074_device::vrc5074_device(const machine_config &mconfig, const char *tag, d m_romRegion(*this, "rom"), m_updateRegion(*this, "update") { - set_ids_host(0x1033005a, 0x04, 0x00000000); + pci_set_ids_host(0x1033005a, 0x04, 0x00000000); for (int i = 0; i < 2; i++) m_sdram_size[i] = 0x0; @@ -205,7 +205,7 @@ void vrc5074_device::device_start() io_window_start = 0; io_window_end = 0xffffffff; io_offset = 0x00000000; - status = 0x0280; + m_pci_status = 0x0280; // Size SDRAM m_sdram[0].resize(m_sdram_size[0]); m_sdram[1].resize(m_sdram_size[1]); @@ -222,7 +222,7 @@ void vrc5074_device::device_start() // Nile cpu register mapppings m_cpu_space->install_device(0x1fa00000, 0x1fa001ff, *static_cast<vrc5074_device *>(this), &vrc5074_device::cpu_map); // PCI Configuration also mapped at 0x1fa00200 - m_cpu_space->install_device(0x1fa00200, 0x1fa002ff, *static_cast<vrc5074_device *>(this), &vrc5074_device::config_map); + m_cpu_space->install_device(0x1fa00200, 0x1fa002ff, *static_cast<vrc5074_device *>(this), &vrc5074_device::pci_config_map); // Nile serial register mapppings m_cpu_space->install_device(0x1fa00300, 0x1fa0033f, *static_cast<vrc5074_device *>(this), &vrc5074_device::serial_map); @@ -347,7 +347,7 @@ void vrc5074_device::map_cpu_space() } } -void vrc5074_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void vrc5074_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { uint32_t winStart, winEnd, winSize; @@ -379,9 +379,9 @@ void vrc5074_device::map_extra(uint64_t memory_window_start, uint64_t memory_win //} } -void vrc5074_device::reset_all_mappings() +void vrc5074_device::pci_reset_all_mappings() { - pci_device::reset_all_mappings(); + pci_device::pci_reset_all_mappings(); } uint32_t vrc5074_device::sdram_addr_r() diff --git a/src/devices/machine/vrc5074.h b/src/devices/machine/vrc5074.h index 02bafd8d73d..378b2c72c91 100644 --- a/src/devices/machine/vrc5074.h +++ b/src/devices/machine/vrc5074.h @@ -25,8 +25,8 @@ public: required_device<ns16550_device> m_uart; virtual void device_add_mconfig(machine_config &config) override; - virtual void reset_all_mappings() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_reset_all_mappings() override; + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; virtual void device_post_load() override; @@ -35,7 +35,7 @@ public: void set_map(int id, const address_map_constructor &map, device_t *device); - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; uint32_t sdram_addr_r(); void sdram_addr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); diff --git a/src/devices/sound/es1373.cpp b/src/devices/sound/es1373.cpp index 1c707599188..af44f4eace5 100644 --- a/src/devices/sound/es1373.cpp +++ b/src/devices/sound/es1373.cpp @@ -89,7 +89,7 @@ es1373_device::es1373_device(const machine_config &mconfig, const char *tag, dev , device_sound_interface(mconfig, *this), m_stream(nullptr) , m_eslog(nullptr), m_tempCount(0), m_timer(nullptr), m_memory_space(nullptr), m_irq_handler(*this) { - set_ids(0x12741371, 0x04, 0x040100, 0x12741371); + pci_set_ids(0x12741371, 0x04, 0x040100, 0x12741371); } void es1373_device::device_resolve_objects() @@ -117,7 +117,7 @@ void es1373_device::device_stop() void es1373_device::device_start() { pci_device::device_start(); - add_map(0x40, M_IO, FUNC(es1373_device::map)); + pci_add_map(0x40, M_IO, FUNC(es1373_device::map)); // create the stream m_stream = stream_alloc(0, 2, 44100/2); @@ -174,7 +174,7 @@ void es1373_device::device_start() void es1373_device::device_post_load() { pci_device::device_post_load(); - remap_cb(); + m_pci_remap_cb(); } void es1373_device::device_reset() @@ -215,7 +215,7 @@ void es1373_device::device_reset() m_stream->update(); } -void es1373_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void es1373_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { m_memory_space = memory_space; @@ -276,7 +276,7 @@ void es1373_device::sound_stream_update(sound_stream &stream, std::vector<read_s m_adc.buf_wptr -= 0x10; } // PCI Write Transfer - if (command & 0x4) { + if (m_pci_command & 0x4) { if ((m_adc.buf_rptr&8)^(m_adc.buf_wptr&8)) { transfer_pci_audio(m_adc, ES_PCI_WRITE); } @@ -299,7 +299,7 @@ void es1373_device::send_audio_out(chan_info& chan, uint32_t intr_mask, write_st { // Only transfer PCI data if bus mastering is enabled // Fill initial half buffer - if (1 && (command & 0x4) && (!chan.initialized)) { + if (1 && (m_pci_command & 0x4) && (!chan.initialized)) { chan.initialized = true; transfer_pci_audio(chan, ES_PCI_READ); } @@ -313,7 +313,7 @@ void es1373_device::send_audio_out(chan_info& chan, uint32_t intr_mask, write_st // Only transfer PCI data if bus mastering is enabled // Fill half-buffer when read pointer is at start of next half //if ((command & 0x4) && ((chan.buf_rptr&8)^(chan.buf_wptr&8)) && !(m_es_regs[ES_INT_CS_STATUS] & intr_mask)) { - if ((command & 0x4) && ((chan.buf_rptr&8)^(chan.buf_wptr&8))) { + if ((m_pci_command & 0x4) && ((chan.buf_rptr&8)^(chan.buf_wptr&8))) { transfer_pci_audio(chan, ES_PCI_READ); } if (LOG_ES && i==0) diff --git a/src/devices/sound/es1373.h b/src/devices/sound/es1373.h index 6e3cddb8a42..788a86d4aef 100644 --- a/src/devices/sound/es1373.h +++ b/src/devices/sound/es1373.h @@ -13,7 +13,7 @@ class es1373_device : public pci_device, public device_sound_interface public: es1373_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; auto irq_handler() { return m_irq_handler.bind(); } diff --git a/src/devices/sound/pci-ac97.cpp b/src/devices/sound/pci-ac97.cpp index 939ef832ab7..ba49310266e 100644 --- a/src/devices/sound/pci-ac97.cpp +++ b/src/devices/sound/pci-ac97.cpp @@ -29,10 +29,10 @@ ac97_device::ac97_device(const machine_config &mconfig, const char *tag, device_ void ac97_device::device_start() { pci_device::device_start(); - add_map(256, M_IO, FUNC(ac97_device::native_audio_mixer_map)); - add_map(64, M_IO, FUNC(ac97_device::native_audio_bus_mastering_map)); - add_map(512, M_MEM, FUNC(ac97_device::mixer_map)); - add_map(256, M_MEM, FUNC(ac97_device::bus_mastering_map)); + pci_add_map(256, M_IO, FUNC(ac97_device::native_audio_mixer_map)); + pci_add_map(64, M_IO, FUNC(ac97_device::native_audio_bus_mastering_map)); + pci_add_map(512, M_MEM, FUNC(ac97_device::mixer_map)); + pci_add_map(256, M_MEM, FUNC(ac97_device::bus_mastering_map)); } void ac97_device::device_reset() diff --git a/src/devices/sound/pci-ac97.h b/src/devices/sound/pci-ac97.h index 4633337e6dc..20b68f979db 100644 --- a/src/devices/sound/pci-ac97.h +++ b/src/devices/sound/pci-ac97.h @@ -12,7 +12,7 @@ public: ac97_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t main_id, uint32_t revision, uint32_t subdevice_id) : ac97_device(mconfig, tag, owner, clock) { - set_ids(main_id, revision, 0x040300, subdevice_id); + pci_set_ids(main_id, revision, 0x040300, subdevice_id); } ac97_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/sound/sb0400.cpp b/src/devices/sound/sb0400.cpp index b124a99b8f9..1f17e2dd72a 100644 --- a/src/devices/sound/sb0400.cpp +++ b/src/devices/sound/sb0400.cpp @@ -17,7 +17,7 @@ sb0400_device::sb0400_device(const machine_config &mconfig, const char *tag, dev void sb0400_device::device_start() { pci_device::device_start(); - add_map(64, M_IO, FUNC(sb0400_device::map)); + pci_add_map(64, M_IO, FUNC(sb0400_device::map)); } void sb0400_device::device_reset() diff --git a/src/devices/sound/sb0400.h b/src/devices/sound/sb0400.h index 440e82a0544..18baffa08bf 100644 --- a/src/devices/sound/sb0400.h +++ b/src/devices/sound/sb0400.h @@ -12,7 +12,7 @@ public: sb0400_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subdevice_id) : sb0400_device(mconfig, tag, owner, clock) { - set_ids(0x11020008, 0x00, 0x040100, subdevice_id); + pci_set_ids(0x11020008, 0x00, 0x040100, subdevice_id); } sb0400_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/video/gf7600gs.cpp b/src/devices/video/gf7600gs.cpp index 075c95c5628..f40cd6323bb 100644 --- a/src/devices/video/gf7600gs.cpp +++ b/src/devices/video/gf7600gs.cpp @@ -25,10 +25,10 @@ geforce_7600gs_device::geforce_7600gs_device(const machine_config &mconfig, cons void geforce_7600gs_device::device_start() { pci_device::device_start(); - add_map( 16*1024*1024, M_MEM, FUNC(geforce_7600gs_device::map1)); - add_map(256*1024*1024, M_MEM, FUNC(geforce_7600gs_device::map2)); - add_map( 16*1024*1024, M_MEM, FUNC(geforce_7600gs_device::map3)); - add_rom_from_region(); + pci_add_map( 16*1024*1024, M_MEM, FUNC(geforce_7600gs_device::map1)); + pci_add_map(256*1024*1024, M_MEM, FUNC(geforce_7600gs_device::map2)); + pci_add_map( 16*1024*1024, M_MEM, FUNC(geforce_7600gs_device::map3)); + pci_add_rom_from_region(); } void geforce_7600gs_device::device_reset() diff --git a/src/devices/video/gf7600gs.h b/src/devices/video/gf7600gs.h index db13718c6da..7c9b70354b4 100644 --- a/src/devices/video/gf7600gs.h +++ b/src/devices/video/gf7600gs.h @@ -12,7 +12,7 @@ public: geforce_7600gs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subdevice_id) : geforce_7600gs_device(mconfig, tag, owner, clock) { - set_ids_agp(0x10de02e1, 0xa1, subdevice_id); + pci_set_ids_agp(0x10de02e1, 0xa1, subdevice_id); } geforce_7600gs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/video/mga2064w.cpp b/src/devices/video/mga2064w.cpp index 6654aa9ec2e..87a42152a70 100644 --- a/src/devices/video/mga2064w.cpp +++ b/src/devices/video/mga2064w.cpp @@ -8,7 +8,7 @@ DEFINE_DEVICE_TYPE(MGA2064W, mga2064w_device, "mga2064w", "Matrox Millennium") mga2064w_device::mga2064w_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_device(mconfig, MGA2064W, tag, owner, clock) { - set_ids(0x102b0519, 0x01, 0x030000, 0x00000000); + pci_set_ids(0x102b0519, 0x01, 0x030000, 0x00000000); } void mga2064w_device::device_start() diff --git a/src/devices/video/virge_pci.cpp b/src/devices/video/virge_pci.cpp index e5371dd786b..45211b70be1 100644 --- a/src/devices/video/virge_pci.cpp +++ b/src/devices/video/virge_pci.cpp @@ -48,9 +48,9 @@ void virge_pci_device::lfb_map(address_map& map) mmio_map(map); } -void virge_pci_device::config_map(address_map &map) +void virge_pci_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); map(0x10, 0x13).rw(FUNC(virge_pci_device::base_address_r),FUNC(virge_pci_device::base_address_w)); } @@ -58,32 +58,32 @@ void virge_pci_device::refresh_linear_window() { if(downcast<s3virge_vga_device *>(m_vga.target())->is_linear_address_active()) { - set_map_flags(0, M_MEM); + pci_set_map_flags(0, M_MEM); switch(downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address_size() & 0x03) { case LAW_64K: - set_map_address(0,downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address() & 0xffff0000); + pci_set_map_address(0,downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address() & 0xffff0000); logerror("Linear window set to 0x%08x\n",downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address() & 0xffff0000); break; case LAW_1MB: - set_map_address(0,downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address() & 0xfff00000); + pci_set_map_address(0,downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address() & 0xfff00000); logerror("Linear window set to 0x%08x\n",downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address() & 0xfff00000); break; case LAW_2MB: - set_map_address(0,downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address() & 0xffe00000); + pci_set_map_address(0,downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address() & 0xffe00000); logerror("Linear window set to 0x%08x\n",downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address() & 0xffe00000); break; case LAW_4MB: - set_map_address(0,downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address() & 0xffc00000); + pci_set_map_address(0,downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address() & 0xffc00000); logerror("Linear window set to 0x%08x\n",downcast<s3virge_vga_device *>(m_vga.target())->get_linear_address() & 0xffc00000); break; } - remap_cb(); + m_pci_remap_cb(); } else { - set_map_flags(0, M_MEM | M_DISABLED); - remap_cb(); + pci_set_map_flags(0, M_MEM | M_DISABLED); + m_pci_remap_cb(); } } @@ -94,7 +94,7 @@ uint32_t virge_pci_device::base_address_r() void virge_pci_device::base_address_w(offs_t offset, uint32_t data) { - pci_device::address_base_w(offset,data); + pci_device::pci_address_base_w(offset,data); downcast<s3virge_vga_device *>(m_vga.target())->set_linear_address(data & 0xffff0000); refresh_linear_window(); } @@ -129,12 +129,12 @@ void virge_pci_device::vga_3b0_w(offs_t offset, uint32_t data, uint32_t mem_mask if(m_current_crtc_reg == 0x58) { refresh_linear_window(); - remap_cb(); + m_pci_remap_cb(); } else if(m_current_crtc_reg == 0x59 || m_current_crtc_reg == 0x5a) { refresh_linear_window(); - remap_cb(); + m_pci_remap_cb(); } } } @@ -221,42 +221,42 @@ void virge_pci_device::vram_w(offs_t offset, uint8_t data) void virge_pci_device::postload() { - remap_cb(); + m_pci_remap_cb(); } void virge_pci_device::device_start() { - set_ids(0x53335631, 0x00, 0x030000, 0x000000); + pci_set_ids(0x53335631, 0x00, 0x030000, 0x000000); pci_device::device_start(); - add_rom(m_bios->base(),0x8000); - expansion_rom_base = 0xc0000; + pci_add_rom(m_bios->base(),0x8000); + m_pci_expansion_rom_base = 0xc0000; - add_map(32 * 1024 * 1024, M_MEM | M_DISABLED, FUNC(virge_pci_device::lfb_map)); - set_map_address(0, 0x70000000); - set_map_size(0, 0x01100000); // Linear addressing maps to a 32MB address space + pci_add_map(32 * 1024 * 1024, M_MEM | M_DISABLED, FUNC(virge_pci_device::lfb_map)); + pci_set_map_address(0, 0x70000000); + pci_set_map_size(0, 0x01100000); // Linear addressing maps to a 32MB address space - remap_cb(); + m_pci_remap_cb(); machine().save().register_postload(save_prepost_delegate(FUNC(virge_pci_device::postload), this)); } void virgedx_pci_device::device_start() { - set_ids(0x53338a01, 0x00, 0x030000, 0x000000); + pci_set_ids(0x53338a01, 0x00, 0x030000, 0x000000); pci_device::device_start(); - add_rom(m_bios->base(),0x8000); - expansion_rom_base = 0xc0000; + pci_add_rom(m_bios->base(),0x8000); + m_pci_expansion_rom_base = 0xc0000; - add_map(4 * 1024 * 1024, M_MEM | M_DISABLED, FUNC(virge_pci_device::lfb_map)); - set_map_address(0, 0x70000000); - set_map_size(0, 0x01100000); // Linear addressing maps to a 32MB address space + pci_add_map(4 * 1024 * 1024, M_MEM | M_DISABLED, FUNC(virge_pci_device::lfb_map)); + pci_set_map_address(0, 0x70000000); + pci_set_map_size(0, 0x01100000); // Linear addressing maps to a 32MB address space - remap_cb(); + m_pci_remap_cb(); machine().save().register_postload(save_prepost_delegate(FUNC(virgedx_pci_device::postload), this)); } -void virge_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void virge_pci_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(virge_pci_device::vram_r)), write8sm_delegate(*this, FUNC(virge_pci_device::vram_w))); diff --git a/src/devices/video/virge_pci.h b/src/devices/video/virge_pci.h index f4b6ce29009..c66e761b78a 100644 --- a/src/devices/video/virge_pci.h +++ b/src/devices/video/virge_pci.h @@ -53,9 +53,9 @@ protected: virtual void device_add_mconfig(machine_config &config) override; virtual const tiny_rom_entry *device_rom_region() const override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; void postload(void); diff --git a/src/devices/video/voodoo_pci.cpp b/src/devices/video/voodoo_pci.cpp index e27413c8851..1f0e20e3201 100644 --- a/src/devices/video/voodoo_pci.cpp +++ b/src/devices/video/voodoo_pci.cpp @@ -49,9 +49,9 @@ DEFINE_DEVICE_TYPE(VOODOO_2_PCI, voodoo_2_pci_device, "voodoo_2_pci", "Voodoo 2 DEFINE_DEVICE_TYPE(VOODOO_BANSHEE_PCI, voodoo_banshee_pci_device, "voodoo_banshee_pci", "Voodoo Banshee PCI") DEFINE_DEVICE_TYPE(VOODOO_3_PCI, voodoo_3_pci_device, "voodoo_3_pci", "Voodoo 3 PCI") -void voodoo_pci_device::config_map(address_map &map) +void voodoo_pci_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); map(0x40, 0x5f).rw(FUNC(voodoo_pci_device::pcictrl_r), FUNC(voodoo_pci_device::pcictrl_w)); } @@ -94,58 +94,58 @@ void voodoo_pci_device::device_start() //void set_ids(u32 main_id, u8 revision, u32 pclass, u32 subsystem_id); void voodoo_1_pci_device::device_start() { - set_ids(0x121a0001, 0x02, 0x030000, 0x000000); + pci_set_ids(0x121a0001, 0x02, 0x030000, 0x000000); voodoo_pci_device::device_start(); - add_map(16 * 1024 * 1024, M_MEM | M_PREF, *m_voodoo, FUNC(voodoo_1_device::core_map)); - bank_infos[0].adr = 0xff000000; + pci_add_map(16 * 1024 * 1024, M_MEM | M_PREF, *m_voodoo, FUNC(voodoo_1_device::core_map)); + m_pci_bank_info[0].adr = 0xff000000; } void voodoo_2_pci_device::device_start() { - set_ids(0x121a0002, 0x02, 0x038000, 0x000000); + pci_set_ids(0x121a0002, 0x02, 0x038000, 0x000000); voodoo_pci_device::device_start(); - add_map(16 * 1024 * 1024, M_MEM | M_PREF, *m_voodoo, FUNC(voodoo_2_device::core_map)); - bank_infos[0].adr = 0xff000000; + pci_add_map(16 * 1024 * 1024, M_MEM | M_PREF, *m_voodoo, FUNC(voodoo_2_device::core_map)); + m_pci_bank_info[0].adr = 0xff000000; } void voodoo_banshee_pci_device::device_start() { - set_ids(0x121a0003, 0x02, 0x030000, 0x000000); + pci_set_ids(0x121a0003, 0x02, 0x030000, 0x000000); voodoo_pci_device::device_start(); - add_map(32 * 1024 * 1024, M_MEM, *m_voodoo, FUNC(voodoo_banshee_device::core_map)); - add_map(32 * 1024 * 1024, M_MEM, *m_voodoo, FUNC(voodoo_banshee_device::lfb_map)); - add_map(256, M_IO, *m_voodoo, FUNC(voodoo_banshee_device::io_map)); - bank_infos[0].adr = 0xf8000000; - bank_infos[1].adr = 0xf8000008; - bank_infos[2].adr = 0xfffffff0; + pci_add_map(32 * 1024 * 1024, M_MEM, *m_voodoo, FUNC(voodoo_banshee_device::core_map)); + pci_add_map(32 * 1024 * 1024, M_MEM, *m_voodoo, FUNC(voodoo_banshee_device::lfb_map)); + pci_add_map(256, M_IO, *m_voodoo, FUNC(voodoo_banshee_device::io_map)); + m_pci_bank_info[0].adr = 0xf8000000; + m_pci_bank_info[1].adr = 0xf8000008; + m_pci_bank_info[2].adr = 0xfffffff0; } void voodoo_3_pci_device::device_start() { - set_ids(0x121a0005, 0x02, 0x030000, 0x000000); + pci_set_ids(0x121a0005, 0x02, 0x030000, 0x000000); voodoo_pci_device::device_start(); // need to downcast to voodoo_banshee_device because the map functions are shared // this will cleaner when the PCI interface is implemented as a mix-in auto &banshee = static_cast<voodoo_banshee_device &>(*m_voodoo); - add_map(32 * 1024 * 1024, M_MEM, banshee, FUNC(voodoo_banshee_device::core_map)); - add_map(32 * 1024 * 1024, M_MEM, banshee, FUNC(voodoo_banshee_device::lfb_map)); - add_map(256, M_IO, banshee, FUNC(voodoo_banshee_device::io_map)); - bank_infos[0].adr = 0xf8000000; - bank_infos[1].adr = 0xf8000008; - bank_infos[2].adr = 0xfffffff0; + pci_add_map(32 * 1024 * 1024, M_MEM, banshee, FUNC(voodoo_banshee_device::core_map)); + pci_add_map(32 * 1024 * 1024, M_MEM, banshee, FUNC(voodoo_banshee_device::lfb_map)); + pci_add_map(256, M_IO, banshee, FUNC(voodoo_banshee_device::io_map)); + m_pci_bank_info[0].adr = 0xf8000000; + m_pci_bank_info[1].adr = 0xf8000008; + m_pci_bank_info[2].adr = 0xfffffff0; } void voodoo_pci_device::postload() { - remap_cb(); + m_pci_remap_cb(); } void voodoo_pci_device::device_reset() @@ -154,13 +154,13 @@ void voodoo_pci_device::device_reset() pci_device::device_reset(); } -void voodoo_pci_device::map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space, +void voodoo_pci_device::pci_map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space, u64 io_window_start, u64 io_window_end, u64 io_offset, address_space *io_space) { logerror("%s: map_extra\n", this->tag()); } -void voodoo_banshee_pci_device::map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space, +void voodoo_banshee_pci_device::pci_map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space, u64 io_window_start, u64 io_window_end, u64 io_offset, address_space *io_space) { logerror("%s: map_extra\n", this->tag()); @@ -173,7 +173,7 @@ void voodoo_banshee_pci_device::map_extra(u64 memory_window_start, u64 memory_wi logerror("%s: map %s at %0*x-%0*x\n", this->tag(), "vga_r/w", 4, u32(start), 4, u32(end)); } -void voodoo_3_pci_device::map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space, +void voodoo_3_pci_device::pci_map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space, u64 io_window_start, u64 io_window_end, u64 io_offset, address_space *io_space) { logerror("%s: map_extra\n", this->tag()); diff --git a/src/devices/video/voodoo_pci.h b/src/devices/video/voodoo_pci.h index c56358b2c2f..1d6095ac777 100644 --- a/src/devices/video/voodoo_pci.h +++ b/src/devices/video/voodoo_pci.h @@ -27,10 +27,10 @@ public: protected: voodoo_pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); - virtual void map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space, + virtual void pci_map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space, u64 io_window_start, u64 io_window_end, u64 io_offset, address_space *io_space) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; void postload(void); @@ -104,7 +104,7 @@ protected: virtual void device_start() override; virtual void device_add_mconfig(machine_config &config) override; - virtual void map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space, + virtual void pci_map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space, u64 io_window_start, u64 io_window_end, u64 io_offset, address_space *io_space) override; required_device<voodoo_banshee_device> m_voodoo; }; @@ -126,7 +126,7 @@ protected: virtual void device_start() override; virtual void device_add_mconfig(machine_config &config) override; - virtual void map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space, + virtual void pci_map_extra(u64 memory_window_start, u64 memory_window_end, u64 memory_offset, address_space *memory_space, u64 io_window_start, u64 io_window_end, u64 io_offset, address_space *io_space) override; required_device<voodoo_3_device> m_voodoo; }; diff --git a/src/mame/drivers/enmirage.cpp b/src/mame/drivers/enmirage.cpp index 3aff190371d..5684c66d0fe 100644 --- a/src/mame/drivers/enmirage.cpp +++ b/src/mame/drivers/enmirage.cpp @@ -171,7 +171,7 @@ static void ensoniq_floppies(device_slot_interface &device) uint8_t enmirage_state::mirage_adc_read() { - uint8_t value; + uint8_t value = 0; switch(m_mux_value & 0x03) { case 0: diff --git a/src/mame/drivers/nforcepc.cpp b/src/mame/drivers/nforcepc.cpp index 6cec458ba1b..619da7eb7a0 100644 --- a/src/mame/drivers/nforcepc.cpp +++ b/src/mame/drivers/nforcepc.cpp @@ -68,15 +68,15 @@ static const uint8_t test_spd_data[] = { DEFINE_DEVICE_TYPE(CRUSH11, crush11_host_device, "crush11", "NVIDIA Corporation nForce CPU bridge") -void crush11_host_device::config_map(address_map &map) +void crush11_host_device::pci_config_map(address_map &map) { - pci_host_device::config_map(map); - map(0x10, 0x27).rw(FUNC(pci_device::address_base_r), FUNC(pci_device::address_base_w)); + pci_host_device::pci_config_map(map); + map(0x10, 0x27).rw(FUNC(pci_device::pci_address_base_r), FUNC(pci_device::pci_address_base_w)); map(0x84, 0x87).rw(FUNC(crush11_host_device::ram_size_r), FUNC(crush11_host_device::ram_size_w)); map(0xf0, 0xf0).rw(FUNC(crush11_host_device::unknown_r), FUNC(crush11_host_device::unknown_w)); } -uint8_t crush11_host_device::header_type_r() +uint8_t crush11_host_device::pci_header_type_r() { return 0x80; // from lspci dump } @@ -92,7 +92,7 @@ crush11_host_device::crush11_host_device(const machine_config &mconfig, const ch void crush11_host_device::device_start() { pci_host_device::device_start(); - set_multifunction_device(true); + pci_set_multifunction_device(true); memory_space = &cpu->space(AS_DATA); io_space = &cpu->space(AS_IO); @@ -102,15 +102,15 @@ void crush11_host_device::device_start() io_window_start = 0; io_window_end = 0xffff; io_offset = 0; - status = 0x00b0; - command = 0x0000; + m_pci_status = 0x00b0; + m_pci_command = 0x0000; - add_map(64 * 1024 * 1024, M_MEM | M_PREF, FUNC(crush11_host_device::aperture_map)); + pci_add_map(64 * 1024 * 1024, M_MEM | M_PREF, FUNC(crush11_host_device::aperture_map)); } -void crush11_host_device::reset_all_mappings() +void crush11_host_device::pci_reset_all_mappings() { - pci_host_device::reset_all_mappings(); + pci_host_device::pci_reset_all_mappings(); } void crush11_host_device::device_reset() @@ -118,7 +118,7 @@ void crush11_host_device::device_reset() pci_host_device::device_reset(); } -void crush11_host_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void crush11_host_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { io_space->install_device(0, 0xffff, *static_cast<pci_host_device *>(this), &pci_host_device::io_configuration_access_map); @@ -155,9 +155,9 @@ void crush11_host_device::ram_size_w(uint32_t data) DEFINE_DEVICE_TYPE(CRUSH11_MEMORY, crush11_memory_device, "crush11_memory", "nForce memory") -void crush11_memory_device::config_map(address_map &map) +void crush11_memory_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); /* bit 31 of a0,a4,a8,ac,b0 and b4 must be 0 bit 0 of c4 and c8 must be 0 @@ -175,7 +175,7 @@ void crush11_memory_device::config_map(address_map &map) crush11_memory_device::crush11_memory_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id, int ram_size) : crush11_memory_device(mconfig, tag, owner, clock) { - set_ids(0x10de01ac, 0xb2, 0x050000, subsystem_id); + pci_set_ids(0x10de01ac, 0xb2, 0x050000, subsystem_id); set_ram_size(ram_size); } @@ -189,12 +189,12 @@ void crush11_memory_device::device_start() device_t *r = owner()->subdevice("00.0"); pci_device::device_start(); - set_multifunction_device(true); + pci_set_multifunction_device(true); ram.resize(ddr_ram_size * 1024 * 1024 / 4); host = dynamic_cast<crush11_host_device *>(r); ram_space = host->get_cpu_space(AS_PROGRAM); - status = 0x0020; - command = 0x0000; + m_pci_status = 0x0020; + m_pci_command = 0x0000; } void crush11_memory_device::device_reset() @@ -210,7 +210,7 @@ void crush11_memory_device::set_ram_size(int ram_size) ddr_ram_size = 16; } -void crush11_memory_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void crush11_memory_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { ram_space->install_ram(0x00000000, ddr_ram_size * 1024 * 1024 - 1, &ram[0]); diff --git a/src/mame/drivers/stv.cpp b/src/mame/drivers/stv.cpp index 61f259ccf11..0d6f714d82c 100644 --- a/src/mame/drivers/stv.cpp +++ b/src/mame/drivers/stv.cpp @@ -191,10 +191,10 @@ uint8_t stv_state::critcrsh_ioga_r(offs_t offset) void stv_state::critcrsh_ioga_w(offs_t offset, uint8_t data) { + static uint8_t bcd2hex[] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7c, 0x07, 0x7f, 0x67, 0x58, 0x4c, 0x62, 0x49, 0x78, 0x00 }; // TODO: chip type unknown switch (offset * 2 + 1) { case 0x0b: - static uint8_t bcd2hex[] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7c, 0x07, 0x7f, 0x67, 0x58, 0x4c, 0x62, 0x49, 0x78, 0x00 }; // TODO: chip type unknown m_cc_digits[0] = bcd2hex[(data & 0xf0) >> 4]; m_cc_digits[1] = bcd2hex[data & 0x0f]; break; diff --git a/src/mame/includes/nforcepc.h b/src/mame/includes/nforcepc.h index acc61f21c74..06c147fa12c 100644 --- a/src/mame/includes/nforcepc.h +++ b/src/mame/includes/nforcepc.h @@ -24,7 +24,7 @@ public: crush11_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, const char *bios_device_tag) : crush11_host_device(mconfig, tag, owner, clock) { - set_ids_host(0x10de01a4, 0xb2, 0); + pci_set_ids_host(0x10de01a4, 0xb2, 0); set_cpu_tag(std::forward<T>(cpu_tag)); biosrom.set_tag(bios_device_tag); } @@ -42,19 +42,19 @@ protected: virtual void device_start() override; virtual void device_reset() override; - virtual void reset_all_mappings() override; + virtual void pci_reset_all_mappings() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: required_device<device_memory_interface> cpu; required_device<intelfsh8_device> biosrom; uint32_t ram_size; - virtual uint8_t header_type_r() override; + virtual uint8_t pci_header_type_r() override; uint8_t unknown_r(); void unknown_w(uint8_t data); uint32_t ram_size_r(); @@ -76,10 +76,10 @@ protected: virtual void device_start() override; virtual void device_reset() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: int ddr_ram_size; diff --git a/src/mame/includes/xbox_pci.h b/src/mame/includes/xbox_pci.h index b0fc2aae613..66f6bd1cd1c 100644 --- a/src/mame/includes/xbox_pci.h +++ b/src/mame/includes/xbox_pci.h @@ -19,11 +19,11 @@ public: nv2a_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag) : nv2a_host_device(mconfig, tag, owner, clock) { - set_ids_host(0x10de02a5, 0, 0); + pci_set_ids_host(0x10de02a5, 0, 0); set_cpu_tag(std::forward<T>(cpu_tag)); } nv2a_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; template <typename T> void set_cpu_tag(T &&cpu_tag) { cpu.set_tag(std::forward<T>(cpu_tag)); } @@ -50,9 +50,9 @@ public: } nv2a_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; protected: @@ -114,7 +114,7 @@ protected: virtual void device_start() override; virtual void device_reset() override; virtual void device_add_mconfig(machine_config &config) override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; DECLARE_WRITE_LINE_MEMBER(interrupt_ouptut_changed); @@ -183,7 +183,7 @@ protected: virtual void device_start() override; virtual void device_reset() override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: devcb_write_line m_interrupt_handler; @@ -230,7 +230,7 @@ protected: virtual void device_config_complete() override; virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: ohci_usb_controller *ohci_usb; @@ -284,7 +284,7 @@ public: mcpx_apu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id, T &&cpu_tag) : mcpx_apu_device(mconfig, tag, owner, clock) { - set_ids(0x10de01b0, 0xc2, 0x040100, subsystem_id); + pci_set_ids(0x10de01b0, 0xc2, 0x040100, subsystem_id); set_cpu_tag(std::forward<T>(cpu_tag)); } mcpx_apu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -298,7 +298,7 @@ protected: virtual void device_reset() override; virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: required_device<device_memory_interface> cpu; @@ -351,7 +351,7 @@ protected: virtual void device_start() override; virtual void device_reset() override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: struct ac97_state { @@ -400,10 +400,10 @@ protected: virtual void device_start() override; virtual void device_reset() override; virtual void device_add_mconfig(machine_config &config) override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; - virtual void config_map(address_map &map) override; + virtual void pci_config_map(address_map &map) override; private: required_device<bus_master_ide_controller_device> m_pri; @@ -433,11 +433,11 @@ public: nv2a_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t main_id, uint32_t revision) : nv2a_agp_device(mconfig, tag, owner, clock) { - set_ids_bridge(main_id, revision); + pci_set_ids_bridge(main_id, revision); } nv2a_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - void config_map(address_map& map) override; + void pci_config_map(address_map& map) override; uint32_t unknown_r(offs_t offset, uint32_t mem_mask = ~0); void unknown_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); diff --git a/src/mame/machine/315-6154.cpp b/src/mame/machine/315-6154.cpp index 9e29a6646bc..ab022103675 100644 --- a/src/mame/machine/315-6154.cpp +++ b/src/mame/machine/315-6154.cpp @@ -65,7 +65,7 @@ void sega_315_6154_device::regenerate_config_mapping() { const int s = i >> 3; const int o = (i & 7) << 8; - config_space->install_device((0x800 << s) + o, ((0x800 << s) + o) | 0xff, *sub_devices[i], &pci_device::config_map); + config_space->install_device((0x800 << s) + o, ((0x800 << s) + o) | 0xff, *sub_devices[i], &pci_device::pci_config_map); } } diff --git a/src/mame/machine/iteagle_fpga.cpp b/src/mame/machine/iteagle_fpga.cpp index 52278b7bf90..b8f10e2ff99 100644 --- a/src/mame/machine/iteagle_fpga.cpp +++ b/src/mame/machine/iteagle_fpga.cpp @@ -48,7 +48,7 @@ iteagle_fpga_device::iteagle_fpga_device(const machine_config &mconfig, const ch m_version(0), m_seq_init(0) { - set_ids(0x55cc33aa, 0xaa, 0xaaaaaa, 0x00); + pci_set_ids(0x55cc33aa, 0xaa, 0xaaaaaa, 0x00); } void iteagle_fpga_device::device_add_mconfig(machine_config &config) @@ -84,24 +84,24 @@ void iteagle_fpga_device::device_start() m_e1_nvram->set_base(m_e1_nv_data, sizeof(m_e1_nv_data)); pci_device::device_start(); - status = 0x5555; - command = 0x5555; + m_pci_status = 0x5555; + m_pci_command = 0x5555; // always keep this device memory ranges active - command |= 3; - command_mask &= ~3; + m_pci_command |= 3; + m_pci_command_mask &= ~3; - add_map(sizeof(m_fpga_regs), M_IO, FUNC(iteagle_fpga_device::fpga_map)); + pci_add_map(sizeof(m_fpga_regs), M_IO, FUNC(iteagle_fpga_device::fpga_map)); // fpga defaults to base address 0x00000300 - bank_infos[0].adr = 0x00000300 & (~(bank_infos[0].size - 1)); + m_pci_bank_info[0].adr = 0x00000300 & (~(m_pci_bank_info[0].size - 1)); - add_map(sizeof(m_rtc_regs), M_MEM, FUNC(iteagle_fpga_device::rtc_map)); + pci_add_map(sizeof(m_rtc_regs), M_MEM, FUNC(iteagle_fpga_device::rtc_map)); // RTC defaults to base address 0x000c0000 - bank_infos[1].adr = 0x000c0000 & (~(bank_infos[1].size - 1)); + m_pci_bank_info[1].adr = 0x000c0000 & (~(m_pci_bank_info[1].size - 1)); - add_map(0x20000, M_MEM, FUNC(iteagle_fpga_device::ram_map)); + pci_add_map(0x20000, M_MEM, FUNC(iteagle_fpga_device::ram_map)); // RAM defaults to base address 0x000e0000 - bank_infos[2].adr = 0x000e0000 & (~(bank_infos[2].size - 1)); + m_pci_bank_info[2].adr = 0x000e0000 & (~(m_pci_bank_info[2].size - 1)); m_timer = timer_alloc(0, nullptr); @@ -128,7 +128,7 @@ void iteagle_fpga_device::device_start() void iteagle_fpga_device::device_reset() { - remap_cb(); + m_pci_remap_cb(); memset(m_fpga_regs, 0, sizeof(m_fpga_regs)); m_seq = m_seq_init; m_seq_rem1 = 0; @@ -683,7 +683,7 @@ iteagle_eeprom_device::iteagle_eeprom_device(const machine_config &mconfig, cons : pci_device(mconfig, ITEAGLE_EEPROM, tag, owner, clock) , m_sw_version(0), m_hw_version(0), m_eeprom(*this, "eeprom") { - set_ids(0x80861229, 0x02, 0x020000, 0x00); + pci_set_ids(0x80861229, 0x02, 0x020000, 0x00); // When corrupt writes 0x3=2, 0x3e=2, 0xa=0, 0x30=0 // 0x4 = HW Version - 6-8 is GREEN board PCB, 9 is RED board PCB @@ -722,12 +722,12 @@ void iteagle_eeprom_device::device_start() m_eeprom->default_data(m_iteagle_default_eeprom.data(), 0x80); pci_device::device_start(); - skip_map_regs(1); - add_map(0x10, M_IO, FUNC(iteagle_eeprom_device::eeprom_map)); + pci_skip_map_regs(1); + pci_add_map(0x10, M_IO, FUNC(iteagle_eeprom_device::eeprom_map)); // always keep this device memory ranges active - command |= 3; - command_mask &= ~3; + m_pci_command |= 3; + m_pci_command_mask &= ~3; } void iteagle_eeprom_device::device_reset() @@ -735,7 +735,7 @@ void iteagle_eeprom_device::device_reset() pci_device::device_reset(); } -void iteagle_eeprom_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void iteagle_eeprom_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { m_memory_space = memory_space; @@ -811,24 +811,24 @@ iteagle_periph_device::iteagle_periph_device(const machine_config &mconfig, cons : pci_device(mconfig, ITEAGLE_PERIPH, tag, owner, clock) , m_rtc(*this, "eagle1_rtc") { - set_ids(0x1080c693, 0x00, 0x060100, 0x00); + pci_set_ids(0x1080c693, 0x00, 0x060100, 0x00); } void iteagle_periph_device::device_start() { pci_device::device_start(); - pci_device::set_multifunction_device(true); - add_map(sizeof(m_ctrl_regs), M_IO, FUNC(iteagle_periph_device::ctrl_map)); + pci_device::pci_set_multifunction_device(true); + pci_add_map(sizeof(m_ctrl_regs), M_IO, FUNC(iteagle_periph_device::ctrl_map)); // ctrl defaults to base address 0x00000000 - bank_infos[0].adr = 0x000; + m_pci_bank_info[0].adr = 0x000; m_rtc_regs[0xa] = 0x20; // 32.768 MHz m_rtc_regs[0xb] = 0x02; // 24-hour format m_rtc->set_base(m_rtc_regs, sizeof(m_rtc_regs)); // always keep this device memory ranges active - command |= 3; - command_mask &= ~3; + m_pci_command |= 3; + m_pci_command_mask &= ~3; // Save states save_item(NAME(m_ctrl_regs)); diff --git a/src/mame/machine/iteagle_fpga.h b/src/mame/machine/iteagle_fpga.h index 9cfacc63484..af3fbd5282c 100644 --- a/src/mame/machine/iteagle_fpga.h +++ b/src/mame/machine/iteagle_fpga.h @@ -124,7 +124,7 @@ class iteagle_eeprom_device : public pci_device { public: iteagle_eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); // optional information overrides - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; void set_info(int sw_version, int hw_version) {m_sw_version=sw_version; m_hw_version=hw_version;} diff --git a/src/mame/machine/naomigd.cpp b/src/mame/machine/naomigd.cpp index cc6fbf34f9f..a6f5a1a852e 100644 --- a/src/mame/machine/naomigd.cpp +++ b/src/mame/machine/naomigd.cpp @@ -418,21 +418,21 @@ idegdrom_device::idegdrom_device(const machine_config &mconfig, const char *tag, m_ide(*this, "ide"), irq_cb(*this) { - set_ids(0x11db189d, 0, 0, 0); // 0x10221000 or 0x00011172 possible too + pci_set_ids(0x11db189d, 0, 0, 0); // 0x10221000 or 0x00011172 possible too } void idegdrom_device::device_start() { pci_device::device_start(); irq_cb.resolve_safe(); - add_map(0x00000020, M_IO, FUNC(idegdrom_device::map_command)); - bank_infos[0].adr = 0x01c0; + pci_add_map(0x00000020, M_IO, FUNC(idegdrom_device::map_command)); + m_pci_bank_info[0].adr = 0x01c0; // pci system does not support base addresses not multiples of size - add_map(0x00000020, M_IO | M_DISABLED, FUNC(idegdrom_device::map_control)); - bank_infos[1].adr = 0x03b0; - add_map(0x00000010, M_IO, FUNC(idegdrom_device::map_dma)); - bank_infos[2].adr = 0xcc00; - command = 0x0083; + pci_add_map(0x00000020, M_IO | M_DISABLED, FUNC(idegdrom_device::map_control)); + m_pci_bank_info[1].adr = 0x03b0; + pci_add_map(0x00000010, M_IO, FUNC(idegdrom_device::map_dma)); + m_pci_bank_info[2].adr = 0xcc00; + m_pci_command = 0x0083; } void idegdrom_device::device_reset() @@ -440,7 +440,7 @@ void idegdrom_device::device_reset() pci_device::device_reset(); } -void idegdrom_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void idegdrom_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { io_space->install_device(io_offset + 0x03b0, io_offset + 0x03cf, *static_cast<idegdrom_device*>(this), &idegdrom_device::map_control); diff --git a/src/mame/machine/naomigd.h b/src/mame/machine/naomigd.h index 8ee20e62c99..612a5b17eda 100644 --- a/src/mame/machine/naomigd.h +++ b/src/mame/machine/naomigd.h @@ -38,7 +38,7 @@ protected: virtual void device_start() override; virtual void device_reset() override; - virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + virtual void pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; private: diff --git a/src/mame/machine/segabb.cpp b/src/mame/machine/segabb.cpp index 679896abb75..08003eac734 100644 --- a/src/mame/machine/segabb.cpp +++ b/src/mame/machine/segabb.cpp @@ -20,15 +20,15 @@ void sega_lindbergh_baseboard_device::map3(address_map &map) sega_lindbergh_baseboard_device::sega_lindbergh_baseboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_device(mconfig, SEGA_LINDBERGH_BASEBOARD, tag, owner, clock) { - set_ids(0x105718c1, 0x10, 0x068000, 0x11db067b); + pci_set_ids(0x105718c1, 0x10, 0x068000, 0x11db067b); } void sega_lindbergh_baseboard_device::device_start() { pci_device::device_start(); - add_map( 128*1024, M_MEM, FUNC(sega_lindbergh_baseboard_device::map1)); - add_map( 1024*1024, M_MEM, FUNC(sega_lindbergh_baseboard_device::map2)); - add_map(2*1024*1024, M_MEM, FUNC(sega_lindbergh_baseboard_device::map3)); + pci_add_map( 128*1024, M_MEM, FUNC(sega_lindbergh_baseboard_device::map1)); + pci_add_map( 1024*1024, M_MEM, FUNC(sega_lindbergh_baseboard_device::map2)); + pci_add_map(2*1024*1024, M_MEM, FUNC(sega_lindbergh_baseboard_device::map3)); } void sega_lindbergh_baseboard_device::device_reset() diff --git a/src/mame/machine/xbox_pci.cpp b/src/mame/machine/xbox_pci.cpp index cebd51f9dd7..36bc59243c4 100644 --- a/src/mame/machine/xbox_pci.cpp +++ b/src/mame/machine/xbox_pci.cpp @@ -22,10 +22,10 @@ nv2a_host_device::nv2a_host_device(const machine_config &mconfig, const char *ta pci_host_device(mconfig, NV2A_HOST, tag, owner, clock), cpu(*this, finder_base::DUMMY_TAG) { - set_ids_host(0x10de02a5, 0, 0); + pci_set_ids_host(0x10de02a5, 0, 0); } -void nv2a_host_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void nv2a_host_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { io_space->install_device(0, 0xffff, *static_cast<pci_host_device *>(this), &pci_host_device::io_configuration_access_map); @@ -58,16 +58,16 @@ void nv2a_host_device::device_reset() DEFINE_DEVICE_TYPE(NV2A_RAM, nv2a_ram_device, "nv2a_ram", "NV2A Memory Controller - SDRAM") -void nv2a_ram_device::config_map(address_map &map) +void nv2a_ram_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); map(0x6c, 0x6f).rw(FUNC(nv2a_ram_device::config_register_r), FUNC(nv2a_ram_device::config_register_w)); } nv2a_ram_device::nv2a_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_device(mconfig, NV2A_RAM, tag, owner, clock) { - set_ids(0x10de02a6, 0, 0, 0); + pci_set_ids(0x10de02a6, 0, 0, 0); } void nv2a_ram_device::device_start() @@ -85,7 +85,7 @@ void nv2a_ram_device::config_register_w(uint32_t data) { } -void nv2a_ram_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void nv2a_ram_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { memory_space->install_ram(0x00000000, ram_size * 1024 * 1024 - 1, &ram[0]); @@ -113,7 +113,7 @@ void mcpx_isalpc_device::internal_io_map(address_map &map) map(0x00e0, 0x00e3).nopw(); } -void mcpx_isalpc_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void mcpx_isalpc_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { io_space->install_device(0, 0xffff, *this, &mcpx_isalpc_device::internal_io_map); @@ -127,7 +127,7 @@ mcpx_isalpc_device::mcpx_isalpc_device(const machine_config &mconfig, const char { // revision id must be at least 0xb4 in the xbox, otherwise usb will require a hub // in the a7n266-c motherboard it has revision 0xc3 - set_ids(0x10de01b2, 0xb4, 0x060100, subsystem_id); + pci_set_ids(0x10de01b2, 0xb4, 0x060100, subsystem_id); } mcpx_isalpc_device::mcpx_isalpc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -157,15 +157,15 @@ mcpx_isalpc_device::mcpx_isalpc_device(const machine_config &mconfig, const char void mcpx_isalpc_device::device_start() { pci_device::device_start(); - set_multifunction_device(true); + pci_set_multifunction_device(true); m_smi_callback.resolve_safe(); m_interrupt_output.resolve_safe(); m_boot_state_hook.resolve_safe(); - add_map(0x00000100, M_IO, FUNC(mcpx_isalpc_device::lpc_io)); - bank_infos[0].adr = 0x8000; - status = 0x00b0; - command = 0x0001; - command_mask = 0x01be; + pci_add_map(0x00000100, M_IO, FUNC(mcpx_isalpc_device::lpc_io)); + m_pci_bank_info[0].adr = 0x8000; + m_pci_status = 0x00b0; + m_pci_command = 0x0001; + m_pci_command_mask = 0x01be; for (int a = 0; a < 16; a++) lpcdevices[a] = nullptr; for (device_t &d : subdevices()) @@ -240,7 +240,7 @@ void mcpx_isalpc_device::update_smi_line() uint32_t mcpx_isalpc_device::acpi_r(offs_t offset, uint32_t mem_mask) { - logerror("Acpi read from %04X mask %08X\n", (bank_infos[0].adr & 0xfffffffe) + offset * 4, mem_mask); + logerror("Acpi read from %04X mask %08X\n", (m_pci_bank_info[0].adr & 0xfffffffe) + offset * 4, mem_mask); if ((offset == 0xa) && ACCESSING_BITS_0_15) return m_global_smi_control; if ((offset == 0xb) && ACCESSING_BITS_16_23) @@ -250,7 +250,7 @@ uint32_t mcpx_isalpc_device::acpi_r(offs_t offset, uint32_t mem_mask) void mcpx_isalpc_device::acpi_w(offs_t offset, uint32_t data, uint32_t mem_mask) { - logerror("Acpi write %08X to %04X mask %08X\n", data, (bank_infos[0].adr & 0xfffffffe) + offset * 4, mem_mask); + logerror("Acpi write %08X to %04X mask %08X\n", data, (m_pci_bank_info[0].adr & 0xfffffffe) + offset * 4, mem_mask); // Seen using word registers at offsets // 0x00 0x02 0x04 0x08 0x20 0x22 0x28 0xa0 0xa2 0xc0-0xd8 // Byte access at 0x2e @@ -484,7 +484,7 @@ void mcpx_isalpc_device::set_virtual_line(int line, int state) void mcpx_isalpc_device::remap() { - remap_cb(); + m_pci_remap_cb(); } /* @@ -493,9 +493,9 @@ void mcpx_isalpc_device::remap() DEFINE_DEVICE_TYPE(MCPX_SMBUS, mcpx_smbus_device, "mcpx_smbus", "MCPX SMBus Controller") -void mcpx_smbus_device::config_map(address_map &map) +void mcpx_smbus_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); map(0x3e, 0x3e).r(FUNC(mcpx_smbus_device::minimum_grant_r)); map(0x3f, 0x3f).r(FUNC(mcpx_smbus_device::maximum_latency_r)); } @@ -518,7 +518,7 @@ void mcpx_smbus_device::smbus_io2(address_map &map) mcpx_smbus_device::mcpx_smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id) : mcpx_smbus_device(mconfig, tag, owner, clock) { - set_ids(0x10de01b4, 0xc1, 0x0c0500, subsystem_id); + pci_set_ids(0x10de01b4, 0xc1, 0x0c0500, subsystem_id); } mcpx_smbus_device::mcpx_smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -530,19 +530,19 @@ mcpx_smbus_device::mcpx_smbus_device(const machine_config &mconfig, const char * void mcpx_smbus_device::device_start() { pci_device::device_start(); - set_multifunction_device(true); + pci_set_multifunction_device(true); m_interrupt_handler.resolve_safe(); - add_map(0x00000010, M_IO, FUNC(mcpx_smbus_device::smbus_io0)); - bank_infos[0].adr = 0x1000; - add_map(0x00000010, M_IO, FUNC(mcpx_smbus_device::smbus_io1)); - bank_infos[1].adr = 0xc000; - add_map(0x00000020, M_IO, FUNC(mcpx_smbus_device::smbus_io2)); - bank_infos[2].adr = 0xc200; - status = 0x00b0; - command = 0x0001; + pci_add_map(0x00000010, M_IO, FUNC(mcpx_smbus_device::smbus_io0)); + m_pci_bank_info[0].adr = 0x1000; + pci_add_map(0x00000010, M_IO, FUNC(mcpx_smbus_device::smbus_io1)); + m_pci_bank_info[1].adr = 0xc000; + pci_add_map(0x00000020, M_IO, FUNC(mcpx_smbus_device::smbus_io2)); + m_pci_bank_info[2].adr = 0xc200; + m_pci_status = 0x00b0; + m_pci_command = 0x0001; // Min Grant 3 // Max Latency 1 - intr_pin = 1; + m_pci_intr_pin = 1; memset(&smbusst, 0, sizeof(smbusst)); for (int b = 0; b < 2; b++) for (int a = 0; a < 128; a++) @@ -671,9 +671,9 @@ void mcpx_smbus_device::smbus1_w(offs_t offset, uint32_t data, uint32_t mem_mask DEFINE_DEVICE_TYPE(MCPX_OHCI, mcpx_ohci_device, "mcpx_ohci", "MCPX OHCI USB Controller") -void mcpx_ohci_device::config_map(address_map &map) +void mcpx_ohci_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); map(0x3e, 0x3e).r(FUNC(mcpx_ohci_device::minimum_grant_r)); map(0x3f, 0x3f).r(FUNC(mcpx_ohci_device::maximum_latency_r)); } @@ -686,7 +686,7 @@ void mcpx_ohci_device::ohci_mmio(address_map &map) mcpx_ohci_device::mcpx_ohci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id) : mcpx_ohci_device(mconfig, tag, owner, clock) { - set_ids(0x10de01c2, 0xc3, 0x0c0310, subsystem_id); + pci_set_ids(0x10de01c2, 0xc3, 0x0c0310, subsystem_id); } mcpx_ohci_device::mcpx_ohci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -709,11 +709,11 @@ void mcpx_ohci_device::device_start() { pci_device::device_start(); m_interrupt_handler.resolve_safe(); - add_map(0x00001000, M_MEM, FUNC(mcpx_ohci_device::ohci_mmio)); - bank_infos[0].adr = 0xfed00000; - status = 0x00b0; - command = 0x0002; - intr_pin = 1; + pci_add_map(0x00001000, M_MEM, FUNC(mcpx_ohci_device::ohci_mmio)); + m_pci_bank_info[0].adr = 0xfed00000; + m_pci_status = 0x00b0; + m_pci_command = 0x0002; + m_pci_intr_pin = 1; ohci_usb = new ohci_usb_controller(); ohci_usb->set_cpu(maincpu.target()); ohci_usb->set_irq_callback( @@ -799,16 +799,16 @@ void mcpx_eth_device::eth_io(address_map &map) mcpx_eth_device::mcpx_eth_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_device(mconfig, MCPX_ETH, tag, owner, clock) { - set_ids(0x10de01c3, 0, 0, 0); + pci_set_ids(0x10de01c3, 0, 0, 0); } void mcpx_eth_device::device_start() { pci_device::device_start(); - add_map(0x00001000, M_MEM, FUNC(mcpx_eth_device::eth_mmio)); - bank_infos[0].adr = 0xfef00000; - add_map(0x00000100, M_IO, FUNC(mcpx_eth_device::eth_io)); - bank_infos[1].adr = 0xe000; + pci_add_map(0x00001000, M_MEM, FUNC(mcpx_eth_device::eth_mmio)); + m_pci_bank_info[0].adr = 0xfef00000; + pci_add_map(0x00000100, M_IO, FUNC(mcpx_eth_device::eth_io)); + m_pci_bank_info[1].adr = 0xe000; } void mcpx_eth_device::device_reset() @@ -840,9 +840,9 @@ void mcpx_eth_device::eth_io_w(uint32_t data) DEFINE_DEVICE_TYPE(MCPX_APU, mcpx_apu_device, "mcpx_apu", "MCP APU") -void mcpx_apu_device::config_map(address_map &map) +void mcpx_apu_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); map(0x3e, 0x3e).r(FUNC(mcpx_apu_device::minimum_grant_r)); map(0x3f, 0x3f).r(FUNC(mcpx_apu_device::maximum_latency_r)); } @@ -861,11 +861,11 @@ mcpx_apu_device::mcpx_apu_device(const machine_config &mconfig, const char *tag, void mcpx_apu_device::device_start() { pci_device::device_start(); - add_map(0x00080000, M_MEM, FUNC(mcpx_apu_device::apu_mmio)); - bank_infos[0].adr = 0xfe800000; - status = 0x00b0; - command = 0x0002; - intr_pin = 1; + pci_add_map(0x00080000, M_MEM, FUNC(mcpx_apu_device::apu_mmio)); + m_pci_bank_info[0].adr = 0xfe800000; + m_pci_status = 0x00b0; + m_pci_command = 0x0002; + m_pci_intr_pin = 1; memset(apust.memory, 0, sizeof(apust.memory)); memset(apust.voices_heap_blockaddr, 0, sizeof(apust.voices_heap_blockaddr)); memset(apust.voices_active, 0, sizeof(apust.voices_active)); @@ -1037,9 +1037,9 @@ void mcpx_apu_device::apu_w(offs_t offset, uint32_t data, uint32_t mem_mask) DEFINE_DEVICE_TYPE(MCPX_AC97_AUDIO, mcpx_ac97_audio_device, "mcpx_ac97_audio", "MCPX AC'97 Audio Codec Interface") -void mcpx_ac97_audio_device::config_map(address_map &map) +void mcpx_ac97_audio_device::pci_config_map(address_map &map) { - pci_device::config_map(map); + pci_device::pci_config_map(map); map(0x3e, 0x3e).r(FUNC(mcpx_ac97_audio_device::minimum_grant_r)); map(0x3f, 0x3f).r(FUNC(mcpx_ac97_audio_device::maximum_latency_r)); } @@ -1062,7 +1062,7 @@ void mcpx_ac97_audio_device::ac97_io1(address_map &map) mcpx_ac97_audio_device::mcpx_ac97_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id) : mcpx_ac97_audio_device(mconfig, tag, owner, clock) { - set_ids(0x10de01b1, 0xc2, 0x040100, subsystem_id); + pci_set_ids(0x10de01b1, 0xc2, 0x040100, subsystem_id); } mcpx_ac97_audio_device::mcpx_ac97_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -1073,16 +1073,16 @@ mcpx_ac97_audio_device::mcpx_ac97_audio_device(const machine_config &mconfig, co void mcpx_ac97_audio_device::device_start() { pci_device::device_start(); - set_multifunction_device(true); - add_map(0x00000100, M_IO, FUNC(mcpx_ac97_audio_device::ac97_io0)); - bank_infos[0].adr = 0xd000; - add_map(0x00000080, M_IO, FUNC(mcpx_ac97_audio_device::ac97_io1)); - bank_infos[1].adr = 0xd200; - add_map(0x00001000, M_MEM, FUNC(mcpx_ac97_audio_device::ac97_mmio)); - bank_infos[2].adr = 0xfec00000; - status = 0x00b0; - command = 0x0003; - intr_pin = 1; + pci_set_multifunction_device(true); + pci_add_map(0x00000100, M_IO, FUNC(mcpx_ac97_audio_device::ac97_io0)); + m_pci_bank_info[0].adr = 0xd000; + pci_add_map(0x00000080, M_IO, FUNC(mcpx_ac97_audio_device::ac97_io1)); + m_pci_bank_info[1].adr = 0xd200; + pci_add_map(0x00001000, M_MEM, FUNC(mcpx_ac97_audio_device::ac97_mmio)); + m_pci_bank_info[2].adr = 0xfec00000; + m_pci_status = 0x00b0; + m_pci_command = 0x0003; + m_pci_intr_pin = 1; memset(&ac97st, 0, sizeof(ac97st)); } @@ -1165,7 +1165,7 @@ DEFINE_DEVICE_TYPE(MCPX_AC97_MODEM, mcpx_ac97_modem_device, "mcpx_ac97_modem", " mcpx_ac97_modem_device::mcpx_ac97_modem_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_device(mconfig, MCPX_AC97_MODEM, tag, owner, clock) { - set_ids(0x10de01c1, 0, 0, 0); + pci_set_ids(0x10de01c1, 0, 0, 0); } /* @@ -1174,10 +1174,10 @@ mcpx_ac97_modem_device::mcpx_ac97_modem_device(const machine_config &mconfig, co DEFINE_DEVICE_TYPE(MCPX_IDE, mcpx_ide_device, "mcpx_ide", "MCPX IDE Controller") -void mcpx_ide_device::config_map(address_map &map) +void mcpx_ide_device::pci_config_map(address_map &map) { - pci_device::config_map(map); - map(0x08, 0x0b).rw(FUNC(pci_device::class_rev_r), FUNC(mcpx_ide_device::class_rev_w)); + pci_device::pci_config_map(map); + map(0x08, 0x0b).rw(FUNC(pci_device::pci_class_rev_r), FUNC(mcpx_ide_device::class_rev_w)); map(0x3e, 0x3e).r(FUNC(mcpx_ide_device::minimum_grant_r)); map(0x3f, 0x3f).r(FUNC(mcpx_ide_device::maximum_latency_r)); } @@ -1213,7 +1213,7 @@ void mcpx_ide_device::ide_io(address_map &map) mcpx_ide_device::mcpx_ide_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t subsystem_id) : mcpx_ide_device(mconfig, tag, owner, clock) { - set_ids(0x10de01bc, 0xc3, 0x01018a, subsystem_id); + pci_set_ids(0x10de01bc, 0xc3, 0x01018a, subsystem_id); } mcpx_ide_device::mcpx_ide_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -1228,14 +1228,14 @@ mcpx_ide_device::mcpx_ide_device(const machine_config &mconfig, const char *tag, void mcpx_ide_device::device_start() { pci_device::device_start(); - add_map(0x00000008, M_IO | M_DISABLED, FUNC(mcpx_ide_device::ide_pri_command)); // primary command block - add_map(0x00000004, M_IO | M_DISABLED, FUNC(mcpx_ide_device::ide_pri_control)); // primary control block - add_map(0x00000008, M_IO | M_DISABLED, FUNC(mcpx_ide_device::ide_sec_command)); // secondary command block - add_map(0x00000004, M_IO | M_DISABLED, FUNC(mcpx_ide_device::ide_sec_control)); // secondary control block - add_map(0x00000010, M_IO, FUNC(mcpx_ide_device::ide_io)); - bank_infos[4].adr = 0xff60; - status = 0x00b0; - command = 0x0001; + pci_add_map(0x00000008, M_IO | M_DISABLED, FUNC(mcpx_ide_device::ide_pri_command)); // primary command block + pci_add_map(0x00000004, M_IO | M_DISABLED, FUNC(mcpx_ide_device::ide_pri_control)); // primary control block + pci_add_map(0x00000008, M_IO | M_DISABLED, FUNC(mcpx_ide_device::ide_sec_command)); // secondary command block + pci_add_map(0x00000004, M_IO | M_DISABLED, FUNC(mcpx_ide_device::ide_sec_control)); // secondary control block + pci_add_map(0x00000010, M_IO, FUNC(mcpx_ide_device::ide_io)); + m_pci_bank_info[4].adr = 0xff60; + m_pci_status = 0x00b0; + m_pci_command = 0x0001; m_pri_interrupt_handler.resolve_safe(); m_sec_interrupt_handler.resolve_safe(); } @@ -1256,21 +1256,21 @@ void mcpx_ide_device::device_add_mconfig(machine_config &config) ide2.set_bus_master_space(":maincpu", AS_PROGRAM); } -void mcpx_ide_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +void mcpx_ide_device::pci_map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { // in compatibility mode the addresses are fixed, but the io enable bit in the command register is still used - if (~pclass & 1) // compatibility mode + if (~m_pci_pclass & 1) // compatibility mode { - if (command & 1) + if (m_pci_command & 1) { io_space->install_device(0x1f0, 0x1f7, *this, &mcpx_ide_device::ide_pri_command); io_space->install_device(0x3f4, 0x3f7, *this, &mcpx_ide_device::ide_pri_control); } } - if (~pclass & 4) + if (~m_pci_pclass & 4) { - if (command & 1) + if (m_pci_command & 1) { io_space->install_device(0x170, 0x177, *this, &mcpx_ide_device::ide_sec_command); io_space->install_device(0x374, 0x377, *this, &mcpx_ide_device::ide_sec_control); @@ -1282,33 +1282,33 @@ void mcpx_ide_device::class_rev_w(offs_t offset, uint32_t data, uint32_t mem_mas { if (ACCESSING_BITS_8_15) { - uint32_t old = pclass; + uint32_t old = m_pci_pclass; // bit 0 specifies if the primary channel is in compatibility or native-pci mode // bit 2 specifies if the secondary channel is in compatibility or native-pci mode - pclass = (pclass & 0xfffffffa) | ((data >> 8) & 5); - if (old ^ pclass) + m_pci_pclass = (m_pci_pclass & 0xfffffffa) | ((data >> 8) & 5); + if (old ^ m_pci_pclass) { - if (~pclass & 1) // compatibility mode + if (~m_pci_pclass & 1) // compatibility mode { - bank_infos[0].flags |= M_DISABLED; - bank_infos[1].flags |= M_DISABLED; + m_pci_bank_info[0].flags |= M_DISABLED; + m_pci_bank_info[1].flags |= M_DISABLED; } else { - bank_infos[0].flags &= ~M_DISABLED; - bank_infos[1].flags &= ~M_DISABLED; + m_pci_bank_info[0].flags &= ~M_DISABLED; + m_pci_bank_info[1].flags &= ~M_DISABLED; } - if (~pclass & 4) // compatibility mode + if (~m_pci_pclass & 4) // compatibility mode { - bank_infos[2].flags |= M_DISABLED; - bank_infos[3].flags |= M_DISABLED; + m_pci_bank_info[2].flags |= M_DISABLED; + m_pci_bank_info[3].flags |= M_DISABLED; } else { - bank_infos[2].flags &= ~M_DISABLED; - bank_infos[3].flags &= ~M_DISABLED; + m_pci_bank_info[2].flags &= ~M_DISABLED; + m_pci_bank_info[3].flags &= ~M_DISABLED; } - remap_cb(); + m_pci_remap_cb(); } } } @@ -1349,9 +1349,9 @@ WRITE_LINE_MEMBER(mcpx_ide_device::ide_sec_interrupt) DEFINE_DEVICE_TYPE(NV2A_AGP, nv2a_agp_device, "nv2a_agp", "NV2A AGP Host to PCI Bridge") -void nv2a_agp_device::config_map(address_map& map) +void nv2a_agp_device::pci_config_map(address_map& map) { - agp_bridge_device::config_map(map); + agp_bridge_device::pci_config_map(map); map(0x40, 0xff).rw(FUNC(nv2a_agp_device::unknown_r), FUNC(nv2a_agp_device::unknown_w)); } @@ -1411,17 +1411,17 @@ nv2a_gpu_device::nv2a_gpu_device(const machine_config &mconfig, const char *tag, m_interrupt_handler(*this), m_program(nullptr) { - set_ids(0x10de02a0, 0, 0, 0); + pci_set_ids(0x10de02a0, 0, 0, 0); } void nv2a_gpu_device::device_start() { agp_device::device_start(); m_interrupt_handler.resolve_safe(); - add_map(0x01000000, M_MEM, FUNC(nv2a_gpu_device::nv2a_mmio)); - bank_infos[0].adr = 0xfd000000; - add_map(0x08000000, M_MEM, FUNC(nv2a_gpu_device::nv2a_mirror)); - bank_infos[1].adr = 0xf0000000; + pci_add_map(0x01000000, M_MEM, FUNC(nv2a_gpu_device::nv2a_mmio)); + m_pci_bank_info[0].adr = 0xfd000000; + pci_add_map(0x08000000, M_MEM, FUNC(nv2a_gpu_device::nv2a_mirror)); + m_pci_bank_info[1].adr = 0xf0000000; m_program = &cpu->space(AS_PROGRAM); // FIXME: isn't there a proper way to map stuff or do DMA via the PCI device interface? nvidia_nv2a = new nv2a_renderer(machine()); nvidia_nv2a->set_irq_callbaclk( |