summaryrefslogtreecommitdiffstats
path: root/src/mame/drivers/segag80v.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'src/mame/drivers/segag80v.cpp')
-rw-r--r--src/mame/drivers/segag80v.cpp43
1 files changed, 23 insertions, 20 deletions
diff --git a/src/mame/drivers/segag80v.cpp b/src/mame/drivers/segag80v.cpp
index cb08ef60beb..57ed7667a42 100644
--- a/src/mame/drivers/segag80v.cpp
+++ b/src/mame/drivers/segag80v.cpp
@@ -389,30 +389,33 @@ WRITE8_MEMBER(segag80v_state::unknown_w)
*************************************/
/* complete memory map derived from schematics */
-ADDRESS_MAP_START(segag80v_state::main_map)
- AM_RANGE(0x0000, 0x07ff) AM_ROM /* CPU board ROM */
- AM_RANGE(0x0800, 0xbfff) AM_ROM /* PROM board ROM area */
- AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(mainram_w) AM_SHARE("mainram")
- AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(vectorram_w) AM_SHARE("vectorram")
-ADDRESS_MAP_END
+void segag80v_state::main_map(address_map &map)
+{
+ map(0x0000, 0x07ff).rom(); /* CPU board ROM */
+ map(0x0800, 0xbfff).rom(); /* PROM board ROM area */
+ map(0xc800, 0xcfff).ram().w(this, FUNC(segag80v_state::mainram_w)).share("mainram");
+ map(0xe000, 0xefff).ram().w(this, FUNC(segag80v_state::vectorram_w)).share("vectorram");
+}
-ADDRESS_MAP_START(segag80v_state::opcodes_map)
- AM_RANGE(0x0000, 0xffff) AM_READ(g80v_opcode_r)
-ADDRESS_MAP_END
+void segag80v_state::opcodes_map(address_map &map)
+{
+ map(0x0000, 0xffff).r(this, FUNC(segag80v_state::g80v_opcode_r));
+}
/* complete memory map derived from schematics */
-ADDRESS_MAP_START(segag80v_state::main_portmap)
- ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0xbc, 0xbc) /* AM_READ ??? */
- AM_RANGE(0xbd, 0xbe) AM_WRITE(multiply_w)
- AM_RANGE(0xbe, 0xbe) AM_READ(multiply_r)
- AM_RANGE(0xbf, 0xbf) AM_WRITE(unknown_w)
-
- AM_RANGE(0xf9, 0xf9) AM_MIRROR(0x04) AM_WRITE(coin_count_w)
- AM_RANGE(0xf8, 0xfb) AM_READ(mangled_ports_r)
- AM_RANGE(0xfc, 0xfc) AM_READ_PORT("FC")
-ADDRESS_MAP_END
+void segag80v_state::main_portmap(address_map &map)
+{
+ map.global_mask(0xff);
+ map(0xbc, 0xbc); /* AM_READ ??? */
+ map(0xbd, 0xbe).w(this, FUNC(segag80v_state::multiply_w));
+ map(0xbe, 0xbe).r(this, FUNC(segag80v_state::multiply_r));
+ map(0xbf, 0xbf).w(this, FUNC(segag80v_state::unknown_w));
+
+ map(0xf9, 0xf9).mirror(0x04).w(this, FUNC(segag80v_state::coin_count_w));
+ map(0xf8, 0xfb).r(this, FUNC(segag80v_state::mangled_ports_r));
+ map(0xfc, 0xfc).portr("FC");
+}