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Diffstat (limited to 'src/mame/drivers/namcos86.cpp')
-rw-r--r--src/mame/drivers/namcos86.cpp283
1 files changed, 148 insertions, 135 deletions
diff --git a/src/mame/drivers/namcos86.cpp b/src/mame/drivers/namcos86.cpp
index 5463aca574e..56408f97444 100644
--- a/src/mame/drivers/namcos86.cpp
+++ b/src/mame/drivers/namcos86.cpp
@@ -333,153 +333,165 @@ void namcos86_state::machine_start()
}
-ADDRESS_MAP_START(namcos86_state::cpu1_map)
- AM_RANGE(0x0000, 0x1fff) AM_RAM AM_WRITE(videoram1_w) AM_SHARE("videoram1")
- AM_RANGE(0x2000, 0x3fff) AM_RAM AM_WRITE(videoram2_w) AM_SHARE("videoram2")
+void namcos86_state::cpu1_map(address_map &map)
+{
+ map(0x0000, 0x1fff).ram().w(this, FUNC(namcos86_state::videoram1_w)).share("videoram1");
+ map(0x2000, 0x3fff).ram().w(this, FUNC(namcos86_state::videoram2_w)).share("videoram2");
- AM_RANGE(0x4000, 0x5fff) AM_RAM AM_WRITE(spriteram_w) AM_SHARE("spriteram")
+ map(0x4000, 0x5fff).ram().w(this, FUNC(namcos86_state::spriteram_w)).share("spriteram");
- AM_RANGE(0x4000, 0x43ff) AM_DEVREADWRITE("namco", namco_cus30_device, namcos1_cus30_r, namcos1_cus30_w) /* PSG device, shared RAM */
+ map(0x4000, 0x43ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w)); /* PSG device, shared RAM */
- AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
- AM_RANGE(0x8000, 0xffff) AM_ROM
+ map(0x6000, 0x7fff).bankr("bank1");
+ map(0x8000, 0xffff).rom();
/* ROM & Voice expansion board - only some games have it */
- AM_RANGE(0x6000, 0x7fff) AM_WRITE(cus115_w) /* ROM bank select and 63701X sample player control */
+ map(0x6000, 0x7fff).w(this, FUNC(namcos86_state::cus115_w)); /* ROM bank select and 63701X sample player control */
- AM_RANGE(0x8000, 0x8000) AM_WRITE(watchdog1_w)
- AM_RANGE(0x8400, 0x8400) AM_WRITE(int_ack1_w) /* IRQ acknowledge */
- AM_RANGE(0x8800, 0x8fff) AM_WRITE(tilebank_select_w)
+ map(0x8000, 0x8000).w(this, FUNC(namcos86_state::watchdog1_w));
+ map(0x8400, 0x8400).w(this, FUNC(namcos86_state::int_ack1_w)); /* IRQ acknowledge */
+ map(0x8800, 0x8fff).w(this, FUNC(namcos86_state::tilebank_select_w));
- AM_RANGE(0x9000, 0x9002) AM_WRITE(scroll0_w) /* scroll + priority */
- AM_RANGE(0x9003, 0x9003) AM_WRITE(bankswitch1_w)
- AM_RANGE(0x9004, 0x9006) AM_WRITE(scroll1_w) /* scroll + priority */
+ map(0x9000, 0x9002).w(this, FUNC(namcos86_state::scroll0_w)); /* scroll + priority */
+ map(0x9003, 0x9003).w(this, FUNC(namcos86_state::bankswitch1_w));
+ map(0x9004, 0x9006).w(this, FUNC(namcos86_state::scroll1_w)); /* scroll + priority */
- AM_RANGE(0x9400, 0x9402) AM_WRITE(scroll2_w) /* scroll + priority */
+ map(0x9400, 0x9402).w(this, FUNC(namcos86_state::scroll2_w)); /* scroll + priority */
// { 0x9403, 0x9403 } sub CPU rom bank select would be here
- AM_RANGE(0x9404, 0x9406) AM_WRITE(scroll3_w) /* scroll + priority */
+ map(0x9404, 0x9406).w(this, FUNC(namcos86_state::scroll3_w)); /* scroll + priority */
- AM_RANGE(0xa000, 0xa000) AM_WRITE(backcolor_w)
-ADDRESS_MAP_END
+ map(0xa000, 0xa000).w(this, FUNC(namcos86_state::backcolor_w));
+}
// skykiddx and hopmappy cpu2 programs do nothing but sit in a loop resetting the watchdog
// shared RAM is presumably mapped somewhere, but it's impossible to infer from program behaviour
-ADDRESS_MAP_START(namcos86_state::hopmappy_cpu2_map)
- AM_RANGE(0x8000, 0xffff) AM_ROM
- AM_RANGE(0x9000, 0x9000) AM_WRITE(watchdog2_w)
- AM_RANGE(0x9400, 0x9400) AM_WRITE(int_ack2_w)
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START(namcos86_state::roishtar_cpu2_map)
- AM_RANGE(0x0000, 0x1fff) AM_RAM_WRITE(spriteram_w) AM_SHARE("spriteram")
- AM_RANGE(0x4000, 0x5fff) AM_RAM_WRITE(videoram2_w) AM_SHARE("videoram2")
- AM_RANGE(0x6000, 0x7fff) AM_RAM_WRITE(videoram1_w) AM_SHARE("videoram1")
- AM_RANGE(0x8000, 0xffff) AM_ROM
- AM_RANGE(0xa000, 0xa000) AM_WRITE(watchdog2_w)
- AM_RANGE(0xb000, 0xb000) AM_WRITE(int_ack2_w) // IRQ acknowledge
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START(namcos86_state::genpeitd_cpu2_map)
- AM_RANGE(0x0000, 0x1fff) AM_RAM_WRITE(videoram1_w) AM_SHARE("videoram1")
- AM_RANGE(0x2000, 0x3fff) AM_RAM_WRITE(videoram2_w) AM_SHARE("videoram2")
- AM_RANGE(0x4000, 0x5fff) AM_RAM_WRITE(spriteram_w) AM_SHARE("spriteram")
- AM_RANGE(0x8000, 0xffff) AM_ROM
- AM_RANGE(0xb000, 0xb000) AM_WRITE(watchdog2_w)
- AM_RANGE(0x8800, 0x8800) AM_WRITE(int_ack2_w) // IRQ acknowledge
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START(namcos86_state::rthunder_cpu2_map)
- AM_RANGE(0x0000, 0x1fff) AM_RAM_WRITE(spriteram_w) AM_SHARE("spriteram")
- AM_RANGE(0x2000, 0x3fff) AM_RAM_WRITE(videoram1_w) AM_SHARE("videoram1")
- AM_RANGE(0x4000, 0x5fff) AM_RAM_WRITE(videoram2_w) AM_SHARE("videoram2")
- AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank2")
- AM_RANGE(0x8000, 0xffff) AM_ROM
- AM_RANGE(0x8000, 0x8000) AM_WRITE(watchdog2_w)
- AM_RANGE(0x8800, 0x8800) AM_WRITE(int_ack2_w) // IRQ acknowledge
+void namcos86_state::hopmappy_cpu2_map(address_map &map)
+{
+ map(0x8000, 0xffff).rom();
+ map(0x9000, 0x9000).w(this, FUNC(namcos86_state::watchdog2_w));
+ map(0x9400, 0x9400).w(this, FUNC(namcos86_state::int_ack2_w));
+}
+
+void namcos86_state::roishtar_cpu2_map(address_map &map)
+{
+ map(0x0000, 0x1fff).ram().w(this, FUNC(namcos86_state::spriteram_w)).share("spriteram");
+ map(0x4000, 0x5fff).ram().w(this, FUNC(namcos86_state::videoram2_w)).share("videoram2");
+ map(0x6000, 0x7fff).ram().w(this, FUNC(namcos86_state::videoram1_w)).share("videoram1");
+ map(0x8000, 0xffff).rom();
+ map(0xa000, 0xa000).w(this, FUNC(namcos86_state::watchdog2_w));
+ map(0xb000, 0xb000).w(this, FUNC(namcos86_state::int_ack2_w)); // IRQ acknowledge
+}
+
+void namcos86_state::genpeitd_cpu2_map(address_map &map)
+{
+ map(0x0000, 0x1fff).ram().w(this, FUNC(namcos86_state::videoram1_w)).share("videoram1");
+ map(0x2000, 0x3fff).ram().w(this, FUNC(namcos86_state::videoram2_w)).share("videoram2");
+ map(0x4000, 0x5fff).ram().w(this, FUNC(namcos86_state::spriteram_w)).share("spriteram");
+ map(0x8000, 0xffff).rom();
+ map(0xb000, 0xb000).w(this, FUNC(namcos86_state::watchdog2_w));
+ map(0x8800, 0x8800).w(this, FUNC(namcos86_state::int_ack2_w)); // IRQ acknowledge
+}
+
+void namcos86_state::rthunder_cpu2_map(address_map &map)
+{
+ map(0x0000, 0x1fff).ram().w(this, FUNC(namcos86_state::spriteram_w)).share("spriteram");
+ map(0x2000, 0x3fff).ram().w(this, FUNC(namcos86_state::videoram1_w)).share("videoram1");
+ map(0x4000, 0x5fff).ram().w(this, FUNC(namcos86_state::videoram2_w)).share("videoram2");
+ map(0x6000, 0x7fff).bankr("bank2");
+ map(0x8000, 0xffff).rom();
+ map(0x8000, 0x8000).w(this, FUNC(namcos86_state::watchdog2_w));
+ map(0x8800, 0x8800).w(this, FUNC(namcos86_state::int_ack2_w)); // IRQ acknowledge
// { 0xd800, 0xd802 } layer 2 scroll registers would be here
- AM_RANGE(0xd803, 0xd803) AM_WRITE(bankswitch2_w)
+ map(0xd803, 0xd803).w(this, FUNC(namcos86_state::bankswitch2_w));
// { 0xd804, 0xd806 } layer 3 scroll registers would be here
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START(namcos86_state::wndrmomo_cpu2_map)
- AM_RANGE(0x2000, 0x3fff) AM_RAM_WRITE(spriteram_w) AM_SHARE("spriteram")
- AM_RANGE(0x4000, 0x5fff) AM_RAM_WRITE(videoram1_w) AM_SHARE("videoram1")
- AM_RANGE(0x6000, 0x7fff) AM_RAM_WRITE(videoram2_w) AM_SHARE("videoram2")
- AM_RANGE(0x8000, 0xffff) AM_ROM
- AM_RANGE(0xc000, 0xc000) AM_WRITE(watchdog2_w)
- AM_RANGE(0xc800, 0xc800) AM_WRITE(int_ack2_w) // IRQ acknowledge
-ADDRESS_MAP_END
-
-
-ADDRESS_MAP_START(namcos86_state::common_mcu_map)
- AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE("mcu", hd63701_cpu_device, m6801_io_r,m6801_io_w)
- AM_RANGE(0x0080, 0x00ff) AM_RAM
- AM_RANGE(0x1000, 0x13ff) AM_DEVREADWRITE("namco", namco_cus30_device, namcos1_cus30_r, namcos1_cus30_w)
- AM_RANGE(0x1400, 0x1fff) AM_RAM
- AM_RANGE(0x8000, 0xbfff) AM_ROM // external ROM
- AM_RANGE(0xf000, 0xffff) AM_ROM // internal ROM
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START(namcos86_state::hopmappy_mcu_map)
- AM_IMPORT_FROM(common_mcu_map)
- AM_RANGE(0x2000, 0x2001) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
- AM_RANGE(0x2020, 0x2020) AM_READ_PORT("IN0")
- AM_RANGE(0x2021, 0x2021) AM_READ_PORT("IN1")
- AM_RANGE(0x2030, 0x2030) AM_READ(dsw0_r)
- AM_RANGE(0x2031, 0x2031) AM_READ(dsw1_r)
- AM_RANGE(0x8000, 0x8000) AM_WRITENOP // ??? written (not always) at end of interrupt
- AM_RANGE(0x8800, 0x8800) AM_WRITENOP // ??? written (not always) at end of interrupt
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START(namcos86_state::roishtar_mcu_map)
- AM_IMPORT_FROM(common_mcu_map)
- AM_RANGE(0x2000, 0x3fff) AM_ROM
- AM_RANGE(0x6000, 0x6001) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
- AM_RANGE(0x6020, 0x6020) AM_READ_PORT("IN0")
- AM_RANGE(0x6021, 0x6021) AM_READ_PORT("IN1")
- AM_RANGE(0x6030, 0x6030) AM_READ(dsw0_r)
- AM_RANGE(0x6031, 0x6031) AM_READ(dsw1_r)
- AM_RANGE(0x8000, 0x8000) AM_WRITENOP // ??? written (not always) at end of interrupt
- AM_RANGE(0x9800, 0x9800) AM_WRITENOP // ??? written (not always) at end of interrupt
-ADDRESS_MAP_END
+}
+
+void namcos86_state::wndrmomo_cpu2_map(address_map &map)
+{
+ map(0x2000, 0x3fff).ram().w(this, FUNC(namcos86_state::spriteram_w)).share("spriteram");
+ map(0x4000, 0x5fff).ram().w(this, FUNC(namcos86_state::videoram1_w)).share("videoram1");
+ map(0x6000, 0x7fff).ram().w(this, FUNC(namcos86_state::videoram2_w)).share("videoram2");
+ map(0x8000, 0xffff).rom();
+ map(0xc000, 0xc000).w(this, FUNC(namcos86_state::watchdog2_w));
+ map(0xc800, 0xc800).w(this, FUNC(namcos86_state::int_ack2_w)); // IRQ acknowledge
+}
+
+
+void namcos86_state::common_mcu_map(address_map &map)
+{
+ map(0x0000, 0x001f).rw("mcu", FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
+ map(0x0080, 0x00ff).ram();
+ map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w));
+ map(0x1400, 0x1fff).ram();
+ map(0x8000, 0xbfff).rom(); // external ROM
+ map(0xf000, 0xffff).rom(); // internal ROM
+}
+
+void namcos86_state::hopmappy_mcu_map(address_map &map)
+{
+ common_mcu_map(map);
+ map(0x2000, 0x2001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write));
+ map(0x2020, 0x2020).portr("IN0");
+ map(0x2021, 0x2021).portr("IN1");
+ map(0x2030, 0x2030).r(this, FUNC(namcos86_state::dsw0_r));
+ map(0x2031, 0x2031).r(this, FUNC(namcos86_state::dsw1_r));
+ map(0x8000, 0x8000).nopw(); // ??? written (not always) at end of interrupt
+ map(0x8800, 0x8800).nopw(); // ??? written (not always) at end of interrupt
+}
+
+void namcos86_state::roishtar_mcu_map(address_map &map)
+{
+ common_mcu_map(map);
+ map(0x2000, 0x3fff).rom();
+ map(0x6000, 0x6001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write));
+ map(0x6020, 0x6020).portr("IN0");
+ map(0x6021, 0x6021).portr("IN1");
+ map(0x6030, 0x6030).r(this, FUNC(namcos86_state::dsw0_r));
+ map(0x6031, 0x6031).r(this, FUNC(namcos86_state::dsw1_r));
+ map(0x8000, 0x8000).nopw(); // ??? written (not always) at end of interrupt
+ map(0x9800, 0x9800).nopw(); // ??? written (not always) at end of interrupt
+}
// are these three actually different, or are the I/O ports simply mirrored from 0x2000-0x3fff?
-ADDRESS_MAP_START(namcos86_state::genpeitd_mcu_map)
- AM_IMPORT_FROM(common_mcu_map)
- AM_RANGE(0x2800, 0x2801) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
- AM_RANGE(0x2820, 0x2820) AM_READ_PORT("IN0")
- AM_RANGE(0x2821, 0x2821) AM_READ_PORT("IN1")
- AM_RANGE(0x2830, 0x2830) AM_READ(dsw0_r)
- AM_RANGE(0x2831, 0x2831) AM_READ(dsw1_r)
- AM_RANGE(0x4000, 0x7fff) AM_ROM
- AM_RANGE(0xa000, 0xa000) AM_WRITENOP // ??? written (not always) at end of interrupt
- AM_RANGE(0xa800, 0xa800) AM_WRITENOP // ??? written (not always) at end of interrupt
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START(namcos86_state::rthunder_mcu_map)
- AM_IMPORT_FROM(common_mcu_map)
- AM_RANGE(0x2000, 0x2001) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
- AM_RANGE(0x2020, 0x2020) AM_READ_PORT("IN0")
- AM_RANGE(0x2021, 0x2021) AM_READ_PORT("IN1")
- AM_RANGE(0x2030, 0x2030) AM_READ(dsw0_r)
- AM_RANGE(0x2031, 0x2031) AM_READ(dsw1_r)
- AM_RANGE(0x4000, 0x7fff) AM_ROM
- AM_RANGE(0xb000, 0xb000) AM_WRITENOP // ??? written (not always) at end of interrupt
- AM_RANGE(0xb800, 0xb800) AM_WRITENOP // ??? written (not always) at end of interrupt
-ADDRESS_MAP_END
-
-ADDRESS_MAP_START(namcos86_state::wndrmomo_mcu_map)
- AM_IMPORT_FROM(common_mcu_map)
- AM_RANGE(0x3800, 0x3801) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
- AM_RANGE(0x3820, 0x3820) AM_READ_PORT("IN0")
- AM_RANGE(0x3821, 0x3821) AM_READ_PORT("IN1")
- AM_RANGE(0x3830, 0x3830) AM_READ(dsw0_r)
- AM_RANGE(0x3831, 0x3831) AM_READ(dsw1_r)
- AM_RANGE(0x4000, 0x7fff) AM_ROM
- AM_RANGE(0xc000, 0xc000) AM_WRITENOP // ??? written (not always) at end of interrupt
- AM_RANGE(0xc800, 0xc800) AM_WRITENOP // ??? written (not always) at end of interrupt
-ADDRESS_MAP_END
+void namcos86_state::genpeitd_mcu_map(address_map &map)
+{
+ common_mcu_map(map);
+ map(0x2800, 0x2801).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write));
+ map(0x2820, 0x2820).portr("IN0");
+ map(0x2821, 0x2821).portr("IN1");
+ map(0x2830, 0x2830).r(this, FUNC(namcos86_state::dsw0_r));
+ map(0x2831, 0x2831).r(this, FUNC(namcos86_state::dsw1_r));
+ map(0x4000, 0x7fff).rom();
+ map(0xa000, 0xa000).nopw(); // ??? written (not always) at end of interrupt
+ map(0xa800, 0xa800).nopw(); // ??? written (not always) at end of interrupt
+}
+
+void namcos86_state::rthunder_mcu_map(address_map &map)
+{
+ common_mcu_map(map);
+ map(0x2000, 0x2001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write));
+ map(0x2020, 0x2020).portr("IN0");
+ map(0x2021, 0x2021).portr("IN1");
+ map(0x2030, 0x2030).r(this, FUNC(namcos86_state::dsw0_r));
+ map(0x2031, 0x2031).r(this, FUNC(namcos86_state::dsw1_r));
+ map(0x4000, 0x7fff).rom();
+ map(0xb000, 0xb000).nopw(); // ??? written (not always) at end of interrupt
+ map(0xb800, 0xb800).nopw(); // ??? written (not always) at end of interrupt
+}
+
+void namcos86_state::wndrmomo_mcu_map(address_map &map)
+{
+ common_mcu_map(map);
+ map(0x3800, 0x3801).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write));
+ map(0x3820, 0x3820).portr("IN0");
+ map(0x3821, 0x3821).portr("IN1");
+ map(0x3830, 0x3830).r(this, FUNC(namcos86_state::dsw0_r));
+ map(0x3831, 0x3831).r(this, FUNC(namcos86_state::dsw1_r));
+ map(0x4000, 0x7fff).rom();
+ map(0xc000, 0xc000).nopw(); // ??? written (not always) at end of interrupt
+ map(0xc800, 0xc800).nopw(); // ??? written (not always) at end of interrupt
+}
READ8_MEMBER(namcos86_state::readFF)
@@ -487,12 +499,13 @@ READ8_MEMBER(namcos86_state::readFF)
return 0xff;
}
-ADDRESS_MAP_START(namcos86_state::mcu_port_map)
- AM_RANGE(M6801_PORT1, M6801_PORT1) AM_READ_PORT("IN2")
- AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READ(readFF) /* leds won't work otherwise */
- AM_RANGE(M6801_PORT1, M6801_PORT1) AM_WRITE(coin_w)
- AM_RANGE(M6801_PORT2, M6801_PORT2) AM_WRITE(led_w)
-ADDRESS_MAP_END
+void namcos86_state::mcu_port_map(address_map &map)
+{
+ map(M6801_PORT1, M6801_PORT1).portr("IN2");
+ map(M6801_PORT2, M6801_PORT2).r(this, FUNC(namcos86_state::readFF)); /* leds won't work otherwise */
+ map(M6801_PORT1, M6801_PORT1).w(this, FUNC(namcos86_state::coin_w));
+ map(M6801_PORT2, M6801_PORT2).w(this, FUNC(namcos86_state::led_w));
+}
/*******************************************************************/