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Diffstat (limited to 'src/mame/drivers/mvme162.cpp')
-rw-r--r--src/mame/drivers/mvme162.cpp10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mame/drivers/mvme162.cpp b/src/mame/drivers/mvme162.cpp
index 9c2f40a4efd..4f770d9bb95 100644
--- a/src/mame/drivers/mvme162.cpp
+++ b/src/mame/drivers/mvme162.cpp
@@ -206,8 +206,8 @@ mvme162_state(const machine_config &mconfig, device_type type, const char *tag)
void mvme162(machine_config &confg);
private:
- DECLARE_READ32_MEMBER (bootvect_r);
- DECLARE_WRITE32_MEMBER (bootvect_w);
+ uint32_t bootvect_r(offs_t offset);
+ void bootvect_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
virtual void machine_start () override;
virtual void machine_reset () override;
void mvme162_mem(address_map &map);
@@ -277,16 +277,16 @@ void mvme162_state::machine_reset ()
in the MCchip EPROM control register is high (ROM0=1). ROM0 is set to 1 after each reset. The ROM0 bit must be
cleared before other resources (DRAM or SRAM) can be mapped in this range ($00000000 - $001FFFFF).
*/
-READ32_MEMBER (mvme162_state::bootvect_r)
+uint32_t mvme162_state::bootvect_r(offs_t offset)
{
return m_sysrom[offset];
}
-WRITE32_MEMBER (mvme162_state::bootvect_w)
+void mvme162_state::bootvect_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask;
m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask);
- m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset.
+ m_sysrom = &m_sysram[0]; // redirect all upcoming accesses to masking RAM until reset.
}
/*