diff options
Diffstat (limited to 'src/mame/drivers/gal3.cpp')
-rw-r--r-- | src/mame/drivers/gal3.cpp | 211 |
1 files changed, 108 insertions, 103 deletions
diff --git a/src/mame/drivers/gal3.cpp b/src/mame/drivers/gal3.cpp index 365935035d7..0edb037b2e4 100644 --- a/src/mame/drivers/gal3.cpp +++ b/src/mame/drivers/gal3.cpp @@ -337,136 +337,141 @@ WRITE32_MEMBER(gal3_state::rso_w) } -ADDRESS_MAP_START(gal3_state::cpu_mst_map) - AM_RANGE(0x00000000, 0x001fffff) AM_ROM - AM_RANGE(0x20000000, 0x20001fff) AM_RAM AM_SHARE("nvmem") //NVRAM +void gal3_state::cpu_mst_map(address_map &map) +{ + map(0x00000000, 0x001fffff).rom(); + map(0x20000000, 0x20001fff).ram().share("nvmem"); //NVRAM /// AM_RANGE(0x40000000, 0x4000ffff) AM_WRITE() // - AM_RANGE(0x44000000, 0x44000003) AM_READ_PORT("DSW_CPU_mst" ) - AM_RANGE(0x44800000, 0x44800003) AM_READ(led_mst_r) AM_WRITE(led_mst_w) //LEDs - AM_RANGE(0x48000000, 0x48000003) AM_READNOP //irq1 v-blank ack - AM_RANGE(0x4c000000, 0x4c000003) AM_READNOP //irq3 ack - AM_RANGE(0x60000000, 0x60007fff) AM_RAM AM_SHARE("share1") //CRAM - AM_RANGE(0x60010000, 0x60017fff) AM_RAM AM_SHARE("share1") //Mirror - AM_RANGE(0x80000000, 0x8007ffff) AM_RAM //512K Local RAM + map(0x44000000, 0x44000003).portr("DSW_CPU_mst"); + map(0x44800000, 0x44800003).r(this, FUNC(gal3_state::led_mst_r)).w(this, FUNC(gal3_state::led_mst_w)); //LEDs + map(0x48000000, 0x48000003).nopr(); //irq1 v-blank ack + map(0x4c000000, 0x4c000003).nopr(); //irq3 ack + map(0x60000000, 0x60007fff).ram().share("share1"); //CRAM + map(0x60010000, 0x60017fff).ram().share("share1"); //Mirror + map(0x80000000, 0x8007ffff).ram(); //512K Local RAM /// AM_RANGE(0xc0000000, 0xc000000b) AM_WRITENOP //upload? - AM_RANGE(0xc000000c, 0xc000000f) AM_READNOP //irq2 ack + map(0xc000000c, 0xc000000f).nopr(); //irq2 ack /// AM_RANGE(0xd8000000, 0xd800000f) AM_RAM // protection or 68681? - AM_RANGE(0xf2800000, 0xf2800fff) AM_READWRITE(rso_r, rso_w) //RSO PCB -ADDRESS_MAP_END + map(0xf2800000, 0xf2800fff).rw(this, FUNC(gal3_state::rso_r), FUNC(gal3_state::rso_w)); //RSO PCB +} -ADDRESS_MAP_START(gal3_state::cpu_slv_map) - AM_RANGE(0x00000000, 0x0007ffff) AM_ROM +void gal3_state::cpu_slv_map(address_map &map) +{ + map(0x00000000, 0x0007ffff).rom(); /// AM_RANGE(0x40000000, 0x4000ffff) AM_WRITE() // - AM_RANGE(0x44000000, 0x44000003) AM_READ_PORT("DSW_CPU_slv" ) - AM_RANGE(0x44800000, 0x44800003) AM_READ(led_slv_r) AM_WRITE(led_slv_w) //LEDs - AM_RANGE(0x48000000, 0x48000003) AM_READNOP //irq1 ack + map(0x44000000, 0x44000003).portr("DSW_CPU_slv"); + map(0x44800000, 0x44800003).r(this, FUNC(gal3_state::led_slv_r)).w(this, FUNC(gal3_state::led_slv_w)); //LEDs + map(0x48000000, 0x48000003).nopr(); //irq1 ack /// AM_RANGE(0x50000000, 0x50000003) AM_READ() AM_WRITE() /// AM_RANGE(0x54000000, 0x54000003) AM_READ() AM_WRITE() - AM_RANGE(0x60000000, 0x60007fff) AM_RAM AM_SHARE("share1") - AM_RANGE(0x60010000, 0x60017fff) AM_RAM AM_SHARE("share1") - AM_RANGE(0x80000000, 0x8007ffff) AM_RAM //512K Local RAM + map(0x60000000, 0x60007fff).ram().share("share1"); + map(0x60010000, 0x60017fff).ram().share("share1"); + map(0x80000000, 0x8007ffff).ram(); //512K Local RAM - AM_RANGE(0xf1200000, 0xf120ffff) AM_RAM //DSP RAM + map(0xf1200000, 0xf120ffff).ram(); //DSP RAM /// AM_RANGE(0xf1400000, 0xf1400003) AM_WRITE(pointram_control_w) /// AM_RANGE(0xf1440000, 0xf1440003) AM_READWRITE(pointram_data_r,pointram_data_w) /// AM_RANGE(0x440002, 0x47ffff) AM_WRITENOP /* (frame buffer?) */ /// AM_RANGE(0xf1480000, 0xf14807ff) AM_READWRITE(namcos21_depthcue_r,namcos21_depthcue_w) - AM_RANGE(0xf1700000, 0xf170ffff) AM_READWRITE16(c355_obj_ram_r,c355_obj_ram_w,0xffffffff) AM_SHARE("objram") - AM_RANGE(0xf1720000, 0xf1720007) AM_READWRITE16(c355_obj_position_r,c355_obj_position_w,0xffffffff) - AM_RANGE(0xf1740000, 0xf175ffff) AM_READWRITE(paletteram32_r,paletteram32_w) - AM_RANGE(0xf1760000, 0xf1760003) AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w) - - AM_RANGE(0xf2200000, 0xf220ffff) AM_RAM - AM_RANGE(0xf2700000, 0xf270ffff) AM_RAM //AM_READWRITE16(c355_obj_ram_r,c355_obj_ram_w,0xffffffff) AM_SHARE("objram") - AM_RANGE(0xf2720000, 0xf2720007) AM_RAM //AM_READWRITE16(c355_obj_position_r,c355_obj_position_w,0xffffffff) - AM_RANGE(0xf2740000, 0xf275ffff) AM_RAM //AM_READWRITE(paletteram16_r,paletteram16_w) AM_SHARE("paletteram") - AM_RANGE(0xf2760000, 0xf2760003) AM_RAM //AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w) -ADDRESS_MAP_END - -ADDRESS_MAP_START(gal3_state::rs_cpu_map) - AM_RANGE(0x000000, 0x03ffff) AM_ROM - AM_RANGE(0x100000, 0x10ffff) AM_RAM //64K working RAM + map(0xf1700000, 0xf170ffff).rw(this, FUNC(gal3_state::c355_obj_ram_r), FUNC(gal3_state::c355_obj_ram_w)).share("objram"); + map(0xf1720000, 0xf1720007).rw(this, FUNC(gal3_state::c355_obj_position_r), FUNC(gal3_state::c355_obj_position_w)); + map(0xf1740000, 0xf175ffff).rw(this, FUNC(gal3_state::paletteram32_r), FUNC(gal3_state::paletteram32_w)); + map(0xf1760000, 0xf1760003).rw(this, FUNC(gal3_state::namcos21_video_enable_r), FUNC(gal3_state::namcos21_video_enable_w)); + + map(0xf2200000, 0xf220ffff).ram(); + map(0xf2700000, 0xf270ffff).ram(); //AM_READWRITE16(c355_obj_ram_r,c355_obj_ram_w,0xffffffff) AM_SHARE("objram") + map(0xf2720000, 0xf2720007).ram(); //AM_READWRITE16(c355_obj_position_r,c355_obj_position_w,0xffffffff) + map(0xf2740000, 0xf275ffff).ram(); //AM_READWRITE(paletteram16_r,paletteram16_w) AM_SHARE("paletteram") + map(0xf2760000, 0xf2760003).ram(); //AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w) +} + +void gal3_state::rs_cpu_map(address_map &map) +{ + map(0x000000, 0x03ffff).rom(); + map(0x100000, 0x10ffff).ram(); //64K working RAM /// AM_RANGE(0x180000, 0x183fff) AM_RAM //Nvram - AM_RANGE(0x1c0000, 0x1c0001) AM_RAM //148? - AM_RANGE(0x1c2000, 0x1c2001) AM_RAM //? - AM_RANGE(0x1c4000, 0x1c4001) AM_RAM //? - AM_RANGE(0x1c6000, 0x1c6001) AM_RAM //? - AM_RANGE(0x1c8000, 0x1c8001) AM_RAM //? - AM_RANGE(0x1ca000, 0x1ca001) AM_RAM //? - AM_RANGE(0x1cc000, 0x1cc001) AM_RAM //? - AM_RANGE(0x1ce000, 0x1ce001) AM_RAM //? - AM_RANGE(0x1d2000, 0x1d2001) AM_RAM //? - AM_RANGE(0x1d4000, 0x1d4001) AM_RAM //? - AM_RANGE(0x1d6000, 0x1d6001) AM_RAM //? - AM_RANGE(0x1de000, 0x1de001) AM_RAM //? - AM_RANGE(0x1e4000, 0x1e4001) AM_RAM //? - AM_RANGE(0x1e6000, 0x1e6001) AM_RAM //? - - AM_RANGE(0x200000, 0x200001) AM_RAM //? - - AM_RANGE(0x2c0000, 0x2c0001) AM_RAM //? - AM_RANGE(0x2c0800, 0x2c0801) AM_RAM //? - AM_RANGE(0x2c1000, 0x2c1001) AM_RAM //? - AM_RANGE(0x2c1800, 0x2c1801) AM_RAM //? - AM_RANGE(0x2c2000, 0x2c2001) AM_RAM //? - AM_RANGE(0x2c2800, 0x2c2801) AM_RAM //? - AM_RANGE(0x2c3000, 0x2c3001) AM_RAM //? - AM_RANGE(0x2c3800, 0x2c3801) AM_RAM //? - AM_RANGE(0x2c4000, 0x2c4001) AM_RAM //? - - AM_RANGE(0x300000, 0x300fff) AM_RAM AM_SHARE("rso_shared_ram") //shared RAM - - AM_RANGE(0x400000, 0x400017) AM_RAM //MC68681? - AM_RANGE(0x480000, 0x480017) AM_RAM //? - AM_RANGE(0x500000, 0x500017) AM_RAM //? - AM_RANGE(0x580000, 0x580017) AM_RAM //? - AM_RANGE(0x600000, 0x600017) AM_RAM //? - AM_RANGE(0x680000, 0x680017) AM_RAM //? - - AM_RANGE(0x800000, 0x80000f) AM_RAM //? - AM_RANGE(0x840000, 0x843fff) AM_RAM //8 bit, 139 SCI RAM? - AM_RANGE(0x880000, 0x88000f) AM_RAM //? - AM_RANGE(0x8c0000, 0x8c3fff) AM_RAM //8 bit - AM_RANGE(0x900000, 0x90000f) AM_RAM //? - AM_RANGE(0x940000, 0x943fff) AM_RAM //8 bit - AM_RANGE(0x980000, 0x98000f) AM_RAM //? - AM_RANGE(0x9c0000, 0x9c3fff) AM_RAM //8 bit - AM_RANGE(0xa00000, 0xa0000f) AM_RAM //? - AM_RANGE(0xa40000, 0xa43fff) AM_RAM //8 bit - AM_RANGE(0xa80000, 0xa8000f) AM_RAM //? - AM_RANGE(0xac0000, 0xac3fff) AM_RAM //8 bit - AM_RANGE(0xb00000, 0xb0000f) AM_RAM //? - AM_RANGE(0xb40000, 0xb43fff) AM_RAM //8 bit - AM_RANGE(0xb80000, 0xb8000f) AM_RAM //? - AM_RANGE(0xbc0000, 0xbc3fff) AM_RAM //8 bit - AM_RANGE(0xc00000, 0xc0000f) AM_RAM //? - AM_RANGE(0xc40000, 0xc43fff) AM_RAM //8 bit + map(0x1c0000, 0x1c0001).ram(); //148? + map(0x1c2000, 0x1c2001).ram(); //? + map(0x1c4000, 0x1c4001).ram(); //? + map(0x1c6000, 0x1c6001).ram(); //? + map(0x1c8000, 0x1c8001).ram(); //? + map(0x1ca000, 0x1ca001).ram(); //? + map(0x1cc000, 0x1cc001).ram(); //? + map(0x1ce000, 0x1ce001).ram(); //? + map(0x1d2000, 0x1d2001).ram(); //? + map(0x1d4000, 0x1d4001).ram(); //? + map(0x1d6000, 0x1d6001).ram(); //? + map(0x1de000, 0x1de001).ram(); //? + map(0x1e4000, 0x1e4001).ram(); //? + map(0x1e6000, 0x1e6001).ram(); //? + + map(0x200000, 0x200001).ram(); //? + + map(0x2c0000, 0x2c0001).ram(); //? + map(0x2c0800, 0x2c0801).ram(); //? + map(0x2c1000, 0x2c1001).ram(); //? + map(0x2c1800, 0x2c1801).ram(); //? + map(0x2c2000, 0x2c2001).ram(); //? + map(0x2c2800, 0x2c2801).ram(); //? + map(0x2c3000, 0x2c3001).ram(); //? + map(0x2c3800, 0x2c3801).ram(); //? + map(0x2c4000, 0x2c4001).ram(); //? + + map(0x300000, 0x300fff).ram().share("rso_shared_ram"); //shared RAM + + map(0x400000, 0x400017).ram(); //MC68681? + map(0x480000, 0x480017).ram(); //? + map(0x500000, 0x500017).ram(); //? + map(0x580000, 0x580017).ram(); //? + map(0x600000, 0x600017).ram(); //? + map(0x680000, 0x680017).ram(); //? + + map(0x800000, 0x80000f).ram(); //? + map(0x840000, 0x843fff).ram(); //8 bit, 139 SCI RAM? + map(0x880000, 0x88000f).ram(); //? + map(0x8c0000, 0x8c3fff).ram(); //8 bit + map(0x900000, 0x90000f).ram(); //? + map(0x940000, 0x943fff).ram(); //8 bit + map(0x980000, 0x98000f).ram(); //? + map(0x9c0000, 0x9c3fff).ram(); //8 bit + map(0xa00000, 0xa0000f).ram(); //? + map(0xa40000, 0xa43fff).ram(); //8 bit + map(0xa80000, 0xa8000f).ram(); //? + map(0xac0000, 0xac3fff).ram(); //8 bit + map(0xb00000, 0xb0000f).ram(); //? + map(0xb40000, 0xb43fff).ram(); //8 bit + map(0xb80000, 0xb8000f).ram(); //? + map(0xbc0000, 0xbc3fff).ram(); //8 bit + map(0xc00000, 0xc0000f).ram(); //? + map(0xc40000, 0xc43fff).ram(); //8 bit /// AM_RANGE(0xc44000, 0xffffff) AM_RAM ///////////// -ADDRESS_MAP_END +} -ADDRESS_MAP_START(gal3_state::sound_cpu_map) - AM_RANGE(0x000000, 0x07ffff) AM_ROM - AM_RANGE(0x080000, 0x08ffff) AM_RAM +void gal3_state::sound_cpu_map(address_map &map) +{ + map(0x000000, 0x07ffff).rom(); + map(0x080000, 0x08ffff).ram(); /// AM_RANGE(0x0c0000, 0x0cffff) AM_RAM //00, 20, 30, 40, 50 /// AM_RANGE(0x100000, 0x10000f) AM_RAM - AM_RANGE(0x110000, 0x113fff) AM_RAM + map(0x110000, 0x113fff).ram(); /// AM_RANGE(0x120000, 0x120003) AM_RAM //2ieme byte /// AM_RANGE(0x200000, 0x20017f) AM_RAM //C140 - AM_RANGE(0x200000, 0x2037ff) AM_DEVREADWRITE8("c140_16a", c140_device, c140_r, c140_w, 0x00ff) //C140/////////// + map(0x200000, 0x2037ff).rw("c140_16a", FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)).umask16(0x00ff); //C140/////////// /// AM_RANGE(0x201000, 0x20117f) AM_RAM //C140 /// AM_RANGE(0x202000, 0x20217f) AM_RAM //C140 /// AM_RANGE(0x203000, 0x20317f) AM_RAM //C140 - AM_RANGE(0x204000, 0x2047ff) AM_DEVREADWRITE8("c140_16g", c140_device, c140_r, c140_w, 0x00ff) //C140 + map(0x204000, 0x2047ff).rw("c140_16g", FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)).umask16(0x00ff); //C140 /// AM_RANGE(0x090000, 0xffffff) AM_RAM -ADDRESS_MAP_END +} -ADDRESS_MAP_START(gal3_state::psn_b1_cpu_map) - AM_RANGE(0x000000, 0x03ffff) AM_ROM - AM_RANGE(0x040000, 0xffffff) AM_RAM -ADDRESS_MAP_END +void gal3_state::psn_b1_cpu_map(address_map &map) +{ + map(0x000000, 0x03ffff).rom(); + map(0x040000, 0xffffff).ram(); +} static INPUT_PORTS_START( gal3 ) PORT_START("DSW_CPU_mst") // |